#include "includes.h"
__global__ void CalcAngMom(double *AngMomx_d, double *AngMomy_d, double *AngMomz_d, double *GlobalAMx_d, double *GlobalAMy_d, double *GlobalAMz_d, double *Mh_d, double *Rho_d, double  A, double  Omega, double *Altitude_d, double *Altitudeh_d, double *lonlat_d, double *areasT, double *func_r_d, int     num, bool    DeepModel) {

int id  = blockIdx.x * blockDim.x + threadIdx.x;
int nv  = gridDim.y;
int lev = blockIdx.y;

if (id < num) {
double AMx, AMy, AMz;
double rx, ry, rz, r;

//calculate control volume
double zup, zlow, Vol;
zup  = Altitudeh_d[lev + 1] + A;
zlow = Altitudeh_d[lev] + A;
if (DeepModel) {
Vol = areasT[id] / pow(A, 2) * (pow(zup, 3) - pow(zlow, 3)) / 3;
}
else {
Vol = areasT[id] * (zup - zlow);
}

//radius vector
r  = (A + Altitude_d[lev]);
rx = r * func_r_d[id * 3 + 0];
ry = r * func_r_d[id * 3 + 1];
rz = r * func_r_d[id * 3 + 2];

//angular momentum r x p (total x and y over globe should ~ 0, z ~ const)
AMx = ry * Mh_d[id * 3 * nv + lev * 3 + 2] - rz * Mh_d[id * 3 * nv + lev * 3 + 1]
- Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1])
* cos(lonlat_d[id * 2]);
AMy = -rx * Mh_d[id * 3 * nv + lev * 3 + 2] + rz * Mh_d[id * 3 * nv + lev * 3 + 0]
- Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1])
* sin(lonlat_d[id * 2]);
AMz = rx * Mh_d[id * 3 * nv + lev * 3 + 1] - ry * Mh_d[id * 3 * nv + lev * 3 + 0]
+ Rho_d[id * nv + lev] * Omega * r * r * cos(lonlat_d[id * 2 + 1])
* cos(lonlat_d[id * 2 + 1]);
//AMx, AMy should go to zero when integrated over globe
// (but in practice, are just much smaller than AMz)

//total in control volume
AngMomx_d[id * nv + lev] = AMx * Vol;
AngMomy_d[id * nv + lev] = AMy * Vol;
AngMomz_d[id * nv + lev] = AMz * Vol;
}
}
	.file	"tmpxft_002d9959_00000000-6_CalcAngMom.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.type	_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, @function
_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 120(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 112(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 72(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 64(%rsp)
	movq	368(%rsp), %rax
	movq	%rcx, 96(%rsp)
	leaq	136(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movq	376(%rsp), %rax
	movq	%r8, 88(%rsp)
	movq	%rax, 32(%rsp)
	movq	384(%rsp), %rax
	movq	%r9, 80(%rsp)
	movq	%rax, 24(%rsp)
	movq	392(%rsp), %rax
	movsd	%xmm0, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	400(%rsp), %rax
	movsd	%xmm1, 48(%rsp)
	movq	%rax, 8(%rsp)
	movl	416(%rsp), %eax
	movb	%al, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 304(%rsp)
	leaq	408(%rsp), %rax
	movq	%rax, 312(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L2:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .-_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.globl	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.type	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, @function
_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib:
.LFB2033:
	.cfi_startproc
	endbr64
	movzbl	72(%rsp), %eax
	movl	%eax, 72(%rsp)
	jmp	_Z58__device_stub__Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ibPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.cfi_endproc
.LFE2033:
	.size	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .-_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void CalcAngMom(double *AngMomx_d, double *AngMomy_d, double *AngMomz_d, double *GlobalAMx_d, double *GlobalAMy_d, double *GlobalAMz_d, double *Mh_d, double *Rho_d, double  A, double  Omega, double *Altitude_d, double *Altitudeh_d, double *lonlat_d, double *areasT, double *func_r_d, int     num, bool    DeepModel) {

int id  = blockIdx.x * blockDim.x + threadIdx.x;
int nv  = gridDim.y;
int lev = blockIdx.y;

if (id < num) {
double AMx, AMy, AMz;
double rx, ry, rz, r;

//calculate control volume
double zup, zlow, Vol;
zup  = Altitudeh_d[lev + 1] + A;
zlow = Altitudeh_d[lev] + A;
if (DeepModel) {
Vol = areasT[id] / pow(A, 2) * (pow(zup, 3) - pow(zlow, 3)) / 3;
}
else {
Vol = areasT[id] * (zup - zlow);
}

//radius vector
r  = (A + Altitude_d[lev]);
rx = r * func_r_d[id * 3 + 0];
ry = r * func_r_d[id * 3 + 1];
rz = r * func_r_d[id * 3 + 2];

//angular momentum r x p (total x and y over globe should ~ 0, z ~ const)
AMx = ry * Mh_d[id * 3 * nv + lev * 3 + 2] - rz * Mh_d[id * 3 * nv + lev * 3 + 1]
- Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1])
* cos(lonlat_d[id * 2]);
AMy = -rx * Mh_d[id * 3 * nv + lev * 3 + 2] + rz * Mh_d[id * 3 * nv + lev * 3 + 0]
- Rho_d[id * nv + lev] * Omega * r * rz * cos(lonlat_d[id * 2 + 1])
* sin(lonlat_d[id * 2]);
AMz = rx * Mh_d[id * 3 * nv + lev * 3 + 1] - ry * Mh_d[id * 3 * nv + lev * 3 + 0]
+ Rho_d[id * nv + lev] * Omega * r * r * cos(lonlat_d[id * 2 + 1])
* cos(lonlat_d[id * 2 + 1]);
//AMx, AMy should go to zero when integrated over globe
// (but in practice, are just much smaller than AMz)

//total in control volume
AngMomx_d[id * nv + lev] = AMx * Vol;
AngMomy_d[id * nv + lev] = AMy * Vol;
AngMomz_d[id * nv + lev] = AMz * Vol;
}
}
	.text
	.file	"CalcAngMom.hip"
	.globl	_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib # -- Begin function _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.type	_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib,@function
_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: # @_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 320
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movb	384(%rsp), %al
	leaq	88(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	56(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	48(%rsp), %r8
	movq	%r9, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	32(%rsp), %r11
	movsd	%xmm1, (%r11)
	leaq	15(%rsp), %r14
	movb	%al, (%r14)
	leaq	128(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 56(%rbx)
	movq	%r9, 64(%rbx)
	movq	%r11, 72(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 120(%rbx)
	movq	%r14, 128(%rbx)
	leaq	112(%rsp), %r14
	leaq	96(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$288, %rsp                      # imm = 0x120
	.cfi_adjust_cfa_offset -288
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .Lfunc_end0-_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib,@object # @_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.section	.rodata,"a",@progbits
	.globl	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.p2align	3, 0x0
_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib:
	.quad	_Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.size	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib"
	.size	.L__unnamed_1, 45

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib ; -- Begin function _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.globl	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
	.p2align	8
	.type	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib,@function
_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib: ; @_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x8c
	s_load_b64 s[4:5], s[0:1], 0x78
	s_add_u32 s2, s0, 0x80
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s14, s6, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB0_31
; %bb.1:
	s_mov_b32 s24, s15
	s_load_b512 s[8:23], s[0:1], 0x30
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s25, s24, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s22, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	s_lshl_b64 s[22:23], s[24:25], 3
	s_and_b32 s25, s5, 1
	s_add_u32 s4, s18, s22
	global_load_b64 v[2:3], v[2:3], off
	s_addc_u32 s5, s19, s23
	s_cmp_eq_u32 s25, 0
	s_load_b128 s[4:7], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[6:7], s[6:7], s[12:13]
	v_add_f64 v[4:5], s[4:5], s[12:13]
	s_mov_b32 s4, 0
	s_cbranch_scc0 .LBB0_3
; %bb.2:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[6:7], -v[4:5]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[8:9], v[2:3]
	s_branch .LBB0_4
.LBB0_3:
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr8_vgpr9
.LBB0_4:                                ; %Flow191
	s_load_b32 s18, s[2:3], 0x4
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB0_6
; %bb.5:
	v_frexp_mant_f64_e64 v[8:9], |s[12:13]|
	s_mov_b32 s4, 0x55555555
	s_mov_b32 s5, 0x3fe55555
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_frexp_mant_f64_e64 v[18:19], |v[6:7]|
	v_frexp_mant_f64_e64 v[24:25], |v[4:5]|
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s26, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s27, 0x3fbdee67
	s_mov_b32 s28, 0x3abe935a
	s_mov_b32 s29, 0x3fbe25e4
	s_mov_b32 s30, 0x47e6c9c2
	s_mov_b32 s31, 0x3fc110ef
	s_mov_b32 s34, 0xcfa74449
	s_mov_b32 s35, 0x3fc3b13b
	s_mov_b32 s36, 0x71bf3c30
	s_mov_b32 s37, 0x3fc745d1
	s_mov_b32 s38, 0x1c7792ce
	s_mov_b32 s39, 0x3fcc71c7
	s_mov_b32 s40, 0x924920da
	s_mov_b32 s41, 0x3fd24924
	s_mov_b32 s42, 0x9999999c
	s_mov_b32 s43, 0x3fd99999
	s_mov_b32 s44, 0x55555511
	s_mov_b32 s45, 0x3fc55555
	s_mov_b32 s46, 11
	s_mov_b32 s47, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[8:9]
	v_cmp_gt_f64_e64 s2, s[4:5], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s3, s[4:5], v[24:25]
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	v_ldexp_f64 v[14:15], v[8:9], v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, 0, 1, s2
	v_ldexp_f64 v[18:19], v[18:19], v0
	v_cndmask_b32_e64 v0, 0, 1, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[24:25], v[24:25], v0
	v_frexp_exp_i32_f64_e32 v0, s[12:13]
	v_add_f64 v[16:17], v[14:15], 1.0
	v_add_f64 v[12:13], v[14:15], -1.0
	v_add_f64 v[26:27], v[24:25], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	v_cvt_f64_i32_e32 v[56:57], v0
	v_frexp_exp_i32_f64_e32 v0, v[6:7]
	v_rcp_f64_e32 v[8:9], v[16:17]
	v_add_f64 v[20:21], v[16:17], -1.0
	v_rcp_f64_e32 v[32:33], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e64 v0, vcc_lo, 0, v0, s2
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[16:17], v[8:9], 1.0
	v_add_f64 v[20:21], v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	v_fma_f64 v[10:11], -v[16:17], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[8:9]
	v_mul_f64 v[8:9], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[22:23], v[16:17], v[8:9]
	v_fma_f64 v[16:17], v[8:9], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[8:9], v[14:15], v[16:17]
	v_rcp_f64_e32 v[16:17], v[20:21]
	v_add_f64 v[28:29], v[22:23], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[30:31], -v[20:21], v[16:17], 1.0
	v_add_f64 v[34:35], v[12:13], -v[28:29]
	v_add_f64 v[22:23], v[28:29], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[30:31], v[16:17], v[16:17]
	v_fma_f64 v[30:31], -v[26:27], v[32:33], 1.0
	v_add_f64 v[12:13], v[12:13], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[22:23], v[18:19], -1.0
	v_fma_f64 v[36:37], -v[20:21], v[16:17], 1.0
	v_fma_f64 v[30:31], v[30:31], v[32:33], v[32:33]
	v_add_f64 v[32:33], v[24:25], -1.0
	v_add_f64 v[12:13], v[12:13], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[36:37], v[16:17], v[16:17]
	v_fma_f64 v[28:29], -v[26:27], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_mul_f64 v[14:15], v[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[28:29], v[28:29], v[30:31], v[30:31]
	v_add_f64 v[30:31], v[20:21], -1.0
	v_add_f64 v[12:13], v[34:35], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[34:35], v[20:21], v[14:15]
	v_mul_f64 v[36:37], v[32:33], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[18:19], -v[30:31]
	v_fma_f64 v[18:19], v[14:15], v[20:21], -v[34:35]
	v_add_f64 v[20:21], v[26:27], -1.0
	v_mul_f64 v[30:31], v[26:27], v[36:37]
	v_add_f64 v[38:39], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[14:15], v[12:13], v[18:19]
	v_add_f64 v[18:19], v[24:25], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[20:21], v[36:37], v[26:27], -v[30:31]
	v_add_f64 v[8:9], v[38:39], -v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[34:35], v[12:13]
	v_fma_f64 v[18:19], v[36:37], v[18:19], v[20:21]
	v_mul_f64 v[20:21], v[38:39], v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_add_f64 v[10:11], v[22:23], -v[24:25]
	v_add_f64 v[34:35], v[24:25], -v[34:35]
	v_add_f64 v[26:27], v[30:31], v[18:19]
	v_fma_f64 v[40:41], v[38:39], v[38:39], -v[20:21]
	v_add_f64 v[42:43], v[8:9], v[8:9]
	v_add_f64 v[22:23], v[22:23], -v[10:11]
	v_add_f64 v[12:13], v[34:35], -v[12:13]
	v_add_f64 v[44:45], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[38:39], v[42:43], v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	v_add_f64 v[24:25], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[32:33], -v[44:45]
	v_add_f64 v[32:33], v[20:21], v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[22:23]
	v_add_f64 v[18:19], v[24:25], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[30:31], -v[26:27]
	v_fma_f64 v[24:25], v[32:33], s[26:27], s[6:7]
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	v_mul_f64 v[48:49], v[38:39], v[32:33]
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[18:19], v[22:23]
	v_fma_f64 v[18:19], v[32:33], v[24:25], s[28:29]
	v_add_f64 v[20:21], v[40:41], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	v_add_f64 v[12:13], v[44:45], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[32:33], v[18:19], s[30:31]
	v_add_f64 v[18:19], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[12:13], v[28:29], v[12:13]
	v_fma_f64 v[16:17], v[32:33], v[16:17], s[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	v_mul_f64 v[24:25], v[18:19], v[18:19]
	v_add_f64 v[22:23], v[36:37], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[32:33], v[16:17], s[36:37]
	v_add_f64 v[10:11], v[10:11], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], v[18:19], v[18:19], -v[24:25]
	v_add_f64 v[14:15], v[22:23], -v[36:37]
	v_mul_f64 v[30:31], v[22:23], v[22:23]
	v_fma_f64 v[16:17], v[32:33], v[16:17], s[38:39]
	v_add_f64 v[28:29], v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_fma_f64 v[14:15], v[32:33], v[16:17], s[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[18:19], v[28:29], v[26:27]
	v_fma_f64 v[26:27], v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[28:29], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[32:33], v[14:15], s[42:43]
	v_add_f64 v[34:35], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[26:27], v[22:23], v[28:29], v[26:27]
	v_mul_f64 v[28:29], v[32:33], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[36:37], v[34:35], s[26:27], s[6:7]
	v_add_f64 v[24:25], v[34:35], -v[24:25]
	v_add_f64 v[42:43], v[30:31], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[32:33], v[14:15], -v[28:29]
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_fma_f64 v[44:45], v[42:43], s[26:27], s[6:7]
	s_mov_b32 s7, 0xbfe55555
	s_mov_b32 s6, s4
	s_mov_b32 s26, 0xd5df274d
	s_mov_b32 s27, 0x3c8543b0
	v_add_f64 v[30:31], v[42:43], -v[30:31]
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[40:41]
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[40:41], v[42:43], v[44:45], s[28:29]
	s_mov_b32 s28, 0x6a5dcb37
	s_mov_b32 s29, 0x3e5ade15
	v_add_f64 v[26:27], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[28:29], v[14:15]
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[42:43], v[40:41], s[30:31]
	s_mov_b32 s30, 0x623fde64
	s_mov_b32 s31, 0x3ec71dee
	v_add_f64 v[46:47], v[44:45], s[4:5]
	v_add_f64 v[28:29], v[44:45], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[36:37]
	v_fma_f64 v[40:41], v[42:43], v[40:41], s[34:35]
	s_mov_b32 s34, 0x7c89e6b0
	s_mov_b32 s35, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[50:51], v[46:47], s[6:7]
	v_add_f64 v[14:15], v[14:15], -v[28:29]
	v_fma_f64 v[28:29], v[32:33], v[38:39], -v[48:49]
	v_fma_f64 v[36:37], v[34:35], v[36:37], s[38:39]
	v_fma_f64 v[40:41], v[42:43], v[40:41], s[36:37]
	s_mov_b32 s36, 0x14761f6e
	s_mov_b32 s37, 0x3f2a01a0
	v_add_f64 v[44:45], v[44:45], -v[50:51]
	v_add_f64 v[14:15], v[14:15], s[26:27]
	v_fma_f64 v[28:29], v[32:33], v[8:9], v[28:29]
	v_fma_f64 v[32:33], v[34:35], v[36:37], s[40:41]
	v_ldexp_f64 v[8:9], v[8:9], 1
	v_fma_f64 v[36:37], v[42:43], v[40:41], s[38:39]
	s_mov_b32 s38, 0x1852b7b0
	s_mov_b32 s39, 0x3f56c16c
	v_add_f64 v[14:15], v[14:15], v[44:45]
	v_fma_f64 v[20:21], v[20:21], v[38:39], v[28:29]
	v_fma_f64 v[28:29], v[34:35], v[32:33], s[42:43]
	v_ldexp_f64 v[38:39], v[38:39], 1
	v_fma_f64 v[32:33], v[42:43], v[36:37], s[40:41]
	s_mov_b32 s40, 0x11122322
	s_mov_b32 s41, 0x3f811111
	v_add_f64 v[36:37], v[46:47], v[14:15]
	v_add_f64 v[40:41], v[48:49], v[20:21]
	v_mul_f64 v[44:45], v[34:35], v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[42:43], v[32:33], s[42:43]
	s_mov_b32 s42, 0x555502a1
	s_mov_b32 s43, 0x3fa55555
	v_add_f64 v[46:47], v[46:47], -v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[50:51], v[40:41], v[36:37]
	v_fma_f64 v[24:25], v[34:35], v[28:29], -v[44:45]
	v_add_f64 v[48:49], v[40:41], -v[48:49]
	v_mul_f64 v[52:53], v[42:43], v[32:33]
	v_add_f64 v[14:15], v[14:15], v[46:47]
	v_fma_f64 v[46:47], v[40:41], v[36:37], -v[50:51]
	v_fma_f64 v[24:25], v[16:17], v[28:29], v[24:25]
	v_add_f64 v[20:21], v[20:21], -v[48:49]
	v_fma_f64 v[28:29], v[42:43], v[32:33], -v[52:53]
	v_mul_f64 v[48:49], v[22:23], v[42:43]
	v_fma_f64 v[14:15], v[40:41], v[14:15], v[46:47]
	v_add_f64 v[30:31], v[44:45], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], v[26:27], v[32:33], v[28:29]
	v_fma_f64 v[14:15], v[20:21], v[36:37], v[14:15]
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f64 v[20:21], v[30:31], s[4:5]
	v_add_f64 v[32:33], v[30:31], -v[44:45]
	v_mul_f64 v[36:37], v[18:19], v[34:35]
	v_add_f64 v[40:41], v[52:53], v[28:29]
	v_add_f64 v[44:45], v[50:51], v[14:15]
	v_add_f64 v[46:47], v[20:21], s[6:7]
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_fma_f64 v[32:33], v[34:35], v[18:19], -v[36:37]
	v_add_f64 v[54:55], v[40:41], s[4:5]
	v_add_f64 v[52:53], v[40:41], -v[52:53]
	s_mov_b32 s4, 0xfefa39ef
	s_mov_b32 s5, 0x3fe62e42
	v_add_f64 v[58:59], v[38:39], v[44:45]
	v_add_f64 v[50:51], v[44:45], -v[50:51]
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_add_f64 v[24:25], v[24:25], s[26:27]
	v_fma_f64 v[32:33], v[34:35], v[10:11], v[32:33]
	v_fma_f64 v[34:35], v[42:43], v[22:23], -v[48:49]
	v_add_f64 v[46:47], v[54:55], s[6:7]
	v_add_f64 v[28:29], v[28:29], -v[52:53]
	v_mul_f64 v[52:53], v[56:57], s[4:5]
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s7, 0x3c7abc9e
	v_ldexp_f64 v[10:11], v[10:11], 1
	v_add_f64 v[38:39], v[58:59], -v[38:39]
	v_add_f64 v[14:15], v[14:15], -v[50:51]
	v_add_f64 v[24:25], v[24:25], v[30:31]
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[32:33]
	v_fma_f64 v[30:31], v[42:43], v[12:13], v[34:35]
	v_add_f64 v[32:33], v[40:41], -v[46:47]
	v_add_f64 v[28:29], v[28:29], s[26:27]
	v_fma_f64 v[34:35], v[56:57], s[4:5], -v[52:53]
	v_ldexp_f64 v[18:19], v[18:19], 1
	v_ldexp_f64 v[12:13], v[12:13], 1
	s_mov_b32 s26, 0xfca7ab0c
	s_mov_b32 s27, 0x3e928af3
	v_add_f64 v[38:39], v[44:45], -v[38:39]
	v_add_f64 v[8:9], v[8:9], v[14:15]
	v_add_f64 v[14:15], v[20:21], v[24:25]
	v_add_f64 v[40:41], v[36:37], v[16:17]
	v_fma_f64 v[26:27], v[26:27], v[22:23], v[30:31]
	v_ldexp_f64 v[22:23], v[22:23], 1
	v_add_f64 v[28:29], v[28:29], v[32:33]
	v_fma_f64 v[30:31], v[56:57], s[6:7], v[34:35]
	v_add_f64 v[8:9], v[8:9], v[38:39]
	v_add_f64 v[20:21], v[20:21], -v[14:15]
	v_mul_f64 v[32:33], v[40:41], v[14:15]
	v_add_f64 v[38:39], v[48:49], v[26:27]
	v_add_f64 v[36:37], v[40:41], -v[36:37]
	v_add_f64 v[34:35], v[54:55], v[28:29]
	v_add_f64 v[42:43], v[52:53], v[30:31]
	v_add_f64 v[44:45], v[58:59], v[8:9]
	v_add_f64 v[20:21], v[24:25], v[20:21]
	v_fma_f64 v[24:25], v[40:41], v[14:15], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[36:37]
	v_add_f64 v[46:47], v[54:55], -v[34:35]
	v_mul_f64 v[50:51], v[38:39], v[34:35]
	v_add_f64 v[54:55], v[42:43], v[44:45]
	v_fma_f64 v[20:21], v[40:41], v[20:21], v[24:25]
	v_add_f64 v[24:25], v[38:39], -v[48:49]
	v_add_f64 v[28:29], v[28:29], v[46:47]
	v_fma_f64 v[36:37], v[38:39], v[34:35], -v[50:51]
	v_add_f64 v[40:41], v[54:55], -v[42:43]
	v_fma_f64 v[14:15], v[16:17], v[14:15], v[20:21]
	v_add_f64 v[16:17], v[26:27], -v[24:25]
	v_add_f64 v[24:25], v[42:43], -v[52:53]
	v_add_f64 v[26:27], v[44:45], -v[58:59]
	v_fma_f64 v[20:21], v[38:39], v[28:29], v[36:37]
	v_add_f64 v[28:29], v[54:55], -v[40:41]
	v_add_f64 v[36:37], v[32:33], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_fma_f64 v[16:17], v[16:17], v[34:35], v[20:21]
	v_add_f64 v[20:21], v[30:31], -v[24:25]
	v_add_f64 v[24:25], v[44:45], -v[40:41]
	v_frexp_exp_i32_f64_e32 v40, v[4:5]
	v_add_f64 v[26:27], v[42:43], -v[28:29]
	v_cvt_f64_i32_e32 v[28:29], v0
	v_add_f64 v[30:31], v[18:19], v[36:37]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	v_add_f64 v[34:35], v[50:51], v[16:17]
	v_add_f64 v[38:39], v[20:21], v[8:9]
	v_subrev_co_ci_u32_e64 v0, vcc_lo, 0, v40, s3
	s_mov_b32 s2, 0x652b82fe
	s_mov_b32 s3, 0x3ff71547
	v_add_f64 v[24:25], v[24:25], v[26:27]
	v_mul_f64 v[26:27], v[28:29], s[4:5]
	v_add_f64 v[18:19], v[30:31], -v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_cvt_f64_i32_e32 v[32:33], v0
	v_add_f64 v[40:41], v[22:23], v[34:35]
	v_add_f64 v[42:43], v[34:35], -v[50:51]
	v_add_f64 v[44:45], v[38:39], -v[20:21]
	v_add_f64 v[24:25], v[38:39], v[24:25]
	v_fma_f64 v[46:47], v[28:29], s[4:5], -v[26:27]
	v_add_f64 v[18:19], v[36:37], -v[18:19]
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_mul_f64 v[14:15], v[32:33], s[4:5]
	v_add_f64 v[22:23], v[40:41], -v[22:23]
	v_add_f64 v[16:17], v[16:17], -v[42:43]
	v_add_f64 v[36:37], v[38:39], -v[44:45]
	v_add_f64 v[8:9], v[8:9], -v[44:45]
	v_add_f64 v[38:39], v[54:55], v[24:25]
	v_fma_f64 v[28:29], v[28:29], s[6:7], v[46:47]
	v_add_f64 v[10:11], v[10:11], v[18:19]
	v_fma_f64 v[18:19], v[32:33], s[4:5], -v[14:15]
	s_mov_b32 s5, 0xbfe62e42
	v_add_f64 v[22:23], v[34:35], -v[22:23]
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_add_f64 v[16:17], v[20:21], -v[36:37]
	v_add_f64 v[20:21], v[38:39], -v[54:55]
	v_add_f64 v[34:35], v[26:27], v[28:29]
	v_add_f64 v[36:37], v[30:31], v[10:11]
	v_fma_f64 v[18:19], v[32:33], s[6:7], v[18:19]
	s_mov_b32 s7, 0xbc7abc9e
	v_add_f64 v[12:13], v[12:13], v[22:23]
	v_add_f64 v[8:9], v[8:9], v[16:17]
	v_add_f64 v[16:17], v[24:25], -v[20:21]
	v_add_f64 v[26:27], v[34:35], -v[26:27]
	v_add_f64 v[20:21], v[34:35], v[36:37]
	v_add_f64 v[22:23], v[14:15], v[18:19]
	v_add_f64 v[30:31], v[36:37], -v[30:31]
	v_add_f64 v[24:25], v[40:41], v[12:13]
	v_add_f64 v[8:9], v[8:9], v[16:17]
	v_add_f64 v[26:27], v[28:29], -v[26:27]
	v_add_f64 v[16:17], v[20:21], -v[34:35]
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_add_f64 v[10:11], v[10:11], -v[30:31]
	v_add_f64 v[32:33], v[22:23], v[24:25]
	v_add_f64 v[30:31], v[24:25], -v[40:41]
	v_add_f64 v[42:43], v[38:39], v[8:9]
	v_add_f64 v[44:45], v[20:21], -v[16:17]
	v_add_f64 v[16:17], v[36:37], -v[16:17]
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	v_add_f64 v[46:47], v[32:33], -v[22:23]
	v_add_f64 v[12:13], v[12:13], -v[30:31]
	v_add_f64 v[38:39], v[42:43], -v[38:39]
	v_add_f64 v[48:49], v[42:43], v[42:43]
	v_add_f64 v[28:29], v[34:35], -v[44:45]
	v_add_f64 v[34:35], v[32:33], -v[46:47]
	v_add_f64 v[18:19], v[24:25], -v[46:47]
	v_add_f64 v[8:9], v[8:9], -v[38:39]
	v_fma_f64 v[36:37], v[42:43], 2.0, -v[48:49]
	v_add_f64 v[38:39], v[26:27], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[48:49], 0x204
	v_add_f64 v[16:17], v[16:17], v[28:29]
	v_add_f64 v[28:29], v[14:15], v[12:13]
	v_add_f64 v[22:23], v[22:23], -v[34:35]
	v_fma_f64 v[8:9], v[8:9], 2.0, v[36:37]
	v_add_f64 v[24:25], v[38:39], -v[26:27]
	v_add_f64 v[16:17], v[38:39], v[16:17]
	v_add_f64 v[36:37], v[28:29], -v[14:15]
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[22:23], v[48:49], v[8:9]
	v_add_f64 v[30:31], v[38:39], -v[24:25]
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	v_add_f64 v[34:35], v[20:21], v[16:17]
	v_add_f64 v[12:13], v[12:13], -v[36:37]
	v_add_f64 v[18:19], v[28:29], v[18:19]
	v_dual_cndmask_b32 v39, v23, v49 :: v_dual_cndmask_b32 v38, v22, v48
	v_add_f64 v[24:25], v[26:27], -v[30:31]
	v_add_f64 v[20:21], v[34:35], -v[20:21]
	v_add_f64 v[26:27], v[28:29], -v[36:37]
	v_add_f64 v[22:23], v[22:23], -v[48:49]
	v_mul_f64 v[40:41], v[38:39], s[2:3]
	v_add_f64 v[28:29], v[32:33], v[18:19]
	v_add_f64 v[10:11], v[10:11], v[24:25]
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	v_add_f64 v[14:15], v[14:15], -v[26:27]
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_rndne_f64_e32 v[30:31], v[40:41]
	v_add_f64 v[20:21], v[28:29], -v[32:33]
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_add_f64 v[12:13], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[30:31], s[4:5], v[38:39]
	v_add_f64 v[14:15], v[18:19], -v[20:21]
	v_cvt_i32_f64_e32 v0, v[30:31]
	v_add_f64 v[18:19], v[34:35], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[30:31], s[6:7], v[24:25]
	v_add_f64 v[12:13], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[20:21], v[18:19], -v[34:35]
	v_mul_f64 v[24:25], 0x40080000, v[18:19]
	v_fma_f64 v[14:15], v[16:17], s[28:29], s[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[28:29], v[12:13]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[18:19], 0x40080000, v[18:19], -v[24:25]
	v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x204
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[30:31]
	v_add_f64 v[20:21], v[26:27], -v[28:29]
	v_mul_f64 v[28:29], 0x40080000, v[26:27]
	v_fma_f64 v[10:11], 0x40080000, v[10:11], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[34:35]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], 0x40080000, v[26:27], -v[28:29]
	v_add_f64 v[20:21], v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[36:37]
	v_fma_f64 v[12:13], 0x40080000, v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v19, v21, v25 :: v_dual_cndmask_b32 v18, v20, v24
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[38:39]
	v_cmp_class_f64_e64 vcc_lo, v[28:29], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[28:29], v[12:13]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	v_mul_f64 v[26:27], v[18:19], s[2:3]
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[40:41]
	v_dual_cndmask_b32 v35, v33, v29 :: v_dual_cndmask_b32 v34, v32, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_rndne_f64_e32 v[26:27], v[26:27]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[38:39]|
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_mul_f64 v[36:37], v[34:35], s[2:3]
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[38:39]
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[38:39]
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[42:43]
	v_fma_f64 v[40:41], v[26:27], s[4:5], v[18:19]
	v_dual_cndmask_b32 v9, 0, v9 :: v_dual_cndmask_b32 v8, 0, v8
	v_rndne_f64_e32 v[36:37], v[36:37]
	s_and_b32 vcc_lo, s3, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[44:45]
	v_fma_f64 v[40:41], v[26:27], s[6:7], v[40:41]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[42:43], v[36:37], s[4:5], v[34:35]
	v_cmp_ngt_f64_e64 s4, 0xc090cc00, v[18:19]
	v_cmp_ngt_f64_e64 s5, 0xc090cc00, v[34:35]
	v_fma_f64 v[14:15], v[16:17], v[14:15], s[46:47]
	v_fma_f64 v[44:45], v[40:41], s[28:29], s[26:27]
	v_fma_f64 v[42:43], v[36:37], s[6:7], v[42:43]
	v_cmp_class_f64_e64 s6, v[6:7], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[16:17], v[14:15], 1.0
	v_fma_f64 v[44:45], v[40:41], v[44:45], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[46:47], v[42:43], s[28:29], s[26:27]
	v_fma_f64 v[14:15], v[16:17], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[40:41], v[44:45], s[34:35]
	v_fma_f64 v[30:31], v[42:43], v[46:47], s[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[14:15], v[14:15], v0
	v_fma_f64 v[16:17], v[40:41], v[16:17], s[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[42:43], v[30:31], s[34:35]
	v_cndmask_b32_e64 v0, 0x7ff00000, v15, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v30, 0, v14, vcc_lo
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |s[12:13]|
	v_fma_f64 v[15:16], v[40:41], v[16:17], s[38:39]
	v_cndmask_b32_e64 v31, 0, v0, s3
	v_cmp_neq_f64_e64 s3, s[12:13], 0
	v_fma_f64 v[22:23], v[42:43], v[22:23], s[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[30:31], v[8:9], v[30:31]
	v_cmp_class_f64_e64 vcc_lo, v[30:31], 0x204
	v_fma_f64 v[14:15], v[40:41], v[15:16], s[40:41]
	v_fma_f64 v[16:17], v[42:43], v[22:23], s[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v9, v31, vcc_lo
	v_cndmask_b32_e32 v8, v8, v30, vcc_lo
	s_and_b32 vcc_lo, s3, s2
	v_and_b32_e32 v0, 0x7fffffff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cndmask_b32_e64 v0, 0x7ff00000, v0, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[18:19]|
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v9, 0, v0, s3
	v_cvt_i32_f64_e32 v0, v[26:27]
	v_cmp_nlt_f64_e64 s3, 0x40900000, v[18:19]
	v_add_f64 v[18:19], v[32:33], -v[28:29]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[22:23], null, v[8:9], v[8:9], v[2:3]
	v_div_scale_f64 v[20:21], vcc_lo, v[2:3], v[8:9], v[2:3]
	v_fma_f64 v[14:15], v[40:41], v[14:15], s[42:43]
	v_fma_f64 v[16:17], v[42:43], v[16:17], s[40:41]
	v_cndmask_b32_e64 v11, 0, v11, s2
	v_cndmask_b32_e64 v10, 0, v10, s2
	s_and_b32 s2, s4, s3
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_rcp_f64_e32 v[30:31], v[22:23]
	v_fma_f64 v[14:15], v[40:41], v[14:15], s[44:45]
	v_fma_f64 v[16:17], v[42:43], v[16:17], s[42:43]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[38:39], -v[22:23], v[30:31], 1.0
	v_fma_f64 v[14:15], v[40:41], v[14:15], s[46:47]
	v_fma_f64 v[16:17], v[42:43], v[16:17], s[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[30:31], v[30:31], v[38:39], v[30:31]
	v_fma_f64 v[14:15], v[40:41], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[42:43], v[16:17], s[46:47]
	v_fma_f64 v[24:25], -v[22:23], v[30:31], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[40:41], v[14:15], 1.0
	v_fma_f64 v[16:17], v[42:43], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[30:31], v[24:25], v[30:31]
	v_ldexp_f64 v[14:15], v[14:15], v0
	v_cvt_i32_f64_e32 v0, v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[42:43], v[16:17], 1.0
	v_mul_f64 v[26:27], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v30, 0x7ff00000, v15, s3
	v_cmp_eq_f64_e64 s3, 0, v[6:7]
	v_cndmask_b32_e64 v28, 0, v14, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[34:35]|
	v_ldexp_f64 v[15:16], v[16:17], v0
	v_cndmask_b32_e64 v29, 0, v30, s4
	v_cmp_nlt_f64_e64 s4, 0x40900000, v[34:35]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[10:11], v[28:29], v[10:11], v[28:29]
	s_or_b32 s6, s3, s6
	s_and_b32 s3, s3, exec_lo
	s_cselect_b32 s7, 0, 0x7ff00000
	v_cndmask_b32_e64 v13, 0, v13, s2
	v_cndmask_b32_e64 v12, 0, v12, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v0, 0x7ff00000, v16, s4
	v_fma_f64 v[16:17], -v[22:23], v[26:27], v[20:21]
	s_and_b32 s3, s5, s4
	v_cmp_class_f64_e64 s2, v[28:29], 0x204
	v_cndmask_b32_e64 v18, 0, v15, s3
	v_cndmask_b32_e64 v19, 0, v0, s5
	v_cmp_class_f64_e64 s5, v[4:5], 0x204
	v_cmp_eq_f64_e64 s4, 0, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[18:19]
	v_cmp_class_f64_e64 s3, v[18:19], 0x204
	v_div_fmas_f64 v[14:15], v[16:17], v[24:25], v[26:27]
	v_cndmask_b32_e64 v4, v11, v29, s2
	v_cndmask_b32_e64 v0, v10, v28, s2
	s_or_b32 vcc_lo, s4, s5
	s_delay_alu instid0(VALU_DEP_2)
	v_bfi_b32 v6, 0x7fffffff, v4, v7
	s_and_b32 s2, s4, exec_lo
	s_cselect_b32 s2, 0, 0x7ff00000
	v_cndmask_b32_e64 v4, v13, v19, s3
	v_cndmask_b32_e64 v10, v12, v18, s3
	v_bfi_b32 v7, 0x7fffffff, s7, v7
	v_bfi_b32 v11, 0x7fffffff, s2, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_bfi_b32 v12, 0x7fffffff, v4, v5
	v_cndmask_b32_e64 v4, v0, 0, s6
	v_cndmask_b32_e64 v5, v6, v7, s6
	v_cndmask_b32_e64 v6, v10, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v12, v11, vcc_lo
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_div_fixup_f64 v[2:3], v[14:15], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	v_div_scale_f64 v[4:5], null, 0x40080000, 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_div_scale_f64 v[8:9], vcc_lo, v[2:3], 0x40080000, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[8:9], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[10:11]
	v_div_fixup_f64 v[8:9], v[4:5], 0x40080000, v[2:3]
.LBB0_6:
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v2, 1, v1
	v_lshl_add_u32 v0, v1, 1, v1
	s_load_b64 s[2:3], s[0:1], 0x70
	s_mul_i32 s4, s24, 3
                                        ; implicit-def: $vgpr54
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $vgpr14_vgpr15
	s_delay_alu instid0(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[4:5], null, v0, s18, s[4:5]
	s_add_u32 s4, s16, s22
	s_addc_u32 s5, s17, s23
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v18, vcc_lo, s20, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v3, vcc_lo
	v_mad_u64_u32 v[2:3], null, v1, s18, s[24:25]
	v_ashrrev_i32_e32 v1, 31, v0
	global_load_b64 v[24:25], v[18:19], off offset:8
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 3, v[2:3]
	v_lshlrev_b64 v[2:3], 3, v[4:5]
	v_add_co_u32 v4, vcc_lo, s10, v10
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v11, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v28, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v29, vcc_lo, s9, v3, vcc_lo
	global_load_b64 v[26:27], v[4:5], off
	s_clause 0x1
	global_load_b64 v[16:17], v[0:1], off offset:16
	global_load_b128 v[4:7], v[0:1], off
	global_load_b128 v[0:3], v[28:29], off offset:8
	s_waitcnt vmcnt(4)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[24:25]|
	v_trig_preop_f64 v[34:35], |v[24:25]|, 0
	v_trig_preop_f64 v[32:33], |v[24:25]|, 1
	v_ldexp_f64 v[36:37], |v[24:25]|, 0xffffff80
	v_trig_preop_f64 v[30:31], |v[24:25]|, 2
	v_and_b32_e32 v56, 0x7fffffff, v25
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s2
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]|
	v_mov_b32_e32 v50, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v13, v56, v37, vcc_lo
	v_cndmask_b32_e32 v12, v24, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[34:35], v[12:13]
	v_mul_f64 v[20:21], v[32:33], v[12:13]
	v_fma_f64 v[22:23], v[34:35], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[48:49], v[32:33], v[12:13], -v[20:21]
	v_add_f64 v[38:39], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[38:39], -v[20:21]
	v_add_f64 v[44:45], v[14:15], v[38:39]
	v_add_f64 v[42:43], v[38:39], -v[40:41]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[40:41], v[44:45], -2
	v_add_f64 v[14:15], v[44:45], -v[14:15]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[40:41]|
	v_add_f64 v[14:15], v[38:39], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[22:23], v[20:21]
	v_fract_f64_e32 v[22:23], v[40:41]
	v_dual_cndmask_b32 v23, 0, v23 :: v_dual_cndmask_b32 v22, 0, v22
	v_mul_f64 v[46:47], v[30:31], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[22:23], v[22:23], 2
	v_add_f64 v[42:43], v[46:47], v[48:49]
	v_fma_f64 v[12:13], v[30:31], v[12:13], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[42:43], v[20:21]
	v_add_f64 v[40:41], v[14:15], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[40:41], v[22:23]
	v_add_f64 v[14:15], v[40:41], -v[14:15]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[44:45]
	v_add_f64 v[44:45], v[42:43], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[38:39], -v[14:15]
	v_cndmask_b32_e64 v51, 0, 0x40100000, vcc_lo
	v_add_f64 v[57:58], v[42:43], -v[44:45]
	v_add_f64 v[44:45], v[48:49], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], v[50:51]
	v_add_f64 v[51:52], v[38:39], -v[42:43]
	v_add_f64 v[48:49], v[46:47], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[40:41], v[22:23]
	v_add_f64 v[59:60], v[38:39], -v[51:52]
	v_add_f64 v[20:21], v[20:21], -v[51:52]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[44:45], v[48:49]
	v_cvt_i32_f64_e32 v53, v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], -v[59:60]
	v_cvt_f64_i32_e32 v[51:52], v53
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[42:43]
	v_add_f64 v[22:23], v[22:23], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[44:45], v[20:21]
	v_add_f64 v[42:43], v[40:41], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[20:21]
	v_add_f64 v[20:21], v[42:43], -v[22:23]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_add_f64 v[14:15], v[40:41], -v[20:21]
	v_cndmask_b32_e64 v51, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v54, s2, 0, v53, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_add_f64 v[14:15], v[42:43], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[14:15], v[12:13]
	v_mul_f64 v[22:23], v[20:21], s[8:9]
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[38:39], v[20:21], s[8:9], -v[22:23]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[20:21], s[10:11], v[38:39]
	v_fma_f64 v[14:15], v[12:13], s[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[22:23], v[14:15]
	v_add_f64 v[20:21], v[12:13], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
.LBB0_8:                                ; %Flow190
	s_and_not1_saveexec_b32 s2, s6
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[12:13], |v[24:25]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[20:21], v[12:13]
	v_fma_f64 v[12:13], v[20:21], s[6:7], |v[24:25]|
	v_mul_f64 v[14:15], v[20:21], s[8:9]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v54, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[38:39], v[20:21], s[8:9], v[12:13]
	v_add_f64 v[22:23], v[12:13], v[14:15]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[22:23]
	v_add_f64 v[22:23], v[22:23], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_fma_f64 v[14:15], v[20:21], s[8:9], v[14:15]
	v_add_f64 v[12:13], v[22:23], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_fma_f64 v[14:15], v[20:21], s[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[38:39], v[14:15]
	v_add_f64 v[22:23], v[12:13], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[22:23]
.LBB0_10:                               ; %_ZL3cosd.exit
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b64 v[20:21], v[18:19], off
                                        ; implicit-def: $vgpr55
                                        ; implicit-def: $vgpr18_vgpr19
                                        ; implicit-def: $vgpr22_vgpr23
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f64_e64 s6, 0x41d00000, |v[20:21]|
	v_trig_preop_f64 v[50:51], |v[20:21]|, 0
	v_trig_preop_f64 v[48:49], |v[20:21]|, 1
	v_ldexp_f64 v[52:53], |v[20:21]|, 0xffffff80
	v_trig_preop_f64 v[46:47], |v[20:21]|, 2
	v_and_b32_e32 v59, 0x7fffffff, v21
	s_and_saveexec_b32 s2, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s2
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[20:21]|
	v_mov_b32_e32 v66, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v19, v59, v53 :: v_dual_cndmask_b32 v18, v20, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[22:23], v[50:51], v[18:19]
	v_mul_f64 v[38:39], v[48:49], v[18:19]
	v_mul_f64 v[62:63], v[46:47], v[18:19]
	v_fma_f64 v[40:41], v[50:51], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[64:65], v[48:49], v[18:19], -v[38:39]
	v_fma_f64 v[18:19], v[46:47], v[18:19], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[38:39], v[40:41]
	v_add_f64 v[44:45], v[42:43], -v[38:39]
	v_add_f64 v[60:61], v[22:23], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[42:43], -v[44:45]
	v_add_f64 v[40:41], v[40:41], -v[44:45]
	v_ldexp_f64 v[44:45], v[60:61], -2
	v_add_f64 v[22:23], v[60:61], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[38:39], -v[57:58]
	v_add_f64 v[57:58], v[62:63], v[64:65]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[44:45]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[42:43], -v[22:23]
	v_add_f64 v[38:39], v[40:41], v[38:39]
	v_fract_f64_e32 v[40:41], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[57:58], v[38:39]
	v_dual_cndmask_b32 v41, 0, v41 :: v_dual_cndmask_b32 v40, 0, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[40:41], v[40:41], 2
	v_add_f64 v[44:45], v[22:23], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[44:45], v[40:41]
	v_add_f64 v[22:23], v[44:45], -v[22:23]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[60:61]
	v_add_f64 v[60:61], v[57:58], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[42:43], -v[22:23]
	v_cndmask_b32_e64 v67, 0, 0x40100000, vcc_lo
	v_add_f64 v[71:72], v[57:58], -v[60:61]
	v_add_f64 v[60:61], v[64:65], -v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[40:41], v[66:67]
	v_add_f64 v[67:68], v[42:43], -v[57:58]
	v_add_f64 v[64:65], v[62:63], -v[71:72]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[69:70], v[44:45], v[40:41]
	v_add_f64 v[73:74], v[42:43], -v[67:68]
	v_add_f64 v[38:39], v[38:39], -v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[60:61], v[60:61], v[64:65]
	v_cvt_i32_f64_e32 v55, v[69:70]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[57:58], v[57:58], -v[73:74]
	v_cvt_f64_i32_e32 v[67:68], v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], v[57:58]
	v_add_f64 v[40:41], v[40:41], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[60:61], v[38:39]
	v_add_f64 v[57:58], v[44:45], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[38:39]
	v_add_f64 v[38:39], v[57:58], -v[40:41]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[22:23], v[18:19]
	v_add_f64 v[22:23], v[44:45], -v[38:39]
	v_cndmask_b32_e64 v67, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v55, s2, 0, v55, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_add_f64 v[22:23], v[57:58], -v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[22:23], v[18:19]
	v_mul_f64 v[40:41], v[38:39], s[8:9]
	v_add_f64 v[22:23], v[38:39], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[38:39], s[8:9], -v[40:41]
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[38:39], s[10:11], v[42:43]
	v_fma_f64 v[22:23], v[18:19], s[8:9], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[40:41], v[22:23]
	v_add_f64 v[38:39], v[18:19], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], -v[38:39]
.LBB0_12:                               ; %Flow189
	s_and_not1_saveexec_b32 s2, s7
	s_cbranch_execz .LBB0_14
; %bb.13:
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[18:19], |v[20:21]|, s[8:9]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[38:39], v[18:19]
	v_fma_f64 v[18:19], v[38:39], s[8:9], |v[20:21]|
	v_mul_f64 v[22:23], v[38:39], s[10:11]
	s_mov_b32 s8, 0x252049c0
	s_mov_b32 s9, 0xb97b839a
	v_cvt_i32_f64_e32 v55, v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[42:43], v[38:39], s[10:11], v[18:19]
	v_add_f64 v[40:41], v[18:19], v[22:23]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[40:41]
	v_add_f64 v[40:41], v[40:41], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[22:23]
	v_fma_f64 v[22:23], v[38:39], s[10:11], v[22:23]
	v_add_f64 v[18:19], v[40:41], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[22:23]
	v_fma_f64 v[22:23], v[38:39], s[8:9], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[42:43], v[22:23]
	v_add_f64 v[40:41], v[18:19], -v[42:43]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], -v[40:41]
.LBB0_14:                               ; %_ZL3cosd.exit128
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b64 v[28:29], v[28:29], off
                                        ; implicit-def: $vgpr57
                                        ; implicit-def: $vgpr38_vgpr39
                                        ; implicit-def: $vgpr40_vgpr41
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s2
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]|
	v_mov_b32_e32 v70, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v39, v56, v37, vcc_lo
	v_cndmask_b32_e32 v38, v24, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[34:35], v[38:39]
	v_mul_f64 v[42:43], v[32:33], v[38:39]
	v_fma_f64 v[44:45], v[34:35], v[38:39], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[68:69], v[32:33], v[38:39], -v[42:43]
	v_add_f64 v[57:58], v[42:43], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[57:58], -v[42:43]
	v_add_f64 v[64:65], v[40:41], v[57:58]
	v_add_f64 v[62:63], v[57:58], -v[60:61]
	v_add_f64 v[44:45], v[44:45], -v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[60:61], v[64:65], -2
	v_add_f64 v[40:41], v[64:65], -v[40:41]
	v_add_f64 v[42:43], v[42:43], -v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[60:61]|
	v_add_f64 v[40:41], v[57:58], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[44:45], v[42:43]
	v_fract_f64_e32 v[44:45], v[60:61]
	v_dual_cndmask_b32 v45, 0, v45 :: v_dual_cndmask_b32 v44, 0, v44
	v_mul_f64 v[66:67], v[30:31], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[44:45], v[44:45], 2
	v_add_f64 v[62:63], v[66:67], v[68:69]
	v_fma_f64 v[38:39], v[30:31], v[38:39], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[57:58], v[62:63], v[42:43]
	v_add_f64 v[60:61], v[40:41], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[60:61], v[44:45]
	v_add_f64 v[40:41], v[60:61], -v[40:41]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[64:65]
	v_add_f64 v[64:65], v[62:63], -v[66:67]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[57:58], -v[40:41]
	v_cndmask_b32_e64 v71, 0, 0x40100000, vcc_lo
	v_add_f64 v[75:76], v[62:63], -v[64:65]
	v_add_f64 v[64:65], v[68:69], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[44:45], v[70:71]
	v_add_f64 v[71:72], v[57:58], -v[62:63]
	v_add_f64 v[68:69], v[66:67], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[73:74], v[60:61], v[44:45]
	v_add_f64 v[77:78], v[57:58], -v[71:72]
	v_add_f64 v[42:43], v[42:43], -v[71:72]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[64:65], v[64:65], v[68:69]
	v_cvt_i32_f64_e32 v73, v[73:74]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], -v[77:78]
	v_cvt_f64_i32_e32 v[71:72], v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[62:63]
	v_add_f64 v[44:45], v[44:45], -v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[64:65], v[42:43]
	v_add_f64 v[62:63], v[60:61], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], v[42:43]
	v_add_f64 v[42:43], v[62:63], -v[44:45]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[40:41], v[38:39]
	v_add_f64 v[40:41], v[60:61], -v[42:43]
	v_cndmask_b32_e64 v71, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v57, s2, 0, v73, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[38:39], v[40:41]
	v_add_f64 v[40:41], v[62:63], -v[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[40:41], v[38:39]
	v_mul_f64 v[44:45], v[42:43], s[8:9]
	v_add_f64 v[40:41], v[42:43], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[42:43], s[8:9], -v[44:45]
	v_add_f64 v[38:39], v[38:39], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[42:43], s[10:11], v[60:61]
	v_fma_f64 v[40:41], v[38:39], s[8:9], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[44:45], v[40:41]
	v_add_f64 v[42:43], v[38:39], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[40:41], v[40:41], -v[42:43]
.LBB0_16:                               ; %Flow188
	s_and_not1_saveexec_b32 s2, s7
	s_cbranch_execz .LBB0_18
; %bb.17:
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[38:39], |v[24:25]|, s[8:9]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[42:43], v[38:39]
	v_fma_f64 v[38:39], v[42:43], s[8:9], |v[24:25]|
	v_mul_f64 v[40:41], v[42:43], s[10:11]
	s_mov_b32 s8, 0x252049c0
	s_mov_b32 s9, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[42:43], s[10:11], v[38:39]
	v_add_f64 v[44:45], v[38:39], v[40:41]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[38:39], -v[44:45]
	v_add_f64 v[44:45], v[44:45], -v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], v[40:41]
	v_fma_f64 v[40:41], v[42:43], s[10:11], v[40:41]
	v_add_f64 v[38:39], v[44:45], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[38:39], -v[40:41]
	v_fma_f64 v[40:41], v[42:43], s[8:9], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[57:58], v[40:41]
	v_add_f64 v[44:45], v[38:39], -v[57:58]
	v_cvt_i32_f64_e32 v57, v[42:43]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], -v[44:45]
.LBB0_18:                               ; %_ZL3cosd.exit133
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr58
                                        ; implicit-def: $vgpr42_vgpr43
                                        ; implicit-def: $vgpr44_vgpr45
	s_and_saveexec_b32 s2, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s2
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[20:21]|
	v_mov_b32_e32 v68, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_dual_cndmask_b32 v43, v59, v53 :: v_dual_cndmask_b32 v42, v20, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[44:45], v[50:51], v[42:43]
	v_mul_f64 v[52:53], v[48:49], v[42:43]
	v_mul_f64 v[66:67], v[46:47], v[42:43]
	v_fma_f64 v[50:51], v[50:51], v[42:43], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[48:49], v[48:49], v[42:43], -v[52:53]
	v_fma_f64 v[42:43], v[46:47], v[42:43], -v[66:67]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[52:53], v[50:51]
	v_add_f64 v[60:61], v[58:59], -v[52:53]
	v_add_f64 v[64:65], v[44:45], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[62:63], v[58:59], -v[60:61]
	v_add_f64 v[50:51], v[50:51], -v[60:61]
	v_ldexp_f64 v[60:61], v[64:65], -2
	v_add_f64 v[44:45], v[64:65], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], -v[62:63]
	v_add_f64 v[62:63], v[66:67], v[48:49]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[60:61]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[58:59], -v[44:45]
	v_add_f64 v[50:51], v[50:51], v[52:53]
	v_fract_f64_e32 v[52:53], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[62:63], v[50:51]
	v_dual_cndmask_b32 v53, 0, v53 :: v_dual_cndmask_b32 v52, 0, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[52:53], v[52:53], 2
	v_add_f64 v[60:61], v[44:45], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[60:61], v[52:53]
	v_add_f64 v[44:45], v[60:61], -v[44:45]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[64:65]
	v_add_f64 v[64:65], v[62:63], -v[66:67]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[58:59], -v[44:45]
	v_cndmask_b32_e64 v69, 0, 0x40100000, vcc_lo
	v_add_f64 v[73:74], v[62:63], -v[64:65]
	v_add_f64 v[48:49], v[48:49], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], v[68:69]
	v_add_f64 v[69:70], v[58:59], -v[62:63]
	v_add_f64 v[64:65], v[66:67], -v[73:74]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[71:72], v[60:61], v[52:53]
	v_add_f64 v[75:76], v[58:59], -v[69:70]
	v_add_f64 v[50:51], v[50:51], -v[69:70]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[48:49], v[64:65]
	v_cvt_i32_f64_e32 v71, v[71:72]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], -v[75:76]
	v_cvt_f64_i32_e32 v[69:70], v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[62:63]
	v_add_f64 v[52:53], v[52:53], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[48:49], v[50:51]
	v_add_f64 v[48:49], v[60:61], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[46:47]
	v_add_f64 v[46:47], v[48:49], -v[52:53]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[44:45], v[42:43]
	v_add_f64 v[44:45], v[60:61], -v[46:47]
	v_cndmask_b32_e64 v69, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v58, s2, 0, v71, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_add_f64 v[44:45], v[48:49], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[44:45], v[42:43]
	v_mul_f64 v[48:49], v[46:47], s[8:9]
	v_add_f64 v[44:45], v[46:47], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[50:51], v[46:47], s[8:9], -v[48:49]
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[46:47], s[10:11], v[50:51]
	v_fma_f64 v[44:45], v[42:43], s[8:9], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[48:49], v[44:45]
	v_add_f64 v[46:47], v[42:43], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], -v[46:47]
.LBB0_20:                               ; %Flow187
	s_and_not1_saveexec_b32 s2, s6
	s_cbranch_execz .LBB0_22
; %bb.21:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[42:43], |v[20:21]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[46:47], v[42:43]
	v_fma_f64 v[42:43], v[46:47], s[6:7], |v[20:21]|
	v_mul_f64 v[44:45], v[46:47], s[8:9]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	v_cvt_i32_f64_e32 v58, v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[50:51], v[46:47], s[8:9], v[42:43]
	v_add_f64 v[48:49], v[42:43], v[44:45]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], -v[48:49]
	v_add_f64 v[48:49], v[48:49], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_fma_f64 v[44:45], v[46:47], s[8:9], v[44:45]
	v_add_f64 v[42:43], v[48:49], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	v_fma_f64 v[44:45], v[46:47], s[6:7], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[50:51], v[44:45]
	v_add_f64 v[48:49], v[42:43], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], -v[48:49]
.LBB0_22:                               ; %_ZL3sind.exit
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr60
                                        ; implicit-def: $vgpr50_vgpr51
                                        ; implicit-def: $vgpr52_vgpr53
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s2
	s_cbranch_execz .LBB0_24
; %bb.23:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]|
	v_mov_b32_e32 v71, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	v_cndmask_b32_e32 v47, v56, v37, vcc_lo
	v_cndmask_b32_e32 v46, v24, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[48:49], v[34:35], v[46:47]
	v_mul_f64 v[50:51], v[32:33], v[46:47]
	v_fma_f64 v[52:53], v[34:35], v[46:47], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[69:70], v[32:33], v[46:47], -v[50:51]
	v_add_f64 v[59:60], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[61:62], v[59:60], -v[50:51]
	v_add_f64 v[65:66], v[48:49], v[59:60]
	v_add_f64 v[63:64], v[59:60], -v[61:62]
	v_add_f64 v[52:53], v[52:53], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[61:62], v[65:66], -2
	v_add_f64 v[48:49], v[65:66], -v[48:49]
	v_add_f64 v[50:51], v[50:51], -v[63:64]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[61:62]|
	v_add_f64 v[48:49], v[59:60], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[52:53], v[50:51]
	v_fract_f64_e32 v[52:53], v[61:62]
	v_dual_cndmask_b32 v53, 0, v53 :: v_dual_cndmask_b32 v52, 0, v52
	v_mul_f64 v[67:68], v[30:31], v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[52:53], v[52:53], 2
	v_add_f64 v[63:64], v[67:68], v[69:70]
	v_fma_f64 v[46:47], v[30:31], v[46:47], -v[67:68]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[59:60], v[63:64], v[50:51]
	v_add_f64 v[61:62], v[48:49], v[59:60]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[65:66], v[61:62], v[52:53]
	v_add_f64 v[48:49], v[61:62], -v[48:49]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[65:66]
	v_add_f64 v[65:66], v[63:64], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[59:60], -v[48:49]
	v_cndmask_b32_e64 v72, 0, 0x40100000, vcc_lo
	v_add_f64 v[76:77], v[63:64], -v[65:66]
	v_add_f64 v[65:66], v[69:70], -v[65:66]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[52:53], v[52:53], v[71:72]
	v_add_f64 v[72:73], v[59:60], -v[63:64]
	v_add_f64 v[69:70], v[67:68], -v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[61:62], v[52:53]
	v_add_f64 v[78:79], v[59:60], -v[72:73]
	v_add_f64 v[50:51], v[50:51], -v[72:73]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[65:66], v[65:66], v[69:70]
	v_cvt_i32_f64_e32 v74, v[74:75]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[63:64], v[63:64], -v[78:79]
	v_cvt_f64_i32_e32 v[72:73], v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[63:64]
	v_add_f64 v[52:53], v[52:53], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[65:66], v[50:51]
	v_add_f64 v[63:64], v[61:62], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[46:47], v[50:51]
	v_add_f64 v[50:51], v[63:64], -v[52:53]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[63:64]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[46:47], v[48:49], v[46:47]
	v_add_f64 v[48:49], v[61:62], -v[50:51]
	v_cndmask_b32_e64 v72, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v60, s2, 0, v74, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[46:47], v[46:47], v[48:49]
	v_add_f64 v[48:49], v[63:64], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[48:49], v[46:47]
	v_mul_f64 v[52:53], v[50:51], s[8:9]
	v_add_f64 v[48:49], v[50:51], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], v[50:51], s[8:9], -v[52:53]
	v_add_f64 v[46:47], v[46:47], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[50:51], s[10:11], v[61:62]
	v_fma_f64 v[46:47], v[46:47], s[8:9], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[52:53], v[46:47]
	v_add_f64 v[48:49], v[50:51], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[46:47], -v[48:49]
.LBB0_24:                               ; %Flow185
	s_and_not1_saveexec_b32 s2, s6
	s_cbranch_execz .LBB0_26
; %bb.25:
	s_mov_b32 s6, 0x6dc9c883
	s_mov_b32 s7, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[46:47], |v[24:25]|, s[6:7]
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[46:47], v[46:47]
	v_fma_f64 v[48:49], v[46:47], s[6:7], |v[24:25]|
	v_mul_f64 v[50:51], v[46:47], s[8:9]
	s_mov_b32 s6, 0x252049c0
	s_mov_b32 s7, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[59:60], v[46:47], s[8:9], v[48:49]
	v_add_f64 v[52:53], v[48:49], v[50:51]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], -v[52:53]
	v_add_f64 v[52:53], v[52:53], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[48:49], v[50:51]
	v_fma_f64 v[50:51], v[46:47], s[8:9], v[50:51]
	v_add_f64 v[48:49], v[52:53], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], -v[50:51]
	v_fma_f64 v[48:49], v[46:47], s[6:7], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[59:60], v[48:49]
	v_add_f64 v[52:53], v[50:51], -v[59:60]
	v_cvt_i32_f64_e32 v60, v[46:47]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[52:53], v[48:49], -v[52:53]
.LBB0_26:                               ; %_ZL3cosd.exit142
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr59
                                        ; implicit-def: $vgpr46_vgpr47
                                        ; implicit-def: $vgpr48_vgpr49
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB0_28
; %bb.27:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[24:25]|
	v_mov_b32_e32 v71, 0
	s_mov_b32 s6, 0x54442d18
	s_mov_b32 s7, 0x3ff921fb
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s9, 0x3c91a626
	v_cndmask_b32_e32 v37, v56, v37, vcc_lo
	v_cndmask_b32_e32 v36, v24, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[46:47], v[34:35], v[36:37]
	v_mul_f64 v[48:49], v[32:33], v[36:37]
	v_fma_f64 v[34:35], v[34:35], v[36:37], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[32:33], v[36:37], -v[48:49]
	v_add_f64 v[61:62], v[48:49], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[63:64], v[61:62], -v[48:49]
	v_add_f64 v[67:68], v[46:47], v[61:62]
	v_add_f64 v[65:66], v[61:62], -v[63:64]
	v_add_f64 v[34:35], v[34:35], -v[63:64]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[63:64], v[67:68], -2
	v_add_f64 v[46:47], v[67:68], -v[46:47]
	v_add_f64 v[48:49], v[48:49], -v[65:66]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[63:64]|
	v_add_f64 v[46:47], v[61:62], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], v[48:49]
	v_fract_f64_e32 v[48:49], v[63:64]
	v_dual_cndmask_b32 v49, 0, v49 :: v_dual_cndmask_b32 v48, 0, v48
	v_mul_f64 v[69:70], v[30:31], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[48:49], v[48:49], 2
	v_add_f64 v[65:66], v[69:70], v[32:33]
	v_fma_f64 v[30:31], v[30:31], v[36:37], -v[69:70]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[61:62], v[65:66], v[34:35]
	v_add_f64 v[63:64], v[46:47], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[67:68], v[63:64], v[48:49]
	v_add_f64 v[36:37], v[63:64], -v[46:47]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[67:68]
	v_add_f64 v[67:68], v[65:66], -v[69:70]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[61:62], -v[36:37]
	v_cndmask_b32_e64 v72, 0, 0x40100000, vcc_lo
	v_add_f64 v[76:77], v[65:66], -v[67:68]
	v_add_f64 v[32:33], v[32:33], -v[67:68]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[48:49], v[71:72]
	v_add_f64 v[72:73], v[61:62], -v[65:66]
	v_add_f64 v[67:68], v[69:70], -v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[74:75], v[63:64], v[48:49]
	v_add_f64 v[78:79], v[61:62], -v[72:73]
	v_add_f64 v[34:35], v[34:35], -v[72:73]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], v[67:68]
	v_cvt_i32_f64_e32 v56, v[74:75]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[65:66], v[65:66], -v[78:79]
	v_cvt_f64_i32_e32 v[72:73], v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[65:66]
	v_add_f64 v[48:49], v[48:49], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], v[34:35]
	v_add_f64 v[34:35], v[63:64], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[32:33]
	v_add_f64 v[32:33], v[34:35], -v[48:49]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[36:37], v[30:31]
	v_add_f64 v[32:33], v[63:64], -v[32:33]
	v_cndmask_b32_e64 v72, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v59, s2, 0, v56, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], v[32:33]
	v_add_f64 v[32:33], v[34:35], -v[71:72]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[32:33], v[30:31]
	v_mul_f64 v[36:37], v[34:35], s[6:7]
	v_add_f64 v[32:33], v[34:35], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[46:47], v[34:35], s[6:7], -v[36:37]
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[34:35], s[8:9], v[46:47]
	v_fma_f64 v[30:31], v[30:31], s[6:7], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[36:37], v[30:31]
	v_add_f64 v[32:33], v[46:47], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[48:49], v[30:31], -v[32:33]
.LBB0_28:                               ; %Flow
	s_or_saveexec_b32 s6, s3
	s_load_b64 s[2:3], s[4:5], 0x0
	s_xor_b32 exec_lo, exec_lo, s6
	s_cbranch_execz .LBB0_30
; %bb.29:
	s_mov_b32 s4, 0x6dc9c883
	s_mov_b32 s5, 0x3fe45f30
	s_mov_b32 s9, 0xbc91a626
	v_mul_f64 v[30:31], |v[24:25]|, s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s8, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[30:31], v[30:31]
	v_fma_f64 v[32:33], v[30:31], s[4:5], |v[24:25]|
	v_mul_f64 v[34:35], v[30:31], s[8:9]
	s_mov_b32 s4, 0x252049c0
	s_mov_b32 s5, 0xb97b839a
	v_cvt_i32_f64_e32 v59, v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[48:49], v[30:31], s[8:9], v[32:33]
	v_add_f64 v[36:37], v[32:33], v[34:35]
	s_mov_b32 s9, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[32:33], -v[36:37]
	v_add_f64 v[36:37], v[36:37], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], v[34:35]
	v_fma_f64 v[34:35], v[30:31], s[8:9], v[34:35]
	v_add_f64 v[32:33], v[36:37], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	v_fma_f64 v[32:33], v[30:31], s[4:5], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[48:49], v[32:33]
	v_add_f64 v[34:35], v[46:47], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[48:49], v[32:33], -v[34:35]
.LBB0_30:                               ; %_ZL3cosd.exit147
	s_or_b32 exec_lo, exec_lo, s6
	v_mul_f64 v[32:33], v[50:51], v[50:51]
	s_mov_b32 s8, 0x9037ab78
	s_mov_b32 s10, 0x46cc5e42
	s_mov_b32 s9, 0x3e21eeb6
	s_mov_b32 s11, 0xbda907db
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[30:31], s[2:3], s[12:13]
	s_mov_b32 s12, 0xa17f65f6
	s_mov_b32 s13, 0xbe927e4f
	v_mul_f64 v[26:27], v[26:27], s[14:15]
	s_mov_b32 s14, 0x19f4ec90
	s_mov_b32 s15, 0x3efa01a0
	s_mov_b32 s16, 0x16c16967
	s_mov_b32 s17, 0xbf56c16c
	s_mov_b32 s18, 0x55555555
	s_mov_b32 s19, 0x3fa55555
	s_mov_b32 s22, 0xb42fdfa7
	s_mov_b32 s24, 0xf9a43bb8
	s_mov_b32 s23, 0xbe5ae600
	s_mov_b32 s25, 0x3de5e0b2
	s_mov_b32 s26, 0x796cde01
	s_mov_b32 s27, 0x3ec71de3
	s_mov_b32 s28, 0x19e83e5c
	s_mov_b32 s29, 0xbf2a01a0
	s_mov_b32 s30, 0x11110bb3
	s_mov_b32 s31, 0x3f811111
	s_mov_b32 s21, 0xbfc55555
	s_mov_b32 s20, s18
	v_cmp_class_f64_e64 vcc_lo, v[24:25], 0x1f8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f64 v[34:35], v[32:33], 0.5
	v_fma_f64 v[63:64], v[32:33], s[10:11], s[8:9]
	v_mul_f64 v[16:17], v[30:31], v[16:17]
	v_mul_f64 v[26:27], v[30:31], v[26:27]
	v_add_f64 v[36:37], -v[34:35], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[63:64], v[32:33], v[63:64], s[12:13]
	v_mul_f64 v[24:25], v[30:31], v[26:27]
	v_mul_f64 v[26:27], v[16:17], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[61:62], -v[36:37], 1.0
	v_fma_f64 v[63:64], v[32:33], v[63:64], s[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[61:62], -v[34:35]
	v_fma_f64 v[63:64], v[32:33], v[63:64], s[16:17]
	v_mul_f64 v[61:62], v[32:33], v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[50:51], -v[52:53], v[34:35]
	v_fma_f64 v[63:64], v[32:33], v[63:64], s[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[61:62], v[63:64], v[34:35]
	v_mul_f64 v[61:62], v[50:51], -v[32:33]
	v_mul_f64 v[63:64], v[52:53], 0.5
	v_add_f64 v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[36:37], v[32:33], s[24:25], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[26:27]
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[30:31]
	v_fma_f64 v[36:37], v[61:62], v[36:37], v[63:64]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[32:33], v[36:37], -v[52:53]
	v_and_b32_e32 v36, 1, v60
	v_cmp_eq_u32_e64 s2, 0, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[61:62], s[20:21], v[32:33]
	v_add_f64 v[32:33], v[50:51], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v33, 0x80000000, v33
	v_cndmask_b32_e64 v32, v32, v34, s2
	v_lshlrev_b32_e32 v34, 30, v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v33, v33, v35, s2
	v_cndmask_b32_e32 v32, 0, v32, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v34, 0x80000000, v34
	v_xor_b32_e32 v33, v33, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v33, 0x7ff80000, v33, vcc_lo
	v_mul_f64 v[24:25], v[24:25], v[32:33]
	v_mul_f64 v[32:33], v[38:39], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[34:35], v[32:33], 0.5
	v_fma_f64 v[52:53], v[32:33], s[10:11], s[8:9]
	v_add_f64 v[36:37], -v[34:35], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[52:53], v[32:33], v[52:53], s[12:13]
	v_add_f64 v[50:51], -v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[52:53], v[32:33], v[52:53], s[14:15]
	v_add_f64 v[34:35], v[50:51], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[52:53], v[32:33], v[52:53], s[16:17]
	v_mul_f64 v[50:51], v[32:33], v[32:33]
	v_fma_f64 v[34:35], v[38:39], -v[40:41], v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[32:33], v[52:53], s[18:19]
	v_fma_f64 v[34:35], v[50:51], v[52:53], v[34:35]
	v_mul_f64 v[50:51], v[38:39], -v[32:33]
	v_mul_f64 v[52:53], v[40:41], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[36:37], v[34:35]
	v_fma_f64 v[36:37], v[32:33], s[24:25], s[22:23]
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[28:29]
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[50:51], v[36:37], v[52:53]
	v_fma_f64 v[32:33], v[32:33], v[36:37], -v[40:41]
	v_and_b32_e32 v36, 1, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e64 s2, 0, v36
	v_fma_f64 v[32:33], v[50:51], s[20:21], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[38:39], -v[32:33]
	v_xor_b32_e32 v33, 0x80000000, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v32, v32, v34, s2
	v_lshlrev_b32_e32 v34, 30, v57
	v_cndmask_b32_e64 v33, v33, v35, s2
	v_cmp_class_f64_e64 s2, v[20:21], 0x1f8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_and_b32_e32 v34, 0x80000000, v34
	v_and_b32_e32 v20, 1, v58
	v_cndmask_b32_e32 v32, 0, v32, vcc_lo
	v_xor_b32_e32 v33, v33, v34
	v_mul_f64 v[34:35], v[30:31], v[4:5]
	v_mul_f64 v[30:31], v[30:31], v[6:7]
	v_mul_f64 v[6:7], v[42:43], v[42:43]
	v_cmp_eq_u32_e64 s3, 0, v20
	v_dual_cndmask_b32 v33, 0x7ff80000, v33 :: v_dual_lshlrev_b32 v20, 30, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v20, v20, v21
	v_mul_f64 v[32:33], v[26:27], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_and_b32_e32 v20, 0x80000000, v20
	v_mul_f64 v[4:5], v[34:35], v[2:3]
	v_mul_f64 v[36:37], v[6:7], 0.5
	v_fma_f64 v[50:51], v[6:7], s[10:11], s[8:9]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[16:17], v[28:29], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], -v[36:37], 1.0
	v_fma_f64 v[50:51], v[6:7], v[50:51], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], -v[38:39], 1.0
	v_fma_f64 v[50:51], v[6:7], v[50:51], s[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[40:41], -v[36:37]
	v_fma_f64 v[50:51], v[6:7], v[50:51], s[16:17]
	v_mul_f64 v[40:41], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[42:43], -v[44:45], v[36:37]
	v_fma_f64 v[50:51], v[6:7], v[50:51], s[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[40:41], v[50:51], v[36:37]
	v_mul_f64 v[40:41], v[42:43], -v[6:7]
	v_mul_f64 v[50:51], v[44:45], 0.5
	v_add_f64 v[36:37], v[38:39], v[36:37]
	v_fma_f64 v[38:39], v[6:7], s[24:25], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[6:7], v[38:39], s[26:27]
	v_fma_f64 v[38:39], v[6:7], v[38:39], s[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[6:7], v[38:39], s[30:31]
	v_fma_f64 v[38:39], v[40:41], v[38:39], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[38:39], -v[44:45]
	v_fma_f64 v[6:7], v[40:41], s[20:21], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[42:43], -v[6:7]
	v_cndmask_b32_e64 v7, v37, v7, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v36, v6, s3
	v_xor_b32_e32 v7, v7, v20
	v_mul_f64 v[20:21], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, 0, v6, s2
	v_cndmask_b32_e64 v7, 0x7ff80000, v7, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], -v[32:33], v[6:7], v[4:5]
	v_mul_f64 v[6:7], v[30:31], v[28:29]
	v_mul_f64 v[28:29], v[20:21], 0.5
	v_fma_f64 v[36:37], v[20:21], s[10:11], s[8:9]
	v_fma_f64 v[6:7], v[34:35], v[0:1], -v[6:7]
	v_mul_f64 v[0:1], v[16:17], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], -v[28:29], 1.0
	v_fma_f64 v[36:37], v[20:21], v[36:37], s[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[0:1], v[30:31], v[2:3], -v[0:1]
	v_mul_f64 v[2:3], v[18:19], v[18:19]
	v_add_f64 v[34:35], -v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[20:21], v[36:37], s[14:15]
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[20:21], v[36:37], s[16:17]
	v_mul_f64 v[34:35], v[20:21], v[20:21]
	v_fma_f64 v[28:29], v[12:13], -v[14:15], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[20:21], v[36:37], s[18:19]
	v_fma_f64 v[28:29], v[34:35], v[36:37], v[28:29]
	v_mul_f64 v[34:35], v[12:13], -v[20:21]
	v_mul_f64 v[36:37], v[14:15], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[32:33], v[28:29]
	v_fma_f64 v[32:33], v[20:21], s[24:25], s[22:23]
	v_fma_f64 v[32:33], v[20:21], v[32:33], s[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[20:21], v[32:33], s[28:29]
	v_fma_f64 v[32:33], v[20:21], v[32:33], s[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[34:35], v[32:33], v[36:37]
	v_fma_f64 v[14:15], v[20:21], v[32:33], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[34:35], s[20:21], v[14:15]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_and_b32_e32 v14, 1, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s3, 0, v14
	v_lshlrev_b32_e32 v14, 30, v54
	v_and_b32_e32 v14, 0x80000000, v14
	v_xor_b32_e32 v13, 0x80000000, v13
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v12, v12, v28, s3
	v_cndmask_b32_e64 v13, v13, v29, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, 0, v12, vcc_lo
	v_xor_b32_e32 v13, v13, v14
	v_mul_f64 v[14:15], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v13, 0x7ff80000, v13, vcc_lo
	v_mul_f64 v[12:13], v[26:27], v[12:13]
	v_fma_f64 v[26:27], v[2:3], s[10:11], s[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], -v[14:15], 1.0
	v_fma_f64 v[26:27], v[2:3], v[26:27], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], -v[16:17], 1.0
	v_fma_f64 v[26:27], v[2:3], v[26:27], s[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[2:3], v[2:3]
	v_fma_f64 v[26:27], v[2:3], v[26:27], s[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[18:19], -v[22:23], v[14:15]
	v_fma_f64 v[26:27], v[2:3], v[26:27], s[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[20:21], v[26:27], v[14:15]
	v_mul_f64 v[20:21], v[18:19], -v[2:3]
	v_mul_f64 v[26:27], v[22:23], 0.5
	v_add_f64 v[14:15], v[16:17], v[14:15]
	v_fma_f64 v[16:17], v[2:3], s[24:25], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[2:3], v[16:17], s[26:27]
	v_fma_f64 v[16:17], v[2:3], v[16:17], s[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[2:3], v[16:17], s[30:31]
	v_fma_f64 v[16:17], v[20:21], v[16:17], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[16:17], -v[22:23]
	v_and_b32_e32 v16, 1, v55
	v_cmp_eq_u32_e64 s3, 0, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[20:21], s[20:21], v[2:3]
	v_add_f64 v[2:3], v[18:19], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, 0x80000000, v3
	v_cndmask_b32_e64 v2, v2, v14, s3
	v_lshlrev_b32_e32 v14, 30, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v15, s3
	v_cndmask_b32_e64 v2, 0, v2, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, 0x80000000, v14
	v_xor_b32_e32 v3, v3, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_fma_f64 v[0:1], -v[12:13], v[2:3], v[0:1]
	v_mul_f64 v[2:3], v[46:47], v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], v[8:9], v[0:1]
	v_mul_f64 v[12:13], v[2:3], 0.5
	v_fma_f64 v[18:19], v[2:3], s[10:11], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], -v[12:13], 1.0
	v_fma_f64 v[18:19], v[2:3], v[18:19], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], -v[14:15], 1.0
	v_fma_f64 v[18:19], v[2:3], v[18:19], s[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[12:13]
	v_fma_f64 v[18:19], v[2:3], v[18:19], s[16:17]
	v_mul_f64 v[16:17], v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[46:47], -v[48:49], v[12:13]
	v_fma_f64 v[18:19], v[2:3], v[18:19], s[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[16:17], v[18:19], v[12:13]
	v_mul_f64 v[16:17], v[46:47], -v[2:3]
	v_mul_f64 v[18:19], v[48:49], 0.5
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_fma_f64 v[14:15], v[2:3], s[24:25], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[2:3], v[14:15], s[26:27]
	v_fma_f64 v[14:15], v[2:3], v[14:15], s[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[2:3], v[14:15], s[30:31]
	v_fma_f64 v[14:15], v[16:17], v[14:15], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[14:15], -v[48:49]
	v_and_b32_e32 v14, 1, v59
	v_cmp_eq_u32_e64 s0, 0, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[16:17], s[20:21], v[2:3]
	v_add_f64 v[2:3], v[46:47], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, 0x80000000, v3
	v_cndmask_b32_e64 v2, v2, v12, s0
	v_lshlrev_b32_e32 v12, 30, v59
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v13, s0
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v12, 0x80000000, v12
	v_xor_b32_e32 v3, v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	v_fma_f64 v[2:3], v[24:25], v[2:3], v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v11, vcc_lo
	global_store_b64 v[6:7], v[0:1], off
	v_mul_f64 v[0:1], v[8:9], v[4:5]
	v_add_co_u32 v4, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v11, vcc_lo
	global_store_b64 v[4:5], v[0:1], off
	v_mul_f64 v[0:1], v[8:9], v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_31:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 384
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 80
		.amdhsa_next_free_sgpr 48
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib, .Lfunc_end0-_Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 13192
; NumSgprs: 50
; NumVgprs: 80
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 9
; NumSGPRsForWavesPerEU: 50
; NumVGPRsForWavesPerEU: 80
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .offset:         120
        .size:           4
        .value_kind:     by_value
      - .offset:         124
        .size:           1
        .value_kind:     by_value
      - .offset:         128
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         132
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         140
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         142
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         144
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         146
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         148
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         150
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         192
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 384
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib
    .private_segment_fixed_size: 0
    .sgpr_count:     50
    .sgpr_spill_count: 0
    .symbol:         _Z10CalcAngMomPdS_S_S_S_S_S_S_ddS_S_S_S_S_ib.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     80
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
