#include <stdio.h>
#include <stdlib.h>
#include <string>
#include <math.h>
#include <assert.h>

#include <iostream>
#include <iomanip>
#include <fstream>

#include <unistd.h>



#include <cuda.h>
#include <cuda_runtime_api.h>
//#include "cutil.h"
using namespace std;

//////////////////////////////////////////////////////////////////////////  
//this version calculates the aperture mass at the galaxy positions. 
////////////////////////////////////////////////////////////////////////// 





void checkCUDAerror(const char *msg);

int checkDeviceSpecs(int number_of_galaxies, int grid_size);


/////////////////////////////////////////////////////////////////////
//   The kernel: calculates the aperture mass, noise and SNR
/////////////////////////////////////////////////////////////////////

__global__ void mApKernel(float* rgamma1, float* rgamma2, float* ra, float* dec, float* mAp_rgamma, float* var_rgamma, float* SN_rgamma,  int tot_gals, float theta_max, int grid_size, float ra_pixsize, float dec_pixsize, float min_ra, float min_dec)
{
  int idx = blockDim.x * blockIdx.x + threadIdx.x;
   
  // need to have the grid coordinates in arcminutes. 
float tempra = idx/grid_size;
float tempdec = idx - grid_size*tempra;
  float this_ra = min_ra + tempra*ra_pixsize;
  float this_dec = min_dec + tempdec*dec_pixsize;
  
  // want to include any tails outside the halo radius to which our filter is tuned......
  int kernel_radius = 1.5*theta_max;
  float ang = 0.0;
  float xc = 0.15; // a constant of the calculation. 
  float x = 0, Q = 0;
  
  float rgammaMap = 0;
  float rgammaVar=0;
  float radiff, decdiff, dist;

  float npoints = 0;

  for(int i=0; i<tot_gals; i++){

    radiff = (float)this_ra-ra[i]; 
    if(abs(radiff)>kernel_radius) continue;
    decdiff=(float)this_dec-dec[i];
    if(abs(decdiff)>kernel_radius || (radiff==0 && decdiff==0)) continue;
    
    dist = sqrtf(radiff*radiff + decdiff*decdiff);
    if(abs(dist)>kernel_radius) continue;
    
    // have to do something a bit complicated for the angle - make sure it's getting the correct range.
    if(radiff==0 && decdiff>0) ang = M_PI/2.0;
    else if(radiff==0 && decdiff<0) ang = -1.0 * M_PI/2.0;
    else if(radiff>0) ang = atanf(decdiff/radiff);
    else if(radiff<0 && decdiff>0) ang = atanf(decdiff/radiff) + M_PI;
    else if(radiff<0 and decdiff<0) ang = atanf(decdiff/radiff)-M_PI;
    
    x = dist / theta_max;
    Q = (1.0 / (1.0 + exp(6.0 - 150.0*x) + exp(-47.0 + 50.0*x))) * (tanh(x/xc) / (x/xc));
    
    rgammaMap+= Q* (-1* (rgamma1[i]*cos(2*ang) + rgamma2[i]*sin(2*ang) ));
    rgammaVar+= Q*Q* (rgamma1[i]*rgamma1[i] + rgamma2[i]*rgamma2[i]);
    
    
     npoints++;

}
  
  // the outputs from this calculation:
  
  mAp_rgamma[idx] = rgammaMap/npoints;// got to normalise by the # gals I did the sum over. 
  var_rgamma[idx] = rgammaVar /(2.0*npoints*npoints); 
  SN_rgamma[idx] = sqrtf(2) * rgammaMap / sqrtf(rgammaVar);
}




////////////////////////////////////////////////////////////////
// setting up the aperture mass calculation
//////////////////////////////////////////////////////////////

int main(int argc, char **argv){
  

  char* input_filename; char* output_filename;
  int number_of_galaxies, grid_size; 
  float filter_rad, min_ra, max_ra, min_dec, max_dec;
  if (argc>1)
    {
      input_filename = argv[1];
      output_filename = argv[2];
      number_of_galaxies = atoi(argv[3]);
      filter_rad = atof(argv[4]);
      grid_size = atoi(argv[5]);
      min_ra = atof(argv[6]);
      max_ra = atof(argv[7]);
      min_dec = atof(argv[8]);
      max_dec = atof(argv[9]);
    }


  int ncalc = grid_size*grid_size;
     
  float ra_pixsize = (max_ra - min_ra)/float(grid_size);
  float dec_pixsize = (max_dec - min_dec)/float(grid_size);

  // CPU memory
  size_t sizeneeded = number_of_galaxies*sizeof(float);
  float *h_rgamma1 = 0;
  float *h_rgamma2 = 0;
  float *h_ra = 0;
  float *h_dec = 0;
  h_rgamma1 = (float*) malloc(sizeneeded);
  h_rgamma2 = (float*) malloc(sizeneeded);
  h_ra = (float*) malloc(sizeneeded);
  h_dec = (float*) malloc(sizeneeded);
  

  ifstream infile;
  infile.open(input_filename);
  
  int i=0;
  float x, y, g1, g2;
  while(1)
    {
      infile>>x>>y>>g1>>g2;
      h_ra[i] = x;
      h_dec[i] = y;
      h_rgamma1[i] = g1;
      h_rgamma2[i] = g2;   
      i += 1;
      if(!infile.good()) break;       

    }
             
    
  // check whether the device has the capacity to do this calculation. 
  // this is taken from the SDK function deviceQuery	
  int max_threads = checkDeviceSpecs(number_of_galaxies, ncalc);

  
  /// first, I need to test whether the device is busy. If so, it can wait a little while.
    while(1){
      size_t testsize = 1*sizeof(float); 
      float *d_test;
      cudaMalloc(&d_test, testsize);
      cudaError_t err = cudaGetLastError();
      if( cudaSuccess != err){
	printf("gotta wait for a bit!: %s\n",  cudaGetErrorString( err) );
	sleep(10);
      }
      else break;
    }
    
    
    // GPU memory for input 
    float *d_rgamma1, *d_rgamma2, *d_ra, *d_dec;
    cudaMalloc(&d_rgamma1, sizeneeded);
    cudaMalloc(&d_rgamma2, sizeneeded);
    cudaMalloc(&d_ra, sizeneeded);
    cudaMalloc(&d_dec, sizeneeded);
    
    // set up vectors for host and device for output. 
    size_t sizeneeded_out = ncalc*sizeof(float);
    float *h_mAp_rgamma,*d_mAp_rgamma, *h_var_rgamma, *d_var_rgamma, *h_SN_rgamma, *d_SN_rgamma;
    
    h_mAp_rgamma = (float*)malloc(sizeneeded_out);
    cudaMalloc(&d_mAp_rgamma, sizeneeded_out);
    h_var_rgamma = (float*)malloc(sizeneeded_out);
    cudaMalloc(&d_var_rgamma, sizeneeded_out);
    h_SN_rgamma = (float*)malloc(sizeneeded_out);
    cudaMalloc(&d_SN_rgamma, sizeneeded_out);
    
    
    //copy vectors from host to device memory
    cudaMemcpy(d_rgamma1, h_rgamma1, sizeneeded, cudaMemcpyHostToDevice);
    cudaMemcpy(d_rgamma2, h_rgamma2, sizeneeded, cudaMemcpyHostToDevice);
    cudaMemcpy(d_ra, h_ra, sizeneeded, cudaMemcpyHostToDevice);
    cudaMemcpy(d_dec, h_dec, sizeneeded, cudaMemcpyHostToDevice);
    cudaMemcpy(d_mAp_rgamma, h_mAp_rgamma, sizeneeded_out, cudaMemcpyHostToDevice);
    cudaMemcpy(d_var_rgamma, h_var_rgamma, sizeneeded_out, cudaMemcpyHostToDevice);
    cudaMemcpy(d_SN_rgamma, h_SN_rgamma, sizeneeded_out, cudaMemcpyHostToDevice);
    
    //check memory is alright
    if (0==h_rgamma1 || 0==h_rgamma2  || 0==h_ra || 0==h_dec || 0==h_mAp_rgamma || 0==h_var_rgamma || 0==h_SN_rgamma) printf("can't allocate memory on host \n");
    if (0==d_rgamma1 || 0==d_rgamma2  || 0==d_ra || 0==d_dec  || 0==d_mAp_rgamma || 0==d_var_rgamma  || 0==d_SN_rgamma ) printf("can't allocate memory on device \n");
    checkCUDAerror("memory");
    
    
    
    // set up kernel params
    int threadsPerBlock = max_threads; 
    int blocksPerGrid = int(ceil( ncalc / float(max_threads)) ); // need grid_size*grid_size threads total
    printf(" theads per block: %d and blocks per grid: %d for a total of: %d\n", threadsPerBlock, blocksPerGrid, threadsPerBlock*blocksPerGrid);
    
    
    mApKernel<<<blocksPerGrid, threadsPerBlock >>>(d_rgamma1, d_rgamma2, d_ra, d_dec, d_mAp_rgamma,d_var_rgamma, d_SN_rgamma,  number_of_galaxies, filter_rad, grid_size, ra_pixsize, dec_pixsize, min_ra, min_dec);
    checkCUDAerror("kernel");
    
    
    //get the output_mAp back off the device
    cudaMemcpy(h_mAp_rgamma, d_mAp_rgamma, sizeneeded_out, cudaMemcpyDeviceToHost);
    cudaMemcpy(h_var_rgamma, d_var_rgamma, sizeneeded_out, cudaMemcpyDeviceToHost);
    cudaMemcpy(h_SN_rgamma, d_SN_rgamma, sizeneeded_out, cudaMemcpyDeviceToHost);
    
    
    // finally, write out to the output file! 
    
   
    FILE *output_file;
    double sq2=sqrt(2.0);
    output_file = fopen(output_filename, "w");
    fprintf(output_file, " # ra  dec  mAp  Var S/N \n");
    float this_ra, this_dec;
    int tempra, tempdec;

    for(int ii=0 ; ii<ncalc; ii++){

     	tempra = ii/grid_size;	
	tempdec = ii - grid_size*tempra;
   	this_ra = min_ra + tempra*ra_pixsize;
   	this_dec = min_dec + tempdec*dec_pixsize;
	
      fprintf(output_file, "%f %f %f %f %f \n", this_ra, this_dec, h_mAp_rgamma[ii], h_var_rgamma[ii], h_SN_rgamma[ii] ) ;


    }
    fclose(output_file);
    
    printf("successfuly completed!\n");
}





//////////////////////////////////////////////////////////////
//  simple function to check for errors. 
//////////////////////////////////////////////////////////////

void checkCUDAerror(const char *msg)
{
  cudaError_t err = cudaGetLastError();
  if( cudaSuccess != err) 
    {
      fprintf(stderr, "Cuda error: %s: %s.\n", msg, 
	      cudaGetErrorString( err) );
        exit(EXIT_FAILURE);
    }                         
}



///////////////////////////////////////////////////////////////////////////////////////
//  function to check whether GPU device has the specs to perform the calculation. 
//  adapted from cuda SDK deviceQuery example. 
///////////////////////////////////////////////////////////////////////////////////////

int checkDeviceSpecs( int number_of_galaxies, int ncalc){



  int gpu_mem_needed = int(number_of_galaxies * sizeof(float))*4 +  int(ncalc * sizeof(float))*3; // need to allocate gamma1, gamma2, ra, dec and output mAp and var and SN. 
  printf("Requirements: %d calculations and %d bytes memory on the GPU \n\n", ncalc, gpu_mem_needed);  

  int threadsPerBlock=0;
  // now get the info from the device. 
  int deviceCount = 0;
  cudaError_t error_id = cudaGetDeviceCount(&deviceCount);
  if (error_id != cudaSuccess) {
    printf( "cudaGetDeviceCount returned %d\n-> %s\n", (int)error_id, cudaGetErrorString(error_id) );
  }
  // This function call returns 0 if there are no CUDA capable devices.
  if (deviceCount == 0)
    printf("There is no device supporting CUDA\n");
  else
    printf("Found %d CUDA Capable device(s)\n", deviceCount); 
  
  
  int dev, driverVersion = 0;     
  for (dev = 0; dev < deviceCount; ++dev) {
    cudaDeviceProp deviceProp;
    cudaGetDeviceProperties(&deviceProp, dev);
    printf("\nDevice %d: \"%s\"\n", dev, deviceProp.name);
    
    printf("  Total amount of global memory:                 %.0f MBytes (%llu bytes)\n", 
	   (float)deviceProp.totalGlobalMem/1048576.0f, (unsigned long long) deviceProp.totalGlobalMem);
    
    printf("  Maximum number of threads per block:           %d\n", deviceProp.maxThreadsPerBlock);

 // you can uncomment this info if you want to know  bit more about your device specs. 
 //Or just run devicQuery from teh SDK.    
 //   //printf("  Warp size:                                     %d\n", deviceProp.warpSize);
 //   printf("  Maximum sizes of each dimension of a block:    %d x %d x %d\n",
//	   deviceProp.maxThreadsDim[0],
//	   deviceProp.maxThreadsDim[1],
//	   deviceProp.maxThreadsDim[2]);
//    printf("  Maximum sizes of each dimension of a grid:     %d x %d x %d\n",
//	   deviceProp.maxGridSize[0],
//	   deviceProp.maxGridSize[1],
//	   deviceProp.maxGridSize[2]);
    
    
    
    // does this device have enough capcacity for the calculation? 
        
    // check memory
    if((unsigned long long) deviceProp.totalGlobalMem < gpu_mem_needed) {
      printf(" FAILURE: Not eneough memeory on device for this calculation! \n");
      exit(1);
    }    
    else
      { 
	printf("Hurrah! This device has enough memory to perform this calculation\n");
	
	// check # threads
	
	threadsPerBlock = deviceProp.maxThreadsPerBlock; // maximal efficiency exists if we use max # threads per block. 
	int blocksPerGrid = int(ceil(ncalc / threadsPerBlock)); // need grid_size*grid_size threads total

	if( int(deviceProp.maxThreadsDim[1])*int(deviceProp.maxThreadsDim[2]) <blocksPerGrid) {
	  printf("FAILURE: Not enough threads on the device to do this calculation!\n");
	    exit(1);
	  }
	else 
	  {
	    printf("Hurrah! This device supports enough threads to do this calculation\n");
	  }
      }

  }// loop over devices
  
  return threadsPerBlock;
}

	.file	"tmpxft_002ca616_00000000-6_mAp_gpu_grid.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4023:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4023:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB4722:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4722:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAerrorPKc
	.type	_Z14checkCUDAerrorPKc, @function
_Z14checkCUDAerrorPKc:
.LFB4019:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4019:
	.size	_Z14checkCUDAerrorPKc, .-_Z14checkCUDAerrorPKc
	.section	.rodata.str1.1
.LC1:
	.string	"Requirements: %d calculations and %d bytes memory on the GPU \n\n"
.LC2:
	.string	"cudaGetDeviceCount returned %d\n-> %s\n"
.LC3:
	.string	"There is no device supporting CUDA\n"
.LC4:
	.string	"Found %d CUDA Capable device(s)\n"
.LC5:
	.string	"\nDevice %d: \"%s\"\n"
.LC7:
	.string	"  Total amount of global memory:                 %.0f MBytes (%llu bytes)\n"
.LC8:
	.string	"  Maximum number of threads per block:           %d\n"
.LC9:
	.string	" FAILURE: Not eneough memeory on device for this calculation! \n"
.LC10:
	.string	"Hurrah! This device has enough memory to perform this calculation\n"
.LC11:
	.string	"FAILURE: Not enough threads on the device to do this calculation!\n"
.LC12:
	.string	"Hurrah! This device supports enough threads to do this calculation\n"
	.text
	.globl	_Z16checkDeviceSpecsii
	.type	_Z16checkDeviceSpecsii, @function
_Z16checkDeviceSpecsii:
.LFB4020:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	sall	$4, %edi
	movl	%esi, %edx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1104
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	imull	$12, %esi, %eax
	leaq	.LC1(%rip), %rsi
	leal	(%rdi,%rax), %ebx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ebx, %ecx
	call	__printf_chk@PLT
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	movl	%eax, 12(%rsp)
	call	cudaGetDeviceCount@PLT
	testl	%eax, %eax
	je	.L8
	movl	%eax, %edi
	movl	%eax, %r12d
	call	cudaGetErrorString@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L8:
	movl	12(%rsp), %edx
	testl	%edx, %edx
	jne	.L9
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L11:
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	movslq	%ebx, %rbx
	jmp	.L10
.L9:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L11
.L15:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
.L10:
	cmpl	%r12d, 12(%rsp)
	jle	.L23
	leaq	16(%rsp), %r13
	movl	%r12d, %esi
	movq	%r13, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%r12d, %edx
	movq	%r13, %rcx
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	304(%rsp), %rdx
	testq	%rdx, %rdx
	js	.L12
	cvtsi2ssq	%rdx, %xmm0
	jmp	.L13
.L12:
	movq	%rdx, %rax
	movq	%rdx, %rcx
	shrq	%rax
	andl	$1, %ecx
	orq	%rcx, %rax
	cvtsi2ssq	%rax, %xmm0
	addss	%xmm0, %xmm0
.L13:
	mulss	.LC6(%rip), %xmm0
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movl	336(%rsp), %edx
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpq	%rbx, 304(%rsp)
	jnb	.L14
	leaq	.LC9(%rip), %rsi
	jmp	.L22
.L14:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %eax
	movl	336(%rsp), %r13d
	cltd
	idivl	%r13d
	movl	344(%rsp), %edx
	imull	348(%rsp), %edx
	cmpl	%edx, %eax
	jle	.L15
	leaq	.LC11(%rip), %rsi
.L22:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L23:
	movq	1048(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 40
	movl	%r13d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4020:
	.size	_Z16checkDeviceSpecsii, .-_Z16checkDeviceSpecsii
	.globl	_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff
	.type	_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff, @function
_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff:
.LFB4045:
	.cfi_startproc
	endbr64
	subq	$280, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rdx, 56(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, 24(%rsp)
	movss	%xmm0, 20(%rsp)
	movss	%xmm1, 16(%rsp)
	movss	%xmm2, 12(%rsp)
	movss	%xmm3, 8(%rsp)
	movss	%xmm4, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	96(%rsp)
	.cfi_def_cfa_offset 296
	leaq	_Z9mApKernelPfS_S_S_S_S_S_ififfff(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 304
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 296
	popq	%rdx
	.cfi_def_cfa_offset 288
.L24:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$280, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4045:
	.size	_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff, .-_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff
	.globl	_Z9mApKernelPfS_S_S_S_S_S_ififfff
	.type	_Z9mApKernelPfS_S_S_S_S_S_ififfff, @function
_Z9mApKernelPfS_S_S_S_S_S_ififfff:
.LFB4046:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff
	.cfi_endproc
.LFE4046:
	.size	_Z9mApKernelPfS_S_S_S_S_S_ififfff, .-_Z9mApKernelPfS_S_S_S_S_S_ififfff
	.section	.rodata.str1.1
.LC13:
	.string	"_Z9mApKernelPfS_S_S_S_S_S_ififfff"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4048:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9mApKernelPfS_S_S_S_S_S_ififfff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4048:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC14:
	.string	"gotta wait for a bit!: %s\n"
.LC15:
	.string	"can't allocate memory on host \n"
.LC16:
	.string	"memory"
.LC17:
	.string	"can't allocate memory on device \n"
.LC18:
	.string	" theads per block: %d and blocks per grid: %d for a total of: %d\n"
.LC19:
	.string	"kernel"
.LC20:
	.string	"w"
.LC21:
	.string	" # ra  dec  mAp  Var S/N \n"
.LC22:
	.string	"%f %f %f %f %f \n"
.LC23:
	.string	"successfuly completed!\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4018:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4018
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$744, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L32
	movq	8(%rsi), %rax
	movq	24(%rsi), %rdi
	movq	%rsi, %r12
	movq	%rax, -704(%rbp)
	movq	16(%rsi), %rax
	movq	%rax, -768(%rbp)
	call	atoi@PLT
	movq	32(%r12), %rdi
	movl	%eax, %r15d
	call	atof@PLT
	movq	40(%r12), %rdi
	cvtsd2ss	%xmm0, %xmm5
	movss	%xmm5, -772(%rbp)
	call	atoi@PLT
	movq	48(%r12), %rdi
	movl	%eax, %ebx
	call	atof@PLT
	movq	56(%r12), %rdi
	cvtsd2ss	%xmm0, %xmm6
	movss	%xmm6, -724(%rbp)
	call	atof@PLT
	movq	64(%r12), %rdi
	cvtsd2ss	%xmm0, %xmm7
	movd	%xmm7, %r13d
	call	atof@PLT
	movq	72(%r12), %rdi
	cvtsd2ss	%xmm0, %xmm3
	movss	%xmm3, -728(%rbp)
	call	atof@PLT
	cvtsd2ss	%xmm0, %xmm1
.L32:
	cvtsi2ssl	%ebx, %xmm2
	movd	%r13d, %xmm0
	leaq	-576(%rbp), %r12
	movl	%ebx, %eax
	subss	-724(%rbp), %xmm0
	subss	-728(%rbp), %xmm1
	imull	%ebx, %eax
	divss	%xmm2, %xmm0
	movl	%eax, -708(%rbp)
	movslq	%r15d, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, -696(%rbp)
	divss	%xmm2, %xmm1
	movss	%xmm0, -732(%rbp)
	movss	%xmm1, -736(%rbp)
	call	malloc@PLT
	movq	-696(%rbp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	-696(%rbp), %rdi
	movq	%rax, -744(%rbp)
	call	malloc@PLT
	movq	-696(%rbp), %rdi
	movq	%rax, -752(%rbp)
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, -760(%rbp)
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	-704(%rbp), %rsi
	movl	$8, %edx
	movq	%r12, %rdi
.LEHB1:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	xorl	%ecx, %ecx
	leaq	-680(%rbp), %r13
	movq	%rcx, -704(%rbp)
.L33:
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movq	%rax, %rdi
	leaq	-676(%rbp), %rsi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movq	%rax, %rdi
	leaq	-672(%rbp), %rsi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movq	%rax, %rdi
	leaq	-668(%rbp), %rsi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	movq	-704(%rbp), %rcx
	movss	-680(%rbp), %xmm0
	movq	-752(%rbp), %rax
	addq	$4, -704(%rbp)
	cmpl	$0, -288(%rbp)
	movss	%xmm0, (%rax,%rcx)
	movss	-676(%rbp), %xmm0
	movq	-760(%rbp), %rax
	movss	%xmm0, (%rax,%rcx)
	movss	-672(%rbp), %xmm0
	movq	-744(%rbp), %rax
	movss	%xmm0, (%r14,%rcx)
	movss	-668(%rbp), %xmm0
	movss	%xmm0, (%rax,%rcx)
	je	.L33
	movl	-708(%rbp), %esi
	movl	%r15d, %edi
	call	_Z16checkDeviceSpecsii
	movl	%eax, -712(%rbp)
	leaq	.LC14(%rip), %r12
.L35:
	leaq	-592(%rbp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L34
	call	cudaGetErrorString@PLT
	movq	%rax, %rdx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$10, %edi
	call	sleep@PLT
	jmp	.L35
.L34:
	movq	-696(%rbp), %rsi
	leaq	-664(%rbp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	-696(%rbp), %rsi
	leaq	-656(%rbp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	-696(%rbp), %rsi
	leaq	-648(%rbp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	-696(%rbp), %rsi
	leaq	-640(%rbp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movslq	-708(%rbp), %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, -704(%rbp)
	call	malloc@PLT
	movq	-704(%rbp), %rsi
	leaq	-632(%rbp), %rdi
	movq	%rax, -720(%rbp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	-704(%rbp), %rdi
	call	malloc@PLT
	movq	-704(%rbp), %rsi
	leaq	-624(%rbp), %rdi
	movq	%rax, %r12
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	-704(%rbp), %rdi
	call	malloc@PLT
	movq	-704(%rbp), %rsi
	leaq	-616(%rbp), %rdi
	movq	%rax, %r13
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	-696(%rbp), %rdx
	movq	-664(%rbp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movq	-696(%rbp), %rdx
	movq	-744(%rbp), %rsi
	movl	$1, %ecx
	movq	-656(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-696(%rbp), %rdx
	movq	-752(%rbp), %rsi
	movl	$1, %ecx
	movq	-648(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-696(%rbp), %rdx
	movq	-760(%rbp), %rsi
	movl	$1, %ecx
	movq	-640(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-704(%rbp), %rdx
	movq	-720(%rbp), %rsi
	movl	$1, %ecx
	movq	-632(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-704(%rbp), %rdx
	movq	-624(%rbp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	-704(%rbp), %rdx
	movq	-616(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	cmpq	$0, -720(%rbp)
	sete	%al
	testq	%r12, %r12
	sete	%dl
	orb	%dl, %al
	jne	.L36
	testq	%r13, %r13
	je	.L36
.L39:
	cmpq	$0, -664(%rbp)
	jne	.L53
	jmp	.L37
.L36:
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L39
.L53:
	cmpq	$0, -656(%rbp)
	je	.L37
	cmpq	$0, -648(%rbp)
	je	.L37
	cmpq	$0, -640(%rbp)
	je	.L37
	cmpq	$0, -632(%rbp)
	je	.L37
	cmpq	$0, -624(%rbp)
	je	.L37
	cmpq	$0, -616(%rbp)
	je	.L37
.L41:
	leaq	.LC16(%rip), %rdi
	call	_Z14checkCUDAerrorPKc
	jmp	.L59
.L37:
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L41
.L59:
	cvtsi2ssl	-712(%rbp), %xmm1
	cvtsi2ssl	-708(%rbp), %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	movl	-712(%rbp), %r8d
	movl	-712(%rbp), %edx
	xorl	%eax, %eax
	cvttss2sil	%xmm0, %r14d
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	imull	%r14d, %r8d
	movl	%r14d, %ecx
	call	__printf_chk@PLT
	movl	-712(%rbp), %eax
	movl	%r14d, -604(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, -592(%rbp)
	movabsq	$4294967297, %rax
	movq	%rax, -588(%rbp)
	movl	-584(%rbp), %ecx
	movq	%rax, -600(%rbp)
	movq	-592(%rbp), %rdx
	movq	-604(%rbp), %rdi
	movl	-596(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L42
.L44:
	leaq	.LC19(%rip), %rdi
	call	_Z14checkCUDAerrorPKc
	jmp	.L60
.L42:
	pushq	%rdx
	movss	-728(%rbp), %xmm4
	pushq	%rbx
	movss	-724(%rbp), %xmm3
	pushq	%r15
	movss	-736(%rbp), %xmm2
	pushq	-616(%rbp)
	movss	-732(%rbp), %xmm1
	movss	-772(%rbp), %xmm0
	movq	-624(%rbp), %r9
	movq	-632(%rbp), %r8
	movq	-640(%rbp), %rcx
	movq	-648(%rbp), %rdx
	movq	-656(%rbp), %rsi
	movq	-664(%rbp), %rdi
	.cfi_escape 0x2e,0x20
	call	_Z47__device_stub__Z9mApKernelPfS_S_S_S_S_S_ififfffPfS_S_S_S_S_S_ififfff
	addq	$32, %rsp
	jmp	.L44
.L60:
	movq	-704(%rbp), %rdx
	movq	-632(%rbp), %rsi
	movl	$2, %ecx
	movq	-720(%rbp), %rdi
	.cfi_escape 0x2e,0
	call	cudaMemcpy@PLT
	movq	-704(%rbp), %rdx
	movq	-624(%rbp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movq	-704(%rbp), %rdx
	movq	-616(%rbp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	-768(%rbp), %rdi
	leaq	.LC20(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %r14
	movq	%rax, %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC21(%rip), %rdx
	call	__fprintf_chk@PLT
	xorl	%eax, %eax
	leaq	.LC22(%rip), %r15
	movq	%rax, -696(%rbp)
.L45:
	movl	-696(%rbp), %eax
	cmpl	%eax, -708(%rbp)
	jle	.L61
	cltd
	movq	-696(%rbp), %rcx
	movl	$2, %esi
	movq	%r14, %rdi
	idivl	%ebx
	cvtsi2ssl	%eax, %xmm0
	movq	-696(%rbp), %rax
	mulss	-732(%rbp), %xmm0
	cvtsi2ssl	%edx, %xmm1
	mulss	-736(%rbp), %xmm1
	addss	-724(%rbp), %xmm0
	movq	%r15, %rdx
	addss	-728(%rbp), %xmm1
	cvtss2sd	0(%r13,%rax,4), %xmm4
	cvtss2sd	(%r12,%rax,4), %xmm3
	movq	-720(%rbp), %rax
	cvtss2sd	(%rax,%rcx,4), %xmm2
	movb	$5, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__fprintf_chk@PLT
	incq	-696(%rbp)
	jmp	.L45
.L61:
	movq	%r14, %rdi
	call	fclose@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.LEHE1:
	leaq	-576(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L49
	jmp	.L57
.L51:
	endbr64
	movq	%rax, %rbx
.L47:
	leaq	-576(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L57
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L57:
	call	__stack_chk_fail@PLT
.L49:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4018:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4018:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4018-.LLSDACSB4018
.LLSDACSB4018:
	.uleb128 .LEHB0-.LFB4018
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4018
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L51-.LFB4018
	.uleb128 0
	.uleb128 .LEHB2-.LFB4018
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4018:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	897581056
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <string>
#include <math.h>
#include <assert.h>

#include <iostream>
#include <iomanip>
#include <fstream>

#include <unistd.h>



#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
//#include "cutil.h"
using namespace std;

//////////////////////////////////////////////////////////////////////////  
//this version calculates the aperture mass at the galaxy positions. 
////////////////////////////////////////////////////////////////////////// 





void checkCUDAerror(const char *msg);

int checkDeviceSpecs(int number_of_galaxies, int grid_size);


/////////////////////////////////////////////////////////////////////
//   The kernel: calculates the aperture mass, noise and SNR
/////////////////////////////////////////////////////////////////////

__global__ void mApKernel(float* rgamma1, float* rgamma2, float* ra, float* dec, float* mAp_rgamma, float* var_rgamma, float* SN_rgamma,  int tot_gals, float theta_max, int grid_size, float ra_pixsize, float dec_pixsize, float min_ra, float min_dec)
{
  int idx = blockDim.x * blockIdx.x + threadIdx.x;
   
  // need to have the grid coordinates in arcminutes. 
float tempra = idx/grid_size;
float tempdec = idx - grid_size*tempra;
  float this_ra = min_ra + tempra*ra_pixsize;
  float this_dec = min_dec + tempdec*dec_pixsize;
  
  // want to include any tails outside the halo radius to which our filter is tuned......
  int kernel_radius = 1.5*theta_max;
  float ang = 0.0;
  float xc = 0.15; // a constant of the calculation. 
  float x = 0, Q = 0;
  
  float rgammaMap = 0;
  float rgammaVar=0;
  float radiff, decdiff, dist;

  float npoints = 0;

  for(int i=0; i<tot_gals; i++){

    radiff = (float)this_ra-ra[i]; 
    if(abs(radiff)>kernel_radius) continue;
    decdiff=(float)this_dec-dec[i];
    if(abs(decdiff)>kernel_radius || (radiff==0 && decdiff==0)) continue;
    
    dist = sqrtf(radiff*radiff + decdiff*decdiff);
    if(abs(dist)>kernel_radius) continue;
    
    // have to do something a bit complicated for the angle - make sure it's getting the correct range.
    if(radiff==0 && decdiff>0) ang = M_PI/2.0;
    else if(radiff==0 && decdiff<0) ang = -1.0 * M_PI/2.0;
    else if(radiff>0) ang = atanf(decdiff/radiff);
    else if(radiff<0 && decdiff>0) ang = atanf(decdiff/radiff) + M_PI;
    else if(radiff<0 and decdiff<0) ang = atanf(decdiff/radiff)-M_PI;
    
    x = dist / theta_max;
    Q = (1.0 / (1.0 + exp(6.0 - 150.0*x) + exp(-47.0 + 50.0*x))) * (tanh(x/xc) / (x/xc));
    
    rgammaMap+= Q* (-1* (rgamma1[i]*cos(2*ang) + rgamma2[i]*sin(2*ang) ));
    rgammaVar+= Q*Q* (rgamma1[i]*rgamma1[i] + rgamma2[i]*rgamma2[i]);
    
    
     npoints++;

}
  
  // the outputs from this calculation:
  
  mAp_rgamma[idx] = rgammaMap/npoints;// got to normalise by the # gals I did the sum over. 
  var_rgamma[idx] = rgammaVar /(2.0*npoints*npoints); 
  SN_rgamma[idx] = sqrtf(2) * rgammaMap / sqrtf(rgammaVar);
}




////////////////////////////////////////////////////////////////
// setting up the aperture mass calculation
//////////////////////////////////////////////////////////////

int main(int argc, char **argv){
  

  char* input_filename; char* output_filename;
  int number_of_galaxies, grid_size; 
  float filter_rad, min_ra, max_ra, min_dec, max_dec;
  if (argc>1)
    {
      input_filename = argv[1];
      output_filename = argv[2];
      number_of_galaxies = atoi(argv[3]);
      filter_rad = atof(argv[4]);
      grid_size = atoi(argv[5]);
      min_ra = atof(argv[6]);
      max_ra = atof(argv[7]);
      min_dec = atof(argv[8]);
      max_dec = atof(argv[9]);
    }


  int ncalc = grid_size*grid_size;
     
  float ra_pixsize = (max_ra - min_ra)/float(grid_size);
  float dec_pixsize = (max_dec - min_dec)/float(grid_size);

  // CPU memory
  size_t sizeneeded = number_of_galaxies*sizeof(float);
  float *h_rgamma1 = 0;
  float *h_rgamma2 = 0;
  float *h_ra = 0;
  float *h_dec = 0;
  h_rgamma1 = (float*) malloc(sizeneeded);
  h_rgamma2 = (float*) malloc(sizeneeded);
  h_ra = (float*) malloc(sizeneeded);
  h_dec = (float*) malloc(sizeneeded);
  

  ifstream infile;
  infile.open(input_filename);
  
  int i=0;
  float x, y, g1, g2;
  while(1)
    {
      infile>>x>>y>>g1>>g2;
      h_ra[i] = x;
      h_dec[i] = y;
      h_rgamma1[i] = g1;
      h_rgamma2[i] = g2;   
      i += 1;
      if(!infile.good()) break;       

    }
             
    
  // check whether the device has the capacity to do this calculation. 
  // this is taken from the SDK function deviceQuery	
  int max_threads = checkDeviceSpecs(number_of_galaxies, ncalc);

  
  /// first, I need to test whether the device is busy. If so, it can wait a little while.
    while(1){
      size_t testsize = 1*sizeof(float); 
      float *d_test;
      hipMalloc(&d_test, testsize);
      hipError_t err = hipGetLastError();
      if( hipSuccess != err){
	printf("gotta wait for a bit!: %s\n",  hipGetErrorString( err) );
	sleep(10);
      }
      else break;
    }
    
    
    // GPU memory for input 
    float *d_rgamma1, *d_rgamma2, *d_ra, *d_dec;
    hipMalloc(&d_rgamma1, sizeneeded);
    hipMalloc(&d_rgamma2, sizeneeded);
    hipMalloc(&d_ra, sizeneeded);
    hipMalloc(&d_dec, sizeneeded);
    
    // set up vectors for host and device for output. 
    size_t sizeneeded_out = ncalc*sizeof(float);
    float *h_mAp_rgamma,*d_mAp_rgamma, *h_var_rgamma, *d_var_rgamma, *h_SN_rgamma, *d_SN_rgamma;
    
    h_mAp_rgamma = (float*)malloc(sizeneeded_out);
    hipMalloc(&d_mAp_rgamma, sizeneeded_out);
    h_var_rgamma = (float*)malloc(sizeneeded_out);
    hipMalloc(&d_var_rgamma, sizeneeded_out);
    h_SN_rgamma = (float*)malloc(sizeneeded_out);
    hipMalloc(&d_SN_rgamma, sizeneeded_out);
    
    
    //copy vectors from host to device memory
    hipMemcpy(d_rgamma1, h_rgamma1, sizeneeded, hipMemcpyHostToDevice);
    hipMemcpy(d_rgamma2, h_rgamma2, sizeneeded, hipMemcpyHostToDevice);
    hipMemcpy(d_ra, h_ra, sizeneeded, hipMemcpyHostToDevice);
    hipMemcpy(d_dec, h_dec, sizeneeded, hipMemcpyHostToDevice);
    hipMemcpy(d_mAp_rgamma, h_mAp_rgamma, sizeneeded_out, hipMemcpyHostToDevice);
    hipMemcpy(d_var_rgamma, h_var_rgamma, sizeneeded_out, hipMemcpyHostToDevice);
    hipMemcpy(d_SN_rgamma, h_SN_rgamma, sizeneeded_out, hipMemcpyHostToDevice);
    
    //check memory is alright
    if (0==h_rgamma1 || 0==h_rgamma2  || 0==h_ra || 0==h_dec || 0==h_mAp_rgamma || 0==h_var_rgamma || 0==h_SN_rgamma) printf("can't allocate memory on host \n");
    if (0==d_rgamma1 || 0==d_rgamma2  || 0==d_ra || 0==d_dec  || 0==d_mAp_rgamma || 0==d_var_rgamma  || 0==d_SN_rgamma ) printf("can't allocate memory on device \n");
    checkCUDAerror("memory");
    
    
    
    // set up kernel params
    int threadsPerBlock = max_threads; 
    int blocksPerGrid = int(ceil( ncalc / float(max_threads)) ); // need grid_size*grid_size threads total
    printf(" theads per block: %d and blocks per grid: %d for a total of: %d\n", threadsPerBlock, blocksPerGrid, threadsPerBlock*blocksPerGrid);
    
    
    mApKernel<<<blocksPerGrid, threadsPerBlock >>>(d_rgamma1, d_rgamma2, d_ra, d_dec, d_mAp_rgamma,d_var_rgamma, d_SN_rgamma,  number_of_galaxies, filter_rad, grid_size, ra_pixsize, dec_pixsize, min_ra, min_dec);
    checkCUDAerror("kernel");
    
    
    //get the output_mAp back off the device
    hipMemcpy(h_mAp_rgamma, d_mAp_rgamma, sizeneeded_out, hipMemcpyDeviceToHost);
    hipMemcpy(h_var_rgamma, d_var_rgamma, sizeneeded_out, hipMemcpyDeviceToHost);
    hipMemcpy(h_SN_rgamma, d_SN_rgamma, sizeneeded_out, hipMemcpyDeviceToHost);
    
    
    // finally, write out to the output file! 
    
   
    FILE *output_file;
    double sq2=sqrt(2.0);
    output_file = fopen(output_filename, "w");
    fprintf(output_file, " # ra  dec  mAp  Var S/N \n");
    float this_ra, this_dec;
    int tempra, tempdec;

    for(int ii=0 ; ii<ncalc; ii++){

     	tempra = ii/grid_size;	
	tempdec = ii - grid_size*tempra;
   	this_ra = min_ra + tempra*ra_pixsize;
   	this_dec = min_dec + tempdec*dec_pixsize;
	
      fprintf(output_file, "%f %f %f %f %f \n", this_ra, this_dec, h_mAp_rgamma[ii], h_var_rgamma[ii], h_SN_rgamma[ii] ) ;


    }
    fclose(output_file);
    
    printf("successfuly completed!\n");
}





//////////////////////////////////////////////////////////////
//  simple function to check for errors. 
//////////////////////////////////////////////////////////////

void checkCUDAerror(const char *msg)
{
  hipError_t err = hipGetLastError();
  if( hipSuccess != err) 
    {
      fprintf(stderr, "Cuda error: %s: %s.\n", msg, 
	      hipGetErrorString( err) );
        exit(EXIT_FAILURE);
    }                         
}



///////////////////////////////////////////////////////////////////////////////////////
//  function to check whether GPU device has the specs to perform the calculation. 
//  adapted from cuda SDK deviceQuery example. 
///////////////////////////////////////////////////////////////////////////////////////

int checkDeviceSpecs( int number_of_galaxies, int ncalc){



  int gpu_mem_needed = int(number_of_galaxies * sizeof(float))*4 +  int(ncalc * sizeof(float))*3; // need to allocate gamma1, gamma2, ra, dec and output mAp and var and SN. 
  printf("Requirements: %d calculations and %d bytes memory on the GPU \n\n", ncalc, gpu_mem_needed);  

  int threadsPerBlock=0;
  // now get the info from the device. 
  int deviceCount = 0;
  hipError_t error_id = hipGetDeviceCount(&deviceCount);
  if (error_id != hipSuccess) {
    printf( "hipGetDeviceCount returned %d\n-> %s\n", (int)error_id, hipGetErrorString(error_id) );
  }
  // This function call returns 0 if there are no CUDA capable devices.
  if (deviceCount == 0)
    printf("There is no device supporting CUDA\n");
  else
    printf("Found %d CUDA Capable device(s)\n", deviceCount); 
  
  
  int dev, driverVersion = 0;     
  for (dev = 0; dev < deviceCount; ++dev) {
    hipDeviceProp_t deviceProp;
    hipGetDeviceProperties(&deviceProp, dev);
    printf("\nDevice %d: \"%s\"\n", dev, deviceProp.name);
    
    printf("  Total amount of global memory:                 %.0f MBytes (%llu bytes)\n", 
	   (float)deviceProp.totalGlobalMem/1048576.0f, (unsigned long long) deviceProp.totalGlobalMem);
    
    printf("  Maximum number of threads per block:           %d\n", deviceProp.maxThreadsPerBlock);

 // you can uncomment this info if you want to know  bit more about your device specs. 
 //Or just run devicQuery from teh SDK.    
 //   //printf("  Warp size:                                     %d\n", deviceProp.warpSize);
 //   printf("  Maximum sizes of each dimension of a block:    %d x %d x %d\n",
//	   deviceProp.maxThreadsDim[0],
//	   deviceProp.maxThreadsDim[1],
//	   deviceProp.maxThreadsDim[2]);
//    printf("  Maximum sizes of each dimension of a grid:     %d x %d x %d\n",
//	   deviceProp.maxGridSize[0],
//	   deviceProp.maxGridSize[1],
//	   deviceProp.maxGridSize[2]);
    
    
    
    // does this device have enough capcacity for the calculation? 
        
    // check memory
    if((unsigned long long) deviceProp.totalGlobalMem < gpu_mem_needed) {
      printf(" FAILURE: Not eneough memeory on device for this calculation! \n");
      exit(1);
    }    
    else
      { 
	printf("Hurrah! This device has enough memory to perform this calculation\n");
	
	// check # threads
	
	threadsPerBlock = deviceProp.maxThreadsPerBlock; // maximal efficiency exists if we use max # threads per block. 
	int blocksPerGrid = int(ceil(ncalc / threadsPerBlock)); // need grid_size*grid_size threads total

	if( int(deviceProp.maxThreadsDim[1])*int(deviceProp.maxThreadsDim[2]) <blocksPerGrid) {
	  printf("FAILURE: Not enough threads on the device to do this calculation!\n");
	    exit(1);
	  }
	else 
	  {
	    printf("Hurrah! This device supports enough threads to do this calculation\n");
	  }
      }

  }// loop over devices
  
  return threadsPerBlock;
}

	.text
	.file	"mAp_gpu_grid.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff # -- Begin function _Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff
	.type	_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff,@function
_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff: # @_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	88(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	56(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	48(%rsp), %r8
	movq	%r9, (%r8)
	leaq	28(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	24(%rsp), %r10
	movss	%xmm1, (%r10)
	leaq	20(%rsp), %r11
	movss	%xmm2, (%r11)
	leaq	16(%rsp), %r14
	movss	%xmm3, (%r14)
	leaq	12(%rsp), %r15
	movss	%xmm4, (%r15)
	leaq	128(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	movq	%r9, 64(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 72(%rbx)
	movq	%r10, 80(%rbx)
	movq	%r11, 88(%rbx)
	movq	%r14, 96(%rbx)
	movq	%r15, 104(%rbx)
	leaq	112(%rsp), %r14
	leaq	96(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9mApKernelPfS_S_S_S_S_S_ififfff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff, .Lfunc_end0-_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$696, %rsp                      # imm = 0x2B8
	.cfi_def_cfa_offset 752
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jl	.LBB1_1
# %bb.2:
	movq	%rsi, %rbx
	movq	8(%rsi), %r14
	movq	16(%rsi), %rax
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	movq	24(%rsi), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atoi
	movl	%eax, %r12d
	movq	32(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 112(%rsp)                # 4-byte Spill
	movq	40(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atoi
	movl	%eax, %r15d
	movq	48(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	56(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movq	64(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movq	72(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	jmp	.LBB1_3
.LBB1_1:
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $xmm0
                                        # kill: killed $xmm0
                                        # implicit-def: $r15d
                                        # implicit-def: $r12d
                                        # implicit-def: $rax
                                        # kill: killed $rax
                                        # implicit-def: $r14
.LBB1_3:
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	movslq	%r12d, %rbx
	shlq	$2, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	leaq	176(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.4:
	movl	%r15d, %eax
	imull	%eax, %eax
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	movss	12(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	subss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movq	%r15, 168(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15d, %xmm0
	divss	%xmm0, %xmm1
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	subss	(%rsp), %xmm1                   # 4-byte Folded Reload
	divss	%xmm0, %xmm1
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	xorl	%r13d, %r13d
	leaq	176(%rsp), %r14
	leaq	132(%rsp), %rbp
	leaq	128(%rsp), %r12
	leaq	124(%rsp), %rbx
	leaq	120(%rsp), %r15
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
.Ltmp3:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp4:
# %bb.6:                                # %_ZNSirsERf.exit
                                        #   in Loop: Header=BB1_5 Depth=1
.Ltmp5:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	movq	%r12, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp6:
# %bb.7:                                # %_ZNSirsERf.exit175
                                        #   in Loop: Header=BB1_5 Depth=1
.Ltmp7:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	movq	%rbx, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp8:
# %bb.8:                                # %_ZNSirsERf.exit176
                                        #   in Loop: Header=BB1_5 Depth=1
.Ltmp9:
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	movq	%r15, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp10:
# %bb.9:                                # %_ZNSirsERf.exit177
                                        #   in Loop: Header=BB1_5 Depth=1
	movss	132(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movq	72(%rsp), %rax                  # 8-byte Reload
	movss	%xmm0, (%rax,%r13)
	movss	128(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movq	64(%rsp), %rax                  # 8-byte Reload
	movss	%xmm0, (%rax,%r13)
	movss	124(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movq	16(%rsp), %rax                  # 8-byte Reload
	movss	%xmm0, (%rax,%r13)
	movss	120(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movq	80(%rsp), %rax                  # 8-byte Reload
	movss	%xmm0, (%rax,%r13)
	movq	176(%rsp), %rax
	movq	-24(%rax), %rax
	addq	$4, %r13
	cmpl	$0, 208(%rsp,%rax)
	je	.LBB1_5
# %bb.10:
.Ltmp12:
	.cfi_escape 0x2e, 0x00
	movq	136(%rsp), %rdi                 # 8-byte Reload
                                        # kill: def $edi killed $edi killed $rdi
	movq	152(%rsp), %r13                 # 8-byte Reload
	movl	%r13d, %esi
	callq	_Z16checkDeviceSpecsii
.Ltmp13:
# %bb.11:                               # %.preheader.preheader
	movl	%eax, %ebp
	leaq	56(%rsp), %rbx
	movq	168(%rsp), %r12                 # 8-byte Reload
.LBB1_12:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
.Ltmp15:
	.cfi_escape 0x2e, 0x00
	movl	$4, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
.Ltmp16:
# %bb.13:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit
                                        #   in Loop: Header=BB1_12 Depth=1
.Ltmp18:
	.cfi_escape 0x2e, 0x00
	callq	hipGetLastError
.Ltmp19:
# %bb.14:                               #   in Loop: Header=BB1_12 Depth=1
	testl	%eax, %eax
	je	.LBB1_22
# %bb.15:                               #   in Loop: Header=BB1_12 Depth=1
.Ltmp20:
	.cfi_escape 0x2e, 0x00
	movl	%eax, %edi
	callq	hipGetErrorString
.Ltmp21:
# %bb.16:                               #   in Loop: Header=BB1_12 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.Ltmp22:
	.cfi_escape 0x2e, 0x00
	movl	$10, %edi
	callq	sleep
.Ltmp23:
	jmp	.LBB1_12
.LBB1_22:
.Ltmp25:
	movl	%ebp, 116(%rsp)                 # 4-byte Spill
	.cfi_escape 0x2e, 0x00
	leaq	56(%rsp), %rdi
	movq	24(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp26:
# %bb.23:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit178
.Ltmp27:
	.cfi_escape 0x2e, 0x00
	leaq	104(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp28:
# %bb.24:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit179
.Ltmp29:
	.cfi_escape 0x2e, 0x00
	leaq	96(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp30:
# %bb.25:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit180
.Ltmp31:
	.cfi_escape 0x2e, 0x00
	leaq	88(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp32:
# %bb.26:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit181
	movl	%r13d, %r14d
	shlq	$2, %r14
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
.Ltmp34:
	.cfi_escape 0x2e, 0x00
	leaq	48(%rsp), %rdi
	movq	%r14, %r15
	movq	%r14, %rsi
	callq	hipMalloc
.Ltmp35:
# %bb.27:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit182
	.cfi_escape 0x2e, 0x00
	movq	%r15, %r14
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbp
.Ltmp36:
	.cfi_escape 0x2e, 0x00
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp37:
# %bb.28:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit183
	.cfi_escape 0x2e, 0x00
	movq	%rbx, 144(%rsp)                 # 8-byte Spill
	movq	%r12, %rbx
	movq	%r15, %r12
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
.Ltmp38:
	.cfi_escape 0x2e, 0x00
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbx, %r12
	movq	144(%rsp), %rbx                 # 8-byte Reload
	callq	hipMalloc
.Ltmp39:
# %bb.29:                               # %_ZL9hipMallocIfE10hipError_tPPT_m.exit184
	movq	56(%rsp), %rdi
.Ltmp40:
	.cfi_escape 0x2e, 0x00
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp41:
# %bb.30:
	movq	104(%rsp), %rdi
.Ltmp42:
	.cfi_escape 0x2e, 0x00
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp43:
# %bb.31:
	movq	96(%rsp), %rdi
.Ltmp44:
	.cfi_escape 0x2e, 0x00
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp45:
# %bb.32:
	movq	88(%rsp), %rdi
.Ltmp46:
	.cfi_escape 0x2e, 0x00
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp47:
# %bb.33:
	movq	48(%rsp), %rdi
.Ltmp48:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp49:
# %bb.34:
	movq	40(%rsp), %rdi
.Ltmp50:
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp51:
# %bb.35:
	movq	32(%rsp), %rdi
.Ltmp52:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp53:
# %bb.36:
	cmpq	$0, 16(%rsp)                    # 8-byte Folded Reload
	je	.LBB1_43
# %bb.37:
	cmpq	$0, 80(%rsp)                    # 8-byte Folded Reload
	je	.LBB1_43
# %bb.38:
	cmpq	$0, 72(%rsp)                    # 8-byte Folded Reload
	je	.LBB1_43
# %bb.39:
	cmpq	$0, 64(%rsp)                    # 8-byte Folded Reload
	je	.LBB1_43
# %bb.40:
	testq	%rbx, %rbx
	je	.LBB1_43
# %bb.41:
	testq	%rbp, %rbp
	je	.LBB1_43
# %bb.42:
	testq	%r14, %r14
	jne	.LBB1_44
.LBB1_43:
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB1_44:
	cmpq	$0, 56(%rsp)
	je	.LBB1_51
# %bb.45:
	cmpq	$0, 104(%rsp)
	je	.LBB1_51
# %bb.46:
	cmpq	$0, 96(%rsp)
	je	.LBB1_51
# %bb.47:
	cmpq	$0, 88(%rsp)
	je	.LBB1_51
# %bb.48:
	cmpq	$0, 48(%rsp)
	je	.LBB1_51
# %bb.49:
	cmpq	$0, 40(%rsp)
	je	.LBB1_51
# %bb.50:
	cmpq	$0, 32(%rsp)
	jne	.LBB1_52
.LBB1_51:
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB1_52:
.Ltmp54:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %edi
	callq	_Z14checkCUDAerrorPKc
.Ltmp55:
# %bb.53:
	cvtsi2ss	%r13d, %xmm0
	movl	116(%rsp), %r13d                # 4-byte Reload
	cvtsi2ss	%r13d, %xmm1
	divss	%xmm1, %xmm0
	.cfi_escape 0x2e, 0x00
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	movl	%r13d, %ecx
	imull	%ebx, %ecx
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.4, %edi
	movl	%r13d, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	btsq	$32, %rbx
	movl	%r13d, %edx
	btsq	$32, %rdx
.Ltmp57:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	144(%rsp), %rbx                 # 8-byte Reload
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp58:
# %bb.54:
	testl	%eax, %eax
	jne	.LBB1_56
# %bb.55:
	movq	56(%rsp), %rdi
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
.Ltmp59:
	.cfi_escape 0x2e, 0x20
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movss	120(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	20(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	16(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	8(%rsp), %xmm4                  # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	152(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.Ltmp60:
.LBB1_56:
.Ltmp61:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.5, %edi
	callq	_Z14checkCUDAerrorPKc
.Ltmp62:
# %bb.57:
	movq	48(%rsp), %rsi
.Ltmp63:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp64:
# %bb.58:
	movq	40(%rsp), %rsi
.Ltmp65:
	.cfi_escape 0x2e, 0x00
	movq	%rbp, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp66:
# %bb.59:
	movq	32(%rsp), %rsi
.Ltmp67:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp68:
# %bb.60:
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.6, %esi
	movq	160(%rsp), %rdi                 # 8-byte Reload
	callq	fopen
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.7, %edi
	movl	$26, %esi
	movl	$1, %edx
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rax, %rcx
	callq	fwrite@PLT
	testl	%r12d, %r12d
	movss	4(%rsp), %xmm2                  # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	(%rsp), %xmm4                   # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	8(%rsp), %xmm5                  # 4-byte Reload
                                        # xmm5 = mem[0],zero,zero,zero
	movq	%r12, %r13
	movq	%rbx, %r12
	movq	%r14, %rbx
	movq	%rbp, %r14
	movq	152(%rsp), %rbp                 # 8-byte Reload
	je	.LBB1_63
# %bb.61:                               # %.lr.ph.preheader
	cmpl	$1, %ebp
	adcl	$0, %ebp
	xorl	%r15d, %r15d
	movss	%xmm2, 4(%rsp)                  # 4-byte Spill
	movss	%xmm4, (%rsp)                   # 4-byte Spill
.LBB1_62:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %eax
	cltd
	idivl	%r13d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edx, %xmm1
	mulss	%xmm3, %xmm0
	addss	%xmm2, %xmm0
	mulss	%xmm5, %xmm1
	addss	%xmm4, %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	(%r12,%r15,4), %xmm2
	xorps	%xmm3, %xmm3
	cvtss2sd	(%r14,%r15,4), %xmm3
	xorps	%xmm4, %xmm4
	cvtss2sd	(%rbx,%r15,4), %xmm4
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.8, %esi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movb	$5, %al
	callq	fprintf
	movss	8(%rsp), %xmm5                  # 4-byte Reload
                                        # xmm5 = mem[0],zero,zero,zero
	movss	(%rsp), %xmm4                   # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	12(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movss	4(%rsp), %xmm2                  # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	incq	%r15
	cmpq	%r15, %rbp
	jne	.LBB1_62
.LBB1_63:                               # %._crit_edge
	.cfi_escape 0x2e, 0x00
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	.cfi_escape 0x2e, 0x00
	leaq	176(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	addq	$696, %rsp                      # imm = 0x2B8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_19:
	.cfi_def_cfa_offset 752
.Ltmp14:
	jmp	.LBB1_67
.LBB1_17:
.Ltmp2:
	jmp	.LBB1_67
.LBB1_64:
.Ltmp33:
	jmp	.LBB1_67
.LBB1_65:
.Ltmp69:
	jmp	.LBB1_67
.LBB1_66:
.Ltmp56:
	jmp	.LBB1_67
.LBB1_20:
.Ltmp17:
	jmp	.LBB1_67
.LBB1_21:
.Ltmp24:
	jmp	.LBB1_67
.LBB1_18:
.Ltmp11:
.LBB1_67:
	movq	%rax, %rbx
	.cfi_escape 0x2e, 0x00
	leaq	176(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp10-.Ltmp3                 #   Call between .Ltmp3 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp23-.Ltmp18                #   Call between .Ltmp18 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp32-.Ltmp25                #   Call between .Ltmp25 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp55-.Ltmp34                #   Call between .Ltmp34 and .Ltmp55
	.uleb128 .Ltmp56-.Lfunc_begin0          #     jumps to .Ltmp56
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp57-.Ltmp55                #   Call between .Ltmp55 and .Ltmp57
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp68-.Ltmp57                #   Call between .Ltmp57 and .Ltmp68
	.uleb128 .Ltmp69-.Lfunc_begin0          #     jumps to .Ltmp69
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp68-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Lfunc_end1-.Ltmp68            #   Call between .Ltmp68 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z16checkDeviceSpecsii
.LCPI2_0:
	.long	0x35800000                      # float 9.53674316E-7
	.text
	.globl	_Z16checkDeviceSpecsii
	.type	_Z16checkDeviceSpecsii,@function
_Z16checkDeviceSpecsii:                 # @_Z16checkDeviceSpecsii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 1536
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
                                        # kill: def $edi killed $edi def $rdi
	shll	$4, %edi
	leal	(%rbx,%rbx,2), %eax
	leal	(%rdi,%rax,4), %ebp
	movl	$.L.str.11, %edi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %rdi
	movl	$0, (%rdi)
	callq	hipGetDeviceCount
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	movl	%eax, %r14d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %edi
	movl	%r14d, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
.LBB2_2:
	movl	12(%rsp), %esi
	testl	%esi, %esi
	je	.LBB2_3
# %bb.4:
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_5
.LBB2_3:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB2_5:
	cmpl	$0, 12(%rsp)
	jle	.LBB2_6
# %bb.7:                                # %.lr.ph
	movslq	%ebp, %r12
	leaq	16(%rsp), %r14
	xorl	%ebp, %ebp
.LBB2_8:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str.15, %edi
	movl	%ebp, %esi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	304(%rsp), %rsi
	testq	%rsi, %rsi
	js	.LBB2_9
# %bb.10:                               #   in Loop: Header=BB2_8 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rsi, %xmm0
	jmp	.LBB2_11
.LBB2_9:                                #   in Loop: Header=BB2_8 Depth=1
	movq	%rsi, %rax
	shrq	%rax
	movl	%esi, %ecx
	andl	$1, %ecx
	orq	%rax, %rcx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rcx, %xmm0
	addss	%xmm0, %xmm0
.LBB2_11:                               #   in Loop: Header=BB2_8 Depth=1
	mulss	.LCPI2_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.16, %edi
	movb	$1, %al
	callq	printf
	movl	336(%rsp), %esi
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	cmpq	%r12, 304(%rsp)
	jb	.LBB2_12
# %bb.14:                               #   in Loop: Header=BB2_8 Depth=1
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	336(%rsp), %r15d
	movl	348(%rsp), %ecx
	movl	%ebx, %eax
	cltd
	idivl	%r15d
	imull	344(%rsp), %ecx
	cmpl	%eax, %ecx
	jl	.LBB2_15
# %bb.16:                               #   in Loop: Header=BB2_8 Depth=1
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	incl	%ebp
	cmpl	12(%rsp), %ebp
	jl	.LBB2_8
	jmp	.LBB2_17
.LBB2_6:
	xorl	%r15d, %r15d
.LBB2_17:                               # %._crit_edge
	movl	%r15d, %eax
	addq	$1488, %rsp                     # imm = 0x5D0
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_12:
	.cfi_def_cfa_offset 1536
	movl	$.Lstr.7, %edi
	jmp	.LBB2_13
.LBB2_15:
	movl	$.Lstr.6, %edi
.LBB2_13:
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z16checkDeviceSpecsii, .Lfunc_end2-_Z16checkDeviceSpecsii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAerrorPKc           # -- Begin function _Z14checkCUDAerrorPKc
	.type	_Z14checkCUDAerrorPKc,@function
_Z14checkCUDAerrorPKc:                  # @_Z14checkCUDAerrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z14checkCUDAerrorPKc, .Lfunc_end3-_Z14checkCUDAerrorPKc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9mApKernelPfS_S_S_S_S_S_ififfff, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9mApKernelPfS_S_S_S_S_S_ififfff,@object # @_Z9mApKernelPfS_S_S_S_S_S_ififfff
	.section	.rodata,"a",@progbits
	.globl	_Z9mApKernelPfS_S_S_S_S_S_ififfff
	.p2align	3, 0x0
_Z9mApKernelPfS_S_S_S_S_S_ififfff:
	.quad	_Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff
	.size	_Z9mApKernelPfS_S_S_S_S_S_ififfff, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"gotta wait for a bit!: %s\n"
	.size	.L.str, 27

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"memory"
	.size	.L.str.3, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" theads per block: %d and blocks per grid: %d for a total of: %d\n"
	.size	.L.str.4, 66

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"kernel"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"w"
	.size	.L.str.6, 2

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" # ra  dec  mAp  Var S/N \n"
	.size	.L.str.7, 27

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%f %f %f %f %f \n"
	.size	.L.str.8, 17

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str.10, 21

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Requirements: %d calculations and %d bytes memory on the GPU \n\n"
	.size	.L.str.11, 64

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"hipGetDeviceCount returned %d\n-> %s\n"
	.size	.L.str.12, 37

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Found %d CUDA Capable device(s)\n"
	.size	.L.str.14, 33

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"\nDevice %d: \"%s\"\n"
	.size	.L.str.15, 18

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"  Total amount of global memory:                 %.0f MBytes (%llu bytes)\n"
	.size	.L.str.16, 75

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"  Maximum number of threads per block:           %d\n"
	.size	.L.str.17, 53

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9mApKernelPfS_S_S_S_S_S_ififfff"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"can't allocate memory on host "
	.size	.Lstr, 31

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"can't allocate memory on device "
	.size	.Lstr.1, 33

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"successfuly completed!"
	.size	.Lstr.2, 23

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"There is no device supporting CUDA"
	.size	.Lstr.3, 35

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Hurrah! This device has enough memory to perform this calculation"
	.size	.Lstr.4, 66

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Hurrah! This device supports enough threads to do this calculation"
	.size	.Lstr.5, 67

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"FAILURE: Not enough threads on the device to do this calculation!"
	.size	.Lstr.6, 66

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	" FAILURE: Not eneough memeory on device for this calculation! "
	.size	.Lstr.7, 63

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__mApKernelPfS_S_S_S_S_S_ififfff
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9mApKernelPfS_S_S_S_S_S_ififfff
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9mApKernelPfS_S_S_S_S_S_ififfff ; -- Begin function _Z9mApKernelPfS_S_S_S_S_S_ififfff
	.globl	_Z9mApKernelPfS_S_S_S_S_S_ififfff
	.p2align	8
	.type	_Z9mApKernelPfS_S_S_S_S_S_ififfff,@function
_Z9mApKernelPfS_S_S_S_S_S_ififfff:      ; @_Z9mApKernelPfS_S_S_S_S_S_ififfff
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x64
	s_load_b128 s[24:27], s[0:1], 0x38
	s_load_b256 s[16:23], s[0:1], 0x0
	s_load_b256 s[4:11], s[0:1], 0x20
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_lt_i32 s24, 1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_cbranch_scc1 .LBB0_37
; %bb.1:                                ; %.lr.ph
	v_cvt_f64_f32_e32 v[3:4], s25
	s_ashr_i32 s40, s26, 31
	v_cvt_f32_i32_e32 v8, s26
	s_add_i32 s2, s26, s40
	s_mov_b32 s10, 0x54442d18
	s_xor_b32 s41, s2, s40
	s_mov_b32 s12, 0
	v_cvt_f32_u32_e32 v0, s41
	s_sub_i32 s2, 0, s41
	s_mov_b32 s14, 0x652b82fe
	s_mov_b32 s28, 0xfefa39ef
	s_mov_b32 s30, 0x3b39803f
	v_rcp_iflag_f32_e32 v0, v0
	s_mov_b32 s34, 0xfca7ab0c
	s_mov_b32 s36, 0x6a5dcb37
	s_mov_b32 s38, 0x623fde64
	s_mov_b32 s42, 0x14761f6e
	s_mov_b32 s44, 0x1852b7b0
	s_mov_b32 s46, 0x11122322
	s_mov_b32 s48, 0x555502a1
	s_mov_b32 s50, 0x55555511
	s_mov_b32 s52, 11
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_mov_b32 s54, 0
	s_mov_b32 s26, 0x3b2d2a58
	s_mov_b32 s11, 0x400921fb
	s_mov_b32 s33, 0xbbbac73d
	v_cvt_u32_f32_e32 v0, v0
	s_mov_b32 s13, 0xc062c000
	s_mov_b32 s15, 0x3ff71547
	s_mov_b32 s29, 0xbfe62e42
	s_mov_b32 s31, 0xbc7abc9e
	v_mul_lo_u32 v7, s2, v0
	s_load_b128 s[0:3], s[0:1], 0x48
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s3, 0xc00921fb
	s_mov_b32 s35, 0x3e928af3
	s_mov_b32 s37, 0x3e5ade15
	s_mov_b32 s39, 0x3ec71dee
	v_mul_f64 v[5:6], 0x3ff80000, v[3:4]
	v_add_nc_u32_e32 v4, v1, v2
	v_mul_hi_u32 v3, v0, v7
	s_mov_b32 s43, 0x3f2a01a0
	s_mov_b32 s45, 0x3f56c16c
	s_mov_b32 s47, 0x3f811111
	v_xor_b32_e32 v7, v4, v2
	s_mov_b32 s49, 0x3fa55555
	s_mov_b32 s51, 0x3fc55555
	s_mov_b32 s53, 0x3fe00000
	v_add_nc_u32_e32 v0, v0, v3
	v_cvt_f32_i32_e32 v3, v1
	s_mov_b32 s55, 0x40490000
	s_mov_b32 s56, 0xb94c1982
	s_mov_b32 s57, 0x37d75334
	v_mul_hi_u32 v0, v7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v0, s41
	v_add_nc_u32_e32 v10, 1, v0
	v_sub_nc_u32_e32 v7, v7, v9
	v_xor_b32_e32 v9, s40, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s41, v7
	v_cvt_i32_f64_e32 v5, v[5:6]
	v_subrev_nc_u32_e32 v6, s41, v7
	v_cndmask_b32_e32 v0, v0, v10, vcc_lo
	v_mov_b32_e32 v4, 0
	v_dual_cndmask_b32 v6, v7, v6 :: v_dual_add_nc_u32 v7, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_le_u32_e32 vcc_lo, s41, v6
	v_mov_b32_e32 v6, 0
	s_mov_b32 s40, 0x7c89e6b0
	s_mov_b32 s41, 0x3efa0199
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
	v_xor_b32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v9
	v_cvt_f32_i32_e32 v7, v0
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f32 v8, -v8, v7, v3
	v_mov_b32_e32 v3, 0
	v_fma_f32 v7, v7, s27, s1
	v_cvt_f32_i32_e32 v9, v5
	v_mov_b32_e32 v5, 0
	v_fma_f32 v8, v8, s0, s2
	s_mov_b32 s27, 0x7fffff
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s0, s[20:21], 0x0
	s_mov_b32 s58, exec_lo
	s_waitcnt lgkmcnt(0)
	v_subrev_f32_e32 v12, s0, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f32_e64 |v12|, v9
	s_cbranch_execz .LBB0_36
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s0, s[22:23], 0x0
	s_mov_b32 s59, exec_lo
	s_waitcnt lgkmcnt(0)
	v_subrev_f32_e32 v13, s0, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f32_e64 |v13|, v9
	s_cbranch_execz .LBB0_35
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_neq_f32_e64 s0, 0, v12
	v_cmp_neq_f32_e64 s1, 0, v13
	v_cmp_eq_f32_e32 vcc_lo, 0, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_saveexec_b32 s60, s0
	s_cbranch_execz .LBB0_34
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e32 v10, v13, v13
	s_mov_b32 s61, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v12, v12
	v_mul_f32_e32 v11, 0x4f800000, v10
	v_cmp_gt_f32_e64 s0, 0xf800000, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v10, v11, s0
	v_sqrt_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v15, 1, v11
	v_add_nc_u32_e32 v14, -1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v15, v11, v10
	v_fma_f32 v16, -v14, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s1, 0, v16
	v_cndmask_b32_e64 v11, v11, v14, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s1, 0, v17
	v_cndmask_b32_e64 v11, v11, v15, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, 0x37800000, v11
	v_cndmask_b32_e64 v11, v11, v14, s0
	v_cmp_class_f32_e64 s0, v10, 0x260
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v11, v11, v10, s0
	v_cmpx_ngt_f32_e64 |v11|, v9
	s_cbranch_execz .LBB0_33
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_lt_f32_e64 s0, 0, v13
	v_mov_b32_e32 v10, 0x3fc90fdb
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s0
	s_xor_b32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s62, s1
	s_cbranch_execz .LBB0_20
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_gt_f32_e64 s1, 0, v13
	v_mov_b32_e32 v10, 0xbfc90fdb
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s1
	s_xor_b32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s63, s2
	s_cbranch_execz .LBB0_19
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_nlt_f32_e32 0, v12
	s_xor_b32 s64, exec_lo, s2
	s_cbranch_execz .LBB0_16
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_cmp_gt_f32_e32 vcc_lo, 0, v12
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, -1
	s_and_saveexec_b32 s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s2
	s_cbranch_execz .LBB0_13
; %bb.10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_and_b32 s2, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_div_scale_f32 v3, null, v12, v12, v13
	s_mov_b32 s2, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v3, v10, 1.0
	v_fmac_f32_e32 v10, v14, v10
	v_div_scale_f32 v14, vcc_lo, v13, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v10
	v_fma_f32 v16, -v3, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v16, v10
	v_fma_f32 v3, -v3, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v10, v15
	v_div_fixup_f32 v3, v3, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v10, |v3|
	v_cmp_gt_f32_e64 vcc_lo, |v3|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v10, |v3|, v10, vcc_lo
	v_mul_f32_e32 v12, v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, s26, v12, 0xbc7a590c
	v_fmaak_f32 v13, v12, v13, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbd97d4d7
	v_fmaak_f32 v13, v12, v13, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbe1160e6
	v_fmaak_f32 v13, v12, v13, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbeaaaa62
	v_mul_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v10, v12
	v_sub_f32_e32 v12, 0x3fc90fdb, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	v_bfi_b32 v3, 0x7fffffff, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[12:13], v3
	v_add_f64 v[12:13], v[12:13], s[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v3, v[12:13]
.LBB0_12:                               ; %Flow183
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
.LBB0_13:                               ; %Flow184
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_2 Depth=1
	v_div_scale_f32 v3, null, v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v3, v10, 1.0
	v_fmac_f32_e32 v10, v14, v10
	v_div_scale_f32 v14, vcc_lo, v13, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v10
	v_fma_f32 v16, -v3, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v16, v10
	v_fma_f32 v3, -v3, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v10, v15
	v_div_fixup_f32 v3, v3, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v10, |v3|
	v_cmp_gt_f32_e64 vcc_lo, |v3|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v10, |v3|, v10, vcc_lo
	v_mul_f32_e32 v12, v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, s26, v12, 0xbc7a590c
	v_fmaak_f32 v13, v12, v13, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbd97d4d7
	v_fmaak_f32 v13, v12, v13, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbe1160e6
	v_fmaak_f32 v13, v12, v13, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbeaaaa62
	v_mul_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v10, v12
	v_sub_f32_e32 v12, 0x3fc90fdb, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	v_bfi_b32 v3, 0x7fffffff, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[12:13], v3
	v_add_f64 v[12:13], v[12:13], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v3, v[12:13]
.LBB0_15:                               ; %Flow185
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr13
.LBB0_16:                               ; %Flow186
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s64
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	v_div_scale_f32 v3, null, v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v3, v10, 1.0
	v_fmac_f32_e32 v10, v14, v10
	v_div_scale_f32 v14, vcc_lo, v13, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v14, v10
	v_fma_f32 v16, -v3, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v16, v10
	v_fma_f32 v3, -v3, v15, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v10, v15
	v_div_fixup_f32 v3, v3, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rcp_f32_e64 v10, |v3|
	v_cmp_gt_f32_e64 vcc_lo, |v3|, 1.0
	s_waitcnt_depctr 0xfff
	v_cndmask_b32_e64 v10, |v3|, v10, vcc_lo
	v_mul_f32_e32 v12, v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, s26, v12, 0xbc7a590c
	v_fmaak_f32 v13, v12, v13, 0x3d29fb3f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbd97d4d7
	v_fmaak_f32 v13, v12, v13, 0x3dd931b2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbe1160e6
	v_fmaak_f32 v13, v12, v13, 0x3e4cb8bf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v13, v12, v13, 0xbeaaaa62
	v_mul_f32_e32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v10, v12
	v_sub_f32_e32 v12, 0x3fc90fdb, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v12, vcc_lo
	v_bfi_b32 v3, 0x7fffffff, v10, v3
.LBB0_18:                               ; %Flow187
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v10, v3
.LBB0_19:                               ; %Flow188
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s63
.LBB0_20:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s62
	v_div_scale_f32 v3, null, s25, s25, v11
	v_div_scale_f32 v14, vcc_lo, v11, s25, v11
	v_rcp_f32_e32 v12, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v3, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v12
	v_mul_f32_e32 v13, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v3, v13, v14
	v_fmac_f32_e32 v13, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v13, v14
	v_div_fmas_f32 v3, v3, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v15, v3, s25, v11
	v_div_scale_f32 v3, null, 0x3e19999a, 0x3e19999a, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v3, v11, 1.0
	v_fmac_f32_e32 v11, v12, v11
	v_div_scale_f32 v12, vcc_lo, v15, 0x3e19999a, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v12, v11
	v_fma_f32 v14, -v3, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v11
                                        ; implicit-def: $vgpr14
	v_fma_f32 v3, -v3, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v11, v13
	v_div_fixup_f32 v11, v3, 0x3e19999a, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e64 s0, 0x3f200000, |v11|
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s1
	s_cbranch_execz .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_f32_e64 v3, |v11|, |v11|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, 0x3fb8aa3b, v3
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v3
	v_rndne_f32_e32 v13, v12
	v_fma_f32 v14, 0x3fb8aa3b, v3, -v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v12, v12, v13
	v_fmac_f32_e32 v14, 0x32a5705f, v3
	v_cvt_i32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v12, v14
	v_exp_f32_e32 v12, v12
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v12, v12, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, 0, v12, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v3
	v_cndmask_b32_e32 v3, 0x7f800000, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, 1.0, v3
	v_rcp_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, v3, -2.0, 1.0
.LBB0_22:                               ; %Flow182
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s0
; %bb.23:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e32 v3, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v12, s33, v3, 0x3ca908c9
	v_fmaak_f32 v12, v3, v12, 0xbd5c1c4e
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v12, v3, v12, 0x3e088382
	v_fmaak_f32 v12, v3, v12, 0xbeaaaa99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v12, |v11|, v12
	v_fma_f32 v14, v3, v12, |v11|
; %bb.24:                               ; %_ZL4tanhf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_load_b32 s62, s[16:17], 0x0
	v_add_f32_e32 v12, v10, v10
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v13, 0x7fffffff, v12
	v_cmp_ngt_f32_e64 s2, 0x48000000, |v12|
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s63, exec_lo, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
	v_and_or_b32 v24, v13, s27, 0x800000
	v_lshrrev_b32_e32 v21, 23, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[16:17], null, 0xfe5163ab, v24, 0
	v_add_nc_u32_e32 v22, 0xffffff88, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v22
	v_mov_b32_e32 v3, v17
	v_cndmask_b32_e64 v23, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[17:18], null, 0x3c439041, v24, v[3:4]
	v_add_nc_u32_e32 v23, v23, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v18
	v_cmp_lt_u32_e64 s0, 31, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[18:19], null, 0xdb629599, v24, v[3:4]
	v_cndmask_b32_e64 v25, 0, 0xffffffe0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v25, v25, v23
	v_dual_mov_b32 v3, v19 :: v_dual_cndmask_b32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v25
	v_mad_u64_u32 v[19:20], null, 0xf534ddc0, v24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v20
	v_cndmask_b32_e32 v17, v19, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[20:21], null, 0xfc2757d1, v24, v[3:4]
	v_cndmask_b32_e64 v16, v17, v16, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v3, v21
	v_mad_u64_u32 v[21:22], null, 0x4e441529, v24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v3, v22
	v_mad_u64_u32 v[22:23], null, 0xa2f9836e, v24, v[3:4]
	v_cndmask_b32_e64 v3, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v24, v21, v19 :: v_dual_add_nc_u32 v3, v3, v25
	v_dual_cndmask_b32 v22, v22, v20 :: v_dual_cndmask_b32 v21, v23, v21
	v_cndmask_b32_e32 v20, v20, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v23, 32, v3
	v_cndmask_b32_e64 v19, v22, v24, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v21, v22, s0
	v_cndmask_b32_e64 v22, v24, v20, s0
	v_cndmask_b32_e64 v20, v20, v17, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v21, v19, s1
	v_cndmask_b32_e64 v19, v19, v22, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v22, v22, v20, s1
	v_cndmask_b32_e64 v16, v20, v16, s1
	v_alignbit_b32 v24, v21, v19, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_alignbit_b32 v18, v19, v22, v23
	v_cndmask_b32_e32 v3, v24, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v17, v18, v19, vcc_lo
	v_alignbit_b32 v21, v22, v16, v23
	v_bfe_u32 v18, v3, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v19, v3, v17, 30
	v_cndmask_b32_e32 v21, v21, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v20, 0, v18
	v_alignbit_b32 v17, v17, v21, 30
	v_alignbit_b32 v16, v21, v16, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v19, v19, v20
	v_xor_b32_e32 v17, v17, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v16, v16, v20
	v_lshrrev_b32_e32 v20, 29, v3
	v_clz_i32_u32_e32 v22, v19
	v_lshrrev_b32_e32 v3, 30, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v20, 31, v20
	v_min_u32_e32 v22, 32, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v23, 0.5, v20
	v_lshlrev_b32_e32 v24, 23, v22
	v_sub_nc_u32_e32 v21, 31, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v23, v23, v24
	v_alignbit_b32 v19, v19, v17, v21
	v_alignbit_b32 v16, v17, v16, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v17, v19, v16, 9
	v_lshrrev_b32_e32 v19, 9, v19
	v_clz_i32_u32_e32 v21, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v21, 32, v21
	v_sub_nc_u32_e32 v25, 31, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v16, v17, v16, v25
	v_or_b32_e32 v17, v19, v23
	v_add_lshl_u32 v19, v21, v22, 23
	v_lshrrev_b32_e32 v16, 9, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v21, 0x3fc90fda, v17
	v_sub_nc_u32_e32 v16, v16, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, 0x3fc90fda, v17, -v21
	v_add_nc_u32_e32 v16, 0x33000000, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v19, 0x33a22168, v17
	v_add_nc_u32_e32 v17, v18, v3
	v_or_b32_e32 v16, v16, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, 0x3fc90fda, v16
	v_add_f32_e32 v16, v21, v19
.LBB0_26:                               ; %Flow181
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s63
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e64 v3, 0x3f22f983, |v12|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v3, v3
	v_fma_f32 v16, 0xbfc90fda, v3, |v12|
	v_cvt_i32_f32_e32 v17, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, 0xb3a22168, v3
	v_fmac_f32_e32 v16, 0xa7c234c4, v3
; %bb.28:                               ; %_ZL3cosf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_load_b32 s63, s[18:19], 0x0
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB0_30
; %bb.29:                               ;   in Loop: Header=BB0_2 Depth=1
	v_and_or_b32 v26, v13, s27, 0x800000
	v_lshrrev_b32_e32 v23, 23, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[18:19], null, 0xfe5163ab, v26, 0
	v_add_nc_u32_e32 v24, 0xffffff88, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v24
	v_mov_b32_e32 v3, v19
	v_cndmask_b32_e64 v25, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[19:20], null, 0x3c439041, v26, v[3:4]
	v_add_nc_u32_e32 v25, v25, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v20
	v_cmp_lt_u32_e64 s0, 31, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[20:21], null, 0xdb629599, v26, v[3:4]
	v_cndmask_b32_e64 v27, 0, 0xffffffe0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v27, v27, v25
	v_dual_mov_b32 v3, v21 :: v_dual_cndmask_b32 v18, v20, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v27
	v_mad_u64_u32 v[21:22], null, 0xf534ddc0, v26, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v3, v22
	v_cndmask_b32_e32 v19, v21, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[22:23], null, 0xfc2757d1, v26, v[3:4]
	v_cndmask_b32_e64 v18, v19, v18, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v3, v23
	v_mad_u64_u32 v[23:24], null, 0x4e441529, v26, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v3, v24
	v_mad_u64_u32 v[24:25], null, 0xa2f9836e, v26, v[3:4]
	v_cndmask_b32_e64 v3, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v26, v23, v21, vcc_lo
	v_dual_cndmask_b32 v24, v24, v22 :: v_dual_add_nc_u32 v3, v3, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v23, v25, v23 :: v_dual_cndmask_b32 v22, v22, v20
	v_sub_nc_u32_e32 v25, 32, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v21, v24, v26, s0
	v_cndmask_b32_e64 v23, v23, v24, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v26, v22, s0
	v_cndmask_b32_e64 v22, v22, v19, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e64 v23, v23, v21, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v21, v24, s1
	v_cndmask_b32_e64 v24, v24, v22, s1
	v_cndmask_b32_e64 v18, v22, v18, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v26, v23, v21, v25
	v_alignbit_b32 v20, v21, v24, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v26, v23, vcc_lo
	v_cndmask_b32_e32 v19, v20, v21, vcc_lo
	v_alignbit_b32 v23, v24, v18, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v20, v3, 29, 1
	v_alignbit_b32 v21, v3, v19, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v23, v23, v24, vcc_lo
	v_sub_nc_u32_e32 v22, 0, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v19, v19, v23, 30
	v_alignbit_b32 v18, v23, v18, 30
	v_xor_b32_e32 v21, v21, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v19, v19, v22
	v_xor_b32_e32 v18, v18, v22
	v_lshrrev_b32_e32 v22, 29, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_clz_i32_u32_e32 v24, v21
	v_lshlrev_b32_e32 v22, 31, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v24, 32, v24
	v_or_b32_e32 v25, 0.5, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v23, 31, v24
	v_lshlrev_b32_e32 v26, 23, v24
	v_alignbit_b32 v21, v21, v19, v23
	v_alignbit_b32 v18, v19, v18, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v25, v25, v26
	v_alignbit_b32 v19, v21, v18, 9
	v_lshrrev_b32_e32 v21, 9, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v23, v19
	v_min_u32_e32 v23, 32, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v27, 31, v23
	v_alignbit_b32 v18, v19, v18, v27
	v_or_b32_e32 v19, v21, v25
	v_add_lshl_u32 v21, v23, v24, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v18, 9, v18
	v_mul_f32_e32 v23, 0x3fc90fda, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, v18, v21
	v_fma_f32 v21, 0x3fc90fda, v19, -v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v18, 0x33000000, v18
	v_fmac_f32_e32 v21, 0x33a22168, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v18, v18, v22
	v_fmac_f32_e32 v21, 0x3fc90fda, v18
	v_lshrrev_b32_e32 v18, 30, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v3, v23, v21 :: v_dual_add_nc_u32 v18, v20, v18
.LBB0_30:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s2
; %bb.31:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e64 v3, 0x3f22f983, |v12|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v18, v3
	v_fma_f32 v3, 0xbfc90fda, v18, |v12|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, 0xb3a22168, v18
	v_fmac_f32_e32 v3, 0xa7c234c4, v18
	v_cvt_i32_f32_e32 v18, v18
; %bb.32:                               ; %_ZL3sinf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_cvt_f64_f32_e32 v[19:20], v15
	v_xor_b32_e32 v13, v13, v12
	v_add_f32_e32 v0, 1.0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[21:22], v[19:20], s[12:13], 0x40180000
	v_fma_f64 v[19:20], v[19:20], s[54:55], 0xc0478000
	v_mul_f64 v[23:24], v[21:22], s[14:15]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[25:26], v[19:20], s[14:15]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[19:20]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[21:22]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[19:20]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[21:22]
	v_rndne_f64_e32 v[23:24], v[23:24]
	v_rndne_f64_e32 v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[27:28], v[23:24], s[28:29], v[21:22]
	v_fma_f64 v[29:30], v[25:26], s[28:29], v[19:20]
	v_cvt_i32_f64_e32 v15, v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], v[23:24], s[30:31], v[27:28]
	v_fma_f64 v[29:30], v[25:26], s[30:31], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], s[36:37], s[34:35]
	v_fma_f64 v[33:34], v[29:30], s[36:37], s[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[38:39]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[40:41]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[42:43]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[44:45]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[46:47]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[48:49]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[50:51]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[52:53]
	v_fma_f64 v[33:34], v[29:30], v[33:34], s[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[27:28], v[31:32], 1.0
	v_fma_f64 v[33:34], v[29:30], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[27:28], v[31:32], 1.0
	v_cvt_i32_f64_e32 v27, v[25:26]
	v_fma_f64 v[25:26], v[29:30], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[23:24], v[23:24], v15
	v_ldexp_f64 v[25:26], v[25:26], v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[23:24], 1.0
	v_cndmask_b32_e32 v15, 0x7ff00000, v26, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v19, 0, v25, vcc_lo
	s_and_b32 vcc_lo, s2, s1
	v_cndmask_b32_e64 v20, 0, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v24, 0x7ff00000, v24, s1
	v_cndmask_b32_e32 v21, 0, v23, vcc_lo
	v_cndmask_b32_e64 v22, 0x3ff00000, v24, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], v[21:22]
	v_div_scale_f64 v[21:22], null, v[19:20], v[19:20], 1.0
	v_div_scale_f64 v[27:28], vcc_lo, 1.0, v[19:20], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[23:24], v[21:22]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[25:26], -v[21:22], v[23:24], 1.0
	v_fma_f64 v[23:24], v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], -v[21:22], v[23:24], 1.0
	v_fma_f64 v[23:24], v[23:24], v[25:26], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[25:26], v[27:28], v[23:24]
	v_fma_f64 v[21:22], -v[21:22], v[25:26], v[27:28]
	v_bfi_b32 v27, 0x7fffffff, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v28, null, v11, v11, v27
	v_rcp_f32_e32 v29, v28
	s_waitcnt_depctr 0xfff
	v_fma_f32 v30, -v28, v29, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v29, v30, v29
	v_div_fmas_f64 v[14:15], v[21:22], v[23:24], v[25:26]
	v_div_scale_f32 v21, vcc_lo, v27, v11, v27
	v_mul_f32_e32 v22, v21, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v28, v22, v21
	v_fmac_f32_e32 v22, v23, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, -v28, v22, v21
	v_div_fmas_f32 v21, v21, v29, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v11, v21, v11, v27
	v_cvt_f64_f32_e32 v[21:22], v11
	v_mul_f32_e32 v11, v16, v16
	v_div_fixup_f64 v[14:15], v[14:15], v[19:20], 1.0
	v_dual_mul_f32 v20, v3, v3 :: v_dual_and_b32 v19, 1, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmaak_f32 v24, s56, v20, 0x3c0881c4
	v_cmp_eq_u32_e32 vcc_lo, 0, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v24, v20, v24, 0xbe2aaa9d
	v_mul_f32_e32 v24, v20, v24
	v_mul_f64 v[14:15], v[14:15], v[21:22]
	v_and_b32_e32 v21, 1, v18
	v_lshlrev_b32_e32 v18, 30, v18
	v_dual_fmaak_f32 v22, s56, v11, 0x3c0881c4 :: v_dual_lshlrev_b32 v17, 30, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v3, v3, v24 :: v_dual_and_b32 v18, 0x80000000, v18
	v_fmaak_f32 v22, v11, v22, 0xbe2aaa9d
	v_fmaak_f32 v23, s57, v11, 0xbab64f3b
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v22, v11, v22 :: v_dual_and_b32 v17, 0x80000000, v17
	v_fmaak_f32 v25, s57, v20, 0xbab64f3b
	v_dual_fmaak_f32 v23, v11, v23, 0x3d2aabf7 :: v_dual_fmac_f32 v16, v16, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v23, v11, v23, 0xbf000004
	v_fma_f32 v11, v11, v23, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, -v16, v11, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_xor_b32_e32 v11, v17, v11
	v_cvt_f32_f64_e32 v14, v[14:15]
	v_fmaak_f32 v15, v20, v25, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v15, v20, v15, 0xbf000004
	v_fma_f32 v15, v20, v15, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, v15, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v12, 0x1f8
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v12, s63, s63
	v_xor3_b32 v3, v13, v18, v3
	v_cndmask_b32_e32 v11, 0x7fc00000, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e64 v12, s62, s62
	v_cndmask_b32_e32 v3, 0x7fc00000, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, s63, v3
	v_fmac_f32_e32 v3, s62, v11
	v_mul_f32_e32 v11, v14, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v5, -v3, v14, v5
	v_dual_mov_b32 v3, v10 :: v_dual_fmac_f32 v6, v11, v12
.LBB0_33:                               ; %Flow189
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s61
.LBB0_34:                               ; %Flow190
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s60
.LBB0_35:                               ; %Flow191
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s59
.LBB0_36:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s58
	s_add_i32 s24, s24, -1
	s_add_u32 s20, s20, 4
	s_addc_u32 s21, s21, 0
	s_add_u32 s22, s22, 4
	s_addc_u32 s23, s23, 0
	s_add_u32 s16, s16, 4
	s_addc_u32 s17, s17, 0
	s_add_u32 s18, s18, 4
	s_addc_u32 s19, s19, 0
	s_cmp_eq_u32 s24, 0
	s_cbranch_scc0 .LBB0_2
.LBB0_37:                               ; %Flow193
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cvt_f64_f32_e32 v[3:4], v0
	v_cvt_f64_f32_e32 v[9:10], v6
	v_div_scale_f32 v17, null, v0, v0, v5
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_rcp_f32_e32 v18, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[3:4], v[3:4]
	v_mul_f64 v[3:4], v[7:8], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[7:8], null, v[3:4], v[3:4], v[9:10]
	v_div_scale_f64 v[15:16], s0, v[9:10], v[3:4], v[9:10]
	v_rcp_f64_e32 v[11:12], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[7:8], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_fma_f64 v[13:14], -v[7:8], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[11:12]
	v_mul_f64 v[13:14], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[7:8], -v[7:8], v[13:14], v[15:16]
	v_fma_f32 v15, -v17, v18, 1.0
	v_div_scale_f32 v16, vcc_lo, v5, v0, v5
	v_fmac_f32_e32 v18, v15, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v16, v18
	v_fma_f32 v19, -v17, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, v19, v18
	v_fma_f32 v16, -v17, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v15, v16, v18, v15
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[7:8], v[7:8], v[11:12], v[13:14]
	v_mul_f32_e32 v11, 0x4f800000, v6
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v6
	v_cndmask_b32_e32 v6, v6, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v11, v6
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v12, -1, v11
	v_add_nc_u32_e32 v13, 1, v11
	v_fma_f32 v14, -v12, v11, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, -v13, v11, v6
	v_cmp_ge_f32_e64 s0, 0, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, v11, v12, s0
	v_cmp_lt_f32_e64 s0, 0, v16
	v_div_fixup_f64 v[3:4], v[7:8], v[3:4], v[9:10]
	v_mul_f32_e32 v8, 0x3fb504f3, v5
	v_div_fixup_f32 v5, v15, v0, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v11, v11, v13, s0
	v_mul_f32_e32 v7, 0x37800000, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v11, v7, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x260
	v_cndmask_b32_e32 v9, v7, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v6, null, v9, v9, v8
	v_div_scale_f32 v11, vcc_lo, v8, v9, v8
	v_rcp_f32_e32 v10, v6
	v_cvt_f32_f64_e32 v12, v[3:4]
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v6, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v7, v10
	v_mul_f32_e32 v13, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v6, v13, v11
	v_fmac_f32_e32 v13, v3, v10
	v_add_co_u32 v3, s0, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v4, s0, s5, v2, s0
	v_fma_f32 v11, -v6, v13, v11
	v_add_co_u32 v6, s0, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, s7, v2, s0
	v_div_fmas_f32 v10, v11, v10, v13
	v_add_co_u32 v0, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_div_fixup_f32 v2, v10, v9, v8
	global_store_b32 v[3:4], v5, off
	global_store_b32 v[6:7], v12, off
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9mApKernelPfS_S_S_S_S_S_ififfff
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 35
		.amdhsa_next_free_sgpr 65
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9mApKernelPfS_S_S_S_S_S_ififfff, .Lfunc_end0-_Z9mApKernelPfS_S_S_S_S_S_ififfff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5512
; NumSgprs: 67
; NumVgprs: 35
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 67
; NumVGPRsForWavesPerEU: 35
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .value_kind:     by_value
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        .value_kind:     hidden_block_count_y
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        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 344
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9mApKernelPfS_S_S_S_S_S_ififfff
    .private_segment_fixed_size: 0
    .sgpr_count:     67
    .sgpr_spill_count: 0
    .symbol:         _Z9mApKernelPfS_S_S_S_S_S_ififfff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     35
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
