
#include <iostream>
#include <cuda.h>
#include <time.h>
#include <math.h>
using namespace std;

    // 테스트 용이므로 일단 자료 크기는 1000으로
    // 1D이니까 그냥 블럭사이즈는 512로
    // EP는 슬라이스의 사이즈

//10만개부터 에러났음. 아마 랜덤 숫자 만들어내는 데, 아니면 GPU메모리 상에서 문제가 발생한 것 같음.
// 만일 화면 데이터를 정렬한다고 하면, 2560x1600 = 4,096,000 픽셀이니까 GPU메모리 상에서의 문제가
// 아니라 랜덤 숫자 만들어내는 곳에서 문제가 발생한 것일 수도...
#define DATASIZE    100000
#define BLOCK_SIZE    512

__global__ void oddevensort ( int * input, unsigned int len, int i )
{
     //개별 블럭의 좌표
    unsigned int tx = threadIdx.x;

    //전체 이미지의 좌표
    unsigned int x = tx + blockDim.x * blockIdx.x;
    //이동에 쓸 임시 변수
    int temp;

    //자료의 길이만큼 돌리는데, 인덱스(i)가 짝수이면 데이터의 짝수자리와 그 다음 숫자를 비교.
    //인덱스가 홀수이면 데이터의 홀수자리와 그 다음 숫자를 비교해서 정렬한다.
    if( i % 2 == 0 )
    {
    		// 길이를 측정안해주면 블럭에 남아있던 자리에 있는 자료가 튀어나올 수 있으니 조심.
    	if( input[x] > input[x+1] && x < len && x % 2 == 0)
    	{
    		temp = input[x+1];
    		input[x+1] = input[x];
        	input[x] = temp;
        }
    }
    else
    {
    	if( input[x] > input[x+1] && x < len && x % 2 != 0)
        {
    		temp = input[x+1];
        	input[x+1] = input[x];
        	input[x] = temp;
        }
    }
    	__syncthreads();
}



int main()
{
    // 테스트에 쓸 숫자 생성
    int TestInput[DATASIZE], TestOutput[DATASIZE];

    srand(time(NULL));

    for( int i = 0; i < DATASIZE; i++ )
    {
        TestInput[i] = rand() % 500;
    }

    //device 설정
    int *devInput, *devOutput;
    //일단 크기는 아니까
    unsigned int MemDataSize = DATASIZE * sizeof(int);

    // device 자리 잡아주고
    cudaMalloc((void**)&devInput, MemDataSize );
    cudaMalloc((void**)&devOutput, MemDataSize );
    cudaMemset( devOutput, 0, MemDataSize );

    // 자리 잡았으면 복사
    cudaMemcpy( devInput, TestInput, MemDataSize, cudaMemcpyHostToDevice);

    // block 크기 설정
    // 1D 이니까, 그냥 간단하게...
    dim3    dimBlocksize( BLOCK_SIZE );
    dim3    dimGridsize( ceil((DATASIZE-1)/(float)BLOCK_SIZE) + 1 );
    // 일단 Max값과 min값을 알아내야됨.
    // 처음부터 끝까지 휙 둘러보면 되니 이건 CPU에게 맡김.

    for( int i=0; i<DATASIZE; i++)
    {
    	oddevensort<<< dimGridsize, dimBlocksize >>>( devInput, DATASIZE, i );
    }

    // 결과물 복사
    cudaMemcpy( TestOutput, devInput, MemDataSize, cudaMemcpyDeviceToHost);

    for( int i=0; i<DATASIZE; i++ )
    {
    	cout << TestOutput[i] << ", ";
    	if( (i+1)%10 == 0 )
    	{
    		cout << endl;
    	}
    }

    // 위에 GPU에 마련한 자리 해소. 그때 그때 해놓는 게 편할 듯
    cudaFree( devInput );
    cudaFree( devOutput );

    return 0;
}

	.file	"tmpxft_00263aad_00000000-6_oddevensort.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z11oddevensortPijiPiji
	.type	_Z33__device_stub__Z11oddevensortPijiPiji, @function
_Z33__device_stub__Z11oddevensortPijiPiji:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11oddevensortPiji(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z33__device_stub__Z11oddevensortPijiPiji, .-_Z33__device_stub__Z11oddevensortPijiPiji
	.globl	_Z11oddevensortPiji
	.type	_Z11oddevensortPiji, @function
_Z11oddevensortPiji:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z11oddevensortPijiPiji
	.cfi_endproc
.LFE3661:
	.size	_Z11oddevensortPiji, .-_Z11oddevensortPiji
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	", "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leaq	-798720(%rsp), %r11
	.cfi_def_cfa 11, 798752
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$1328, %rsp
	.cfi_def_cfa_offset 800080
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	movl	$500, %r12d
	movq	%fs:40, %rax
	movq	%rax, 800040(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L9:
	call	rand@PLT
	leaq	40(%rsp), %rbp
	cltd
	idivl	%r12d
	movl	%edx, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$100000, %rbx
	jne	.L9
	movq	%rsp, %rdi
	movl	$400000, %esi
	xorl	%ebx, %ebx
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$400000, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$400000, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$400000, %edx
	call	cudaMemcpy@PLT
	movl	$8388609, %eax
	movl	$1, 24(%rsp)
	salq	$9, %rax
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	subq	$315, %rax
	movq	%rax, 28(%rsp)
.L11:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	28(%rsp), %rdi
	movl	36(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	(%rsp), %rdi
	movl	%ebx, %edx
	movl	$100000, %esi
	call	_Z33__device_stub__Z11oddevensortPijiPiji
.L10:
	incl	%ebx
	cmpl	$100000, %ebx
	jne	.L11
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$400000, %edx
	leaq	400040(%rsp), %rbp
	movq	%rbp, %rdi
	movl	$1, %ebx
	leaq	_ZSt4cout(%rip), %r12
	call	cudaMemcpy@PLT
.L13:
	movl	-4(%rbp,%rbx,4), %esi
	movq	%r12, %rdi
	call	_ZNSolsEi@PLT
	movl	$2, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movl	%ebx, %eax
	movl	$10, %ecx
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.L12
	movq	%r12, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L12:
	incq	%rbx
	cmpq	$100001, %rbx
	jne	.L13
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	800040(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$800048, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z11oddevensortPiji"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11oddevensortPiji(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <iostream>
#include <hip/hip_runtime.h>
#include <time.h>
#include <math.h>
using namespace std;

    // 테스트 용이므로 일단 자료 크기는 1000으로
    // 1D이니까 그냥 블럭사이즈는 512로
    // EP는 슬라이스의 사이즈

//10만개부터 에러났음. 아마 랜덤 숫자 만들어내는 데, 아니면 GPU메모리 상에서 문제가 발생한 것 같음.
// 만일 화면 데이터를 정렬한다고 하면, 2560x1600 = 4,096,000 픽셀이니까 GPU메모리 상에서의 문제가
// 아니라 랜덤 숫자 만들어내는 곳에서 문제가 발생한 것일 수도...
#define DATASIZE    100000
#define BLOCK_SIZE    512

__global__ void oddevensort ( int * input, unsigned int len, int i )
{
     //개별 블럭의 좌표
    unsigned int tx = threadIdx.x;

    //전체 이미지의 좌표
    unsigned int x = tx + blockDim.x * blockIdx.x;
    //이동에 쓸 임시 변수
    int temp;

    //자료의 길이만큼 돌리는데, 인덱스(i)가 짝수이면 데이터의 짝수자리와 그 다음 숫자를 비교.
    //인덱스가 홀수이면 데이터의 홀수자리와 그 다음 숫자를 비교해서 정렬한다.
    if( i % 2 == 0 )
    {
    		// 길이를 측정안해주면 블럭에 남아있던 자리에 있는 자료가 튀어나올 수 있으니 조심.
    	if( input[x] > input[x+1] && x < len && x % 2 == 0)
    	{
    		temp = input[x+1];
    		input[x+1] = input[x];
        	input[x] = temp;
        }
    }
    else
    {
    	if( input[x] > input[x+1] && x < len && x % 2 != 0)
        {
    		temp = input[x+1];
        	input[x+1] = input[x];
        	input[x] = temp;
        }
    }
    	__syncthreads();
}



int main()
{
    // 테스트에 쓸 숫자 생성
    int TestInput[DATASIZE], TestOutput[DATASIZE];

    srand(time(NULL));

    for( int i = 0; i < DATASIZE; i++ )
    {
        TestInput[i] = rand() % 500;
    }

    //device 설정
    int *devInput, *devOutput;
    //일단 크기는 아니까
    unsigned int MemDataSize = DATASIZE * sizeof(int);

    // device 자리 잡아주고
    hipMalloc((void**)&devInput, MemDataSize );
    hipMalloc((void**)&devOutput, MemDataSize );
    hipMemset( devOutput, 0, MemDataSize );

    // 자리 잡았으면 복사
    hipMemcpy( devInput, TestInput, MemDataSize, hipMemcpyHostToDevice);

    // block 크기 설정
    // 1D 이니까, 그냥 간단하게...
    dim3    dimBlocksize( BLOCK_SIZE );
    dim3    dimGridsize( ceil((DATASIZE-1)/(float)BLOCK_SIZE) + 1 );
    // 일단 Max값과 min값을 알아내야됨.
    // 처음부터 끝까지 휙 둘러보면 되니 이건 CPU에게 맡김.

    for( int i=0; i<DATASIZE; i++)
    {
    	oddevensort<<< dimGridsize, dimBlocksize >>>( devInput, DATASIZE, i );
    }

    // 결과물 복사
    hipMemcpy( TestOutput, devInput, MemDataSize, hipMemcpyDeviceToHost);

    for( int i=0; i<DATASIZE; i++ )
    {
    	cout << TestOutput[i] << ", ";
    	if( (i+1)%10 == 0 )
    	{
    		cout << endl;
    	}
    }

    // 위에 GPU에 마련한 자리 해소. 그때 그때 해놓는 게 편할 듯
    hipFree( devInput );
    hipFree( devOutput );

    return 0;
}

	.text
	.file	"oddevensort.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__oddevensortPiji # -- Begin function _Z26__device_stub__oddevensortPiji
	.type	_Z26__device_stub__oddevensortPiji,@function
_Z26__device_stub__oddevensortPiji:     # @_Z26__device_stub__oddevensortPiji
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11oddevensortPiji, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__oddevensortPiji, .Lfunc_end0-_Z26__device_stub__oddevensortPiji
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$800016, %rsp                   # imm = 0xC3510
	.cfi_def_cfa_offset 800064
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$500, %ecx, %ecx                # imm = 0x1F4
	subl	%ecx, %eax
	movl	%eax, 400016(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$100000, %rbx                   # imm = 0x186A0
	jne	.LBB1_1
# %bb.2:
	movabsq	$4294967493, %rbx               # imm = 0x1000000C5
	movq	%rsp, %r15
	movl	$400000, %esi                   # imm = 0x61A80
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r14
	movl	$400000, %esi                   # imm = 0x61A80
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	xorl	%r14d, %r14d
	movl	$400000, %edx                   # imm = 0x61A80
	xorl	%esi, %esi
	callq	hipMemset
	movq	(%r15), %rdi
	leaq	400016(%rsp), %rsi
	movl	$400000, %edx                   # imm = 0x61A80
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	315(%rbx), %r15
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=1
	movq	(%rsp), %rdi
	movl	$100000, %esi                   # imm = 0x186A0
	movl	%r14d, %edx
	callq	_Z26__device_stub__oddevensortPiji
.LBB1_5:                                #   in Loop: Header=BB1_3 Depth=1
	incl	%r14d
	cmpl	$100000, %r14d                  # imm = 0x186A0
	jne	.LBB1_3
# %bb.6:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$400000, %edx                   # imm = 0x61A80
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$1, %ebx
	xorl	%r14d, %r14d
	movl	$3435973837, %r15d              # imm = 0xCCCCCCCD
	movl	$_ZSt4cout, %r12d
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movl	%ebx, %eax
	imulq	%r15, %rax
	shrq	$35, %rax
	leal	(%rax,%rax,4), %eax
	leal	-1(,%rax,2), %ebp
	movl	16(%rsp,%r14,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cmpl	%r14d, %ebp
	jne	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_9:                                #   in Loop: Header=BB1_7 Depth=1
	incq	%r14
	incl	%ebx
	cmpq	$100000, %r14                   # imm = 0x186A0
	jne	.LBB1_7
# %bb.10:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$800016, %rsp                   # imm = 0xC3510
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11oddevensortPiji, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11oddevensortPiji,@object     # @_Z11oddevensortPiji
	.section	.rodata,"a",@progbits
	.globl	_Z11oddevensortPiji
	.p2align	3, 0x0
_Z11oddevensortPiji:
	.quad	_Z26__device_stub__oddevensortPiji
	.size	_Z11oddevensortPiji, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	", "
	.size	.L.str, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11oddevensortPiji"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__oddevensortPiji
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11oddevensortPiji
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11oddevensortPiji     ; -- Begin function _Z11oddevensortPiji
	.globl	_Z11oddevensortPiji
	.p2align	8
	.type	_Z11oddevensortPiji,@function
_Z11oddevensortPiji:                    ; @_Z11oddevensortPiji
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_bitcmp1_b32 s3, 0
	v_mad_u64_u32 v[2:3], null, s15, s4, v[0:1]
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v1, v3 :: v_dual_add_nc_u32 v0, 1, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_and_b32_e32 v7, 1, v2
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v6, vcc_lo
	v_cmp_eq_u32_e64 s0, 0, v7
	s_clause 0x1
	global_load_b32 v5, v[0:1], off
	global_load_b32 v6, v[3:4], off
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_mov_b32 s1, -1
	s_cbranch_vccz .LBB0_2
; %bb.1:
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v5, v6
	v_cmp_le_u32_e64 s1, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, vcc_lo
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, s1, -1
	s_mov_b32 s1, 0
	s_and_b32 s3, s3, exec_lo
.LBB0_2:                                ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_4
; %bb.3:
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v5, v6
	v_cmp_gt_u32_e64 s1, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, vcc_lo
	s_and_b32 s0, s0, s1
	s_and_not1_b32 s1, s3, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s1, s0
.LBB0_4:                                ; %Flow52
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_6
; %bb.5:                                ; %.sink.split
	s_waitcnt vmcnt(1)
	global_store_b32 v[3:4], v5, off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11oddevensortPiji
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11oddevensortPiji, .Lfunc_end0-_Z11oddevensortPiji
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11oddevensortPiji
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11oddevensortPiji.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
