#include <stdio.h>
#include <sys/resource.h>

#define TILE_SIZE 16
#define SIZE (TILE_SIZE * 256)
#define MALLOC_MATRIX(n) (float*)malloc((n)*(n)*sizeof(float))

float* device_malloc(int n){
	float* m;
	if(cudaMalloc(&m, n*n*sizeof(float)) == cudaErrorMemoryAllocation) return NULL;
	return m;
}

__global__ void gpuPower(float* res, float* inp, int n, int power){
	__shared__ float s_res[TILE_SIZE*TILE_SIZE];
	__shared__ float s_inp[TILE_SIZE*TILE_SIZE];
	__shared__ float s_tmp[TILE_SIZE*TILE_SIZE];
	const unsigned int row = blockIdx.y*blockDim.y + threadIdx.y;
	const unsigned int col = blockIdx.x*blockDim.x + threadIdx.x;
	int pow = 0, idx = 0;
	float sum = 0.0f;

	if(row < n && col < n){
		//copy the input to its share
		s_inp[row*n+col] = inp[row*n+col];
		//set the shared result to the identity matrix
		if(row == col) s_res[row*n+col] = 1.0f;
		else s_res[row*n+col]=0.0f;
	}
	__syncthreads();

	for(pow=0; pow<power; pow++){
		//multiply the matrices
		if(row < n && col < n){
			sum = 0.0f;
			for(idx=0; idx<n; idx++){
				sum = sum + s_res[row*n+idx]*s_inp[idx*n+col];
			}
			s_tmp[row*n+col] = sum;
		}
		__syncthreads();
		//copy temp back to result
		if(row < n && col < n) s_res[row*n+col] = s_tmp[row*n+col];
		__syncthreads();
	}
	__syncthreads();

	//copy the result matrix to global res
	if(row < n && col < n) res[row*n+col] = s_res[row*n+col];
	__syncthreads();
}

void power_gpu(float* result, float* input, int n, int power){
	dim3 bdim(TILE_SIZE, TILE_SIZE);
	dim3 gdim(SIZE/TILE_SIZE, SIZE/TILE_SIZE);

	float* d_result = device_malloc(n);
	float* d_input = device_malloc(n);

	cudaMemcpy(d_input, input, n*n*sizeof(float), cudaMemcpyHostToDevice);

	gpuPower<<<gdim, bdim>>>(d_result, d_input, n, power);

	cudaMemcpy(result, d_result, n*n*sizeof(float), cudaMemcpyDeviceToHost);

	cudaFree(d_result);
	cudaFree(d_input);
}

void power_cpu(float* result, float* input, int n, int power){
	int pow;
	int i, k, r, c;
	float* temp = MALLOC_MATRIX(n);

	//set result to be the identity matrix
	for(i=0; i<n*n; i++){
		if(i/n == i%n) result[i] = 1.0f;
		else result[i] = 0.0f;
	}

	for(pow=0; pow<power; pow++){
		//multiply result*input -> temp
		for(r=0; r<n; r++) for(c=0; c<n; c++){
			float sum = 0;
			for(k=0; k<n; k++){
				sum = sum + result[r*n+k]*input[k*n+c];
			}
			temp[r*n+c] = sum;
		}
		//copy temp back to result
		for(i=0; i<n*n; i++){
			result[i] = temp[i];
		}
	}
}

void printMat(float* mat, int n){
	for(int r=0; r<n; r++){
		for(int c=0; c<n; c++){
			if(c != 0) printf(" ");
			printf("%.3f", mat[r*n+c]);
		}
		printf("\n");
	}
}

int main() {
	int n;
	int power;
	float* mat = NULL;
	float* result = NULL;

	scanf("%d", &n);
	scanf("%d", &power);

	if(power < 0 || n < 0){
		printf("error\n");
		return 1;
	}

	mat = MALLOC_MATRIX(n);
	result = MALLOC_MATRIX(n);
	if(!mat || !result){
		printf("error\n");
		return 1;
	}

	for(int i=0; i<(n*n); i++){
		if(!scanf("%f", &(mat[i]))){
			printf("error\n");
			free(mat);
			free(result);
			return 1;
		}
	}

	power_gpu(result, mat, n, power);

	printMat(mat, n);
	printMat(result, n);
	free(mat);
	free(result);
	return 0;
}


	.file	"tmpxft_002fe406_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13device_malloci
	.type	_Z13device_malloci, @function
_Z13device_malloci:
.LFB2027:
	.cfi_startproc
	endbr64
	imull	%edi, %edi
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movslq	%edi, %rsi
	movq	%rsp, %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edx
	movq	(%rsp), %rax
	cmpl	$2, %edx
	jne	.L2
	xorl	%eax, %eax
.L2:
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13device_malloci, .-_Z13device_malloci
	.globl	_Z9power_cpuPfS_ii
	.type	_Z9power_cpuPfS_ii, @function
_Z9power_cpuPfS_ii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	imull	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r14d, %rdi
	movl	%edx, %ebx
	pushq	%r8
	.cfi_def_cfa_offset 64
	salq	$2, %rdi
	call	malloc@PLT
	xorl	%ecx, %ecx
	movq	%rax, %rsi
.L10:
	movl	%ecx, %eax
	cmpl	%ecx, %r14d
	jle	.L25
	cltd
	movss	.LC0(%rip), %xmm0
	idivl	%ebx
	cmpl	%edx, %eax
	je	.L11
	xorps	%xmm0, %xmm0
.L11:
	movss	%xmm0, 0(%rbp,%rcx,4)
	incq	%rcx
	jmp	.L10
.L25:
	movslq	%ebx, %rdx
	xorl	%r8d, %r8d
	salq	$2, %rdx
.L13:
	cmpl	%r12d, %r8d
	jge	.L26
	xorl	%ecx, %ecx
	xorl	%r9d, %r9d
.L19:
	xorl	%eax, %eax
	cmpl	%ebx, %r9d
	jge	.L17
	leaq	0(%rbp,%rcx), %r11
	leaq	(%rsi,%rcx), %r15
.L16:
	leaq	0(%r13,%rax,4), %r10
	xorl	%edi, %edi
	xorps	%xmm0, %xmm0
.L14:
	movss	(%r11,%rdi,4), %xmm1
	mulss	(%r10), %xmm1
	incq	%rdi
	addq	%rdx, %r10
	addss	%xmm1, %xmm0
	cmpl	%edi, %ebx
	jg	.L14
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpl	%eax, %ebx
	jg	.L16
	incl	%r9d
	addq	%rdx, %rcx
	jmp	.L19
.L17:
	cmpl	%eax, %r14d
	jle	.L27
	movss	(%rsi,%rax,4), %xmm0
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L17
.L27:
	incl	%r8d
	jmp	.L13
.L26:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z9power_cpuPfS_ii, .-_Z9power_cpuPfS_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	" "
.LC3:
	.string	"%.3f"
.LC4:
	.string	"\n"
	.text
	.globl	_Z8printMatPfi
	.type	_Z8printMatPfi, @function
_Z8printMatPfi:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movslq	%esi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r14, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdi, 8(%rsp)
.L29:
	cmpl	%ebx, %ebp
	jge	.L38
	movq	8(%rsp), %rdx
	movslq	%r12d, %rax
	xorl	%r13d, %r13d
	leaq	(%rdx,%rax,4), %r15
.L31:
	testq	%r13, %r13
	je	.L30
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L30:
	cvtss2sd	(%r15,%r13,4), %xmm0
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%r13
	cmpq	%r14, %r13
	jne	.L31
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebp
	call	__printf_chk@PLT
	addl	%ebx, %r12d
	jmp	.L29
.L38:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z8printMatPfi, .-_Z8printMatPfi
	.globl	_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii
	.type	_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii, @function
_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8gpuPowerPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L39:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii, .-_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii
	.globl	_Z8gpuPowerPfS_ii
	.type	_Z8gpuPowerPfS_ii, @function
_Z8gpuPowerPfS_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii
	.cfi_endproc
.LFE2057:
	.size	_Z8gpuPowerPfS_ii, .-_Z8gpuPowerPfS_ii
	.globl	_Z9power_gpuPfS_ii
	.type	_Z9power_gpuPfS_ii, @function
_Z9power_gpuPfS_ii:
.LFB2028:
	.cfi_startproc
	endbr64
	movabsq	$68719476752, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	movl	%edx, %edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	movl	%ebx, %ebp
	imull	%ebx, %ebp
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%rax, 24(%rsp)
	movabsq	$1099511628032, %rax
	movq	%rsi, 8(%rsp)
	movslq	%ebp, %rbp
	movl	$1, 32(%rsp)
	salq	$2, %rbp
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	_Z13device_malloci
	movl	%ebx, %edi
	movq	%rax, %r13
	call	_Z13device_malloci
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movl	32(%rsp), %ecx
	movl	44(%rsp), %esi
	xorl	%r9d, %r9d
	movq	24(%rsp), %rdx
	movq	36(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movl	%r15d, %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_Z31__device_stub__Z8gpuPowerPfS_iiPfS_ii
.L45:
	movq	%rbp, %rdx
	movq	%r13, %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%r13, %rdi
	call	cudaFree@PLT
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9power_gpuPfS_ii, .-_Z9power_gpuPfS_ii
	.section	.rodata.str1.1
.LC5:
	.string	"%d"
.LC6:
	.string	"error\n"
.LC7:
	.string	"%f"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	.LC5(%rip), %rbx
	movq	%rbx, %rdi
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	call	__isoc23_scanf@PLT
	xorl	%eax, %eax
	leaq	4(%rsp), %rsi
	movq	%rbx, %rdi
	call	__isoc23_scanf@PLT
	cmpl	$0, 4(%rsp)
	js	.L48
	movl	(%rsp), %edi
	testl	%edi, %edi
	jns	.L49
.L48:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L50
.L49:
	imull	%edi, %edi
	movslq	%edi, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %rbx
	testq	%rbp, %rbp
	je	.L48
	testq	%rax, %rax
	je	.L48
	movq	%rbp, %r13
	xorl	%r12d, %r12d
	leaq	.LC7(%rip), %r14
	jmp	.L51
.L52:
	incl	%r12d
.L51:
	movl	(%rsp), %edx
	movl	%edx, %eax
	imull	%edx, %eax
	cmpl	%r12d, %eax
	jle	.L57
	movq	%r13, %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	addq	$4, %r13
	call	__isoc23_scanf@PLT
	testl	%eax, %eax
	jne	.L52
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
.L50:
	movl	$1, %eax
	jmp	.L47
.L57:
	movl	4(%rsp), %ecx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z9power_gpuPfS_ii
	movl	(%rsp), %esi
	movq	%rbp, %rdi
	call	_Z8printMatPfi
	movl	(%rsp), %esi
	movq	%rbx, %rdi
	call	_Z8printMatPfi
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	xorl	%eax, %eax
.L47:
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z8gpuPowerPfS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8gpuPowerPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/resource.h>

#define TILE_SIZE 16
#define SIZE (TILE_SIZE * 256)
#define MALLOC_MATRIX(n) (float*)malloc((n)*(n)*sizeof(float))

float* device_malloc(int n){
	float* m;
	if(hipMalloc(&m, n*n*sizeof(float)) == hipErrorOutOfMemory) return NULL;
	return m;
}

__global__ void gpuPower(float* res, float* inp, int n, int power){
	__shared__ float s_res[TILE_SIZE*TILE_SIZE];
	__shared__ float s_inp[TILE_SIZE*TILE_SIZE];
	__shared__ float s_tmp[TILE_SIZE*TILE_SIZE];
	const unsigned int row = blockIdx.y*blockDim.y + threadIdx.y;
	const unsigned int col = blockIdx.x*blockDim.x + threadIdx.x;
	int pow = 0, idx = 0;
	float sum = 0.0f;

	if(row < n && col < n){
		//copy the input to its share
		s_inp[row*n+col] = inp[row*n+col];
		//set the shared result to the identity matrix
		if(row == col) s_res[row*n+col] = 1.0f;
		else s_res[row*n+col]=0.0f;
	}
	__syncthreads();

	for(pow=0; pow<power; pow++){
		//multiply the matrices
		if(row < n && col < n){
			sum = 0.0f;
			for(idx=0; idx<n; idx++){
				sum = sum + s_res[row*n+idx]*s_inp[idx*n+col];
			}
			s_tmp[row*n+col] = sum;
		}
		__syncthreads();
		//copy temp back to result
		if(row < n && col < n) s_res[row*n+col] = s_tmp[row*n+col];
		__syncthreads();
	}
	__syncthreads();

	//copy the result matrix to global res
	if(row < n && col < n) res[row*n+col] = s_res[row*n+col];
	__syncthreads();
}

void power_gpu(float* result, float* input, int n, int power){
	dim3 bdim(TILE_SIZE, TILE_SIZE);
	dim3 gdim(SIZE/TILE_SIZE, SIZE/TILE_SIZE);

	float* d_result = device_malloc(n);
	float* d_input = device_malloc(n);

	hipMemcpy(d_input, input, n*n*sizeof(float), hipMemcpyHostToDevice);

	gpuPower<<<gdim, bdim>>>(d_result, d_input, n, power);

	hipMemcpy(result, d_result, n*n*sizeof(float), hipMemcpyDeviceToHost);

	hipFree(d_result);
	hipFree(d_input);
}

void power_cpu(float* result, float* input, int n, int power){
	int pow;
	int i, k, r, c;
	float* temp = MALLOC_MATRIX(n);

	//set result to be the identity matrix
	for(i=0; i<n*n; i++){
		if(i/n == i%n) result[i] = 1.0f;
		else result[i] = 0.0f;
	}

	for(pow=0; pow<power; pow++){
		//multiply result*input -> temp
		for(r=0; r<n; r++) for(c=0; c<n; c++){
			float sum = 0;
			for(k=0; k<n; k++){
				sum = sum + result[r*n+k]*input[k*n+c];
			}
			temp[r*n+c] = sum;
		}
		//copy temp back to result
		for(i=0; i<n*n; i++){
			result[i] = temp[i];
		}
	}
}

void printMat(float* mat, int n){
	for(int r=0; r<n; r++){
		for(int c=0; c<n; c++){
			if(c != 0) printf(" ");
			printf("%.3f", mat[r*n+c]);
		}
		printf("\n");
	}
}

int main() {
	int n;
	int power;
	float* mat = NULL;
	float* result = NULL;

	scanf("%d", &n);
	scanf("%d", &power);

	if(power < 0 || n < 0){
		printf("error\n");
		return 1;
	}

	mat = MALLOC_MATRIX(n);
	result = MALLOC_MATRIX(n);
	if(!mat || !result){
		printf("error\n");
		return 1;
	}

	for(int i=0; i<(n*n); i++){
		if(!scanf("%f", &(mat[i]))){
			printf("error\n");
			free(mat);
			free(result);
			return 1;
		}
	}

	power_gpu(result, mat, n, power);

	printMat(mat, n);
	printMat(result, n);
	free(mat);
	free(result);
	return 0;
}


	.text
	.file	"main.hip"
	.globl	_Z13device_malloci              # -- Begin function _Z13device_malloci
	.type	_Z13device_malloci,@function
_Z13device_malloci:                     # @_Z13device_malloci
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
                                        # kill: def $edi killed $edi def $rdi
	imull	%edi, %edi
	leaq	(,%rdi,4), %rsi
	movq	%rsp, %rdi
	callq	hipMalloc
	cmpl	$2, %eax
	je	.LBB0_1
# %bb.2:
	movq	(%rsp), %rax
	jmp	.LBB0_3
.LBB0_1:
	xorl	%eax, %eax
.LBB0_3:
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z13device_malloci, .Lfunc_end0-_Z13device_malloci
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__gpuPowerPfS_ii # -- Begin function _Z23__device_stub__gpuPowerPfS_ii
	.type	_Z23__device_stub__gpuPowerPfS_ii,@function
_Z23__device_stub__gpuPowerPfS_ii:      # @_Z23__device_stub__gpuPowerPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8gpuPowerPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__gpuPowerPfS_ii, .Lfunc_end1-_Z23__device_stub__gpuPowerPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9power_gpuPfS_ii              # -- Begin function _Z9power_gpuPfS_ii
	.type	_Z9power_gpuPfS_ii,@function
_Z9power_gpuPfS_ii:                     # @_Z9power_gpuPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, 20(%rsp)                  # 4-byte Spill
	movl	%edx, %r15d
	movq	%rsi, %rbp
	movq	%rdi, %r14
	movl	%edx, %ebx
	imull	%ebx, %ebx
	shlq	$2, %rbx
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$0, %r12d
	cmpl	$2, %eax
	je	.LBB2_2
# %bb.1:
	movq	8(%rsp), %r12
.LBB2_2:
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$0, %r13d
	cmpl	$2, %eax
	je	.LBB2_4
# %bb.3:
	movq	8(%rsp), %r13
.LBB2_4:
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$1099511628032, %rdi            # imm = 0x10000000100
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	%r15d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	callq	_Z23__device_stub__gpuPowerPfS_ii
.LBB2_6:
	movq	%r14, %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	callq	hipFree
	movq	%r13, %rdi
	callq	hipFree
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9power_gpuPfS_ii, .Lfunc_end2-_Z9power_gpuPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9power_cpuPfS_ii
.LCPI3_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z9power_cpuPfS_ii
	.type	_Z9power_cpuPfS_ii,@function
_Z9power_cpuPfS_ii:                     # @_Z9power_cpuPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movl	%edx, %ebp
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %r14
	movl	%edx, %eax
	imull	%eax, %eax
	movq	%rax, %rbx
	leaq	(,%rax,4), %rdi
	callq	malloc
	movq	%rax, %r13
	testl	%ebp, %ebp
	je	.LBB3_5
# %bb.1:                                # %.lr.ph.preheader
	movq	%rbx, %rax
	cmpl	$2, %eax
	movl	$1, %esi
	cmovael	%eax, %esi
	xorl	%ecx, %ecx
	movss	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, %eax
	cltd
	idivl	%ebp
	movaps	%xmm0, %xmm1
	cmpl	%edx, %eax
	je	.LBB3_4
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	xorps	%xmm1, %xmm1
.LBB3_4:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movss	%xmm1, (%r14,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rsi
	jne	.LBB3_2
.LBB3_5:                                # %.preheader57
	movq	%r14, 16(%rsp)                  # 8-byte Spill
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	movq	8(%rsp), %r11                   # 8-byte Reload
	jle	.LBB3_17
# %bb.6:                                # %.preheader56.lr.ph
	movslq	%ebp, %r12
	cmpq	$1, %rbx
	adcq	$0, %rbx
	shlq	$2, %rbx
	movq	%rbx, 24(%rsp)                  # 8-byte Spill
	movl	%ebp, %ebx
	leaq	(,%r12,4), %r14
	xorl	%r15d, %r15d
.LBB3_7:                                # %.preheader56
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_9 Depth 2
                                        #       Child Loop BB3_10 Depth 3
                                        #         Child Loop BB3_11 Depth 4
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	testl	%ebp, %ebp
	movq	16(%rsp), %r15                  # 8-byte Reload
	jle	.LBB3_14
# %bb.8:                                # %.preheader54.preheader
                                        #   in Loop: Header=BB3_7 Depth=1
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB3_9:                                # %.preheader54
                                        #   Parent Loop BB3_7 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_10 Depth 3
                                        #         Child Loop BB3_11 Depth 4
	movl	%eax, %edx
	leaq	(%r15,%rdx,4), %rdx
	movq	%rcx, %rsi
	imulq	%r12, %rsi
	leaq	(,%rsi,4), %rsi
	addq	%r13, %rsi
	movq	%r11, %rdi
	xorl	%r8d, %r8d
.LBB3_10:                               # %.preheader
                                        #   Parent Loop BB3_7 Depth=1
                                        #     Parent Loop BB3_9 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB3_11 Depth 4
	xorps	%xmm0, %xmm0
	movq	%rdi, %r9
	xorl	%r10d, %r10d
.LBB3_11:                               #   Parent Loop BB3_7 Depth=1
                                        #     Parent Loop BB3_9 Depth=2
                                        #       Parent Loop BB3_10 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movss	(%rdx,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	addq	%r14, %r9
	cmpq	%r10, %rbx
	jne	.LBB3_11
# %bb.12:                               # %._crit_edge
                                        #   in Loop: Header=BB3_10 Depth=3
	movss	%xmm0, (%rsi,%r8,4)
	incq	%r8
	addq	$4, %rdi
	cmpq	%rbx, %r8
	jne	.LBB3_10
# %bb.13:                               # %._crit_edge63
                                        #   in Loop: Header=BB3_9 Depth=2
	incq	%rcx
	addl	%ebp, %eax
	cmpq	%rbx, %rcx
	jne	.LBB3_9
.LBB3_14:                               # %.preheader55
                                        #   in Loop: Header=BB3_7 Depth=1
	testl	%ebp, %ebp
	movq	32(%rsp), %r15                  # 8-byte Reload
	je	.LBB3_16
# %bb.15:                               # %.lr.ph66.preheader
                                        #   in Loop: Header=BB3_7 Depth=1
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	memcpy@PLT
	movq	8(%rsp), %r11                   # 8-byte Reload
.LBB3_16:                               # %._crit_edge67
                                        #   in Loop: Header=BB3_7 Depth=1
	incl	%r15d
	cmpl	4(%rsp), %r15d                  # 4-byte Folded Reload
	jne	.LBB3_7
.LBB3_17:                               # %._crit_edge69
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9power_cpuPfS_ii, .Lfunc_end3-_Z9power_cpuPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printMatPfi                  # -- Begin function _Z8printMatPfi
	.type	_Z8printMatPfi,@function
_Z8printMatPfi:                         # @_Z8printMatPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, (%rsp)                    # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB4_7
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%esi, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB4_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	movl	%r12d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r14d, %r14d
.LBB4_3:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	testq	%r14, %r14
	je	.LBB4_5
# %bb.4:                                #   in Loop: Header=BB4_3 Depth=2
	movl	$32, %edi
	callq	putchar@PLT
.LBB4_5:                                #   in Loop: Header=BB4_3 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%r14,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB4_3
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB4_2
.LBB4_7:                                # %._crit_edge15
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z8printMatPfi, .Lfunc_end4-_Z8printMatPfi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	12(%rsp), %rbx
	movl	$.L.str.3, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %r15d
	testl	%r15d, %r15d
	js	.LBB5_10
# %bb.1:
	movl	8(%rsp), %r12d
	testl	%r12d, %r12d
	js	.LBB5_10
# %bb.2:
	movl	%r12d, %ebx
	imull	%ebx, %ebx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	malloc
	testq	%r14, %r14
	je	.LBB5_10
# %bb.3:
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.LBB5_10
# %bb.4:                                # %.preheader
	xorl	%ebp, %ebp
	movl	$0, %edx
	testl	%r12d, %r12d
	je	.LBB5_9
# %bb.5:                                # %.lr.ph.preheader
	movq	%r14, %r15
	xorl	%r12d, %r12d
.LBB5_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.5, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	testl	%eax, %eax
	je	.LBB5_13
# %bb.7:                                #   in Loop: Header=BB5_6 Depth=1
	incq	%r12
	movl	8(%rsp), %edx
	movl	%edx, %eax
	imull	%eax, %eax
	addq	$4, %r15
	cmpq	%rax, %r12
	jb	.LBB5_6
# %bb.8:                                # %._crit_edge.loopexit
	movl	12(%rsp), %r15d
.LBB5_9:                                # %._crit_edge
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	%r15d, %ecx
	callq	_Z9power_gpuPfS_ii
	movl	8(%rsp), %esi
	movq	%r14, %rdi
	callq	_Z8printMatPfi
	movl	8(%rsp), %esi
	movq	%rbx, %rdi
	callq	_Z8printMatPfi
	movq	%r14, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	jmp	.LBB5_12
.LBB5_10:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.LBB5_11:
	movl	$1, %ebp
.LBB5_12:
	movl	%ebp, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_13:                               # %.thread
	.cfi_def_cfa_offset 64
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	%r14, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	jmp	.LBB5_11
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8gpuPowerPfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8gpuPowerPfS_ii,@object       # @_Z8gpuPowerPfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z8gpuPowerPfS_ii
	.p2align	3, 0x0
_Z8gpuPowerPfS_ii:
	.quad	_Z23__device_stub__gpuPowerPfS_ii
	.size	_Z8gpuPowerPfS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%.3f"
	.size	.L.str.1, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d"
	.size	.L.str.3, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%f"
	.size	.L.str.5, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8gpuPowerPfS_ii"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.2,@object                 # @str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.2:
	.asciz	"error"
	.size	.Lstr.2, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__gpuPowerPfS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8gpuPowerPfS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8gpuPowerPfS_ii       ; -- Begin function _Z8gpuPowerPfS_ii
	.globl	_Z8gpuPowerPfS_ii
	.p2align	8
	.type	_Z8gpuPowerPfS_ii,@function
_Z8gpuPowerPfS_ii:                      ; @_Z8gpuPowerPfS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s8, 16
	s_and_b32 s1, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s0, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s1, v[3:4]
	v_max_u32_e32 v2, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s0, s2, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_2
; %bb.1:                                ; %.sink.split
	v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_lshlrev_b32_e32 v2, 2, v2
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	global_load_b32 v3, v[3:4], off
	v_cndmask_b32_e64 v4, 0, 1.0, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_2addr_stride64_b32 v2, v3, v4 offset1:4
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_lt_i32 s3, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_12
; %bb.3:                                ; %.lr.ph79
	v_mul_lo_u32 v3, v0, s2
	v_lshlrev_b32_e32 v2, 2, v1
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s6, 0
	s_cselect_b32 s1, -1, 0
	s_lshl_b32 s7, s2, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v5, v3, v1, 2
	v_lshl_add_u32 v3, v3, 2, 0x400
	v_add_nc_u32_e32 v4, 0x800, v5
	v_add_nc_u32_e32 v5, 0x400, v5
.LBB0_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB0_9
; %bb.5:                                ; %.preheader
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_mov_b32_e32 v6, 0
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_8
; %bb.6:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v8, v2
	s_mov_b32 s9, s2
.LBB0_7:                                ; %.lr.ph
                                        ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v9, v7
	ds_load_b32 v10, v8
	v_add_nc_u32_e32 v8, s7, v8
	v_add_nc_u32_e32 v7, 4, v7
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s9, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v6, v9, v10
	s_cbranch_scc1 .LBB0_7
.LBB0_8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=1
	ds_store_b32 v4, v6
.LBB0_9:                                ; %Flow101
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s8, s0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_4 Depth=1
	ds_load_b32 v6, v4
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v5, v6
.LBB0_11:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s6, s6, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s6, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_4
.LBB0_12:                               ; %._crit_edge80
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_mad_u64_u32 v[2:3], null, v0, s2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v0, 2, v2
	ds_load_b32 v4, v0 offset:1024
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8gpuPowerPfS_ii
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8gpuPowerPfS_ii, .Lfunc_end0-_Z8gpuPowerPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 552
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8gpuPowerPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8gpuPowerPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
