////////////////////////////////////////////////////////////////
//  2D FDTD solution for Mur's Absorbing Boundary Condition
//  Using GPU acceleration (CUDA implementation)
//       Simple harmonic excitation source
//////////////////////////////////////////////////////////////
//  Set your code generation to "compute_20,sm_20"
//  when you compile this code.
//////////////////////////////////////////////////////////////

#include <iostream>
#include <stdlib.h>
#include <time.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
using namespace std;

#define BLOCK_LENGTH 32

#define PI 3.1415926535897
#define SQRT2 1.414213562373
double mu = 12.56637e-7;
double epsilon = 8.8542e-12;
double cv = 3e8;  //Velocity of light
double sigma = 0; //Electrical conductivity in vacuity

//Coefficients for media
inline double ca(double t)
{
	double tmp = sigma*t / (2 * epsilon);
	return (1 - tmp) / (1 + tmp);
}
inline double cb(double t)
{
	double tmp = t / epsilon;
	return tmp / (1 + tmp*(sigma / 2));
}
inline double cp(double t)
{
	double tmp = sigma*t / (2 * mu);
	return (1 - tmp) / (1 + tmp);
}
inline double cq(double t)
{
	double tmp = t / mu;
	return tmp / (1 + tmp*(sigma / 2));
}

//ezf[i][j] is the electrical field to be calculated, ezfm1[i][j] is electrical field in the previous time step;
//hxfm1[i][j] and hyfm1[i][j] are the magnetic field in the previous time step;
//(width, height) is the total size of the field;
//(s_x, s_y) is the point of source. 't' is the current time. 'dl' is the size of cell. 'dt' is time interval;
//'a' and 'b' are the coeffiecients of the media.
__global__ void calcEz(double *ezf, double *ezfm1, double *hxfm1, double *hyfm1, int width, int height, int s_x, int s_y, int t, double dl, double dt, double a, double b)
{
	int tx = threadIdx.x; int ty = threadIdx.y;
	int thx = blockIdx.x*blockDim.x + tx;
	int thy = blockIdx.y*blockDim.y + ty;
	if (thx < 0 || thy < 0 || thx >= (width - 1) || thy >= (height - 1)) return;

	//All index of elements of H add 1, and 0 is the index for halo elements
	__shared__ double hx[BLOCK_LENGTH + 1][BLOCK_LENGTH + 1];
	__shared__ double hy[BLOCK_LENGTH + 1][BLOCK_LENGTH + 1];
	hx[tx + 1][ty + 1] = hxfm1[width*thy + thx];
	hy[tx + 1][ty + 1] = hyfm1[width*thy + thx];

	//Copy halo elements
	if (tx == 0 && thx != 0) hy[0][ty + 1] = hyfm1[width*thy + thx - 1];
	if (ty == 0 && thy != 0) hx[tx + 1][0] = hxfm1[width*(thy - 1) + thx];

	__syncthreads();

	if (thx == 0 || thy == 0) return;

	if (thx == s_x && thy == s_y)
	{
		//Source
		double frq = 1.5e13;
		ezf[width*thy + thx] = sin(t * dt * 2 * PI * frq);
	}
	else //Recursion
		ezf[width*thy + thx] = a*ezfm1[width*thy + thx] + b*((hy[tx + 1][ty + 1] - hy[tx][ty + 1]) / dl - (hx[tx + 1][ty + 1] - hx[tx + 1][ty]) / dl);
}

__global__ void calcH(double *ezf, double *hxf, double *hxfm1, double *hyf, double *hyfm1, int width, int height, double dl, double p, double q)
{
	int tx = threadIdx.x; int ty = threadIdx.y;
	int thx = blockIdx.x*blockDim.x + tx;
	int thy = blockIdx.y*blockDim.y + ty;
	if (thx < 0 || thy < 0 || thx >= (width - 1) || thy >= (height - 1)) return;

	__shared__ double ez[BLOCK_LENGTH + 1][BLOCK_LENGTH + 1];
	if (tx == 0 && ty == 0)
		ez[0][0] = ezf[width*thy + thx];
	ez[tx + 1][ty] = ezf[width*thy + thx + 1];
	ez[tx][ty + 1] = ezf[width*(thy + 1) + thx];

	__syncthreads();

	hxf[width*thy + thx] = p*hxfm1[width*thy + thx] - q*(ez[tx][ty + 1] - ez[tx][ty]) / dl;
	hyf[width*thy + thx] = p*hyfm1[width*thy + thx] + q*(ez[tx + 1][ty] - ez[tx][ty]) / dl;
}

__global__ void calcVerticalBoundaries(double *ezf, double *ezfm1, double *ezfm2, int width, int height, double coe1, double coe2, double coe3)
{
	int tx = threadIdx.x;
	int thx = blockIdx.x*blockDim.x + tx;

	__shared__ double left[BLOCK_LENGTH + 2];
	__shared__ double l_inner[BLOCK_LENGTH + 2];
	left[tx + 1] = ezfm1[width*thx];
	l_inner[tx + 1] = ezfm1[width*thx + 1];

	__shared__ double right[BLOCK_LENGTH + 2];
	__shared__ double r_inner[BLOCK_LENGTH + 2];
	right[tx + 1] = ezfm1[width*(thx + 1) - 1];
	r_inner[tx + 1] = ezfm1[width*(thx + 1) - 2];

	if (tx == 0 && thx != 0)
	{
		left[0] = ezfm1[width*(thx - 1)];
		l_inner[0] = ezfm1[width*(thx - 1) + 1];

		right[0] = ezfm1[width*thx - 1];
		r_inner[0] = ezfm1[width*thx - 2];
	}
	if (tx == BLOCK_LENGTH - 1 && thx != height - 1)
	{
		left[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 1)];
		l_inner[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 1) + 1];

		right[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 2) - 1];
		r_inner[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 2) - 2];
	}

	__syncthreads();

	if (!(thx == 0 || thx == height - 1))
	{
		ezf[width*thx] = 0 - ezfm2[width*thx + 1] + coe1*(ezf[width*thx + 1] + ezfm2[width*thx]) + coe2*(left[tx + 1] + l_inner[tx + 1]) + coe3*(left[tx + 2] - 2 * left[tx + 1] + left[tx] + l_inner[tx + 2] - 2 * l_inner[tx + 1] + l_inner[tx]);
		ezf[width*thx + width - 1] = 0 - ezfm2[width*(thx + 1) - 2] + coe1*(ezf[width*(thx + 1) - 2] + ezfm2[width*(thx + 1) - 1]) + coe2*(right[tx + 1] + r_inner[tx + 1]) + coe3*(right[tx + 2] - 2 * right[tx + 1] + right[tx] + r_inner[tx + 2] - 2 * r_inner[tx + 1] + r_inner[tx]);
	}
}

__global__ void calcHorizontalBoundaries(double *ezf, double *ezfm1, double *ezfm2, int width, int height, double coe1, double coe2, double coe3)
{
	int tx = threadIdx.x;
	int thx = blockIdx.x*blockDim.x + tx;

	__shared__ double down[BLOCK_LENGTH + 2];
	__shared__ double d_inner[BLOCK_LENGTH + 2];
	down[tx + 1] = ezfm1[thx];
	d_inner[tx + 1] = ezfm1[width + thx];

	__shared__ double up[BLOCK_LENGTH + 2];
	__shared__ double u_inner[BLOCK_LENGTH + 2];
	up[tx + 1] = ezfm1[width*(height - 1) + thx];
	u_inner[tx + 1] = ezfm1[width*(height - 2) + thx];

	if (tx == 0 && thx != 0)
	{
		down[0] = ezfm1[thx - 1];
		d_inner[0] = ezfm1[width + thx - 1];

		up[0] = ezfm1[width*(height - 1) + thx - 1];
		u_inner[0] = ezfm1[width*(height - 2) + thx - 1];
	}
	if (tx == BLOCK_LENGTH - 1 && thx != width - 1)
	{
		down[BLOCK_LENGTH + 1] = ezfm1[thx + 1];
		d_inner[BLOCK_LENGTH + 1] = ezfm1[width + thx + 1];

		up[BLOCK_LENGTH + 1] = ezfm1[width*(height - 1) + thx + 1];
		u_inner[BLOCK_LENGTH + 1] = ezfm1[width*(height - 2) + thx + 1];
	}

	__syncthreads();

	if (!(thx == 0 || thx == width - 1))
	{
		ezf[thx] = 0 - ezfm2[width + thx] + coe1*(ezf[width + thx] + ezfm2[thx]) + coe2*(down[tx + 1] + d_inner[tx + 1]) + coe3*(down[tx + 2] - 2 * down[tx + 1] + down[tx] + d_inner[tx + 2] - 2 * d_inner[tx + 1] + d_inner[tx]);
		ezf[width*(height - 1) + thx] = 0 - ezfm2[width*(height - 2) + thx] + coe1*(ezf[width*(height - 2) + thx] + ezfm2[width*(height - 1) + thx]) + coe2*(up[tx + 1] + u_inner[tx + 1]) + coe3*(up[tx + 2] - 2 * up[tx + 1] + up[tx] + u_inner[tx + 2] - 2 * u_inner[tx + 1] + u_inner[tx]);
	}
}

__global__ void calcCorner(double *ezf, double *ezfm1, int width, int height, double coe)
{
	int thx = blockIdx.x*blockDim.x + threadIdx.x;
	if (thx == 0)      //left-down
		ezf[0] = ezfm1[width + 1] + coe*(ezf[width + 1] - ezfm1[0]);
	else if (thx == 1) //right-down
		ezf[width - 1] = ezfm1[width * 2 - 2] + coe*(ezf[width * 2 - 2] - ezfm1[width - 1]);
	else if (thx == 2) //left-up
		ezf[width*(height - 1)] = ezfm1[width*(height - 2) + 1] + coe*(ezf[width*(height - 2) + 1] - ezfm1[width*(height - 1)]);
	else            //right-up
		ezf[width*height - 1] = ezfm1[width*height - width - 2] + coe*(ezf[width*height - width - 2] - ezfm1[width*height - 1]);
}

int main()
{
	int width = 1024;
	int height = 1024;
	int time = 2000;
	int cx = 32; int cy = 32;
	double dl = 1e-6;
	double st = 1 / SQRT2;
	double dt = st*dl / cv;
	dt = dt / 2;

	cout << "Input width and height of the field: ";
	cin >> width >> height;
	cout << "Input time steps to be calculated: ";
	cin >> time;
	cout << "Input x and y coordinate of the wave source: ";
	cin >> cx >> cy;

	int size = sizeof(double)*width*height;
	double *ezf, *ezfm1, *ezfm2, *hxf, *hxfm1, *hyf, *hyfm1;
	cudaMalloc((void**)&ezf, size); cudaMemset(ezf, 0, size);
	cudaMalloc((void**)&ezfm1, size); cudaMemset(ezfm1, 0, size);
	cudaMalloc((void**)&hxf, size); cudaMemset(hxf, 0, size);
	cudaMalloc((void**)&hyf, size); cudaMemset(hyf, 0, size);

	//Coefficients of media
	double a = ca(dt); double b = cb(dt);
	double p = cp(dt); double q = cq(dt);
	//Coefficients for boundary conditions
	double coe1 = (cv*dt - dl) / (cv*dt + dl);
	double coe2 = (2 * dl) / (cv*dt + dl);
	double coe3 = (cv*cv*dt*dt) / (2 * dl*(cv*dt + dl));
	//Coefficient for the corner
	double coe_cor = (cv*dt - SQRT2*dl) / (cv*dt + SQRT2*dl);

	double t_start, t_end, duration;
	t_start = clock();

	dim3 DimBlock(BLOCK_LENGTH, BLOCK_LENGTH, 1);
	dim3 DimGrid((width - 1) / BLOCK_LENGTH + 1, (height - 1) / BLOCK_LENGTH + 1, 1);

	dim3 db_h(BLOCK_LENGTH, 1, 1);
	dim3 dg_h((height - 1) / BLOCK_LENGTH + 1, 1, 1);
	dim3 db_w(BLOCK_LENGTH, 1, 1);
	dim3 dg_w((width - 1) / BLOCK_LENGTH + 1, 1, 1);
	dim3 db_cor(4, 1, 1); dim3 dg_cor(1, 1, 1);

	for (int t = 0; t < time; t++)
	{
		ezfm2 = ezfm1;
		ezfm1 = ezf;
		cudaMalloc((void**)&ezf, size); cudaMemset(ezf, 0, size);
		hxfm1 = hxf;
		cudaMalloc((void**)&hxf, size); cudaMemset(hxf, 0, size);
		hyfm1 = hyf;
		cudaMalloc((void**)&hyf, size); cudaMemset(hyf, 0, size);

		calcEz<<<DimGrid, DimBlock>>>(ezf, ezfm1, hxfm1, hyfm1, width, height, cx, cy, t, dl, dt, a, b);

		//Boundary conditions
		calcVerticalBoundaries<<<dg_h, db_h>>>(ezf, ezfm1, ezfm2, width, height, coe1, coe2, coe3);
		calcHorizontalBoundaries<<<dg_w, db_w>>>(ezf, ezfm1, ezfm2, width, height, coe1, coe2, coe3);
		//Corner conditions
		calcCorner<<<dg_cor, db_cor>>>(ezf, ezfm1, width, height, coe_cor);

		calcH<<<DimGrid, DimBlock>>>(ezf, hxf, hxfm1, hyf, hyfm1, width, height, dl, p, q);
		
		//Output -------
		//You can add code here to copy data in array 'ezf', 'hxf' and 'hyf' out to output.

		cudaFree(ezfm2); cudaFree(hxfm1); cudaFree(hyfm1);
	}

	double *output = (double*)malloc(size);
	cudaMemcpy(output, ezf, size, cudaMemcpyDeviceToHost);

	t_end = clock();
	duration = t_end - t_start;
	cout << "Time using: " << duration << " ms." << endl << endl;

	for(int i=0;i<height;i++)
	{
		for(int j=0;j<width;j++)
			cout<<output[i*width+j]<<" ";
		cout<<endl;
	}

	free(output);
	cudaFree(ezf); cudaFree(hxf); cudaFree(hyf);
	cudaFree(ezfm1);

	return 0;
}

	.file	"tmpxft_002ca885_00000000-6_FDTD-Mur-CUDA.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd
	.type	_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd, @function
_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	%rdi, 72(%rsp)
	leaq	96(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rdx, 56(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	88(%rsp), %rcx
	movl	%r8d, 44(%rsp)
	movl	%r9d, 40(%rsp)
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movsd	%xmm2, 16(%rsp)
	movsd	%xmm3, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 104(%rsp)
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	88(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z6calcEzPdS_S_S_iiiiidddd(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 288
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	160(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L2:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd, .-_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd
	.globl	_Z6calcEzPdS_S_S_iiiiidddd
	.type	_Z6calcEzPdS_S_S_iiiiidddd, @function
_Z6calcEzPdS_S_S_iiiiidddd:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd
	.cfi_endproc
.LFE3665:
	.size	_Z6calcEzPdS_S_S_iiiiidddd, .-_Z6calcEzPdS_S_S_iiiiidddd
	.globl	_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd
	.type	_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd, @function
_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rdx, 56(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%r8, 40(%rsp)
	movl	%r9d, 36(%rsp)
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 16(%rsp)
	movsd	%xmm2, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 112(%rsp)
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	96(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z5calcHPdS_S_S_S_iiddd(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 272
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L8:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd, .-_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd
	.globl	_Z5calcHPdS_S_S_S_iiddd
	.type	_Z5calcHPdS_S_S_S_iiddd, @function
_Z5calcHPdS_S_S_S_iiddd:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd
	.cfi_endproc
.LFE3667:
	.size	_Z5calcHPdS_S_S_S_iiddd, .-_Z5calcHPdS_S_S_S_iiddd
	.globl	_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd
	.type	_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd, @function
_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movl	%ecx, 36(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 16(%rsp)
	movsd	%xmm2, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z22calcVerticalBoundariesPdS_S_iiddd(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L13:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd, .-_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd
	.globl	_Z22calcVerticalBoundariesPdS_S_iiddd
	.type	_Z22calcVerticalBoundariesPdS_S_iiddd, @function
_Z22calcVerticalBoundariesPdS_S_iiddd:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd
	.cfi_endproc
.LFE3669:
	.size	_Z22calcVerticalBoundariesPdS_S_iiddd, .-_Z22calcVerticalBoundariesPdS_S_iiddd
	.globl	_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd
	.type	_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd, @function
_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd:
.LFB3670:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movl	%ecx, 36(%rsp)
	leaq	80(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 16(%rsp)
	movsd	%xmm2, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z24calcHorizontalBoundariesPdS_S_iiddd(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L18:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd, .-_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd
	.globl	_Z24calcHorizontalBoundariesPdS_S_iiddd
	.type	_Z24calcHorizontalBoundariesPdS_S_iiddd, @function
_Z24calcHorizontalBoundariesPdS_S_iiddd:
.LFB3671:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd
	.cfi_endproc
.LFE3671:
	.size	_Z24calcHorizontalBoundariesPdS_S_iiddd, .-_Z24calcHorizontalBoundariesPdS_S_iiddd
	.globl	_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid
	.type	_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid, @function
_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid:
.LFB3672:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10calcCornerPdS_iid(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3672:
	.size	_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid, .-_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid
	.globl	_Z10calcCornerPdS_iid
	.type	_Z10calcCornerPdS_iid, @function
_Z10calcCornerPdS_iid:
.LFB3673:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid
	.cfi_endproc
.LFE3673:
	.size	_Z10calcCornerPdS_iid, .-_Z10calcCornerPdS_iid
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Input width and height of the field: "
.LC3:
	.string	"Input time steps to be calculated: "
.LC4:
	.string	"Input x and y coordinate of the wave source: "
.LC9:
	.string	"Time using: "
.LC10:
	.string	" ms."
.LC11:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	_ZSt4cout(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rdi
	leaq	_ZSt3cin(%rip), %rbx
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	movsd	.LC0(%rip), %xmm0
	divsd	cv(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	mulsd	.LC1(%rip), %xmm0
	movl	$1024, 84(%rsp)
	movl	$1024, 88(%rsp)
	movl	$2000, 92(%rsp)
	movl	$32, 96(%rsp)
	movl	$32, 100(%rsp)
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	84(%rsp), %rsi
	call	_ZNSirsERi@PLT
	leaq	88(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	movq	%rbp, %rdi
	leaq	.LC3(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	92(%rsp), %rsi
	call	_ZNSirsERi@PLT
	movq	%rbp, %rdi
	leaq	.LC4(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	96(%rsp), %rsi
	call	_ZNSirsERi@PLT
	leaq	100(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	movl	88(%rsp), %ebx
	imull	84(%rsp), %ebx
	leaq	104(%rsp), %rdi
	sall	$3, %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	104(%rsp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	112(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	112(%rsp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	120(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	120(%rsp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	128(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	128(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	call	cudaMemset@PLT
	movsd	sigma(%rip), %xmm0
	movsd	8(%rsp), %xmm1
	movsd	epsilon(%rip), %xmm4
	mulsd	%xmm0, %xmm1
	mulsd	.LC1(%rip), %xmm0
	movaps	%xmm4, %xmm2
	addsd	%xmm4, %xmm2
	movaps	%xmm1, %xmm3
	divsd	%xmm2, %xmm3
	movsd	.LC5(%rip), %xmm2
	movaps	%xmm2, %xmm5
	subsd	%xmm3, %xmm5
	addsd	%xmm2, %xmm3
	divsd	%xmm3, %xmm5
	movsd	%xmm5, 72(%rsp)
	movsd	8(%rsp), %xmm5
	divsd	%xmm4, %xmm5
	movaps	%xmm5, %xmm3
	mulsd	%xmm0, %xmm3
	addsd	%xmm2, %xmm3
	divsd	%xmm3, %xmm5
	movsd	mu(%rip), %xmm3
	movaps	%xmm3, %xmm4
	addsd	%xmm3, %xmm4
	divsd	%xmm4, %xmm1
	movaps	%xmm2, %xmm4
	movsd	%xmm5, 64(%rsp)
	subsd	%xmm1, %xmm4
	addsd	%xmm2, %xmm1
	divsd	%xmm1, %xmm4
	movsd	8(%rsp), %xmm1
	divsd	%xmm3, %xmm1
	movsd	%xmm4, 56(%rsp)
	mulsd	%xmm1, %xmm0
	addsd	%xmm2, %xmm0
	movsd	.LC6(%rip), %xmm2
	divsd	%xmm0, %xmm1
	movsd	cv(%rip), %xmm0
	movsd	%xmm1, 48(%rsp)
	movsd	8(%rsp), %xmm1
	mulsd	%xmm0, %xmm1
	mulsd	%xmm0, %xmm0
	mulsd	8(%rsp), %xmm0
	mulsd	8(%rsp), %xmm0
	addsd	%xmm1, %xmm2
	movaps	%xmm1, %xmm3
	subsd	.LC6(%rip), %xmm3
	divsd	%xmm2, %xmm3
	movq	%xmm3, %r15
	movsd	.LC7(%rip), %xmm3
	movaps	%xmm3, %xmm6
	divsd	%xmm2, %xmm6
	mulsd	%xmm3, %xmm2
	divsd	%xmm2, %xmm0
	movaps	%xmm1, %xmm2
	movsd	%xmm6, 16(%rsp)
	movsd	%xmm0, 24(%rsp)
	movsd	.LC8(%rip), %xmm0
	subsd	%xmm0, %xmm2
	addsd	%xmm0, %xmm1
	divsd	%xmm1, %xmm2
	movsd	%xmm2, 32(%rsp)
	call	clock@PLT
	movl	$32, %esi
	movl	$1, 144(%rsp)
	movl	$1, 156(%rsp)
	cvtsi2sdq	%rax, %xmm6
	movabsq	$137438953504, %rax
	movq	%rax, 136(%rsp)
	movl	88(%rsp), %eax
	movl	$1, 168(%rsp)
	movl	$1, 192(%rsp)
	decl	%eax
	cltd
	movsd	%xmm6, 40(%rsp)
	idivl	%esi
	movl	$1, 216(%rsp)
	movl	$1, 228(%rsp)
	leal	1(%rax), %ecx
	movl	84(%rsp), %eax
	movl	%ecx, 152(%rsp)
	decl	%eax
	movl	%ecx, 172(%rsp)
	cltd
	idivl	%esi
	movabsq	$4294967297, %rdx
	movl	$134217729, %esi
	movq	%rdx, 176(%rsp)
	movq	%rdx, 200(%rsp)
	movq	%rdx, 220(%rsp)
	incl	%eax
	salq	$5, %rsi
	xorl	%ebp, %ebp
	movl	%eax, 148(%rsp)
	movl	%eax, 196(%rsp)
	movl	$1073741825, %eax
	salq	$2, %rax
	movq	%rsi, 160(%rsp)
	movq	%rsi, 184(%rsp)
	movq	%rax, 208(%rsp)
.L29:
	movq	104(%rsp), %r12
	cmpl	%ebp, 92(%rsp)
	jle	.L42
	leaq	104(%rsp), %rdi
	movq	%rbx, %rsi
	movq	112(%rsp), %r14
	movq	%r12, 112(%rsp)
	call	cudaMalloc@PLT
	movq	104(%rsp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	120(%rsp), %rdi
	movq	%rbx, %rsi
	movq	120(%rsp), %r13
	call	cudaMalloc@PLT
	movq	120(%rsp), %rdi
	movq	%rbx, %rdx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	128(%rsp), %rdi
	movq	%rbx, %rsi
	movq	128(%rsp), %r12
	call	cudaMalloc@PLT
	movq	128(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	call	cudaMemset@PLT
	movl	144(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	136(%rsp), %rdx
	movq	148(%rsp), %rdi
	movl	156(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	%rsi
	.cfi_def_cfa_offset 312
	movsd	.LC6(%rip), %xmm0
	movq	%r12, %rcx
	movq	%r13, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 320
	movl	116(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 328
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 336
	movsd	96(%rsp), %xmm3
	movsd	104(%rsp), %xmm2
	movsd	40(%rsp), %xmm1
	movl	120(%rsp), %r9d
	movl	116(%rsp), %r8d
	movq	144(%rsp), %rsi
	movq	136(%rsp), %rdi
	call	_Z40__device_stub__Z6calcEzPdS_S_S_iiiiiddddPdS_S_S_iiiiidddd
	addq	$32, %rsp
	.cfi_def_cfa_offset 304
.L30:
	movl	168(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	160(%rsp), %rdx
	movq	172(%rsp), %rdi
	movl	180(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movsd	24(%rsp), %xmm2
	movl	84(%rsp), %ecx
	movq	%r15, %xmm0
	movq	%r14, %rdx
	movsd	16(%rsp), %xmm1
	movl	88(%rsp), %r8d
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z51__device_stub__Z22calcVerticalBoundariesPdS_S_iidddPdS_S_iiddd
.L31:
	movl	192(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	184(%rsp), %rdx
	movq	196(%rsp), %rdi
	movl	204(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movsd	24(%rsp), %xmm2
	movl	84(%rsp), %ecx
	movq	%r15, %xmm0
	movq	%r14, %rdx
	movsd	16(%rsp), %xmm1
	movl	88(%rsp), %r8d
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z53__device_stub__Z24calcHorizontalBoundariesPdS_S_iidddPdS_S_iiddd
.L32:
	movl	216(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	208(%rsp), %rdx
	movq	220(%rsp), %rdi
	movl	228(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movsd	32(%rsp), %xmm0
	movl	88(%rsp), %ecx
	movl	84(%rsp), %edx
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z35__device_stub__Z10calcCornerPdS_iidPdS_iid
.L33:
	movl	144(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	136(%rsp), %rdx
	movq	148(%rsp), %rdi
	movl	156(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	%rax
	.cfi_def_cfa_offset 312
	movl	96(%rsp), %eax
	movq	%r13, %rdx
	movq	%r12, %r8
	movsd	.LC6(%rip), %xmm0
	pushq	%rax
	.cfi_def_cfa_offset 320
	movsd	64(%rsp), %xmm2
	movsd	72(%rsp), %xmm1
	movl	100(%rsp), %r9d
	movq	144(%rsp), %rcx
	movq	136(%rsp), %rsi
	movq	120(%rsp), %rdi
	call	_Z37__device_stub__Z5calcHPdS_S_S_S_iidddPdS_S_S_S_iiddd
	popq	%rdx
	.cfi_def_cfa_offset 312
	popq	%rcx
	.cfi_def_cfa_offset 304
.L34:
	movq	%r14, %rdi
	incl	%ebp
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	jmp	.L29
.L42:
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	call	malloc@PLT
	movq	%rbx, %rdx
	movl	$2, %ecx
	movq	%r12, %rsi
	movq	%rax, %rdi
	movq	%rax, %rbp
	leaq	_ZSt4cout(%rip), %rbx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %r12
	call	clock@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rbx, %rdi
	cvtsi2sdq	%rax, %xmm0
	subsd	40(%rsp), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
.L36:
	cmpl	%r13d, 88(%rsp)
	jle	.L43
	xorl	%r14d, %r14d
.L38:
	movl	84(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L44
	imull	%r13d, %eax
	movq	%rbx, %rdi
	addl	%r14d, %eax
	incl	%r14d
	cltq
	movsd	0(%rbp,%rax,8), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L38
.L44:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	incl	%r13d
	call	_ZNSolsEPFRSoS_E@PLT
	jmp	.L36
.L43:
	movq	%rbp, %rdi
	call	free@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z10calcCornerPdS_iid"
.LC13:
	.string	"_Z24calcHorizontalBoundariesPdS_S_iiddd"
.LC14:
	.string	"_Z22calcVerticalBoundariesPdS_S_iiddd"
.LC15:
	.string	"_Z5calcHPdS_S_S_S_iiddd"
.LC16:
	.string	"_Z6calcEzPdS_S_S_iiiiidddd"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3675:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10calcCornerPdS_iid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24calcHorizontalBoundariesPdS_S_iiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22calcVerticalBoundariesPdS_S_iiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5calcHPdS_S_S_S_iiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6calcEzPdS_S_S_iiiiidddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3675:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	sigma
	.bss
	.align 8
	.type	sigma, @object
	.size	sigma, 8
sigma:
	.zero	8
	.globl	cv
	.data
	.align 8
	.type	cv, @object
	.size	cv, 8
cv:
	.long	0
	.long	1102176675
	.globl	epsilon
	.align 8
	.type	epsilon, @object
	.size	epsilon, 8
epsilon:
	.long	-1295958093
	.long	1034123384
	.globl	mu
	.align 8
	.type	mu, @object
	.size	mu, 8
mu:
	.long	-28374490
	.long	1052054838
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	1099459408
	.long	1051179520
	.align 8
.LC1:
	.long	0
	.long	1071644672
	.align 8
.LC5:
	.long	0
	.long	1072693248
	.align 8
.LC6:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC7:
	.long	-1598689907
	.long	1052821239
	.align 8
.LC8:
	.long	1099458512
	.long	1052228096
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

////////////////////////////////////////////////////////////////
//  2D FDTD solution for Mur's Absorbing Boundary Condition
//  Using GPU acceleration (CUDA implementation)
//       Simple harmonic excitation source
//////////////////////////////////////////////////////////////
//  Set your code generation to "compute_20,sm_20"
//  when you compile this code.
//////////////////////////////////////////////////////////////

#include <iostream>
#include <stdlib.h>
#include <time.h>
#include "hip/hip_runtime.h"

using namespace std;

#define BLOCK_LENGTH 32

#define PI 3.1415926535897
#define SQRT2 1.414213562373
double mu = 12.56637e-7;
double epsilon = 8.8542e-12;
double cv = 3e8;  //Velocity of light
double sigma = 0; //Electrical conductivity in vacuity

//Coefficients for media
inline double ca(double t)
{
	double tmp = sigma*t / (2 * epsilon);
	return (1 - tmp) / (1 + tmp);
}
inline double cb(double t)
{
	double tmp = t / epsilon;
	return tmp / (1 + tmp*(sigma / 2));
}
inline double cp(double t)
{
	double tmp = sigma*t / (2 * mu);
	return (1 - tmp) / (1 + tmp);
}
inline double cq(double t)
{
	double tmp = t / mu;
	return tmp / (1 + tmp*(sigma / 2));
}

//ezf[i][j] is the electrical field to be calculated, ezfm1[i][j] is electrical field in the previous time step;
//hxfm1[i][j] and hyfm1[i][j] are the magnetic field in the previous time step;
//(width, height) is the total size of the field;
//(s_x, s_y) is the point of source. 't' is the current time. 'dl' is the size of cell. 'dt' is time interval;
//'a' and 'b' are the coeffiecients of the media.
__global__ void calcEz(double *ezf, double *ezfm1, double *hxfm1, double *hyfm1, int width, int height, int s_x, int s_y, int t, double dl, double dt, double a, double b)
{
	int tx = threadIdx.x; int ty = threadIdx.y;
	int thx = blockIdx.x*blockDim.x + tx;
	int thy = blockIdx.y*blockDim.y + ty;
	if (thx < 0 || thy < 0 || thx >= (width - 1) || thy >= (height - 1)) return;

	//All index of elements of H add 1, and 0 is the index for halo elements
	__shared__ double hx[BLOCK_LENGTH + 1][BLOCK_LENGTH + 1];
	__shared__ double hy[BLOCK_LENGTH + 1][BLOCK_LENGTH + 1];
	hx[tx + 1][ty + 1] = hxfm1[width*thy + thx];
	hy[tx + 1][ty + 1] = hyfm1[width*thy + thx];

	//Copy halo elements
	if (tx == 0 && thx != 0) hy[0][ty + 1] = hyfm1[width*thy + thx - 1];
	if (ty == 0 && thy != 0) hx[tx + 1][0] = hxfm1[width*(thy - 1) + thx];

	__syncthreads();

	if (thx == 0 || thy == 0) return;

	if (thx == s_x && thy == s_y)
	{
		//Source
		double frq = 1.5e13;
		ezf[width*thy + thx] = sin(t * dt * 2 * PI * frq);
	}
	else //Recursion
		ezf[width*thy + thx] = a*ezfm1[width*thy + thx] + b*((hy[tx + 1][ty + 1] - hy[tx][ty + 1]) / dl - (hx[tx + 1][ty + 1] - hx[tx + 1][ty]) / dl);
}

__global__ void calcH(double *ezf, double *hxf, double *hxfm1, double *hyf, double *hyfm1, int width, int height, double dl, double p, double q)
{
	int tx = threadIdx.x; int ty = threadIdx.y;
	int thx = blockIdx.x*blockDim.x + tx;
	int thy = blockIdx.y*blockDim.y + ty;
	if (thx < 0 || thy < 0 || thx >= (width - 1) || thy >= (height - 1)) return;

	__shared__ double ez[BLOCK_LENGTH + 1][BLOCK_LENGTH + 1];
	if (tx == 0 && ty == 0)
		ez[0][0] = ezf[width*thy + thx];
	ez[tx + 1][ty] = ezf[width*thy + thx + 1];
	ez[tx][ty + 1] = ezf[width*(thy + 1) + thx];

	__syncthreads();

	hxf[width*thy + thx] = p*hxfm1[width*thy + thx] - q*(ez[tx][ty + 1] - ez[tx][ty]) / dl;
	hyf[width*thy + thx] = p*hyfm1[width*thy + thx] + q*(ez[tx + 1][ty] - ez[tx][ty]) / dl;
}

__global__ void calcVerticalBoundaries(double *ezf, double *ezfm1, double *ezfm2, int width, int height, double coe1, double coe2, double coe3)
{
	int tx = threadIdx.x;
	int thx = blockIdx.x*blockDim.x + tx;

	__shared__ double left[BLOCK_LENGTH + 2];
	__shared__ double l_inner[BLOCK_LENGTH + 2];
	left[tx + 1] = ezfm1[width*thx];
	l_inner[tx + 1] = ezfm1[width*thx + 1];

	__shared__ double right[BLOCK_LENGTH + 2];
	__shared__ double r_inner[BLOCK_LENGTH + 2];
	right[tx + 1] = ezfm1[width*(thx + 1) - 1];
	r_inner[tx + 1] = ezfm1[width*(thx + 1) - 2];

	if (tx == 0 && thx != 0)
	{
		left[0] = ezfm1[width*(thx - 1)];
		l_inner[0] = ezfm1[width*(thx - 1) + 1];

		right[0] = ezfm1[width*thx - 1];
		r_inner[0] = ezfm1[width*thx - 2];
	}
	if (tx == BLOCK_LENGTH - 1 && thx != height - 1)
	{
		left[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 1)];
		l_inner[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 1) + 1];

		right[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 2) - 1];
		r_inner[BLOCK_LENGTH + 1] = ezfm1[width*(thx + 2) - 2];
	}

	__syncthreads();

	if (!(thx == 0 || thx == height - 1))
	{
		ezf[width*thx] = 0 - ezfm2[width*thx + 1] + coe1*(ezf[width*thx + 1] + ezfm2[width*thx]) + coe2*(left[tx + 1] + l_inner[tx + 1]) + coe3*(left[tx + 2] - 2 * left[tx + 1] + left[tx] + l_inner[tx + 2] - 2 * l_inner[tx + 1] + l_inner[tx]);
		ezf[width*thx + width - 1] = 0 - ezfm2[width*(thx + 1) - 2] + coe1*(ezf[width*(thx + 1) - 2] + ezfm2[width*(thx + 1) - 1]) + coe2*(right[tx + 1] + r_inner[tx + 1]) + coe3*(right[tx + 2] - 2 * right[tx + 1] + right[tx] + r_inner[tx + 2] - 2 * r_inner[tx + 1] + r_inner[tx]);
	}
}

__global__ void calcHorizontalBoundaries(double *ezf, double *ezfm1, double *ezfm2, int width, int height, double coe1, double coe2, double coe3)
{
	int tx = threadIdx.x;
	int thx = blockIdx.x*blockDim.x + tx;

	__shared__ double down[BLOCK_LENGTH + 2];
	__shared__ double d_inner[BLOCK_LENGTH + 2];
	down[tx + 1] = ezfm1[thx];
	d_inner[tx + 1] = ezfm1[width + thx];

	__shared__ double up[BLOCK_LENGTH + 2];
	__shared__ double u_inner[BLOCK_LENGTH + 2];
	up[tx + 1] = ezfm1[width*(height - 1) + thx];
	u_inner[tx + 1] = ezfm1[width*(height - 2) + thx];

	if (tx == 0 && thx != 0)
	{
		down[0] = ezfm1[thx - 1];
		d_inner[0] = ezfm1[width + thx - 1];

		up[0] = ezfm1[width*(height - 1) + thx - 1];
		u_inner[0] = ezfm1[width*(height - 2) + thx - 1];
	}
	if (tx == BLOCK_LENGTH - 1 && thx != width - 1)
	{
		down[BLOCK_LENGTH + 1] = ezfm1[thx + 1];
		d_inner[BLOCK_LENGTH + 1] = ezfm1[width + thx + 1];

		up[BLOCK_LENGTH + 1] = ezfm1[width*(height - 1) + thx + 1];
		u_inner[BLOCK_LENGTH + 1] = ezfm1[width*(height - 2) + thx + 1];
	}

	__syncthreads();

	if (!(thx == 0 || thx == width - 1))
	{
		ezf[thx] = 0 - ezfm2[width + thx] + coe1*(ezf[width + thx] + ezfm2[thx]) + coe2*(down[tx + 1] + d_inner[tx + 1]) + coe3*(down[tx + 2] - 2 * down[tx + 1] + down[tx] + d_inner[tx + 2] - 2 * d_inner[tx + 1] + d_inner[tx]);
		ezf[width*(height - 1) + thx] = 0 - ezfm2[width*(height - 2) + thx] + coe1*(ezf[width*(height - 2) + thx] + ezfm2[width*(height - 1) + thx]) + coe2*(up[tx + 1] + u_inner[tx + 1]) + coe3*(up[tx + 2] - 2 * up[tx + 1] + up[tx] + u_inner[tx + 2] - 2 * u_inner[tx + 1] + u_inner[tx]);
	}
}

__global__ void calcCorner(double *ezf, double *ezfm1, int width, int height, double coe)
{
	int thx = blockIdx.x*blockDim.x + threadIdx.x;
	if (thx == 0)      //left-down
		ezf[0] = ezfm1[width + 1] + coe*(ezf[width + 1] - ezfm1[0]);
	else if (thx == 1) //right-down
		ezf[width - 1] = ezfm1[width * 2 - 2] + coe*(ezf[width * 2 - 2] - ezfm1[width - 1]);
	else if (thx == 2) //left-up
		ezf[width*(height - 1)] = ezfm1[width*(height - 2) + 1] + coe*(ezf[width*(height - 2) + 1] - ezfm1[width*(height - 1)]);
	else            //right-up
		ezf[width*height - 1] = ezfm1[width*height - width - 2] + coe*(ezf[width*height - width - 2] - ezfm1[width*height - 1]);
}

int main()
{
	int width = 1024;
	int height = 1024;
	int time = 2000;
	int cx = 32; int cy = 32;
	double dl = 1e-6;
	double st = 1 / SQRT2;
	double dt = st*dl / cv;
	dt = dt / 2;

	cout << "Input width and height of the field: ";
	cin >> width >> height;
	cout << "Input time steps to be calculated: ";
	cin >> time;
	cout << "Input x and y coordinate of the wave source: ";
	cin >> cx >> cy;

	int size = sizeof(double)*width*height;
	double *ezf, *ezfm1, *ezfm2, *hxf, *hxfm1, *hyf, *hyfm1;
	hipMalloc((void**)&ezf, size); hipMemset(ezf, 0, size);
	hipMalloc((void**)&ezfm1, size); hipMemset(ezfm1, 0, size);
	hipMalloc((void**)&hxf, size); hipMemset(hxf, 0, size);
	hipMalloc((void**)&hyf, size); hipMemset(hyf, 0, size);

	//Coefficients of media
	double a = ca(dt); double b = cb(dt);
	double p = cp(dt); double q = cq(dt);
	//Coefficients for boundary conditions
	double coe1 = (cv*dt - dl) / (cv*dt + dl);
	double coe2 = (2 * dl) / (cv*dt + dl);
	double coe3 = (cv*cv*dt*dt) / (2 * dl*(cv*dt + dl));
	//Coefficient for the corner
	double coe_cor = (cv*dt - SQRT2*dl) / (cv*dt + SQRT2*dl);

	double t_start, t_end, duration;
	t_start = clock();

	dim3 DimBlock(BLOCK_LENGTH, BLOCK_LENGTH, 1);
	dim3 DimGrid((width - 1) / BLOCK_LENGTH + 1, (height - 1) / BLOCK_LENGTH + 1, 1);

	dim3 db_h(BLOCK_LENGTH, 1, 1);
	dim3 dg_h((height - 1) / BLOCK_LENGTH + 1, 1, 1);
	dim3 db_w(BLOCK_LENGTH, 1, 1);
	dim3 dg_w((width - 1) / BLOCK_LENGTH + 1, 1, 1);
	dim3 db_cor(4, 1, 1); dim3 dg_cor(1, 1, 1);

	for (int t = 0; t < time; t++)
	{
		ezfm2 = ezfm1;
		ezfm1 = ezf;
		hipMalloc((void**)&ezf, size); hipMemset(ezf, 0, size);
		hxfm1 = hxf;
		hipMalloc((void**)&hxf, size); hipMemset(hxf, 0, size);
		hyfm1 = hyf;
		hipMalloc((void**)&hyf, size); hipMemset(hyf, 0, size);

		calcEz<<<DimGrid, DimBlock>>>(ezf, ezfm1, hxfm1, hyfm1, width, height, cx, cy, t, dl, dt, a, b);

		//Boundary conditions
		calcVerticalBoundaries<<<dg_h, db_h>>>(ezf, ezfm1, ezfm2, width, height, coe1, coe2, coe3);
		calcHorizontalBoundaries<<<dg_w, db_w>>>(ezf, ezfm1, ezfm2, width, height, coe1, coe2, coe3);
		//Corner conditions
		calcCorner<<<dg_cor, db_cor>>>(ezf, ezfm1, width, height, coe_cor);

		calcH<<<DimGrid, DimBlock>>>(ezf, hxf, hxfm1, hyf, hyfm1, width, height, dl, p, q);
		
		//Output -------
		//You can add code here to copy data in array 'ezf', 'hxf' and 'hyf' out to output.

		hipFree(ezfm2); hipFree(hxfm1); hipFree(hyfm1);
	}

	double *output = (double*)malloc(size);
	hipMemcpy(output, ezf, size, hipMemcpyDeviceToHost);

	t_end = clock();
	duration = t_end - t_start;
	cout << "Time using: " << duration << " ms." << endl << endl;

	for(int i=0;i<height;i++)
	{
		for(int j=0;j<width;j++)
			cout<<output[i*width+j]<<" ";
		cout<<endl;
	}

	free(output);
	hipFree(ezf); hipFree(hxf); hipFree(hyf);
	hipFree(ezfm1);

	return 0;
}

	.text
	.file	"FDTD-Mur-CUDA.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__calcEzPdS_S_S_iiiiidddd # -- Begin function _Z21__device_stub__calcEzPdS_S_S_iiiiidddd
	.type	_Z21__device_stub__calcEzPdS_S_S_iiiiidddd,@function
_Z21__device_stub__calcEzPdS_S_S_iiiiidddd: # @_Z21__device_stub__calcEzPdS_S_S_iiiiidddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	88(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	56(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	48(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	40(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	32(%rsp), %r14
	movsd	%xmm3, (%r14)
	leaq	128(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	movq	%r9, 72(%rbx)
	movq	%r10, 80(%rbx)
	movq	%r11, 88(%rbx)
	movq	%r14, 96(%rbx)
	leaq	112(%rsp), %r14
	leaq	96(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6calcEzPdS_S_S_iiiiidddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__calcEzPdS_S_S_iiiiidddd, .Lfunc_end0-_Z21__device_stub__calcEzPdS_S_S_iiiiidddd
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__calcHPdS_S_S_S_iiddd # -- Begin function _Z20__device_stub__calcHPdS_S_S_S_iiddd
	.type	_Z20__device_stub__calcHPdS_S_S_S_iiddd,@function
_Z20__device_stub__calcHPdS_S_S_S_iiddd: # @_Z20__device_stub__calcHPdS_S_S_S_iiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	88(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	56(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	48(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	40(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	32(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	128(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	movq	%r10, 64(%rbx)
	movq	%r11, 72(%rbx)
	leaq	112(%rsp), %r14
	leaq	96(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5calcHPdS_S_S_S_iiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__calcHPdS_S_S_S_iiddd, .Lfunc_end1-_Z20__device_stub__calcHPdS_S_S_S_iiddd
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd # -- Begin function _Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd
	.type	_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd,@function
_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd: # @_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	48(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	32(%rsp), %r10
	movsd	%xmm2, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22calcVerticalBoundariesPdS_S_iiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd, .Lfunc_end2-_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd # -- Begin function _Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd
	.type	_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd,@function
_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd: # @_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	48(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	32(%rsp), %r10
	movsd	%xmm2, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24calcHorizontalBoundariesPdS_S_iiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd, .Lfunc_end3-_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__calcCornerPdS_iid # -- Begin function _Z25__device_stub__calcCornerPdS_iid
	.type	_Z25__device_stub__calcCornerPdS_iid,@function
_Z25__device_stub__calcCornerPdS_iid:   # @_Z25__device_stub__calcCornerPdS_iid
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10calcCornerPdS_iid, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__calcCornerPdS_iid, .Lfunc_end4-_Z25__device_stub__calcCornerPdS_iid
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x3ea7ba0041886b50              # double 7.0710678118659491E-7
.LCPI5_1:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI5_2:
	.quad	0x3ff0000000000000              # double 1
.LCPI5_3:
	.quad	0xbeb0c6f7a0b5ed8d              # double -9.9999999999999995E-7
.LCPI5_4:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI5_5:
	.quad	0x3ec0c6f7a0b5ed8d              # double 1.9999999999999999E-6
.LCPI5_6:
	.quad	0xbeb7ba00418867d0              # double -1.4142135623730001E-6
.LCPI5_7:
	.quad	0x3eb7ba00418867d0              # double 1.4142135623730001E-6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1024, %eax                     # imm = 0x400
	leaq	4(%rsp), %rbp
	movl	%eax, (%rbp)
	movq	%rsp, %r15
	movl	%eax, (%r15)
	leaq	92(%rsp), %r14
	movl	$2000, (%r14)                   # imm = 0x7D0
	movl	$32, %eax
	leaq	88(%rsp), %r13
	movl	%eax, (%r13)
	leaq	84(%rsp), %rbx
	movl	%eax, (%rbx)
	movsd	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	cv(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$37, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt3cin, %edi
	movq	%rbp, %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	movq	%r15, %rsi
	callq	_ZNSirsERi
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt3cin, %edi
	movq	%r14, %rsi
	callq	_ZNSirsERi
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$45, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt3cin, %edi
	movq	%r13, %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
	movl	(%rbp), %eax
	imull	(%r15), %eax
	shll	$3, %eax
	movslq	%eax, %rbx
	leaq	8(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	leaq	32(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movsd	sigma(%rip), %xmm0              # xmm0 = mem[0],zero
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movsd	epsilon(%rip), %xmm0            # xmm0 = mem[0],zero
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movsd	mu(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	movsd	cv(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movsd	%xmm0, 112(%rsp)                # 8-byte Spill
	movl	(%rbp), %ecx
	leal	-1(%rcx), %eax
	addl	$30, %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	movl	(%r15), %edx
	leal	-1(%rdx), %eax
	addl	$30, %edx
	testl	%eax, %eax
	cmovnsl	%eax, %edx
	cmpl	$0, (%r14)
	jle	.LBB5_13
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdx, %rax
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	movsd	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	56(%rsp), %xmm4                 # 8-byte Reload
                                        # xmm4 = mem[0],zero
	mulsd	%xmm1, %xmm4
	movapd	%xmm4, %xmm0
	movsd	16(%rsp), %xmm7                 # 8-byte Reload
                                        # xmm7 = mem[0],zero
	mulsd	%xmm7, %xmm0
	movapd	%xmm4, %xmm5
	movsd	64(%rsp), %xmm3                 # 8-byte Reload
                                        # xmm3 = mem[0],zero
	divsd	%xmm3, %xmm5
	addsd	%xmm3, %xmm3
	movapd	%xmm0, %xmm2
	divsd	%xmm3, %xmm2
	movsd	.LCPI5_2(%rip), %xmm3           # xmm3 = mem[0],zero
	movapd	%xmm3, %xmm6
	subsd	%xmm2, %xmm6
	addsd	%xmm3, %xmm2
	divsd	%xmm2, %xmm6
	movsd	%xmm6, 144(%rsp)                # 8-byte Spill
	mulsd	%xmm1, %xmm7
	movapd	%xmm7, %xmm1
	mulsd	%xmm5, %xmm1
	addsd	%xmm3, %xmm1
	divsd	%xmm1, %xmm5
	movsd	%xmm5, 152(%rsp)                # 8-byte Spill
	movapd	%xmm4, %xmm1
	movsd	72(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	divsd	%xmm2, %xmm1
	addsd	%xmm2, %xmm2
	divsd	%xmm2, %xmm0
	movapd	%xmm3, %xmm2
	subsd	%xmm0, %xmm2
	addsd	%xmm3, %xmm0
	divsd	%xmm0, %xmm2
	movsd	%xmm2, 128(%rsp)                # 8-byte Spill
	mulsd	%xmm1, %xmm7
	addsd	%xmm3, %xmm7
	divsd	%xmm7, %xmm1
	movsd	%xmm1, 136(%rsp)                # 8-byte Spill
	movapd	%xmm4, %xmm0
	movsd	48(%rsp), %xmm3                 # 8-byte Reload
                                        # xmm3 = mem[0],zero
	mulsd	%xmm3, %xmm0
	movsd	.LCPI5_3(%rip), %xmm2           # xmm2 = mem[0],zero
	addsd	%xmm0, %xmm2
	movsd	.LCPI5_4(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	divsd	%xmm1, %xmm2
	movsd	%xmm2, 104(%rsp)                # 8-byte Spill
	movsd	.LCPI5_5(%rip), %xmm2           # xmm2 = mem[0],zero
	movapd	%xmm2, %xmm5
	divsd	%xmm1, %xmm5
	movsd	%xmm5, 96(%rsp)                 # 8-byte Spill
	mulsd	%xmm3, %xmm3
	mulsd	%xmm4, %xmm3
	movsd	%xmm4, 56(%rsp)                 # 8-byte Spill
	mulsd	%xmm4, %xmm3
	mulsd	%xmm2, %xmm1
	divsd	%xmm1, %xmm3
	movsd	%xmm3, 48(%rsp)                 # 8-byte Spill
	movsd	.LCPI5_6(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	addsd	.LCPI5_7(%rip), %xmm0
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 120(%rsp)                # 8-byte Spill
	sarl	$5, %ecx
	incl	%ecx
	sarl	$5, %eax
	incl	%eax
	movq	%rax, %r13
	shlq	$32, %r13
	orq	%rcx, %r13
	btsq	$32, %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	btsq	$32, %rcx
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	leaq	32(%rdx), %rax
	movq	%rax, 168(%rsp)                 # 8-byte Spill
	leaq	1(%rdx), %rax
	movq	%rax, 160(%rsp)                 # 8-byte Spill
	addq	$4, %rdx
	movq	%rdx, 176(%rsp)                 # 8-byte Spill
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	24(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	8(%rsp), %rax
	movq	%rax, 24(%rsp)
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movq	40(%rsp), %r14
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movq	32(%rsp), %r15
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	hipMemset
	movq	%r13, %rbp
	movq	%r13, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:                                #   in Loop: Header=BB5_2 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	4(%rsp), %r8d
	movl	(%rsp), %r9d
	movl	88(%rsp), %eax
	movl	84(%rsp), %r10d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r14, %rdx
	movq	%r15, %rcx
	movsd	.LCPI5_4(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	64(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	152(%rsp), %xmm2                # 8-byte Reload
                                        # xmm2 = mem[0],zero
	movsd	160(%rsp), %xmm3                # 8-byte Reload
                                        # xmm3 = mem[0],zero
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z21__device_stub__calcEzPdS_S_S_iiiiidddd
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB5_4:                                #   in Loop: Header=BB5_2 Depth=1
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	168(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:                                #   in Loop: Header=BB5_2 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	4(%rsp), %ecx
	movl	(%rsp), %r8d
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movsd	104(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	48(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	callq	_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd
.LBB5_6:                                #   in Loop: Header=BB5_2 Depth=1
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:                                #   in Loop: Header=BB5_2 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	4(%rsp), %ecx
	movl	(%rsp), %r8d
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movsd	104(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	48(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	callq	_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd
.LBB5_8:                                #   in Loop: Header=BB5_2 Depth=1
	movq	160(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movq	176(%rsp), %rdx                 # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	%rbp, %r13
	jne	.LBB5_10
# %bb.9:                                #   in Loop: Header=BB5_2 Depth=1
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	4(%rsp), %edx
	movl	(%rsp), %ecx
	movsd	120(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_Z25__device_stub__calcCornerPdS_iid
.LBB5_10:                               #   in Loop: Header=BB5_2 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_12
# %bb.11:                               #   in Loop: Header=BB5_2 Depth=1
	movq	8(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rcx
	movl	4(%rsp), %r9d
	movl	(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r14, %rdx
	movq	%r15, %r8
	movsd	.LCPI5_4(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	136(%rsp), %xmm1                # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	144(%rsp), %xmm2                # 8-byte Reload
                                        # xmm2 = mem[0],zero
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z20__device_stub__calcHPdS_S_S_S_iiddd
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB5_12:                               #   in Loop: Header=BB5_2 Depth=1
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	incl	%r12d
	cmpl	92(%rsp), %r12d
	jl	.LBB5_2
.LBB5_13:                               # %._crit_edge
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	subsd	112(%rsp), %xmm0                # 8-byte Folded Reload
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	cmpl	$0, (%rsp)
	jle	.LBB5_19
# %bb.14:                               # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB5_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_17 Depth 2
	movl	4(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB5_18
# %bb.16:                               # %.lr.ph141.preheader
                                        #   in Loop: Header=BB5_15 Depth=1
	xorl	%r12d, %r12d
.LBB5_17:                               # %.lr.ph141
                                        #   Parent Loop BB5_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebx, %eax
	cltq
	addq	%r12, %rax
	movsd	(%r14,%rax,8), %xmm0            # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.5, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	4(%rsp), %eax
	incq	%r12
	cmpl	%eax, %r12d
	jl	.LBB5_17
.LBB5_18:                               # %._crit_edge142
                                        #   in Loop: Header=BB5_15 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incl	%ebx
	cmpl	(%rsp), %ebx
	jl	.LBB5_15
.LBB5_19:                               # %._crit_edge144
	movq	%r14, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6calcEzPdS_S_S_iiiiidddd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5calcHPdS_S_S_S_iiddd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22calcVerticalBoundariesPdS_S_iiddd, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24calcHorizontalBoundariesPdS_S_iiddd, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10calcCornerPdS_iid, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	mu,@object                      # @mu
	.data
	.globl	mu
	.p2align	3, 0x0
mu:
	.quad	0x3eb51536fe4f0a26              # double 1.2566369999999999E-6
	.size	mu, 8

	.type	epsilon,@object                 # @epsilon
	.globl	epsilon
	.p2align	3, 0x0
epsilon:
	.quad	0x3da37878b2c13fb3              # double 8.8542E-12
	.size	epsilon, 8

	.type	cv,@object                      # @cv
	.globl	cv
	.p2align	3, 0x0
cv:
	.quad	0x41b1e1a300000000              # double 3.0E+8
	.size	cv, 8

	.type	sigma,@object                   # @sigma
	.bss
	.globl	sigma
	.p2align	3, 0x0
sigma:
	.quad	0x0000000000000000              # double 0
	.size	sigma, 8

	.type	_Z6calcEzPdS_S_S_iiiiidddd,@object # @_Z6calcEzPdS_S_S_iiiiidddd
	.section	.rodata,"a",@progbits
	.globl	_Z6calcEzPdS_S_S_iiiiidddd
	.p2align	3, 0x0
_Z6calcEzPdS_S_S_iiiiidddd:
	.quad	_Z21__device_stub__calcEzPdS_S_S_iiiiidddd
	.size	_Z6calcEzPdS_S_S_iiiiidddd, 8

	.type	_Z5calcHPdS_S_S_S_iiddd,@object # @_Z5calcHPdS_S_S_S_iiddd
	.globl	_Z5calcHPdS_S_S_S_iiddd
	.p2align	3, 0x0
_Z5calcHPdS_S_S_S_iiddd:
	.quad	_Z20__device_stub__calcHPdS_S_S_S_iiddd
	.size	_Z5calcHPdS_S_S_S_iiddd, 8

	.type	_Z22calcVerticalBoundariesPdS_S_iiddd,@object # @_Z22calcVerticalBoundariesPdS_S_iiddd
	.globl	_Z22calcVerticalBoundariesPdS_S_iiddd
	.p2align	3, 0x0
_Z22calcVerticalBoundariesPdS_S_iiddd:
	.quad	_Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd
	.size	_Z22calcVerticalBoundariesPdS_S_iiddd, 8

	.type	_Z24calcHorizontalBoundariesPdS_S_iiddd,@object # @_Z24calcHorizontalBoundariesPdS_S_iiddd
	.globl	_Z24calcHorizontalBoundariesPdS_S_iiddd
	.p2align	3, 0x0
_Z24calcHorizontalBoundariesPdS_S_iiddd:
	.quad	_Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd
	.size	_Z24calcHorizontalBoundariesPdS_S_iiddd, 8

	.type	_Z10calcCornerPdS_iid,@object   # @_Z10calcCornerPdS_iid
	.globl	_Z10calcCornerPdS_iid
	.p2align	3, 0x0
_Z10calcCornerPdS_iid:
	.quad	_Z25__device_stub__calcCornerPdS_iid
	.size	_Z10calcCornerPdS_iid, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Input width and height of the field: "
	.size	.L.str, 38

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Input time steps to be calculated: "
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Input x and y coordinate of the wave source: "
	.size	.L.str.2, 46

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Time using: "
	.size	.L.str.3, 13

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" ms."
	.size	.L.str.4, 5

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" "
	.size	.L.str.5, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6calcEzPdS_S_S_iiiiidddd"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5calcHPdS_S_S_S_iiddd"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z22calcVerticalBoundariesPdS_S_iiddd"
	.size	.L__unnamed_3, 38

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z24calcHorizontalBoundariesPdS_S_iiddd"
	.size	.L__unnamed_4, 40

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z10calcCornerPdS_iid"
	.size	.L__unnamed_5, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__calcEzPdS_S_S_iiiiidddd
	.addrsig_sym _Z20__device_stub__calcHPdS_S_S_S_iiddd
	.addrsig_sym _Z37__device_stub__calcVerticalBoundariesPdS_S_iiddd
	.addrsig_sym _Z39__device_stub__calcHorizontalBoundariesPdS_S_iiddd
	.addrsig_sym _Z25__device_stub__calcCornerPdS_iid
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6calcEzPdS_S_S_iiiiidddd
	.addrsig_sym _Z5calcHPdS_S_S_S_iiddd
	.addrsig_sym _Z22calcVerticalBoundariesPdS_S_iiddd
	.addrsig_sym _Z24calcHorizontalBoundariesPdS_S_iiddd
	.addrsig_sym _Z10calcCornerPdS_iid
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt3cin
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6calcEzPdS_S_S_iiiiidddd ; -- Begin function _Z6calcEzPdS_S_S_iiiiidddd
	.globl	_Z6calcEzPdS_S_S_iiiiidddd
	.p2align	8
	.type	_Z6calcEzPdS_S_S_iiiiidddd,@function
_Z6calcEzPdS_S_S_iiiiidddd:             ; @_Z6calcEzPdS_S_S_iiiiidddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x64
	s_load_b128 s[16:19], s[0:1], 0x20
	v_and_b32_e32 v5, 0x3ff, v0
	v_bfe_u32 v6, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[5:6]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[6:7]
	s_add_i32 s2, s16, -1
	s_add_i32 s3, s17, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	v_or_b32_e32 v0, v3, v2
	v_cmp_gt_i32_e64 s2, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s3, -1, v0
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_15
; %bb.1:
	v_mul_lo_u32 v9, v3, s16
	s_load_b256 s[4:11], s[0:1], 0x0
	v_cmp_ne_u32_e64 s2, 0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v9, v2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	global_load_b64 v[11:12], v[10:11], off
	global_load_b64 v[13:14], v[7:8], off
	v_lshlrev_b32_e32 v10, 3, v6
	s_and_b32 s3, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v4, 0x108, v5, v10
	s_waitcnt vmcnt(1)
	ds_store_b64 v4, v[11:12] offset:272
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[13:14] offset:8992
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_load_b64 v[7:8], v[7:8], off offset:-8
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[7:8] offset:8728
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_cmp_ne_u32_e64 s2, 0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, vcc_lo, s2
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_subrev_nc_u32_e32 v6, s16, v9
	v_mul_u32_u24_e32 v5, 0x108, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v6, v2
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v5, v[6:7] offset:264
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_cmp_ne_u32_e64 s2, 0, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_15
; %bb.6:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x30
	s_load_b256 s[8:15], s[0:1], 0x38
	v_cmp_ne_u32_e32 vcc_lo, s18, v2
	v_cmp_ne_u32_e64 s0, s19, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_add_nc_u32_e32 v2, 0x2210, v4
	ds_load_2addr_b64 v[5:8], v2 offset0:1 offset1:34
	ds_load_2addr_b64 v[9:12], v4 offset0:33 offset1:34
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[7:8], -v[5:6]
	v_add_f64 v[4:5], v[11:12], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[6:7], null, s[8:9], s[8:9], v[2:3]
	v_div_scale_f64 v[8:9], null, s[8:9], s[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[6:7]
	v_rcp_f64_e32 v[12:13], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[6:7], v[10:11], 1.0
	v_fma_f64 v[16:17], -v[8:9], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_add_co_u32 v14, vcc_lo, s6, v0
	v_fma_f64 v[12:13], v[12:13], v[16:17], v[12:13]
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v1, vcc_lo
	v_div_scale_f64 v[20:21], vcc_lo, v[2:3], s[8:9], v[2:3]
	global_load_b64 v[14:15], v[14:15], off
	v_fma_f64 v[16:17], -v[6:7], v[10:11], 1.0
	v_fma_f64 v[18:19], -v[8:9], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s0, v[4:5], s[8:9], v[4:5]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[18:19], v[20:21], v[10:11]
	v_mul_f64 v[22:23], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], -v[6:7], v[18:19], v[20:21]
	v_fma_f64 v[8:9], -v[8:9], v[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[6:7], v[6:7], v[10:11], v[18:19]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[8:9], v[8:9], v[12:13], v[22:23]
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[2:3], v[6:7], s[8:9], v[2:3]
	v_div_fixup_f64 v[4:5], v[8:9], s[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_mul_f64 v[2:3], v[2:3], s[14:15]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[2:3], v[14:15], s[12:13], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_8:                                ; %Flow124
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_15
; %bb.9:
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[2:3], s2
	s_mov_b32 s0, 0x54442c46
	s_mov_b32 s1, 0x400921fb
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], s[10:11]
	v_add_f64 v[2:3], v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], s[0:1]
	s_mov_b32 s0, 0x57e00000
	s_mov_b32 s1, 0x42ab48eb
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[2:3], v[2:3], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[2:3]|
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_11
; %bb.10:
	v_ldexp_f64 v[4:5], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[6:7], |v[2:3]|, 0
	v_and_b32_e32 v8, 0x7fffffff, v3
	v_trig_preop_f64 v[18:19], |v[2:3]|, 2
	s_mov_b32 s2, 0
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v5, v8, v5 :: v_dual_cndmask_b32 v4, v2, v4
	v_trig_preop_f64 v[8:9], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[24:25], v[18:19], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	v_fma_f64 v[4:5], v[18:19], v[4:5], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[22:23], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_ldexp_f64 v[16:17], v[22:23], -2
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[20:21], v[24:25], v[8:9]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[20:21], v[6:7]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[12:13], v[12:13], 2
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[26:27], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[16:17], v[12:13]
	v_add_f64 v[32:33], v[14:15], -v[26:27]
	v_add_f64 v[6:7], v[6:7], -v[26:27]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[22:23]
	v_add_f64 v[22:23], v[20:21], -v[24:25]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x40100000, 0
	v_add_f64 v[30:31], v[20:21], -v[22:23]
	v_add_f64 v[12:13], v[12:13], s[2:3]
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[20:21], v[20:21], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[24:25], -v[30:31]
	v_add_f64 v[28:29], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], v[20:21]
	v_add_f64 v[8:9], v[8:9], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v28, v[28:29]
	v_add_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[26:27], v28
	v_add_f64 v[8:9], v[14:15], -v[10:11]
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	v_add_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[16:17], v[12:13]
	v_add_f64 v[6:7], v[18:19], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[18:19]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v8, s0, 0, v28, vcc_lo
	s_mov_b32 s0, 0x54442d18
	s_mov_b32 s1, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], -s[2:3]
	v_add_f64 v[9:10], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[11:12], v[9:10], s[0:1]
	v_add_f64 v[6:7], v[9:10], -v[6:7]
	v_fma_f64 v[13:14], v[9:10], s[0:1], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[9:10], s[6:7], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], s[0:1], v[6:7]
	v_add_f64 v[4:5], v[11:12], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[4:5], -v[11:12]
	v_add_f64 v[6:7], v[6:7], -v[9:10]
	s_branch .LBB0_12
.LBB0_11:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
.LBB0_12:                               ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_14
; %bb.13:
	s_mov_b32 s0, 0x6dc9c883
	s_mov_b32 s1, 0x3fe45f30
	s_mov_b32 s3, 0xbc91a626
	v_mul_f64 v[4:5], |v[2:3]|, s[0:1]
	s_mov_b32 s0, 0x54442d18
	s_mov_b32 s1, 0xbff921fb
	s_mov_b32 s2, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[0:1], |v[2:3]|
	v_mul_f64 v[6:7], v[8:9], s[2:3]
	s_mov_b32 s0, 0x252049c0
	s_mov_b32 s1, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[2:3], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s3, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[0:1], v[4:5]
	v_cvt_i32_f64_e32 v8, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_14:                               ; %_ZL3sind.exit
	v_mul_f64 v[9:10], v[4:5], v[4:5]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s6, 0x796cde01
	s_mov_b32 s7, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[19:20], v[6:7], 0.5
	v_fma_f64 v[11:12], v[9:10], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[15:16], v[9:10], 0.5
	v_fma_f64 v[13:14], v[9:10], s[2:3], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[21:22], v[4:5], -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[6:7]
	v_add_f64 v[17:18], -v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], -v[17:18], 1.0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[9:10], v[11:12], s[2:3]
	v_add_f64 v[15:16], v[23:24], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	v_fma_f64 v[11:12], v[21:22], v[11:12], v[19:20]
	v_mul_f64 v[19:20], v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[4:5], -v[6:7], v[15:16]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[0:1]
	s_mov_b32 s1, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[9:10], v[11:12], -v[6:7]
	v_fma_f64 v[9:10], v[19:20], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[21:22], s[0:1], v[6:7]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v8
	v_add_f64 v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v3
	v_and_b32_e32 v2, 0x80000000, v2
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_and_b32_e32 v6, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v6
	v_dual_cndmask_b32 v3, v10, v5 :: v_dual_cndmask_b32 v4, v9, v4
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v3, v3, v2
	v_cndmask_b32_e64 v2, 0, v4, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	global_store_b64 v[0:1], v[2:3], off
.LBB0_15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6calcEzPdS_S_S_iiiiidddd
		.amdhsa_group_segment_fixed_size 17432
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 34
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6calcEzPdS_S_S_iiiiidddd, .Lfunc_end0-_Z6calcEzPdS_S_S_iiiiidddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2436
; NumSgprs: 22
; NumVgprs: 34
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 17432 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 34
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z5calcHPdS_S_S_S_iiddd ; -- Begin function _Z5calcHPdS_S_S_S_iiddd
	.globl	_Z5calcHPdS_S_S_S_iiddd
	.p2align	8
	.type	_Z5calcHPdS_S_S_S_iiddd,@function
_Z5calcHPdS_S_S_S_iiddd:                ; @_Z5calcHPdS_S_S_S_iiddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b64 s[12:13], s[0:1], 0x28
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s15, s3, v[3:4]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	s_add_i32 s2, s12, -1
	s_add_i32 s3, s13, -1
	v_or_b32_e32 v1, v6, v0
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	v_cmp_gt_i32_e64 s2, s3, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s3, -1, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x20
	v_mad_u64_u32 v[4:5], null, v6, s12, v[0:1]
	v_or_b32_e32 v6, v2, v3
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB1_3
; %bb.2:
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v1, vcc_lo
	v_mov_b32_e32 v7, 0
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v7, v[5:6]
.LBB1_3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v4, s12, v4
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b32_e32 v3, 3, v3
	s_load_b128 s[12:15], s[0:1], 0x30
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v8, 0x108, v2, v3
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_load_b64 s[4:5], s[0:1], 0x40
	v_add_co_u32 v12, vcc_lo, s8, v0
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off offset:8
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v1, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v8, v[4:5], v[6:7] offset0:1 offset1:33
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[2:5], v8 offset1:1
	ds_load_b64 v[6:7], v8 offset:264
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[4:5], v[4:5], -v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[6:7], -v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[4:5], s[4:5]
	v_mul_f64 v[2:3], v[2:3], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[8:9], null, s[12:13], s[12:13], v[4:5]
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_fma_f64 v[14:15], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_div_scale_f64 v[14:15], vcc_lo, v[4:5], s[12:13], v[4:5]
	v_mul_f64 v[16:17], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[8:9], v[16:17], v[14:15]
	v_div_fmas_f64 v[6:7], v[8:9], v[10:11], v[16:17]
	v_add_co_u32 v10, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[6:7], s[12:13], v[4:5]
	v_div_scale_f64 v[6:7], null, s[12:13], s[12:13], v[2:3]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[12:13], s[14:15], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f64_e32 v[8:9], v[6:7]
	v_add_co_u32 v12, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[10:11], v[4:5], off
	global_load_b64 v[4:5], v[12:13], off
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], s[12:13], v[2:3]
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[2:3], v[6:7], s[12:13], v[2:3]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[4:5], s[14:15], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5calcHPdS_S_S_S_iiddd
		.amdhsa_group_segment_fixed_size 8712
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5calcHPdS_S_S_S_iiddd, .Lfunc_end1-_Z5calcHPdS_S_S_S_iiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 768
; NumSgprs: 18
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8712 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z22calcVerticalBoundariesPdS_S_iiddd ; -- Begin function _Z22calcVerticalBoundariesPdS_S_iiddd
	.globl	_Z22calcVerticalBoundariesPdS_S_iiddd
	.p2align	8
	.type	_Z22calcVerticalBoundariesPdS_S_iiddd,@function
_Z22calcVerticalBoundariesPdS_S_iiddd:  ; @_Z22calcVerticalBoundariesPdS_S_iiddd
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x44
	s_load_b64 s[8:9], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, s15, s2, v[0:1]
	v_mul_lo_u32 v1, v5, s8
	v_cmp_ne_u32_e64 s2, 0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, s8, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_lshlrev_b64 v[1:2], 3, v[10:11]
	v_lshlrev_b32_e32 v11, 3, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_clause 0x1
	global_load_b128 v[12:15], v[8:9], off
	global_load_b128 v[16:19], v[6:7], off offset:-16
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v11, v[12:13], v[18:19] offset0:1 offset1:35
	ds_store_2addr_b64 v11, v[14:15], v[16:17] offset0:69 offset1:103
	s_and_b32 s3, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_lshl_b32 s3, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v12, s3, v10
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v12, vcc_lo, s6, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	s_clause 0x1
	global_load_b128 v[12:15], v[12:13], off
	global_load_b128 v[16:19], v[8:9], off offset:-16
	v_mov_b32_e32 v8, 0
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v8, v[12:13], v[18:19] offset1:34
	ds_store_2addr_b64 v8, v[14:15], v[16:17] offset0:68 offset1:102
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s9, s9, -1
	v_cmp_eq_u32_e64 s2, 31, v0
	v_cmp_ne_u32_e64 s3, s9, v5
	v_cmp_eq_u32_e32 vcc_lo, s9, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_4
; %bb.3:
	v_add_nc_u32_e32 v0, 2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v8, v0, s8
	v_mov_b32_e32 v0, 0
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v12, s2, s6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s2, s7, v9, s2
	s_clause 0x1
	global_load_b128 v[6:9], v[6:7], off
	global_load_b128 v[12:15], v[12:13], off offset:-16
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v0, v[6:7], v[14:15] offset0:33 offset1:67
	ds_store_2addr_b64 v0, v[8:9], v[12:13] offset0:101 offset1:135
.LBB2_4:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_ne_u32_e64 s2, 0, v5
	s_xor_b32 s3, vcc_lo, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_6
; %bb.5:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[8:11], s[0:1], 0x20
	v_add_nc_u32_e32 v0, 0x220, v11
	s_load_b64 s[0:1], s[0:1], 0x30
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v12, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v4, vcc_lo
	global_load_b128 v[3:6], v[5:6], off
	global_load_b64 v[14:15], v[12:13], off offset:8
	ds_load_2addr_b64 v[7:10], v11 offset1:1
	ds_load_b64 v[16:17], v11 offset:16
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[16:17], v[9:10], -2.0, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[16:17], v[7:8]
	ds_load_b64 v[16:17], v0 offset:16
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[7:8], v[7:8], v[16:17]
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], -v[5:6], 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], v[3:4]
	ds_load_2addr_b64 v[3:6], v0 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[9:10], v[9:10], v[5:6]
	v_fma_f64 v[5:6], v[5:6], -2.0, v[7:8]
	v_fma_f64 v[7:8], v[14:15], s[8:9], v[16:17]
	v_add_nc_u32_e32 v16, 0x330, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	v_fma_f64 v[5:6], v[9:10], s[10:11], v[7:8]
	v_add_nc_u32_e32 v10, 0x110, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[3:4], v[3:4], s[0:1], v[5:6]
	v_add_co_u32 v5, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v8, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v2, vcc_lo
	global_store_b64 v[12:13], v[3:4], off
	global_load_b128 v[0:3], v[5:6], off offset:-16
	global_load_b64 v[12:13], v[8:9], off offset:-16
	ds_load_2addr_b64 v[4:7], v10 offset1:1
	ds_load_b64 v[14:15], v10 offset:16
	ds_load_b64 v[10:11], v16 offset:16
	s_waitcnt lgkmcnt(1)
	v_fma_f64 v[14:15], v[6:7], -2.0, v[14:15]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[4:5]
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], -v[0:1], 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], v[12:13], v[2:3]
	ds_load_2addr_b64 v[0:3], v16 offset1:1
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[4:5], v[4:5], v[10:11]
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[6:7], v[6:7], v[2:3]
	v_fma_f64 v[10:11], v[12:13], s[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[2:3], -2.0, v[4:5]
	v_fma_f64 v[4:5], v[6:7], s[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_fma_f64 v[0:1], v[0:1], s[0:1], v[4:5]
	global_store_b64 v[8:9], v[0:1], off offset:-8
.LBB2_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22calcVerticalBoundariesPdS_S_iiddd
		.amdhsa_group_segment_fixed_size 1088
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z22calcVerticalBoundariesPdS_S_iiddd, .Lfunc_end2-_Z22calcVerticalBoundariesPdS_S_iiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 944
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1088 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24calcHorizontalBoundariesPdS_S_iiddd ; -- Begin function _Z24calcHorizontalBoundariesPdS_S_iiddd
	.globl	_Z24calcHorizontalBoundariesPdS_S_iiddd
	.p2align	8
	.type	_Z24calcHorizontalBoundariesPdS_S_iiddd,@function
_Z24calcHorizontalBoundariesPdS_S_iiddd: ; @_Z24calcHorizontalBoundariesPdS_S_iiddd
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x44
	s_load_b64 s[8:9], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v12, 3, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s9, s9, -1
	v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
	s_ashr_i32 s3, s8, 31
	s_mov_b32 s2, s8
	s_mul_i32 s10, s9, s8
	s_lshl_b64 s[2:3], s[2:3], 3
	s_ashr_i32 s11, s10, 31
	s_sub_i32 s14, s10, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_lshl_b64 s[12:13], s[10:11], 3
	s_ashr_i32 s15, s14, 31
	v_lshlrev_b64 v[1:2], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v2, vcc_lo
	s_lshl_b64 s[6:7], s[14:15], 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, s2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, v4, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, v4, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v5, vcc_lo
	s_clause 0x3
	global_load_b64 v[13:14], v[4:5], off
	global_load_b64 v[15:16], v[6:7], off
	global_load_b64 v[17:18], v[8:9], off
	global_load_b64 v[19:20], v[10:11], off
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_cmp_ne_u32_e64 s2, 0, v3
	s_waitcnt vmcnt(1)
	ds_store_2addr_b64 v12, v[17:18], v[13:14] offset0:1 offset1:35
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v12, v[15:16], v[19:20] offset0:69 offset1:103
	s_and_b32 s3, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_clause 0x3
	global_load_b64 v[13:14], v[4:5], off offset:-8
	global_load_b64 v[15:16], v[6:7], off offset:-8
	global_load_b64 v[17:18], v[8:9], off offset:-8
	global_load_b64 v[19:20], v[10:11], off offset:-8
	v_mov_b32_e32 v21, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b64 v21, v[17:18], v[13:14] offset1:34
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v21, v[15:16], v[19:20] offset0:68 offset1:102
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s9, s8, -1
	v_cmp_eq_u32_e64 s2, 31, v0
	v_cmp_ne_u32_e64 s3, s9, v3
	v_cmp_eq_u32_e32 vcc_lo, s9, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s2, s3
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB3_4
; %bb.3:
	s_clause 0x3
	global_load_b64 v[4:5], v[4:5], off offset:8
	global_load_b64 v[6:7], v[6:7], off offset:8
	global_load_b64 v[8:9], v[8:9], off offset:8
	global_load_b64 v[10:11], v[10:11], off offset:8
	v_mov_b32_e32 v0, 0
	s_waitcnt vmcnt(1)
	ds_store_2addr_b64 v0, v[8:9], v[4:5] offset0:33 offset1:67
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v0, v[6:7], v[10:11] offset0:101 offset1:135
.LBB3_4:
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_ne_u32_e64 s2, 0, v3
	s_xor_b32 s3, vcc_lo, -1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_6
; %bb.5:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_add_nc_u32_e32 v3, s8, v3
	s_load_b128 s[8:11], s[0:1], 0x20
	v_add_nc_u32_e32 v0, 0x110, v12
	s_load_b64 s[0:1], s[0:1], 0x30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v13, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[7:8], v[5:6], off
	s_clause 0x1
	global_load_b64 v[9:10], v[3:4], off
	global_load_b64 v[15:16], v[13:14], off
	ds_load_2addr_b64 v[3:6], v0 offset1:1
	ds_load_b64 v[17:18], v0 offset:16
	v_add_nc_u32_e32 v0, 0x220, v12
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[17:18], v[5:6], -2.0, v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[3:4], v[17:18], v[3:4]
	ds_load_b64 v[17:18], v0 offset:16
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[17:18]
	s_waitcnt vmcnt(1)
	v_add_f64 v[17:18], -v[9:10], 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[15:16], v[7:8], v[15:16]
	ds_load_2addr_b64 v[7:10], v0 offset1:1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	v_fma_f64 v[3:4], v[9:10], -2.0, v[3:4]
	v_fma_f64 v[9:10], v[15:16], s[8:9], v[17:18]
	v_add_nc_u32_e32 v16, 0x330, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[3:4], v[7:8], v[3:4]
	v_add_co_u32 v8, vcc_lo, s4, v1
	v_fma_f64 v[5:6], v[5:6], s[10:11], v[9:10]
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[3:4], v[3:4], s[0:1], v[5:6]
	v_add_co_u32 v5, vcc_lo, v13, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v14, vcc_lo
	v_add_co_u32 v10, vcc_lo, v13, s12
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v14, vcc_lo
	global_store_b64 v[8:9], v[3:4], off
	global_load_b64 v[4:5], v[5:6], off
	global_load_b64 v[6:7], v[0:1], off
	global_load_b64 v[10:11], v[10:11], off
	ds_load_2addr_b64 v[0:3], v12 offset1:1
	ds_load_b64 v[13:14], v12 offset:16
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[13:14], v[2:3], -2.0, v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[13:14], v[0:1]
	ds_load_b64 v[12:13], v16 offset:16
	s_waitcnt vmcnt(2)
	v_add_f64 v[14:15], -v[4:5], 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[6:7], v[10:11]
	ds_load_2addr_b64 v[4:7], v16 offset1:1
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[12:13]
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[10:11], v[10:11], s[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[6:7], -2.0, v[0:1]
	v_fma_f64 v[2:3], v[2:3], s[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[4:5], v[0:1]
	v_fma_f64 v[0:1], v[0:1], s[0:1], v[2:3]
	v_add_co_u32 v2, vcc_lo, v8, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v9, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB3_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24calcHorizontalBoundariesPdS_S_iiddd
		.amdhsa_group_segment_fixed_size 1088
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z24calcHorizontalBoundariesPdS_S_iiddd, .Lfunc_end3-_Z24calcHorizontalBoundariesPdS_S_iiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1032
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1088 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10calcCornerPdS_iid   ; -- Begin function _Z10calcCornerPdS_iid
	.globl	_Z10calcCornerPdS_iid
	.p2align	8
	.type	_Z10calcCornerPdS_iid,@function
_Z10calcCornerPdS_iid:                  ; @_Z10calcCornerPdS_iid
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_mov_b32 s10, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_mov_b32 s8, 0
	v_cmpx_lt_i32_e32 0, v1
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB4_8
; %bb.1:                                ; %NodeBlock
	s_mov_b32 s11, exec_lo
	v_cmpx_lt_i32_e32 1, v1
	s_xor_b32 s11, exec_lo, s11
	s_cbranch_execz .LBB4_5
; %bb.2:                                ; %LeafBlock61
	s_mov_b32 s12, -1
	s_mov_b32 s10, exec_lo
	v_cmpx_eq_u32_e32 2, v1
	s_cbranch_execz .LBB4_4
; %bb.3:
	s_add_i32 s12, s5, -2
	v_mov_b32_e32 v2, 0
	s_mul_i32 s12, s12, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s13, s12, 31
	s_lshl_b64 s[14:15], s[12:13], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_add_u32 s16, s2, s14
	s_addc_u32 s17, s3, s15
	s_add_u32 s14, s0, s14
	s_addc_u32 s15, s1, s15
	s_add_i32 s12, s12, s4
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[12:13], 3
	s_add_u32 s18, s2, s12
	s_addc_u32 s19, s3, s13
	s_load_b64 s[14:15], s[14:15], 0x8
	s_load_b64 s[18:19], s[18:19], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[0:1], s[14:15], -s[18:19]
	s_load_b64 s[14:15], s[16:17], 0x8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[6:7], s[14:15]
	s_add_u32 s14, s0, s12
	s_addc_u32 s15, s1, s13
	s_xor_b32 s12, exec_lo, -1
	global_store_b64 v2, v[0:1], s[14:15]
.LBB4_4:                                ; %Flow66
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s10, s12, exec_lo
.LBB4_5:                                ; %Flow65
	s_and_not1_saveexec_b32 s11, s11
	s_cbranch_execz .LBB4_7
; %bb.6:
	s_lshl_b32 s12, s4, 1
	s_mov_b32 s16, s4
	s_ashr_i32 s13, s12, 31
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[12:13], s[12:13], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s18, s2, s12
	s_addc_u32 s19, s3, s13
	s_add_u32 s14, s18, -16
	s_addc_u32 s15, s19, -1
	s_add_u32 s20, s0, s12
	s_addc_u32 s21, s1, s13
	s_add_u32 s12, s20, -16
	s_addc_u32 s13, s21, -1
	s_ashr_i32 s17, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[16:17], 3
	s_sub_u32 s18, s18, s16
	s_subb_u32 s19, s19, s17
	s_add_u32 s18, s18, -8
	s_addc_u32 s19, s19, -1
	s_load_b64 s[12:13], s[12:13], 0x0
	s_load_b64 s[18:19], s[18:19], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[0:1], s[12:13], -s[18:19]
	s_load_b64 s[12:13], s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[6:7], s[12:13]
	s_sub_u32 s12, s20, s16
	s_subb_u32 s13, s21, s17
	global_store_b64 v2, v[0:1], s[12:13] offset:-8
.LBB4_7:                                ; %Flow67
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s10, s10, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
.LBB4_8:                                ; %Flow
	s_and_not1_saveexec_b32 s9, s9
; %bb.9:                                ; %LeafBlock
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	s_and_not1_b32 s10, s10, exec_lo
	s_mov_b32 s8, exec_lo
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s10, s10, s11
; %bb.10:                               ; %Flow68
	s_or_b32 exec_lo, exec_lo, s9
	s_and_saveexec_b32 s9, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB4_12
; %bb.11:
	s_mul_i32 s10, s5, s4
	v_mov_b32_e32 v2, 0
	s_sub_i32 s5, s10, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s12, s5, -2
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[12:13], 3
	s_add_u32 s14, s2, s12
	s_addc_u32 s15, s3, s13
	s_add_u32 s12, s0, s12
	s_addc_u32 s13, s1, s13
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[10:11], 3
	s_add_u32 s5, s2, s10
	s_addc_u32 s17, s3, s11
	s_add_u32 s16, s5, -8
	s_addc_u32 s17, s17, -1
	s_load_b64 s[12:13], s[12:13], 0x0
	s_load_b64 s[16:17], s[16:17], 0x0
	s_add_u32 s10, s0, s10
	s_addc_u32 s11, s1, s11
	s_and_not1_b32 s8, s8, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[0:1], s[12:13], -s[16:17]
	s_load_b64 s[12:13], s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[6:7], s[12:13]
	global_store_b64 v2, v[0:1], s[10:11] offset:-8
.LBB4_12:                               ; %Flow69
	s_or_b32 exec_lo, exec_lo, s9
	s_and_saveexec_b32 s5, s8
	s_cbranch_execz .LBB4_14
; %bb.13:
	s_ashr_i32 s5, s4, 31
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[4:5], s[4:5], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s2, s4
	s_addc_u32 s9, s3, s5
	s_add_u32 s4, s0, s4
	s_addc_u32 s5, s1, s5
	s_load_b64 s[4:5], s[4:5], 0x8
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[0:1], s[4:5], -s[2:3]
	s_load_b64 s[2:3], s[8:9], 0x8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[6:7], s[2:3]
	global_store_b64 v2, v[0:1], s[0:1]
.LBB4_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10calcCornerPdS_iid
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z10calcCornerPdS_iid, .Lfunc_end4-_Z10calcCornerPdS_iid
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 736
; NumSgprs: 24
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
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        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           8
        .value_kind:     by_value
      - .offset:         80
        .size:           8
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         92
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         100
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         102
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         104
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         106
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         108
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         110
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         152
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 17432
    .kernarg_segment_align: 8
    .kernarg_segment_size: 344
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6calcEzPdS_S_S_iiiiidddd
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z6calcEzPdS_S_S_iiiiidddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     34
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
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        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
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        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
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        .size:           8
        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8712
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5calcHPdS_S_S_S_iiddd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5calcHPdS_S_S_S_iiddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
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        .size:           4
        .value_kind:     by_value
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        .size:           8
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        .size:           4
        .value_kind:     hidden_block_count_x
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        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
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        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1088
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22calcVerticalBoundariesPdS_S_iiddd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22calcVerticalBoundariesPdS_S_iiddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
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        .size:           8
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        .size:           2
        .value_kind:     hidden_remainder_z
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    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24calcHorizontalBoundariesPdS_S_iiddd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24calcHorizontalBoundariesPdS_S_iiddd.kd
    .uniform_work_group_size: 1
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    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10calcCornerPdS_iid
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z10calcCornerPdS_iid.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
