#include <stdlib.h>
#include <stdio.h>
#include <time.h>



#define THREADS 128 // 2^7
#define BLOCKS 1024 // 2^10
#define NUM_VALS THREADS*BLOCKS

#define checkCudaErrors(func)                                                \
{                                                                       \
  cudaError_t E  = func;                                                \
  if(E != cudaSuccess)                                                  \
  {                                                                     \
    printf( "\nError at line: %d ", __LINE__);                          \
    printf( "\nError:  %s ", cudaGetErrorString(E));                    \
  }                                                                     \
}  

void print_elapsed(clock_t start, clock_t stop)
{
  double elapsed = ((double) (stop - start)) / CLOCKS_PER_SEC;
  printf("Elapsed time: %.3fs\n", elapsed);
}

// GPU helper function
// calculate the id of the current thread
__device__ unsigned int getIdx(dim3* threads, dim3* blocks) {
    int x;
    return threadIdx.x +
           threadIdx.y * (x  = threads->x) +
           threadIdx.z * (x *= threads->y) +
           blockIdx.x  * (x *= threads->z) +
           blockIdx.y  * (x *= blocks->z) +
           blockIdx.z  * (x *= blocks->y);
}

//
// Perform a full mergesort on our section of the data.
//
__device__ void gpu_bottomUpMerge(long* source, long* dest, long start, long middle, long end) {
    long i = start;
    long j = middle;
    for (long k = start; k < end; k++) {
        if (i < middle && (j >= end || source[i] < source[j])) {
            dest[k] = source[i];
            i++;
        } else {
            dest[k] = source[j];
            j++;
        }
    }
}
__global__ void gpu_mergesort(long* source, long* dest, long size, long width, long slices, dim3* threads, dim3* blocks) {
    unsigned int idx = getIdx(threads, blocks);
    long start = width*idx*slices, 
         middle, 
         end;

    for (long slice = 0; slice < slices; slice++) {
        if (start >= size)
            break;

        middle = min(start + (width >> 1), size);
        end = min(start + width, size);
        gpu_bottomUpMerge(source, dest, start, middle, end);
        start += width;
    }
}


//
// Finally, sort something
// gets called by gpu_mergesort() for each slice
//

void mergesort(long* data, long size, dim3 threadsPerBlock, dim3 blocksPerGrid) {

    //
    // Allocate two arrays on the GPU
    // we switch back and forth between them during the sort
    //
    long* D_data;
    long* D_swp;
    dim3* D_threads;
    dim3* D_blocks;
    
    // Actually allocate the two arrays
    checkCudaErrors(cudaMalloc((void**) &D_data, size * sizeof(long)));
    checkCudaErrors(cudaMalloc((void**) &D_swp, size * sizeof(long)));


    // Copy from our input list into the first array
    checkCudaErrors(cudaMemcpy(D_data, data, size * sizeof(long), cudaMemcpyHostToDevice));

    //
    // Copy the thread / block info to the GPU as well
    //
    checkCudaErrors(cudaMalloc((void**) &D_threads, sizeof(dim3)));
    checkCudaErrors(cudaMalloc((void**) &D_blocks, sizeof(dim3)));

 
    checkCudaErrors(cudaMemcpy(D_threads, &threadsPerBlock, sizeof(dim3), cudaMemcpyHostToDevice));
    checkCudaErrors(cudaMemcpy(D_blocks, &blocksPerGrid, sizeof(dim3), cudaMemcpyHostToDevice));



    long* A = D_data;
    long* B = D_swp;

    long nThreads = threadsPerBlock.x * threadsPerBlock.y * threadsPerBlock.z *
                    blocksPerGrid.x * blocksPerGrid.y * blocksPerGrid.z;


    for (int width = 2; width < (size << 1); width <<= 1) {
        long slices = size / ((nThreads) * width) + 1;


        gpu_mergesort<<<blocksPerGrid, threadsPerBlock>>>(A, B, size, width, slices, D_threads, D_blocks);

        A = A == D_data ? D_swp : D_data;
        B = B == D_data ? D_swp : D_data;
    }


    checkCudaErrors(cudaMemcpy(data, A, size * sizeof(long), cudaMemcpyDeviceToHost));

    
    checkCudaErrors(cudaFree(A));
    checkCudaErrors(cudaFree(B));
   
}




int main(int argc, char const *argv[])
{
  clock_t start, stop;

  long *values = (long*)malloc(NUM_VALS * sizeof(long));

  FILE *f = fopen("reverse_dataset.txt", "r");

  for(int i=0;i< NUM_VALS; i++) {
    fscanf(f, "%d\n", &values[i]);
  }

  dim3 blocks(BLOCKS,1);    
  dim3 threads(THREADS,1); 
  start  = clock();
  mergesort(values, NUM_VALS, threads, blocks);
  stop = clock();

  print_elapsed(start, stop);
  return 0;
}

	.file	"tmpxft_002f340c_00000000-6_mergesort.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Elapsed time: %.3fs\n"
	.text
	.globl	_Z13print_elapsedll
	.type	_Z13print_elapsedll, @function
_Z13print_elapsedll:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	%rdi, %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtsi2sdq	%rsi, %xmm0
	leaq	.LC1(%rip), %rsi
	divsd	.LC0(%rip), %xmm0
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z13print_elapsedll, .-_Z13print_elapsedll
	.globl	_Z6getIdxP4dim3S0_
	.type	_Z6getIdxP4dim3S0_, @function
_Z6getIdxP4dim3S0_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z6getIdxP4dim3S0_, .-_Z6getIdxP4dim3S0_
	.globl	_Z17gpu_bottomUpMergePlS_lll
	.type	_Z17gpu_bottomUpMergePlS_lll, @function
_Z17gpu_bottomUpMergePlS_lll:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z17gpu_bottomUpMergePlS_lll, .-_Z17gpu_bottomUpMergePlS_lll
	.globl	_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_
	.type	_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_, @function
_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13gpu_mergesortPlS_lllP4dim3S1_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L7:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_, .-_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_
	.globl	_Z13gpu_mergesortPlS_lllP4dim3S1_
	.type	_Z13gpu_mergesortPlS_lllP4dim3S1_, @function
_Z13gpu_mergesortPlS_lllP4dim3S1_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_
	.cfi_endproc
.LFE2057:
	.size	_Z13gpu_mergesortPlS_lllP4dim3S1_, .-_Z13gpu_mergesortPlS_lllP4dim3S1_
	.section	.rodata.str1.1
.LC2:
	.string	"\nError at line: %d "
.LC3:
	.string	"\nError:  %s "
	.text
	.globl	_Z9mergesortPll4dim3S0_
	.type	_Z9mergesortPll4dim3S0_, @function
_Z9mergesortPll4dim3S0_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 16(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rdx, 48(%rsp)
	movl	%ecx, 56(%rsp)
	movq	%r8, 32(%rsp)
	movl	%r9d, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	0(,%rsi,8), %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L14
	movl	$90, %edx
	leaq	.LC2(%rip), %rsi
	movl	%eax, %ebx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L15
	movl	$91, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L16
	movl	$95, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	leaq	88(%rsp), %rdi
	movl	$12, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
	movl	$100, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L17:
	leaq	96(%rsp), %rdi
	movl	$12, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L18
	movl	$101, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L18:
	movq	88(%rsp), %rdi
	leaq	48(%rsp), %rsi
	movl	$1, %ecx
	movl	$12, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L19
	movl	$104, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L19:
	movq	96(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movl	$1, %ecx
	movl	$12, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L20
	movl	$105, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L20:
	movl	48(%rsp), %ebx
	imull	52(%rsp), %ebx
	leaq	0(%rbp,%rbp), %r15
	movl	$2, %r14d
	imull	56(%rsp), %ebx
	movq	72(%rsp), %r12
	imull	32(%rsp), %ebx
	movq	80(%rsp), %r13
	imull	36(%rsp), %ebx
	imull	40(%rsp), %ebx
.L21:
	movslq	%r14d, %r10
	cmpq	%r15, %r10
	jge	.L62
	movl	56(%rsp), %ecx
	movq	48(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	movq	%r10, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	24(%rsp), %r10
	testl	%eax, %eax
	jne	.L22
	movq	%r10, %rcx
	movq	%rbp, %rax
	movq	%r13, %rsi
	movq	%r12, %rdi
	imulq	%rbx, %rcx
	cqto
	idivq	%rcx
	movq	%r10, %rcx
	pushq	%rdx
	.cfi_def_cfa_offset 184
	leaq	1(%rax), %r8
	movq	%rbp, %rdx
	pushq	104(%rsp)
	.cfi_def_cfa_offset 192
	movq	104(%rsp), %r9
	call	_Z47__device_stub__Z13gpu_mergesortPlS_lllP4dim3S1_PlS_lllP4dim3S1_
	popq	%rcx
	.cfi_def_cfa_offset 184
	popq	%rsi
	.cfi_def_cfa_offset 176
.L22:
	movq	72(%rsp), %rax
	cmpq	%r12, %rax
	jne	.L30
	movq	80(%rsp), %r12
	jmp	.L23
.L30:
	movq	%rax, %r12
.L23:
	cmpq	%r13, %rax
	jne	.L24
	movq	80(%rsp), %rax
.L24:
	addl	%r14d, %r14d
	movq	%rax, %r13
	jmp	.L21
.L62:
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L26
	movl	$127, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L26:
	movq	%r12, %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L27
	movl	$130, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	movq	%r13, %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L13
	movl	$131, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z9mergesortPll4dim3S0_, .-_Z9mergesortPll4dim3S0_
	.section	.rodata.str1.1
.LC4:
	.string	"r"
.LC5:
	.string	"reverse_dataset.txt"
.LC6:
	.string	"%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1048576, %edi
	leaq	.LC6(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	call	malloc@PLT
	leaq	.LC4(%rip), %rsi
	leaq	.LC5(%rip), %rdi
	movq	%rax, %rbx
	call	fopen@PLT
	movq	%rbx, %rbp
	leaq	1048576(%rbx), %r13
	movq	%rax, %r12
.L64:
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	addq	$8, %rbp
	cmpq	%r13, %rbp
	jne	.L64
	movl	$4194305, %eax
	movl	$1, 16(%rsp)
	salq	$10, %rax
	movl	$1, 28(%rsp)
	movq	%rax, 8(%rsp)
	subq	$896, %rax
	movq	%rax, 20(%rsp)
	call	clock@PLT
	movl	28(%rsp), %ecx
	movq	8(%rsp), %r8
	movq	%rbx, %rdi
	movl	16(%rsp), %r9d
	movq	20(%rsp), %rdx
	movl	$131072, %esi
	movq	%rax, %rbp
	call	_Z9mergesortPll4dim3S0_
	call	clock@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_Z13print_elapsedll
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z13gpu_mergesortPlS_lllP4dim3S1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13gpu_mergesortPlS_lllP4dim3S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>



#define THREADS 128 // 2^7
#define BLOCKS 1024 // 2^10
#define NUM_VALS THREADS*BLOCKS

#define checkCudaErrors(func)                                                \
{                                                                       \
  hipError_t E  = func;                                                \
  if(E != hipSuccess)                                                  \
  {                                                                     \
    printf( "\nError at line: %d ", __LINE__);                          \
    printf( "\nError:  %s ", hipGetErrorString(E));                    \
  }                                                                     \
}  

void print_elapsed(clock_t start, clock_t stop)
{
  double elapsed = ((double) (stop - start)) / CLOCKS_PER_SEC;
  printf("Elapsed time: %.3fs\n", elapsed);
}

// GPU helper function
// calculate the id of the current thread
__device__ unsigned int getIdx(dim3* threads, dim3* blocks) {
    int x;
    return threadIdx.x +
           threadIdx.y * (x  = threads->x) +
           threadIdx.z * (x *= threads->y) +
           blockIdx.x  * (x *= threads->z) +
           blockIdx.y  * (x *= blocks->z) +
           blockIdx.z  * (x *= blocks->y);
}

//
// Perform a full mergesort on our section of the data.
//
__device__ void gpu_bottomUpMerge(long* source, long* dest, long start, long middle, long end) {
    long i = start;
    long j = middle;
    for (long k = start; k < end; k++) {
        if (i < middle && (j >= end || source[i] < source[j])) {
            dest[k] = source[i];
            i++;
        } else {
            dest[k] = source[j];
            j++;
        }
    }
}
__global__ void gpu_mergesort(long* source, long* dest, long size, long width, long slices, dim3* threads, dim3* blocks) {
    unsigned int idx = getIdx(threads, blocks);
    long start = width*idx*slices, 
         middle, 
         end;

    for (long slice = 0; slice < slices; slice++) {
        if (start >= size)
            break;

        middle = min(start + (width >> 1), size);
        end = min(start + width, size);
        gpu_bottomUpMerge(source, dest, start, middle, end);
        start += width;
    }
}


//
// Finally, sort something
// gets called by gpu_mergesort() for each slice
//

void mergesort(long* data, long size, dim3 threadsPerBlock, dim3 blocksPerGrid) {

    //
    // Allocate two arrays on the GPU
    // we switch back and forth between them during the sort
    //
    long* D_data;
    long* D_swp;
    dim3* D_threads;
    dim3* D_blocks;
    
    // Actually allocate the two arrays
    checkCudaErrors(hipMalloc((void**) &D_data, size * sizeof(long)));
    checkCudaErrors(hipMalloc((void**) &D_swp, size * sizeof(long)));


    // Copy from our input list into the first array
    checkCudaErrors(hipMemcpy(D_data, data, size * sizeof(long), hipMemcpyHostToDevice));

    //
    // Copy the thread / block info to the GPU as well
    //
    checkCudaErrors(hipMalloc((void**) &D_threads, sizeof(dim3)));
    checkCudaErrors(hipMalloc((void**) &D_blocks, sizeof(dim3)));

 
    checkCudaErrors(hipMemcpy(D_threads, &threadsPerBlock, sizeof(dim3), hipMemcpyHostToDevice));
    checkCudaErrors(hipMemcpy(D_blocks, &blocksPerGrid, sizeof(dim3), hipMemcpyHostToDevice));



    long* A = D_data;
    long* B = D_swp;

    long nThreads = threadsPerBlock.x * threadsPerBlock.y * threadsPerBlock.z *
                    blocksPerGrid.x * blocksPerGrid.y * blocksPerGrid.z;


    for (int width = 2; width < (size << 1); width <<= 1) {
        long slices = size / ((nThreads) * width) + 1;


        gpu_mergesort<<<blocksPerGrid, threadsPerBlock>>>(A, B, size, width, slices, D_threads, D_blocks);

        A = A == D_data ? D_swp : D_data;
        B = B == D_data ? D_swp : D_data;
    }


    checkCudaErrors(hipMemcpy(data, A, size * sizeof(long), hipMemcpyDeviceToHost));

    
    checkCudaErrors(hipFree(A));
    checkCudaErrors(hipFree(B));
   
}




int main(int argc, char const *argv[])
{
  clock_t start, stop;

  long *values = (long*)malloc(NUM_VALS * sizeof(long));

  FILE *f = fopen("reverse_dataset.txt", "r");

  for(int i=0;i< NUM_VALS; i++) {
    fscanf(f, "%d\n", &values[i]);
  }

  dim3 blocks(BLOCKS,1);    
  dim3 threads(THREADS,1); 
  start  = clock();
  mergesort(values, NUM_VALS, threads, blocks);
  stop = clock();

  print_elapsed(start, stop);
  return 0;
}

	.text
	.file	"mergesort.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13print_elapsedll
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z13print_elapsedll
	.type	_Z13print_elapsedll,@function
_Z13print_elapsedll:                    # @_Z13print_elapsedll
	.cfi_startproc
# %bb.0:
	subq	%rdi, %rsi
	cvtsi2sd	%rsi, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	jmp	printf                          # TAILCALL
.Lfunc_end0:
	.size	_Z13print_elapsedll, .Lfunc_end0-_Z13print_elapsedll
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_ # -- Begin function _Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_
	.type	_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_,@function
_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_: # @_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13gpu_mergesortPlS_lllP4dim3S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_, .Lfunc_end1-_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9mergesortPll4dim3S0_         # -- Begin function _Z9mergesortPll4dim3S0_
	.type	_Z9mergesortPll4dim3S0_,@function
_Z9mergesortPll4dim3S0_:                # @_Z9mergesortPll4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %r14
	movq	%rdx, 24(%rsp)
	movl	%ecx, 32(%rsp)
	movq	%r8, 8(%rsp)
	movl	%r9d, 16(%rsp)
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	leaq	(,%rsi,8), %r15
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$92, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_2:
	leaq	72(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_4
# %bb.3:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$93, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_4:
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_6
# %bb.5:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$97, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_6:
	leaq	64(%rsp), %rdi
	movl	$12, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_8
# %bb.7:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$102, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_8:
	leaq	56(%rsp), %rdi
	movl	$12, %esi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB2_10
# %bb.9:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$103, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_10:
	movq	64(%rsp), %rdi
	leaq	24(%rsp), %rsi
	movl	$12, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_12
# %bb.11:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$106, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_12:
	movq	%r14, 88(%rsp)                  # 8-byte Spill
	movq	56(%rsp), %rdi
	leaq	8(%rsp), %rsi
	movl	$12, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_14
# %bb.13:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$107, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_14:
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	movq	40(%rsp), %r12
	movq	72(%rsp), %rbp
	movq	48(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rax), %r14
	cmpq	$3, %r14
	jl	.LBB2_15
# %bb.23:                               # %.lr.ph.preheader
	movl	28(%rsp), %eax
	imull	24(%rsp), %eax
	imull	32(%rsp), %eax
	imull	8(%rsp), %eax
	imull	12(%rsp), %eax
	imull	16(%rsp), %eax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movl	$2, %r15d
	movl	$2, %ebx
.LBB2_24:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	movq	24(%rsp), %rdx
	movl	32(%rsp), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.25:                               #   in Loop: Header=BB2_24 Depth=1
	movq	%rbx, %rcx
	imulq	96(%rsp), %rcx                  # 8-byte Folded Reload
	movq	48(%rsp), %r10                  # 8-byte Reload
	movq	%r10, %rax
	cqto
	idivq	%rcx
	leaq	1(%rax), %r8
	movq	64(%rsp), %r9
	movq	56(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%r12, %rdi
	movq	%rbp, %rsi
	movq	%r10, %rdx
	movq	%rbx, %rcx
	callq	_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_
.LBB2_26:                               #   in Loop: Header=BB2_24 Depth=1
	movq	40(%rsp), %r13
	cmpq	%r13, %r12
	movq	72(%rsp), %rax
	movq	%r13, %r12
	cmoveq	%rax, %r12
	cmpq	%r13, %rbp
	cmoveq	%rax, %r13
	addl	%r15d, %r15d
	movslq	%r15d, %rbx
	movq	%r13, %rbp
	cmpq	%rbx, %r14
	jg	.LBB2_24
	jmp	.LBB2_16
.LBB2_15:
	movq	%rbp, %r13
.LBB2_16:                               # %._crit_edge
	movq	88(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rsi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB2_18
# %bb.17:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$129, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_18:
	movq	%r12, %rdi
	callq	hipFree
	testl	%eax, %eax
	je	.LBB2_20
# %bb.19:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$132, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_20:
	movq	%r13, %rdi
	callq	hipFree
	testl	%eax, %eax
	je	.LBB2_22
# %bb.21:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$133, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_22:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9mergesortPll4dim3S0_, .Lfunc_end2-_Z9mergesortPll4dim3S0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$1048576, %edi                  # imm = 0x100000
	callq	malloc
	movq	%rax, %rbx
	movl	$.L.str.3, %edi
	movl	$.L.str.4, %esi
	callq	fopen
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rbx,%r15), %rdx
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	addq	$8, %r15
	cmpq	$1048576, %r15                  # imm = 0x100000
	jne	.LBB3_1
# %bb.2:
	callq	clock
	movq	%rax, %r14
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	leaq	896(%rdx), %r8
	movl	$131072, %esi                   # imm = 0x20000
	movq	%rbx, %rdi
	movl	$1, %ecx
	movl	$1, %r9d
	callq	_Z9mergesortPll4dim3S0_
	callq	clock
	subq	%r14, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13gpu_mergesortPlS_lllP4dim3S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Elapsed time: %.3fs\n"
	.size	.L.str, 21

	.type	_Z13gpu_mergesortPlS_lllP4dim3S1_,@object # @_Z13gpu_mergesortPlS_lllP4dim3S1_
	.section	.rodata,"a",@progbits
	.globl	_Z13gpu_mergesortPlS_lllP4dim3S1_
	.p2align	3, 0x0
_Z13gpu_mergesortPlS_lllP4dim3S1_:
	.quad	_Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_
	.size	_Z13gpu_mergesortPlS_lllP4dim3S1_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"\nError at line: %d "
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\nError:  %s "
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"reverse_dataset.txt"
	.size	.L.str.3, 20

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"r"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d\n"
	.size	.L.str.5, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13gpu_mergesortPlS_lllP4dim3S1_"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__gpu_mergesortPlS_lllP4dim3S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13gpu_mergesortPlS_lllP4dim3S1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13gpu_mergesortPlS_lllP4dim3S1_ ; -- Begin function _Z13gpu_mergesortPlS_lllP4dim3S1_
	.globl	_Z13gpu_mergesortPlS_lllP4dim3S1_
	.p2align	8
	.type	_Z13gpu_mergesortPlS_lllP4dim3S1_,@function
_Z13gpu_mergesortPlS_lllP4dim3S1_:      ; @_Z13gpu_mergesortPlS_lllP4dim3S1_
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x20
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[2:3], s[8:9], 0x4
	s_clause 0x1
	s_load_b32 s8, s[6:7], 0x8
	s_load_b64 s[6:7], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s14
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s13
	v_mad_u64_u32 v[2:3], null, s2, s8, v[1:2]
	s_load_b256 s[8:15], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_mov_b64 s[2:3], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s7, v[1:2]
	v_mad_u64_u32 v[4:5], null, v3, s6, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s4, s14
	s_mul_hi_u32 s1, s4, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s0, v4, 0
	s_mul_i32 s0, s4, s15
	s_add_i32 s0, s1, s0
	s_mul_i32 s1, s5, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s0, v4, v[1:2]
	v_cmp_gt_i64_e64 s0, s[4:5], 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v2
	v_cmp_gt_i64_e32 vcc_lo, s[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_17
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	v_cmp_gt_i64_e64 s1, s[14:15], 0
	s_ashr_i64 s[6:7], s[14:15], 1
	s_mov_b32 s16, 0
                                        ; implicit-def: $vgpr4_vgpr5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_lshl_b64 s[10:11], s[14:15], 3
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_add_co_u32 v6, vcc_lo, v0, s14
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v1, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_16
; %bb.3:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v8, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v1, vcc_lo
	v_cmp_gt_i64_e64 s0, s[12:13], v[6:7]
	v_dual_mov_b32 v15, v1 :: v_dual_mov_b32 v14, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cmp_gt_i64_e32 vcc_lo, s[12:13], v[8:9]
	s_mov_b32 s17, 0
	v_mov_b32_e32 v13, v3
	v_cndmask_b32_e64 v11, s13, v7, s0
	v_cndmask_b32_e64 v10, s12, v6, s0
	v_dual_mov_b32 v12, v2 :: v_dual_cndmask_b32 v9, s13, v9
	v_cndmask_b32_e32 v8, s12, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v16, v8
.LBB0_4:                                ; %.lr.ph.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s0, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $vgpr18_vgpr19
	v_cmpx_ge_i64_e64 v[14:15], v[8:9]
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB0_6
; %bb.5:                                ; %.lr.ph._crit_edge.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[18:19], 3, v[16:17]
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s8, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s9, v19, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_saveexec_b32 s18, s18
	s_mov_b32 s19, 0
	s_xor_b32 exec_lo, exec_lo, s18
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=2
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[4:5], 3, v[14:15]
	v_cmp_ge_i64_e64 s19, v[16:17], v[10:11]
	s_mov_b32 s21, s0
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $vgpr18_vgpr19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	v_cmpx_lt_i64_e64 v[16:17], v[10:11]
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_4 Depth=2
	s_waitcnt vmcnt(1)
	v_lshlrev_b64 v[18:19], 3, v[16:17]
	s_and_not1_b32 s21, s0, exec_lo
	s_or_b32 s19, s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s8, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s9, v19, vcc_lo
	global_load_b64 v[18:19], v[18:19], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i64_e32 vcc_lo, v[4:5], v[18:19]
	s_and_b32 s22, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s21, s21, s22
.LBB0_9:                                ; %Flow59
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s20, s21, exec_lo
	s_and_b32 s19, s19, exec_lo
	s_or_b32 s0, s0, s20
.LBB0_10:                               ; %Flow58
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
                                        ; implicit-def: $vgpr20_vgpr21
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=2
	v_add_co_u32 v20, vcc_lo, v16, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v17, vcc_lo
	s_and_not1_b32 s19, s19, exec_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[12:13], v[18:19], off
.LBB0_12:                               ; %Flow60
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s0, s19
	s_cbranch_execz .LBB0_14
; %bb.13:                               ; %._crit_edge31.i
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_co_u32 v14, vcc_lo, v14, 1
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v15, vcc_lo
	v_dual_mov_b32 v21, v17 :: v_dual_mov_b32 v20, v16
	s_waitcnt vmcnt(0)
	global_store_b64 v[12:13], v[4:5], off
.LBB0_14:                               ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v12, s0, v12, 8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v13, s0, 0, v13, s0
	v_cmp_ge_i64_e32 vcc_lo, v[0:1], v[10:11]
	v_dual_mov_b32 v16, v20 :: v_dual_mov_b32 v17, v21
	s_or_b32 s17, vcc_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_4
; %bb.15:                               ; %Flow61
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_16:                               ; %_Z17gpu_bottomUpMergePlS_lll.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	v_cmp_le_i64_e32 vcc_lo, s[12:13], v[6:7]
	v_cmp_ge_i64_e64 s0, s[2:3], s[4:5]
	v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s16, s0, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_2
.LBB0_17:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13gpu_mergesortPlS_lllP4dim3S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13gpu_mergesortPlS_lllP4dim3S1_, .Lfunc_end0-_Z13gpu_mergesortPlS_lllP4dim3S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 836
; NumSgprs: 25
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13gpu_mergesortPlS_lllP4dim3S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z13gpu_mergesortPlS_lllP4dim3S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
