#include <iostream>
#include <stdio.h>
#include <math.h>

// kernels transpose a tile of TILE_DIM x TILE_DIM elements
// using a TILE_DIM x BLOCK_ROWS thread block, so that each thread
// transposes TILE_DIM/BLOCK_ROWS elements.
// TILE_DIM must be an integral multiple of BLOCK_ROWS
#define SIZE 10016
#define TILE_DIM 32
#define BLOCK_ROWS 8


__global__ void cuTranspose(int rows, int cols, const float *input, float *output) {

  __shared__ float tile[TILE_DIM][TILE_DIM];
  
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int index_in = x + (y)*rows;
  x = blockIdx.y * TILE_DIM + threadIdx.x;
  y = blockIdx.x * TILE_DIM + threadIdx.y;
  int index_out = x + (y)*cols;
  
  for (int i=0; i < TILE_DIM; i += BLOCK_ROWS) {
    tile[threadIdx.y+i][threadIdx.x] = input[index_in+i*rows];
  }
  __syncthreads();

  for (int i=0; i < TILE_DIM; i += BLOCK_ROWS) {
    output[index_out + i*cols] = tile[threadIdx.x][threadIdx.y + i];
  }

  return;
}

int check(int nrows, int ncols, float* input, float* output) {
    for (int i = 0; i < nrows; i++){
        for(int j = 0; j < ncols; j++) {
            if (input[i*ncols + j] != output[j*ncols + i]) {
                printf("Input at (%i, %i) not equal to output at (%i, %i) with %f != %f\n", i, j, j, i, input[i*ncols + j], output[j*ncols + i]);
                return 0;
            }
        }
    }
    return 1;
}

int main(void)
{
  int r = SIZE;  // rows
  int c = SIZE;  // columns
  int N = r*c;    // total matrix entries.

  float *input, *output;

  dim3 dimGrid(r/TILE_DIM, c/TILE_DIM, 1);
  dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

  // Allocate Unified Memory – accessible from CPU or GPU
  cudaMallocManaged(&input, N*sizeof(float));
  cudaMallocManaged(&output, N*sizeof(float));

  // initialize input and output matrices on the host
  for (int i = 0; i < r; i++) {
      for(int j = i; j < c; j++) {
        input[i*c + j] = (float)r*i + r*1.0f;
        output[i*c + j] = 5.0f;
      }

  }

  // Transpose the matrix
  cuTranspose<<<dimGrid, dimBlock>>>(r, c, input, output);

  // Wait for GPU to finish before accessing on host
  cudaDeviceSynchronize();

  if (!check(r, c, input, output)) {
      printf("Matrix entries not equal\n"); 
  } else {
      printf("Matrix transpose successful\n");
  }

  // Free memory
  cudaFree(input);
  cudaFree(output);
  
  return 0;
}

	.file	"tmpxft_002e41c8_00000000-6_ex2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Input at (%i, %i) not equal to output at (%i, %i) with %f != %f\n"
	.text
	.globl	_Z5checkiiPfS_
	.type	_Z5checkiiPfS_, @function
_Z5checkiiPfS_:
.LFB3635:
	.cfi_startproc
	endbr64
	movslq	%esi, %r10
	movl	%edi, %r11d
	movq	%rdx, %rdi
	xorl	%edx, %edx
	movq	%r10, %rax
	xorl	%r9d, %r9d
	salq	$2, %r10
	cmpl	%r11d, %edx
	jl	.L16
	movl	$1, %eax
	ret
.L16:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rsi
	.cfi_def_cfa_offset 32
.L13:
	movslq	%r9d, %rsi
	xorl	%r8d, %r8d
	leaq	(%rdi,%rsi,4), %rbx
	movq	%rcx, %rsi
.L4:
	cmpl	%r8d, %eax
	jle	.L18
	movss	(%rsi), %xmm1
	movss	(%rbx,%r8,4), %xmm0
	addq	%r10, %rsi
	leaq	1(%r8), %rbp
	ucomiss	%xmm1, %xmm0
	jp	.L10
	je	.L8
.L10:
	movl	%r8d, %ecx
	movl	%edx, %r9d
	leaq	.LC0(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L2
.L8:
	movq	%rbp, %r8
	jmp	.L4
.L18:
	incl	%edx
	addq	$4, %rcx
	addl	%eax, %r9d
	cmpl	%r11d, %edx
	jl	.L13
	movl	$1, %eax
.L2:
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z5checkiiPfS_, .-_Z5checkiiPfS_
	.globl	_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf
	.type	_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf, @function
_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11cuTransposeiiPKfPf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf, .-_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf
	.globl	_Z11cuTransposeiiPKfPf
	.type	_Z11cuTransposeiiPKfPf, @function
_Z11cuTransposeiiPKfPf:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf
	.cfi_endproc
.LFE3662:
	.size	_Z11cuTransposeiiPKfPf, .-_Z11cuTransposeiiPKfPf
	.section	.rodata.str1.1
.LC3:
	.string	"Matrix entries not equal\n"
.LC4:
	.string	"Matrix transpose successful\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movl	$1, %edx
	movl	$401281024, %esi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	movabsq	$1344324763961, %rax
	movq	%rsp, %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movl	$1073741825, %eax
	salq	$5, %rax
	movq	%rax, 28(%rsp)
	call	cudaMallocManaged@PLT
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$401281024, %esi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %r9
	movq	8(%rsp), %rdi
	xorl	%ecx, %ecx
	movss	.LC2(%rip), %xmm1
	movss	.LC1(%rip), %xmm2
	xorl	%edx, %edx
.L25:
	cvtsi2ssl	%edx, %xmm0
	movq	%rdx, %rax
	leaq	(%r9,%rcx), %r8
	leaq	(%rdi,%rcx), %rsi
	mulss	%xmm1, %xmm0
	addss	%xmm1, %xmm0
.L26:
	movss	%xmm0, (%r8,%rax,4)
	movss	%xmm2, (%rsi,%rax,4)
	incq	%rax
	cmpl	$10016, %eax
	jne	.L26
	incq	%rdx
	addq	$40064, %rcx
	cmpq	$10016, %rdx
	jne	.L25
	movl	36(%rsp), %ecx
	movq	28(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	8(%rsp), %rcx
	movq	(%rsp), %rdx
	movl	$10016, %esi
	movl	$10016, %edi
	call	_Z36__device_stub__Z11cuTransposeiiPKfPfiiPKfPf
.L28:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rcx
	movq	(%rsp), %rdx
	movl	$10016, %esi
	movl	$10016, %edi
	call	_Z5checkiiPfS_
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	testl	%eax, %eax
	je	.L34
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
.L34:
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z11cuTransposeiiPKfPf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11cuTransposeiiPKfPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1084227584
	.align 4
.LC2:
	.long	1176272896
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <math.h>

// kernels transpose a tile of TILE_DIM x TILE_DIM elements
// using a TILE_DIM x BLOCK_ROWS thread block, so that each thread
// transposes TILE_DIM/BLOCK_ROWS elements.
// TILE_DIM must be an integral multiple of BLOCK_ROWS
#define SIZE 10016
#define TILE_DIM 32
#define BLOCK_ROWS 8


__global__ void cuTranspose(int rows, int cols, const float *input, float *output) {

  __shared__ float tile[TILE_DIM][TILE_DIM];
  
  int x = blockIdx.x * TILE_DIM + threadIdx.x;
  int y = blockIdx.y * TILE_DIM + threadIdx.y;
  int index_in = x + (y)*rows;
  x = blockIdx.y * TILE_DIM + threadIdx.x;
  y = blockIdx.x * TILE_DIM + threadIdx.y;
  int index_out = x + (y)*cols;
  
  for (int i=0; i < TILE_DIM; i += BLOCK_ROWS) {
    tile[threadIdx.y+i][threadIdx.x] = input[index_in+i*rows];
  }
  __syncthreads();

  for (int i=0; i < TILE_DIM; i += BLOCK_ROWS) {
    output[index_out + i*cols] = tile[threadIdx.x][threadIdx.y + i];
  }

  return;
}

int check(int nrows, int ncols, float* input, float* output) {
    for (int i = 0; i < nrows; i++){
        for(int j = 0; j < ncols; j++) {
            if (input[i*ncols + j] != output[j*ncols + i]) {
                printf("Input at (%i, %i) not equal to output at (%i, %i) with %f != %f\n", i, j, j, i, input[i*ncols + j], output[j*ncols + i]);
                return 0;
            }
        }
    }
    return 1;
}

int main(void)
{
  int r = SIZE;  // rows
  int c = SIZE;  // columns
  int N = r*c;    // total matrix entries.

  float *input, *output;

  dim3 dimGrid(r/TILE_DIM, c/TILE_DIM, 1);
  dim3 dimBlock(TILE_DIM, BLOCK_ROWS, 1);

  // Allocate Unified Memory – accessible from CPU or GPU
  hipMallocManaged(&input, N*sizeof(float));
  hipMallocManaged(&output, N*sizeof(float));

  // initialize input and output matrices on the host
  for (int i = 0; i < r; i++) {
      for(int j = i; j < c; j++) {
        input[i*c + j] = (float)r*i + r*1.0f;
        output[i*c + j] = 5.0f;
      }

  }

  // Transpose the matrix
  cuTranspose<<<dimGrid, dimBlock>>>(r, c, input, output);

  // Wait for GPU to finish before accessing on host
  hipDeviceSynchronize();

  if (!check(r, c, input, output)) {
      printf("Matrix entries not equal\n"); 
  } else {
      printf("Matrix transpose successful\n");
  }

  // Free memory
  hipFree(input);
  hipFree(output);
  
  return 0;
}

	.text
	.file	"ex2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__cuTransposeiiPKfPf # -- Begin function _Z26__device_stub__cuTransposeiiPKfPf
	.type	_Z26__device_stub__cuTransposeiiPKfPf,@function
_Z26__device_stub__cuTransposeiiPKfPf:  # @_Z26__device_stub__cuTransposeiiPKfPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11cuTransposeiiPKfPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__cuTransposeiiPKfPf, .Lfunc_end0-_Z26__device_stub__cuTransposeiiPKfPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z5checkiiPfS_                  # -- Begin function _Z5checkiiPfS_
	.type	_Z5checkiiPfS_,@function
_Z5checkiiPfS_:                         # @_Z5checkiiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	testl	%edi, %edi
	jle	.LBB1_1
# %bb.2:                                # %.preheader.lr.ph
	movslq	%esi, %r9
	movl	%edi, %edi
	movl	%r9d, %r10d
	shlq	$2, %r9
	xorl	%r11d, %r11d
	xorl	%r8d, %r8d
	xorl	%ebx, %ebx
.LBB1_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	testl	%esi, %esi
	jle	.LBB1_8
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	%r11d, %eax
	leaq	(%rdx,%rax,4), %r14
	movq	%rcx, %r15
	xorl	%eax, %eax
.LBB1_5:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jne	.LBB1_6
	jp	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=2
	incq	%rax
	addq	%r9, %r15
	cmpq	%rax, %r10
	jne	.LBB1_5
.LBB1_8:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=1
	incq	%r8
	cmpq	%rdi, %r8
	setae	%bl
	addl	%esi, %r11d
	addq	$4, %rcx
	cmpq	%rdi, %r8
	jne	.LBB1_3
	jmp	.LBB1_9
.LBB1_6:                                # %.thread
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str, %edi
	movl	%r8d, %esi
	movl	%eax, %edx
	movl	%eax, %ecx
                                        # kill: def $r8d killed $r8d killed $r8
	movb	$2, %al
	callq	printf
	jmp	.LBB1_9
.LBB1_1:
	movb	$1, %bl
.LBB1_9:                                # %.loopexit
	movzbl	%bl, %eax
	andl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z5checkiiPfS_, .Lfunc_end1-_Z5checkiiPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x461c8000                      # float 10016
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %rbx
	movl	$401281024, %esi                # imm = 0x17EB1000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %r14
	movl	$401281024, %esi                # imm = 0x17EB1000
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%rbx), %rax
	xorl	%ecx, %ecx
	movq	(%r14), %rdx
	movss	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$40068, %esi                    # imm = 0x9C84
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	mulss	%xmm0, %xmm1
	addss	%xmm0, %xmm1
	movq	$-10016, %rdi                   # imm = 0xD8E0
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	%xmm1, 40064(%rax,%rdi,4)
	movl	$1084227584, 40064(%rdx,%rdi,4) # imm = 0x40A00000
	incq	%rdi
	movq	%rcx, %r8
	addq	%rdi, %r8
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rcx
	addq	%rsi, %rdx
	addq	%rsi, %rax
	cmpq	$10016, %rcx                    # imm = 0x2720
	jne	.LBB2_1
# %bb.4:
	movabsq	$1344324763961, %rdi            # imm = 0x13900000139
	movabsq	$34359738400, %rdx              # imm = 0x800000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$10016, %edi                    # imm = 0x2720
	movl	$10016, %esi                    # imm = 0x2720
	callq	_Z26__device_stub__cuTransposeiiPKfPf
.LBB2_6:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$10016, %edi                    # imm = 0x2720
	movl	$10016, %esi                    # imm = 0x2720
	callq	_Z5checkiiPfS_
	testl	%eax, %eax
	movl	$.Lstr, %eax
	movl	$.Lstr.1, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11cuTransposeiiPKfPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11cuTransposeiiPKfPf,@object  # @_Z11cuTransposeiiPKfPf
	.section	.rodata,"a",@progbits
	.globl	_Z11cuTransposeiiPKfPf
	.p2align	3, 0x0
_Z11cuTransposeiiPKfPf:
	.quad	_Z26__device_stub__cuTransposeiiPKfPf
	.size	_Z11cuTransposeiiPKfPf, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Input at (%i, %i) not equal to output at (%i, %i) with %f != %f\n"
	.size	.L.str, 65

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11cuTransposeiiPKfPf"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Matrix entries not equal"
	.size	.Lstr, 25

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Matrix transpose successful"
	.size	.Lstr.1, 28

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__cuTransposeiiPKfPf
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11cuTransposeiiPKfPf
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11cuTransposeiiPKfPf  ; -- Begin function _Z11cuTransposeiiPKfPf
	.globl	_Z11cuTransposeiiPKfPf
	.p2align	8
	.type	_Z11cuTransposeiiPKfPf,@function
_Z11cuTransposeiiPKfPf:                 ; @_Z11cuTransposeiiPKfPf
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	s_load_b128 s[0:3], s[0:1], 0x8
	s_lshl_b32 s6, s15, 5
	v_and_b32_e32 v3, 0x3ff, v0
	s_lshl_b32 s7, s14, 5
	v_add_nc_u32_e32 v1, s6, v2
	s_mov_b32 s8, -8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, s4, v1
	v_lshlrev_b32_e32 v1, 2, v3
	s_lshl_b32 s4, s4, 3
	v_lshl_add_u32 v4, v2, 7, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v0, v3, v0, s7
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s8, s8, 8
	s_cmp_gt_u32 s8, 23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	v_add_co_u32 v5, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v1
	v_add_nc_u32_e32 v4, 0x400, v4
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_add_nc_u32_e32 v0, s7, v2
	v_lshlrev_b32_e32 v1, 2, v2
	s_lshl_b32 s0, s5, 3
	s_mov_b32 s1, -8
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v0, s5, v0
	v_lshl_add_u32 v2, v3, 7, v1
	s_barrier
	buffer_gl0_inv
	v_add3_u32 v0, v3, v0, s6
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v5, v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, 32, v2
	s_add_i32 s1, s1, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_gt_u32 s1, 23
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_nc_u32_e32 v0, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB0_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11cuTransposeiiPKfPf
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11cuTransposeiiPKfPf, .Lfunc_end0-_Z11cuTransposeiiPKfPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11cuTransposeiiPKfPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11cuTransposeiiPKfPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
