#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
 

typedef struct {
  int width;				
  int height;				
  int stride;
  float* elements;
} Matrix;
 
float rand(float a,float b)
{

	return(b - a) * ((float)rand() / RAND_MAX) + a;
}


__device__ float GetElement(const Matrix A, int row, int col)
{
  return A.elements[row * A.stride + col];
}
 

__device__ void SetElement(Matrix A, int row, int col, float value)
{
  A.elements[row * A.stride + col] = value;
}
 

#define BLOCK_SIZE 1
 

__device__ Matrix GetSubMatrix(Matrix A, int row, int col)
{
  Matrix Asub;
  Asub.width = BLOCK_SIZE;
  Asub.height = BLOCK_SIZE;
  Asub.stride = A.stride;
  Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
			      + BLOCK_SIZE * col];
  return Asub;
}
 

__global__ void MatMulKernel(const Matrix, const Matrix, Matrix);
 

void MatMul(const Matrix A, const Matrix B, Matrix C)
{
 
  Matrix d_A;
  d_A.width = d_A.stride = A.width; d_A.height = A.height;
  size_t size = A.width * A.height * sizeof(float);
  cudaMalloc((void**)&d_A.elements, size);
  cudaMemcpy(d_A.elements, A.elements, size,
       cudaMemcpyHostToDevice);
  Matrix d_B;
  d_B.width = d_B.stride = B.width; d_B.height = B.height;
  size = B.width * B.height * sizeof(float);
  cudaMalloc((void**)&d_B.elements, size);
  cudaMemcpy(d_B.elements, B.elements, size,
       cudaMemcpyHostToDevice);
  
  Matrix d_C;
  d_C.width = d_C.stride = C.width; d_C.height = C.height;
  size = C.width * C.height * sizeof(float);
  cudaMalloc((void**)&d_C.elements, size);
  
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(B.width / dimBlock.x, A.height / dimBlock.y);
  MatMulKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
  
  cudaMemcpy(C.elements, d_C.elements, size,
       cudaMemcpyDeviceToHost);
 
  cudaFree(d_A.elements);
  cudaFree(d_B.elements);
  cudaFree(d_C.elements);
}
 

__global__ void MatMulKernel(Matrix A, Matrix B, Matrix C)
{
  
  int blockRow = blockIdx.y;
  int blockCol = blockIdx.x;
  
  Matrix Csub = GetSubMatrix(C, blockRow, blockCol);
  
  float Cvalue = 0;
  
  int row = threadIdx.y;
  int col = threadIdx.x;

  for (int m = 0; m < (A.width / BLOCK_SIZE); ++m) {
    
    Matrix Asub = GetSubMatrix(A, blockRow, m);
   
    Matrix Bsub = GetSubMatrix(B, m, blockCol);
    
    __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];
   
   
    As[row][col] = GetElement(Asub, row, col);
    Bs[row][col] = GetElement(Bsub, row, col);
   
    __syncthreads();
    
    for (int e = 0; e < BLOCK_SIZE; ++e)
      Cvalue += As[row][e] * Bs[e][col];
    
    __syncthreads();
  }
 

  SetElement(Csub, row, col, Cvalue);
  
  __syncthreads();
  __syncthreads();			
}
 
static Matrix
cons_Matrix (int height_, int width_)
{
  Matrix A;
  A.height = height_;
  A.width = width_;
  A.stride = width_;
  A.elements = (float*) malloc(sizeof(*A.elements) * width_ * height_);
  for (int row = 0; row < height_; row++)
    for (int col = 0; col < width_; col++)
      A.elements[row * width_ + col] = rand(0.0,50.0);
  return A;
}
 
static void
print_Matrix (Matrix A, char *name)
{
 
  for (int row = 0; row < A.height; row++){
	  
    for (int col = 0; col < A.width; col++)
      printf ("%5.1f ",  A.elements[row * A.stride + col]);
  printf("\n");}
}

 
int main(int argc, char **argv)
{
	time_t czas;
	
	srand( (unsigned int)time(&czas));
		
  const int m = atoi(argv[1]);
  const int n = atoi(argv[2]);
  const int p = atoi(argv[3]);
  
  Matrix A = cons_Matrix(m, n);
  Matrix B = cons_Matrix(n, p);
  Matrix C = cons_Matrix(m, p);
  
  MatMul(A, B, C);

  printf("\n");
  print_Matrix(A, "A");
  printf("\n");
  print_Matrix(B, "B");
  printf("\n");
  print_Matrix(C, "C");
  printf("\n");
  return 0;
}
	.file	"tmpxft_002c151e_00000000-6_matrix_mutiplication_shared.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2037:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%5.1f "
.LC1:
	.string	"\n"
	.text
	.type	_ZL12print_Matrix6MatrixPc.isra.0, @function
_ZL12print_Matrix6MatrixPc.isra.0:
.LFB2179:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%edi, 4(%rsp)
.L3:
	cmpl	%r14d, %r12d
	jge	.L2
	movslq	%ebp, %rax
	xorl	%r13d, %r13d
	leaq	(%rbx,%rax,4), %rcx
.L6:
	cmpl	%r13d, 4(%rsp)
	jle	.L9
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%r13,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r13
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L6
.L9:
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	incl	%r12d
	addl	%r15d, %ebp
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2179:
	.size	_ZL12print_Matrix6MatrixPc.isra.0, .-_ZL12print_Matrix6MatrixPc.isra.0
	.globl	_Z4randff
	.type	_Z4randff, @function
_Z4randff:
.LFB2027:
	.cfi_startproc
	endbr64
	subss	%xmm0, %xmm1
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	call	rand@PLT
	movss	12(%rsp), %xmm2
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	mulss	8(%rsp), %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	addss	%xmm2, %xmm0
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z4randff, .-_Z4randff
	.type	_ZL11cons_Matrixii, @function
_ZL11cons_Matrixii:
.LFB2032:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%esi, %rax
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rax, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	movslq	%edx, %rdi
	movq	%rdi, %rbp
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%edi, (%rbx)
	movl	%edi, 8(%rbx)
	imulq	%rax, %rdi
	movl	%eax, 4(%rbx)
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, 16(%rbx)
	movq	%rax, %r14
	xorl	%eax, %eax
.L13:
	cmpl	%r12d, %eax
	jge	.L12
	movslq	%r15d, %rdx
	xorl	%r13d, %r13d
	leaq	(%r14,%rdx,4), %rdx
.L16:
	cmpl	%r13d, %ebp
	jle	.L18
	movss	.LC3(%rip), %xmm1
	xorps	%xmm0, %xmm0
	movq	%rdx, 8(%rsp)
	movl	%eax, 4(%rsp)
	call	_Z4randff
	movq	8(%rsp), %rdx
	movl	4(%rsp), %eax
	movss	%xmm0, (%rdx,%r13,4)
	incq	%r13
	jmp	.L16
.L18:
	incl	%eax
	addl	%ebp, %r15d
	jmp	.L13
.L12:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_ZL11cons_Matrixii, .-_ZL11cons_Matrixii
	.globl	_Z10GetElement6Matrixii
	.type	_Z10GetElement6Matrixii, @function
_Z10GetElement6Matrixii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10GetElement6Matrixii, .-_Z10GetElement6Matrixii
	.globl	_Z10SetElement6Matrixiif
	.type	_Z10SetElement6Matrixiif, @function
_Z10SetElement6Matrixiif:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z10SetElement6Matrixiif, .-_Z10SetElement6Matrixiif
	.globl	_Z12GetSubMatrix6Matrixii
	.type	_Z12GetSubMatrix6Matrixii, @function
_Z12GetSubMatrix6Matrixii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z12GetSubMatrix6Matrixii, .-_Z12GetSubMatrix6Matrixii
	.globl	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.type	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, @function
_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rcx
	movq	%rdi, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rsi, 72(%rsp)
	leaq	16(%rsp), %rdi
	leaq	28(%rsp), %rsi
	movq	%rdx, 80(%rsp)
	movq	%rsp, %rdx
	movq	%rax, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	8(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 128
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L25:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_, .-_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.type	_Z12MatMulKernel6MatrixS_S_, @function
_Z12MatMulKernel6MatrixS_S_:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	64(%rsp), %rdx
	leaq	40(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z12MatMulKernel6MatrixS_S_, .-_Z12MatMulKernel6MatrixS_S_
	.globl	_Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_, @function
_Z6MatMul6MatrixS_S_:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	movl	240(%rsp), %edx
	movl	244(%rsp), %r14d
	leaq	40(%rsp), %rdi
	movl	264(%rsp), %r13d
	movl	288(%rsp), %ebx
	movl	%edx, 32(%rsp)
	movl	268(%rsp), %r12d
	movl	%edx, 24(%rsp)
	imull	%r14d, %edx
	movl	292(%rsp), %r15d
	movl	%r14d, 28(%rsp)
	movslq	%edx, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	256(%rsp), %rsi
	movq	40(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, 52(%rsp)
	imull	%r13d, %r12d
	leaq	64(%rsp), %rdi
	movl	%r13d, 56(%rsp)
	movl	%r13d, 48(%rsp)
	movslq	%r12d, %rbp
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	280(%rsp), %rsi
	movq	64(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, 80(%rsp)
	leaq	88(%rsp), %rdi
	movl	%ebx, 72(%rsp)
	imull	%r15d, %ebx
	movl	%r15d, 76(%rsp)
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movl	%r13d, 12(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 16(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	40(%rsp), %rax
	movups	24(%rsp), %xmm0
	leaq	144(%rsp), %rdx
	leaq	120(%rsp), %rsi
	movups	48(%rsp), %xmm1
	movups	72(%rsp), %xmm2
	leaq	96(%rsp), %rdi
	movq	%rax, 112(%rsp)
	movq	64(%rsp), %rax
	movups	%xmm0, 96(%rsp)
	movq	%rax, 136(%rsp)
	movq	88(%rsp), %rax
	movups	%xmm1, 120(%rsp)
	movq	%rax, 160(%rsp)
	movups	%xmm2, 144(%rsp)
	call	_Z41__device_stub__Z12MatMulKernel6MatrixS_S_R6MatrixS0_S0_
.L32:
	movq	88(%rsp), %rsi
	movq	304(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z6MatMul6MatrixS_S_, .-_Z6MatMul6MatrixS_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	subq	$96, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	leaq	16(%rsp), %rdi
	movl	%r12d, %edx
	movl	%ebp, %esi
	movl	%eax, %ebx
	call	_ZL11cons_Matrixii
	leaq	40(%rsp), %rdi
	movl	%ebx, %edx
	movl	%r12d, %esi
	call	_ZL11cons_Matrixii
	movl	%ebx, %edx
	leaq	64(%rsp), %rdi
	movl	%ebp, %esi
	call	_ZL11cons_Matrixii
	subq	$80, %rsp
	.cfi_def_cfa_offset 208
	leaq	.LC1(%rip), %rbx
	movq	160(%rsp), %rax
	movups	144(%rsp), %xmm0
	movups	120(%rsp), %xmm1
	movups	96(%rsp), %xmm2
	movq	%rax, 64(%rsp)
	movq	136(%rsp), %rax
	movups	%xmm0, 48(%rsp)
	movq	%rax, 40(%rsp)
	movq	112(%rsp), %rax
	movups	%xmm1, 24(%rsp)
	movups	%xmm2, (%rsp)
	movq	%rax, 16(%rsp)
	call	_Z6MatMul6MatrixS_S_
	addq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%rbx, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	32(%rsp), %rcx
	movl	24(%rsp), %edx
	movl	20(%rsp), %esi
	movl	16(%rsp), %edi
	call	_ZL12print_Matrix6MatrixPc.isra.0
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rcx
	movl	48(%rsp), %edx
	movl	44(%rsp), %esi
	movl	40(%rsp), %edi
	call	_ZL12print_Matrix6MatrixPc.isra.0
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	68(%rsp), %esi
	movl	64(%rsp), %edi
	movq	80(%rsp), %rcx
	movl	72(%rsp), %edx
	call	_ZL12print_Matrix6MatrixPc.isra.0
	xorl	%eax, %eax
	movq	%rbx, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$96, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z12MatMulKernel6MatrixS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12MatMulKernel6MatrixS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	805306368
	.align 4
.LC3:
	.long	1112014848
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
 

typedef struct {
  int width;				
  int height;				
  int stride;
  float* elements;
} Matrix;
 
float rand(float a,float b)
{

	return(b - a) * ((float)rand() / RAND_MAX) + a;
}


__device__ float GetElement(const Matrix A, int row, int col)
{
  return A.elements[row * A.stride + col];
}
 

__device__ void SetElement(Matrix A, int row, int col, float value)
{
  A.elements[row * A.stride + col] = value;
}
 

#define BLOCK_SIZE 1
 

__device__ Matrix GetSubMatrix(Matrix A, int row, int col)
{
  Matrix Asub;
  Asub.width = BLOCK_SIZE;
  Asub.height = BLOCK_SIZE;
  Asub.stride = A.stride;
  Asub.elements = &A.elements[A.stride * BLOCK_SIZE * row
			      + BLOCK_SIZE * col];
  return Asub;
}
 

__global__ void MatMulKernel(const Matrix, const Matrix, Matrix);
 

void MatMul(const Matrix A, const Matrix B, Matrix C)
{
 
  Matrix d_A;
  d_A.width = d_A.stride = A.width; d_A.height = A.height;
  size_t size = A.width * A.height * sizeof(float);
  hipMalloc((void**)&d_A.elements, size);
  hipMemcpy(d_A.elements, A.elements, size,
       hipMemcpyHostToDevice);
  Matrix d_B;
  d_B.width = d_B.stride = B.width; d_B.height = B.height;
  size = B.width * B.height * sizeof(float);
  hipMalloc((void**)&d_B.elements, size);
  hipMemcpy(d_B.elements, B.elements, size,
       hipMemcpyHostToDevice);
  
  Matrix d_C;
  d_C.width = d_C.stride = C.width; d_C.height = C.height;
  size = C.width * C.height * sizeof(float);
  hipMalloc((void**)&d_C.elements, size);
  
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(B.width / dimBlock.x, A.height / dimBlock.y);
  MatMulKernel<<<dimGrid, dimBlock>>>(d_A, d_B, d_C);
  
  hipMemcpy(C.elements, d_C.elements, size,
       hipMemcpyDeviceToHost);
 
  hipFree(d_A.elements);
  hipFree(d_B.elements);
  hipFree(d_C.elements);
}
 

__global__ void MatMulKernel(Matrix A, Matrix B, Matrix C)
{
  
  int blockRow = blockIdx.y;
  int blockCol = blockIdx.x;
  
  Matrix Csub = GetSubMatrix(C, blockRow, blockCol);
  
  float Cvalue = 0;
  
  int row = threadIdx.y;
  int col = threadIdx.x;

  for (int m = 0; m < (A.width / BLOCK_SIZE); ++m) {
    
    Matrix Asub = GetSubMatrix(A, blockRow, m);
   
    Matrix Bsub = GetSubMatrix(B, m, blockCol);
    
    __shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];
   
   
    As[row][col] = GetElement(Asub, row, col);
    Bs[row][col] = GetElement(Bsub, row, col);
   
    __syncthreads();
    
    for (int e = 0; e < BLOCK_SIZE; ++e)
      Cvalue += As[row][e] * Bs[e][col];
    
    __syncthreads();
  }
 

  SetElement(Csub, row, col, Cvalue);
  
  __syncthreads();
  __syncthreads();			
}
 
static Matrix
cons_Matrix (int height_, int width_)
{
  Matrix A;
  A.height = height_;
  A.width = width_;
  A.stride = width_;
  A.elements = (float*) malloc(sizeof(*A.elements) * width_ * height_);
  for (int row = 0; row < height_; row++)
    for (int col = 0; col < width_; col++)
      A.elements[row * width_ + col] = rand(0.0,50.0);
  return A;
}
 
static void
print_Matrix (Matrix A, char *name)
{
 
  for (int row = 0; row < A.height; row++){
	  
    for (int col = 0; col < A.width; col++)
      printf ("%5.1f ",  A.elements[row * A.stride + col]);
  printf("\n");}
}

 
int main(int argc, char **argv)
{
	time_t czas;
	
	srand( (unsigned int)time(&czas));
		
  const int m = atoi(argv[1]);
  const int n = atoi(argv[2]);
  const int p = atoi(argv[3]);
  
  Matrix A = cons_Matrix(m, n);
  Matrix B = cons_Matrix(n, p);
  Matrix C = cons_Matrix(m, p);
  
  MatMul(A, B, C);

  printf("\n");
  print_Matrix(A, "A");
  printf("\n");
  print_Matrix(B, "B");
  printf("\n");
  print_Matrix(C, "C");
  printf("\n");
  return 0;
}
	.text
	.file	"matrix_mutiplication_shared.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z4randff
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z4randff
	.type	_Z4randff,@function
_Z4randff:                              # @_Z4randff
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	subss	%xmm0, %xmm1
	movss	%xmm1, (%rsp)                   # 4-byte Spill
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	mulss	(%rsp), %xmm0                   # 4-byte Folded Reload
	addss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z4randff, .Lfunc_end0-_Z4randff
	.cfi_endproc
                                        # -- End function
	.globl	_Z6MatMul6MatrixS_S_            # -- Begin function _Z6MatMul6MatrixS_S_
	.type	_Z6MatMul6MatrixS_S_,@function
_Z6MatMul6MatrixS_S_:                   # @_Z6MatMul6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	352(%rsp), %r13
	movl	304(%rsp), %eax
	movl	308(%rsp), %r14d
	leaq	72(%rsp), %rbx
	movl	%eax, -8(%rbx)
	movl	%eax, -16(%rbx)
	movl	%r14d, -12(%rbx)
	imull	%r14d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	320(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	328(%rsp), %r12d
	movl	332(%rsp), %eax
	leaq	48(%rsp), %rbx
	movl	%r12d, -8(%rbx)
	movl	%r12d, -16(%rbx)
	movl	%eax, -12(%rbx)
	imull	%r12d, %eax
	movslq	%eax, %r15
	shlq	$2, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	344(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r13), %eax
	movl	4(%r13), %ecx
	leaq	24(%rsp), %rdi
	movl	%eax, -8(%rdi)
	movl	%eax, -16(%rdi)
	movl	%ecx, -12(%rdi)
	imull	%eax, %ecx
	movslq	%ecx, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rsi
	callq	hipMalloc
	shlq	$32, %r14
	orq	%r12, %r14
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	72(%rsp), %rax
	leaq	128(%rsp), %rcx
	movq	%rax, 16(%rcx)
	movups	56(%rsp), %xmm0
	movaps	%xmm0, (%rcx)
	movq	48(%rsp), %rax
	leaq	160(%rsp), %rdx
	movq	%rax, 16(%rdx)
	movups	32(%rsp), %xmm0
	movaps	%xmm0, (%rdx)
	movq	24(%rsp), %rax
	leaq	192(%rsp), %rsi
	movq	%rax, 16(%rsi)
	movups	8(%rsp), %xmm0
	movaps	%xmm0, (%rsi)
	leaq	224(%rsp), %r14
	movq	%rcx, (%r14)
	movq	%rdx, 8(%r14)
	movq	%rsi, 16(%r14)
	leaq	112(%rsp), %r15
	leaq	96(%rsp), %r12
	leaq	88(%rsp), %r13
	leaq	80(%rsp), %rbp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movq	%rbp, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r15), %rsi
	movl	8(%r15), %edx
	movq	(%r12), %rcx
	movl	8(%r12), %r8d
	movl	$_Z12MatMulKernel6MatrixS_S_, %edi
	movq	%r14, %r9
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	leaq	368(%rsp), %r13
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_2:
	movq	16(%r13), %rdi
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6MatMul6MatrixS_S_, .Lfunc_end1-_Z6MatMul6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__MatMulKernel6MatrixS_S_ # -- Begin function _Z27__device_stub__MatMulKernel6MatrixS_S_
	.type	_Z27__device_stub__MatMulKernel6MatrixS_S_,@function
_Z27__device_stub__MatMulKernel6MatrixS_S_: # @_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	128(%rsp), %rax
	leaq	48(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	152(%rsp), %rax
	movq	%rax, 8(%rbx)
	leaq	176(%rsp), %rax
	movq	%rax, 16(%rbx)
	leaq	32(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12MatMulKernel6MatrixS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__MatMulKernel6MatrixS_S_, .Lfunc_end2-_Z27__device_stub__MatMulKernel6MatrixS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	leaq	72(%rsp), %rdi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r12d
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	leaq	128(%rsp), %r15
	movq	%r15, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	callq	_ZL11cons_Matrixii
	leaq	104(%rsp), %r14
	movq	%r14, %rdi
	movl	%r12d, %esi
	movl	%r13d, %edx
	callq	_ZL11cons_Matrixii
	leaq	80(%rsp), %rbx
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r13d, %edx
	callq	_ZL11cons_Matrixii
	movq	16(%rbx), %rax
	movq	%rax, 64(%rsp)
	movups	(%rbx), %xmm0
	movups	%xmm0, 48(%rsp)
	movq	16(%r14), %rax
	movq	%rax, 40(%rsp)
	movups	(%r14), %xmm0
	movups	%xmm0, 24(%rsp)
	movq	16(%r15), %rax
	movq	%rax, 16(%rsp)
	movups	(%r15), %xmm0
	movups	%xmm0, (%rsp)
	callq	_Z6MatMul6MatrixS_S_
	movl	$10, %edi
	callq	putchar@PLT
	movq	16(%r15), %rax
	movq	%rax, 16(%rsp)
	movups	(%r15), %xmm0
	movups	%xmm0, (%rsp)
	callq	_ZL12print_Matrix6MatrixPc
	movl	$10, %edi
	callq	putchar@PLT
	movq	16(%r14), %rax
	movq	%rax, 16(%rsp)
	movups	(%r14), %xmm0
	movups	%xmm0, (%rsp)
	callq	_ZL12print_Matrix6MatrixPc
	movl	$10, %edi
	callq	putchar@PLT
	movq	16(%rbx), %rax
	movq	%rax, 16(%rsp)
	movups	(%rbx), %xmm0
	movups	%xmm0, (%rsp)
	callq	_ZL12print_Matrix6MatrixPc
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZL11cons_Matrixii
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI4_1:
	.long	0x42480000                      # float 50
	.text
	.type	_ZL11cons_Matrixii,@function
_ZL11cons_Matrixii:                     # @_ZL11cons_Matrixii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r15
	movl	%esi, 4(%rdi)
	movl	%edx, (%rdi)
	movl	%edx, 8(%rdi)
	movslq	%edx, %rdi
	movslq	%esi, %r14
	imulq	%r14, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%r15, (%rsp)                    # 8-byte Spill
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rax, 16(%r15)
	testl	%r14d, %r14d
	jle	.LBB4_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %r13d
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB4_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB4_2 Depth=1
	movl	%ebp, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%r12d, %r12d
.LBB4_4:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	%r12, %r13
	jne	.LBB4_4
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%r14
	addl	%ebx, %ebp
	cmpq	16(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB4_2
.LBB4_6:                                # %._crit_edge18
	movq	(%rsp), %rax                    # 8-byte Reload
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZL11cons_Matrixii, .Lfunc_end4-_ZL11cons_Matrixii
	.cfi_endproc
                                        # -- End function
	.type	_ZL12print_Matrix6MatrixPc,@function # -- Begin function _ZL12print_Matrix6MatrixPc
_ZL12print_Matrix6MatrixPc:             # @_ZL12print_Matrix6MatrixPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	68(%rsp), %ebx
	testl	%ebx, %ebx
	jle	.LBB5_6
# %bb.1:                                # %.preheader.lr.ph
	leaq	64(%rsp), %rax
	movl	(%rax), %r14d
	movq	16(%rax), %r15
	movslq	8(%rax), %r12
	shlq	$2, %r12
	xorl	%r13d, %r13d
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	testl	%r14d, %r14d
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	xorl	%ebp, %ebp
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%rbp,4), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	incq	%rbp
	cmpq	%rbp, %r14
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addq	%r12, %r15
	cmpq	%rbx, %r13
	jne	.LBB5_2
.LBB5_6:                                # %._crit_edge9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZL12print_Matrix6MatrixPc, .Lfunc_end5-_ZL12print_Matrix6MatrixPc
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12MatMulKernel6MatrixS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12MatMulKernel6MatrixS_S_,@object # @_Z12MatMulKernel6MatrixS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	3, 0x0
_Z12MatMulKernel6MatrixS_S_:
	.quad	_Z27__device_stub__MatMulKernel6MatrixS_S_
	.size	_Z12MatMulKernel6MatrixS_S_, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"%5.1f "
	.size	.L.str.4, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12MatMulKernel6MatrixS_S_"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__MatMulKernel6MatrixS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12MatMulKernel6MatrixS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12MatMulKernel6MatrixS_S_ ; -- Begin function _Z12MatMulKernel6MatrixS_S_
	.globl	_Z12MatMulKernel6MatrixS_S_
	.p2align	8
	.type	_Z12MatMulKernel6MatrixS_S_,@function
_Z12MatMulKernel6MatrixS_S_:            ; @_Z12MatMulKernel6MatrixS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x0
	s_load_b64 s[4:5], s[0:1], 0x40
	v_bfe_u32 v5, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s3, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_clause 0x3
	s_load_b32 s7, s[0:1], 0x8
	s_load_b32 s6, s[0:1], 0x20
	s_load_b64 s[8:9], s[0:1], 0x10
	s_load_b64 s[10:11], s[0:1], 0x28
	v_lshlrev_b32_e32 v6, 2, v5
	v_lshlrev_b32_e32 v7, 2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v6, v7
	v_add_nc_u32_e32 v9, 4, v7
	v_mov_b32_e32 v7, 0
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s7, v5, v[0:1]
	s_mul_i32 s12, s7, s2
	s_ashr_i32 s7, s6, 31
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[12:13], 2
	s_add_u32 s12, s8, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s6, v5, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_addc_u32 s13, s9, s13
	s_ashr_i32 s15, s14, 31
	s_lshl_b64 s[8:9], s[14:15], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_u32 s8, s10, s8
	s_addc_u32 s9, s11, s9
	s_lshl_b64 s[6:7], s[6:7], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v1, vcc_lo, s12, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s13, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v10, v[1:2], off
	global_load_b32 v11, v[3:4], off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, 0
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v8, v10, v11 offset1:1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v10, v6
	ds_load_b32 v11, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v7, v10, v11
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v7, 0
.LBB0_4:                                ; %Flow96
	s_load_b32 s0, s[0:1], 0x38
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s0, v5, v[0:1]
	s_mul_i32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s14
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12MatMulKernel6MatrixS_S_
		.amdhsa_group_segment_fixed_size 8
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12MatMulKernel6MatrixS_S_, .Lfunc_end0-_Z12MatMulKernel6MatrixS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           24
        .value_kind:     by_value
      - .offset:         24
        .size:           24
        .value_kind:     by_value
      - .offset:         48
        .size:           24
        .value_kind:     by_value
    .group_segment_fixed_size: 8
    .kernarg_segment_align: 8
    .kernarg_segment_size: 72
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12MatMulKernel6MatrixS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12MatMulKernel6MatrixS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
