/*
 *  file name: TilingMatrix.cu
 *  NOTE: 
 *       squareMatrixMult is much more efficent than the regular multiplier
 *       currently compiling with: nvcc TilingMatrix.cu -o tileTest
 *       Device Standards for: GeForce GTX 1060 6GB
 *          total global mem size: 6078 MBytes (6373572608 bytes)
 *          total shared mem per block: 49.152 KBytes (49152 bytes)
 */

#include <stdio.h>
#include <unistd.h>
#include <string.h>
#include <math.h>
#include <assert.h>
#include <sys/time.h>
#include <stdlib.h>

#include <sys/time.h>     //measuring performance data

#define BLOCK_SIZE 32

/**********************************************************************
function name: matrixTriUpper
description: sets a matrix to an upper bound triangle matrix
parameters: 
            &a GPU device pointer to a m X n matrix (A)
Note:
    
return: none
**********************************************************************/
__global__ void matrixTriUpper(float *a, int m, int n) {
    //setting matricies to their upper bound 
    for(int i = 0; i < m; ++i) {
        for(int j = 0; j < n; ++j) {
            if(i>j)
                a[i*n + j] = 0;
            a[i*n + j] = a[i*n + j];
        }
    }
}

/**********************************************************************
function name: matrixMult
description: dot product of two matrix (not only square)
parameters: 
            &a GPU device pointer to a m X n matrix (A)
            &b GPU device pointer to a n X k matrix (B)
            &c GPU device output purpose pointer to a m X k matrix (C) 
            to store the result
Note:
    grid and block should be configured as:
        dim3 dimGrid((k + BLOCK_SIZE - 1) / BLOCK_SIZE, (m + BLOCK_SIZE - 1) / BLOCK_SIZE);
        dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    further sppedup can be obtained by using shared memory to decrease global memory access times
return: none
**********************************************************************/
__global__ void matrixMult(float *a, float *b, float *c, int m, int n, int k)
{ 
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float  sum = 0;
    if( col < k && row < m) {
        for(int i = 0; i < n; i++) 
            sum += a[row * n + i] * b[i * k + col];
        c[row * k + col] = sum;
    }
} 

/**********************************************************************
function name: squareMatrixMult
description: dot product of two matrix (not only square) in GPU
parameters: 
            &a GPU device pointer to a n X n matrix (A)
            &b GPU device pointer to a n X n matrix (B)
            &c GPU device output purpose pointer to a n X n matrix (C) 
            to store the result
Note:
    grid and block should be configured as:
        dim3 dim_grid((n - 1) / BLOCK_SIZE + 1, (n - 1) / BLOCK_SIZE + 1, 1);
        dim3 dim_block(BLOCK_SIZE, BLOCK_SIZE, 1);
    SQUARE IS MUCH MORE EFFICENT THAN REGULAR
return: none
**********************************************************************/
__global__ void squareMatrixMult(float *d_a, float *d_b, float *d_result, int n) 
{
    __shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float tile_b[BLOCK_SIZE][BLOCK_SIZE];

    int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
    int col = blockIdx.x * BLOCK_SIZE + threadIdx.x;
    float tmp = 0;
    int idx;

    for (int sub = 0; sub < gridDim.x; ++sub) {
        idx = row * n + sub * BLOCK_SIZE + threadIdx.x;
        if(idx >= n*n) {
            // n may not divisible by BLOCK_SIZE
            tile_a[threadIdx.y][threadIdx.x] = 0;
        }
        else {
            tile_a[threadIdx.y][threadIdx.x] = d_a[idx];
        }

        idx = (sub * BLOCK_SIZE + threadIdx.y) * n + col;
        if(idx >= n*n) {
            tile_b[threadIdx.y][threadIdx.x] = 0;
        }  
        else {
            tile_b[threadIdx.y][threadIdx.x] = d_b[idx];
        }
        __syncthreads();

        for (int k = threadIdx.x/n; k < BLOCK_SIZE; ++k)  {
            tmp += tile_a[threadIdx.y][k] * tile_b[k][threadIdx.x];
        }
        __syncthreads();
    }
    if(row < n && col < n) {
        d_result[row * n + col] = tmp;
    }
}

/**********************************************************************
function name: main
description: test and compare
parameters: 
            none
return: none
**********************************************************************/

int main(int argc, char** argv) {
    int printAllMat = 1; // debug flag for printing all of the maticies
    // Set sizes of the matrixes
    int m=15;
    int n=15;
    int k=15;
    
    /* Fixed seed for illustration */
    srand(3333);

    // Allocate memory in host RAM
    float *copyA, *copyB, *copyC;
    cudaMallocHost((void **) &copyA, sizeof(float)*m*n); // copied matrix is m x n
    cudaMallocHost((void **) &copyB, sizeof(float)*n*k); // copied matrix is n x k
    cudaMallocHost((void **) &copyC, sizeof(float)*m*k); // copied matrix is m x k
    
    // float x = (float)rand()/(float)(RAND_MAX/a);
    // random initialize matrix A
    for (int i = 0; i < m; ++i) {
        for (int j = 0; j < n; ++j) {
            copyA[i * n + j] =((float)rand()/(float)(RAND_MAX)) * 1024;
        }
    }

    // random initialize matrix B
    for (int i = 0; i < n; ++i) {
        for (int j = 0; j < k; ++j) {
            copyB[i * k + j] = ((float)rand()/(float)(RAND_MAX)) * 1024;
        }
    }
    
    // Allocate memory space on the device 
    float *matA, *matB, *matC;
    cudaMalloc((void **) &matA, sizeof(float)*m*n); // matrix is m x n
    cudaMalloc((void **) &matB, sizeof(float)*n*k); // matrix is n x k
    cudaMalloc((void **) &matC, sizeof(float)*m*k); // matrix is m x k
    
    // copy matrix A and B from host to device memory
    cudaMemcpy(matA, copyA, sizeof(float)*m*n, cudaMemcpyHostToDevice);
    cudaMemcpy(matB, copyB, sizeof(float)*n*k, cudaMemcpyHostToDevice);
    
    printf("size of matA %dX%d: %zu bytes\n", m,n,(sizeof(float)*m*n));
    printf("size of matB %dX%d: %zu bytes\n", n,k,(sizeof(float)*n*k));
    printf("size of matC %dX%d: %zu bytes\n", m,k,(sizeof(float)*m*k));
    printf("total bytes allocated to mem: %zu bytes ", ((sizeof(float)*m*n) + (sizeof(float)*n*k)+ (sizeof(float)*m*k)));
    printf("(~%zu MBytes)\n\n", (((sizeof(float)*m*n) + (sizeof(float)*n*k)+ (sizeof(float)*m*k)) / 1000000)); // get megabytes of the allocated arrays

    unsigned int grid_rows = (m + BLOCK_SIZE - 1) / BLOCK_SIZE;
    unsigned int grid_cols = (k + BLOCK_SIZE - 1) / BLOCK_SIZE;
    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    
    printf("Calculating...\n\n");
    // Launch kernel, check if it is a square
    if(m == n && n == k) {
        matrixTriUpper<<<dimGrid, dimBlock>>>(matA, m, n);
        matrixTriUpper<<<dimGrid, dimBlock>>>(matB, n, k);
        squareMatrixMult<<<dimGrid, dimBlock>>>(matA, matB, matC, n); // square, thus only need 1 param to define size
    }
    else { // not a square, thus it needs param to define all sizes
        matrixMult<<<dimGrid, dimBlock>>>(matA, matB, matC, m, n, k);
    }
    
    // Transefr results from device to host 
    cudaMemcpy(copyC, matC, sizeof(float)*m*k, cudaMemcpyDeviceToHost);
    cudaDeviceSynchronize(); //possibly
    //cudaThreadSynchronize();
    
    //prints the matricies
    // printf("[%d][%d]:%d, ", i, j, copyC[i*k + j]); //Another possible way to print the matrix
    //if the debug flag is on it will print the first two product arrays as well
    int i,j;
    if(printAllMat == 1) {
        // print matrix A
        printf("matA matrix: \n");
        for (i = 0; i < m; i++) {
            for (j = 0; j < n; j++) {
                //printf("[%d][%d]:%d, ", i, j, copyA[i*k + j]);
                printf(" %f ", copyA[i*k + j]);
            }
            printf("\n");
        }
        // print matrix B
        printf("\nmatB matrix: \n");
        for (i = 0; i < n; i++) {
            for (j = 0; j < k; j++) {
                //printf("[%d][%d]:%d, ", i, j, copyB[i*k + j]);
                printf(" %f ", copyB[i*k + j]);
            }
            printf("\n");
        }
    }
    
    // print result matrix
    printf("\nResult matrix: \n");
    for (i = 0; i < m; i++) {
        for (j = 0; j < k; j++) {
                //printf("[%d][%d]:%d, ", i, j, copyC[i*k + j]);
                printf(" %f ", copyC[i*k + j]);
            }
        printf("\n");
    }
    
    // free memory
    cudaFree(matA);
    cudaFree(matB);
    cudaFree(matC);
    cudaFreeHost(copyA);
    cudaFreeHost(copyB);
    cudaFreeHost(copyC);
    return 0;
}

	.file	"tmpxft_0021df4c_00000000-6_TilingProgram.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2043:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2043:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z14matrixTriUpperPfiiPfii
	.type	_Z36__device_stub__Z14matrixTriUpperPfiiPfii, @function
_Z36__device_stub__Z14matrixTriUpperPfiiPfii:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14matrixTriUpperPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z36__device_stub__Z14matrixTriUpperPfiiPfii, .-_Z36__device_stub__Z14matrixTriUpperPfiiPfii
	.globl	_Z14matrixTriUpperPfii
	.type	_Z14matrixTriUpperPfii, @function
_Z14matrixTriUpperPfii:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z14matrixTriUpperPfiiPfii
	.cfi_endproc
.LFE2066:
	.size	_Z14matrixTriUpperPfii, .-_Z14matrixTriUpperPfii
	.globl	_Z37__device_stub__Z10matrixMultPfS_S_iiiPfS_S_iii
	.type	_Z37__device_stub__Z10matrixMultPfS_S_iiiPfS_S_iii, @function
_Z37__device_stub__Z10matrixMultPfS_S_iiiPfS_S_iii:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z10matrixMultPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z37__device_stub__Z10matrixMultPfS_S_iiiPfS_S_iii, .-_Z37__device_stub__Z10matrixMultPfS_S_iiiPfS_S_iii
	.globl	_Z10matrixMultPfS_S_iii
	.type	_Z10matrixMultPfS_S_iii, @function
_Z10matrixMultPfS_S_iii:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z10matrixMultPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2068:
	.size	_Z10matrixMultPfS_S_iii, .-_Z10matrixMultPfS_S_iii
	.globl	_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i
	.type	_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i, @function
_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16squareMatrixMultPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i, .-_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i
	.globl	_Z16squareMatrixMultPfS_S_i
	.type	_Z16squareMatrixMultPfS_S_i, @function
_Z16squareMatrixMultPfS_S_i:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2070:
	.size	_Z16squareMatrixMultPfS_S_i, .-_Z16squareMatrixMultPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"size of matA %dX%d: %zu bytes\n"
.LC3:
	.string	"size of matB %dX%d: %zu bytes\n"
.LC4:
	.string	"size of matC %dX%d: %zu bytes\n"
.LC5:
	.string	"total bytes allocated to mem: %zu bytes "
.LC6:
	.string	"(~%zu MBytes)\n\n"
.LC7:
	.string	"Calculating...\n\n"
.LC8:
	.string	"matA matrix: \n"
.LC9:
	.string	" %f "
.LC10:
	.string	"\n"
.LC11:
	.string	"\nmatB matrix: \n"
.LC12:
	.string	"\nResult matrix: \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$3333, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	srand@PLT
	movq	%rsp, %rdi
	movl	$900, %esi
	call	cudaMallocHost@PLT
	leaq	8(%rsp), %rdi
	movl	$900, %esi
	call	cudaMallocHost@PLT
	leaq	16(%rsp), %rdi
	movl	$900, %esi
	call	cudaMallocHost@PLT
.L19:
	xorl	%ebx, %ebx
.L20:
	call	rand@PLT
	movl	%eax, %edx
	leaq	0(,%rbx,4), %rax
	incq	%rbx
	addq	(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, (%rax,%rbp)
	cmpq	$15, %rbx
	jne	.L20
	addq	$60, %rbp
	cmpq	$900, %rbp
	jne	.L19
	xorl	%ebp, %ebp
.L21:
	xorl	%ebx, %ebx
.L22:
	call	rand@PLT
	movl	%eax, %edx
	leaq	0(,%rbx,4), %rax
	incq	%rbx
	addq	8(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, (%rax,%rbp)
	cmpq	$15, %rbx
	jne	.L22
	addq	$60, %rbp
	cmpq	$900, %rbp
	jne	.L21
	leaq	24(%rsp), %rdi
	movl	$900, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$900, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$900, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$900, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$900, %edx
	call	cudaMemcpy@PLT
	movl	$900, %r8d
	xorl	%eax, %eax
	movl	$15, %ecx
	movl	$15, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$900, %r8d
	xorl	%eax, %eax
	movl	$15, %ecx
	movl	$15, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$900, %r8d
	xorl	%eax, %eax
	movl	$15, %ecx
	movl	$15, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$2700, %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%edx, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movabsq	$4294967297, %rax
	movl	$2, %edi
	movq	%rax, 48(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 60(%rsp)
	xorl	%eax, %eax
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	call	__printf_chk@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	24(%rsp), %rdi
	movl	$15, %edx
	movl	$15, %esi
	call	_Z36__device_stub__Z14matrixTriUpperPfiiPfii
.L24:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	32(%rsp), %rdi
	movl	$15, %edx
	movl	$15, %esi
	call	_Z36__device_stub__Z14matrixTriUpperPfiiPfii
.L25:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$15, %ecx
	movq	24(%rsp), %rdi
	call	_Z41__device_stub__Z16squareMatrixMultPfS_S_iPfS_S_i
.L26:
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	xorl	%ebp, %ebp
	movl	$900, %edx
	leaq	.LC9(%rip), %r12
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L27:
	xorl	%ebx, %ebx
.L28:
	leaq	0(,%rbx,4), %rax
	addq	(%rsp), %rax
	movq	%r12, %rsi
	movl	$2, %edi
	cvtss2sd	(%rax,%rbp), %xmm0
	incq	%rbx
	movb	$1, %al
	call	__printf_chk@PLT
	cmpq	$15, %rbx
	jne	.L28
	leaq	.LC10(%rip), %r13
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$60, %rbp
	movq	%r13, %rsi
	call	__printf_chk@PLT
	cmpq	$900, %rbp
	jne	.L27
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	call	__printf_chk@PLT
.L30:
	xorl	%ebx, %ebx
.L31:
	leaq	0(,%rbx,4), %rax
	addq	8(%rsp), %rax
	movq	%r12, %rsi
	movl	$2, %edi
	cvtss2sd	(%rax,%rbp), %xmm0
	incq	%rbx
	movb	$1, %al
	call	__printf_chk@PLT
	cmpq	$15, %rbx
	jne	.L31
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$60, %rbp
	call	__printf_chk@PLT
	cmpq	$900, %rbp
	jne	.L30
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	call	__printf_chk@PLT
.L33:
	xorl	%ebx, %ebx
.L34:
	leaq	0(,%rbx,4), %rax
	addq	16(%rsp), %rax
	movq	%r12, %rsi
	movl	$2, %edi
	cvtss2sd	(%rax,%rbp), %xmm0
	incq	%rbx
	movb	$1, %al
	call	__printf_chk@PLT
	cmpq	$15, %rbx
	jne	.L34
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$60, %rbp
	call	__printf_chk@PLT
	cmpq	$900, %rbp
	jne	.L33
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z16squareMatrixMultPfS_S_i"
.LC14:
	.string	"_Z10matrixMultPfS_S_iii"
.LC15:
	.string	"_Z14matrixTriUpperPfii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2072:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16squareMatrixMultPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10matrixMultPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14matrixTriUpperPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2072:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC1:
	.long	1149239296
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *  file name: TilingMatrix.cu
 *  NOTE: 
 *       squareMatrixMult is much more efficent than the regular multiplier
 *       currently compiling with: nvcc TilingMatrix.cu -o tileTest
 *       Device Standards for: GeForce GTX 1060 6GB
 *          total global mem size: 6078 MBytes (6373572608 bytes)
 *          total shared mem per block: 49.152 KBytes (49152 bytes)
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <unistd.h>
#include <string.h>
#include <math.h>
#include <assert.h>
#include <sys/time.h>
#include <stdlib.h>

#include <sys/time.h>     //measuring performance data

#define BLOCK_SIZE 32

/**********************************************************************
function name: matrixTriUpper
description: sets a matrix to an upper bound triangle matrix
parameters: 
            &a GPU device pointer to a m X n matrix (A)
Note:
    
return: none
**********************************************************************/
__global__ void matrixTriUpper(float *a, int m, int n) {
    //setting matricies to their upper bound 
    for(int i = 0; i < m; ++i) {
        for(int j = 0; j < n; ++j) {
            if(i>j)
                a[i*n + j] = 0;
            a[i*n + j] = a[i*n + j];
        }
    }
}

/**********************************************************************
function name: matrixMult
description: dot product of two matrix (not only square)
parameters: 
            &a GPU device pointer to a m X n matrix (A)
            &b GPU device pointer to a n X k matrix (B)
            &c GPU device output purpose pointer to a m X k matrix (C) 
            to store the result
Note:
    grid and block should be configured as:
        dim3 dimGrid((k + BLOCK_SIZE - 1) / BLOCK_SIZE, (m + BLOCK_SIZE - 1) / BLOCK_SIZE);
        dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    further sppedup can be obtained by using shared memory to decrease global memory access times
return: none
**********************************************************************/
__global__ void matrixMult(float *a, float *b, float *c, int m, int n, int k)
{ 
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float  sum = 0;
    if( col < k && row < m) {
        for(int i = 0; i < n; i++) 
            sum += a[row * n + i] * b[i * k + col];
        c[row * k + col] = sum;
    }
} 

/**********************************************************************
function name: squareMatrixMult
description: dot product of two matrix (not only square) in GPU
parameters: 
            &a GPU device pointer to a n X n matrix (A)
            &b GPU device pointer to a n X n matrix (B)
            &c GPU device output purpose pointer to a n X n matrix (C) 
            to store the result
Note:
    grid and block should be configured as:
        dim3 dim_grid((n - 1) / BLOCK_SIZE + 1, (n - 1) / BLOCK_SIZE + 1, 1);
        dim3 dim_block(BLOCK_SIZE, BLOCK_SIZE, 1);
    SQUARE IS MUCH MORE EFFICENT THAN REGULAR
return: none
**********************************************************************/
__global__ void squareMatrixMult(float *d_a, float *d_b, float *d_result, int n) 
{
    __shared__ float tile_a[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ float tile_b[BLOCK_SIZE][BLOCK_SIZE];

    int row = blockIdx.y * BLOCK_SIZE + threadIdx.y;
    int col = blockIdx.x * BLOCK_SIZE + threadIdx.x;
    float tmp = 0;
    int idx;

    for (int sub = 0; sub < gridDim.x; ++sub) {
        idx = row * n + sub * BLOCK_SIZE + threadIdx.x;
        if(idx >= n*n) {
            // n may not divisible by BLOCK_SIZE
            tile_a[threadIdx.y][threadIdx.x] = 0;
        }
        else {
            tile_a[threadIdx.y][threadIdx.x] = d_a[idx];
        }

        idx = (sub * BLOCK_SIZE + threadIdx.y) * n + col;
        if(idx >= n*n) {
            tile_b[threadIdx.y][threadIdx.x] = 0;
        }  
        else {
            tile_b[threadIdx.y][threadIdx.x] = d_b[idx];
        }
        __syncthreads();

        for (int k = threadIdx.x/n; k < BLOCK_SIZE; ++k)  {
            tmp += tile_a[threadIdx.y][k] * tile_b[k][threadIdx.x];
        }
        __syncthreads();
    }
    if(row < n && col < n) {
        d_result[row * n + col] = tmp;
    }
}

/**********************************************************************
function name: main
description: test and compare
parameters: 
            none
return: none
**********************************************************************/

int main(int argc, char** argv) {
    int printAllMat = 1; // debug flag for printing all of the maticies
    // Set sizes of the matrixes
    int m=15;
    int n=15;
    int k=15;
    
    /* Fixed seed for illustration */
    srand(3333);

    // Allocate memory in host RAM
    float *copyA, *copyB, *copyC;
    hipHostMalloc((void **) &copyA, sizeof(float)*m*n, hipHostMallocDefault); // copied matrix is m x n
    hipHostMalloc((void **) &copyB, sizeof(float)*n*k, hipHostMallocDefault); // copied matrix is n x k
    hipHostMalloc((void **) &copyC, sizeof(float)*m*k, hipHostMallocDefault); // copied matrix is m x k
    
    // float x = (float)rand()/(float)(RAND_MAX/a);
    // random initialize matrix A
    for (int i = 0; i < m; ++i) {
        for (int j = 0; j < n; ++j) {
            copyA[i * n + j] =((float)rand()/(float)(RAND_MAX)) * 1024;
        }
    }

    // random initialize matrix B
    for (int i = 0; i < n; ++i) {
        for (int j = 0; j < k; ++j) {
            copyB[i * k + j] = ((float)rand()/(float)(RAND_MAX)) * 1024;
        }
    }
    
    // Allocate memory space on the device 
    float *matA, *matB, *matC;
    hipMalloc((void **) &matA, sizeof(float)*m*n); // matrix is m x n
    hipMalloc((void **) &matB, sizeof(float)*n*k); // matrix is n x k
    hipMalloc((void **) &matC, sizeof(float)*m*k); // matrix is m x k
    
    // copy matrix A and B from host to device memory
    hipMemcpy(matA, copyA, sizeof(float)*m*n, hipMemcpyHostToDevice);
    hipMemcpy(matB, copyB, sizeof(float)*n*k, hipMemcpyHostToDevice);
    
    printf("size of matA %dX%d: %zu bytes\n", m,n,(sizeof(float)*m*n));
    printf("size of matB %dX%d: %zu bytes\n", n,k,(sizeof(float)*n*k));
    printf("size of matC %dX%d: %zu bytes\n", m,k,(sizeof(float)*m*k));
    printf("total bytes allocated to mem: %zu bytes ", ((sizeof(float)*m*n) + (sizeof(float)*n*k)+ (sizeof(float)*m*k)));
    printf("(~%zu MBytes)\n\n", (((sizeof(float)*m*n) + (sizeof(float)*n*k)+ (sizeof(float)*m*k)) / 1000000)); // get megabytes of the allocated arrays

    unsigned int grid_rows = (m + BLOCK_SIZE - 1) / BLOCK_SIZE;
    unsigned int grid_cols = (k + BLOCK_SIZE - 1) / BLOCK_SIZE;
    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
    
    printf("Calculating...\n\n");
    // Launch kernel, check if it is a square
    if(m == n && n == k) {
        matrixTriUpper<<<dimGrid, dimBlock>>>(matA, m, n);
        matrixTriUpper<<<dimGrid, dimBlock>>>(matB, n, k);
        squareMatrixMult<<<dimGrid, dimBlock>>>(matA, matB, matC, n); // square, thus only need 1 param to define size
    }
    else { // not a square, thus it needs param to define all sizes
        matrixMult<<<dimGrid, dimBlock>>>(matA, matB, matC, m, n, k);
    }
    
    // Transefr results from device to host 
    hipMemcpy(copyC, matC, sizeof(float)*m*k, hipMemcpyDeviceToHost);
    hipDeviceSynchronize(); //possibly
    //cudaThreadSynchronize();
    
    //prints the matricies
    // printf("[%d][%d]:%d, ", i, j, copyC[i*k + j]); //Another possible way to print the matrix
    //if the debug flag is on it will print the first two product arrays as well
    int i,j;
    if(printAllMat == 1) {
        // print matrix A
        printf("matA matrix: \n");
        for (i = 0; i < m; i++) {
            for (j = 0; j < n; j++) {
                //printf("[%d][%d]:%d, ", i, j, copyA[i*k + j]);
                printf(" %f ", copyA[i*k + j]);
            }
            printf("\n");
        }
        // print matrix B
        printf("\nmatB matrix: \n");
        for (i = 0; i < n; i++) {
            for (j = 0; j < k; j++) {
                //printf("[%d][%d]:%d, ", i, j, copyB[i*k + j]);
                printf(" %f ", copyB[i*k + j]);
            }
            printf("\n");
        }
    }
    
    // print result matrix
    printf("\nResult matrix: \n");
    for (i = 0; i < m; i++) {
        for (j = 0; j < k; j++) {
                //printf("[%d][%d]:%d, ", i, j, copyC[i*k + j]);
                printf(" %f ", copyC[i*k + j]);
            }
        printf("\n");
    }
    
    // free memory
    hipFree(matA);
    hipFree(matB);
    hipFree(matC);
    hipHostFree(copyA);
    hipHostFree(copyB);
    hipHostFree(copyC);
    return 0;
}

	.text
	.file	"TilingProgram.hip"
	.globl	_Z29__device_stub__matrixTriUpperPfii # -- Begin function _Z29__device_stub__matrixTriUpperPfii
	.type	_Z29__device_stub__matrixTriUpperPfii,@function
_Z29__device_stub__matrixTriUpperPfii:  # @_Z29__device_stub__matrixTriUpperPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14matrixTriUpperPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__matrixTriUpperPfii, .Lfunc_end0-_Z29__device_stub__matrixTriUpperPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__matrixMultPfS_S_iii # -- Begin function _Z25__device_stub__matrixMultPfS_S_iii
	.type	_Z25__device_stub__matrixMultPfS_S_iii,@function
_Z25__device_stub__matrixMultPfS_S_iii: # @_Z25__device_stub__matrixMultPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrixMultPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__matrixMultPfS_S_iii, .Lfunc_end1-_Z25__device_stub__matrixMultPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__squareMatrixMultPfS_S_i # -- Begin function _Z31__device_stub__squareMatrixMultPfS_S_i
	.type	_Z31__device_stub__squareMatrixMultPfS_S_i,@function
_Z31__device_stub__squareMatrixMultPfS_S_i: # @_Z31__device_stub__squareMatrixMultPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16squareMatrixMultPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z31__device_stub__squareMatrixMultPfS_S_i, .Lfunc_end2-_Z31__device_stub__squareMatrixMultPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI3_1:
	.long	0x44800000                      # float 1024
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$3333, %edi                     # imm = 0xD05
	callq	srand
	leaq	16(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$900, %esi                      # imm = 0x384
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	8(%rsp), %rdi
	movl	$900, %esi                      # imm = 0x384
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	48(%rsp), %rdi
	movl	$900, %esi                      # imm = 0x384
	xorl	%edx, %edx
	callq	hipHostMalloc
	xorl	%r14d, %r14d
.LBB3_1:                                # %.preheader163
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%r15d, %r15d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	16(%rsp), %rax
	addq	%rbx, %rax
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	cmpq	$15, %r15
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%r14
	addq	$60, %rbx
	cmpq	$15, %r14
	jne	.LBB3_1
# %bb.4:                                # %.preheader161.preheader
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_5:                                # %.preheader161
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	xorl	%r15d, %r15d
.LBB3_6:                                #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	mulss	.LCPI3_1(%rip), %xmm0
	movq	8(%rsp), %rax
	addq	%rbx, %rax
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	cmpq	$15, %r15
	jne	.LBB3_6
# %bb.7:                                #   in Loop: Header=BB3_5 Depth=1
	incq	%r14
	addq	$60, %rbx
	cmpq	$15, %r14
	jne	.LBB3_5
# %bb.8:
	movabsq	$137438953504, %rbx             # imm = 0x2000000020
	movabsq	$4294967297, %r14               # imm = 0x100000001
	leaq	40(%rsp), %r15
	movl	$900, %esi                      # imm = 0x384
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %r12
	movl	$900, %esi                      # imm = 0x384
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$900, %esi                      # imm = 0x384
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	16(%rsp), %rsi
	movl	$900, %edx                      # imm = 0x384
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movq	8(%rsp), %rsi
	movl	$900, %edx                      # imm = 0x384
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str, %edi
	movl	$900, %ecx                      # imm = 0x384
	movl	$15, %esi
	movl	$15, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movl	$900, %ecx                      # imm = 0x384
	movl	$15, %esi
	movl	$15, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movl	$900, %ecx                      # imm = 0x384
	movl	$15, %esi
	movl	$15, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	$2700, %esi                     # imm = 0xA8C
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	xorl	%esi, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.9:
	movq	40(%rsp), %rdi
	movl	$15, %esi
	movl	$15, %edx
	callq	_Z29__device_stub__matrixTriUpperPfii
.LBB3_10:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:
	movq	32(%rsp), %rdi
	movl	$15, %esi
	movl	$15, %edx
	callq	_Z29__device_stub__matrixTriUpperPfii
.LBB3_12:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_14
# %bb.13:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$15, %ecx
	callq	_Z31__device_stub__squareMatrixMultPfS_S_i
.LBB3_14:
	movq	48(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$900, %edx                      # imm = 0x384
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_15:                               # %.preheader160
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_16 Depth 2
	xorl	%r15d, %r15d
.LBB3_16:                               #   Parent Loop BB3_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	16(%rsp), %rax
	addq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$15, %r15
	jne	.LBB3_16
# %bb.17:                               #   in Loop: Header=BB3_15 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$60, %rbx
	cmpq	$15, %r14
	jne	.LBB3_15
# %bb.18:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_19:                               # %.preheader159
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_20 Depth 2
	xorl	%r15d, %r15d
.LBB3_20:                               #   Parent Loop BB3_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	8(%rsp), %rax
	addq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$15, %r15
	jne	.LBB3_20
# %bb.21:                               #   in Loop: Header=BB3_19 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$60, %rbx
	cmpq	$15, %r14
	jne	.LBB3_19
# %bb.22:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB3_23:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_24 Depth 2
	xorl	%r15d, %r15d
.LBB3_24:                               #   Parent Loop BB3_23 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	48(%rsp), %rax
	addq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$15, %r15
	jne	.LBB3_24
# %bb.25:                               #   in Loop: Header=BB3_23 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$60, %rbx
	cmpq	$15, %r14
	jne	.LBB3_23
# %bb.26:
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movq	8(%rsp), %rdi
	callq	hipHostFree
	movq	48(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14matrixTriUpperPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrixMultPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16squareMatrixMultPfS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14matrixTriUpperPfii,@object  # @_Z14matrixTriUpperPfii
	.section	.rodata,"a",@progbits
	.globl	_Z14matrixTriUpperPfii
	.p2align	3, 0x0
_Z14matrixTriUpperPfii:
	.quad	_Z29__device_stub__matrixTriUpperPfii
	.size	_Z14matrixTriUpperPfii, 8

	.type	_Z10matrixMultPfS_S_iii,@object # @_Z10matrixMultPfS_S_iii
	.globl	_Z10matrixMultPfS_S_iii
	.p2align	3, 0x0
_Z10matrixMultPfS_S_iii:
	.quad	_Z25__device_stub__matrixMultPfS_S_iii
	.size	_Z10matrixMultPfS_S_iii, 8

	.type	_Z16squareMatrixMultPfS_S_i,@object # @_Z16squareMatrixMultPfS_S_i
	.globl	_Z16squareMatrixMultPfS_S_i
	.p2align	3, 0x0
_Z16squareMatrixMultPfS_S_i:
	.quad	_Z31__device_stub__squareMatrixMultPfS_S_i
	.size	_Z16squareMatrixMultPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"size of matA %dX%d: %zu bytes\n"
	.size	.L.str, 31

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"size of matB %dX%d: %zu bytes\n"
	.size	.L.str.1, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"size of matC %dX%d: %zu bytes\n"
	.size	.L.str.2, 31

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"total bytes allocated to mem: %zu bytes "
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"(~%zu MBytes)\n\n"
	.size	.L.str.4, 16

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" %f "
	.size	.L.str.7, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14matrixTriUpperPfii"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10matrixMultPfS_S_iii"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16squareMatrixMultPfS_S_i"
	.size	.L__unnamed_3, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Calculating...\n"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"matA matrix: "
	.size	.Lstr.1, 14

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\nmatB matrix: "
	.size	.Lstr.2, 15

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\nResult matrix: "
	.size	.Lstr.3, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__matrixTriUpperPfii
	.addrsig_sym _Z25__device_stub__matrixMultPfS_S_iii
	.addrsig_sym _Z31__device_stub__squareMatrixMultPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14matrixTriUpperPfii
	.addrsig_sym _Z10matrixMultPfS_S_iii
	.addrsig_sym _Z16squareMatrixMultPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14matrixTriUpperPfii  ; -- Begin function _Z14matrixTriUpperPfii
	.globl	_Z14matrixTriUpperPfii
	.p2align	8
	.type	_Z14matrixTriUpperPfii,@function
_Z14matrixTriUpperPfii:                 ; @_Z14matrixTriUpperPfii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_8
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[4:5], s[0:1], 0x0
	s_cmp_gt_i32 s3, 0
	s_mov_b32 s7, 0
	s_cselect_b32 s0, -1, 0
	s_mov_b32 s1, 0
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s9, 0
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_le_u32 s8, s9
	s_cbranch_scc1 .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s6, s1, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[6:7], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s10, s4, s10
	s_addc_u32 s11, s5, s11
	global_store_b32 v0, v0, s[10:11]
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s9, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s3, s9
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s8, s8, 1
	s_add_i32 s1, s1, s3
	s_cmp_eq_u32 s8, s2
	s_cbranch_scc0 .LBB0_2
.LBB0_8:                                ; %._crit_edge24
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14matrixTriUpperPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14matrixTriUpperPfii, .Lfunc_end0-_Z14matrixTriUpperPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 14
; NumVgprs: 1
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10matrixMultPfS_S_iii ; -- Begin function _Z10matrixMultPfS_S_iii
	.globl	_Z10matrixMultPfS_S_iii
	.p2align	8
	.type	_Z10matrixMultPfS_S_iii,@function
_Z10matrixMultPfS_S_iii:                ; @_Z10matrixMultPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s5
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB1_3
	s_branch .LBB1_5
.LBB1_4:
	v_mov_b32_e32 v6, 0
.LBB1_5:                                ; %Flow54
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrixMultPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10matrixMultPfS_S_iii, .Lfunc_end1-_Z10matrixMultPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z16squareMatrixMultPfS_S_i ; -- Begin function _Z16squareMatrixMultPfS_S_i
	.globl	_Z16squareMatrixMultPfS_S_i
	.p2align	8
	.type	_Z16squareMatrixMultPfS_S_i,@function
_Z16squareMatrixMultPfS_S_i:            ; @_Z16squareMatrixMultPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s9, s[0:1], 0x20
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v5, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, s15, 5, v5
	v_lshl_add_u32 v0, s14, 5, v3
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc1 .LBB2_11
; %bb.1:                                ; %.lr.ph48
	v_cvt_f32_u32_e32 v1, s8
	s_sub_i32 s0, 0, s8
	s_mul_i32 s10, s8, s8
	v_lshlrev_b32_e32 v10, 7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s0, v1
	v_mul_hi_u32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v2
	v_mul_hi_u32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v1, s8
	v_add_nc_u32_e32 v6, 1, v1
	v_sub_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s8, v2
	v_cmp_le_u32_e32 vcc_lo, s8, v2
	v_dual_cndmask_b32 v1, v1, v6 :: v_dual_cndmask_b32 v2, v2, v7
	v_lshlrev_b32_e32 v6, 2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v7, 1, v1
	v_cmp_le_u32_e32 vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v11, v1, v7, vcc_lo
	v_mad_u64_u32 v[1:2], null, v4, s8, v[3:4]
	v_add_nc_u32_e32 v7, v10, v6
	v_lshlrev_b32_e32 v2, 7, v11
	v_cmp_gt_u32_e32 vcc_lo, 32, v11
	v_add_nc_u32_e32 v9, -1, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v8, 0x1000, v7
	v_lshl_add_u32 v10, v11, 2, v10
	v_add3_u32 v11, v2, v6, 0x1000
	v_mov_b32_e32 v6, 0
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_8 Depth 2
	s_lshl_b32 s11, s1, 5
	v_mov_b32_e32 v12, 0
	v_add_nc_u32_e32 v2, s11, v1
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v2
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	global_load_b32 v12, v[2:3], off
.LBB2_4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v13, s11, v5
	s_mov_b32 s11, exec_lo
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v12
	v_mad_u64_u32 v[2:3], null, v13, s8, v[0:1]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s10, v2
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_2 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, s0, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	global_load_b32 v3, v[2:3], off
.LBB2_6:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB2_10
; %bb.7:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_dual_mov_b32 v2, v11 :: v_dual_mov_b32 v3, v10
	v_mov_b32_e32 v12, v9
	s_mov_b32 s12, 0
.LBB2_8:                                ; %.lr.ph
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v13, v3
	ds_load_b32 v14, v2
	v_add_nc_u32_e32 v12, 1, v12
	v_add_nc_u32_e32 v3, 4, v3
	v_add_nc_u32_e32 v2, 0x80, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s0, 30, v12
	s_or_b32 s12, s0, s12
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v6, v13, v14
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB2_8
; %bb.9:                                ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB2_10:                               ; %Flow68
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	s_add_i32 s1, s1, 1
	s_cmp_eq_u32 s1, s9
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_2
	s_branch .LBB2_12
.LBB2_11:
	v_mov_b32_e32 v6, 0
.LBB2_12:                               ; %Flow70
	v_max_i32_e32 v1, v4, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB2_14
; %bb.13:
	v_mad_u64_u32 v[1:2], null, v4, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB2_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16squareMatrixMultPfS_S_i
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16squareMatrixMultPfS_S_i, .Lfunc_end2-_Z16squareMatrixMultPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 708
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14matrixTriUpperPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z14matrixTriUpperPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     1
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matrixMultPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10matrixMultPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16squareMatrixMultPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16squareMatrixMultPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
