#include <bits/stdc++.h>
#define N 16

using namespace std;

__global__ void RGBtoGray(float img[], float gray_img[])
{
        int ID = threadIdx.x + blockIdx.x * blockDim.x;
        for(int  i = ID ; i < N * N; i += gridDim.x * blockIdx.x)
        {
                gray_img[i] = 0.21 * img[i * 3] + 0.71 * img[i * 3 + 1] + 0.07 * img[i * 3 + 2];
        }
        __syncthreads();

}

void print_matrix(float mat[])
{
        for(int k = 0; k < 3; k++)
        {
                for(int i = 0; i < N; i++)
                {
                        for(int j = 0; j < N; j++)
                                cout << mat[(i * N + j) * 3 + k] << "  ";
                        cout << endl;
                }
                cout << endl << endl;
        }
}

void print_gray_matrix(float mat[])
{
        for(int i = 0; i < N; i++)
        {
                for(int j = 0; j < N; j++)
                        cout << mat[(i * N + j)] << "  ";
                cout << endl;
        }
        cout << endl << endl;
}

void init_matrix(float mat[])
{
        for(int k = 0; k < 3; k++)
        {
                for(int i = 0; i < N; i++)
                        for(int j = 0; j < N; j++)
                                mat[(i * N + j) * 3 + k] = k + 1;
        }
}


int main()
{
        float *host_img = new float[N * N * 3], *host_gray_img = new float[N * N ], *cuda_img, *cuda_gray_img;
        // Assuming N is a multiple of 16 
        //dim3 grid_dim(N / 16, N / 16), block_dim(16, 16);
        int block_dim = 256, grid_dim;
        if( (N * N) % 256 == 0)
        {
                grid_dim = (N * N) / 256;
        }
        else
        {
               	grid_dim = (N * N) / 256 + 1;
        }
        init_matrix(host_img);
        print_matrix(host_img);
        cudaMalloc(&cuda_img, sizeof(float) * N * N * 3);
        cudaMalloc(&cuda_gray_img, sizeof(float) * N * N );
        cudaMemcpy(cuda_img, host_img, sizeof(float) * N * N * 3, cudaMemcpyHostToDevice);
        RGBtoGray<<<grid_dim, block_dim>>>(cuda_img, cuda_gray_img);
        cudaMemcpy(host_gray_img, cuda_gray_img, sizeof(float) * N * N , cudaMemcpyDeviceToHost);
        print_gray_matrix(host_gray_img);
        free(host_img); 
        free(host_gray_img);
        cudaFree(cuda_img); 
        cudaFree(cuda_gray_img);
        return 0;
}


	.file	"tmpxft_00270f27_00000000-6_p5.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10831:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10831:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"  "
	.text
	.globl	_Z12print_matrixPf
	.type	_Z12print_matrixPf, @function
_Z12print_matrixPf:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L3:
	leaq	0(%r13,%rbx,4), %r12
	xorl	%ebp, %ebp
.L7:
	movq	%r12, %r14
	xorl	%r15d, %r15d
.L4:
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%r14), %xmm0
	incl	%r15d
	addq	$12, %r14
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$2, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpl	$16, %r15d
	jne	.L4
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	addl	$16, %ebp
	addq	$192, %r12
	call	_ZNSolsEPFRSoS_E@PLT
	cmpl	$256, %ebp
	jne	.L7
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbx
	call	_ZNSolsEPFRSoS_E@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	cmpq	$3, %rbx
	jne	.L3
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	_Z12print_matrixPf, .-_Z12print_matrixPf
	.globl	_Z17print_gray_matrixPf
	.type	_Z17print_gray_matrixPf, @function
_Z17print_gray_matrixPf:
.LFB10826:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	leaq	_ZSt4cout(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L12:
	movq	%rbp, %r13
	xorl	%ebx, %ebx
	salq	$6, %r13
	addq	%r14, %r13
.L13:
	movq	%r12, %rdi
	cvtss2sd	0(%r13,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$2, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	cmpq	$16, %rbx
	jne	.L13
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r12, %rdi
	incq	%rbp
	call	_ZNSolsEPFRSoS_E@PLT
	cmpq	$16, %rbp
	jne	.L12
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r12, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%rax, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E@PLT
	.cfi_endproc
.LFE10826:
	.size	_Z17print_gray_matrixPf, .-_Z17print_gray_matrixPf
	.globl	_Z11init_matrixPf
	.type	_Z11init_matrixPf, @function
_Z11init_matrixPf:
.LFB10827:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L18:
	leal	1(%rax), %esi
	leaq	(%rdi,%rax,4), %rcx
	xorl	%edx, %edx
	cvtsi2ssl	%esi, %xmm0
.L22:
	movq	%rcx, %r8
	xorl	%esi, %esi
.L19:
	incl	%esi
	movss	%xmm0, (%r8)
	addq	$12, %r8
	cmpl	$16, %esi
	jne	.L19
	addl	$16, %edx
	addq	$192, %rcx
	cmpl	$256, %edx
	jne	.L22
	incq	%rax
	cmpq	$3, %rax
	jne	.L18
	ret
	.cfi_endproc
.LFE10827:
	.size	_Z11init_matrixPf, .-_Z11init_matrixPf
	.globl	_Z30__device_stub__Z9RGBtoGrayPfS_PfS_
	.type	_Z30__device_stub__Z9RGBtoGrayPfS_PfS_, @function
_Z30__device_stub__Z9RGBtoGrayPfS_PfS_:
.LFB10853:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9RGBtoGrayPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10853:
	.size	_Z30__device_stub__Z9RGBtoGrayPfS_PfS_, .-_Z30__device_stub__Z9RGBtoGrayPfS_PfS_
	.globl	_Z9RGBtoGrayPfS_
	.type	_Z9RGBtoGrayPfS_, @function
_Z9RGBtoGrayPfS_:
.LFB10854:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9RGBtoGrayPfS_PfS_
	.cfi_endproc
.LFE10854:
	.size	_Z9RGBtoGrayPfS_, .-_Z9RGBtoGrayPfS_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10828:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$3072, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$1024, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	_Z11init_matrixPf
	call	_Z12print_matrixPf
	movq	%rsp, %rdi
	movl	$3072, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$3072, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z9RGBtoGrayPfS_PfS_
.L30:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$1024, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rdi
	call	_Z17print_gray_matrixPf
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10828:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z9RGBtoGrayPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10856:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9RGBtoGrayPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10856:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <bits/stdc++.h>
#define N 16

using namespace std;

__global__ void RGBtoGray(float img[], float gray_img[])
{
        int ID = threadIdx.x + blockIdx.x * blockDim.x;
        for(int  i = ID ; i < N * N; i += gridDim.x * blockIdx.x)
        {
                gray_img[i] = 0.21 * img[i * 3] + 0.71 * img[i * 3 + 1] + 0.07 * img[i * 3 + 2];
        }
        __syncthreads();

}

void print_matrix(float mat[])
{
        for(int k = 0; k < 3; k++)
        {
                for(int i = 0; i < N; i++)
                {
                        for(int j = 0; j < N; j++)
                                cout << mat[(i * N + j) * 3 + k] << "  ";
                        cout << endl;
                }
                cout << endl << endl;
        }
}

void print_gray_matrix(float mat[])
{
        for(int i = 0; i < N; i++)
        {
                for(int j = 0; j < N; j++)
                        cout << mat[(i * N + j)] << "  ";
                cout << endl;
        }
        cout << endl << endl;
}

void init_matrix(float mat[])
{
        for(int k = 0; k < 3; k++)
        {
                for(int i = 0; i < N; i++)
                        for(int j = 0; j < N; j++)
                                mat[(i * N + j) * 3 + k] = k + 1;
        }
}


int main()
{
        float *host_img = new float[N * N * 3], *host_gray_img = new float[N * N ], *cuda_img, *cuda_gray_img;
        // Assuming N is a multiple of 16 
        //dim3 grid_dim(N / 16, N / 16), block_dim(16, 16);
        int block_dim = 256, grid_dim;
        if( (N * N) % 256 == 0)
        {
                grid_dim = (N * N) / 256;
        }
        else
        {
               	grid_dim = (N * N) / 256 + 1;
        }
        init_matrix(host_img);
        print_matrix(host_img);
        hipMalloc(&cuda_img, sizeof(float) * N * N * 3);
        hipMalloc(&cuda_gray_img, sizeof(float) * N * N );
        hipMemcpy(cuda_img, host_img, sizeof(float) * N * N * 3, hipMemcpyHostToDevice);
        RGBtoGray<<<grid_dim, block_dim>>>(cuda_img, cuda_gray_img);
        hipMemcpy(host_gray_img, cuda_gray_img, sizeof(float) * N * N , hipMemcpyDeviceToHost);
        print_gray_matrix(host_gray_img);
        free(host_img); 
        free(host_gray_img);
        hipFree(cuda_img); 
        hipFree(cuda_gray_img);
        return 0;
}


	.text
	.file	"p5.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__RGBtoGrayPfS_ # -- Begin function _Z24__device_stub__RGBtoGrayPfS_
	.type	_Z24__device_stub__RGBtoGrayPfS_,@function
_Z24__device_stub__RGBtoGrayPfS_:       # @_Z24__device_stub__RGBtoGrayPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9RGBtoGrayPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__RGBtoGrayPfS_, .Lfunc_end0-_Z24__device_stub__RGBtoGrayPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPf              # -- Begin function _Z12print_matrixPf
	.type	_Z12print_matrixPf,@function
_Z12print_matrixPf:                     # @_Z12print_matrixPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	xorl	%r15d, %r15d
	movl	$_ZSt4cout, %r12d
.LBB1_1:                                # %.preheader11
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
                                        #       Child Loop BB1_3 Depth 3
	movq	%rbx, %r14
	xorl	%r13d, %r13d
.LBB1_2:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_3 Depth 3
	movq	$-192, %rbp
.LBB1_3:                                #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm0, %xmm0
	cvtss2sd	192(%r14,%rbp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	addq	$12, %rbp
	jne	.LBB1_3
# %bb.4:                                #   in Loop: Header=BB1_2 Depth=2
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	addq	$192, %r14
	cmpq	$16, %r13
	jne	.LBB1_2
# %bb.5:                                #   in Loop: Header=BB1_1 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r15
	addq	$4, %rbx
	cmpq	$3, %r15
	jne	.LBB1_1
# %bb.6:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z12print_matrixPf, .Lfunc_end1-_Z12print_matrixPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z17print_gray_matrixPf         # -- Begin function _Z17print_gray_matrixPf
	.type	_Z17print_gray_matrixPf,@function
_Z17print_gray_matrixPf:                # @_Z17print_gray_matrixPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
	movl	$_ZSt4cout, %r15d
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%r12d, %r12d
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	addq	$64, %rbx
	cmpq	$16, %r14
	jne	.LBB2_1
# %bb.4:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end2:
	.size	_Z17print_gray_matrixPf, .Lfunc_end2-_Z17print_gray_matrixPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z11init_matrixPf               # -- Begin function _Z11init_matrixPf
	.type	_Z11init_matrixPf,@function
_Z11init_matrixPf:                      # @_Z11init_matrixPf
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB3_1:                                # %.preheader12
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
                                        #       Child Loop BB3_3 Depth 3
	incq	%rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	%rdi, %rcx
	xorl	%edx, %edx
.LBB3_2:                                # %.preheader
                                        #   Parent Loop BB3_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_3 Depth 3
	movq	$-192, %rsi
.LBB3_3:                                #   Parent Loop BB3_1 Depth=1
                                        #     Parent Loop BB3_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	%xmm0, 192(%rcx,%rsi)
	addq	$12, %rsi
	jne	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=2
	incq	%rdx
	addq	$192, %rcx
	cmpq	$16, %rdx
	jne	.LBB3_2
# %bb.5:                                #   in Loop: Header=BB3_1 Depth=1
	addq	$4, %rdi
	cmpq	$3, %rax
	jne	.LBB3_1
# %bb.6:
	retq
.Lfunc_end3:
	.size	_Z11init_matrixPf, .Lfunc_end3-_Z11init_matrixPf
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$3072, %edi                     # imm = 0xC00
	callq	_Znam
	movq	%rax, %rbx
	movl	$1024, %edi                     # imm = 0x400
	callq	_Znam
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%rbx, %rcx
.LBB4_1:                                # %.preheader12.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
                                        #       Child Loop BB4_3 Depth 3
	incq	%rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	%rcx, %rdx
	xorl	%esi, %esi
.LBB4_2:                                # %.preheader.i
                                        #   Parent Loop BB4_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_3 Depth 3
	xorl	%edi, %edi
.LBB4_3:                                #   Parent Loop BB4_1 Depth=1
                                        #     Parent Loop BB4_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	%xmm0, (%rdx,%rdi)
	addq	$12, %rdi
	cmpq	$192, %rdi
	jne	.LBB4_3
# %bb.4:                                #   in Loop: Header=BB4_2 Depth=2
	incq	%rsi
	addq	$192, %rdx
	cmpq	$16, %rsi
	jne	.LBB4_2
# %bb.5:                                #   in Loop: Header=BB4_1 Depth=1
	addq	$4, %rcx
	cmpq	$3, %rax
	jne	.LBB4_1
# %bb.6:                                # %_Z11init_matrixPf.exit
	movq	%rbx, %rdi
	callq	_Z12print_matrixPf
	leaq	8(%rsp), %r15
	movl	$3072, %esi                     # imm = 0xC00
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$3072, %edx                     # imm = 0xC00
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	255(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z24__device_stub__RGBtoGrayPfS_
.LBB4_8:
	movq	(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %rdi
	callq	_Z17print_gray_matrixPf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9RGBtoGrayPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9RGBtoGrayPfS_,@object        # @_Z9RGBtoGrayPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z9RGBtoGrayPfS_
	.p2align	3, 0x0
_Z9RGBtoGrayPfS_:
	.quad	_Z24__device_stub__RGBtoGrayPfS_
	.size	_Z9RGBtoGrayPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"  "
	.size	.L.str, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9RGBtoGrayPfS_"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__RGBtoGrayPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9RGBtoGrayPfS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9RGBtoGrayPfS_        ; -- Begin function _Z9RGBtoGrayPfS_
	.globl	_Z9RGBtoGrayPfS_
	.p2align	8
	.type	_Z9RGBtoGrayPfS_,@function
_Z9RGBtoGrayPfS_:                       ; @_Z9RGBtoGrayPfS_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x1c
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmpx_gt_i32_e32 0x100, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s13, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshl_add_u32 v3, v1, 1, v1
	s_mov_b32 s2, 0xeb851eb8
	s_mov_b32 s8, 0xae147ae1
	s_mov_b32 s10, 0x1eb851ec
	s_mov_b32 s3, 0x3fe6b851
	s_mov_b32 s9, 0x3fcae147
	s_mov_b32 s11, 0x3fb1eb85
	s_mov_b32 s14, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s13, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s13, s1, 3
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_nc_u32_e32 v3, s13, v3
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b96 v[4:6], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[7:8], v5
	v_cvt_f64_f32_e32 v[4:5], v4
	v_mul_f64 v[7:8], v[7:8], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], s[8:9], v[7:8]
	v_cvt_f64_f32_e32 v[6:7], v6
	v_fma_f64 v[4:5], v[6:7], s[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[4:5]
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_cmp_lt_i32_e32 vcc_lo, 0xff, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, s6, v4
	v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
	s_or_b32 s14, vcc_lo, s14
	global_store_b32 v[4:5], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow18
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9RGBtoGrayPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9RGBtoGrayPfS_, .Lfunc_end0-_Z9RGBtoGrayPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9RGBtoGrayPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9RGBtoGrayPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
