#include<cuda_runtime.h>
#include<device_launch_parameters.h>
#include<stdio.h>
#include<stdlib.h>
#include<string.h>

__global__ void add(int* d_a,int* d_b,int* d_r,int *d_m)
{
	int n = threadIdx.x;
	int size = gridDim.x;
	for(int i = 0;i<(2);i++)
	{
		d_r[i*(*d_m)+n] = d_a[i*(*d_m)+n] + d_b[i*(*d_m)+n];
	}  
}

int main(void)
{
int *a,*b,*r,m,n,i;
int *d_a,*d_b,*d_r,*d_m;

printf("Enter m,n : ");
scanf("%d %d",&m,&n);

a = (int*)malloc(m*n*sizeof(int));
b = (int*)malloc(m*n*sizeof(int));
r = (int*)malloc(m*n*sizeof(int));

printf("Enter matrix 1:\n");
for(i=0;i<m*n;i++)
{
	scanf("%d",&a[i]);	
}

printf("Enter matrix 2:\n");
for(i=0;i<m*n;i++)
{
	scanf("%d",&b[i]);	
}

cudaMalloc((void **)&d_a,(m*n)*sizeof(int));
cudaMalloc((void **)&d_b,(m*n)*sizeof(int));
cudaMalloc((void **)&d_r,(m*n)*sizeof(int));
cudaMalloc((void **)&d_m,sizeof(int));

cudaMemcpy(d_a,a,(m*n)*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(d_b,b,(m*n)*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(d_r,r,(m*n)*sizeof(int),cudaMemcpyHostToDevice);
cudaMemcpy(d_m,&m,sizeof(int),cudaMemcpyHostToDevice);


add<<<1,m>>>(d_a,d_b,d_r,d_m);
cudaError_t error = cudaGetLastError();
 if(error!= cudaSuccess)
 {
	 	printf("%s\n",cudaGetErrorString(error));
 }

cudaMemcpy(r,d_r,(m*n)*sizeof(int),cudaMemcpyDeviceToHost);
 
printf("Result matrix :\n");
for(i=0;i<m*n;i++)
{
	printf("%d ",r[i]);
	if((i+1)%m==0)
		printf("\n");	
}

}
	.file	"tmpxft_003600fe_00000000-6_q22.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
	.type	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_, @function
_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3addPiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_, .-_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
	.globl	_Z3addPiS_S_S_
	.type	_Z3addPiS_S_S_, @function
_Z3addPiS_S_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE2053:
	.size	_Z3addPiS_S_S_, .-_Z3addPiS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Enter m,n : "
.LC1:
	.string	"%d %d"
.LC2:
	.string	"Enter matrix 1:\n"
.LC3:
	.string	"%d"
.LC4:
	.string	"Enter matrix 2:\n"
.LC5:
	.string	"%s\n"
.LC6:
	.string	"Result matrix :\n"
.LC7:
	.string	"%d "
.LC8:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	leaq	.LC3(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	24(%rsp), %rax
	leaq	28(%rsp), %rdx
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	24(%rsp), %ebx
	imull	28(%rsp), %ebx
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%r13, %rbp
	movq	%rax, %r12
	call	malloc@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L9:
	movl	24(%rsp), %eax
	imull	28(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L23
	movq	%rbp, %rsi
	movq	%r15, %rdi
	xorl	%eax, %eax
	incl	%r14d
	call	__isoc23_scanf@PLT
	addq	$4, %rbp
	jmp	.L9
.L23:
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movq	%r12, %rbp
	xorl	%r15d, %r15d
	movl	$2, %edi
	leaq	.LC3(%rip), %r14
	call	__printf_chk@PLT
.L11:
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	cmpl	%r15d, %esi
	jle	.L24
	movq	%rbp, %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	incl	%r15d
	call	__isoc23_scanf@PLT
	addq	$4, %rbp
	jmp	.L11
.L24:
	movslq	%esi, %rsi
	leaq	32(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	leaq	40(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	24(%rsp), %esi
	imull	28(%rsp), %esi
	leaq	48(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movq	%r13, %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movq	%r12, %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movq	%rbx, %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	24(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdi, 80(%rsp)
	movl	84(%rsp), %ecx
	movl	%eax, 76(%rsp)
	movq	76(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z28__device_stub__Z3addPiS_S_S_PiS_S_S_
.L13:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movl	24(%rsp), %edx
	imull	28(%rsp), %edx
	movl	$2, %ecx
	xorl	%ebp, %ebp
	movq	48(%rsp), %rsi
	movq	%rbx, %rdi
	leaq	.LC7(%rip), %r12
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	movl	24(%rsp), %eax
	imull	28(%rsp), %eax
	cmpl	%ebp, %eax
	jle	.L25
	movl	(%rbx,%rbp,4), %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	1(%rbp), %eax
	cltd
	idivl	24(%rsp)
	testl	%edx, %edx
	jne	.L16
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	incq	%rbp
	jmp	.L15
.L25:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z3addPiS_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<hip/hip_runtime.h>

#include<stdio.h>
#include<stdlib.h>
#include<string.h>

__global__ void add(int* d_a,int* d_b,int* d_r,int *d_m)
{
	int n = threadIdx.x;
	int size = gridDim.x;
	for(int i = 0;i<(2);i++)
	{
		d_r[i*(*d_m)+n] = d_a[i*(*d_m)+n] + d_b[i*(*d_m)+n];
	}  
}

int main(void)
{
int *a,*b,*r,m,n,i;
int *d_a,*d_b,*d_r,*d_m;

printf("Enter m,n : ");
scanf("%d %d",&m,&n);

a = (int*)malloc(m*n*sizeof(int));
b = (int*)malloc(m*n*sizeof(int));
r = (int*)malloc(m*n*sizeof(int));

printf("Enter matrix 1:\n");
for(i=0;i<m*n;i++)
{
	scanf("%d",&a[i]);	
}

printf("Enter matrix 2:\n");
for(i=0;i<m*n;i++)
{
	scanf("%d",&b[i]);	
}

hipMalloc((void **)&d_a,(m*n)*sizeof(int));
hipMalloc((void **)&d_b,(m*n)*sizeof(int));
hipMalloc((void **)&d_r,(m*n)*sizeof(int));
hipMalloc((void **)&d_m,sizeof(int));

hipMemcpy(d_a,a,(m*n)*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(d_b,b,(m*n)*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(d_r,r,(m*n)*sizeof(int),hipMemcpyHostToDevice);
hipMemcpy(d_m,&m,sizeof(int),hipMemcpyHostToDevice);


add<<<1,m>>>(d_a,d_b,d_r,d_m);
hipError_t error = hipGetLastError();
 if(error!= hipSuccess)
 {
	 	printf("%s\n",hipGetErrorString(error));
 }

hipMemcpy(r,d_r,(m*n)*sizeof(int),hipMemcpyDeviceToHost);
 
printf("Result matrix :\n");
for(i=0;i<m*n;i++)
{
	printf("%d ",r[i]);
	if((i+1)%m==0)
		printf("\n");	
}

}
	.text
	.file	"q22.hip"
	.globl	_Z18__device_stub__addPiS_S_S_  # -- Begin function _Z18__device_stub__addPiS_S_S_
	.type	_Z18__device_stub__addPiS_S_S_,@function
_Z18__device_stub__addPiS_S_S_:         # @_Z18__device_stub__addPiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPiS_S_S_, .Lfunc_end0-_Z18__device_stub__addPiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %r14
	leaq	8(%rsp), %r15
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%r14), %rax
	movslq	(%r15), %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %rbx
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	(%r15), %eax
	imull	(%r14), %eax
	testl	%eax, %eax
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%r13, %r14
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.3, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r15
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rcx
	imulq	%rax, %rcx
	addq	$4, %r14
	cmpq	%rcx, %r15
	jl	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rsi
	imulq	%rax, %rsi
	testl	%esi, %esi
	jle	.LBB1_6
# %bb.4:                                # %.lr.ph33.preheader
	movq	%r12, %r14
	xorl	%r15d, %r15d
.LBB1_5:                                # %.lr.ph33
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.3, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	incq	%r15
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rsi
	imulq	%rax, %rsi
	addq	$4, %r14
	cmpq	%rsi, %r15
	jl	.LBB1_5
.LBB1_6:                                # %._crit_edge34
	shlq	$2, %rsi
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%r12, %r13
	leaq	12(%rsp), %r12
	movslq	(%r12), %rax
	movslq	8(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	40(%rsp), %r14
	movq	%r14, %rdi
	callq	hipMalloc
	movslq	(%r12), %rax
	movslq	8(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movq	(%r15), %rdi
	movslq	(%r12), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movslq	(%r12), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movslq	(%r12), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%r12), %edx
	btsq	$32, %rdx
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rcx
	callq	_Z18__device_stub__addPiS_S_S_
.LBB1_8:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_10
# %bb.9:
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	%rax, %rdi
	callq	puts@PLT
.LBB1_10:
	movq	24(%rsp), %rsi
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	8(%rsp), %eax
	imull	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_15
# %bb.11:                               # %.lr.ph37.preheader
	xorl	%r14d, %r14d
.LBB1_12:                               # %.lr.ph37
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	movl	12(%rsp), %ecx
	movl	%r14d, %eax
	cltd
	idivl	%ecx
	testl	%edx, %edx
	jne	.LBB1_14
# %bb.13:                               #   in Loop: Header=BB1_12 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	movl	12(%rsp), %ecx
.LBB1_14:                               #   in Loop: Header=BB1_12 Depth=1
	movslq	8(%rsp), %rax
	movslq	%ecx, %rcx
	imulq	%rax, %rcx
	cmpq	%rcx, %r14
	jl	.LBB1_12
.LBB1_15:                               # %._crit_edge38
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPiS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPiS_S_S_,@object          # @_Z3addPiS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPiS_S_S_
	.p2align	3, 0x0
_Z3addPiS_S_S_:
	.quad	_Z18__device_stub__addPiS_S_S_
	.size	_Z3addPiS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter m,n : "
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d %d"
	.size	.L.str.1, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d"
	.size	.L.str.3, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%d "
	.size	.L.str.7, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPiS_S_S_"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Enter matrix 1:"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Enter matrix 2:"
	.size	.Lstr.1, 16

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Result matrix :"
	.size	.Lstr.2, 16

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPiS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPiS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPiS_S_S_          ; -- Begin function _Z3addPiS_S_S_
	.globl	_Z3addPiS_S_S_
	.p2align	8
	.type	_Z3addPiS_S_S_,@function
_Z3addPiS_S_S_:                         ; @_Z3addPiS_S_S_
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v6, 2, v0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v0, v6, s[0:1]
	global_load_b32 v1, v6, s[2:3]
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v1, v0
	v_add_co_u32 v2, s0, s0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, null, s1, 0, s0
	global_store_b32 v6, v0, s[4:5]
	global_load_b32 v0, v1, s[6:7]
	v_add_co_u32 v4, s0, s2, v6
	v_add_co_ci_u32_e64 v5, null, s3, 0, s0
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, v2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_u32 v4, s0, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v5, null, s5, 0, s0
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPiS_S_S_, .Lfunc_end0-_Z3addPiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 228
; NumSgprs: 10
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z3addPiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
