/**
 * Copyright 1993-2015 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 *
 */


 #include <stdio.h>
 #include <cuda_runtime.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <assert.h>
 #include <iostream>
 #include "cuda_runtime_api.h"
 #include "cuda.h"
 #include <string> 
 
 using namespace std;

unsigned int safeDiv(int a, int b) {
/*
 * Function:  Divsion that ceils the quotienten to get an int
 * --------------------
 *
 *  a: The numerator
 *  b: The denominator
 * 
 *  returns: Ceiled quotienten
 */
    return ceil(a / (b*1.0));
}


bool getThreads(int width, int n_samples, int& threadX, int& threadZ) {
/*
 * Function:  Assign threads and blocks
 * --------------------
 *
 *  width: The width of the array
 *  n_samples: Number of experiments
 *  threadX: Number of threads assigned to x-axis
 *  threadZ: Number of threads assigned to z-axis
 *  returns: True, if there exists an thread assignment
 */

    int maxBlocks = 65535;
    threadX = 512;
    threadZ = 1;

    bool search = true;
    bool X = false;
    bool Z = false;

    while (search) {

        if (safeDiv(width, threadX) < maxBlocks) {
            X = true;
        } else {
            printf ("Couldn't allocate enough threads! Consider decreaseing the number of experiments");
            exit (EXIT_FAILURE);
        }

        if (safeDiv(n_samples, threadZ) < maxBlocks) {
            Z = true;
        } else {
            threadX = threadX / 2;
            threadZ = threadZ * 2;
            X = false;
        }

        if (X && Z) {
            search = false;
        }

        if (threadX ==0) {
            printf ("Couldn't allocate enough threads! Consider decreaseing the number of experiments");
            return false;
        }
    
        if (threadZ ==0) {
            printf ("Couldn't allocate enough threads! Consider decreaseing the number of experiments");
            return false;
        }
    
    }
    return true;
  }


bool check_memory(size_t mem){
/*
 * Function:  Check if there is enough memory on GPU
 * --------------------
 *
 *  mem: Memory required to allocate data
 *
 *  returns: True, if there exists enough memory
 */

    int num_gpus;
    size_t free, total;
    cudaGetDeviceCount( &num_gpus );
    for ( int gpu_id = 0; gpu_id < num_gpus; gpu_id++ ) {
        cudaSetDevice( gpu_id );
        int id;
        cudaGetDevice( &id );
        cudaMemGetInfo( &free, &total );
        if (free <= mem) {
            cout << "Error: Your need " << ceil((mem)/1000000 * 0.953674) << " Mib, but there are only " << ceil(free /1000000*0.953674) << " Mib avaialble. Consider running your data in batches."<< endl;
            return false;
        }
        
    }
    return true;
  }

size_t cuda_mem_avilable(){
/*
 * Function:  Get available memory on GPU
 * --------------------
 *
 *  returns: Available memory on GPU(bits)
 */
    int num_gpus;
    size_t free, total;
    cudaGetDeviceCount( &num_gpus );
    for ( int gpu_id = 0; gpu_id < num_gpus; gpu_id++ ) {
        cudaSetDevice( gpu_id );
        int id;
        cudaGetDevice( &id );
        cudaMemGetInfo( &free, &total );

        return free;
        
        
    }
}

size_t mem_required(int m, int n, int S,int n_samples) {
/*
 * Function: Get required memory for allocation of data
 * --------------------
 *
 *  m: Number of samples in A
 *  n: Number of samples in B
 *  S: Maxsum in experiments
 *  n_samples: Number of experiments
 * 
 *  returns: Memory of data(bits)
 */
    int height = m + 1;
    int width = S + 1;

    int z_height = m+n;
    size_t memory = z_height * n_samples * sizeof(int) + 2 * width * height * n_samples * sizeof(double);
    return memory;

}
  
__global__ void compute_perm(double *d_N,double *d_N_old,int *d_z, int height, int width, int n_samples, int sample_len, int i) {
/*
 * Function: Get required memory for allocation of data
 * --------------------
 *
 *  d_N: Array to add counts of permutations 
 *  d_N_old: Array of old counts of permutations 
 *  d_z: Combination of elements from A and B
 *  height: Height of the arrays d_N and d_N_old
 *  width: Width of the arrays d_N and d_N_old
 *  n_samples: Number of experiments, or depth of d_N and d_N_old
 *  sample_len: Length of d_z
 *  i: Iteration i
 *  returns: Updated counts in d_N for iteration i
 */
    
 
    int s = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    int d = blockIdx.z * blockDim.z + threadIdx.z; 
      
     
    if(j < height && s < width && d < n_samples)  {
        if (i<j) { 
            d_N[(j + d * height)*width  + s] = 0;
        }
        else if (j == 0 && d_z[sample_len * d + i-1] == s) { 
            d_N[(j + d * height) * width + s] = d_N_old[(j + d * height) * width + s] + 1;
        }
        else if (j > 0 && d_z[sample_len * d + i-1] <= s) {    
            d_N[(j + d * height) * width + s] = d_N_old[((j-1) + d * height) * width  + (s - d_z[sample_len * d + i-1])] + d_N_old[(j + d*height) * width + s];
        } 
        else {
            d_N[(j + d * height)*width + s] = d_N_old[(j + d*height) * width + s];
        }   
    }
}
  
double * greenCuda(int *Z_data_, int * all_S_, int m, int n, int S, int n_samples) {
/*
 * Function: Compute permutation distribution
 * --------------------
 *
 *  Z_data_: Combinvation of A and B for all experiments
 *  all_S_: All sums for each experiment
 *  m: Number of samples in A
 *  n: Number of samples in B
 *  S: Maxsum in experiments
 *  n_samples: Number of experiments
 *
 *  returns: Permutation distribution for all experiments
 */
    cudaError_t err = cudaSuccess;
    int i;
    int s;
      
    int height = m + 1;
    int width = S + 1;
    int z_height = m+n;
 
    int *z;
    double *N, *N_old;

    size_t memory = z_height * n_samples * sizeof(int) + 2 * width * height * n_samples * sizeof(double);
    if (!check_memory(memory)){
        return NULL;
    };
    
    cudaMallocManaged(&z, sizeof(int) * z_height * n_samples);
    cudaMallocManaged(&N, sizeof(double) * width * height * n_samples);
    cudaMallocManaged(&N_old, sizeof(double) * width * height * n_samples);

    double *dx = (double *)malloc(sizeof(double) * width * n_samples);

    for (i = 0; i < z_height*n_samples; ++i) {
        z[i] = Z_data_[i];
    }
   
    int threadX, threadZ;
    if (!getThreads(width, n_samples, threadX, threadZ)){
        return NULL;
    }
     
    dim3 threads(threadX,1,threadZ);
    auto safediv = [](auto a, auto b) {return static_cast<unsigned int>(ceil(a / (b*1.0))); };
    dim3 blocks(safediv(width, threads.x), safediv( height, threads.y),safediv( n_samples, threads.z));
  
    for (i = 1; i < (m + n) + 1; i++) {
        if (i % 2 == 1) {   
            compute_perm<<<blocks,threads>>>(N, N_old, z, height, width, n_samples, z_height, i);    

        } 
        else {
            compute_perm<<<blocks,threads>>>(N_old, N, z, height, width,n_samples, z_height, i);    
        }
    }

    cudaDeviceSynchronize();
         
    double msum;

    if (i % 2 == 1) {
   
        for (i=0; i< n_samples; i++) {
       
            for (s = 0; s < S+1; s++) {
                dx[(S + 1) * i + s] = N_old[((m-1) + i * height)*width  + s];         
            }       
        }
    } else {

        for (i=0; i< n_samples; i++) {
          
           
            for (s = 0; s < S+1; s++) {
                dx[(S + 1) * i + s] = N[((m-1) + i * height)*width  + s];
            } 
        }
    }  

    cudaFree(N);
    cudaFree(N_old);
    cudaFree(z);
 
    return dx; 
}


  
	.file	"tmpxft_0030a2a2_00000000-6_green.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3647:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3647:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7safeDivii
	.type	_Z7safeDivii, @function
_Z7safeDivii:
.LFB3635:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%edi, %xmm0
	pushq	%rax
	.cfi_def_cfa_offset 16
	cvtsi2sdl	%esi, %xmm1
	divsd	%xmm1, %xmm0
	call	ceil@PLT
	popq	%rdx
	.cfi_def_cfa_offset 8
	cvttsd2siq	%xmm0, %rax
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z7safeDivii, .-_Z7safeDivii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Couldn't allocate enough threads! Consider decreaseing the number of experiments"
	.text
	.globl	_Z10getThreadsiiRiS_
	.type	_Z10getThreadsiiRiS_, @function
_Z10getThreadsiiRiS_:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$2, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	$512, (%rdx)
	movl	%edi, 12(%rsp)
	movl	$1, (%rcx)
.L11:
	movl	0(%rbp), %r15d
	movl	12(%rsp), %edi
	movl	%r15d, %esi
	call	_Z7safeDivii
	cmpl	$65534, %eax
	ja	.L5
	movl	(%rbx), %esi
	movl	%r12d, %edi
	call	_Z7safeDivii
	cmpl	$65534, %eax
	jbe	.L12
	movl	%r15d, %eax
	cltd
	idivl	%r14d
	movl	%eax, 0(%rbp)
	xorl	%eax, %eax
	movd	(%rbx), %xmm0
	pslld	$1, %xmm0
	movd	%xmm0, (%rbx)
	jmp	.L6
.L5:
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L12:
	movb	$1, %r13b
	movb	$1, %al
.L6:
	andl	%r13d, %eax
	cmpl	$0, 0(%rbp)
	jne	.L8
.L10:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	jmp	.L4
.L8:
	cmpl	$0, (%rbx)
	je	.L10
	testb	%al, %al
	je	.L11
.L4:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10getThreadsiiRiS_, .-_Z10getThreadsiiRiS_
	.section	.rodata.str1.1
.LC1:
	.string	"Error: Your need "
.LC3:
	.string	" Mib, but there are only "
.LC4:
	.string	" Mib avaialble. Consider running your data in batches."
	.text
	.globl	_Z12check_memorym
	.type	_Z12check_memorym, @function
_Z12check_memorym:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	leaq	4(%rsp), %r12
	call	cudaGetDeviceCount@PLT
.L19:
	cmpl	%ebp, (%rsp)
	jle	.L25
	movl	%ebp, %edi
	call	cudaSetDevice@PLT
	movq	%r12, %rdi
	call	cudaGetDevice@PLT
	leaq	16(%rsp), %rsi
	leaq	8(%rsp), %rdi
	call	cudaMemGetInfo@PLT
	cmpq	8(%rsp), %rbx
	jb	.L20
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	$1000000, %ebp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edx, %edx
	movq	%rax, %r12
	movq	%rbx, %rax
	divq	%rbp
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC2(%rip), %xmm0
	call	ceil@PLT
	movq	%r12, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edx, %edx
	movq	%rax, %rbx
	movq	8(%rsp), %rax
	divq	%rbp
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC2(%rip), %xmm0
	call	ceil@PLT
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
	jmp	.L18
.L20:
	incl	%ebp
	jmp	.L19
.L25:
	movb	$1, %al
.L18:
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z12check_memorym, .-_Z12check_memorym
	.globl	_Z17cuda_mem_avilablev
	.type	_Z17cuda_mem_avilablev, @function
_Z17cuda_mem_avilablev:
.LFB3638:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaGetDeviceCount@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	4(%rsp), %rdi
	call	cudaGetDevice@PLT
	leaq	16(%rsp), %rsi
	leaq	8(%rsp), %rdi
	call	cudaMemGetInfo@PLT
	movq	8(%rsp), %rax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z17cuda_mem_avilablev, .-_Z17cuda_mem_avilablev
	.globl	_Z12mem_requirediiii
	.type	_Z12mem_requirediiii, @function
_Z12mem_requirediiii:
.LFB3639:
	.cfi_startproc
	endbr64
	leal	1(%rdi), %eax
	incl	%edx
	addl	%esi, %edi
	imull	%edx, %eax
	imull	%ecx, %edi
	imull	%ecx, %eax
	movslq	%edi, %rdi
	addl	%eax, %eax
	cltq
	addq	%rax, %rax
	addq	%rdi, %rax
	salq	$2, %rax
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z12mem_requirediiii, .-_Z12mem_requirediiii
	.globl	_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii
	.type	_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii, @function
_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z12compute_permPdS_Piiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L30:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii, .-_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii
	.globl	_Z12compute_permPdS_Piiiiii
	.type	_Z12compute_permPdS_Piiiiii, @function
_Z12compute_permPdS_Piiiiii:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii
	.cfi_endproc
.LFE3670:
	.size	_Z12compute_permPdS_Piiiiii, .-_Z12compute_permPdS_Piiiiii
	.globl	_Z9greenCudaPiS_iiii
	.type	_Z9greenCudaPiS_iiii, @function
_Z9greenCudaPiS_iiii:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leal	(%rdx,%rcx), %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r13d, %r15d
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	imull	%r9d, %r15d
	leal	1(%rdx), %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ebp, %edi
	leal	1(%r8), %ebx
	imull	%ebx, %edi
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	imull	%r9d, %edi
	movl	%edx, 24(%rsp)
	movl	%r8d, 28(%rsp)
	addl	%edi, %edi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movslq	%edi, %rdi
	movslq	%r15d, %rax
	addq	%rdi, %rdi
	addq	%rax, %rdi
	salq	$2, %rdi
	call	_Z12check_memorym
	testb	%al, %al
	jne	.L36
.L40:
	xorl	%ecx, %ecx
	movq	%rcx, 8(%rsp)
	jmp	.L35
.L36:
	movslq	%r12d, %r8
	movslq	%r13d, %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	imulq	%r8, %rsi
	movq	%r8, 8(%rsp)
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %r8
	movslq	%ebx, %rcx
	movslq	%ebp, %rsi
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	imulq	%r8, %rcx
	imulq	%rcx, %rsi
	movq	%rcx, 16(%rsp)
	salq	$3, %rsi
	movq	%rsi, 8(%rsp)
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	movl	$1, %edx
	leaq	56(%rsp), %rdi
	call	cudaMallocManaged@PLT
	movq	16(%rsp), %rcx
	leaq	0(,%rcx,8), %rdi
	call	malloc@PLT
	movq	40(%rsp), %rdx
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
.L38:
	cmpl	%eax, %r15d
	jle	.L65
	movl	(%r14,%rax,4), %ecx
	movl	%ecx, (%rdx,%rax,4)
	incq	%rax
	jmp	.L38
.L65:
	leaq	36(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movl	%r12d, %esi
	movl	%ebx, %edi
	call	_Z10getThreadsiiRiS_
	testb	%al, %al
	je	.L40
	movl	32(%rsp), %eax
	movl	36(%rsp), %r15d
	cvtsi2sdl	%r12d, %xmm0
	movl	%eax, 16(%rsp)
	movl	%r15d, %eax
	cvtsi2sdq	%rax, %xmm1
	divsd	%xmm1, %xmm0
	call	ceil@PLT
	movl	16(%rsp), %eax
	movq	%xmm0, %r14
	cvtsi2sdl	%ebx, %xmm0
	cvtsi2sdq	%rax, %xmm1
	divsd	%xmm1, %xmm0
	call	ceil@PLT
	movq	%r14, %xmm2
	movl	%ebp, 80(%rsp)
	movl	$1, %r14d
	cvttsd2siq	%xmm0, %rax
	movl	%eax, 76(%rsp)
	cvttsd2siq	%xmm2, %rax
	movl	%eax, 84(%rsp)
.L45:
	movl	%r14d, %ecx
	andl	$1, %ecx
	cmpl	%r13d, %r14d
	jg	.L66
	movl	16(%rsp), %eax
	testl	%ecx, %ecx
	movl	%r15d, 72(%rsp)
	movl	%r15d, %ecx
	movq	76(%rsp), %rdi
	movl	84(%rsp), %esi
	movl	$1, 68(%rsp)
	movl	$0, %r9d
	movl	%eax, 64(%rsp)
	movl	$0, %r8d
	movq	64(%rsp), %rdx
	je	.L46
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	%r14
	.cfi_remember_state
	.cfi_def_cfa_offset 168
	movl	%r12d, %r9d
	movl	%ebx, %r8d
	movl	%ebp, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 176
	movq	56(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	jmp	.L64
.L46:
	.cfi_restore_state
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	%r14
	.cfi_def_cfa_offset 168
	movl	%r12d, %r9d
	movl	%ebx, %r8d
	movl	%ebp, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 176
	movq	56(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	72(%rsp), %rdi
.L64:
	call	_Z41__device_stub__Z12compute_permPdS_PiiiiiiPdS_Piiiiii
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L48:
	incl	%r14d
	jmp	.L45
.L66:
	movl	%ecx, 16(%rsp)
	call	cudaDeviceSynchronize@PLT
	movl	16(%rsp), %ecx
	movl	24(%rsp), %eax
	testl	%ecx, %ecx
	leal	-1(%rax), %eax
	jne	.L51
	imull	%ebx, %ebp
	movq	48(%rsp), %r9
	xorl	%esi, %esi
	imull	%ebx, %eax
	jmp	.L52
.L51:
	imull	%ebx, %ebp
	movq	56(%rsp), %r9
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	imull	%ebx, %eax
.L53:
	cmpl	%r12d, %esi
	jge	.L55
	movslq	%eax, %rdx
	movq	8(%rsp), %rdi
	leaq	(%r9,%rdx,8), %r8
	movslq	%ecx, %rdx
	leaq	(%rdi,%rdx,8), %rdi
	xorl	%edx, %edx
.L56:
	cmpl	%edx, 28(%rsp)
	jl	.L67
	movsd	(%r8,%rdx,8), %xmm0
	movsd	%xmm0, (%rdi,%rdx,8)
	incq	%rdx
	jmp	.L56
.L67:
	incl	%esi
	addl	%ebp, %eax
	addl	%ebx, %ecx
	jmp	.L53
.L68:
	incl	%ecx
	addl	%ebp, %eax
	addl	%ebx, %esi
.L52:
	cmpl	%r12d, %ecx
	jge	.L55
	movslq	%eax, %rdx
	movq	8(%rsp), %rdi
	leaq	(%r9,%rdx,8), %r8
	movslq	%esi, %rdx
	leaq	(%rdi,%rdx,8), %rdi
	xorl	%edx, %edx
.L58:
	cmpl	%edx, 28(%rsp)
	jl	.L68
	movsd	(%r8,%rdx,8), %xmm0
	movsd	%xmm0, (%rdi,%rdx,8)
	incq	%rdx
	jmp	.L58
.L55:
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.L35:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	movq	8(%rsp), %rax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z9greenCudaPiS_iiii, .-_Z9greenCudaPiS_iiii
	.section	.rodata.str1.1
.LC5:
	.string	"_Z12compute_permPdS_Piiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3672:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12compute_permPdS_Piiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3672:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	1445033157
	.long	1072596095
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Copyright 1993-2015 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 *
 */


 #include <stdio.h>
 #include <hip/hip_runtime.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <assert.h>
 #include <iostream>
 #include "hip/hip_runtime_api.h"
 
 #include <string> 
 
 using namespace std;

unsigned int safeDiv(int a, int b) {
/*
 * Function:  Divsion that ceils the quotienten to get an int
 * --------------------
 *
 *  a: The numerator
 *  b: The denominator
 * 
 *  returns: Ceiled quotienten
 */
    return ceil(a / (b*1.0));
}


bool getThreads(int width, int n_samples, int& threadX, int& threadZ) {
/*
 * Function:  Assign threads and blocks
 * --------------------
 *
 *  width: The width of the array
 *  n_samples: Number of experiments
 *  threadX: Number of threads assigned to x-axis
 *  threadZ: Number of threads assigned to z-axis
 *  returns: True, if there exists an thread assignment
 */

    int maxBlocks = 65535;
    threadX = 512;
    threadZ = 1;

    bool search = true;
    bool X = false;
    bool Z = false;

    while (search) {

        if (safeDiv(width, threadX) < maxBlocks) {
            X = true;
        } else {
            printf ("Couldn't allocate enough threads! Consider decreaseing the number of experiments");
            exit (EXIT_FAILURE);
        }

        if (safeDiv(n_samples, threadZ) < maxBlocks) {
            Z = true;
        } else {
            threadX = threadX / 2;
            threadZ = threadZ * 2;
            X = false;
        }

        if (X && Z) {
            search = false;
        }

        if (threadX ==0) {
            printf ("Couldn't allocate enough threads! Consider decreaseing the number of experiments");
            return false;
        }
    
        if (threadZ ==0) {
            printf ("Couldn't allocate enough threads! Consider decreaseing the number of experiments");
            return false;
        }
    
    }
    return true;
  }


bool check_memory(size_t mem){
/*
 * Function:  Check if there is enough memory on GPU
 * --------------------
 *
 *  mem: Memory required to allocate data
 *
 *  returns: True, if there exists enough memory
 */

    int num_gpus;
    size_t free, total;
    hipGetDeviceCount( &num_gpus );
    for ( int gpu_id = 0; gpu_id < num_gpus; gpu_id++ ) {
        hipSetDevice( gpu_id );
        int id;
        hipGetDevice( &id );
        hipMemGetInfo( &free, &total );
        if (free <= mem) {
            cout << "Error: Your need " << ceil((mem)/1000000 * 0.953674) << " Mib, but there are only " << ceil(free /1000000*0.953674) << " Mib avaialble. Consider running your data in batches."<< endl;
            return false;
        }
        
    }
    return true;
  }

size_t cuda_mem_avilable(){
/*
 * Function:  Get available memory on GPU
 * --------------------
 *
 *  returns: Available memory on GPU(bits)
 */
    int num_gpus;
    size_t free, total;
    hipGetDeviceCount( &num_gpus );
    for ( int gpu_id = 0; gpu_id < num_gpus; gpu_id++ ) {
        hipSetDevice( gpu_id );
        int id;
        hipGetDevice( &id );
        hipMemGetInfo( &free, &total );

        return free;
        
        
    }
}

size_t mem_required(int m, int n, int S,int n_samples) {
/*
 * Function: Get required memory for allocation of data
 * --------------------
 *
 *  m: Number of samples in A
 *  n: Number of samples in B
 *  S: Maxsum in experiments
 *  n_samples: Number of experiments
 * 
 *  returns: Memory of data(bits)
 */
    int height = m + 1;
    int width = S + 1;

    int z_height = m+n;
    size_t memory = z_height * n_samples * sizeof(int) + 2 * width * height * n_samples * sizeof(double);
    return memory;

}
  
__global__ void compute_perm(double *d_N,double *d_N_old,int *d_z, int height, int width, int n_samples, int sample_len, int i) {
/*
 * Function: Get required memory for allocation of data
 * --------------------
 *
 *  d_N: Array to add counts of permutations 
 *  d_N_old: Array of old counts of permutations 
 *  d_z: Combination of elements from A and B
 *  height: Height of the arrays d_N and d_N_old
 *  width: Width of the arrays d_N and d_N_old
 *  n_samples: Number of experiments, or depth of d_N and d_N_old
 *  sample_len: Length of d_z
 *  i: Iteration i
 *  returns: Updated counts in d_N for iteration i
 */
    
 
    int s = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;
    int d = blockIdx.z * blockDim.z + threadIdx.z; 
      
     
    if(j < height && s < width && d < n_samples)  {
        if (i<j) { 
            d_N[(j + d * height)*width  + s] = 0;
        }
        else if (j == 0 && d_z[sample_len * d + i-1] == s) { 
            d_N[(j + d * height) * width + s] = d_N_old[(j + d * height) * width + s] + 1;
        }
        else if (j > 0 && d_z[sample_len * d + i-1] <= s) {    
            d_N[(j + d * height) * width + s] = d_N_old[((j-1) + d * height) * width  + (s - d_z[sample_len * d + i-1])] + d_N_old[(j + d*height) * width + s];
        } 
        else {
            d_N[(j + d * height)*width + s] = d_N_old[(j + d*height) * width + s];
        }   
    }
}
  
double * greenCuda(int *Z_data_, int * all_S_, int m, int n, int S, int n_samples) {
/*
 * Function: Compute permutation distribution
 * --------------------
 *
 *  Z_data_: Combinvation of A and B for all experiments
 *  all_S_: All sums for each experiment
 *  m: Number of samples in A
 *  n: Number of samples in B
 *  S: Maxsum in experiments
 *  n_samples: Number of experiments
 *
 *  returns: Permutation distribution for all experiments
 */
    hipError_t err = hipSuccess;
    int i;
    int s;
      
    int height = m + 1;
    int width = S + 1;
    int z_height = m+n;
 
    int *z;
    double *N, *N_old;

    size_t memory = z_height * n_samples * sizeof(int) + 2 * width * height * n_samples * sizeof(double);
    if (!check_memory(memory)){
        return NULL;
    };
    
    hipMallocManaged(&z, sizeof(int) * z_height * n_samples);
    hipMallocManaged(&N, sizeof(double) * width * height * n_samples);
    hipMallocManaged(&N_old, sizeof(double) * width * height * n_samples);

    double *dx = (double *)malloc(sizeof(double) * width * n_samples);

    for (i = 0; i < z_height*n_samples; ++i) {
        z[i] = Z_data_[i];
    }
   
    int threadX, threadZ;
    if (!getThreads(width, n_samples, threadX, threadZ)){
        return NULL;
    }
     
    dim3 threads(threadX,1,threadZ);
    auto safediv = [](auto a, auto b) {return static_cast<unsigned int>(ceil(a / (b*1.0))); };
    dim3 blocks(safediv(width, threads.x), safediv( height, threads.y),safediv( n_samples, threads.z));
  
    for (i = 1; i < (m + n) + 1; i++) {
        if (i % 2 == 1) {   
            compute_perm<<<blocks,threads>>>(N, N_old, z, height, width, n_samples, z_height, i);    

        } 
        else {
            compute_perm<<<blocks,threads>>>(N_old, N, z, height, width,n_samples, z_height, i);    
        }
    }

    hipDeviceSynchronize();
         
    double msum;

    if (i % 2 == 1) {
   
        for (i=0; i< n_samples; i++) {
       
            for (s = 0; s < S+1; s++) {
                dx[(S + 1) * i + s] = N_old[((m-1) + i * height)*width  + s];         
            }       
        }
    } else {

        for (i=0; i< n_samples; i++) {
          
           
            for (s = 0; s < S+1; s++) {
                dx[(S + 1) * i + s] = N[((m-1) + i * height)*width  + s];
            } 
        }
    }  

    hipFree(N);
    hipFree(N_old);
    hipFree(z);
 
    return dx; 
}


  
	.text
	.file	"green.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z7safeDivii                    # -- Begin function _Z7safeDivii
	.type	_Z7safeDivii,@function
_Z7safeDivii:                           # @_Z7safeDivii
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	cvtsi2sd	%edi, %xmm0
	cvtsi2sd	%esi, %xmm1
	divsd	%xmm1, %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
                                        # kill: def $eax killed $eax killed $rax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7safeDivii, .Lfunc_end0-_Z7safeDivii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10getThreadsiiRiS_            # -- Begin function _Z10getThreadsiiRiS_
	.type	_Z10getThreadsiiRiS_,@function
_Z10getThreadsiiRiS_:                   # @_Z10getThreadsiiRiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movl	$512, (%rdx)                    # imm = 0x200
	cvtsi2sd	%edi, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%esi, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$1, (%rcx)
	movb	$1, %cl
	movl	$1, %r12d
	xorl	%r15d, %r15d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, %ebp
	testb	$1, %cl
	je	.LBB1_10
# %bb.2:                                #   in Loop: Header=BB1_1 Depth=1
	movl	(%r14), %r13d
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r13d, %xmm1
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	cmpl	$65534, %eax                    # imm = 0xFFFE
	ja	.LBB1_5
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r12d, %xmm1
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	cmpl	$65534, %eax                    # imm = 0xFFFE
	jbe	.LBB1_4
# %bb.6:                                #   in Loop: Header=BB1_1 Depth=1
	movl	%r13d, %ecx
	shrl	$31, %ecx
	addl	%r13d, %ecx
	sarl	%ecx
	movl	%ecx, (%r14)
	movl	(%rbx), %r12d
	addl	%r12d, %r12d
	movl	%r12d, (%rbx)
	movl	(%r14), %r13d
	jmp	.LBB1_7
.LBB1_4:                                #   in Loop: Header=BB1_1 Depth=1
	movb	$1, %r15b
.LBB1_7:                                #   in Loop: Header=BB1_1 Depth=1
	testl	%r13d, %r13d
	je	.LBB1_9
# %bb.8:                                #   in Loop: Header=BB1_1 Depth=1
	testb	$1, %r15b
	movzbl	%bpl, %edx
	movl	$0, %ecx
	cmovel	%edx, %ecx
	cmpl	$65535, %eax                    # imm = 0xFFFF
	cmovael	%edx, %ecx
	testl	%r12d, %r12d
	jne	.LBB1_1
.LBB1_9:                                # %.loopexit.sink.split
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
.LBB1_10:                               # %.loopexit
	testb	$1, %bpl
	sete	%al
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_5:
	.cfi_def_cfa_offset 80
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z10getThreadsiiRiS_, .Lfunc_end1-_Z10getThreadsiiRiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z12check_memorym
.LCPI2_0:
	.quad	0x3fee847f562174c5              # double 0.95367400000000002
	.text
	.globl	_Z12check_memorym
	.type	_Z12check_memorym,@function
_Z12check_memorym:                      # @_Z12check_memorym
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	leaq	12(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	movb	$1, %bpl
	cmpl	$0, (%r14)
	jle	.LBB2_5
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r14d, %r14d
	leaq	28(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	32(%rsp), %r13
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r14d, %edi
	callq	hipSetDevice
	movq	%r15, %rdi
	callq	hipGetDevice
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	hipMemGetInfo
	cmpq	%rbx, 16(%rsp)
	jbe	.LBB2_3
# %bb.4:                                # %.critedge
                                        #   in Loop: Header=BB2_2 Depth=1
	incl	%r14d
	cmpl	12(%rsp), %r14d
	jl	.LBB2_2
	jmp	.LBB2_5
.LBB2_3:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movabsq	$4835703278458516699, %r14      # imm = 0x431BDE82D7B634DB
	movq	%rbx, %rax
	mulq	%r14
	shrq	$18, %rdx
	cvtsi2sd	%rdx, %xmm0
	mulsd	.LCPI2_0(%rip), %xmm0
	callq	ceil@PLT
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$25, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rax
	mulq	16(%rsp)
	shrq	$18, %rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	mulsd	.LCPI2_0(%rip), %xmm0
	callq	ceil@PLT
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$54, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebp, %ebp
.LBB2_5:                                # %.critedge14
	movl	%ebp, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12check_memorym, .Lfunc_end2-_Z12check_memorym
	.cfi_endproc
                                        # -- End function
	.globl	_Z17cuda_mem_avilablev          # -- Begin function _Z17cuda_mem_avilablev
	.type	_Z17cuda_mem_avilablev,@function
_Z17cuda_mem_avilablev:                 # @_Z17cuda_mem_avilablev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	jle	.LBB3_1
# %bb.2:
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	8(%rsp), %rdi
	callq	hipGetDevice
	leaq	24(%rsp), %rbx
	leaq	16(%rsp), %rsi
	movq	%rbx, %rdi
	callq	hipMemGetInfo
	movq	(%rbx), %rax
	jmp	.LBB3_3
.LBB3_1:
                                        # implicit-def: $rax
.LBB3_3:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z17cuda_mem_avilablev, .Lfunc_end3-_Z17cuda_mem_avilablev
	.cfi_endproc
                                        # -- End function
	.globl	_Z12mem_requirediiii            # -- Begin function _Z12mem_requirediiii
	.type	_Z12mem_requirediiii,@function
_Z12mem_requirediiii:                   # @_Z12mem_requirediiii
	.cfi_startproc
# %bb.0:
                                        # kill: def $edx killed $edx def $rdx
	addl	%edi, %esi
	incl	%edi
	imull	%ecx, %esi
	movslq	%esi, %rax
	shlq	$2, %rax
	leal	2(,%rdx,2), %edx
	imull	%ecx, %edi
	imull	%edx, %edi
	movslq	%edi, %rcx
	leaq	(%rax,%rcx,8), %rax
	retq
.Lfunc_end4:
	.size	_Z12mem_requirediiii, .Lfunc_end4-_Z12mem_requirediiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__compute_permPdS_Piiiiii # -- Begin function _Z27__device_stub__compute_permPdS_Piiiiii
	.type	_Z27__device_stub__compute_permPdS_Piiiiii,@function
_Z27__device_stub__compute_permPdS_Piiiiii: # @_Z27__device_stub__compute_permPdS_Piiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12compute_permPdS_Piiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z27__device_stub__compute_permPdS_Piiiiii, .Lfunc_end5-_Z27__device_stub__compute_permPdS_Piiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9greenCudaPiS_iiii            # -- Begin function _Z9greenCudaPiS_iiii
	.type	_Z9greenCudaPiS_iiii,@function
_Z9greenCudaPiS_iiii:                   # @_Z9greenCudaPiS_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r13d
                                        # kill: def $r8d killed $r8d def $r8
	movl	%ecx, %r15d
	movl	%edx, %r14d
	movq	%rdi, %rbx
	leal	1(%r14), %ecx
	movq	%r8, 80(%rsp)                   # 8-byte Spill
	leal	1(%r8), %r12d
	addl	%edx, %r15d
	movl	%r15d, %ebp
	imull	%r9d, %ebp
	movslq	%ebp, %rax
	shlq	$2, %rax
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
                                        # kill: def $ecx killed $ecx killed $rcx
	imull	%r12d, %ecx
	movl	%ecx, 20(%rsp)                  # 4-byte Spill
	imull	%r9d, %ecx
	addl	%ecx, %ecx
	movslq	%ecx, %rcx
	leaq	(%rax,%rcx,8), %rdi
	callq	_Z12check_memorym
	testb	%al, %al
	je	.LBB6_1
# %bb.2:
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movslq	%r15d, %rsi
	movl	%r13d, 16(%rsp)                 # 4-byte Spill
	movslq	%r13d, %r13
	imulq	%r13, %rsi
	shlq	$2, %rsi
	leaq	56(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%r12d, 12(%rsp)                 # 4-byte Spill
	movslq	%r12d, %r15
	movslq	32(%rsp), %r12                  # 4-byte Folded Reload
	imulq	%r13, %r15
	shlq	$3, %r15
	imulq	%r15, %r12
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r15
	testl	%ebp, %ebp
	jle	.LBB6_5
# %bb.3:                                # %.lr.ph
	movq	56(%rsp), %rax
	movl	%ebp, %ecx
	xorl	%edx, %edx
.LBB6_4:                                # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%rdx,4), %esi
	movl	%esi, (%rax,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB6_4
.LBB6_5:                                # %._crit_edge
	leaq	76(%rsp), %rdx
	leaq	72(%rsp), %rcx
	movl	12(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %edi
	movl	16(%rsp), %ebp                  # 4-byte Reload
	movl	%ebp, %esi
	callq	_Z10getThreadsiiRiS_
	testb	%al, %al
	je	.LBB6_1
# %bb.6:
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movl	76(%rsp), %r15d
	cvtsi2sd	%ebx, %xmm0
	movl	72(%rsp), %ebx
	cvtsi2sd	%r15, %xmm1
	divsd	%xmm1, %xmm0
	callq	ceil@PLT
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ebp, %xmm1
	movsd	%xmm0, 88(%rsp)                 # 8-byte Spill
	movq	%rbx, 96(%rsp)                  # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbx, %xmm0
	divsd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	callq	ceil@PLT
	movq	24(%rsp), %rcx                  # 8-byte Reload
	testl	%ecx, %ecx
	jle	.LBB6_28
# %bb.7:                                # %.lr.ph121.preheader
	cvttsd2si	88(%rsp), %rax          # 8-byte Folded Reload
	cvttsd2si	%xmm0, %r12
	btsq	$32, %r15
	movl	%eax, %eax
	movq	32(%rsp), %r13                  # 8-byte Reload
	shlq	$32, %r13
	orq	%rax, %r13
	movl	%ecx, %ebp
	negl	%ebp
	movl	$1, %ebx
.LBB6_8:                                # %.lr.ph121
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	%r12d, %esi
	movq	%r15, %rdx
	movq	96(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testb	$1, %bl
	jne	.LBB6_9
# %bb.11:                               #   in Loop: Header=BB6_8 Depth=1
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.12:                               #   in Loop: Header=BB6_8 Depth=1
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	jmp	.LBB6_13
.LBB6_9:                                #   in Loop: Header=BB6_8 Depth=1
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.10:                               #   in Loop: Header=BB6_8 Depth=1
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
.LBB6_13:                               #   in Loop: Header=BB6_8 Depth=1
	movq	56(%rsp), %rdx
	movq	32(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	12(%rsp), %r8d                  # 4-byte Reload
	movl	16(%rsp), %r9d                  # 4-byte Reload
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__compute_permPdS_Piiiiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB6_14:                               #   in Loop: Header=BB6_8 Depth=1
	leal	(%rbx,%rbp), %eax
	incl	%eax
	movl	%ebx, %ecx
	incl	%ecx
	movl	%ecx, %ebx
	cmpl	$1, %eax
	jne	.LBB6_8
# %bb.15:                               # %._crit_edge122
	callq	hipDeviceSynchronize
	testb	$1, 24(%rsp)                    # 1-byte Folded Reload
	movl	16(%rsp), %ebp                  # 4-byte Reload
	je	.LBB6_16
# %bb.21:                               # %.preheader113
	testl	%ebp, %ebp
	movq	80(%rsp), %r13                  # 8-byte Reload
	movl	12(%rsp), %eax                  # 4-byte Reload
	jle	.LBB6_26
# %bb.22:                               # %.preheader.lr.ph
	movq	48(%rsp), %r15
	decl	%r14d
	imull	%eax, %r14d
	movl	%eax, %ebx
	shlq	$3, %rbx
	movl	%ebp, %r12d
	xorl	%ebp, %ebp
.LBB6_23:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	testl	%r13d, %r13d
	js	.LBB6_25
# %bb.24:                               # %.lr.ph130
                                        #   in Loop: Header=BB6_23 Depth=1
	movslq	%r14d, %rax
	leaq	(%r15,%rax,8), %rsi
	movl	%ebp, %eax
	movq	64(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,8), %rdi
	movq	%rbx, %rdx
	callq	memcpy@PLT
	movl	12(%rsp), %eax                  # 4-byte Reload
.LBB6_25:                               # %._crit_edge131
                                        #   in Loop: Header=BB6_23 Depth=1
	addl	20(%rsp), %r14d                 # 4-byte Folded Reload
	addl	%eax, %ebp
	decq	%r12
	jne	.LBB6_23
	jmp	.LBB6_26
.LBB6_1:
	xorl	%eax, %eax
	jmp	.LBB6_27
.LBB6_28:                               # %._crit_edge122.thread
	callq	hipDeviceSynchronize
.LBB6_16:                               # %.preheader115
	testl	%ebp, %ebp
	movq	80(%rsp), %r13                  # 8-byte Reload
	movl	12(%rsp), %eax                  # 4-byte Reload
	jle	.LBB6_26
# %bb.17:                               # %.preheader114.lr.ph
	movq	40(%rsp), %r15
	decl	%r14d
	imull	%eax, %r14d
	movl	%eax, %ebx
	shlq	$3, %rbx
	movl	%ebp, %r12d
	xorl	%ebp, %ebp
.LBB6_18:                               # %.preheader114
                                        # =>This Inner Loop Header: Depth=1
	testl	%r13d, %r13d
	js	.LBB6_20
# %bb.19:                               # %.lr.ph125
                                        #   in Loop: Header=BB6_18 Depth=1
	movslq	%r14d, %rax
	leaq	(%r15,%rax,8), %rsi
	movl	%ebp, %eax
	movq	64(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,8), %rdi
	movq	%rbx, %rdx
	callq	memcpy@PLT
	movl	12(%rsp), %eax                  # 4-byte Reload
.LBB6_20:                               # %._crit_edge126
                                        #   in Loop: Header=BB6_18 Depth=1
	addl	20(%rsp), %r14d                 # 4-byte Folded Reload
	addl	%eax, %ebp
	decq	%r12
	jne	.LBB6_18
.LBB6_26:                               # %.loopexit
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rax                  # 8-byte Reload
.LBB6_27:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z9greenCudaPiS_iiii, .Lfunc_end6-_Z9greenCudaPiS_iiii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12compute_permPdS_Piiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Couldn't allocate enough threads! Consider decreaseing the number of experiments"
	.size	.L.str, 81

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error: Your need "
	.size	.L.str.1, 18

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" Mib, but there are only "
	.size	.L.str.2, 26

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" Mib avaialble. Consider running your data in batches."
	.size	.L.str.3, 55

	.type	_Z12compute_permPdS_Piiiiii,@object # @_Z12compute_permPdS_Piiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z12compute_permPdS_Piiiiii
	.p2align	3, 0x0
_Z12compute_permPdS_Piiiiii:
	.quad	_Z27__device_stub__compute_permPdS_Piiiiii
	.size	_Z12compute_permPdS_Piiiiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z12compute_permPdS_Piiiiii"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__compute_permPdS_Piiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z12compute_permPdS_Piiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12compute_permPdS_Piiiiii ; -- Begin function _Z12compute_permPdS_Piiiiii
	.globl	_Z12compute_permPdS_Piiiiii
	.p2align	8
	.type	_Z12compute_permPdS_Piiiiii,@function
_Z12compute_permPdS_Piiiiii:            ; @_Z12compute_permPdS_Piiiiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v1, v0, 10, 10
	v_bfe_u32 v6, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[4:5], null, s14, s8, v[1:2]
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s4, v4
	v_cmp_gt_i32_e64 s2, s5, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s3, s6, v2
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_18
; %bb.1:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x28
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr6_vgpr7
	s_waitcnt lgkmcnt(0)
	v_cmpx_ge_i32_e64 s2, v4
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_15
; %bb.2:
	v_cmp_ne_u32_e64 s12, 0, v4
	s_mov_b32 s6, 0
	s_mov_b32 s13, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_mad_u64_u32 v[5:6], null, v2, s7, s[2:3]
	s_and_not1_b32 s12, s12, exec_lo
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b32 v1, v[5:6], off offset:-4
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v1, v0
	s_and_b32 s14, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s14
.LBB0_4:                                ; %Flow115
	s_or_b32 exec_lo, exec_lo, s13
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_saveexec_b32 s13, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s12, exec_lo, s13
	s_cbranch_execz .LBB0_12
; %bb.5:
	v_cmp_gt_i32_e64 s13, 1, v4
	s_mov_b32 s14, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr6_vgpr7
	v_cmpx_lt_i32_e32 0, v4
	s_cbranch_execz .LBB0_9
; %bb.6:
	v_mad_u64_u32 v[5:6], null, v2, s7, s[2:3]
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_mov_b32 s1, -1
	s_mov_b32 s0, exec_lo
	global_load_b32 v1, v[5:6], off offset:-4
                                        ; implicit-def: $vgpr6_vgpr7
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v1, v0
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_mad_u64_u32 v[5:6], null, v2, s4, v[4:5]
	s_xor_b32 s1, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, -1, v5
	v_mad_u64_u32 v[6:7], null, v3, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v6, v1
	v_mad_u64_u32 v[6:7], null, v5, s5, v[0:1]
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 3, v[6:7]
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v10, vcc_lo, s10, v10
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	s_clause 0x1
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[8:9], v[10:11]
.LBB0_8:                                ; %Flow111
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s13, exec_lo
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s13, s0, s1
.LBB0_9:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s14
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mad_u64_u32 v[5:6], null, v2, s4, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v5, s5, v[0:1]
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[6:7]
	v_add_co_u32 v3, vcc_lo, s10, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	global_load_b64 v[8:9], v[3:4], off
.LBB0_11:                               ; %Flow112
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s6, s6, exec_lo
.LBB0_12:                               ; %Flow116
	s_or_b32 exec_lo, exec_lo, s12
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_mul_lo_u32 v1, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v1, s5, v[0:1]
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[6:7]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[0:1], 1.0
.LBB0_14:                               ; %Flow117
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_15:                               ; %Flow119
	s_and_not1_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_17
; %bb.16:
	v_mad_u64_u32 v[5:6], null, v2, s4, v[4:5]
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v5, s5, v[0:1]
	v_ashrrev_i32_e32 v7, 31, v6
.LBB0_17:                               ; %.sink.split
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[6:7]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[8:9], off
.LBB0_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12compute_permPdS_Piiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12compute_permPdS_Piiiiii, .Lfunc_end0-_Z12compute_permPdS_Piiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 840
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12compute_permPdS_Piiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12compute_permPdS_Piiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
