#include "friction_update.cuh"

__global__ void friction_update
(
	SimulationParameters sim_params,
	SolverParameters     solver_params,
	real                 dt,
	AssembledSolution    d_assem_sol
)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;

	if (x < sim_params.cells + 2)
	{
		if (d_assem_sol.h_BC[x] > solver_params.tol_dry && abs(d_assem_sol.q_BC[x]) > solver_params.tol_dry)
		{
			real u = d_assem_sol.q_BC[x] / d_assem_sol.h_BC[x];

			real Cf = solver_params.g * pow(sim_params.manning, C(2.0)) / pow(d_assem_sol.h_BC[x], C(1.0) / C(3.0));

			real Sf = -Cf * abs(u) * u;

			real D = 1 + 2 * dt * Cf * abs(u) / d_assem_sol.h_BC[x];

			// Update
			d_assem_sol.q_BC[x] += dt * Sf / D;
		}
	}
}
	.file	"tmpxft_00327165_00000000-6_friction_update.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2290:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2290:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution
	.type	_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution, @function
_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution:
.LFB2312:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movsd	%xmm0, 8(%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, 96(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 104(%rsp)
	movabsq	$4294967297, %rax
	movq	%rdx, 112(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2312:
	.size	_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution, .-_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution
	.globl	_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution
	.type	_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution, @function
_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution:
.LFB2313:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	80(%rsp), %rdx
	leaq	56(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	_Z93__device_stub__Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolutionR20SimulationParametersR16SolverParametersdR17AssembledSolution
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2313:
	.size	_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution, .-_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2315:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15friction_update20SimulationParameters16SolverParametersd17AssembledSolution(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2315:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#pragma once

#include "hip/hip_runtime.h"


#include <algorithm>

#include "SimulationParameters.h"
#include "SolverParameters.h"
#include "AssembledSolution.h"

__global__ void friction_update
(
	SimulationParameters sim_params,
	SolverParameters     solver_params,
	real                 dt,
	AssembledSolution    d_assem_sol
);
	.text
	.file	"friction_update.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
