#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define DEBUG

#define float double

#define INDEX(fst, snd, n) ((fst) * (n) + (snd))
#define SIZE (5000)
#define TILL (100)
#define N_TILL (SIZE / TILL)
__global__ void multiple(float* matrix, float* vector, float* out) {
    /*
     * a thread get 100 element in a line (one line 50 thread)
     * thread is (50, 20)
     * 20 lines fill a block.
     * a matrix has 250 blocks
     */
    int x = threadIdx.x;
    int y = threadIdx.y;
    int blk = blockIdx.x;
    float sum = 0;
    for (int i = x * 100; i < (x + 1) * 100; ++i) {
        sum += matrix[INDEX(y + blk * 20, i, SIZE)] * vector[i];
    }
    atomicAdd(&out[y + blk * 20], (float)sum);
}

void validator(float* matrix, float* vector, float* out) {
    for (int i = 0; i < SIZE; ++i) {
        float sum = 0;
        for (int j = 0; j < SIZE; ++j) {
            sum += matrix[INDEX(i, j, SIZE)] * vector[j];
        }
        out[i] = sum;
    }
}


int main() {
    float* hA = (float*) malloc(sizeof(float) * SIZE * SIZE);
    float* dA;
    cudaMalloc((void**) &dA, sizeof(float) * SIZE * SIZE);
    float* hx = (float*) malloc(sizeof(float) * SIZE);
    float* dx;
    cudaMalloc((void**) &dx, sizeof(float) * SIZE * SIZE);
    float* out;
    cudaMalloc((void**) &out, sizeof(float) * SIZE);
    float* valout = (float*) malloc(sizeof(float)  * SIZE);

    // init hA and hx
    for (int i = 0; i < SIZE; ++i) {
        for (int j = 0; j < SIZE; ++j) {
            hA[INDEX(i, j, SIZE)] = i - 0.1 * j + 1;
        }
        hx[i] = 0.2 * i - 0.1 * sqrt(i);
    }

    // init out
    cudaMemset(out, 0, sizeof(float)* SIZE);
    memset(valout, 0, sizeof(float) * SIZE);

    // transfer to gpu
    cudaMemcpy(dA, hA, sizeof(float) * SIZE * SIZE, cudaMemcpyHostToDevice);
    cudaMemcpy(dx, hx, sizeof(float) * SIZE, cudaMemcpyHostToDevice);

    dim3 threads(50, 20);
    multiple<<<250, threads>>>(dA, dx, out);
    validator(hA, hx, valout);

    free(hA);
    free(hx);
    cudaFree(dA);
    cudaFree(dx);
    float* hout = (float*) malloc(sizeof(float) * SIZE);
    cudaMemcpy(hout, out, sizeof(float)* SIZE, cudaMemcpyDeviceToHost);
    for (int i = 0; i < 10; ++i) {
        printf("%f, (%f) \n", hout[i], valout[i]);
    }
    free(valout);
    free(hout);
    cudaFree(out);
}


	.file	"tmpxft_0023642c_00000000-6_matrix-vector.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9validatorPdS_S_
	.type	_Z9validatorPdS_S_, @function
_Z9validatorPdS_S_:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%ecx, %ecx
.L3:
	imulq	$40000, %rcx, %r8
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	addq	%rdi, %r8
.L4:
	movsd	(%r8,%rax), %xmm1
	mulsd	(%rsi,%rax), %xmm1
	addq	$8, %rax
	addsd	%xmm1, %xmm0
	cmpq	$40000, %rax
	jne	.L4
	movsd	%xmm0, (%rdx,%rcx,8)
	incq	%rcx
	cmpq	$5000, %rcx
	jne	.L3
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9validatorPdS_S_, .-_Z9validatorPdS_S_
	.globl	_Z31__device_stub__Z8multiplePdS_S_PdS_S_
	.type	_Z31__device_stub__Z8multiplePdS_S_PdS_S_, @function
_Z31__device_stub__Z8multiplePdS_S_PdS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8multiplePdS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z8multiplePdS_S_PdS_S_, .-_Z31__device_stub__Z8multiplePdS_S_PdS_S_
	.globl	_Z8multiplePdS_S_
	.type	_Z8multiplePdS_S_, @function
_Z8multiplePdS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8multiplePdS_S_PdS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z8multiplePdS_S_, .-_Z8multiplePdS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"%f, (%f) \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$200000000, %edi
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$200000000, %esi
	leaq	24(%rsp), %rdi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	movl	$40000, %edi
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movl	$200000000, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$40000, %esi
	call	cudaMalloc@PLT
	movl	$40000, %edi
	call	malloc@PLT
	movq	%rax, %rbx
.L14:
	cvtsi2sdl	%r13d, %xmm1
	movsd	.LC2(%rip), %xmm3
	xorl	%eax, %eax
	imulq	$40000, %r13, %rdx
	addq	%r12, %rdx
.L15:
	cvtsi2sdl	%eax, %xmm2
	mulsd	.LC1(%rip), %xmm2
	movaps	%xmm1, %xmm0
	subsd	%xmm2, %xmm0
	addsd	%xmm3, %xmm0
	movsd	%xmm0, (%rdx,%rax,8)
	incq	%rax
	cmpq	$5000, %rax
	jne	.L15
	movaps	%xmm1, %xmm0
	movsd	%xmm1, 8(%rsp)
	call	sqrt@PLT
	movsd	8(%rsp), %xmm1
	mulsd	.LC1(%rip), %xmm0
	mulsd	.LC3(%rip), %xmm1
	subsd	%xmm0, %xmm1
	movsd	%xmm1, 0(%rbp,%r13,8)
	incq	%r13
	cmpq	$5000, %r13
	jne	.L14
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movl	$40000, %edx
	call	cudaMemset@PLT
	xorl	%eax, %eax
	movl	$10000, %ecx
	movq	%rbx, %rdi
	rep stosl
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$200000000, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40000, %edx
	call	cudaMemcpy@PLT
	movl	$2147483773, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$85899345970, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z31__device_stub__Z8multiplePdS_S_PdS_S_
.L17:
	movq	%rbp, %rsi
	movq	%rbx, %rdx
	leaq	.LC4(%rip), %r13
	movq	%r12, %rdi
	call	_Z9validatorPdS_S_
	xorl	%r12d, %r12d
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	$40000, %edi
	call	malloc@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$40000, %edx
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	cudaMemcpy@PLT
.L18:
	movsd	(%rbx,%r12), %xmm1
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$2, %al
	movsd	0(%rbp,%r12), %xmm0
	addq	$8, %r12
	call	__printf_chk@PLT
	cmpq	$80, %r12
	jne	.L18
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8multiplePdS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8multiplePdS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC2:
	.long	0
	.long	1072693248
	.align 8
.LC3:
	.long	-1717986918
	.long	1070176665
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define DEBUG

#define float double

#define INDEX(fst, snd, n) ((fst) * (n) + (snd))
#define SIZE (5000)
#define TILL (100)
#define N_TILL (SIZE / TILL)
__global__ void multiple(float* matrix, float* vector, float* out) {
    /*
     * a thread get 100 element in a line (one line 50 thread)
     * thread is (50, 20)
     * 20 lines fill a block.
     * a matrix has 250 blocks
     */
    int x = threadIdx.x;
    int y = threadIdx.y;
    int blk = blockIdx.x;
    float sum = 0;
    for (int i = x * 100; i < (x + 1) * 100; ++i) {
        sum += matrix[INDEX(y + blk * 20, i, SIZE)] * vector[i];
    }
    atomicAdd(&out[y + blk * 20], (float)sum);
}

void validator(float* matrix, float* vector, float* out) {
    for (int i = 0; i < SIZE; ++i) {
        float sum = 0;
        for (int j = 0; j < SIZE; ++j) {
            sum += matrix[INDEX(i, j, SIZE)] * vector[j];
        }
        out[i] = sum;
    }
}


int main() {
    float* hA = (float*) malloc(sizeof(float) * SIZE * SIZE);
    float* dA;
    hipMalloc((void**) &dA, sizeof(float) * SIZE * SIZE);
    float* hx = (float*) malloc(sizeof(float) * SIZE);
    float* dx;
    hipMalloc((void**) &dx, sizeof(float) * SIZE * SIZE);
    float* out;
    hipMalloc((void**) &out, sizeof(float) * SIZE);
    float* valout = (float*) malloc(sizeof(float)  * SIZE);

    // init hA and hx
    for (int i = 0; i < SIZE; ++i) {
        for (int j = 0; j < SIZE; ++j) {
            hA[INDEX(i, j, SIZE)] = i - 0.1 * j + 1;
        }
        hx[i] = 0.2 * i - 0.1 * sqrt(i);
    }

    // init out
    hipMemset(out, 0, sizeof(float)* SIZE);
    memset(valout, 0, sizeof(float) * SIZE);

    // transfer to gpu
    hipMemcpy(dA, hA, sizeof(float) * SIZE * SIZE, hipMemcpyHostToDevice);
    hipMemcpy(dx, hx, sizeof(float) * SIZE, hipMemcpyHostToDevice);

    dim3 threads(50, 20);
    multiple<<<250, threads>>>(dA, dx, out);
    validator(hA, hx, valout);

    free(hA);
    free(hx);
    hipFree(dA);
    hipFree(dx);
    float* hout = (float*) malloc(sizeof(float) * SIZE);
    hipMemcpy(hout, out, sizeof(float)* SIZE, hipMemcpyDeviceToHost);
    for (int i = 0; i < 10; ++i) {
        printf("%f, (%f) \n", hout[i], valout[i]);
    }
    free(valout);
    free(hout);
    hipFree(out);
}


	.text
	.file	"matrix-vector.hip"
	.globl	_Z23__device_stub__multiplePdS_S_ # -- Begin function _Z23__device_stub__multiplePdS_S_
	.type	_Z23__device_stub__multiplePdS_S_,@function
_Z23__device_stub__multiplePdS_S_:      # @_Z23__device_stub__multiplePdS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8multiplePdS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__multiplePdS_S_, .Lfunc_end0-_Z23__device_stub__multiplePdS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9validatorPdS_S_              # -- Begin function _Z9validatorPdS_S_
	.type	_Z9validatorPdS_S_,@function
_Z9validatorPdS_S_:                     # @_Z9validatorPdS_S_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%rcx,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%rsi,%rcx,8), %xmm1
	addsd	%xmm1, %xmm0
	incq	%rcx
	cmpq	$5000, %rcx                     # imm = 0x1388
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movsd	%xmm0, (%rdx,%rax,8)
	incq	%rax
	addq	$40000, %rdi                    # imm = 0x9C40
	cmpq	$5000, %rax                     # imm = 0x1388
	jne	.LBB1_1
# %bb.4:
	retq
.Lfunc_end1:
	.size	_Z9validatorPdS_S_, .Lfunc_end1-_Z9validatorPdS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0xbfb999999999999a              # double -0.10000000000000001
.LCPI2_1:
	.quad	0x3ff0000000000000              # double 1
.LCPI2_2:
	.quad	0x3fc999999999999a              # double 0.20000000000000001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$200000000, %edi                # imm = 0xBEBC200
	callq	malloc
	movq	%rax, %r14
	leaq	16(%rsp), %rdi
	movl	$200000000, %esi                # imm = 0xBEBC200
	callq	hipMalloc
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %r15
	leaq	8(%rsp), %rdi
	movl	$200000000, %esi                # imm = 0xBEBC200
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$40000, %esi                    # imm = 0x9C40
	callq	hipMalloc
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %rbx
	xorl	%r12d, %r12d
	movsd	.LCPI2_0(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	.LCPI2_1(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	.LCPI2_2(%rip), %xmm4           # xmm4 = mem[0],zero
	xorpd	%xmm5, %xmm5
	movq	%r14, %r13
.LBB2_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	xorl	%eax, %eax
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	mulsd	%xmm2, %xmm1
	addsd	%xmm0, %xmm1
	addsd	%xmm3, %xmm1
	movsd	%xmm1, (%r13,%rax,8)
	incq	%rax
	cmpq	$5000, %rax                     # imm = 0x1388
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	movapd	%xmm0, %xmm1
	mulsd	%xmm4, %xmm1
	ucomisd	%xmm5, %xmm0
	jb	.LBB2_5
# %bb.4:                                #   in Loop: Header=BB2_1 Depth=1
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB2_6
.LBB2_5:                                # %call.sqrt
                                        #   in Loop: Header=BB2_1 Depth=1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	callq	sqrt
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	xorpd	%xmm5, %xmm5
	movsd	.LCPI2_2(%rip), %xmm4           # xmm4 = mem[0],zero
	movsd	.LCPI2_1(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	.LCPI2_0(%rip), %xmm2           # xmm2 = mem[0],zero
.LBB2_6:                                # %.split
                                        #   in Loop: Header=BB2_1 Depth=1
	mulsd	%xmm2, %xmm0
	addsd	%xmm0, %xmm1
	movsd	%xmm1, (%r15,%r12,8)
	incq	%r12
	addq	$40000, %r13                    # imm = 0x9C40
	cmpq	$5000, %r12                     # imm = 0x1388
	jne	.LBB2_1
# %bb.7:
	movq	(%rsp), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	xorl	%esi, %esi
	callq	hipMemset
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	16(%rsp), %rdi
	movl	$200000000, %edx                # imm = 0xBEBC200
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967546, %rdi               # imm = 0x1000000FA
	movabsq	$85899345970, %rdx              # imm = 0x1400000032
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.8:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z23__device_stub__multiplePdS_S_
.LBB2_9:                                # %.preheader.i.preheader
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB2_10:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_11 Depth 2
	xorpd	%xmm0, %xmm0
	xorl	%edx, %edx
.LBB2_11:                               #   Parent Loop BB2_10 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rcx,%rdx,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%r15,%rdx,8), %xmm1
	addsd	%xmm1, %xmm0
	incq	%rdx
	cmpq	$5000, %rdx                     # imm = 0x1388
	jne	.LBB2_11
# %bb.12:                               #   in Loop: Header=BB2_10 Depth=1
	movsd	%xmm0, (%rbx,%rax,8)
	incq	%rax
	addq	$40000, %rcx                    # imm = 0x9C40
	cmpq	$5000, %rax                     # imm = 0x1388
	jne	.LBB2_10
# %bb.13:                               # %_Z9validatorPdS_S_.exit
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$40000, %edi                    # imm = 0x9C40
	callq	malloc
	movq	%rax, %r14
	movq	(%rsp), %rsi
	movl	$40000, %edx                    # imm = 0x9C40
	movq	%rax, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r15d, %r15d
.LBB2_14:                               # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movsd	(%rbx,%r15,8), %xmm1            # xmm1 = mem[0],zero
	movl	$.L.str, %edi
	movb	$2, %al
	callq	printf
	incq	%r15
	cmpq	$10, %r15
	jne	.LBB2_14
# %bb.15:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8multiplePdS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8multiplePdS_S_,@object       # @_Z8multiplePdS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z8multiplePdS_S_
	.p2align	3, 0x0
_Z8multiplePdS_S_:
	.quad	_Z23__device_stub__multiplePdS_S_
	.size	_Z8multiplePdS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f, (%f) \n"
	.size	.L.str, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8multiplePdS_S_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__multiplePdS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8multiplePdS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8multiplePdS_S_       ; -- Begin function _Z8multiplePdS_S_
	.globl	_Z8multiplePdS_S_
	.p2align	8
	.type	_Z8multiplePdS_S_,@function
_Z8multiplePdS_S_:                      ; @_Z8multiplePdS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v1, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_mul_i32 s2, s15, 0x186a0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_u32_u24_e32 v1, 0x64, v1
	v_mov_b32_e32 v5, 0
	v_mul_u32_u24_e32 v2, 0x1388, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v6, 3, v1
	v_add3_u32 v3, v1, s2, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s2, s6, v6
	v_add_co_ci_u32_e64 v2, null, s7, 0, s2
	s_mov_b32 s2, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v6, s2, v3
	s_add_i32 s2, s2, 1
	s_cmpk_eq_i32 s2, 0x64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b64 v[8:9], v[1:2], off
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_u32 v1, vcc_lo, v1, 8
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[6:7], v[8:9], v[4:5]
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_mad_u64_u32 v[1:2], null, s15, 20, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0
	global_load_b64 v[2:3], v[6:7], off
.LBB0_3:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[2:3], v[4:5]
	global_atomic_cmpswap_b64 v[0:1], v[6:7], v[0:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %atomicrmw.end
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8multiplePdS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8multiplePdS_S_, .Lfunc_end0-_Z8multiplePdS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 312
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8multiplePdS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8multiplePdS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
