#include <iostream>
#include <time.h>

#define N 50000
#define BLK_SIZE 256

using namespace std;

struct Atom
{
	int x;
	int y;
	int z;
	int a, b, c, d, e, f;
};

__global__ void AtomKernel(Atom *atoms, int *sum);
__global__ void CoalescedKernel(int *x, int *y, int *z, int *sum);

int main()
{
	int i;
	
	//host
	Atom *atoms = (Atom*) malloc(N * sizeof(Atom));
	for (i = 0; i < N; i++)
	{
		atoms[i].x = 10;
		atoms[i].y = 10;
		atoms[i].z = 10;
	}
	int *x = (int*) malloc(N * sizeof(int));
	int *y = (int*) malloc(N * sizeof(int));
	int *z = (int*) malloc(N * sizeof(int));
	memset(x, 10, N * sizeof(int));
	memset(y, 10, N * sizeof(int));
	memset(z, 10, N * sizeof(int));
	
	//device
	Atom *atomsD;
	cudaMalloc(&atomsD, N * sizeof(Atom));
	cudaMemcpy(atomsD, atoms, N * sizeof(Atom), cudaMemcpyHostToDevice);
	int *xD;
	int *yD;
	int *zD;
	int *sumD;
	cudaMalloc(&xD, N * sizeof(int));
	cudaMalloc(&yD, N * sizeof(int));
	cudaMalloc(&zD, N * sizeof(int));
	cudaMalloc(&sumD, N * sizeof(int));
	cudaMemset(xD, 10, N * sizeof(int));
	cudaMemset(yD, 10, N * sizeof(int));
	cudaMemset(zD, 10, N * sizeof(int));
	
	for (i = 0; i < 10000; i++)
	{
		AtomKernel<<<N / BLK_SIZE + 1, BLK_SIZE>>>(atomsD, sumD);
		cudaDeviceSynchronize();
	}
	
	for (i = 0; i < 10000; i++)
	{
		CoalescedKernel<<<N / BLK_SIZE + 1, BLK_SIZE>>>(xD, yD, zD, sumD);
		cudaDeviceSynchronize();
	}
	
	return 0;
}

__global__ void AtomKernel(Atom *atoms, int *sum)
{
	int idx = blockIdx.x * blockDim.x + threadIdx.x;
	
	sum[idx] = 0;
	sum[idx] += atoms[idx].x * atoms[idx].x;
	sum[idx] += atoms[idx].y * atoms[idx].y;
	sum[idx] += atoms[idx].z * atoms[idx].z;
}

__global__ void CoalescedKernel(int *x, int *y, int *z, int *sum)
{
	int idx = blockIdx.x * blockDim.x + threadIdx.x;
	
	sum[idx] = 0;
	sum[idx] += x[idx] * x[idx];
	sum[idx] += y[idx] * y[idx];
	sum[idx] += z[idx] * z[idx];
}
	.file	"tmpxft_002f0a19_00000000-6_CoalescedMemTest.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi
	.type	_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi, @function
_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10AtomKernelP4AtomPi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi, .-_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi
	.globl	_Z10AtomKernelP4AtomPi
	.type	_Z10AtomKernelP4AtomPi, @function
_Z10AtomKernelP4AtomPi:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi
	.cfi_endproc
.LFE3661:
	.size	_Z10AtomKernelP4AtomPi, .-_Z10AtomKernelP4AtomPi
	.globl	_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_
	.type	_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_, @function
_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15CoalescedKernelPiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_, .-_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_
	.globl	_Z15CoalescedKernelPiS_S_S_
	.type	_Z15CoalescedKernelPiS_S_S_, @function
_Z15CoalescedKernelPiS_S_S_:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE3663:
	.size	_Z15CoalescedKernelPiS_S_S_, .-_Z15CoalescedKernelPiS_S_S_
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$1800000, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rax, %rbx
	movq	%rax, %rdx
	leaq	1800000(%rax), %rax
.L14:
	movl	$10, (%rdx)
	addq	$36, %rdx
	movl	$10, -32(%rdx)
	movl	$10, -28(%rdx)
	cmpq	%rdx, %rax
	jne	.L14
	leaq	8(%rsp), %rdi
	movl	$1800000, %esi
	movl	$16777217, %ebp
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1800000, %edx
	movl	$10000, %ebx
	salq	$8, %rbp
	call	cudaMemcpy@PLT
	leaq	16(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$200000, %edx
	movl	$10, %esi
	call	cudaMemset@PLT
	movq	24(%rsp), %rdi
	movl	$200000, %edx
	movl	$10, %esi
	call	cudaMemset@PLT
	movq	32(%rsp), %rdi
	movl	$200000, %edx
	movl	$10, %esi
	call	cudaMemset@PLT
.L16:
	movl	$1073741873, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbp, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z36__device_stub__Z10AtomKernelP4AtomPiP4AtomPi
.L15:
	call	cudaDeviceSynchronize@PLT
	decl	%ebx
	jne	.L16
	movl	$16777217, %ebp
	movl	$10000, %ebx
	salq	$8, %rbp
.L18:
	movl	$1073741873, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbp, 60(%rsp)
	movl	$1, 68(%rsp)
	movq	%rdi, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z15CoalescedKernelPiS_S_S_PiS_S_S_
.L17:
	call	cudaDeviceSynchronize@PLT
	decl	%ebx
	jne	.L18
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15CoalescedKernelPiS_S_S_"
.LC1:
	.string	"_Z10AtomKernelP4AtomPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15CoalescedKernelPiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10AtomKernelP4AtomPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <time.h>

#define N 50000
#define BLK_SIZE 256

using namespace std;

struct Atom
{
	int x;
	int y;
	int z;
	int a, b, c, d, e, f;
};

__global__ void AtomKernel(Atom *atoms, int *sum);
__global__ void CoalescedKernel(int *x, int *y, int *z, int *sum);

int main()
{
	int i;
	
	//host
	Atom *atoms = (Atom*) malloc(N * sizeof(Atom));
	for (i = 0; i < N; i++)
	{
		atoms[i].x = 10;
		atoms[i].y = 10;
		atoms[i].z = 10;
	}
	int *x = (int*) malloc(N * sizeof(int));
	int *y = (int*) malloc(N * sizeof(int));
	int *z = (int*) malloc(N * sizeof(int));
	memset(x, 10, N * sizeof(int));
	memset(y, 10, N * sizeof(int));
	memset(z, 10, N * sizeof(int));
	
	//device
	Atom *atomsD;
	hipMalloc(&atomsD, N * sizeof(Atom));
	hipMemcpy(atomsD, atoms, N * sizeof(Atom), hipMemcpyHostToDevice);
	int *xD;
	int *yD;
	int *zD;
	int *sumD;
	hipMalloc(&xD, N * sizeof(int));
	hipMalloc(&yD, N * sizeof(int));
	hipMalloc(&zD, N * sizeof(int));
	hipMalloc(&sumD, N * sizeof(int));
	hipMemset(xD, 10, N * sizeof(int));
	hipMemset(yD, 10, N * sizeof(int));
	hipMemset(zD, 10, N * sizeof(int));
	
	for (i = 0; i < 10000; i++)
	{
		AtomKernel<<<N / BLK_SIZE + 1, BLK_SIZE>>>(atomsD, sumD);
		hipDeviceSynchronize();
	}
	
	for (i = 0; i < 10000; i++)
	{
		CoalescedKernel<<<N / BLK_SIZE + 1, BLK_SIZE>>>(xD, yD, zD, sumD);
		hipDeviceSynchronize();
	}
	
	return 0;
}

__global__ void AtomKernel(Atom *atoms, int *sum)
{
	int idx = blockIdx.x * blockDim.x + threadIdx.x;
	
	sum[idx] = 0;
	sum[idx] += atoms[idx].x * atoms[idx].x;
	sum[idx] += atoms[idx].y * atoms[idx].y;
	sum[idx] += atoms[idx].z * atoms[idx].z;
}

__global__ void CoalescedKernel(int *x, int *y, int *z, int *sum)
{
	int idx = blockIdx.x * blockDim.x + threadIdx.x;
	
	sum[idx] = 0;
	sum[idx] += x[idx] * x[idx];
	sum[idx] += y[idx] * y[idx];
	sum[idx] += z[idx] * z[idx];
}
	.text
	.file	"CoalescedMemTest.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1800000, %edi                  # imm = 0x1B7740
	callq	malloc
	movq	%rax, %r14
	movl	$8, %eax
	movabsq	$42949672970, %rcx              # imm = 0xA0000000A
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rcx, -8(%r14,%rax)
	movl	$10, (%r14,%rax)
	addq	$36, %rax
	cmpq	$1800008, %rax                  # imm = 0x1B7748
	jne	.LBB0_1
# %bb.2:
	movabsq	$4294967492, %rbx               # imm = 0x1000000C4
	leaq	40(%rsp), %r15
	movl	$1800000, %esi                  # imm = 0x1B7740
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$1800000, %edx                  # imm = 0x1B7740
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %r15
	movl	$200000, %esi                   # imm = 0x30D40
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r12
	movl	$200000, %esi                   # imm = 0x30D40
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$200000, %esi                   # imm = 0x30D40
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$200000, %esi                   # imm = 0x30D40
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$200000, %edx                   # imm = 0x30D40
	movl	$10, %esi
	callq	hipMemset
	movq	(%r12), %rdi
	movl	$200000, %edx                   # imm = 0x30D40
	movl	$10, %esi
	callq	hipMemset
	movq	(%r14), %rdi
	movl	$200000, %edx                   # imm = 0x30D40
	movl	$10, %esi
	callq	hipMemset
	movl	$10000, %ebp                    # imm = 0x2710
	leaq	60(%rbx), %r14
.LBB0_3:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_5
# %bb.4:                                #   in Loop: Header=BB0_3 Depth=1
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z25__device_stub__AtomKernelP4AtomPi
.LBB0_5:                                #   in Loop: Header=BB0_3 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebp
	jne	.LBB0_3
# %bb.6:                                # %.preheader.preheader
	movl	$10000, %ebp                    # imm = 0x2710
.LBB0_7:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_9
# %bb.8:                                #   in Loop: Header=BB0_7 Depth=1
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z30__device_stub__CoalescedKernelPiS_S_S_
.LBB0_9:                                #   in Loop: Header=BB0_7 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebp
	jne	.LBB0_7
# %bb.10:
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__AtomKernelP4AtomPi # -- Begin function _Z25__device_stub__AtomKernelP4AtomPi
	.type	_Z25__device_stub__AtomKernelP4AtomPi,@function
_Z25__device_stub__AtomKernelP4AtomPi:  # @_Z25__device_stub__AtomKernelP4AtomPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10AtomKernelP4AtomPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__AtomKernelP4AtomPi, .Lfunc_end1-_Z25__device_stub__AtomKernelP4AtomPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__CoalescedKernelPiS_S_S_ # -- Begin function _Z30__device_stub__CoalescedKernelPiS_S_S_
	.type	_Z30__device_stub__CoalescedKernelPiS_S_S_,@function
_Z30__device_stub__CoalescedKernelPiS_S_S_: # @_Z30__device_stub__CoalescedKernelPiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15CoalescedKernelPiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__CoalescedKernelPiS_S_S_, .Lfunc_end2-_Z30__device_stub__CoalescedKernelPiS_S_S_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10AtomKernelP4AtomPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15CoalescedKernelPiS_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10AtomKernelP4AtomPi,@object  # @_Z10AtomKernelP4AtomPi
	.section	.rodata,"a",@progbits
	.globl	_Z10AtomKernelP4AtomPi
	.p2align	3, 0x0
_Z10AtomKernelP4AtomPi:
	.quad	_Z25__device_stub__AtomKernelP4AtomPi
	.size	_Z10AtomKernelP4AtomPi, 8

	.type	_Z15CoalescedKernelPiS_S_S_,@object # @_Z15CoalescedKernelPiS_S_S_
	.globl	_Z15CoalescedKernelPiS_S_S_
	.p2align	3, 0x0
_Z15CoalescedKernelPiS_S_S_:
	.quad	_Z30__device_stub__CoalescedKernelPiS_S_S_
	.size	_Z15CoalescedKernelPiS_S_S_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10AtomKernelP4AtomPi"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15CoalescedKernelPiS_S_S_"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__AtomKernelP4AtomPi
	.addrsig_sym _Z30__device_stub__CoalescedKernelPiS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10AtomKernelP4AtomPi
	.addrsig_sym _Z15CoalescedKernelPiS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10AtomKernelP4AtomPi  ; -- Begin function _Z10AtomKernelP4AtomPi
	.globl	_Z10AtomKernelP4AtomPi
	.p2align	8
	.type	_Z10AtomKernelP4AtomPi,@function
_Z10AtomKernelP4AtomPi:                 ; @_Z10AtomKernelP4AtomPi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_mad_i64_i32 v[4:5], null, v1, 36, s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
	v_mov_b32_e32 v2, 0
	global_store_b32 v[0:1], v2, off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v2, v2
	global_store_b32 v[0:1], v2, off
	global_load_b32 v3, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v3, v3, v[2:3]
	global_store_b32 v[0:1], v6, off
	global_load_b32 v4, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v4, v4, v[6:7]
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10AtomKernelP4AtomPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10AtomKernelP4AtomPi, .Lfunc_end0-_Z10AtomKernelP4AtomPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 192
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15CoalescedKernelPiS_S_S_ ; -- Begin function _Z15CoalescedKernelPiS_S_S_
	.globl	_Z15CoalescedKernelPiS_S_S_
	.p2align	8
	.type	_Z15CoalescedKernelPiS_S_S_,@function
_Z15CoalescedKernelPiS_S_S_:            ; @_Z15CoalescedKernelPiS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	v_mov_b32_e32 v6, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[2:3], v6, off
	global_load_b32 v4, v[4:5], off
	v_add_co_u32 v5, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v4, v4, v4
	global_store_b32 v[2:3], v4, off
	global_load_b32 v7, v[5:6], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[5:6], null, v7, v7, v[4:5]
	global_store_b32 v[2:3], v5, off
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v4, v4, v[5:6]
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15CoalescedKernelPiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15CoalescedKernelPiS_S_S_, .Lfunc_end1-_Z15CoalescedKernelPiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10AtomKernelP4AtomPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10AtomKernelP4AtomPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15CoalescedKernelPiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15CoalescedKernelPiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
