#include "cuda.h"
#include "math.h"
#include "stdio.h"
#include "stdlib.h"

#include "thrust/reduce.h"

#define BLOCK_SIZE 512
#define ELEMS_PER_THREAD 32

template <unsigned int blockSize>
__device__ void warpReduce(volatile double* s_data, unsigned int t) {
  if (blockSize >= 64) s_data[t] += s_data[t + 32];
  if (blockSize >= 32) s_data[t] += s_data[t + 16];
  if (blockSize >= 16) s_data[t] += s_data[t + 8];
  if (blockSize >= 8) s_data[t] += s_data[t + 4];
  if (blockSize >= 4) s_data[t] += s_data[t + 2];
  if (blockSize >= 2) s_data[t] += s_data[t + 1];
}

template <unsigned int blockSize>
__global__ void reductionKernel(double* d_in, double* d_out, unsigned int N) {
  extern __shared__ double s_data[];

  // Indexing
  unsigned int t = threadIdx.x;
  unsigned int i = blockIdx.x * (blockSize * 2) + threadIdx.x;
  unsigned int gridSize = blockSize * 2 * gridDim.x;

  // Load some elements into shared memory
  s_data[t] = 0.f;
  while (i + blockSize < N) {
    s_data[t] += d_in[i] + d_in[i + blockSize];
    i += gridSize;
  }
  if (i < N) s_data[t] += d_in[i];
  __syncthreads();

  // Unroll the loop
  if (blockSize >= 512) {
    if (t < 256) s_data[t] += s_data[t + 256];
    __syncthreads();
  }
  if (blockSize >= 256) {
    if (t < 128) s_data[t] += s_data[t + 128];
    __syncthreads();
  }
  if (blockSize >= 128) {
    if (t < 64) s_data[t] += s_data[t + 64];
    __syncthreads();
  }

  if (t < 32) warpReduce<blockSize>(s_data, t);

  // Write the result for each block into d_out
  if (t == 0) d_out[blockIdx.x] = s_data[0];
}

void reductionDevice(double* h_in, double* h_out, double** d_arr,
                     unsigned int N, int tree_depth, unsigned int* lengths,
                     dim3* dimBlock, dim3* dimGrid, unsigned int& shared_size,
                     float& dur_ex, float& dur_in) {
  // Setup timing
  cudaEvent_t start_ex, end_ex, start_in, end_in;
  cudaEventCreate(&start_ex);
  cudaEventCreate(&end_ex);
  cudaEventCreate(&start_in);
  cudaEventCreate(&end_in);

  // Copy host array to device
  cudaEventRecord(start_in, 0);
  cudaMemcpy(d_arr[0], h_in, N * sizeof(double), cudaMemcpyHostToDevice);

  // Perform reduction on device
  cudaEventRecord(start_ex, 0);
  for (int i = 0; i < tree_depth; i++)
    reductionKernel<BLOCK_SIZE> <<<dimGrid[i], dimBlock[i], shared_size>>>
        (d_arr[i], d_arr[i + 1], lengths[i]);
  cudaEventRecord(end_ex, 0);
  cudaEventSynchronize(end_ex);

  // Copy device array back to host
  cudaMemcpy(h_out, d_arr[tree_depth], sizeof(double), cudaMemcpyDeviceToHost);
  cudaEventRecord(end_in, 0);
  cudaEventSynchronize(end_in);

  // Calculate durations
  cudaEventElapsedTime(&dur_ex, start_ex, end_ex);
  cudaEventElapsedTime(&dur_in, start_in, end_in);
}

void reductionThrust(double* h_in, double* h_out, unsigned int N,
                     float& dur_thrust) {
  // Setup timing
  cudaEvent_t start_thrust, end_thrust;
  cudaEventCreate(&start_thrust);
  cudaEventCreate(&end_thrust);

  // Perform reduction on the device using thrust
  cudaEventRecord(start_thrust, 0);
  *h_out = thrust::reduce(h_in, h_in + N);
  cudaEventRecord(end_thrust, 0);
  cudaEventSynchronize(end_thrust);

  // Calculate duration
  cudaEventElapsedTime(&dur_thrust, start_thrust, end_thrust);
}

void reductionHost(double* h_in, double* h_out, unsigned int N,
                   float& dur_cpu) {
  // Setup timing
  cudaEvent_t start_cpu, end_cpu;
  cudaEventCreate(&start_cpu);
  cudaEventCreate(&end_cpu);

  // Perform reduction on host
  cudaEventRecord(start_cpu, 0);
  double result = 0.f;
  for (unsigned int i = 0; i < N; i++) result += h_in[i];
  *h_out = result;
  cudaEventRecord(end_cpu, 0);
  cudaEventSynchronize(end_cpu);

  // Calculate duration
  cudaEventElapsedTime(&dur_cpu, start_cpu, end_cpu);
}

bool checkResults(double* h_out, double* h_ref, double eps) {
  double delta = abs(*h_out - *h_ref);
  if (delta > eps) return false;
  return true;
}

double* allocateHostArray(unsigned int size) {
  double* h_array;
  cudaError_t code = cudaMallocHost(&h_array, size);
  if (code != cudaSuccess) {
    printf("Memory allocation on the host was unsuccessful.\n");
    exit(EXIT_FAILURE);
  }
  return h_array;
}

double* allocateDeviceArray(unsigned int size) {
  double* d_arr;
  cudaError_t code = cudaMalloc(&d_arr, size);
  if (code != cudaSuccess) {
    printf("Memory allocation on the device was unsuccessful.\n");
    exit(EXIT_FAILURE);
  }
  return d_arr;
}

void exitUsage() {
  printf("Usage: ./p2 [[M N] [dur_max]]\n");
  exit(EXIT_SUCCESS);
}

void parseInput(int argc, char** argv, unsigned int& N, unsigned int& M,
                float& dur_max) {
  if (argc == 1) {
    N = 50000000;
    M = 5;
    dur_max = 1000.f;
    return;
  }
  if (argc != 3 && argc != 4) exitUsage();
  if (sscanf(argv[1], "%u", &N) != 1) exitUsage();
  if (sscanf(argv[2], "%u", &M) != 1) exitUsage();
  if (argc == 3) {
    dur_max = 1000.f;
    return;
  }
  if (sscanf(argv[3], "%f", &dur_max) != 1) exitUsage();
  dur_max *= 1000;
}

int main(int argc, char** argv) {
  // Parse command line arguments
  unsigned int N, M;
  float dur_max;
  parseInput(argc, argv, N, M, dur_max);

  // Allocate host arrays
  double* h_in = allocateHostArray(N * sizeof(double));
  double* h_device = allocateHostArray(sizeof(double));
  double* h_thrust = allocateHostArray(sizeof(double));
  double* h_cpu = allocateHostArray(sizeof(double));

  // Setup host array and fill with random numbers
  srand(73);
  for (unsigned int i = 0; i < N; i++)
    h_in[i] = ((double)rand() / RAND_MAX - 0.5f) * 2 * M;

  // Calculate the tree depth
  int tree_depth = 0;
  {
    unsigned int length = N;
    while (length > 1) {
      length = (length + (BLOCK_SIZE * ELEMS_PER_THREAD) - 1) /
               (BLOCK_SIZE * ELEMS_PER_THREAD);
      tree_depth++;
    }
  }

  // Calculate the lengths of the device arrays
  unsigned int lengths[tree_depth + 1];
  lengths[0] = N;
  for (int i = 1; i < tree_depth + 1; i++)
    lengths[i] = (lengths[i - 1] + (BLOCK_SIZE * ELEMS_PER_THREAD) - 1) /
                 (BLOCK_SIZE * ELEMS_PER_THREAD);

  // Setup grid
  dim3 dimBlock[tree_depth];
  dim3 dimGrid[tree_depth];
  for (int i = 0; i < tree_depth; i++) {
    dimBlock[i].x = BLOCK_SIZE;
    dimGrid[i].x = lengths[i + 1];
  }

  // Shared memory size
  unsigned int shared_size = BLOCK_SIZE * sizeof(double);

  // Allocate device arrays
  double* d_arr[tree_depth + 1];
  for (int i = 0; i < tree_depth + 1; i++)
    d_arr[i] = allocateDeviceArray(lengths[i] * sizeof(double));

  // Setup timing
  int nruns_device = 0;
  int nruns_thrust = 0;
  int nruns_cpu = 0;
  float dur_ex, dur_in, dur_thrust, dur_cpu;
  float dur_ex_total = 0.f;
  float dur_in_total = 0.f;
  float dur_thrust_total = 0.f;
  float dur_cpu_total = 0.f;
  float dur_ex_min = 1e99;
  float dur_in_min = 1e99;
  float dur_thrust_min = 1e99;
  float dur_cpu_min = 1e99;

  // Vector reduction on the device
  while (dur_in_total < dur_max) {
    nruns_device++;
    reductionDevice(h_in, h_device, d_arr, N, tree_depth, lengths, dimBlock,
                    dimGrid, shared_size, dur_ex, dur_in);
    dur_ex_total += dur_ex;
    dur_in_total += dur_in;
    if (dur_ex < dur_ex_min) dur_ex_min = dur_ex;
    if (dur_in < dur_in_min) dur_in_min = dur_in;
    if (dur_in_total <= 0.f) break;
  }

  // Vector reduction on the device with thrust
  while (dur_thrust_total < dur_max) {
    nruns_thrust++;
    reductionThrust(h_in, h_thrust, N, dur_thrust);
    dur_thrust_total += dur_thrust;
    if (dur_thrust < dur_thrust_min) dur_thrust_min = dur_thrust;
    if (dur_thrust_total <= 0.f) break;
  }

  // Vector reduction on CPU
  while (dur_cpu_total < dur_max) {
    nruns_cpu++;
    reductionHost(h_in, h_cpu, N, dur_cpu);
    dur_cpu_total += dur_cpu;
    if (dur_cpu < dur_cpu_min) dur_cpu_min = dur_cpu;
    if (dur_cpu_total <= 0.f) break;
  }

  // Compare device and host results
  double eps = (double)M * 0.001f;
  bool passed_device = checkResults(h_device, h_cpu, eps);
  bool passed_thrust = checkResults(h_thrust, h_cpu, eps);
  if (passed_device)
    printf("Test PASSED (device)\n");
  else
    printf("Test FAILED (device)\n");
  if (passed_thrust)
    printf("Test PASSED (thrust)\n");
  else
    printf("Test FAILED (thrust)\n");

  // Print stuff
  printf("N: %u\n", N);
  printf("M: %u\n", M);
  printf("Elements per thread: %d\n", ELEMS_PER_THREAD);
  printf("Tree depth: %d\n", tree_depth);
  printf("Block sizes: %dx%d", dimBlock[0].y, dimBlock[0].x);
  for (int i = 1; i < tree_depth; i++)
    printf(", %dx%d", dimBlock[i].y, dimBlock[i].x);
  printf("\n");
  printf("Grid sizes: %dx%d", dimGrid[0].y, dimGrid[0].x);
  for (int i = 1; i < tree_depth; i++)
    printf(", %dx%d", dimGrid[i].y, dimGrid[i].x);
  printf("\n");
  printf("GPU array lengths: %d", lengths[0]);
  for (int i = 1; i < tree_depth + 1; i++) printf(", %d", lengths[i]);
  printf("\n");
  printf("Result (Device): %24.14f\n", *h_device);
  printf("Result (Thrust): %24.14f\n", *h_thrust);
  printf("Result (CPU):    %24.14f\n", *h_cpu);
  printf("Timing results  %12s  %12s  %8s\n", "Average", "Minimum", "Num_runs");
  printf("Device ex:      %12.6f  %12.6f  %8d\n", dur_ex, dur_ex_min,
         nruns_device);
  printf("Device in:      %12.6f  %12.6f  %8d\n", dur_in, dur_in_min,
         nruns_device);
  printf("Thrust:         %12.6f  %12.6f  %8d\n", dur_thrust, dur_thrust_min,
         nruns_thrust);
  printf("CPU:            %12.6f  %12.6f  %8d\n", dur_cpu, dur_cpu_min,
         nruns_cpu);
  printf("\n");

  // Free arrays
  cudaFree(h_in);
  cudaFree(h_device);
  cudaFree(h_thrust);
  cudaFree(h_cpu);
  for (int i = 0; i < tree_depth + 1; i++) cudaFree(d_arr[i]);

  return 0;
}

	.file	"tmpxft_00269d7f_00000000-6_p1.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.weak	nvtxEtiGetModuleFunctionTable_v3
	.hidden	nvtxEtiGetModuleFunctionTable_v3
	.type	nvtxEtiGetModuleFunctionTable_v3, @function
nvtxEtiGetModuleFunctionTable_v3:
.LFB6198:
	.cfi_startproc
	endbr64
	decl	%edi
	xorl	%eax, %eax
	cmpl	$5, %edi
	ja	.L1
	leaq	.L4(%rip), %rcx
	movslq	(%rcx,%rdi,4), %rax
	addq	%rcx, %rax
	notrack jmp	*%rax
	.section	.rodata.nvtxEtiGetModuleFunctionTable_v3,"aG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
	.align 4
	.align 4
.L4:
	.long	.L9-.L4
	.long	.L14-.L4
	.long	.L7-.L4
	.long	.L6-.L4
	.long	.L5-.L4
	.long	.L3-.L4
	.section	.text.nvtxEtiGetModuleFunctionTable_v3,"axG",@progbits,nvtxEtiGetModuleFunctionTable_v3,comdat
.L9:
	leaq	560+nvtxGlobals_v3(%rip), %rcx
	jmp	.L18
.L7:
	leaq	776+nvtxGlobals_v3(%rip), %rcx
	movl	$128, %eax
	jmp	.L8
.L6:
	leaq	904+nvtxGlobals_v3(%rip), %rcx
	jmp	.L19
.L5:
	leaq	968+nvtxGlobals_v3(%rip), %rcx
.L18:
	movl	$136, %eax
	jmp	.L8
.L3:
	leaq	1104+nvtxGlobals_v3(%rip), %rcx
.L19:
	movl	$64, %eax
	jmp	.L8
.L14:
	leaq	696+nvtxGlobals_v3(%rip), %rcx
	movl	$80, %eax
.L8:
	testq	%rdx, %rdx
	je	.L10
	shrl	$3, %eax
	decl	%eax
	movl	%eax, (%rdx)
.L10:
	testq	%rsi, %rsi
	jne	.L11
.L12:
	movl	$1, %eax
	ret
.L11:
	movq	%rcx, (%rsi)
	jmp	.L12
.L1:
	ret
	.cfi_endproc
.LFE6198:
	.size	nvtxEtiGetModuleFunctionTable_v3, .-nvtxEtiGetModuleFunctionTable_v3
	.section	.text.nvtxGetExportTable_v3,"axG",@progbits,nvtxGetExportTable_v3,comdat
	.weak	nvtxGetExportTable_v3
	.hidden	nvtxGetExportTable_v3
	.type	nvtxGetExportTable_v3, @function
nvtxGetExportTable_v3:
.LFB6199:
	.cfi_startproc
	endbr64
	leaq	8+nvtxGlobals_v3(%rip), %rax
	cmpl	$1, %edi
	je	.L21
	cmpl	$3, %edi
	leaq	16(%rax), %rax
	movl	$0, %edx
	cmovne	%rdx, %rax
.L21:
	ret
	.cfi_endproc
.LFE6199:
	.size	nvtxGetExportTable_v3, .-nvtxGetExportTable_v3
	.section	.text.nvtxEtiSetInjectionNvtxVersion_v3,"axG",@progbits,nvtxEtiSetInjectionNvtxVersion_v3,comdat
	.weak	nvtxEtiSetInjectionNvtxVersion_v3
	.hidden	nvtxEtiSetInjectionNvtxVersion_v3
	.type	nvtxEtiSetInjectionNvtxVersion_v3, @function
nvtxEtiSetInjectionNvtxVersion_v3:
.LFB6200:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE6200:
	.size	nvtxEtiSetInjectionNvtxVersion_v3, .-nvtxEtiSetInjectionNvtxVersion_v3
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10703:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10703:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL48__device_stub__Z15reductionKernelILj512EEvPdS0_jPdS_j, @function
_ZL48__device_stub__Z15reductionKernelILj512EEvPdS0_jPdS_j:
.LFB10725:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15reductionKernelILj512EEvPdS0_j(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L28:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10725:
	.size	_ZL48__device_stub__Z15reductionKernelILj512EEvPdS0_jPdS_j, .-_ZL48__device_stub__Z15reductionKernelILj512EEvPdS0_jPdS_j
	.section	.text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,"axG",@progbits,_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv,comdat
	.weak	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.hidden	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.type	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, @function
_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv:
.LFB11118:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L32:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE11118:
	.size	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv, .-_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv
	.section	.text._Z15reductionKernelILj512EEvPdS0_j,"axG",@progbits,_Z15reductionKernelILj512EEvPdS0_j,comdat
	.weak	_Z15reductionKernelILj512EEvPdS0_j
	.type	_Z15reductionKernelILj512EEvPdS0_j, @function
_Z15reductionKernelILj512EEvPdS0_j:
.LFB11155:
	.cfi_startproc
	endbr64
	jmp	_ZL48__device_stub__Z15reductionKernelILj512EEvPdS0_jPdS_j
	.cfi_endproc
.LFE11155:
	.size	_Z15reductionKernelILj512EEvPdS0_j, .-_Z15reductionKernelILj512EEvPdS0_j
	.section	.text.nvtxSetInitFunctionsToNoops_v3,"axG",@progbits,nvtxSetInitFunctionsToNoops_v3,comdat
	.weak	nvtxSetInitFunctionsToNoops_v3
	.hidden	nvtxSetInitFunctionsToNoops_v3
	.type	nvtxSetInitFunctionsToNoops_v3, @function
nvtxSetInitFunctionsToNoops_v3:
.LFB6265:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	leaq	nvtxMarkEx_impl_init_v3(%rip), %rdx
	setne	%al
	cmpq	%rdx, 48+nvtxGlobals_v3(%rip)
	je	.L166
	testb	%al, %al
	je	.L38
.L166:
	xorl	%r10d, %r10d
	movq	%r10, 48+nvtxGlobals_v3(%rip)
.L38:
	leaq	nvtxMarkA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 56+nvtxGlobals_v3(%rip)
	je	.L167
	testb	%al, %al
	je	.L40
.L167:
	xorl	%r9d, %r9d
	movq	%r9, 56+nvtxGlobals_v3(%rip)
.L40:
	leaq	nvtxMarkW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 64+nvtxGlobals_v3(%rip)
	je	.L168
	testb	%al, %al
	je	.L42
.L168:
	xorl	%r8d, %r8d
	movq	%r8, 64+nvtxGlobals_v3(%rip)
.L42:
	leaq	nvtxRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 72+nvtxGlobals_v3(%rip)
	je	.L169
	testb	%al, %al
	je	.L44
.L169:
	xorl	%edi, %edi
	movq	%rdi, 72+nvtxGlobals_v3(%rip)
.L44:
	leaq	nvtxRangeStartA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 80+nvtxGlobals_v3(%rip)
	je	.L170
	testb	%al, %al
	je	.L46
.L170:
	xorl	%esi, %esi
	movq	%rsi, 80+nvtxGlobals_v3(%rip)
.L46:
	leaq	nvtxRangeStartW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 88+nvtxGlobals_v3(%rip)
	je	.L171
	testb	%al, %al
	je	.L48
.L171:
	xorl	%ecx, %ecx
	movq	%rcx, 88+nvtxGlobals_v3(%rip)
.L48:
	leaq	nvtxRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 96+nvtxGlobals_v3(%rip)
	je	.L172
	testb	%al, %al
	je	.L50
.L172:
	xorl	%edx, %edx
	movq	%rdx, 96+nvtxGlobals_v3(%rip)
.L50:
	leaq	nvtxRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 104+nvtxGlobals_v3(%rip)
	je	.L173
	testb	%al, %al
	je	.L52
.L173:
	xorl	%r11d, %r11d
	movq	%r11, 104+nvtxGlobals_v3(%rip)
.L52:
	leaq	nvtxRangePushA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 112+nvtxGlobals_v3(%rip)
	je	.L174
	testb	%al, %al
	je	.L54
.L174:
	xorl	%r10d, %r10d
	movq	%r10, 112+nvtxGlobals_v3(%rip)
.L54:
	leaq	nvtxRangePushW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 120+nvtxGlobals_v3(%rip)
	je	.L175
	testb	%al, %al
	je	.L56
.L175:
	xorl	%r9d, %r9d
	movq	%r9, 120+nvtxGlobals_v3(%rip)
.L56:
	leaq	nvtxRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 128+nvtxGlobals_v3(%rip)
	je	.L176
	testb	%al, %al
	je	.L58
.L176:
	xorl	%r8d, %r8d
	movq	%r8, 128+nvtxGlobals_v3(%rip)
.L58:
	leaq	nvtxNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 136+nvtxGlobals_v3(%rip)
	je	.L177
	testb	%al, %al
	je	.L60
.L177:
	xorl	%edi, %edi
	movq	%rdi, 136+nvtxGlobals_v3(%rip)
.L60:
	leaq	nvtxNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 144+nvtxGlobals_v3(%rip)
	je	.L178
	testb	%al, %al
	je	.L62
.L178:
	xorl	%esi, %esi
	movq	%rsi, 144+nvtxGlobals_v3(%rip)
.L62:
	leaq	nvtxNameOsThreadA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 152+nvtxGlobals_v3(%rip)
	je	.L179
	testb	%al, %al
	je	.L64
.L179:
	xorl	%ecx, %ecx
	movq	%rcx, 152+nvtxGlobals_v3(%rip)
.L64:
	leaq	nvtxNameOsThreadW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 160+nvtxGlobals_v3(%rip)
	je	.L180
	testb	%al, %al
	je	.L66
.L180:
	xorl	%edx, %edx
	movq	%rdx, 160+nvtxGlobals_v3(%rip)
.L66:
	leaq	nvtxNameCuDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 168+nvtxGlobals_v3(%rip)
	je	.L181
	testb	%al, %al
	je	.L68
.L181:
	xorl	%r11d, %r11d
	movq	%r11, 168+nvtxGlobals_v3(%rip)
.L68:
	leaq	nvtxNameCuDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 176+nvtxGlobals_v3(%rip)
	je	.L182
	testb	%al, %al
	je	.L70
.L182:
	xorl	%r10d, %r10d
	movq	%r10, 176+nvtxGlobals_v3(%rip)
.L70:
	leaq	nvtxNameCuContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 184+nvtxGlobals_v3(%rip)
	je	.L183
	testb	%al, %al
	je	.L72
.L183:
	xorl	%r9d, %r9d
	movq	%r9, 184+nvtxGlobals_v3(%rip)
.L72:
	leaq	nvtxNameCuContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 192+nvtxGlobals_v3(%rip)
	je	.L184
	testb	%al, %al
	je	.L74
.L184:
	xorl	%r8d, %r8d
	movq	%r8, 192+nvtxGlobals_v3(%rip)
.L74:
	leaq	nvtxNameCuStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 200+nvtxGlobals_v3(%rip)
	je	.L185
	testb	%al, %al
	je	.L76
.L185:
	xorl	%edi, %edi
	movq	%rdi, 200+nvtxGlobals_v3(%rip)
.L76:
	leaq	nvtxNameCuStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 208+nvtxGlobals_v3(%rip)
	je	.L186
	testb	%al, %al
	je	.L78
.L186:
	xorl	%esi, %esi
	movq	%rsi, 208+nvtxGlobals_v3(%rip)
.L78:
	leaq	nvtxNameCuEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 216+nvtxGlobals_v3(%rip)
	je	.L187
	testb	%al, %al
	je	.L80
.L187:
	xorl	%ecx, %ecx
	movq	%rcx, 216+nvtxGlobals_v3(%rip)
.L80:
	leaq	nvtxNameCuEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 224+nvtxGlobals_v3(%rip)
	je	.L188
	testb	%al, %al
	je	.L82
.L188:
	xorl	%edx, %edx
	movq	%rdx, 224+nvtxGlobals_v3(%rip)
.L82:
	leaq	nvtxNameClDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 232+nvtxGlobals_v3(%rip)
	je	.L189
	testb	%al, %al
	je	.L84
.L189:
	xorl	%r11d, %r11d
	movq	%r11, 232+nvtxGlobals_v3(%rip)
.L84:
	leaq	nvtxNameClDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 240+nvtxGlobals_v3(%rip)
	je	.L190
	testb	%al, %al
	je	.L86
.L190:
	xorl	%r10d, %r10d
	movq	%r10, 240+nvtxGlobals_v3(%rip)
.L86:
	leaq	nvtxNameClContextA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 248+nvtxGlobals_v3(%rip)
	je	.L191
	testb	%al, %al
	je	.L88
.L191:
	xorl	%r9d, %r9d
	movq	%r9, 248+nvtxGlobals_v3(%rip)
.L88:
	leaq	nvtxNameClContextW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 256+nvtxGlobals_v3(%rip)
	je	.L192
	testb	%al, %al
	je	.L90
.L192:
	xorl	%r8d, %r8d
	movq	%r8, 256+nvtxGlobals_v3(%rip)
.L90:
	leaq	nvtxNameClCommandQueueA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 264+nvtxGlobals_v3(%rip)
	je	.L193
	testb	%al, %al
	je	.L92
.L193:
	xorl	%edi, %edi
	movq	%rdi, 264+nvtxGlobals_v3(%rip)
.L92:
	leaq	nvtxNameClCommandQueueW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 272+nvtxGlobals_v3(%rip)
	je	.L194
	testb	%al, %al
	je	.L94
.L194:
	xorl	%esi, %esi
	movq	%rsi, 272+nvtxGlobals_v3(%rip)
.L94:
	leaq	nvtxNameClMemObjectA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 280+nvtxGlobals_v3(%rip)
	je	.L195
	testb	%al, %al
	je	.L96
.L195:
	xorl	%ecx, %ecx
	movq	%rcx, 280+nvtxGlobals_v3(%rip)
.L96:
	leaq	nvtxNameClMemObjectW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 288+nvtxGlobals_v3(%rip)
	je	.L196
	testb	%al, %al
	je	.L98
.L196:
	xorl	%edx, %edx
	movq	%rdx, 288+nvtxGlobals_v3(%rip)
.L98:
	leaq	nvtxNameClSamplerA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 296+nvtxGlobals_v3(%rip)
	je	.L197
	testb	%al, %al
	je	.L100
.L197:
	xorl	%r11d, %r11d
	movq	%r11, 296+nvtxGlobals_v3(%rip)
.L100:
	leaq	nvtxNameClSamplerW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 304+nvtxGlobals_v3(%rip)
	je	.L198
	testb	%al, %al
	je	.L102
.L198:
	xorl	%r10d, %r10d
	movq	%r10, 304+nvtxGlobals_v3(%rip)
.L102:
	leaq	nvtxNameClProgramA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 312+nvtxGlobals_v3(%rip)
	je	.L199
	testb	%al, %al
	je	.L104
.L199:
	xorl	%r9d, %r9d
	movq	%r9, 312+nvtxGlobals_v3(%rip)
.L104:
	leaq	nvtxNameClProgramW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 320+nvtxGlobals_v3(%rip)
	je	.L200
	testb	%al, %al
	je	.L106
.L200:
	xorl	%r8d, %r8d
	movq	%r8, 320+nvtxGlobals_v3(%rip)
.L106:
	leaq	nvtxNameClEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 328+nvtxGlobals_v3(%rip)
	je	.L201
	testb	%al, %al
	je	.L108
.L201:
	xorl	%edi, %edi
	movq	%rdi, 328+nvtxGlobals_v3(%rip)
.L108:
	leaq	nvtxNameClEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 336+nvtxGlobals_v3(%rip)
	je	.L202
	testb	%al, %al
	je	.L110
.L202:
	xorl	%esi, %esi
	movq	%rsi, 336+nvtxGlobals_v3(%rip)
.L110:
	leaq	nvtxNameCudaDeviceA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 344+nvtxGlobals_v3(%rip)
	je	.L203
	testb	%al, %al
	je	.L112
.L203:
	xorl	%ecx, %ecx
	movq	%rcx, 344+nvtxGlobals_v3(%rip)
.L112:
	leaq	nvtxNameCudaDeviceW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 352+nvtxGlobals_v3(%rip)
	je	.L204
	testb	%al, %al
	je	.L114
.L204:
	xorl	%edx, %edx
	movq	%rdx, 352+nvtxGlobals_v3(%rip)
.L114:
	leaq	nvtxNameCudaStreamA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 360+nvtxGlobals_v3(%rip)
	je	.L205
	testb	%al, %al
	je	.L116
.L205:
	xorl	%r11d, %r11d
	movq	%r11, 360+nvtxGlobals_v3(%rip)
.L116:
	leaq	nvtxNameCudaStreamW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 368+nvtxGlobals_v3(%rip)
	je	.L206
	testb	%al, %al
	je	.L118
.L206:
	xorl	%r10d, %r10d
	movq	%r10, 368+nvtxGlobals_v3(%rip)
.L118:
	leaq	nvtxNameCudaEventA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 376+nvtxGlobals_v3(%rip)
	je	.L207
	testb	%al, %al
	je	.L120
.L207:
	xorl	%r9d, %r9d
	movq	%r9, 376+nvtxGlobals_v3(%rip)
.L120:
	leaq	nvtxNameCudaEventW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 384+nvtxGlobals_v3(%rip)
	je	.L208
	testb	%al, %al
	je	.L122
.L208:
	xorl	%r8d, %r8d
	movq	%r8, 384+nvtxGlobals_v3(%rip)
.L122:
	leaq	nvtxDomainMarkEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 392+nvtxGlobals_v3(%rip)
	je	.L209
	testb	%al, %al
	je	.L124
.L209:
	xorl	%edi, %edi
	movq	%rdi, 392+nvtxGlobals_v3(%rip)
.L124:
	leaq	nvtxDomainRangeStartEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 400+nvtxGlobals_v3(%rip)
	je	.L210
	testb	%al, %al
	je	.L126
.L210:
	xorl	%esi, %esi
	movq	%rsi, 400+nvtxGlobals_v3(%rip)
.L126:
	leaq	nvtxDomainRangeEnd_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 408+nvtxGlobals_v3(%rip)
	je	.L211
	testb	%al, %al
	je	.L128
.L211:
	xorl	%ecx, %ecx
	movq	%rcx, 408+nvtxGlobals_v3(%rip)
.L128:
	leaq	nvtxDomainRangePushEx_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 416+nvtxGlobals_v3(%rip)
	je	.L212
	testb	%al, %al
	je	.L130
.L212:
	xorl	%edx, %edx
	movq	%rdx, 416+nvtxGlobals_v3(%rip)
.L130:
	leaq	nvtxDomainRangePop_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 424+nvtxGlobals_v3(%rip)
	je	.L213
	testb	%al, %al
	je	.L132
.L213:
	xorl	%r11d, %r11d
	movq	%r11, 424+nvtxGlobals_v3(%rip)
.L132:
	leaq	nvtxDomainResourceCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 432+nvtxGlobals_v3(%rip)
	je	.L214
	testb	%al, %al
	je	.L134
.L214:
	xorl	%r10d, %r10d
	movq	%r10, 432+nvtxGlobals_v3(%rip)
.L134:
	leaq	nvtxDomainResourceDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 440+nvtxGlobals_v3(%rip)
	je	.L215
	testb	%al, %al
	je	.L136
.L215:
	xorl	%r9d, %r9d
	movq	%r9, 440+nvtxGlobals_v3(%rip)
.L136:
	leaq	nvtxDomainNameCategoryA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 448+nvtxGlobals_v3(%rip)
	je	.L216
	testb	%al, %al
	je	.L138
.L216:
	xorl	%r8d, %r8d
	movq	%r8, 448+nvtxGlobals_v3(%rip)
.L138:
	leaq	nvtxDomainNameCategoryW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 456+nvtxGlobals_v3(%rip)
	je	.L217
	testb	%al, %al
	je	.L140
.L217:
	xorl	%edi, %edi
	movq	%rdi, 456+nvtxGlobals_v3(%rip)
.L140:
	leaq	nvtxDomainRegisterStringA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 464+nvtxGlobals_v3(%rip)
	je	.L218
	testb	%al, %al
	je	.L142
.L218:
	xorl	%esi, %esi
	movq	%rsi, 464+nvtxGlobals_v3(%rip)
.L142:
	leaq	nvtxDomainRegisterStringW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 472+nvtxGlobals_v3(%rip)
	je	.L219
	testb	%al, %al
	je	.L144
.L219:
	xorl	%ecx, %ecx
	movq	%rcx, 472+nvtxGlobals_v3(%rip)
.L144:
	leaq	nvtxDomainCreateA_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 480+nvtxGlobals_v3(%rip)
	je	.L220
	testb	%al, %al
	je	.L146
.L220:
	xorl	%edx, %edx
	movq	%rdx, 480+nvtxGlobals_v3(%rip)
.L146:
	leaq	nvtxDomainCreateW_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 488+nvtxGlobals_v3(%rip)
	je	.L221
	testb	%al, %al
	je	.L148
.L221:
	xorl	%r11d, %r11d
	movq	%r11, 488+nvtxGlobals_v3(%rip)
.L148:
	leaq	nvtxDomainDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 496+nvtxGlobals_v3(%rip)
	je	.L222
	testb	%al, %al
	je	.L150
.L222:
	xorl	%r10d, %r10d
	movq	%r10, 496+nvtxGlobals_v3(%rip)
.L150:
	leaq	nvtxInitialize_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 504+nvtxGlobals_v3(%rip)
	je	.L223
	testb	%al, %al
	je	.L152
.L223:
	xorl	%r9d, %r9d
	movq	%r9, 504+nvtxGlobals_v3(%rip)
.L152:
	leaq	nvtxDomainSyncUserCreate_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 512+nvtxGlobals_v3(%rip)
	je	.L224
	testb	%al, %al
	je	.L154
.L224:
	xorl	%r8d, %r8d
	movq	%r8, 512+nvtxGlobals_v3(%rip)
.L154:
	leaq	nvtxDomainSyncUserDestroy_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 520+nvtxGlobals_v3(%rip)
	je	.L225
	testb	%al, %al
	je	.L156
.L225:
	xorl	%edi, %edi
	movq	%rdi, 520+nvtxGlobals_v3(%rip)
.L156:
	leaq	nvtxDomainSyncUserAcquireStart_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 528+nvtxGlobals_v3(%rip)
	je	.L226
	testb	%al, %al
	je	.L158
.L226:
	xorl	%esi, %esi
	movq	%rsi, 528+nvtxGlobals_v3(%rip)
.L158:
	leaq	nvtxDomainSyncUserAcquireFailed_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 536+nvtxGlobals_v3(%rip)
	je	.L227
	testb	%al, %al
	je	.L160
.L227:
	xorl	%ecx, %ecx
	movq	%rcx, 536+nvtxGlobals_v3(%rip)
.L160:
	leaq	nvtxDomainSyncUserAcquireSuccess_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 544+nvtxGlobals_v3(%rip)
	je	.L228
	testb	%al, %al
	je	.L162
.L228:
	xorl	%edx, %edx
	movq	%rdx, 544+nvtxGlobals_v3(%rip)
.L162:
	leaq	nvtxDomainSyncUserReleasing_impl_init_v3(%rip), %rdx
	cmpq	%rdx, 552+nvtxGlobals_v3(%rip)
	je	.L229
	testb	%al, %al
	je	.L37
.L229:
	xorl	%eax, %eax
	movq	%rax, 552+nvtxGlobals_v3(%rip)
.L37:
	ret
	.cfi_endproc
.LFE6265:
	.size	nvtxSetInitFunctionsToNoops_v3, .-nvtxSetInitFunctionsToNoops_v3
	.section	.rodata.nvtxInitializeInjectionLibrary_v3.str1.1,"aMS",@progbits,1
.LC0:
	.string	"NVTX_INJECTION64_PATH"
.LC1:
	.string	"InitializeInjectionNvtx2"
	.section	.text.nvtxInitializeInjectionLibrary_v3,"axG",@progbits,nvtxInitializeInjectionLibrary_v3,comdat
	.weak	nvtxInitializeInjectionLibrary_v3
	.hidden	nvtxInitializeInjectionLibrary_v3
	.type	nvtxInitializeInjectionLibrary_v3, @function
nvtxInitializeInjectionLibrary_v3:
.LFB6266:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC0(%rip), %rdi
	call	getenv@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L423
	movl	$1, %esi
	movq	%rax, %rdi
	call	dlopen@PLT
	movl	$4, %edx
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L422
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	dlsym@PLT
	testq	%rax, %rax
	jne	.L425
	movq	%rbx, %rdi
	call	dlclose@PLT
	movl	$5, %edx
	jmp	.L422
.L423:
	movq	InitializeInjectionNvtx2_fnptr(%rip), %rax
	movl	$7, %edx
	testq	%rax, %rax
	je	.L422
.L425:
	leaq	nvtxGetExportTable_v3(%rip), %rdi
	call	*%rax
	xorl	%edx, %edx
	testl	%eax, %eax
	jne	.L422
	testq	%rbx, %rbx
	je	.L426
	movq	%rbx, %rdi
	call	dlclose@PLT
.L426:
	movl	$6, %edx
.L422:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6266:
	.size	nvtxInitializeInjectionLibrary_v3, .-nvtxInitializeInjectionLibrary_v3
	.section	.text.nvtxInitOnce_v3,"axG",@progbits,nvtxInitOnce_v3,comdat
	.weak	nvtxInitOnce_v3
	.hidden	nvtxInitOnce_v3
	.type	nvtxInitOnce_v3, @function
nvtxInitOnce_v3:
.LFB6267:
	.cfi_startproc
	endbr64
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L442
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$1, %eax
	xorl	%edx, %edx
	mfence
	lock cmpxchgl	%edx, nvtxGlobals_v3(%rip)
	testl	%eax, %eax
	jne	.L445
	call	nvtxInitializeInjectionLibrary_v3
	xorl	%edi, %edi
	testl	%eax, %eax
	setne	%dil
	call	nvtxSetInitFunctionsToNoops_v3
	movl	$2, %eax
	mfence
	xchgl	nvtxGlobals_v3(%rip), %eax
	jmp	.L434
.L445:
	mfence
	movl	nvtxGlobals_v3(%rip), %eax
	cmpl	$2, %eax
	je	.L434
	call	sched_yield@PLT
	jmp	.L445
.L434:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
.L442:
	ret
	.cfi_endproc
.LFE6267:
	.size	nvtxInitOnce_v3, .-nvtxInitOnce_v3
	.section	.text.nvtxDomainSyncUserReleasing_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserReleasing_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserReleasing_impl_init_v3
	.hidden	nvtxDomainSyncUserReleasing_impl_init_v3
	.type	nvtxDomainSyncUserReleasing_impl_init_v3, @function
nvtxDomainSyncUserReleasing_impl_init_v3:
.LFB6264:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	552+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L446
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L446:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6264:
	.size	nvtxDomainSyncUserReleasing_impl_init_v3, .-nvtxDomainSyncUserReleasing_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireSuccess_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireSuccess_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.type	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, @function
nvtxDomainSyncUserAcquireSuccess_impl_init_v3:
.LFB6263:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	544+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L449
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L449:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6263:
	.size	nvtxDomainSyncUserAcquireSuccess_impl_init_v3, .-nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireFailed_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireFailed_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.type	nvtxDomainSyncUserAcquireFailed_impl_init_v3, @function
nvtxDomainSyncUserAcquireFailed_impl_init_v3:
.LFB6262:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	536+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L452
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L452:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6262:
	.size	nvtxDomainSyncUserAcquireFailed_impl_init_v3, .-nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.section	.text.nvtxDomainSyncUserAcquireStart_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserAcquireStart_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.hidden	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.type	nvtxDomainSyncUserAcquireStart_impl_init_v3, @function
nvtxDomainSyncUserAcquireStart_impl_init_v3:
.LFB6261:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	528+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L455
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L455:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6261:
	.size	nvtxDomainSyncUserAcquireStart_impl_init_v3, .-nvtxDomainSyncUserAcquireStart_impl_init_v3
	.section	.text.nvtxDomainSyncUserDestroy_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserDestroy_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserDestroy_impl_init_v3
	.hidden	nvtxDomainSyncUserDestroy_impl_init_v3
	.type	nvtxDomainSyncUserDestroy_impl_init_v3, @function
nvtxDomainSyncUserDestroy_impl_init_v3:
.LFB6260:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	520+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L458
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L458:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6260:
	.size	nvtxDomainSyncUserDestroy_impl_init_v3, .-nvtxDomainSyncUserDestroy_impl_init_v3
	.section	.text.nvtxDomainSyncUserCreate_impl_init_v3,"axG",@progbits,nvtxDomainSyncUserCreate_impl_init_v3,comdat
	.weak	nvtxDomainSyncUserCreate_impl_init_v3
	.hidden	nvtxDomainSyncUserCreate_impl_init_v3
	.type	nvtxDomainSyncUserCreate_impl_init_v3, @function
nvtxDomainSyncUserCreate_impl_init_v3:
.LFB6259:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	512+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L462
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L462:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6259:
	.size	nvtxDomainSyncUserCreate_impl_init_v3, .-nvtxDomainSyncUserCreate_impl_init_v3
	.section	.text.nvtxInitialize_impl_init_v3,"axG",@progbits,nvtxInitialize_impl_init_v3,comdat
	.weak	nvtxInitialize_impl_init_v3
	.hidden	nvtxInitialize_impl_init_v3
	.type	nvtxInitialize_impl_init_v3, @function
nvtxInitialize_impl_init_v3:
.LFB6230:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	504+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L464
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L464:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6230:
	.size	nvtxInitialize_impl_init_v3, .-nvtxInitialize_impl_init_v3
	.section	.text.nvtxDomainDestroy_impl_init_v3,"axG",@progbits,nvtxDomainDestroy_impl_init_v3,comdat
	.weak	nvtxDomainDestroy_impl_init_v3
	.hidden	nvtxDomainDestroy_impl_init_v3
	.type	nvtxDomainDestroy_impl_init_v3, @function
nvtxDomainDestroy_impl_init_v3:
.LFB6229:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	496+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L467
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L467:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6229:
	.size	nvtxDomainDestroy_impl_init_v3, .-nvtxDomainDestroy_impl_init_v3
	.section	.text.nvtxDomainCreateW_impl_init_v3,"axG",@progbits,nvtxDomainCreateW_impl_init_v3,comdat
	.weak	nvtxDomainCreateW_impl_init_v3
	.hidden	nvtxDomainCreateW_impl_init_v3
	.type	nvtxDomainCreateW_impl_init_v3, @function
nvtxDomainCreateW_impl_init_v3:
.LFB6228:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	488+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L471
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L471:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6228:
	.size	nvtxDomainCreateW_impl_init_v3, .-nvtxDomainCreateW_impl_init_v3
	.section	.text.nvtxDomainCreateA_impl_init_v3,"axG",@progbits,nvtxDomainCreateA_impl_init_v3,comdat
	.weak	nvtxDomainCreateA_impl_init_v3
	.hidden	nvtxDomainCreateA_impl_init_v3
	.type	nvtxDomainCreateA_impl_init_v3, @function
nvtxDomainCreateA_impl_init_v3:
.LFB6227:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	480+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L474
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L474:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6227:
	.size	nvtxDomainCreateA_impl_init_v3, .-nvtxDomainCreateA_impl_init_v3
	.section	.text.nvtxDomainRegisterStringW_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringW_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringW_impl_init_v3
	.hidden	nvtxDomainRegisterStringW_impl_init_v3
	.type	nvtxDomainRegisterStringW_impl_init_v3, @function
nvtxDomainRegisterStringW_impl_init_v3:
.LFB6226:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	472+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L477
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L477:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6226:
	.size	nvtxDomainRegisterStringW_impl_init_v3, .-nvtxDomainRegisterStringW_impl_init_v3
	.section	.text.nvtxDomainRegisterStringA_impl_init_v3,"axG",@progbits,nvtxDomainRegisterStringA_impl_init_v3,comdat
	.weak	nvtxDomainRegisterStringA_impl_init_v3
	.hidden	nvtxDomainRegisterStringA_impl_init_v3
	.type	nvtxDomainRegisterStringA_impl_init_v3, @function
nvtxDomainRegisterStringA_impl_init_v3:
.LFB6225:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	464+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L480
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L480:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6225:
	.size	nvtxDomainRegisterStringA_impl_init_v3, .-nvtxDomainRegisterStringA_impl_init_v3
	.section	.text.nvtxDomainNameCategoryW_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryW_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryW_impl_init_v3
	.hidden	nvtxDomainNameCategoryW_impl_init_v3
	.type	nvtxDomainNameCategoryW_impl_init_v3, @function
nvtxDomainNameCategoryW_impl_init_v3:
.LFB6224:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	456+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L482
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L482:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6224:
	.size	nvtxDomainNameCategoryW_impl_init_v3, .-nvtxDomainNameCategoryW_impl_init_v3
	.section	.text.nvtxDomainNameCategoryA_impl_init_v3,"axG",@progbits,nvtxDomainNameCategoryA_impl_init_v3,comdat
	.weak	nvtxDomainNameCategoryA_impl_init_v3
	.hidden	nvtxDomainNameCategoryA_impl_init_v3
	.type	nvtxDomainNameCategoryA_impl_init_v3, @function
nvtxDomainNameCategoryA_impl_init_v3:
.LFB6223:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdi, 24(%rsp)
	movl	%esi, 20(%rsp)
	movq	%rdx, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	448+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L485
	movq	8(%rsp), %rdx
	movl	20(%rsp), %esi
	movq	24(%rsp), %rdi
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L485:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6223:
	.size	nvtxDomainNameCategoryA_impl_init_v3, .-nvtxDomainNameCategoryA_impl_init_v3
	.section	.text.nvtxDomainResourceDestroy_impl_init_v3,"axG",@progbits,nvtxDomainResourceDestroy_impl_init_v3,comdat
	.weak	nvtxDomainResourceDestroy_impl_init_v3
	.hidden	nvtxDomainResourceDestroy_impl_init_v3
	.type	nvtxDomainResourceDestroy_impl_init_v3, @function
nvtxDomainResourceDestroy_impl_init_v3:
.LFB6222:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	440+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L488
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L488:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6222:
	.size	nvtxDomainResourceDestroy_impl_init_v3, .-nvtxDomainResourceDestroy_impl_init_v3
	.section	.text.nvtxDomainResourceCreate_impl_init_v3,"axG",@progbits,nvtxDomainResourceCreate_impl_init_v3,comdat
	.weak	nvtxDomainResourceCreate_impl_init_v3
	.hidden	nvtxDomainResourceCreate_impl_init_v3
	.type	nvtxDomainResourceCreate_impl_init_v3, @function
nvtxDomainResourceCreate_impl_init_v3:
.LFB6221:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	432+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L492
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L492:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6221:
	.size	nvtxDomainResourceCreate_impl_init_v3, .-nvtxDomainResourceCreate_impl_init_v3
	.section	.text.nvtxDomainRangePop_impl_init_v3,"axG",@progbits,nvtxDomainRangePop_impl_init_v3,comdat
	.weak	nvtxDomainRangePop_impl_init_v3
	.hidden	nvtxDomainRangePop_impl_init_v3
	.type	nvtxDomainRangePop_impl_init_v3, @function
nvtxDomainRangePop_impl_init_v3:
.LFB6220:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	424+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L495
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L495:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6220:
	.size	nvtxDomainRangePop_impl_init_v3, .-nvtxDomainRangePop_impl_init_v3
	.section	.text.nvtxDomainRangePushEx_impl_init_v3,"axG",@progbits,nvtxDomainRangePushEx_impl_init_v3,comdat
	.weak	nvtxDomainRangePushEx_impl_init_v3
	.hidden	nvtxDomainRangePushEx_impl_init_v3
	.type	nvtxDomainRangePushEx_impl_init_v3, @function
nvtxDomainRangePushEx_impl_init_v3:
.LFB6219:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	416+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L498
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L498:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6219:
	.size	nvtxDomainRangePushEx_impl_init_v3, .-nvtxDomainRangePushEx_impl_init_v3
	.section	.text.nvtxDomainRangeEnd_impl_init_v3,"axG",@progbits,nvtxDomainRangeEnd_impl_init_v3,comdat
	.weak	nvtxDomainRangeEnd_impl_init_v3
	.hidden	nvtxDomainRangeEnd_impl_init_v3
	.type	nvtxDomainRangeEnd_impl_init_v3, @function
nvtxDomainRangeEnd_impl_init_v3:
.LFB6218:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	408+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L500
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L500:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6218:
	.size	nvtxDomainRangeEnd_impl_init_v3, .-nvtxDomainRangeEnd_impl_init_v3
	.section	.text.nvtxDomainRangeStartEx_impl_init_v3,"axG",@progbits,nvtxDomainRangeStartEx_impl_init_v3,comdat
	.weak	nvtxDomainRangeStartEx_impl_init_v3
	.hidden	nvtxDomainRangeStartEx_impl_init_v3
	.type	nvtxDomainRangeStartEx_impl_init_v3, @function
nvtxDomainRangeStartEx_impl_init_v3:
.LFB6217:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	400+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L504
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L504:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6217:
	.size	nvtxDomainRangeStartEx_impl_init_v3, .-nvtxDomainRangeStartEx_impl_init_v3
	.section	.text.nvtxDomainMarkEx_impl_init_v3,"axG",@progbits,nvtxDomainMarkEx_impl_init_v3,comdat
	.weak	nvtxDomainMarkEx_impl_init_v3
	.hidden	nvtxDomainMarkEx_impl_init_v3
	.type	nvtxDomainMarkEx_impl_init_v3, @function
nvtxDomainMarkEx_impl_init_v3:
.LFB6216:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	392+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L506
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L506:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6216:
	.size	nvtxDomainMarkEx_impl_init_v3, .-nvtxDomainMarkEx_impl_init_v3
	.section	.text.nvtxNameCudaEventW_impl_init_v3,"axG",@progbits,nvtxNameCudaEventW_impl_init_v3,comdat
	.weak	nvtxNameCudaEventW_impl_init_v3
	.hidden	nvtxNameCudaEventW_impl_init_v3
	.type	nvtxNameCudaEventW_impl_init_v3, @function
nvtxNameCudaEventW_impl_init_v3:
.LFB6244:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	384+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L509
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L509:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6244:
	.size	nvtxNameCudaEventW_impl_init_v3, .-nvtxNameCudaEventW_impl_init_v3
	.section	.text.nvtxNameCudaEventA_impl_init_v3,"axG",@progbits,nvtxNameCudaEventA_impl_init_v3,comdat
	.weak	nvtxNameCudaEventA_impl_init_v3
	.hidden	nvtxNameCudaEventA_impl_init_v3
	.type	nvtxNameCudaEventA_impl_init_v3, @function
nvtxNameCudaEventA_impl_init_v3:
.LFB6243:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	376+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L512
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L512:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6243:
	.size	nvtxNameCudaEventA_impl_init_v3, .-nvtxNameCudaEventA_impl_init_v3
	.section	.text.nvtxNameCudaStreamW_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamW_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamW_impl_init_v3
	.hidden	nvtxNameCudaStreamW_impl_init_v3
	.type	nvtxNameCudaStreamW_impl_init_v3, @function
nvtxNameCudaStreamW_impl_init_v3:
.LFB6242:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	368+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L515
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L515:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6242:
	.size	nvtxNameCudaStreamW_impl_init_v3, .-nvtxNameCudaStreamW_impl_init_v3
	.section	.text.nvtxNameCudaStreamA_impl_init_v3,"axG",@progbits,nvtxNameCudaStreamA_impl_init_v3,comdat
	.weak	nvtxNameCudaStreamA_impl_init_v3
	.hidden	nvtxNameCudaStreamA_impl_init_v3
	.type	nvtxNameCudaStreamA_impl_init_v3, @function
nvtxNameCudaStreamA_impl_init_v3:
.LFB6241:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	360+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L518
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L518:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6241:
	.size	nvtxNameCudaStreamA_impl_init_v3, .-nvtxNameCudaStreamA_impl_init_v3
	.section	.text.nvtxNameCudaDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceW_impl_init_v3
	.hidden	nvtxNameCudaDeviceW_impl_init_v3
	.type	nvtxNameCudaDeviceW_impl_init_v3, @function
nvtxNameCudaDeviceW_impl_init_v3:
.LFB6240:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	352+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L521
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L521:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6240:
	.size	nvtxNameCudaDeviceW_impl_init_v3, .-nvtxNameCudaDeviceW_impl_init_v3
	.section	.text.nvtxNameCudaDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCudaDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCudaDeviceA_impl_init_v3
	.hidden	nvtxNameCudaDeviceA_impl_init_v3
	.type	nvtxNameCudaDeviceA_impl_init_v3, @function
nvtxNameCudaDeviceA_impl_init_v3:
.LFB6239:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	344+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L524
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L524:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6239:
	.size	nvtxNameCudaDeviceA_impl_init_v3, .-nvtxNameCudaDeviceA_impl_init_v3
	.section	.text.nvtxNameClEventW_impl_init_v3,"axG",@progbits,nvtxNameClEventW_impl_init_v3,comdat
	.weak	nvtxNameClEventW_impl_init_v3
	.hidden	nvtxNameClEventW_impl_init_v3
	.type	nvtxNameClEventW_impl_init_v3, @function
nvtxNameClEventW_impl_init_v3:
.LFB6258:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	336+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L527
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L527:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6258:
	.size	nvtxNameClEventW_impl_init_v3, .-nvtxNameClEventW_impl_init_v3
	.section	.text.nvtxNameClEventA_impl_init_v3,"axG",@progbits,nvtxNameClEventA_impl_init_v3,comdat
	.weak	nvtxNameClEventA_impl_init_v3
	.hidden	nvtxNameClEventA_impl_init_v3
	.type	nvtxNameClEventA_impl_init_v3, @function
nvtxNameClEventA_impl_init_v3:
.LFB6257:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	328+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L530
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L530:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6257:
	.size	nvtxNameClEventA_impl_init_v3, .-nvtxNameClEventA_impl_init_v3
	.section	.text.nvtxNameClProgramW_impl_init_v3,"axG",@progbits,nvtxNameClProgramW_impl_init_v3,comdat
	.weak	nvtxNameClProgramW_impl_init_v3
	.hidden	nvtxNameClProgramW_impl_init_v3
	.type	nvtxNameClProgramW_impl_init_v3, @function
nvtxNameClProgramW_impl_init_v3:
.LFB6256:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	320+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L533
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L533:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6256:
	.size	nvtxNameClProgramW_impl_init_v3, .-nvtxNameClProgramW_impl_init_v3
	.section	.text.nvtxNameClProgramA_impl_init_v3,"axG",@progbits,nvtxNameClProgramA_impl_init_v3,comdat
	.weak	nvtxNameClProgramA_impl_init_v3
	.hidden	nvtxNameClProgramA_impl_init_v3
	.type	nvtxNameClProgramA_impl_init_v3, @function
nvtxNameClProgramA_impl_init_v3:
.LFB6255:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	312+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L536
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L536:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6255:
	.size	nvtxNameClProgramA_impl_init_v3, .-nvtxNameClProgramA_impl_init_v3
	.section	.text.nvtxNameClSamplerW_impl_init_v3,"axG",@progbits,nvtxNameClSamplerW_impl_init_v3,comdat
	.weak	nvtxNameClSamplerW_impl_init_v3
	.hidden	nvtxNameClSamplerW_impl_init_v3
	.type	nvtxNameClSamplerW_impl_init_v3, @function
nvtxNameClSamplerW_impl_init_v3:
.LFB6254:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	304+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L539
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L539:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6254:
	.size	nvtxNameClSamplerW_impl_init_v3, .-nvtxNameClSamplerW_impl_init_v3
	.section	.text.nvtxNameClSamplerA_impl_init_v3,"axG",@progbits,nvtxNameClSamplerA_impl_init_v3,comdat
	.weak	nvtxNameClSamplerA_impl_init_v3
	.hidden	nvtxNameClSamplerA_impl_init_v3
	.type	nvtxNameClSamplerA_impl_init_v3, @function
nvtxNameClSamplerA_impl_init_v3:
.LFB6253:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	296+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L542
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L542:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6253:
	.size	nvtxNameClSamplerA_impl_init_v3, .-nvtxNameClSamplerA_impl_init_v3
	.section	.text.nvtxNameClMemObjectW_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectW_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectW_impl_init_v3
	.hidden	nvtxNameClMemObjectW_impl_init_v3
	.type	nvtxNameClMemObjectW_impl_init_v3, @function
nvtxNameClMemObjectW_impl_init_v3:
.LFB6252:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	288+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L545
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L545:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6252:
	.size	nvtxNameClMemObjectW_impl_init_v3, .-nvtxNameClMemObjectW_impl_init_v3
	.section	.text.nvtxNameClMemObjectA_impl_init_v3,"axG",@progbits,nvtxNameClMemObjectA_impl_init_v3,comdat
	.weak	nvtxNameClMemObjectA_impl_init_v3
	.hidden	nvtxNameClMemObjectA_impl_init_v3
	.type	nvtxNameClMemObjectA_impl_init_v3, @function
nvtxNameClMemObjectA_impl_init_v3:
.LFB6251:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	280+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L548
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L548:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6251:
	.size	nvtxNameClMemObjectA_impl_init_v3, .-nvtxNameClMemObjectA_impl_init_v3
	.section	.text.nvtxNameClCommandQueueW_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueW_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueW_impl_init_v3
	.hidden	nvtxNameClCommandQueueW_impl_init_v3
	.type	nvtxNameClCommandQueueW_impl_init_v3, @function
nvtxNameClCommandQueueW_impl_init_v3:
.LFB6250:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	272+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L551
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L551:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6250:
	.size	nvtxNameClCommandQueueW_impl_init_v3, .-nvtxNameClCommandQueueW_impl_init_v3
	.section	.text.nvtxNameClCommandQueueA_impl_init_v3,"axG",@progbits,nvtxNameClCommandQueueA_impl_init_v3,comdat
	.weak	nvtxNameClCommandQueueA_impl_init_v3
	.hidden	nvtxNameClCommandQueueA_impl_init_v3
	.type	nvtxNameClCommandQueueA_impl_init_v3, @function
nvtxNameClCommandQueueA_impl_init_v3:
.LFB6249:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	264+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L554
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L554:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6249:
	.size	nvtxNameClCommandQueueA_impl_init_v3, .-nvtxNameClCommandQueueA_impl_init_v3
	.section	.text.nvtxNameClContextW_impl_init_v3,"axG",@progbits,nvtxNameClContextW_impl_init_v3,comdat
	.weak	nvtxNameClContextW_impl_init_v3
	.hidden	nvtxNameClContextW_impl_init_v3
	.type	nvtxNameClContextW_impl_init_v3, @function
nvtxNameClContextW_impl_init_v3:
.LFB6248:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	256+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L557
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L557:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6248:
	.size	nvtxNameClContextW_impl_init_v3, .-nvtxNameClContextW_impl_init_v3
	.section	.text.nvtxNameClContextA_impl_init_v3,"axG",@progbits,nvtxNameClContextA_impl_init_v3,comdat
	.weak	nvtxNameClContextA_impl_init_v3
	.hidden	nvtxNameClContextA_impl_init_v3
	.type	nvtxNameClContextA_impl_init_v3, @function
nvtxNameClContextA_impl_init_v3:
.LFB6247:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	248+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L560
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L560:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6247:
	.size	nvtxNameClContextA_impl_init_v3, .-nvtxNameClContextA_impl_init_v3
	.section	.text.nvtxNameClDeviceW_impl_init_v3,"axG",@progbits,nvtxNameClDeviceW_impl_init_v3,comdat
	.weak	nvtxNameClDeviceW_impl_init_v3
	.hidden	nvtxNameClDeviceW_impl_init_v3
	.type	nvtxNameClDeviceW_impl_init_v3, @function
nvtxNameClDeviceW_impl_init_v3:
.LFB6246:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	240+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L563
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L563:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6246:
	.size	nvtxNameClDeviceW_impl_init_v3, .-nvtxNameClDeviceW_impl_init_v3
	.section	.text.nvtxNameClDeviceA_impl_init_v3,"axG",@progbits,nvtxNameClDeviceA_impl_init_v3,comdat
	.weak	nvtxNameClDeviceA_impl_init_v3
	.hidden	nvtxNameClDeviceA_impl_init_v3
	.type	nvtxNameClDeviceA_impl_init_v3, @function
nvtxNameClDeviceA_impl_init_v3:
.LFB6245:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	232+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L566
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L566:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6245:
	.size	nvtxNameClDeviceA_impl_init_v3, .-nvtxNameClDeviceA_impl_init_v3
	.section	.text.nvtxNameCuEventW_impl_init_v3,"axG",@progbits,nvtxNameCuEventW_impl_init_v3,comdat
	.weak	nvtxNameCuEventW_impl_init_v3
	.hidden	nvtxNameCuEventW_impl_init_v3
	.type	nvtxNameCuEventW_impl_init_v3, @function
nvtxNameCuEventW_impl_init_v3:
.LFB6238:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	224+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L569
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L569:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6238:
	.size	nvtxNameCuEventW_impl_init_v3, .-nvtxNameCuEventW_impl_init_v3
	.section	.text.nvtxNameCuEventA_impl_init_v3,"axG",@progbits,nvtxNameCuEventA_impl_init_v3,comdat
	.weak	nvtxNameCuEventA_impl_init_v3
	.hidden	nvtxNameCuEventA_impl_init_v3
	.type	nvtxNameCuEventA_impl_init_v3, @function
nvtxNameCuEventA_impl_init_v3:
.LFB6237:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	216+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L572
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L572:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6237:
	.size	nvtxNameCuEventA_impl_init_v3, .-nvtxNameCuEventA_impl_init_v3
	.section	.text.nvtxNameCuStreamW_impl_init_v3,"axG",@progbits,nvtxNameCuStreamW_impl_init_v3,comdat
	.weak	nvtxNameCuStreamW_impl_init_v3
	.hidden	nvtxNameCuStreamW_impl_init_v3
	.type	nvtxNameCuStreamW_impl_init_v3, @function
nvtxNameCuStreamW_impl_init_v3:
.LFB6236:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	208+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L575
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L575:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6236:
	.size	nvtxNameCuStreamW_impl_init_v3, .-nvtxNameCuStreamW_impl_init_v3
	.section	.text.nvtxNameCuStreamA_impl_init_v3,"axG",@progbits,nvtxNameCuStreamA_impl_init_v3,comdat
	.weak	nvtxNameCuStreamA_impl_init_v3
	.hidden	nvtxNameCuStreamA_impl_init_v3
	.type	nvtxNameCuStreamA_impl_init_v3, @function
nvtxNameCuStreamA_impl_init_v3:
.LFB6235:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	200+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L578
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L578:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6235:
	.size	nvtxNameCuStreamA_impl_init_v3, .-nvtxNameCuStreamA_impl_init_v3
	.section	.text.nvtxNameCuContextW_impl_init_v3,"axG",@progbits,nvtxNameCuContextW_impl_init_v3,comdat
	.weak	nvtxNameCuContextW_impl_init_v3
	.hidden	nvtxNameCuContextW_impl_init_v3
	.type	nvtxNameCuContextW_impl_init_v3, @function
nvtxNameCuContextW_impl_init_v3:
.LFB6234:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	192+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L581
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L581:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6234:
	.size	nvtxNameCuContextW_impl_init_v3, .-nvtxNameCuContextW_impl_init_v3
	.section	.text.nvtxNameCuContextA_impl_init_v3,"axG",@progbits,nvtxNameCuContextA_impl_init_v3,comdat
	.weak	nvtxNameCuContextA_impl_init_v3
	.hidden	nvtxNameCuContextA_impl_init_v3
	.type	nvtxNameCuContextA_impl_init_v3, @function
nvtxNameCuContextA_impl_init_v3:
.LFB6233:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	184+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L584
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L584:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6233:
	.size	nvtxNameCuContextA_impl_init_v3, .-nvtxNameCuContextA_impl_init_v3
	.section	.text.nvtxNameCuDeviceW_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceW_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceW_impl_init_v3
	.hidden	nvtxNameCuDeviceW_impl_init_v3
	.type	nvtxNameCuDeviceW_impl_init_v3, @function
nvtxNameCuDeviceW_impl_init_v3:
.LFB6232:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	176+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L587
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L587:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6232:
	.size	nvtxNameCuDeviceW_impl_init_v3, .-nvtxNameCuDeviceW_impl_init_v3
	.section	.text.nvtxNameCuDeviceA_impl_init_v3,"axG",@progbits,nvtxNameCuDeviceA_impl_init_v3,comdat
	.weak	nvtxNameCuDeviceA_impl_init_v3
	.hidden	nvtxNameCuDeviceA_impl_init_v3
	.type	nvtxNameCuDeviceA_impl_init_v3, @function
nvtxNameCuDeviceA_impl_init_v3:
.LFB6231:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	168+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L590
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L590:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6231:
	.size	nvtxNameCuDeviceA_impl_init_v3, .-nvtxNameCuDeviceA_impl_init_v3
	.section	.text.nvtxNameOsThreadW_impl_init_v3,"axG",@progbits,nvtxNameOsThreadW_impl_init_v3,comdat
	.weak	nvtxNameOsThreadW_impl_init_v3
	.hidden	nvtxNameOsThreadW_impl_init_v3
	.type	nvtxNameOsThreadW_impl_init_v3, @function
nvtxNameOsThreadW_impl_init_v3:
.LFB6215:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	160+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L593
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L593:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6215:
	.size	nvtxNameOsThreadW_impl_init_v3, .-nvtxNameOsThreadW_impl_init_v3
	.section	.text.nvtxNameOsThreadA_impl_init_v3,"axG",@progbits,nvtxNameOsThreadA_impl_init_v3,comdat
	.weak	nvtxNameOsThreadA_impl_init_v3
	.hidden	nvtxNameOsThreadA_impl_init_v3
	.type	nvtxNameOsThreadA_impl_init_v3, @function
nvtxNameOsThreadA_impl_init_v3:
.LFB6214:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	152+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L596
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L596:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6214:
	.size	nvtxNameOsThreadA_impl_init_v3, .-nvtxNameOsThreadA_impl_init_v3
	.section	.text.nvtxNameCategoryW_impl_init_v3,"axG",@progbits,nvtxNameCategoryW_impl_init_v3,comdat
	.weak	nvtxNameCategoryW_impl_init_v3
	.hidden	nvtxNameCategoryW_impl_init_v3
	.type	nvtxNameCategoryW_impl_init_v3, @function
nvtxNameCategoryW_impl_init_v3:
.LFB6213:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	144+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L599
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L599:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6213:
	.size	nvtxNameCategoryW_impl_init_v3, .-nvtxNameCategoryW_impl_init_v3
	.section	.text.nvtxNameCategoryA_impl_init_v3,"axG",@progbits,nvtxNameCategoryA_impl_init_v3,comdat
	.weak	nvtxNameCategoryA_impl_init_v3
	.hidden	nvtxNameCategoryA_impl_init_v3
	.type	nvtxNameCategoryA_impl_init_v3, @function
nvtxNameCategoryA_impl_init_v3:
.LFB6212:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	movq	%rsi, (%rsp)
	call	nvtxInitOnce_v3
	movq	136+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L602
	movq	(%rsp), %rsi
	movl	12(%rsp), %edi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L602:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6212:
	.size	nvtxNameCategoryA_impl_init_v3, .-nvtxNameCategoryA_impl_init_v3
	.section	.text.nvtxRangePop_impl_init_v3,"axG",@progbits,nvtxRangePop_impl_init_v3,comdat
	.weak	nvtxRangePop_impl_init_v3
	.hidden	nvtxRangePop_impl_init_v3
	.type	nvtxRangePop_impl_init_v3, @function
nvtxRangePop_impl_init_v3:
.LFB6211:
	.cfi_startproc
	endbr64
	pushq	%rsi
	.cfi_def_cfa_offset 16
	call	nvtxInitOnce_v3
	movq	128+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L606
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L606:
	.cfi_restore_state
	movl	$-2, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6211:
	.size	nvtxRangePop_impl_init_v3, .-nvtxRangePop_impl_init_v3
	.section	.text.nvtxRangePushW_impl_init_v3,"axG",@progbits,nvtxRangePushW_impl_init_v3,comdat
	.weak	nvtxRangePushW_impl_init_v3
	.hidden	nvtxRangePushW_impl_init_v3
	.type	nvtxRangePushW_impl_init_v3, @function
nvtxRangePushW_impl_init_v3:
.LFB6210:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	120+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L609
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L609:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6210:
	.size	nvtxRangePushW_impl_init_v3, .-nvtxRangePushW_impl_init_v3
	.section	.text.nvtxRangePushA_impl_init_v3,"axG",@progbits,nvtxRangePushA_impl_init_v3,comdat
	.weak	nvtxRangePushA_impl_init_v3
	.hidden	nvtxRangePushA_impl_init_v3
	.type	nvtxRangePushA_impl_init_v3, @function
nvtxRangePushA_impl_init_v3:
.LFB6209:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	112+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L612
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L612:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6209:
	.size	nvtxRangePushA_impl_init_v3, .-nvtxRangePushA_impl_init_v3
	.section	.text.nvtxRangePushEx_impl_init_v3,"axG",@progbits,nvtxRangePushEx_impl_init_v3,comdat
	.weak	nvtxRangePushEx_impl_init_v3
	.hidden	nvtxRangePushEx_impl_init_v3
	.type	nvtxRangePushEx_impl_init_v3, @function
nvtxRangePushEx_impl_init_v3:
.LFB6208:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	104+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L615
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L615:
	.cfi_restore_state
	movl	$-2, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6208:
	.size	nvtxRangePushEx_impl_init_v3, .-nvtxRangePushEx_impl_init_v3
	.section	.text.nvtxRangeEnd_impl_init_v3,"axG",@progbits,nvtxRangeEnd_impl_init_v3,comdat
	.weak	nvtxRangeEnd_impl_init_v3
	.hidden	nvtxRangeEnd_impl_init_v3
	.type	nvtxRangeEnd_impl_init_v3, @function
nvtxRangeEnd_impl_init_v3:
.LFB6207:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	96+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L617
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L617:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6207:
	.size	nvtxRangeEnd_impl_init_v3, .-nvtxRangeEnd_impl_init_v3
	.section	.text.nvtxRangeStartW_impl_init_v3,"axG",@progbits,nvtxRangeStartW_impl_init_v3,comdat
	.weak	nvtxRangeStartW_impl_init_v3
	.hidden	nvtxRangeStartW_impl_init_v3
	.type	nvtxRangeStartW_impl_init_v3, @function
nvtxRangeStartW_impl_init_v3:
.LFB6206:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	88+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L621
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L621:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6206:
	.size	nvtxRangeStartW_impl_init_v3, .-nvtxRangeStartW_impl_init_v3
	.section	.text.nvtxRangeStartA_impl_init_v3,"axG",@progbits,nvtxRangeStartA_impl_init_v3,comdat
	.weak	nvtxRangeStartA_impl_init_v3
	.hidden	nvtxRangeStartA_impl_init_v3
	.type	nvtxRangeStartA_impl_init_v3, @function
nvtxRangeStartA_impl_init_v3:
.LFB6205:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	80+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L624
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L624:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6205:
	.size	nvtxRangeStartA_impl_init_v3, .-nvtxRangeStartA_impl_init_v3
	.section	.text.nvtxRangeStartEx_impl_init_v3,"axG",@progbits,nvtxRangeStartEx_impl_init_v3,comdat
	.weak	nvtxRangeStartEx_impl_init_v3
	.hidden	nvtxRangeStartEx_impl_init_v3
	.type	nvtxRangeStartEx_impl_init_v3, @function
nvtxRangeStartEx_impl_init_v3:
.LFB6204:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	72+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L627
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L627:
	.cfi_restore_state
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6204:
	.size	nvtxRangeStartEx_impl_init_v3, .-nvtxRangeStartEx_impl_init_v3
	.section	.text.nvtxMarkW_impl_init_v3,"axG",@progbits,nvtxMarkW_impl_init_v3,comdat
	.weak	nvtxMarkW_impl_init_v3
	.hidden	nvtxMarkW_impl_init_v3
	.type	nvtxMarkW_impl_init_v3, @function
nvtxMarkW_impl_init_v3:
.LFB6203:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	64+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L629
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L629:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6203:
	.size	nvtxMarkW_impl_init_v3, .-nvtxMarkW_impl_init_v3
	.section	.text.nvtxMarkA_impl_init_v3,"axG",@progbits,nvtxMarkA_impl_init_v3,comdat
	.weak	nvtxMarkA_impl_init_v3
	.hidden	nvtxMarkA_impl_init_v3
	.type	nvtxMarkA_impl_init_v3, @function
nvtxMarkA_impl_init_v3:
.LFB6202:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	56+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L632
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L632:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6202:
	.size	nvtxMarkA_impl_init_v3, .-nvtxMarkA_impl_init_v3
	.section	.text.nvtxMarkEx_impl_init_v3,"axG",@progbits,nvtxMarkEx_impl_init_v3,comdat
	.weak	nvtxMarkEx_impl_init_v3
	.hidden	nvtxMarkEx_impl_init_v3
	.type	nvtxMarkEx_impl_init_v3, @function
nvtxMarkEx_impl_init_v3:
.LFB6201:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, 8(%rsp)
	call	nvtxInitOnce_v3
	movq	48+nvtxGlobals_v3(%rip), %rax
	testq	%rax, %rax
	je	.L635
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	*%rax
.L635:
	.cfi_restore_state
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6201:
	.size	nvtxMarkEx_impl_init_v3, .-nvtxMarkEx_impl_init_v3
	.text
	.globl	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	.type	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_, @function
_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_:
.LFB10692:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	160(%rsp), %rax
	movq	%rsi, 16(%rsp)
	movq	%rdi, 8(%rsp)
	leaq	56(%rsp), %rdi
	movq	168(%rsp), %r12
	movq	%rax, 24(%rsp)
	movq	184(%rsp), %rax
	movq	176(%rsp), %r15
	movq	%rax, 32(%rsp)
	movq	192(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rsi
	movq	0(%rbp), %rdi
	movl	%ebx, %edx
	salq	$3, %rdx
	movl	$1, %ecx
	xorl	%ebx, %ebx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L639:
	cmpl	%ebx, %r14d
	jle	.L644
	imulq	$12, %rbx, %rax
	movq	24(%rsp), %rcx
	movq	(%r12), %rdi
	xorl	%r9d, %r9d
	movl	8(%r12), %esi
	movl	(%r15), %r8d
	addq	%rcx, %rax
	movq	(%rax), %rdx
	movl	8(%rax), %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L640
	movl	0(%r13,%rbx,4), %edx
	movq	8(%rbp,%rbx,8), %rsi
	movq	0(%rbp,%rbx,8), %rdi
	call	_ZL48__device_stub__Z15reductionKernelILj512EEvPdS0_jPdS_j
.L640:
	incq	%rbx
	addq	$12, %r12
	jmp	.L639
.L644:
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movslq	%r14d, %rax
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movq	0(%rbp,%rax,8), %rsi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L642
	call	__stack_chk_fail@PLT
.L642:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10692:
	.size	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_, .-_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	.globl	_Z15reductionThrustPdS_jRf
	.type	_Z15reductionThrustPdS_jRf, @function
_Z15reductionThrustPdS_jRf:
.LFB10693:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	(%rbx,%rbp,8), %rax
	xorps	%xmm0, %xmm0
.L646:
	cmpq	%rbx, %rax
	je	.L650
	addsd	(%rbx), %xmm0
	addq	$8, %rbx
	jmp	.L646
.L650:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movsd	%xmm0, (%r12)
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	%r13, %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L648
	call	__stack_chk_fail@PLT
.L648:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10693:
	.size	_Z15reductionThrustPdS_jRf, .-_Z15reductionThrustPdS_jRf
	.globl	_Z13reductionHostPdS_jRf
	.type	_Z13reductionHostPdS_jRf, @function
_Z13reductionHostPdS_jRf:
.LFB10694:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L652:
	cmpl	%r12d, %eax
	jnb	.L656
	addsd	0(%r13,%rax,8), %xmm0
	incq	%rax
	jmp	.L652
.L656:
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movsd	%xmm0, 0(%rbp)
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L654
	call	__stack_chk_fail@PLT
.L654:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10694:
	.size	_Z13reductionHostPdS_jRf, .-_Z13reductionHostPdS_jRf
	.globl	_Z12checkResultsPdS_d
	.type	_Z12checkResultsPdS_d, @function
_Z12checkResultsPdS_d:
.LFB10695:
	.cfi_startproc
	endbr64
	movaps	%xmm0, %xmm1
	movsd	(%rdi), %xmm0
	subsd	(%rsi), %xmm0
	andps	.LC3(%rip), %xmm0
	comisd	%xmm1, %xmm0
	setbe	%al
	ret
	.cfi_endproc
.LFE10695:
	.size	_Z12checkResultsPdS_d, .-_Z12checkResultsPdS_d
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Memory allocation on the host was unsuccessful.\n"
	.text
	.globl	_Z17allocateHostArrayj
	.type	_Z17allocateHostArrayj, @function
_Z17allocateHostArrayj:
.LFB10696:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, %esi
	xorl	%edx, %edx
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaHostAlloc@PLT
	testl	%eax, %eax
	je	.L659
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L659:
	movq	(%rsp), %rax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L660
	call	__stack_chk_fail@PLT
.L660:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10696:
	.size	_Z17allocateHostArrayj, .-_Z17allocateHostArrayj
	.section	.rodata.str1.1
.LC5:
	.string	"Memory allocation on the device was unsuccessful.\n"
	.text
	.globl	_Z19allocateDeviceArrayj
	.type	_Z19allocateDeviceArrayj, @function
_Z19allocateDeviceArrayj:
.LFB10697:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, %esi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L663
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L663:
	movq	(%rsp), %rax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L664
	call	__stack_chk_fail@PLT
.L664:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10697:
	.size	_Z19allocateDeviceArrayj, .-_Z19allocateDeviceArrayj
	.section	.rodata.str1.1
.LC6:
	.string	"Usage: ./p2 [[M N] [dur_max]]\n"
	.text
	.globl	_Z9exitUsagev
	.type	_Z9exitUsagev, @function
_Z9exitUsagev:
.LFB10698:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	pushq	%rax
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE10698:
	.size	_Z9exitUsagev, .-_Z9exitUsagev
	.section	.rodata.str1.1
.LC8:
	.string	"%u"
.LC9:
	.string	"%f"
	.text
	.globl	_Z10parseInputiPPcRjS1_Rf
	.type	_Z10parseInputiPPcRjS1_Rf, @function
_Z10parseInputiPPcRjS1_Rf:
.LFB10699:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r8, %rbx
	cmpl	$1, %edi
	jne	.L669
	movl	$50000000, (%rdx)
	movl	$5, (%rcx)
.L673:
	movss	.LC7(%rip), %xmm0
	jmp	.L670
.L669:
	leal	-3(%rdi), %eax
	movl	%edi, %r12d
	cmpl	$1, %eax
	jbe	.L671
.L672:
	call	_Z9exitUsagev
.L671:
	movq	8(%rsi), %rdi
	leaq	.LC8(%rip), %r14
	xorl	%eax, %eax
	movq	%rsi, %rbp
	movq	%r14, %rsi
	call	__isoc23_sscanf@PLT
	decl	%eax
	jne	.L672
	movq	16(%rbp), %rdi
	xorl	%eax, %eax
	movq	%r13, %rdx
	movq	%r14, %rsi
	call	__isoc23_sscanf@PLT
	decl	%eax
	jne	.L672
	cmpl	$3, %r12d
	je	.L673
	movq	24(%rbp), %rdi
	xorl	%eax, %eax
	movq	%rbx, %rdx
	leaq	.LC9(%rip), %rsi
	call	__isoc23_sscanf@PLT
	decl	%eax
	jne	.L672
	movss	.LC7(%rip), %xmm0
	mulss	(%rbx), %xmm0
.L670:
	movss	%xmm0, (%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10699:
	.size	_Z10parseInputiPPcRjS1_Rf, .-_Z10parseInputiPPcRjS1_Rf
	.section	.rodata.str1.1
.LC15:
	.string	"Test PASSED (device)\n"
.LC16:
	.string	"Test FAILED (device)\n"
.LC17:
	.string	"Test PASSED (thrust)\n"
.LC18:
	.string	"Test FAILED (thrust)\n"
.LC19:
	.string	"N: %u\n"
.LC20:
	.string	"M: %u\n"
.LC21:
	.string	"Elements per thread: %d\n"
.LC22:
	.string	"Tree depth: %d\n"
.LC23:
	.string	"Block sizes: %dx%d"
.LC24:
	.string	", %dx%d"
.LC25:
	.string	"\n"
.LC26:
	.string	"Grid sizes: %dx%d"
.LC27:
	.string	"GPU array lengths: %d"
.LC28:
	.string	", %d"
.LC29:
	.string	"Result (Device): %24.14f\n"
.LC30:
	.string	"Result (Thrust): %24.14f\n"
.LC31:
	.string	"Result (CPU):    %24.14f\n"
.LC32:
	.string	"Num_runs"
.LC33:
	.string	"Minimum"
.LC34:
	.string	"Average"
.LC35:
	.string	"Timing results  %12s  %12s  %8s\n"
.LC36:
	.string	"Device ex:      %12.6f  %12.6f  %8d\n"
.LC37:
	.string	"Device in:      %12.6f  %12.6f  %8d\n"
.LC38:
	.string	"Thrust:         %12.6f  %12.6f  %8d\n"
.LC39:
	.string	"CPU:            %12.6f  %12.6f  %8d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10700:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	leaq	-84(%rbp), %rcx
	leaq	-88(%rbp), %rdx
	pushq	%r13
	leaq	-80(%rbp), %r8
	pushq	%r12
	pushq	%rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$152, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	call	_Z10parseInputiPPcRjS1_Rf
	movl	-88(%rbp), %eax
	leal	0(,%rax,8), %edi
	call	_Z17allocateHostArrayj
	movl	$8, %edi
	movq	%rax, -104(%rbp)
	call	_Z17allocateHostArrayj
	movl	$8, %edi
	movq	%rax, -120(%rbp)
	call	_Z17allocateHostArrayj
	movl	$8, %edi
	movq	%rax, -128(%rbp)
	call	_Z17allocateHostArrayj
	movl	$73, %edi
	movq	%rax, -136(%rbp)
	call	srand@PLT
.L679:
	movl	-88(%rbp), %eax
	movl	%eax, -108(%rbp)
	cmpl	%eax, %ebx
	jnb	.L754
	call	rand@PLT
	movq	-104(%rbp), %rcx
	movl	%eax, %edx
	movl	%ebx, %eax
	incl	%ebx
	cvtsi2sdl	%edx, %xmm0
	movl	-84(%rbp), %edx
	divsd	.LC12(%rip), %xmm0
	subsd	.LC13(%rip), %xmm0
	cvtsi2sdq	%rdx, %xmm1
	addsd	%xmm0, %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rcx,%rax,8)
	jmp	.L679
.L754:
	xorl	%r12d, %r12d
.L683:
	leal	1(%r12), %esi
	cmpl	$1, %eax
	jbe	.L755
	addl	$16383, %eax
	movslq	%esi, %r12
	shrl	$14, %eax
	jmp	.L683
.L755:
	movslq	%esi, %rsi
	movq	%rsp, %rcx
	leaq	15(,%rsi,4), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L685:
	cmpq	%rcx, %rsp
	je	.L686
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L685
.L686:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L687
	orq	$0, -8(%rsp,%rax)
.L687:
	leaq	3(%rsp), %rbx
	movl	-108(%rbp), %ecx
	movq	%rbx, %rax
	andq	$-4, %rbx
	shrq	$2, %rax
	movl	%ecx, 0(,%rax,4)
	xorl	%eax, %eax
.L688:
	incq	%rax
	cmpl	%eax, %r12d
	jl	.L756
	movl	-4(%rbx,%rax,4), %ecx
	leal	16383(%rcx), %edx
	shrl	$14, %edx
	movl	%edx, (%rbx,%rax,4)
	jmp	.L688
.L756:
	movslq	%r12d, %rax
	movq	%rsp, %rdi
	imulq	$12, %rax, %rax
	leaq	15(%rax), %rdx
	movq	%rdx, %r8
	movq	%rdx, %rcx
	andq	$-4096, %r8
	andq	$-16, %rcx
	subq	%r8, %rdi
.L690:
	cmpq	%rdi, %rsp
	je	.L691
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L690
.L691:
	andl	$4095, %ecx
	subq	%rcx, %rsp
	testq	%rcx, %rcx
	je	.L692
	orq	$0, -8(%rsp,%rcx)
.L692:
	leaq	3(%rsp), %r14
	movq	%r14, %rcx
	andq	$-4, %r14
	shrq	$2, %rcx
	leaq	(%r14,%rax), %rdi
	movq	%rcx, -184(%rbp)
	movq	%r14, %rcx
.L693:
	cmpq	%rdi, %rcx
	je	.L757
	movl	$1, (%rcx)
	addq	$12, %rcx
	movl	$1, -8(%rcx)
	movl	$1, -4(%rcx)
	jmp	.L693
.L757:
	movq	%rdx, %rcx
	movq	%rsp, %rdi
	andq	$-4096, %rdx
	andq	$-16, %rcx
	subq	%rdx, %rdi
.L695:
	cmpq	%rdi, %rsp
	je	.L696
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L695
.L696:
	andl	$4095, %ecx
	subq	%rcx, %rsp
	testq	%rcx, %rcx
	je	.L697
	orq	$0, -8(%rsp,%rcx)
.L697:
	leaq	3(%rsp), %r13
	movq	%r13, %rcx
	andq	$-4, %r13
	shrq	$2, %rcx
	addq	%r13, %rax
	movq	%r13, %rdx
	movq	%rcx, -192(%rbp)
.L698:
	cmpq	%rax, %rdx
	je	.L758
	movl	$1, (%rdx)
	addq	$12, %rdx
	movl	$1, -8(%rdx)
	movl	$1, -4(%rdx)
	jmp	.L698
.L758:
	xorl	%edx, %edx
	xorl	%eax, %eax
.L700:
	cmpl	%eax, %r12d
	jle	.L759
	movl	4(%rbx,%rax,4), %ecx
	movl	$512, (%r14,%rdx)
	incq	%rax
	movl	%ecx, 0(%r13,%rdx)
	addq	$12, %rdx
	jmp	.L700
.L759:
	leaq	15(,%rsi,8), %rdx
	movl	$4096, -76(%rbp)
	movq	%rsp, %rcx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L702:
	cmpq	%rcx, %rsp
	je	.L703
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L702
.L703:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L704
	orq	$0, -8(%rsp,%rax)
.L704:
	movq	%rsp, -160(%rbp)
	xorl	%r15d, %r15d
.L705:
	movl	(%rbx,%r15,4), %eax
	leal	0(,%rax,8), %edi
	call	_Z19allocateDeviceArrayj
	movq	-160(%rbp), %rcx
	movq	%rax, (%rcx,%r15,8)
	incq	%r15
	cmpl	%r15d, %r12d
	jge	.L705
	xorl	%esi, %esi
	movss	.LC10(%rip), %xmm3
	xorps	%xmm0, %xmm0
	leaq	-68(%rbp), %r15
	movl	%esi, -140(%rbp)
	movss	%xmm3, -112(%rbp)
	movss	%xmm3, -144(%rbp)
.L706:
	movss	-80(%rbp), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L709
	leaq	-72(%rbp), %rax
	incl	-140(%rbp)
	movq	%rbx, %r9
	movl	%r12d, %r8d
	movss	%xmm0, -148(%rbp)
	pushq	%rcx
	movl	-88(%rbp), %ecx
	movq	-160(%rbp), %rdx
	movq	-120(%rbp), %rsi
	pushq	%r15
	pushq	%rax
	leaq	-76(%rbp), %rax
	movq	-104(%rbp), %rdi
	pushq	%rax
	pushq	%r13
	pushq	%r14
	call	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	movss	-68(%rbp), %xmm1
	addq	$48, %rsp
	movss	-148(%rbp), %xmm0
	movss	-72(%rbp), %xmm2
	minss	-144(%rbp), %xmm2
	addss	%xmm1, %xmm0
	minss	-112(%rbp), %xmm1
	movss	%xmm2, -144(%rbp)
	movss	%xmm1, -112(%rbp)
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jb	.L706
.L709:
	xorl	%edx, %edx
	movss	.LC10(%rip), %xmm3
	xorps	%xmm0, %xmm0
	leaq	-64(%rbp), %r15
	movl	%edx, -164(%rbp)
	movss	%xmm3, -148(%rbp)
.L713:
	movss	-80(%rbp), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L712
	movl	-88(%rbp), %edx
	movq	-128(%rbp), %rsi
	movq	%r15, %rcx
	movss	%xmm0, -152(%rbp)
	movq	-104(%rbp), %rdi
	incl	-164(%rbp)
	call	_Z15reductionThrustPdS_jRf
	movss	-64(%rbp), %xmm1
	movss	-152(%rbp), %xmm0
	addss	%xmm1, %xmm0
	minss	-148(%rbp), %xmm1
	movss	%xmm1, -148(%rbp)
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jb	.L713
.L712:
	xorl	%eax, %eax
	movss	.LC10(%rip), %xmm5
	xorps	%xmm0, %xmm0
	leaq	-60(%rbp), %r15
	movl	%eax, -168(%rbp)
	movss	%xmm5, -152(%rbp)
.L717:
	movss	-80(%rbp), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L716
	movl	-88(%rbp), %edx
	movq	-136(%rbp), %rsi
	movq	%r15, %rcx
	movss	%xmm0, -176(%rbp)
	movq	-104(%rbp), %rdi
	incl	-168(%rbp)
	call	_Z13reductionHostPdS_jRf
	movss	-60(%rbp), %xmm1
	movss	-176(%rbp), %xmm0
	addss	%xmm1, %xmm0
	minss	-152(%rbp), %xmm1
	movss	%xmm1, -152(%rbp)
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jb	.L717
.L716:
	movl	-84(%rbp), %eax
	movq	.LC3(%rip), %xmm1
	leaq	.LC15(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	mulsd	.LC14(%rip), %xmm0
	movq	-136(%rbp), %rax
	movsd	(%rax), %xmm2
	movq	-128(%rbp), %rax
	movsd	%xmm0, -176(%rbp)
	movsd	(%rax), %xmm0
	movq	-120(%rbp), %rax
	subsd	%xmm2, %xmm0
	andps	%xmm1, %xmm0
	movq	%xmm0, %r15
	movsd	(%rax), %xmm0
	subsd	%xmm2, %xmm0
	andps	%xmm1, %xmm0
	comisd	-176(%rbp), %xmm0
	jbe	.L752
	leaq	.LC16(%rip), %rsi
.L752:
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r15, %xmm7
	comisd	-176(%rbp), %xmm7
	leaq	.LC17(%rip), %rsi
	jbe	.L753
	leaq	.LC18(%rip), %rsi
.L753:
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$12, %r14
	movl	$1, %r15d
	call	__printf_chk@PLT
	movl	-88(%rbp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC19(%rip), %rsi
	call	__printf_chk@PLT
	movl	-84(%rbp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC20(%rip), %rsi
	call	__printf_chk@PLT
	movl	$32, %edx
	leaq	.LC21(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%r12d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC22(%rip), %rsi
	call	__printf_chk@PLT
	movq	-184(%rbp), %rax
	movl	$2, %edi
	leaq	.LC23(%rip), %rsi
	movl	4(,%rax,4), %edx
	movl	0(,%rax,4), %ecx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L725:
	cmpl	%r15d, %r12d
	jle	.L760
	movl	4(%r14), %edx
	movl	(%r14), %ecx
	leaq	.LC24(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incl	%r15d
	addq	$12, %r14
	call	__printf_chk@PLT
	jmp	.L725
.L760:
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$12, %r13
	call	__printf_chk@PLT
	movq	-192(%rbp), %rax
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	movl	$1, %r15d
	leaq	.LC24(%rip), %r14
	movl	4(,%rax,4), %edx
	movl	0(,%rax,4), %ecx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L727:
	cmpl	%r15d, %r12d
	jle	.L761
	movl	4(%r13), %edx
	movl	0(%r13), %ecx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r15d
	addq	$12, %r13
	call	__printf_chk@PLT
	jmp	.L727
.L761:
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	leaq	(%rbx,%r12,4), %r14
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	-108(%rbp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC27(%rip), %rsi
	leaq	.LC28(%rip), %r13
	call	__printf_chk@PLT
.L729:
	cmpq	%r14, %rbx
	je	.L762
	movl	4(%rbx), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	jmp	.L729
.L762:
	leaq	.LC25(%rip), %rbx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbx, %rsi
	call	__printf_chk@PLT
	movq	-120(%rbp), %rax
	movl	$2, %edi
	leaq	.LC29(%rip), %rsi
	movsd	(%rax), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	movq	-128(%rbp), %rax
	movl	$2, %edi
	leaq	.LC30(%rip), %rsi
	movsd	(%rax), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	movq	-136(%rbp), %rax
	movl	$2, %edi
	leaq	.LC31(%rip), %rsi
	movsd	(%rax), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC32(%rip), %r8
	xorl	%eax, %eax
	leaq	.LC33(%rip), %rcx
	leaq	.LC34(%rip), %rdx
	leaq	.LC35(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	-140(%rbp), %edx
	leaq	.LC36(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	-72(%rbp), %xmm0
	cvtss2sd	-144(%rbp), %xmm1
	call	__printf_chk@PLT
	movl	-140(%rbp), %edx
	leaq	.LC37(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	-68(%rbp), %xmm0
	cvtss2sd	-112(%rbp), %xmm1
	call	__printf_chk@PLT
	movl	-164(%rbp), %edx
	leaq	.LC38(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	-64(%rbp), %xmm0
	cvtss2sd	-148(%rbp), %xmm1
	call	__printf_chk@PLT
	movl	-168(%rbp), %edx
	leaq	.LC39(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	-60(%rbp), %xmm0
	cvtss2sd	-152(%rbp), %xmm1
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-104(%rbp), %rdi
	call	cudaFree@PLT
	movq	-120(%rbp), %rdi
	call	cudaFree@PLT
	movq	-128(%rbp), %rdi
	call	cudaFree@PLT
	movq	-136(%rbp), %rdi
	call	cudaFree@PLT
	movq	-160(%rbp), %rbx
	leaq	8(%rbx,%r12,8), %r12
.L731:
	movq	(%rbx), %rdi
	addq	$8, %rbx
	call	cudaFree@PLT
	cmpq	%r12, %rbx
	jne	.L731
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L732
	call	__stack_chk_fail@PLT
.L732:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE10700:
	.size	main, .-main
	.section	.rodata.str1.1
.LC40:
	.string	"_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv"
.LC41:
	.string	"_Z15reductionKernelILj512EEvPdS0_j"
.LC42:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo5beginE"
.LC43:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo3endE"
.LC44:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo6cbeginE"
.LC45:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo4cendE"
.LC46:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo6rbeginE"
.LC47:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo4rendE"
.LC48:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo7crbeginE"
.LC49:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__45__cpo5crendE"
.LC50:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__437_GLOBAL__N__b2df0c97_5_p1_cu_32ea07806ignoreE"
.LC51:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__419piecewise_constructE"
.LC52:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__48in_placeE"
.LC53:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__420unreachable_sentinelE"
.LC54:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std3__47nulloptE"
.LC55:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo4swapE"
.LC56:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo9iter_moveE"
.LC57:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo7advanceE"
.LC58:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo5beginE"
.LC59:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo3endE"
.LC60:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo6cbeginE"
.LC61:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo4cendE"
.LC62:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo9iter_swapE"
.LC63:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo4nextE"
.LC64:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo4prevE"
.LC65:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo4dataE"
.LC66:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo5cdataE"
.LC67:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo4sizeE"
.LC68:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo5ssizeE"
.LC69:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07804cuda3std6ranges3__45__cpo8distanceE"
.LC70:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS8cuda_cub3parE"
.LC71:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS8cuda_cub10par_nosyncE"
.LC72:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
.LC73:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_1E"
.LC74:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_2E"
.LC75:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_3E"
.LC76:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_4E"
.LC77:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_5E"
.LC78:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_6E"
.LC79:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_7E"
.LC80:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_8E"
.LC81:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders2_9E"
.LC82:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS12placeholders3_10E"
.LC83:
	.string	"_ZN35_INTERNAL_b2df0c97_5_p1_cu_32ea07806thrust20THRUST_200700_890_NS3seqE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10730:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC40(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC41(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15reductionKernelILj512EEvPdS0_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC42(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC43(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC44(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC45(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC46(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6rbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC47(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4rendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC48(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo7crbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC49(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5crendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC50(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__437_GLOBAL__N__b2df0c97_5_p1_cu_32ea07806ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC52(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC53(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__420unreachable_sentinelE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC54(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__47nulloptE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC55(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC56(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC57(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC58(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC59(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC60(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC61(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC62(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC63(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4nextE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC64(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4prevE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC65(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4dataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC66(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5cdataE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC67(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4sizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC68(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo5ssizeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC69(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo8distanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC70(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC71(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC72(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC73(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC74(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC75(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC76(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC77(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC78(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC79(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC80(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC81(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC82(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC83(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NSL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10730:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL10par_nosyncE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE, 1
_ZN6thrust20THRUST_200700_890_NS8cuda_cubL3parE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NSL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NSL3seqE, 1
_ZN6thrust20THRUST_200700_890_NSL3seqE:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL3_10E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_9E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_8E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_7E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_6E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_5E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_4E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_3E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_2E:
	.zero	1
	.type	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, @object
	.size	_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E, 1
_ZN6thrust20THRUST_200700_890_NS12placeholdersL2_1E:
	.zero	1
	.weak	_ZN4cuda3std3__47nulloptE
	.section	.rodata._ZN4cuda3std3__47nulloptE,"aG",@progbits,_ZN4cuda3std3__47nulloptE,comdat
	.type	_ZN4cuda3std3__47nulloptE, @gnu_unique_object
	.size	_ZN4cuda3std3__47nulloptE, 1
_ZN4cuda3std3__47nulloptE:
	.zero	1
	.hidden	InitializeInjectionNvtx2_fnptr
	.weak	InitializeInjectionNvtx2_fnptr
	.bss
	.align 8
	.type	InitializeInjectionNvtx2_fnptr, @object
	.size	InitializeInjectionNvtx2_fnptr, 8
InitializeInjectionNvtx2_fnptr:
	.zero	8
	.hidden	nvtxGlobals_v3
	.weak	nvtxGlobals_v3
	.section	.data.rel.local,"aw"
	.align 32
	.type	nvtxGlobals_v3, @object
	.size	nvtxGlobals_v3, 1168
nvtxGlobals_v3:
	.long	0
	.zero	4
	.quad	16
	.quad	nvtxEtiGetModuleFunctionTable_v3
	.quad	24
	.long	3
	.long	0
	.quad	nvtxEtiSetInjectionNvtxVersion_v3
	.quad	nvtxMarkEx_impl_init_v3
	.quad	nvtxMarkA_impl_init_v3
	.quad	nvtxMarkW_impl_init_v3
	.quad	nvtxRangeStartEx_impl_init_v3
	.quad	nvtxRangeStartA_impl_init_v3
	.quad	nvtxRangeStartW_impl_init_v3
	.quad	nvtxRangeEnd_impl_init_v3
	.quad	nvtxRangePushEx_impl_init_v3
	.quad	nvtxRangePushA_impl_init_v3
	.quad	nvtxRangePushW_impl_init_v3
	.quad	nvtxRangePop_impl_init_v3
	.quad	nvtxNameCategoryA_impl_init_v3
	.quad	nvtxNameCategoryW_impl_init_v3
	.quad	nvtxNameOsThreadA_impl_init_v3
	.quad	nvtxNameOsThreadW_impl_init_v3
	.quad	nvtxNameCuDeviceA_impl_init_v3
	.quad	nvtxNameCuDeviceW_impl_init_v3
	.quad	nvtxNameCuContextA_impl_init_v3
	.quad	nvtxNameCuContextW_impl_init_v3
	.quad	nvtxNameCuStreamA_impl_init_v3
	.quad	nvtxNameCuStreamW_impl_init_v3
	.quad	nvtxNameCuEventA_impl_init_v3
	.quad	nvtxNameCuEventW_impl_init_v3
	.quad	nvtxNameClDeviceA_impl_init_v3
	.quad	nvtxNameClDeviceW_impl_init_v3
	.quad	nvtxNameClContextA_impl_init_v3
	.quad	nvtxNameClContextW_impl_init_v3
	.quad	nvtxNameClCommandQueueA_impl_init_v3
	.quad	nvtxNameClCommandQueueW_impl_init_v3
	.quad	nvtxNameClMemObjectA_impl_init_v3
	.quad	nvtxNameClMemObjectW_impl_init_v3
	.quad	nvtxNameClSamplerA_impl_init_v3
	.quad	nvtxNameClSamplerW_impl_init_v3
	.quad	nvtxNameClProgramA_impl_init_v3
	.quad	nvtxNameClProgramW_impl_init_v3
	.quad	nvtxNameClEventA_impl_init_v3
	.quad	nvtxNameClEventW_impl_init_v3
	.quad	nvtxNameCudaDeviceA_impl_init_v3
	.quad	nvtxNameCudaDeviceW_impl_init_v3
	.quad	nvtxNameCudaStreamA_impl_init_v3
	.quad	nvtxNameCudaStreamW_impl_init_v3
	.quad	nvtxNameCudaEventA_impl_init_v3
	.quad	nvtxNameCudaEventW_impl_init_v3
	.quad	nvtxDomainMarkEx_impl_init_v3
	.quad	nvtxDomainRangeStartEx_impl_init_v3
	.quad	nvtxDomainRangeEnd_impl_init_v3
	.quad	nvtxDomainRangePushEx_impl_init_v3
	.quad	nvtxDomainRangePop_impl_init_v3
	.quad	nvtxDomainResourceCreate_impl_init_v3
	.quad	nvtxDomainResourceDestroy_impl_init_v3
	.quad	nvtxDomainNameCategoryA_impl_init_v3
	.quad	nvtxDomainNameCategoryW_impl_init_v3
	.quad	nvtxDomainRegisterStringA_impl_init_v3
	.quad	nvtxDomainRegisterStringW_impl_init_v3
	.quad	nvtxDomainCreateA_impl_init_v3
	.quad	nvtxDomainCreateW_impl_init_v3
	.quad	nvtxDomainDestroy_impl_init_v3
	.quad	nvtxInitialize_impl_init_v3
	.quad	nvtxDomainSyncUserCreate_impl_init_v3
	.quad	nvtxDomainSyncUserDestroy_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireStart_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireFailed_impl_init_v3
	.quad	nvtxDomainSyncUserAcquireSuccess_impl_init_v3
	.quad	nvtxDomainSyncUserReleasing_impl_init_v3
	.quad	0
	.quad	nvtxGlobals_v3+48
	.quad	nvtxGlobals_v3+56
	.quad	nvtxGlobals_v3+64
	.quad	nvtxGlobals_v3+72
	.quad	nvtxGlobals_v3+80
	.quad	nvtxGlobals_v3+88
	.quad	nvtxGlobals_v3+96
	.quad	nvtxGlobals_v3+104
	.quad	nvtxGlobals_v3+112
	.quad	nvtxGlobals_v3+120
	.quad	nvtxGlobals_v3+128
	.quad	nvtxGlobals_v3+136
	.quad	nvtxGlobals_v3+144
	.quad	nvtxGlobals_v3+152
	.quad	nvtxGlobals_v3+160
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+168
	.quad	nvtxGlobals_v3+176
	.quad	nvtxGlobals_v3+184
	.quad	nvtxGlobals_v3+192
	.quad	nvtxGlobals_v3+200
	.quad	nvtxGlobals_v3+208
	.quad	nvtxGlobals_v3+216
	.quad	nvtxGlobals_v3+224
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+232
	.quad	nvtxGlobals_v3+240
	.quad	nvtxGlobals_v3+248
	.quad	nvtxGlobals_v3+256
	.quad	nvtxGlobals_v3+264
	.quad	nvtxGlobals_v3+272
	.quad	nvtxGlobals_v3+280
	.quad	nvtxGlobals_v3+288
	.quad	nvtxGlobals_v3+296
	.quad	nvtxGlobals_v3+304
	.quad	nvtxGlobals_v3+312
	.quad	nvtxGlobals_v3+320
	.quad	nvtxGlobals_v3+328
	.quad	nvtxGlobals_v3+336
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+344
	.quad	nvtxGlobals_v3+352
	.quad	nvtxGlobals_v3+360
	.quad	nvtxGlobals_v3+368
	.quad	nvtxGlobals_v3+376
	.quad	nvtxGlobals_v3+384
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+392
	.quad	nvtxGlobals_v3+400
	.quad	nvtxGlobals_v3+408
	.quad	nvtxGlobals_v3+416
	.quad	nvtxGlobals_v3+424
	.quad	nvtxGlobals_v3+432
	.quad	nvtxGlobals_v3+440
	.quad	nvtxGlobals_v3+448
	.quad	nvtxGlobals_v3+456
	.quad	nvtxGlobals_v3+464
	.quad	nvtxGlobals_v3+472
	.quad	nvtxGlobals_v3+480
	.quad	nvtxGlobals_v3+488
	.quad	nvtxGlobals_v3+496
	.quad	nvtxGlobals_v3+504
	.quad	0
	.quad	0
	.quad	nvtxGlobals_v3+512
	.quad	nvtxGlobals_v3+520
	.quad	nvtxGlobals_v3+528
	.quad	nvtxGlobals_v3+536
	.quad	nvtxGlobals_v3+544
	.quad	nvtxGlobals_v3+552
	.quad	0
	.weak	_ZN4cuda3std3__420unreachable_sentinelE
	.section	.rodata._ZN4cuda3std3__420unreachable_sentinelE,"aG",@progbits,_ZN4cuda3std3__420unreachable_sentinelE,comdat
	.type	_ZN4cuda3std3__420unreachable_sentinelE, @gnu_unique_object
	.size	_ZN4cuda3std3__420unreachable_sentinelE, 1
_ZN4cuda3std3__420unreachable_sentinelE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5crendE
	.section	.rodata._ZN4cuda3std3__45__cpo5crendE,"aG",@progbits,_ZN4cuda3std3__45__cpo5crendE,comdat
	.type	_ZN4cuda3std3__45__cpo5crendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5crendE, 1
_ZN4cuda3std3__45__cpo5crendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo7crbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo7crbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo7crbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo7crbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo7crbeginE, 1
_ZN4cuda3std3__45__cpo7crbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4rendE
	.section	.rodata._ZN4cuda3std3__45__cpo4rendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4rendE,comdat
	.type	_ZN4cuda3std3__45__cpo4rendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4rendE, 1
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#include "hip/hip_runtime.h"
#include "math.h"
#include "stdio.h"
#include "stdlib.h"

#include "thrust/reduce.h"

#define BLOCK_SIZE 512
#define ELEMS_PER_THREAD 32

template <unsigned int blockSize>
__device__ void warpReduce(volatile double* s_data, unsigned int t) {
  if (blockSize >= 64) s_data[t] += s_data[t + 32];
  if (blockSize >= 32) s_data[t] += s_data[t + 16];
  if (blockSize >= 16) s_data[t] += s_data[t + 8];
  if (blockSize >= 8) s_data[t] += s_data[t + 4];
  if (blockSize >= 4) s_data[t] += s_data[t + 2];
  if (blockSize >= 2) s_data[t] += s_data[t + 1];
}

template <unsigned int blockSize>
__global__ void reductionKernel(double* d_in, double* d_out, unsigned int N) {
  extern __shared__ double s_data[];

  // Indexing
  unsigned int t = threadIdx.x;
  unsigned int i = blockIdx.x * (blockSize * 2) + threadIdx.x;
  unsigned int gridSize = blockSize * 2 * gridDim.x;

  // Load some elements into shared memory
  s_data[t] = 0.f;
  while (i + blockSize < N) {
    s_data[t] += d_in[i] + d_in[i + blockSize];
    i += gridSize;
  }
  if (i < N) s_data[t] += d_in[i];
  __syncthreads();

  // Unroll the loop
  if (blockSize >= 512) {
    if (t < 256) s_data[t] += s_data[t + 256];
    __syncthreads();
  }
  if (blockSize >= 256) {
    if (t < 128) s_data[t] += s_data[t + 128];
    __syncthreads();
  }
  if (blockSize >= 128) {
    if (t < 64) s_data[t] += s_data[t + 64];
    __syncthreads();
  }

  if (t < 32) warpReduce<blockSize>(s_data, t);

  // Write the result for each block into d_out
  if (t == 0) d_out[blockIdx.x] = s_data[0];
}

void reductionDevice(double* h_in, double* h_out, double** d_arr,
                     unsigned int N, int tree_depth, unsigned int* lengths,
                     dim3* dimBlock, dim3* dimGrid, unsigned int& shared_size,
                     float& dur_ex, float& dur_in) {
  // Setup timing
  hipEvent_t start_ex, end_ex, start_in, end_in;
  hipEventCreate(&start_ex);
  hipEventCreate(&end_ex);
  hipEventCreate(&start_in);
  hipEventCreate(&end_in);

  // Copy host array to device
  hipEventRecord(start_in, 0);
  hipMemcpy(d_arr[0], h_in, N * sizeof(double), hipMemcpyHostToDevice);

  // Perform reduction on device
  hipEventRecord(start_ex, 0);
  for (int i = 0; i < tree_depth; i++)
    reductionKernel<BLOCK_SIZE> <<<dimGrid[i], dimBlock[i], shared_size>>>
        (d_arr[i], d_arr[i + 1], lengths[i]);
  hipEventRecord(end_ex, 0);
  hipEventSynchronize(end_ex);

  // Copy device array back to host
  hipMemcpy(h_out, d_arr[tree_depth], sizeof(double), hipMemcpyDeviceToHost);
  hipEventRecord(end_in, 0);
  hipEventSynchronize(end_in);

  // Calculate durations
  hipEventElapsedTime(&dur_ex, start_ex, end_ex);
  hipEventElapsedTime(&dur_in, start_in, end_in);
}

void reductionThrust(double* h_in, double* h_out, unsigned int N,
                     float& dur_thrust) {
  // Setup timing
  hipEvent_t start_thrust, end_thrust;
  hipEventCreate(&start_thrust);
  hipEventCreate(&end_thrust);

  // Perform reduction on the device using thrust
  hipEventRecord(start_thrust, 0);
  *h_out = thrust::reduce(h_in, h_in + N);
  hipEventRecord(end_thrust, 0);
  hipEventSynchronize(end_thrust);

  // Calculate duration
  hipEventElapsedTime(&dur_thrust, start_thrust, end_thrust);
}

void reductionHost(double* h_in, double* h_out, unsigned int N,
                   float& dur_cpu) {
  // Setup timing
  hipEvent_t start_cpu, end_cpu;
  hipEventCreate(&start_cpu);
  hipEventCreate(&end_cpu);

  // Perform reduction on host
  hipEventRecord(start_cpu, 0);
  double result = 0.f;
  for (unsigned int i = 0; i < N; i++) result += h_in[i];
  *h_out = result;
  hipEventRecord(end_cpu, 0);
  hipEventSynchronize(end_cpu);

  // Calculate duration
  hipEventElapsedTime(&dur_cpu, start_cpu, end_cpu);
}

bool checkResults(double* h_out, double* h_ref, double eps) {
  double delta = abs(*h_out - *h_ref);
  if (delta > eps) return false;
  return true;
}

double* allocateHostArray(unsigned int size) {
  double* h_array;
  hipError_t code = hipHostMalloc(&h_array, size, hipHostMallocDefault);
  if (code != hipSuccess) {
    printf("Memory allocation on the host was unsuccessful.\n");
    exit(EXIT_FAILURE);
  }
  return h_array;
}

double* allocateDeviceArray(unsigned int size) {
  double* d_arr;
  hipError_t code = hipMalloc(&d_arr, size);
  if (code != hipSuccess) {
    printf("Memory allocation on the device was unsuccessful.\n");
    exit(EXIT_FAILURE);
  }
  return d_arr;
}

void exitUsage() {
  printf("Usage: ./p2 [[M N] [dur_max]]\n");
  exit(EXIT_SUCCESS);
}

void parseInput(int argc, char** argv, unsigned int& N, unsigned int& M,
                float& dur_max) {
  if (argc == 1) {
    N = 50000000;
    M = 5;
    dur_max = 1000.f;
    return;
  }
  if (argc != 3 && argc != 4) exitUsage();
  if (sscanf(argv[1], "%u", &N) != 1) exitUsage();
  if (sscanf(argv[2], "%u", &M) != 1) exitUsage();
  if (argc == 3) {
    dur_max = 1000.f;
    return;
  }
  if (sscanf(argv[3], "%f", &dur_max) != 1) exitUsage();
  dur_max *= 1000;
}

int main(int argc, char** argv) {
  // Parse command line arguments
  unsigned int N, M;
  float dur_max;
  parseInput(argc, argv, N, M, dur_max);

  // Allocate host arrays
  double* h_in = allocateHostArray(N * sizeof(double));
  double* h_device = allocateHostArray(sizeof(double));
  double* h_thrust = allocateHostArray(sizeof(double));
  double* h_cpu = allocateHostArray(sizeof(double));

  // Setup host array and fill with random numbers
  srand(73);
  for (unsigned int i = 0; i < N; i++)
    h_in[i] = ((double)rand() / RAND_MAX - 0.5f) * 2 * M;

  // Calculate the tree depth
  int tree_depth = 0;
  {
    unsigned int length = N;
    while (length > 1) {
      length = (length + (BLOCK_SIZE * ELEMS_PER_THREAD) - 1) /
               (BLOCK_SIZE * ELEMS_PER_THREAD);
      tree_depth++;
    }
  }

  // Calculate the lengths of the device arrays
  unsigned int lengths[tree_depth + 1];
  lengths[0] = N;
  for (int i = 1; i < tree_depth + 1; i++)
    lengths[i] = (lengths[i - 1] + (BLOCK_SIZE * ELEMS_PER_THREAD) - 1) /
                 (BLOCK_SIZE * ELEMS_PER_THREAD);

  // Setup grid
  dim3 dimBlock[tree_depth];
  dim3 dimGrid[tree_depth];
  for (int i = 0; i < tree_depth; i++) {
    dimBlock[i].x = BLOCK_SIZE;
    dimGrid[i].x = lengths[i + 1];
  }

  // Shared memory size
  unsigned int shared_size = BLOCK_SIZE * sizeof(double);

  // Allocate device arrays
  double* d_arr[tree_depth + 1];
  for (int i = 0; i < tree_depth + 1; i++)
    d_arr[i] = allocateDeviceArray(lengths[i] * sizeof(double));

  // Setup timing
  int nruns_device = 0;
  int nruns_thrust = 0;
  int nruns_cpu = 0;
  float dur_ex, dur_in, dur_thrust, dur_cpu;
  float dur_ex_total = 0.f;
  float dur_in_total = 0.f;
  float dur_thrust_total = 0.f;
  float dur_cpu_total = 0.f;
  float dur_ex_min = 1e99;
  float dur_in_min = 1e99;
  float dur_thrust_min = 1e99;
  float dur_cpu_min = 1e99;

  // Vector reduction on the device
  while (dur_in_total < dur_max) {
    nruns_device++;
    reductionDevice(h_in, h_device, d_arr, N, tree_depth, lengths, dimBlock,
                    dimGrid, shared_size, dur_ex, dur_in);
    dur_ex_total += dur_ex;
    dur_in_total += dur_in;
    if (dur_ex < dur_ex_min) dur_ex_min = dur_ex;
    if (dur_in < dur_in_min) dur_in_min = dur_in;
    if (dur_in_total <= 0.f) break;
  }

  // Vector reduction on the device with thrust
  while (dur_thrust_total < dur_max) {
    nruns_thrust++;
    reductionThrust(h_in, h_thrust, N, dur_thrust);
    dur_thrust_total += dur_thrust;
    if (dur_thrust < dur_thrust_min) dur_thrust_min = dur_thrust;
    if (dur_thrust_total <= 0.f) break;
  }

  // Vector reduction on CPU
  while (dur_cpu_total < dur_max) {
    nruns_cpu++;
    reductionHost(h_in, h_cpu, N, dur_cpu);
    dur_cpu_total += dur_cpu;
    if (dur_cpu < dur_cpu_min) dur_cpu_min = dur_cpu;
    if (dur_cpu_total <= 0.f) break;
  }

  // Compare device and host results
  double eps = (double)M * 0.001f;
  bool passed_device = checkResults(h_device, h_cpu, eps);
  bool passed_thrust = checkResults(h_thrust, h_cpu, eps);
  if (passed_device)
    printf("Test PASSED (device)\n");
  else
    printf("Test FAILED (device)\n");
  if (passed_thrust)
    printf("Test PASSED (thrust)\n");
  else
    printf("Test FAILED (thrust)\n");

  // Print stuff
  printf("N: %u\n", N);
  printf("M: %u\n", M);
  printf("Elements per thread: %d\n", ELEMS_PER_THREAD);
  printf("Tree depth: %d\n", tree_depth);
  printf("Block sizes: %dx%d", dimBlock[0].y, dimBlock[0].x);
  for (int i = 1; i < tree_depth; i++)
    printf(", %dx%d", dimBlock[i].y, dimBlock[i].x);
  printf("\n");
  printf("Grid sizes: %dx%d", dimGrid[0].y, dimGrid[0].x);
  for (int i = 1; i < tree_depth; i++)
    printf(", %dx%d", dimGrid[i].y, dimGrid[i].x);
  printf("\n");
  printf("GPU array lengths: %d", lengths[0]);
  for (int i = 1; i < tree_depth + 1; i++) printf(", %d", lengths[i]);
  printf("\n");
  printf("Result (Device): %24.14f\n", *h_device);
  printf("Result (Thrust): %24.14f\n", *h_thrust);
  printf("Result (CPU):    %24.14f\n", *h_cpu);
  printf("Timing results  %12s  %12s  %8s\n", "Average", "Minimum", "Num_runs");
  printf("Device ex:      %12.6f  %12.6f  %8d\n", dur_ex, dur_ex_min,
         nruns_device);
  printf("Device in:      %12.6f  %12.6f  %8d\n", dur_in, dur_in_min,
         nruns_device);
  printf("Thrust:         %12.6f  %12.6f  %8d\n", dur_thrust, dur_thrust_min,
         nruns_thrust);
  printf("CPU:            %12.6f  %12.6f  %8d\n", dur_cpu, dur_cpu_min,
         nruns_cpu);
  printf("\n");

  // Free arrays
  hipFree(h_in);
  hipFree(h_device);
  hipFree(h_thrust);
  hipFree(h_cpu);
  for (int i = 0; i < tree_depth + 1; i++) hipFree(d_arr[i]);

  return 0;
}

	.text
	.file	"p1.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_ # -- Begin function _Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	.type	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_,@function
_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_: # @_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 48(%rsp)                   # 8-byte Spill
	movl	%r8d, %ebp
	movl	%ecx, %r15d
	movq	%rdx, %r12
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, %r14
	leaq	64(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	(%r12), %rdi
	movl	%r15d, %edx
	shlq	$3, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebp, 12(%rsp)                  # 4-byte Spill
	testl	%ebp, %ebp
	jle	.LBB0_5
# %bb.1:                                # %.lr.ph.preheader
	movq	144(%rsp), %rbx
	movq	136(%rsp), %r14
	movq	128(%rsp), %r15
	movl	12(%rsp), %ebp                  # 4-byte Reload
	movl	$2, %r13d
	xorl	%r12d, %r12d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	-8(%r14,%r13,4), %rdi
	movl	(%r14,%r13,4), %esi
	movq	-8(%r15,%r13,4), %rdx
	movl	(%r15,%r13,4), %ecx
	movl	(%rbx), %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=1
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r12,8), %rdi
	movq	8(%rax,%r12,8), %rsi
	movq	48(%rsp), %rax                  # 8-byte Reload
	movl	(%rax,%r12,4), %edx
	callq	_Z30__device_stub__reductionKernelILj512EEvPdS0_j
.LBB0_4:                                #   in Loop: Header=BB0_2 Depth=1
	incq	%r12
	addq	$3, %r13
	cmpq	%r12, %rbp
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movslq	12(%rsp), %rax                  # 4-byte Folded Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	(%rcx,%rax,8), %rsi
	movl	$8, %edx
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	152(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	56(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	160(%rsp), %rdi
	callq	hipEventElapsedTime
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_, .Lfunc_end0-_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	.cfi_endproc
                                        # -- End function
	.section	.text._Z30__device_stub__reductionKernelILj512EEvPdS0_j,"axG",@progbits,_Z30__device_stub__reductionKernelILj512EEvPdS0_j,comdat
	.weak	_Z30__device_stub__reductionKernelILj512EEvPdS0_j # -- Begin function _Z30__device_stub__reductionKernelILj512EEvPdS0_j
	.type	_Z30__device_stub__reductionKernelILj512EEvPdS0_j,@function
_Z30__device_stub__reductionKernelILj512EEvPdS0_j: # @_Z30__device_stub__reductionKernelILj512EEvPdS0_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15reductionKernelILj512EEvPdS0_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__reductionKernelILj512EEvPdS0_j, .Lfunc_end1-_Z30__device_stub__reductionKernelILj512EEvPdS0_j
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z15reductionThrustPdS_jRf      # -- Begin function _Z15reductionThrustPdS_jRf
	.type	_Z15reductionThrustPdS_jRf,@function
_Z15reductionThrustPdS_jRf:             # @_Z15reductionThrustPdS_jRf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movl	%edx, %ebp
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%ebp, %ebp
	je	.LBB2_1
# %bb.2:                                # %.lr.ph.i.i.i.i.i.i.i.preheader
	movl	%ebp, %eax
	shlq	$3, %rax
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB2_3:                                # %.lr.ph.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	addsd	(%r15,%rcx), %xmm0
	addq	$8, %rcx
	cmpq	%rcx, %rax
	jne	.LBB2_3
	jmp	.LBB2_4
.LBB2_1:
	xorpd	%xmm0, %xmm0
.LBB2_4:                                # %_ZN6thrust6reduceIPdEENS_15iterator_traitsIT_E10value_typeES3_S3_.exit
	movsd	%xmm0, (%r14)
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z15reductionThrustPdS_jRf, .Lfunc_end2-_Z15reductionThrustPdS_jRf
	.cfi_endproc
                                        # -- End function
	.globl	_Z13reductionHostPdS_jRf        # -- Begin function _Z13reductionHostPdS_jRf
	.type	_Z13reductionHostPdS_jRf,@function
_Z13reductionHostPdS_jRf:               # @_Z13reductionHostPdS_jRf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movl	%edx, %ebp
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%ebp, %ebp
	je	.LBB3_1
# %bb.3:                                # %.lr.ph.preheader
	movl	%ebp, %eax
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB3_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addsd	(%r15,%rcx,8), %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB3_4
	jmp	.LBB3_2
.LBB3_1:
	xorpd	%xmm0, %xmm0
.LBB3_2:                                # %._crit_edge
	movsd	%xmm0, (%r14)
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z13reductionHostPdS_jRf, .Lfunc_end3-_Z13reductionHostPdS_jRf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z12checkResultsPdS_d
.LCPI4_0:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	_Z12checkResultsPdS_d
	.type	_Z12checkResultsPdS_d,@function
_Z12checkResultsPdS_d:                  # @_Z12checkResultsPdS_d
	.cfi_startproc
# %bb.0:
	movsd	(%rdi), %xmm1                   # xmm1 = mem[0],zero
	subsd	(%rsi), %xmm1
	andpd	.LCPI4_0(%rip), %xmm1
	ucomisd	%xmm0, %xmm1
	setbe	%al
	retq
.Lfunc_end4:
	.size	_Z12checkResultsPdS_d, .Lfunc_end4-_Z12checkResultsPdS_d
	.cfi_endproc
                                        # -- End function
	.globl	_Z17allocateHostArrayj          # -- Begin function _Z17allocateHostArrayj
	.type	_Z17allocateHostArrayj,@function
_Z17allocateHostArrayj:                 # @_Z17allocateHostArrayj
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edi, %esi
	movq	%rsp, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	(%rsp), %rax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.LBB5_2:
	.cfi_def_cfa_offset 16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	_Z17allocateHostArrayj, .Lfunc_end5-_Z17allocateHostArrayj
	.cfi_endproc
                                        # -- End function
	.globl	_Z19allocateDeviceArrayj        # -- Begin function _Z19allocateDeviceArrayj
	.type	_Z19allocateDeviceArrayj,@function
_Z19allocateDeviceArrayj:               # @_Z19allocateDeviceArrayj
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edi, %esi
	movq	%rsp, %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	(%rsp), %rax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.LBB6_2:
	.cfi_def_cfa_offset 16
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end6:
	.size	_Z19allocateDeviceArrayj, .Lfunc_end6-_Z19allocateDeviceArrayj
	.cfi_endproc
                                        # -- End function
	.globl	_Z9exitUsagev                   # -- Begin function _Z9exitUsagev
	.type	_Z9exitUsagev,@function
_Z9exitUsagev:                          # @_Z9exitUsagev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end7:
	.size	_Z9exitUsagev, .Lfunc_end7-_Z9exitUsagev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10parseInputiPPcRjS1_Rf
.LCPI8_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	_Z10parseInputiPPcRjS1_Rf
	.type	_Z10parseInputiPPcRjS1_Rf,@function
_Z10parseInputiPPcRjS1_Rf:              # @_Z10parseInputiPPcRjS1_Rf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %rbx
	movq	%rcx, %r12
	cmpl	$1, %edi
	jne	.LBB8_2
# %bb.1:
	movl	$50000000, (%rdx)               # imm = 0x2FAF080
	movl	$5, (%r12)
	jmp	.LBB8_6
.LBB8_2:
	movl	%edi, %r15d
	leal	-5(%r15), %eax
	cmpl	$-3, %eax
	jbe	.LBB8_10
# %bb.3:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	movl	$.L.str.3, %esi
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	cmpl	$1, %eax
	jne	.LBB8_10
# %bb.4:
	movq	16(%r14), %rdi
	movl	$.L.str.3, %esi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	cmpl	$1, %eax
	jne	.LBB8_10
# %bb.5:
	cmpl	$3, %r15d
	jne	.LBB8_7
.LBB8_6:
	movss	.LCPI8_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	jmp	.LBB8_9
.LBB8_7:
	movq	24(%r14), %rdi
	movl	$.L.str.4, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_sscanf
	cmpl	$1, %eax
	jne	.LBB8_10
# %bb.8:
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI8_0(%rip), %xmm0
.LBB8_9:
	movss	%xmm0, (%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB8_10:
	.cfi_def_cfa_offset 48
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.Lfunc_end8:
	.size	_Z10parseInputiPPcRjS1_Rf, .Lfunc_end8-_Z10parseInputiPPcRjS1_Rf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI9_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI9_1:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI9_3:
	.quad	0x3f50624de0000000              # double 0.0010000000474974513
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI9_2:
	.long	0x7f800000                      # float +Inf
.LCPI9_5:
	.long	0x00000000                      # float 0
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI9_4:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$184, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	leaq	-56(%rbp), %rbx
	leaq	-76(%rbp), %rcx
	leaq	-72(%rbp), %r8
	movq	%rbx, %rdx
	callq	_Z10parseInputiPPcRjS1_Rf
	movl	(%rbx), %edi
	shll	$3, %edi
	callq	_Z17allocateHostArrayj
	movq	%rax, %r15
	movl	$8, %edi
	callq	_Z17allocateHostArrayj
	movq	%rax, -144(%rbp)                # 8-byte Spill
	movl	$8, %edi
	callq	_Z17allocateHostArrayj
	movq	%rax, -136(%rbp)                # 8-byte Spill
	movl	$8, %edi
	callq	_Z17allocateHostArrayj
	movq	%rax, -128(%rbp)                # 8-byte Spill
	movl	$73, %edi
	callq	srand
	cmpl	$0, (%rbx)
	je	.LBB9_1
# %bb.10:                               # %.lr.ph.preheader
	xorl	%ebx, %ebx
.LBB9_11:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI9_0(%rip), %xmm0
	addsd	.LCPI9_1(%rip), %xmm0
	addsd	%xmm0, %xmm0
	movl	-76(%rbp), %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%r15,%rbx,8)
	incq	%rbx
	movl	-56(%rbp), %eax
	cmpq	%rax, %rbx
	jb	.LBB9_11
# %bb.2:                                # %.preheader
	xorl	%edi, %edi
	cmpl	$2, %eax
	jb	.LBB9_5
# %bb.3:                                # %.lr.ph148.preheader
	xorl	%edi, %edi
.LBB9_4:                                # %.lr.ph148
                                        # =>This Inner Loop Header: Depth=1
	addl	$16383, %eax                    # imm = 0x3FFF
	movl	%eax, %ecx
	shrl	$14, %ecx
	incl	%edi
	cmpl	$32767, %eax                    # imm = 0x7FFF
	movl	%ecx, %eax
	ja	.LBB9_4
	jmp	.LBB9_5
.LBB9_1:
	xorl	%edi, %edi
.LBB9_5:                                # %._crit_edge
	movq	%rsp, -200(%rbp)                # 8-byte Spill
	leal	1(%rdi), %r12d
	movq	%rsp, %rax
	leaq	15(,%r12,4), %rcx
	andq	$-16, %rcx
	movq	%rax, %r13
	subq	%rcx, %r13
	movq	%r13, %rsp
	negq	%rcx
	movl	-56(%rbp), %edx
	movl	%edx, -156(%rbp)                # 4-byte Spill
	movl	%edx, (%rax,%rcx)
	movl	%edi, %eax
	testl	%edi, %edi
	movq	%rdi, -120(%rbp)                # 8-byte Spill
	movq	%r15, -168(%rbp)                # 8-byte Spill
	je	.LBB9_19
# %bb.6:                                # %.lr.ph153.preheader
	movq	%rax, -88(%rbp)                 # 8-byte Spill
	movl	(%r13), %eax
	movl	$1, %ecx
.LBB9_7:                                # %.lr.ph153
                                        # =>This Inner Loop Header: Depth=1
	addl	$16383, %eax                    # imm = 0x3FFF
	shrl	$14, %eax
	movl	%eax, (%r13,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB9_7
# %bb.8:                                # %._crit_edge154
	movq	%rsp, %r14
	movq	-88(%rbp), %rax                 # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	15(,%rax,4), %rcx
	andq	$-16, %rcx
	subq	%rcx, %r14
	movq	%r14, %rsp
	testl	%edi, %edi
	je	.LBB9_9
# %bb.12:
	leaq	(%r14,%rax,4), %rcx
	movabsq	$4294967297, %rax               # imm = 0x100000001
	movq	%r14, %rdx
.LBB9_13:                               # =>This Inner Loop Header: Depth=1
	movq	%rax, (%rdx)
	movl	$1, 8(%rdx)
	addq	$12, %rdx
	cmpq	%rcx, %rdx
	jne	.LBB9_13
# %bb.14:
	movq	%rsp, %rsi
	movq	-88(%rbp), %rcx                 # 8-byte Reload
	leaq	(,%rcx,4), %rcx
	leaq	(%rcx,%rcx,2), %rdx
	addq	$15, %rdx
	andq	$-16, %rdx
	subq	%rdx, %rsi
	movq	%rsi, %rsp
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%rsi,%rcx), %rdx
	movq	%rsi, -96(%rbp)                 # 8-byte Spill
.LBB9_15:                               # =>This Inner Loop Header: Depth=1
	movq	%rax, (%rsi)
	movl	$1, 8(%rsi)
	addq	$12, %rsi
	cmpq	%rdx, %rsi
	jne	.LBB9_15
# %bb.16:                               # %.loopexit
	testl	%edi, %edi
	je	.LBB9_20
# %bb.17:                               # %.lr.ph157.preheader
	leaq	4(%r13), %rax
	xorl	%edx, %edx
	movq	-96(%rbp), %rdi                 # 8-byte Reload
.LBB9_18:                               # %.lr.ph157
                                        # =>This Inner Loop Header: Depth=1
	movl	$512, (%r14,%rdx)               # imm = 0x200
	movl	(%rax), %esi
	movl	%esi, (%rdi,%rdx)
	addq	$12, %rdx
	addq	$4, %rax
	cmpq	%rdx, %rcx
	jne	.LBB9_18
	jmp	.LBB9_20
.LBB9_19:                               # %._crit_edge154.thread
	movq	%rsp, %r14
	leaq	(%rax,%rax,2), %rax
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	subq	%rax, %r14
	movq	%r14, %rsp
	leaq	-48(%rbp), %rax
	movq	%rax, -96(%rbp)                 # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, -88(%rbp)                 # 8-byte Spill
	jmp	.LBB9_20
.LBB9_9:
	xorl	%eax, %eax
	movq	%rax, -88(%rbp)                 # 8-byte Spill
	leaq	-48(%rbp), %rax
	movq	%rax, -96(%rbp)                 # 8-byte Spill
.LBB9_20:                               # %._crit_edge158
	movl	$4096, -160(%rbp)               # imm = 0x1000
	movq	%rsp, %r15
	leaq	15(,%r12,8), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	xorl	%ebx, %ebx
.LBB9_21:                               # =>This Inner Loop Header: Depth=1
	movl	(%r13,%rbx,4), %edi
	shll	$3, %edi
	callq	_Z19allocateDeviceArrayj
	movq	%rax, (%r15,%rbx,8)
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB9_21
# %bb.22:
	movq	%r15, -176(%rbp)                # 8-byte Spill
	movq	%r13, -184(%rbp)                # 8-byte Spill
	movq	%r12, -192(%rbp)                # 8-byte Spill
	movss	.LCPI9_2(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	xorl	%r12d, %r12d
	leaq	-112(%rbp), %r13
	leaq	-160(%rbp), %rbx
	xorps	%xmm3, %xmm3
	movaps	%xmm2, %xmm4
	movq	-168(%rbp), %r15                # 8-byte Reload
.LBB9_23:                               # =>This Inner Loop Header: Depth=1
	movss	-72(%rbp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm3, %xmm0
	jbe	.LBB9_24
# %bb.25:                               #   in Loop: Header=BB9_23 Depth=1
	incl	%r12d
	movl	-56(%rbp), %ecx
	subq	$8, %rsp
	movq	%r15, %rdi
	movq	-144(%rbp), %rsi                # 8-byte Reload
	movq	-176(%rbp), %rdx                # 8-byte Reload
	movq	-120(%rbp), %r8                 # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movq	-184(%rbp), %r9                 # 8-byte Reload
	leaq	-108(%rbp), %rax
	pushq	%rax
	pushq	%r13
	pushq	%rbx
	pushq	-96(%rbp)                       # 8-byte Folded Reload
	pushq	%r14
	movss	%xmm2, -68(%rbp)                # 4-byte Spill
	movss	%xmm3, -52(%rbp)                # 4-byte Spill
	movss	%xmm4, -64(%rbp)                # 4-byte Spill
	callq	_Z15reductionDevicePdS_PS_jiPjP4dim3S3_RjRfS5_
	movss	-52(%rbp), %xmm3                # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	addq	$48, %rsp
	movss	-112(%rbp), %xmm1               # xmm1 = mem[0],zero,zero,zero
	movss	-108(%rbp), %xmm0               # xmm0 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm3
	minss	-68(%rbp), %xmm1                # 4-byte Folded Reload
	minss	-64(%rbp), %xmm0                # 4-byte Folded Reload
	xorps	%xmm2, %xmm2
	ucomiss	%xmm3, %xmm2
	movaps	%xmm1, %xmm2
	movaps	%xmm0, %xmm4
	jb	.LBB9_23
	jmp	.LBB9_26
.LBB9_24:
	movaps	%xmm2, %xmm1
	movaps	%xmm4, %xmm0
.LBB9_26:
	movss	%xmm1, -152(%rbp)               # 4-byte Spill
	movss	%xmm0, -68(%rbp)                # 4-byte Spill
	movss	.LCPI9_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorl	%ebx, %ebx
	leaq	-104(%rbp), %r13
	xorps	%xmm2, %xmm2
.LBB9_27:                               # =>This Inner Loop Header: Depth=1
	movss	-72(%rbp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm2, %xmm0
	jbe	.LBB9_28
# %bb.29:                               #   in Loop: Header=BB9_27 Depth=1
	incl	%ebx
	movl	-56(%rbp), %edx
	movq	%r15, %rdi
	movq	-136(%rbp), %rsi                # 8-byte Reload
	movq	%r13, %rcx
	movss	%xmm1, -64(%rbp)                # 4-byte Spill
	movss	%xmm2, -52(%rbp)                # 4-byte Spill
	callq	_Z15reductionThrustPdS_jRf
	movss	-52(%rbp), %xmm2                # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	-104(%rbp), %xmm0               # xmm0 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	minss	-64(%rbp), %xmm0                # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	ucomiss	%xmm2, %xmm1
	movaps	%xmm0, %xmm1
	jb	.LBB9_27
	jmp	.LBB9_30
.LBB9_28:
	movaps	%xmm1, %xmm0
.LBB9_30:
	movss	%xmm0, -148(%rbp)               # 4-byte Spill
	movss	.LCPI9_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorl	%r13d, %r13d
	xorps	%xmm2, %xmm2
.LBB9_31:                               # =>This Inner Loop Header: Depth=1
	movss	-72(%rbp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm2, %xmm0
	jbe	.LBB9_32
# %bb.33:                               #   in Loop: Header=BB9_31 Depth=1
	incl	%r13d
	movl	-56(%rbp), %edx
	movq	%r15, %rdi
	movq	-128(%rbp), %rsi                # 8-byte Reload
	leaq	-100(%rbp), %rcx
	movss	%xmm1, -64(%rbp)                # 4-byte Spill
	movss	%xmm2, -52(%rbp)                # 4-byte Spill
	callq	_Z13reductionHostPdS_jRf
	movss	-52(%rbp), %xmm2                # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movss	-100(%rbp), %xmm0               # xmm0 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm2
	minss	-64(%rbp), %xmm0                # 4-byte Folded Reload
	xorps	%xmm1, %xmm1
	ucomiss	%xmm2, %xmm1
	movaps	%xmm0, %xmm1
	jb	.LBB9_31
	jmp	.LBB9_34
.LBB9_32:
	movaps	%xmm1, %xmm0
.LBB9_34:
	movss	%xmm0, -52(%rbp)                # 4-byte Spill
	movl	-76(%rbp), %eax
	xorps	%xmm3, %xmm3
	cvtsi2sd	%rax, %xmm3
	mulsd	.LCPI9_3(%rip), %xmm3
	movsd	%xmm3, -64(%rbp)                # 8-byte Spill
	movq	-144(%rbp), %rax                # 8-byte Reload
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	movq	-128(%rbp), %rax                # 8-byte Reload
	movsd	(%rax), %xmm1                   # xmm1 = mem[0],zero
	subsd	%xmm1, %xmm0
	movapd	.LCPI9_4(%rip), %xmm2           # xmm2 = [NaN,NaN]
	andpd	%xmm2, %xmm0
	ucomisd	%xmm3, %xmm0
	movq	-136(%rbp), %rax                # 8-byte Reload
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	subsd	%xmm1, %xmm0
	andpd	%xmm2, %xmm0
	movapd	%xmm0, -224(%rbp)               # 16-byte Spill
	movl	$.Lstr.4, %eax
	movl	$.Lstr.3, %edi
	cmovbeq	%rax, %rdi
	callq	puts@PLT
	movapd	-224(%rbp), %xmm0               # 16-byte Reload
	ucomisd	-64(%rbp), %xmm0                # 8-byte Folded Reload
	movl	$.Lstr.6, %eax
	movl	$.Lstr.5, %edi
	cmovbeq	%rax, %rdi
	callq	puts@PLT
	movl	-56(%rbp), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	-76(%rbp), %esi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.11, %edi
	movl	$32, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.12, %edi
	movq	-120(%rbp), %r15                # 8-byte Reload
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	(%r14), %edx
	movl	4(%r14), %esi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$2, %r15d
	jb	.LBB9_40
# %bb.35:                               # %.lr.ph162.preheader
	addq	$16, %r14
	movq	-88(%rbp), %rax                 # 8-byte Reload
	leaq	-1(%rax), %r15
.LBB9_36:                               # %.lr.ph162
                                        # =>This Inner Loop Header: Depth=1
	movl	-4(%r14), %edx
	movl	(%r14), %esi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	addq	$12, %r14
	decq	%r15
	jne	.LBB9_36
# %bb.37:                               # %._crit_edge163
	movl	$10, %edi
	callq	putchar@PLT
	movq	-96(%rbp), %r15                 # 8-byte Reload
	movl	(%r15), %edx
	movl	4(%r15), %esi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$2, -120(%rbp)                  # 4-byte Folded Reload
	movq	-88(%rbp), %r14                 # 8-byte Reload
	jb	.LBB9_41
# %bb.38:                               # %.lr.ph166.preheader
	addq	$16, %r15
	decq	%r14
.LBB9_39:                               # %.lr.ph166
                                        # =>This Inner Loop Header: Depth=1
	movl	-4(%r15), %edx
	movl	(%r15), %esi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	addq	$12, %r15
	decq	%r14
	jne	.LBB9_39
	jmp	.LBB9_41
.LBB9_40:                               # %._crit_edge167.critedge
	movl	$10, %edi
	callq	putchar@PLT
	movq	-96(%rbp), %rax                 # 8-byte Reload
	movl	(%rax), %edx
	movl	4(%rax), %esi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
.LBB9_41:                               # %._crit_edge167
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.17, %edi
	movl	-156(%rbp), %esi                # 4-byte Reload
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, -120(%rbp)                  # 4-byte Folded Reload
	movq	-184(%rbp), %r15                # 8-byte Reload
	je	.LBB9_44
# %bb.42:                               # %.lr.ph171.preheader
	movl	$1, %r14d
.LBB9_43:                               # %.lr.ph171
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r14,4), %esi
	movl	$.L.str.18, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, -192(%rbp)                # 8-byte Folded Reload
	jne	.LBB9_43
.LBB9_44:                               # %._crit_edge172
	movl	$10, %edi
	callq	putchar@PLT
	movq	-144(%rbp), %r15                # 8-byte Reload
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.19, %edi
	movb	$1, %al
	callq	printf
	movq	-136(%rbp), %rax                # 8-byte Reload
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.20, %edi
	movb	$1, %al
	callq	printf
	movq	-128(%rbp), %rax                # 8-byte Reload
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.21, %edi
	movb	$1, %al
	callq	printf
	xorl	%r14d, %r14d
	movl	$.L.str.22, %edi
	movl	$.L.str.23, %esi
	movl	$.L.str.24, %edx
	movl	$.L.str.25, %ecx
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	-112(%rbp), %xmm0
	cvtss2sd	-152(%rbp), %xmm1               # 4-byte Folded Reload
	movl	$.L.str.26, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	-108(%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	-68(%rbp), %xmm1                # 4-byte Folded Reload
	movl	$.L.str.27, %edi
	movl	%r12d, %esi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	-104(%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	-148(%rbp), %xmm1               # 4-byte Folded Reload
	movl	$.L.str.28, %edi
	movl	%ebx, %esi
	movb	$2, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	-100(%rbp), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	-52(%rbp), %xmm1                # 4-byte Folded Reload
	movl	$.L.str.29, %edi
	movl	%r13d, %esi
	movb	$2, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movq	-168(%rbp), %rdi                # 8-byte Reload
	callq	hipFree
	movq	%r15, %rdi
	callq	hipFree
	movq	-136(%rbp), %rdi                # 8-byte Reload
	callq	hipFree
	movq	-128(%rbp), %rdi                # 8-byte Reload
	callq	hipFree
	movq	-192(%rbp), %r15                # 8-byte Reload
	movq	-176(%rbp), %rbx                # 8-byte Reload
.LBB9_45:                               # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r14,8), %rdi
	callq	hipFree
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB9_45
# %bb.46:
	movq	-200(%rbp), %rsp                # 8-byte Reload
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15reductionKernelILj512EEvPdS0_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15reductionKernelILj512EEvPdS0_j,@object # @_Z15reductionKernelILj512EEvPdS0_j
	.section	.rodata._Z15reductionKernelILj512EEvPdS0_j,"aG",@progbits,_Z15reductionKernelILj512EEvPdS0_j,comdat
	.weak	_Z15reductionKernelILj512EEvPdS0_j
	.p2align	3, 0x0
_Z15reductionKernelILj512EEvPdS0_j:
	.quad	_Z30__device_stub__reductionKernelILj512EEvPdS0_j
	.size	_Z15reductionKernelILj512EEvPdS0_j, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"%u"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%f"
	.size	.L.str.4, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"N: %u\n"
	.size	.L.str.9, 7

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"M: %u\n"
	.size	.L.str.10, 7

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Elements per thread: %d\n"
	.size	.L.str.11, 25

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Tree depth: %d\n"
	.size	.L.str.12, 16

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Block sizes: %dx%d"
	.size	.L.str.13, 19

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	", %dx%d"
	.size	.L.str.14, 8

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Grid sizes: %dx%d"
	.size	.L.str.16, 18

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"GPU array lengths: %d"
	.size	.L.str.17, 22

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	", %d"
	.size	.L.str.18, 5

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Result (Device): %24.14f\n"
	.size	.L.str.19, 26

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Result (Thrust): %24.14f\n"
	.size	.L.str.20, 26

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Result (CPU):    %24.14f\n"
	.size	.L.str.21, 26

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Timing results  %12s  %12s  %8s\n"
	.size	.L.str.22, 33

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Average"
	.size	.L.str.23, 8

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Minimum"
	.size	.L.str.24, 8

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"Num_runs"
	.size	.L.str.25, 9

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"Device ex:      %12.6f  %12.6f  %8d\n"
	.size	.L.str.26, 37

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"Device in:      %12.6f  %12.6f  %8d\n"
	.size	.L.str.27, 37

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"Thrust:         %12.6f  %12.6f  %8d\n"
	.size	.L.str.28, 37

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"CPU:            %12.6f  %12.6f  %8d\n"
	.size	.L.str.29, 37

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15reductionKernelILj512EEvPdS0_j"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Memory allocation on the host was unsuccessful."
	.size	.Lstr, 48

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Memory allocation on the device was unsuccessful."
	.size	.Lstr.1, 50

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Usage: ./p2 [[M N] [dur_max]]"
	.size	.Lstr.2, 30

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Test FAILED (device)"
	.size	.Lstr.3, 21

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Test PASSED (device)"
	.size	.Lstr.4, 21

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Test FAILED (thrust)"
	.size	.Lstr.5, 21

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Test PASSED (thrust)"
	.size	.Lstr.6, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__reductionKernelILj512EEvPdS0_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15reductionKernelILj512EEvPdS0_j
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z15reductionKernelILj512EEvPdS0_j,"axG",@progbits,_Z15reductionKernelILj512EEvPdS0_j,comdat
	.protected	_Z15reductionKernelILj512EEvPdS0_j ; -- Begin function _Z15reductionKernelILj512EEvPdS0_j
	.globl	_Z15reductionKernelILj512EEvPdS0_j
	.p2align	8
	.type	_Z15reductionKernelILj512EEvPdS0_j,@function
_Z15reductionKernelILj512EEvPdS0_j:     ; @_Z15reductionKernelILj512EEvPdS0_j
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0
	v_lshl_or_b32 v1, s2, 10, v0
	v_lshl_add_u32 v5, v0, 3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mov_b32_e32 v6, v2
	v_dual_mov_b32 v7, v2 :: v_dual_add_nc_u32 v8, 0x200, v1
	s_mov_b32 s9, 0
	s_mov_b32 s8, exec_lo
	ds_store_b64 v5, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_u32_e64 s3, v8
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x18
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s0, s0, 10
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v7, v2 :: v_dual_add_nc_u32 v6, 0x200, v1
	v_lshlrev_b64 v[8:9], 3, v[1:2]
	v_add_nc_u32_e32 v1, s0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 0x200, v1
	v_cmp_le_u32_e32 vcc_lo, s3, v6
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s9
	ds_store_b64 v5, v[3:4]
.LBB0_4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB0_8
; %bb.7:
	ds_load_b64 v[1:2], v5 offset:2048
	ds_load_b64 v[3:4], v5
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	ds_load_b64 v[1:2], v5 offset:1024
	ds_load_b64 v[3:4], v5
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB0_12
; %bb.11:
	ds_load_b64 v[1:2], v5 offset:512
	ds_load_b64 v[3:4], v5
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	ds_store_b64 v5, v[1:2]
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_add_nc_u32_e32 v1, 0x100, v5
	v_cmp_ne_u32_e64 s0, -1, v5
	s_mov_b64 s[4:5], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e64 v2, 0, s5, s0
	v_cndmask_b32_e32 v3, 0, v1, vcc_lo
	v_cndmask_b32_e64 v4, 0, s5, vcc_lo
	v_cndmask_b32_e64 v1, 0, v5, s0
	flat_load_b64 v[3:4], v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 0x80, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 64, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 32, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_add_nc_u32_e32 v6, 16, v5
	v_add_nc_u32_e32 v5, 8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cmp_ne_u32_e32 vcc_lo, -1, v6
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v7, 0, s5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v5
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[6:7] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[6:7], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[6:7]
	v_cndmask_b32_e64 v6, 0, s5, vcc_lo
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b64 v[3:4], v[5:6] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b64 v[5:6], v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	flat_store_b64 v[1:2], v[3:4] dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB0_16:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15reductionKernelILj512EEvPdS0_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z15reductionKernelILj512EEvPdS0_j,"axG",@progbits,_Z15reductionKernelILj512EEvPdS0_j,comdat
.Lfunc_end0:
	.size	_Z15reductionKernelILj512EEvPdS0_j, .Lfunc_end0-_Z15reductionKernelILj512EEvPdS0_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1128
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym s_data
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15reductionKernelILj512EEvPdS0_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15reductionKernelILj512EEvPdS0_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
