#include <cuda.h>
#include <bits/stdc++.h>

#define BLOCK_SIZE 32
#define TILE_WIDTH BLOCK_SIZE
//int BLOCK_SIZE, TILE_WIDTH;

using namespace std;

//Declarations :
//matrix initialization
void init(int *A, int n, int d);

//matrix comparation
bool compare(int *A, int *B, int n);

//print matrix
void printmat(int *A, int rows, int cols);

//sequential matrix multiplication
void matMult(int *h_A, int *h_B, int *h_C, int common, int Arows, int Bcols);

//pre kernel matrix multiplication
void prematMultP(int *A, int *B, int *C, int common, int Arows, int Bcols);

//pre kernel matrix tiling multiplication
void prematMultPTiled(int *A, int *B, int *C, int common, int Arows, int Bcols);

//Parallel kernel
__global__ void matMultP (int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols);

//Parallel kernel (tiling)
__global__ void matMultPTiled(int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols);

//End declarations

int main() {
  for(int i = 0; i < 10; i++){
    cout<<i+1<<endl;
    //cin>>BLOCK_SIZE;
    //TILE_WIDTH = BLOCK_SIZE;
    int Arows,common,Bcols;
    cin >> Arows >> common >> Bcols;

    int sizeA = Arows * common * sizeof(int);
    int sizeB = common * Bcols * sizeof(int);
    int sizeR = Arows * Bcols * sizeof(int);
    int *A = (int *)malloc(sizeA);
    int *B = (int *)malloc(sizeB);
    int *C = (int *)malloc(sizeR);
    int *D = (int *)malloc(sizeR);
    int *E = (int *)malloc(sizeR);

    init(A, Arows * common, 1.5);
    init(B, common * Bcols, 1.75);
    init(C, Arows * Bcols, 0);
    init(D, Arows * Bcols, 0);
    init(E, Arows * Bcols, 0);

    double a, b, c;

    //Sequential
    clock_t t = clock();
    matMult(A, B, C, common, Arows, Bcols);
    t = clock() - t;
    a = ((float)t) / CLOCKS_PER_SEC;
    //cout << "Tiempo secuencial:" << endl;
    cout << a << endl;

    //Parallel
    t = clock();
    prematMultP(A, B, D, common, Arows, Bcols);
    t = clock() - t;
    b = ((float)t) / CLOCKS_PER_SEC;
    //cout << "Tiempo paralelo: " << endl;
    cout << b << endl;
    //cout << "Acelero con X " << endl;
    cout << (a / b) << endl;

    //Parallel (tiling)
    t = clock();
    prematMultPTiled(A, B, E, common, Arows, Bcols);
    t = clock() - t;
    c = ((float)t) / CLOCKS_PER_SEC;
    //cout << "Tiempo paralelo con tilings: " << endl;
    cout << c << endl;
    //cout << "Acelero con X " << endl;
    cout << (a / c) << endl;

    //print matrix
    //printmat(C,Arows,Bcols);
    //printmat(D,Arows,Bcols);
    //printmat(E,Arows,Bcols);

    //checking
    if(compare(C, D, Arows * Bcols) and compare(D, E, Arows * Bcols))
      cout << "Ok :)" << endl;
    else
      cout << "No ok :(" << endl;

    //Free
    free(A);
    free(B);
    free(C);
    free(D);
  }
  return 0;
}


//Functions

//matrix initialization
void init(int *A,int n, int d) {
  for(int i = 0; i < n; i++)
    A[i] = d;
}

//matrix comparation
bool compare(int *A, int *B, int n) {
  for(int i = 0; i < n; i++)
    if(A[i] != B[i])
      return false;

  return true;
}

//print matrix
void printmat(int *A, int rows, int cols) {
  for(int i = 0; i < rows; i++) {
    for(int j = 0; j < cols; j++) {
      cout << A[i * rows + j] << " ";
    }
    cout << endl;
  }
  cout << endl;
}

//matrix multiplication
void matMult(int *h_A, int *h_B, int *h_C, int common, int Arows, int Bcols) {
  int sum;
  for(int i = 0; i < Arows; i++)
    for(int j = 0; j < Bcols; j++) {
      sum = 0;
      for(int k = 0; k < common; k++)
        sum += h_A[common * i + k] * h_B[Bcols * k + j];

      h_C[Bcols * i + j] = sum;
    }
}

//pre kernel matrix multiplication
void prematMultP(int *A, int *B, int *C, int common, int Arows, int Bcols) {
  int sizeA = Arows * common * sizeof(int);
  int sizeB = common * Bcols * sizeof(int);
  int sizeR = Arows * Bcols * sizeof(int);
  int *d_A, *d_B, *d_C;

  //Allocate memory for device
  cudaMalloc(&d_A, sizeA);
  cudaMalloc(&d_B, sizeB);
  cudaMalloc(&d_C, sizeR);

  //Copy Data from host to device
  cudaMemcpy(d_A, A, sizeA, cudaMemcpyHostToDevice);
  cudaMemcpy(d_B, B, sizeB, cudaMemcpyHostToDevice);

  //Blocks and Grids
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(ceil(Bcols / (float)BLOCK_SIZE), ceil(Arows / (float)BLOCK_SIZE));

  //Launch Kernel
  matMultP<<<dimGrid, dimBlock>>> (d_A, d_B, d_C, common, Arows, Bcols);
  cudaDeviceSynchronize();

  //Copy from device, free device memory
  cudaMemcpy (C, d_C, sizeR, cudaMemcpyDeviceToHost);
  cudaFree(d_A);
  cudaFree(d_B);
  cudaFree(d_C);
}

//pre kernel matrix tiling multiplication
void prematMultPTiled(int *A, int *B, int *C, int common, int Arows, int Bcols) {
  int sizeA = Arows * common * sizeof(int);
  int sizeB = common * Bcols * sizeof(int);
  int sizeR = Arows * Bcols * sizeof(int);
  int *d_A, *d_B, *d_C;

  //Allocate memory for device
  cudaMalloc(&d_A, sizeA);
  cudaMalloc(&d_B, sizeB);
  cudaMalloc(&d_C, sizeR);

  //Copy Data from host to device
  cudaMemcpy(d_A, A, sizeA, cudaMemcpyHostToDevice);
  cudaMemcpy(d_B, B, sizeB, cudaMemcpyHostToDevice);

  //Blocks and Grids
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(ceil(Bcols / (float)BLOCK_SIZE), ceil(Arows / (float)BLOCK_SIZE));

  //Launch Kernel
  matMultPTiled<<<dimGrid, dimBlock>>> (d_A, d_B, d_C, common, Arows, Bcols);
  cudaDeviceSynchronize();

  //Copy from device, free device memory
  cudaMemcpy (C, d_C, sizeR, cudaMemcpyDeviceToHost);
  cudaFree(d_A);
  cudaFree(d_B);
  cudaFree(d_C);
}

//Parallel kernel
__global__ void matMultP (int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols) {
  int i = threadIdx.y + blockDim.y * blockIdx.y;
  int j = threadIdx.x + blockDim.x * blockIdx.x;

  if(i < Arows and j < Bcols) {
    int sum = 0;

    for(int k = 0; k < common; ++k)
      sum += d_A[common * i + k] * d_B[Bcols * k + j];

    d_C[Bcols * i + j] = sum;
  }
}

//Parallel kernel (tiling)
__global__ void matMultPTiled(int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols) {
  __shared__ int Mds[TILE_WIDTH][TILE_WIDTH];
  __shared__ int Nds[TILE_WIDTH][TILE_WIDTH];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int row = by * TILE_WIDTH + ty;
  int col = bx * TILE_WIDTH + tx;
  int Pvalue = 0;

  for(int m = 0; m < (common + TILE_WIDTH - 1) / TILE_WIDTH; ++m) {

    if(m * TILE_WIDTH + tx < common and row < Arows)
      Mds[ty][tx] = d_A[row * common + m * TILE_WIDTH + tx];
    else
      Mds[ty][tx] = 0;

    if(m * TILE_WIDTH + ty < common and col < Bcols)
      Nds[ty][tx] = d_B[(m * TILE_WIDTH + ty) * Bcols + col];
    else
      Nds[ty][tx] = 0;

    __syncthreads();

    for(int k = 0; k < TILE_WIDTH; ++k) {
      Pvalue += Mds[ty][k] * Nds[k][tx];
    }

    __syncthreads();
  }

  if(row < Arows and col < Bcols)
    d_C[row * Bcols + col] = Pvalue;
}

	.file	"tmpxft_0029d23d_00000000-6_parcialInt.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10834:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10834:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB12562:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE12562:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z4initPiii
	.type	_Z4initPiii, @function
_Z4initPiii:
.LFB10826:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L4:
	cmpl	%eax, %esi
	jle	.L7
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L4
.L7:
	ret
	.cfi_endproc
.LFE10826:
	.size	_Z4initPiii, .-_Z4initPiii
	.globl	_Z7comparePiS_i
	.type	_Z7comparePiS_i, @function
_Z7comparePiS_i:
.LFB10827:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %edx
	jle	.L13
	movl	(%rdi,%rax,4), %ecx
	incq	%rax
	cmpl	-4(%rsi,%rax,4), %ecx
	je	.L9
	xorl	%eax, %eax
	ret
.L13:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE10827:
	.size	_Z7comparePiS_i, .-_Z7comparePiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.text
	.globl	_Z8printmatPiii
	.type	_Z8printmatPiii, @function
_Z8printmatPiii:
.LFB10828:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%edx, 12(%rsp)
.L15:
	cmpl	%ebx, %r13d
	jge	.L17
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %r14
.L18:
	cmpl	%r15d, 12(%rsp)
	jle	.L20
	movl	(%r14,%r15,4), %esi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r15
	call	_ZNSolsEi@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L18
.L20:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r13d
	addl	%ebx, %r12d
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L15
.L17:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE10828:
	.size	_Z8printmatPiii, .-_Z8printmatPiii
	.globl	_Z7matMultPiS_S_iii
	.type	_Z7matMultPiS_S_iii, @function
_Z7matMultPiS_S_iii:
.LFB10829:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%r9d, %rax
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$2, %rax
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movq	%rax, -16(%rsp)
	movq	%rsi, -8(%rsp)
	xorl	%esi, %esi
.L22:
	cmpl	%r8d, %r11d
	jge	.L21
	movslq	%r10d, %rax
	leaq	(%rdx,%rax,4), %r15
	movslq	%esi, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L27:
	cmpl	%eax, %r9d
	jle	.L24
	movq	-8(%rsp), %rcx
	xorl	%ebp, %ebp
	leaq	(%rcx,%rax,4), %r12
	xorl	%ecx, %ecx
.L25:
	cmpl	%ecx, %ebx
	jle	.L29
	movl	(%r14,%rcx,4), %r13d
	imull	(%r12), %r13d
	incq	%rcx
	addl	%r13d, %ebp
	movq	-16(%rsp), %r13
	addq	%r13, %r12
	jmp	.L25
.L29:
	movl	%ebp, (%r15,%rax,4)
	incq	%rax
	jmp	.L27
.L24:
	incl	%r11d
	addl	%r9d, %r10d
	addl	%ebx, %esi
	jmp	.L22
.L21:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10829:
	.size	_Z7matMultPiS_S_iii, .-_Z7matMultPiS_S_iii
	.globl	_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii
	.type	_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii, @function
_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii:
.LFB10856:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8matMultPPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L30:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10856:
	.size	_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii, .-_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii
	.globl	_Z8matMultPPiS_S_iii
	.type	_Z8matMultPPiS_S_iii, @function
_Z8matMultPPiS_S_iii:
.LFB10857:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE10857:
	.size	_Z8matMultPPiS_S_iii, .-_Z8matMultPPiS_S_iii
	.globl	_Z11prematMultPPiS_S_iii
	.type	_Z11prematMultPPiS_S_iii, @function
_Z11prematMultPPiS_S_iii:
.LFB10830:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r13d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	imull	%ebp, %r12d
	movl	%r8d, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	sall	$2, %r12d
	movq	%rdx, 16(%rsp)
	movl	%r8d, %edx
	movslq	%r12d, %r12
	leaq	40(%rsp), %rdi
	imull	%ecx, %edx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	sall	$2, %edx
	movslq	%edx, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	movq	%r12, %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%ebx, %eax
	leaq	56(%rsp), %rdi
	imull	%ebp, %eax
	sall	$2, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r12d
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movd	%r12d, %xmm1
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 76(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	40(%rsp), %rdi
	movl	%r13d, %ecx
	call	_Z34__device_stub__Z8matMultPPiS_S_iiiPiS_S_iii
.L36:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10830:
	.size	_Z11prematMultPPiS_S_iii, .-_Z11prematMultPPiS_S_iii
	.globl	_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii
	.type	_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii, @function
_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii:
.LFB10858:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13matMultPTiledPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L39:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L41
	call	__stack_chk_fail@PLT
.L41:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10858:
	.size	_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii, .-_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii
	.globl	_Z13matMultPTiledPiS_S_iii
	.type	_Z13matMultPTiledPiS_S_iii, @function
_Z13matMultPTiledPiS_S_iii:
.LFB10859:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE10859:
	.size	_Z13matMultPTiledPiS_S_iii, .-_Z13matMultPTiledPiS_S_iii
	.globl	_Z16prematMultPTiledPiS_S_iii
	.type	_Z16prematMultPTiledPiS_S_iii, @function
_Z16prematMultPTiledPiS_S_iii:
.LFB10831:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r13d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	imull	%ebp, %r12d
	movl	%r8d, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	sall	$2, %r12d
	movq	%rdx, 16(%rsp)
	movl	%r8d, %edx
	movslq	%r12d, %r12
	leaq	40(%rsp), %rdi
	imull	%ecx, %edx
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	sall	$2, %edx
	movslq	%edx, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	movq	%r12, %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%ebx, %eax
	leaq	56(%rsp), %rdi
	imull	%ebp, %eax
	sall	$2, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r12d
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movd	%r12d, %xmm1
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$137438953504, %rdx
	movl	%eax, 76(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	40(%rsp), %rdi
	movl	%r13d, %ecx
	call	_Z40__device_stub__Z13matMultPTiledPiS_S_iiiPiS_S_iii
.L45:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10831:
	.size	_Z16prematMultPTiledPiS_S_iii, .-_Z16prematMultPTiledPiS_S_iii
	.section	.rodata.str1.1
.LC3:
	.string	"Ok :)"
.LC4:
	.string	"No ok :("
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	_ZSt4cout(%rip), %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
.L51:
	incl	%r15d
	movq	%rbx, %rdi
	movl	%r15d, %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	44(%rsp), %rsi
	leaq	_ZSt3cin(%rip), %rdi
	call	_ZNSirsERi@PLT
	leaq	48(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	leaq	52(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	movl	44(%rsp), %r12d
	movl	48(%rsp), %r14d
	movl	52(%rsp), %eax
	movl	%r12d, %esi
	imull	%r14d, %esi
	imull	%eax, %r12d
	imull	%eax, %r14d
	leal	0(,%rsi,4), %edi
	movl	%esi, 24(%rsp)
	movslq	%edi, %rdi
	leal	0(,%r12,4), %r13d
	call	malloc@PLT
	leal	0(,%r14,4), %edi
	movslq	%r13d, %r13
	movslq	%edi, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	24(%rsp), %esi
	movl	$1, %edx
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	_Z4initPiii
	movq	(%rsp), %rdi
	movl	%r14d, %esi
	call	_Z4initPiii
	movq	16(%rsp), %rdi
	xorl	%edx, %edx
	movl	%r12d, %esi
	call	_Z4initPiii
	movq	8(%rsp), %rdi
	call	_Z4initPiii
	movq	%r13, %rdi
	call	_Z4initPiii
	call	clock@PLT
	movl	48(%rsp), %ecx
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	movl	52(%rsp), %r9d
	movl	44(%rsp), %r8d
	movq	%rax, %r12
	movq	16(%rsp), %rdx
	call	_Z7matMultPiS_S_iii
	call	clock@PLT
	movq	%rbx, %rdi
	subq	%r12, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	movq	%xmm1, %r12
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	clock@PLT
	movl	48(%rsp), %ecx
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	movl	52(%rsp), %r9d
	movl	44(%rsp), %r8d
	movq	%rax, %r14
	movq	8(%rsp), %rdx
	call	_Z11prematMultPPiS_S_iii
	call	clock@PLT
	movq	%rbx, %rdi
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm2
	movaps	%xmm2, %xmm0
	movsd	%xmm2, 24(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbx, %rdi
	movq	%r12, %xmm0
	divsd	24(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	clock@PLT
	movl	52(%rsp), %r9d
	movq	%r13, %rdx
	movq	%rbp, %rdi
	movl	44(%rsp), %r8d
	movl	48(%rsp), %ecx
	movq	%rax, %r14
	movq	(%rsp), %rsi
	call	_Z16prematMultPTiledPiS_S_iii
	call	clock@PLT
	movq	%rbx, %rdi
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	divss	.LC2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm4
	movaps	%xmm4, %xmm0
	movsd	%xmm4, 24(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbx, %rdi
	movq	%r12, %xmm0
	divsd	24(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	44(%rsp), %edx
	imull	52(%rsp), %edx
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z7comparePiS_i
	testb	%al, %al
	je	.L49
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	call	_Z7comparePiS_i
	leaq	.LC3(%rip), %rsi
	testb	%al, %al
	jne	.L61
.L49:
	leaq	.LC4(%rip), %rsi
.L61:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbp, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	cmpl	$10, %r15d
	jne	.L51
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z13matMultPTiledPiS_S_iii"
.LC6:
	.string	"_Z8matMultPPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10861:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13matMultPTiledPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8matMultPPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10861:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1023410176
	.align 4
.LC2:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <bits/stdc++.h>

#define BLOCK_SIZE 32
#define TILE_WIDTH BLOCK_SIZE
//int BLOCK_SIZE, TILE_WIDTH;

using namespace std;

//Declarations :
//matrix initialization
void init(int *A, int n, int d);

//matrix comparation
bool compare(int *A, int *B, int n);

//print matrix
void printmat(int *A, int rows, int cols);

//sequential matrix multiplication
void matMult(int *h_A, int *h_B, int *h_C, int common, int Arows, int Bcols);

//pre kernel matrix multiplication
void prematMultP(int *A, int *B, int *C, int common, int Arows, int Bcols);

//pre kernel matrix tiling multiplication
void prematMultPTiled(int *A, int *B, int *C, int common, int Arows, int Bcols);

//Parallel kernel
__global__ void matMultP (int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols);

//Parallel kernel (tiling)
__global__ void matMultPTiled(int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols);

//End declarations

int main() {
  for(int i = 0; i < 10; i++){
    cout<<i+1<<endl;
    //cin>>BLOCK_SIZE;
    //TILE_WIDTH = BLOCK_SIZE;
    int Arows,common,Bcols;
    cin >> Arows >> common >> Bcols;

    int sizeA = Arows * common * sizeof(int);
    int sizeB = common * Bcols * sizeof(int);
    int sizeR = Arows * Bcols * sizeof(int);
    int *A = (int *)malloc(sizeA);
    int *B = (int *)malloc(sizeB);
    int *C = (int *)malloc(sizeR);
    int *D = (int *)malloc(sizeR);
    int *E = (int *)malloc(sizeR);

    init(A, Arows * common, 1.5);
    init(B, common * Bcols, 1.75);
    init(C, Arows * Bcols, 0);
    init(D, Arows * Bcols, 0);
    init(E, Arows * Bcols, 0);

    double a, b, c;

    //Sequential
    clock_t t = clock();
    matMult(A, B, C, common, Arows, Bcols);
    t = clock() - t;
    a = ((float)t) / CLOCKS_PER_SEC;
    //cout << "Tiempo secuencial:" << endl;
    cout << a << endl;

    //Parallel
    t = clock();
    prematMultP(A, B, D, common, Arows, Bcols);
    t = clock() - t;
    b = ((float)t) / CLOCKS_PER_SEC;
    //cout << "Tiempo paralelo: " << endl;
    cout << b << endl;
    //cout << "Acelero con X " << endl;
    cout << (a / b) << endl;

    //Parallel (tiling)
    t = clock();
    prematMultPTiled(A, B, E, common, Arows, Bcols);
    t = clock() - t;
    c = ((float)t) / CLOCKS_PER_SEC;
    //cout << "Tiempo paralelo con tilings: " << endl;
    cout << c << endl;
    //cout << "Acelero con X " << endl;
    cout << (a / c) << endl;

    //print matrix
    //printmat(C,Arows,Bcols);
    //printmat(D,Arows,Bcols);
    //printmat(E,Arows,Bcols);

    //checking
    if(compare(C, D, Arows * Bcols) and compare(D, E, Arows * Bcols))
      cout << "Ok :)" << endl;
    else
      cout << "No ok :(" << endl;

    //Free
    free(A);
    free(B);
    free(C);
    free(D);
  }
  return 0;
}


//Functions

//matrix initialization
void init(int *A,int n, int d) {
  for(int i = 0; i < n; i++)
    A[i] = d;
}

//matrix comparation
bool compare(int *A, int *B, int n) {
  for(int i = 0; i < n; i++)
    if(A[i] != B[i])
      return false;

  return true;
}

//print matrix
void printmat(int *A, int rows, int cols) {
  for(int i = 0; i < rows; i++) {
    for(int j = 0; j < cols; j++) {
      cout << A[i * rows + j] << " ";
    }
    cout << endl;
  }
  cout << endl;
}

//matrix multiplication
void matMult(int *h_A, int *h_B, int *h_C, int common, int Arows, int Bcols) {
  int sum;
  for(int i = 0; i < Arows; i++)
    for(int j = 0; j < Bcols; j++) {
      sum = 0;
      for(int k = 0; k < common; k++)
        sum += h_A[common * i + k] * h_B[Bcols * k + j];

      h_C[Bcols * i + j] = sum;
    }
}

//pre kernel matrix multiplication
void prematMultP(int *A, int *B, int *C, int common, int Arows, int Bcols) {
  int sizeA = Arows * common * sizeof(int);
  int sizeB = common * Bcols * sizeof(int);
  int sizeR = Arows * Bcols * sizeof(int);
  int *d_A, *d_B, *d_C;

  //Allocate memory for device
  hipMalloc(&d_A, sizeA);
  hipMalloc(&d_B, sizeB);
  hipMalloc(&d_C, sizeR);

  //Copy Data from host to device
  hipMemcpy(d_A, A, sizeA, hipMemcpyHostToDevice);
  hipMemcpy(d_B, B, sizeB, hipMemcpyHostToDevice);

  //Blocks and Grids
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(ceil(Bcols / (float)BLOCK_SIZE), ceil(Arows / (float)BLOCK_SIZE));

  //Launch Kernel
  matMultP<<<dimGrid, dimBlock>>> (d_A, d_B, d_C, common, Arows, Bcols);
  hipDeviceSynchronize();

  //Copy from device, free device memory
  hipMemcpy (C, d_C, sizeR, hipMemcpyDeviceToHost);
  hipFree(d_A);
  hipFree(d_B);
  hipFree(d_C);
}

//pre kernel matrix tiling multiplication
void prematMultPTiled(int *A, int *B, int *C, int common, int Arows, int Bcols) {
  int sizeA = Arows * common * sizeof(int);
  int sizeB = common * Bcols * sizeof(int);
  int sizeR = Arows * Bcols * sizeof(int);
  int *d_A, *d_B, *d_C;

  //Allocate memory for device
  hipMalloc(&d_A, sizeA);
  hipMalloc(&d_B, sizeB);
  hipMalloc(&d_C, sizeR);

  //Copy Data from host to device
  hipMemcpy(d_A, A, sizeA, hipMemcpyHostToDevice);
  hipMemcpy(d_B, B, sizeB, hipMemcpyHostToDevice);

  //Blocks and Grids
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
  dim3 dimGrid(ceil(Bcols / (float)BLOCK_SIZE), ceil(Arows / (float)BLOCK_SIZE));

  //Launch Kernel
  matMultPTiled<<<dimGrid, dimBlock>>> (d_A, d_B, d_C, common, Arows, Bcols);
  hipDeviceSynchronize();

  //Copy from device, free device memory
  hipMemcpy (C, d_C, sizeR, hipMemcpyDeviceToHost);
  hipFree(d_A);
  hipFree(d_B);
  hipFree(d_C);
}

//Parallel kernel
__global__ void matMultP (int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols) {
  int i = threadIdx.y + blockDim.y * blockIdx.y;
  int j = threadIdx.x + blockDim.x * blockIdx.x;

  if(i < Arows and j < Bcols) {
    int sum = 0;

    for(int k = 0; k < common; ++k)
      sum += d_A[common * i + k] * d_B[Bcols * k + j];

    d_C[Bcols * i + j] = sum;
  }
}

//Parallel kernel (tiling)
__global__ void matMultPTiled(int *d_A, int *d_B, int *d_C, int common, int Arows, int Bcols) {
  __shared__ int Mds[TILE_WIDTH][TILE_WIDTH];
  __shared__ int Nds[TILE_WIDTH][TILE_WIDTH];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int row = by * TILE_WIDTH + ty;
  int col = bx * TILE_WIDTH + tx;
  int Pvalue = 0;

  for(int m = 0; m < (common + TILE_WIDTH - 1) / TILE_WIDTH; ++m) {

    if(m * TILE_WIDTH + tx < common and row < Arows)
      Mds[ty][tx] = d_A[row * common + m * TILE_WIDTH + tx];
    else
      Mds[ty][tx] = 0;

    if(m * TILE_WIDTH + ty < common and col < Bcols)
      Nds[ty][tx] = d_B[(m * TILE_WIDTH + ty) * Bcols + col];
    else
      Nds[ty][tx] = 0;

    __syncthreads();

    for(int k = 0; k < TILE_WIDTH; ++k) {
      Pvalue += Mds[ty][k] * Nds[k][tx];
    }

    __syncthreads();
  }

  if(row < Arows and col < Bcols)
    d_C[row * Bcols + col] = Pvalue;
}

	.text
	.file	"parcialInt.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%esi, %esi
.LBB0_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
                                        #     Child Loop BB0_6 Depth 2
                                        #     Child Loop BB0_12 Depth 2
                                        #     Child Loop BB0_17 Depth 2
	incl	%esi
	movl	$_ZSt4cout, %edi
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
                                        # kill: def $esi killed $esi killed $rsi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt3cin, %edi
	leaq	8(%rsp), %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	leaq	4(%rsp), %rsi
	callq	_ZNSirsERi
	movl	8(%rsp), %eax
	movl	12(%rsp), %r15d
	movl	%r15d, %r14d
	imull	%eax, %r14d
	leal	(,%r14,4), %ecx
	movl	4(%rsp), %ebx
	imull	%ebx, %r15d
	leal	(,%r15,4), %ebp
	imull	%eax, %ebx
	leal	(,%rbx,4), %r12d
	movslq	%ecx, %rdi
	callq	malloc
	movq	%rax, %r13
	movslq	%ebp, %rdi
	callq	malloc
	movq	%rax, %rbp
	movslq	%r12d, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	testl	%r14d, %r14d
	jle	.LBB0_4
# %bb.2:                                # %.lr.ph.preheader.i
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	%r14d, %eax
	xorl	%ecx, %ecx
.LBB0_3:                                # %.lr.ph.i
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1, (%r13,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_3
.LBB0_4:                                # %_Z4initPiii.exit
                                        #   in Loop: Header=BB0_1 Depth=1
	testl	%r15d, %r15d
	jle	.LBB0_7
# %bb.5:                                # %.lr.ph.preheader.i42
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	%r15d, %eax
	xorl	%ecx, %ecx
.LBB0_6:                                # %.lr.ph.i44
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1, (%rbp,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_6
.LBB0_7:                                # %_Z4initPiii.exit48
                                        #   in Loop: Header=BB0_1 Depth=1
	testl	%ebx, %ebx
	movq	40(%rsp), %r14                  # 8-byte Reload
	movq	32(%rsp), %r15                  # 8-byte Reload
	jle	.LBB0_9
# %bb.8:                                # %.lr.ph.preheader.i49
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	%ebx, %ebx
	shlq	$2, %rbx
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
	movq	%r12, %rdi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	callq	memset@PLT
.LBB0_9:                                # %_Z4initPiii.exit69
                                        #   in Loop: Header=BB0_1 Depth=1
	callq	clock
	movq	%rax, %rbx
	movl	12(%rsp), %ecx
	movl	8(%rsp), %r8d
	movl	4(%rsp), %r9d
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%r14, %rdx
	callq	_Z7matMultPiS_S_iii
	callq	clock
	subq	%rbx, %rax
	cvtsi2ss	%rax, %xmm0
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	clock
	movq	%rax, %rbx
	movl	12(%rsp), %ecx
	movl	8(%rsp), %r8d
	movl	4(%rsp), %r9d
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	callq	_Z11prematMultPPiS_S_iii
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI0_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	clock
	movq	%rax, %rbx
	movl	12(%rsp), %ecx
	movl	8(%rsp), %r8d
	movl	4(%rsp), %r9d
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	callq	_Z16prematMultPTiledPiS_S_iii
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI0_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	4(%rsp), %eax
	imull	8(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB0_20
# %bb.10:                               # %.lr.ph.preheader.i70
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	(%r14), %ecx
	cmpl	(%r15), %ecx
	jne	.LBB0_21
# %bb.11:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	%eax, %eax
	movl	$1, %esi
.LBB0_12:                               # %.lr.ph
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rsi, %rdx
	cmpq	%rsi, %rax
	je	.LBB0_14
# %bb.13:                               # %.lr.ph.i72
                                        #   in Loop: Header=BB0_12 Depth=2
	movl	(%r14,%rdx,4), %edi
	leaq	1(%rdx), %rsi
	cmpl	(%r15,%rdx,4), %edi
	je	.LBB0_12
.LBB0_14:                               # %_Z7comparePiS_i.exit
                                        #   in Loop: Header=BB0_1 Depth=1
	cmpq	%rax, %rdx
	jb	.LBB0_21
# %bb.15:                               # %.lr.ph.preheader.i75
                                        #   in Loop: Header=BB0_1 Depth=1
	cmpl	(%r12), %ecx
	jne	.LBB0_21
# %bb.16:                               # %.lr.ph91.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	$1, %edx
.LBB0_17:                               # %.lr.ph91
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	je	.LBB0_19
# %bb.18:                               # %.lr.ph.i77
                                        #   in Loop: Header=BB0_17 Depth=2
	movl	(%r15,%rcx,4), %esi
	leaq	1(%rcx), %rdx
	cmpl	(%r12,%rcx,4), %esi
	je	.LBB0_17
.LBB0_19:                               # %_Z7comparePiS_i.exit83
                                        #   in Loop: Header=BB0_1 Depth=1
	cmpq	%rax, %rcx
	jae	.LBB0_20
.LBB0_21:                               # %.critedge
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$8, %edx
	jmp	.LBB0_22
.LBB0_20:                               # %_Z7comparePiS_i.exit83.thread
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$5, %edx
.LBB0_22:                               #   in Loop: Header=BB0_1 Depth=1
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	48(%rsp), %rsi                  # 8-byte Reload
	cmpl	$10, %esi
	jne	.LBB0_1
# %bb.23:
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z4initPiii                     # -- Begin function _Z4initPiii
	.type	_Z4initPiii,@function
_Z4initPiii:                            # @_Z4initPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z4initPiii, .Lfunc_end1-_Z4initPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7matMultPiS_S_iii             # -- Begin function _Z7matMultPiS_S_iii
	.type	_Z7matMultPiS_S_iii,@function
_Z7matMultPiS_S_iii:                    # @_Z7matMultPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, -36(%rsp)                 # 4-byte Spill
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB2_7
# %bb.1:                                # %.preheader27.lr.ph
	movslq	-36(%rsp), %rax                 # 4-byte Folded Reload
	movl	%r8d, %r9d
	movl	%eax, %r10d
	movl	%ecx, %r11d
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	leaq	(,%rax,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_9 Depth 3
	cmpl	$0, -36(%rsp)                   # 4-byte Folded Reload
	jle	.LBB2_6
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	%r15, %rax
	imulq	-32(%rsp), %rax                 # 8-byte Folded Reload
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rdi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_9 Depth 3
	testl	%ecx, %ecx
	jle	.LBB2_5
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_4 Depth=2
	xorl	%esi, %esi
	movq	%rdi, %rbp
	xorl	%edx, %edx
.LBB2_9:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rbp), %r8d
	imull	(%r12,%rsi,4), %r8d
	addl	%r8d, %edx
	incq	%rsi
	addq	%rbx, %rbp
	cmpq	%rsi, %r11
	jne	.LBB2_9
	jmp	.LBB2_10
.LBB2_5:                                #   in Loop: Header=BB2_4 Depth=2
	xorl	%edx, %edx
.LBB2_10:                               # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=2
	movl	%edx, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rdi
	cmpq	%r10, %rax
	jne	.LBB2_4
.LBB2_6:                                # %._crit_edge31
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	addl	%ecx, %r14d
	cmpq	%r9, %r15
	jne	.LBB2_2
.LBB2_7:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z7matMultPiS_S_iii, .Lfunc_end2-_Z7matMultPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11prematMultPPiS_S_iii
.LCPI3_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z11prematMultPPiS_S_iii
	.type	_Z11prematMultPPiS_S_iii,@function
_Z11prematMultPPiS_S_iii:               # @_Z11prematMultPPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movl	%r8d, %ebx
                                        # kill: def $ecx killed $ecx def $rcx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	leal	(,%rcx,4), %r13d
	movl	%r13d, %eax
	imull	%r8d, %eax
	imull	%r9d, %r13d
	movl	%r8d, %r14d
	imull	%r9d, %r14d
	shll	$2, %r14d
	movslq	%eax, %r15
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	%r13d, %r13
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	%r14d, %rsi
	leaq	8(%rsp), %rdi
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	movl	%r14d, %eax
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%ebx, %r8d
	movl	%ebp, %r9d
	callq	_Z23__device_stub__matMultPPiS_S_iii
.LBB3_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11prematMultPPiS_S_iii, .Lfunc_end3-_Z11prematMultPPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z16prematMultPTiledPiS_S_iii
.LCPI4_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z16prematMultPTiledPiS_S_iii
	.type	_Z16prematMultPTiledPiS_S_iii,@function
_Z16prematMultPTiledPiS_S_iii:          # @_Z16prematMultPTiledPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movl	%r8d, %ebx
                                        # kill: def $ecx killed $ecx def $rcx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	leal	(,%rcx,4), %r13d
	movl	%r13d, %eax
	imull	%r8d, %eax
	imull	%r9d, %r13d
	movl	%r8d, %r14d
	imull	%r9d, %r14d
	shll	$2, %r14d
	movslq	%eax, %r15
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	%r13d, %r13
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	%r14d, %rsi
	leaq	8(%rsp), %rdi
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	movl	%r14d, %eax
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%ebx, %r8d
	movl	%ebp, %r9d
	callq	_Z28__device_stub__matMultPTiledPiS_S_iii
.LBB4_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z16prematMultPTiledPiS_S_iii, .Lfunc_end4-_Z16prematMultPTiledPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7comparePiS_i                 # -- Begin function _Z7comparePiS_i
	.type	_Z7comparePiS_i,@function
_Z7comparePiS_i:                        # @_Z7comparePiS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB5_6
# %bb.1:                                # %.lr.ph.preheader
	movl	(%rdi), %eax
	cmpl	(%rsi), %eax
	jne	.LBB5_8
# %bb.2:                                # %.lr.ph15.preheader
	movl	%edx, %eax
	movl	$1, %edx
.LBB5_3:                                # %.lr.ph15
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	je	.LBB5_5
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB5_3 Depth=1
	movl	(%rdi,%rcx,4), %r8d
	leaq	1(%rcx), %rdx
	cmpl	(%rsi,%rcx,4), %r8d
	je	.LBB5_3
.LBB5_5:                                # %._crit_edge.loopexit
	cmpq	%rax, %rcx
	setae	%al
                                        # kill: def $al killed $al killed $eax
	retq
.LBB5_6:
	movb	$1, %al
                                        # kill: def $al killed $al killed $eax
	retq
.LBB5_8:
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end5:
	.size	_Z7comparePiS_i, .Lfunc_end5-_Z7comparePiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printmatPiii                 # -- Begin function _Z8printmatPiii
	.type	_Z8printmatPiii,@function
_Z8printmatPiii:                        # @_Z8printmatPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB6_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebp
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	4(%rsp), %r12d                  # 4-byte Reload
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
.LBB6_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_4 Depth 2
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	jle	.LBB6_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB6_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%r15d, %r15d
.LBB6_4:                                #   Parent Loop BB6_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB6_4
.LBB6_5:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	addl	%ebp, %r13d
	cmpq	16(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB6_2
.LBB6_6:                                # %._crit_edge13
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end6:
	.size	_Z8printmatPiii, .Lfunc_end6-_Z8printmatPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__matMultPPiS_S_iii # -- Begin function _Z23__device_stub__matMultPPiS_S_iii
	.type	_Z23__device_stub__matMultPPiS_S_iii,@function
_Z23__device_stub__matMultPPiS_S_iii:   # @_Z23__device_stub__matMultPPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8matMultPPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z23__device_stub__matMultPPiS_S_iii, .Lfunc_end7-_Z23__device_stub__matMultPPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__matMultPTiledPiS_S_iii # -- Begin function _Z28__device_stub__matMultPTiledPiS_S_iii
	.type	_Z28__device_stub__matMultPTiledPiS_S_iii,@function
_Z28__device_stub__matMultPTiledPiS_S_iii: # @_Z28__device_stub__matMultPTiledPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13matMultPTiledPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z28__device_stub__matMultPTiledPiS_S_iii, .Lfunc_end8-_Z28__device_stub__matMultPTiledPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8matMultPPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13matMultPTiledPiS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Ok :)"
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"No ok :("
	.size	.L.str.1, 9

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	_Z8matMultPPiS_S_iii,@object    # @_Z8matMultPPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z8matMultPPiS_S_iii
	.p2align	3, 0x0
_Z8matMultPPiS_S_iii:
	.quad	_Z23__device_stub__matMultPPiS_S_iii
	.size	_Z8matMultPPiS_S_iii, 8

	.type	_Z13matMultPTiledPiS_S_iii,@object # @_Z13matMultPTiledPiS_S_iii
	.globl	_Z13matMultPTiledPiS_S_iii
	.p2align	3, 0x0
_Z13matMultPTiledPiS_S_iii:
	.quad	_Z28__device_stub__matMultPTiledPiS_S_iii
	.size	_Z13matMultPTiledPiS_S_iii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8matMultPPiS_S_iii"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13matMultPTiledPiS_S_iii"
	.size	.L__unnamed_2, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__matMultPPiS_S_iii
	.addrsig_sym _Z28__device_stub__matMultPTiledPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt3cin
	.addrsig_sym _Z8matMultPPiS_S_iii
	.addrsig_sym _Z13matMultPTiledPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8matMultPPiS_S_iii    ; -- Begin function _Z8matMultPPiS_S_iii
	.globl	_Z8matMultPPiS_S_iii
	.p2align	8
	.type	_Z8matMultPPiS_S_iii,@function
_Z8matMultPPiS_S_iii:                   ; @_Z8matMultPPiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v0, s4
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s4, s4, -1
	s_cmp_eq_u32 s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s6, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s6, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8matMultPPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8matMultPPiS_S_iii, .Lfunc_end0-_Z8matMultPPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13matMultPTiledPiS_S_iii ; -- Begin function _Z13matMultPTiledPiS_S_iii
	.globl	_Z13matMultPTiledPiS_S_iii
	.p2align	8
	.type	_Z13matMultPTiledPiS_S_iii,@function
_Z13matMultPTiledPiS_S_iii:             ; @_Z13matMultPTiledPiS_S_iii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v2, s15, 5, v3
	v_lshl_add_u32 v0, s14, 5, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	v_cmp_gt_i32_e64 s0, s6, v0
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_9
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v4
	v_lshlrev_b32_e32 v5, 7, v3
	v_mul_lo_u32 v7, v2, s4
	s_add_i32 s1, s4, 31
	s_mov_b32 s12, 0
	v_or_b32_e32 v6, 0x1000, v1
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v8, v5, v1
	s_lshr_b32 s7, s1, 5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v6, v5
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
	s_lshl_b32 s13, s12, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, s13, v4
	v_cmp_gt_i32_e64 s1, s4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, vcc_lo
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v10, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s8, v10
	v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
	global_load_b32 v10, v[10:11], off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v11, s13, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v10
	v_cmp_gt_i32_e64 s1, s4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s0
	s_and_saveexec_b32 s13, s1
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mad_u64_u32 v[12:13], null, v11, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[10:11], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s10, v10
	v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
	global_load_b32 v12, v[10:11], off
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v10, v6
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_7:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s1, v5
	s_add_i32 s1, s1, 4
	ds_load_b32 v13, v10
	ds_load_b32 v14, v11
	s_cmpk_eq_i32 s1, 0x80
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[11:12], null, v13, v14, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v1, v11 :: v_dual_add_nc_u32 v10, 0x80, v10
	s_cbranch_scc0 .LBB1_7
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s7
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_10
.LBB1_9:
	v_mov_b32_e32 v1, 0
.LBB1_10:                               ; %Flow92
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	v_cmp_gt_i32_e64 s0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_mad_u64_u32 v[3:4], null, v2, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v1, off
.LBB1_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13matMultPTiledPiS_S_iii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13matMultPTiledPiS_S_iii, .Lfunc_end1-_Z13matMultPTiledPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 556
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8matMultPPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8matMultPPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13matMultPTiledPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13matMultPTiledPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
