/* 
  sergeim19
  April 27, 2015
  Burgers equation - GPU CUDA version
*/

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <cuda.h>
#include <cufft.h>
#include <time.h>
#include <sys/time.h>

#define NADVANCE (4000)
#define nu (5.0e-2)

int timeval_subtract (double *result, struct timeval *x, struct timeval *y)
{
  struct timeval result0;
    
  /* Perform the carry for the later subtraction by updating y. */
  if (x->tv_usec < y->tv_usec) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000 + 1;
    y->tv_usec -= 1000000 * nsec;
    y->tv_sec += nsec;
  }
  if (x->tv_usec - y->tv_usec > 1000000) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000;
    y->tv_usec += 1000000 * nsec;
    y->tv_sec -= nsec;
  }

  /* Compute the time remaining to wait.
     tv_usec is certainly positive. */
  result0.tv_sec = x->tv_sec - y->tv_sec;
  result0.tv_usec = x->tv_usec - y->tv_usec;
  *result = ((double)result0.tv_usec)/1e6 + (double)result0.tv_sec;

  /* Return 1 if result is negative. */
  return x->tv_sec < y->tv_sec;
}

__global__ void kernel_rescale_u(double *u_dev, int N)
{  
  int j;
  j = blockIdx.x * blockDim.x + threadIdx.x;

  u_dev[j] = u_dev[j] / (double)N;
}

__global__ void kernel_calc_uu(double *u_dev, double *uu_dev)
{  
  int j;
  j = blockIdx.x * blockDim.x + threadIdx.x;

  uu_dev[j] = 0.5 * u_dev[j] * u_dev[j];
}

__global__ void kernel_setmodezero(cufftDoubleComplex *fhat, int n)
{
  fhat[n].x = 0.0;
  fhat[n].y = 0.0;
}

__global__ void kernel_burgers(cufftDoubleComplex *uhat, cufftDoubleComplex *uuhat, double dt)
{  
  int jj;
  jj = blockIdx.x * blockDim.x + threadIdx.x;

  double j = (double)jj;

  uhat[jj].x = ( uhat[jj].x*(1.0 + j*j*nu*dt) + j*dt*uuhat[jj].y )/
    ( pow((1.0 + j*j*nu*dt), 2) );
  uhat[jj].y = ( uhat[jj].y*(1.0 + j*j*nu*dt) - j*dt*uuhat[jj].x )/
    ( pow((1.0 + j*j*nu*dt), 2) );

}

int main(void)
{
  FILE *out_file = fopen("data_burgers_gpu.dat", "w");
  int N = 1048576, blockSize = 512, nBlocks = N/blockSize;
  double dx = 2.0 * M_PI / (double)N, dt = 1.0e-3;
  double *x, *u, *u_dev, *uu_dev;
  double norm = 0.0;
  int devid, devcount, error;
  double restime;
  struct timeval  tdr0, tdr1;

  /*  find compute device an initialize it */
  /* add device detection */
  
  /* find number of device in current "context" */
  cudaGetDevice(&devid);
  /* find how many devices are available */
  if (cudaGetDeviceCount(&devcount) || devcount==0)
    {
      printf ("No CUDA devices!\n");
      exit (1);
    }
  else
    {
      cudaDeviceProp deviceProp; 
      cudaGetDeviceProperties (&deviceProp, devid);
      printf ("Device count, devid: %d %d\n", devcount, devid);
      printf ("Device: %s\n", deviceProp.name);
      printf("[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n", deviceProp.major, deviceProp.minor);
    }

  x = (double *) malloc (sizeof (double) * N); 
  cudaMallocHost((void **) &u, sizeof (double) * N);
  
  // Generate initial conditions
  for (int i = 0; i < N; i++) {
    x[i] = (double)i * dx;
    u[i] = sin(x[i]);
  }

  // Allocate device memory
  cudaMalloc((void **)&u_dev, sizeof (double) * N);
  cudaMalloc((void **)&uu_dev, sizeof (double) * N);
  
  // Copy array to device memory
  if (error = cudaMemcpy(u_dev, u, sizeof (double) * N, cudaMemcpyHostToDevice))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  cudaDeviceSynchronize();
  ///////////////////////////////////////////////////////////////////////////////////

  cufftDoubleComplex *uhat, *uuhat;

  //int fourier_mem_size = sizeof(cufftDoubleComplex)* (N/2 + 1);
  cudaMalloc((void**) &uhat, sizeof(cufftDoubleComplex) * (N/2 + 1) );
  cudaMalloc((void**) &uuhat, sizeof(cufftDoubleComplex) * (N/2 + 1) );
  
  // CUFFT plans
  cufftHandle plan_forward, plan_backward;
  cufftPlan1d(&plan_forward, N, CUFFT_D2Z, 1);
  cufftPlan1d(&plan_backward, N, CUFFT_Z2D, 1);

  // Get initial uhat 
  cufftExecD2Z(plan_forward, u_dev, uhat);
  // Set N/2th mode to zero
  kernel_setmodezero<<<1, 1>>>(uhat, N/2);
  cudaDeviceSynchronize();

  gettimeofday (&tdr0, NULL);

  // Main time stepping
  for (int i = 0; i < NADVANCE; i++) {

    // Fourier to real space
    cufftExecZ2D(plan_backward, uhat, u_dev);
    cudaDeviceSynchronize();

    // Rescale 
    kernel_rescale_u<<<nBlocks, blockSize>>>(u_dev, N);
    cudaDeviceSynchronize();

    // Calculate nonlinear product in real space
    kernel_calc_uu<<<nBlocks, blockSize>>>(u_dev, uu_dev);
    cudaDeviceSynchronize();

    // Nonlinear product in Fourier space
    cufftExecD2Z(plan_forward, uu_dev, uuhat);
    cudaDeviceSynchronize();
    kernel_setmodezero<<<1, 1>>>(uuhat, N/2);
    cudaDeviceSynchronize();
    
    // New uhat
    kernel_burgers<<<nBlocks/2, blockSize>>>(uhat, uuhat, dt);
    cudaDeviceSynchronize();
    kernel_setmodezero<<<1, 1>>>(uhat, N/2);
    cudaDeviceSynchronize();
  }
  
  // Final result
  cufftExecZ2D(plan_backward, uhat, u_dev);
  cudaDeviceSynchronize();
  
  /* retrieve results from device (synchronous) */
  if (error = cudaMemcpy(u, u_dev, sizeof (double) * N, cudaMemcpyDeviceToHost))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  cudaDeviceSynchronize();
  
  // Rescale
  for (int i = 0; i < N; i++) {
    u[i] = u[i] / (double)N;
  }

  gettimeofday (&tdr1, NULL);

  // Timing information
  timeval_subtract (&restime, &tdr1, &tdr0);
  printf ("gpu time: %es\n", restime);

  // Show L2 norm
  for (int i = 0; i < N; i++) {
    norm += fabs(u[i] * u[i]);
  }
  norm = sqrt(norm);
  printf ("norm: %e\n", norm);

  // Print results to file
  if (out_file == NULL) {
    printf("Error opening file\n");
  }
  for (int i = 0; i < N; i++) {
    fprintf(out_file, "%.15f, %.15f\n", x[i], u[i]);
  }
  
  free(x);
  cudaFree(u);
  cudaFree(u_dev);
  cudaFree(uhat);
  cudaFree(uuhat);
  cufftDestroy(plan_forward);
  cufftDestroy(plan_backward);
  
  return 0;
}






	.file	"tmpxft_0020866f_00000000-6_burgers_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2054:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2054:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16timeval_subtractPdP7timevalS1_
	.type	_Z16timeval_subtractPdP7timevalS1_, @function
_Z16timeval_subtractPdP7timevalS1_:
.LFB2050:
	.cfi_startproc
	endbr64
	movq	%rdx, %rcx
	movq	8(%rsi), %rdx
	movq	8(%rcx), %r8
	cmpq	%r8, %rdx
	jge	.L3
	movq	%r8, %rax
	movl	$1000000, %r9d
	subq	%rdx, %rax
	cqto
	idivq	%r9
	incl	%eax
	imull	$1000000, %eax, %edx
	cltq
	addq	%rax, (%rcx)
	movslq	%edx, %rdx
	subq	%rdx, %r8
	movq	%r8, 8(%rcx)
.L3:
	movq	8(%rsi), %rdx
	movq	8(%rcx), %r8
	movq	%rdx, %rax
	subq	%r8, %rax
	cmpq	$1000000, %rax
	jle	.L4
	movq	%r8, %rax
	movl	$1000000, %r9d
	subq	%rdx, %rax
	cqto
	idivq	%r9
	imull	$1000000, %eax, %edx
	cltq
	subq	%rax, (%rcx)
	movslq	%edx, %rdx
	addq	%r8, %rdx
	movq	%rdx, 8(%rcx)
.L4:
	movq	(%rsi), %r8
	movq	(%rcx), %rdx
	movq	8(%rsi), %rax
	subq	8(%rcx), %rax
	cvtsi2sdq	%rax, %xmm0
	movq	%r8, %rax
	divsd	.LC0(%rip), %xmm0
	subq	%rdx, %rax
	cvtsi2sdq	%rax, %xmm1
	xorl	%eax, %eax
	cmpq	%rdx, %r8
	setl	%al
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdi)
	ret
	.cfi_endproc
.LFE2050:
	.size	_Z16timeval_subtractPdP7timevalS1_, .-_Z16timeval_subtractPdP7timevalS1_
	.globl	_Z37__device_stub__Z16kernel_rescale_uPdiPdi
	.type	_Z37__device_stub__Z16kernel_rescale_uPdiPdi, @function
_Z37__device_stub__Z16kernel_rescale_uPdiPdi:
.LFB2076:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z16kernel_rescale_uPdi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L6:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2076:
	.size	_Z37__device_stub__Z16kernel_rescale_uPdiPdi, .-_Z37__device_stub__Z16kernel_rescale_uPdiPdi
	.globl	_Z16kernel_rescale_uPdi
	.type	_Z16kernel_rescale_uPdi, @function
_Z16kernel_rescale_uPdi:
.LFB2077:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z16kernel_rescale_uPdiPdi
	.cfi_endproc
.LFE2077:
	.size	_Z16kernel_rescale_uPdi, .-_Z16kernel_rescale_uPdi
	.globl	_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_
	.type	_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_, @function
_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_:
.LFB2078:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14kernel_calc_uuPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L11:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2078:
	.size	_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_, .-_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_
	.globl	_Z14kernel_calc_uuPdS_
	.type	_Z14kernel_calc_uuPdS_, @function
_Z14kernel_calc_uuPdS_:
.LFB2079:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_
	.cfi_endproc
.LFE2079:
	.size	_Z14kernel_calc_uuPdS_, .-_Z14kernel_calc_uuPdS_
	.globl	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i
	.type	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i, @function
_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i:
.LFB2080:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18kernel_setmodezeroP7double2i(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2080:
	.size	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i, .-_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i
	.globl	_Z18kernel_setmodezeroP7double2i
	.type	_Z18kernel_setmodezeroP7double2i, @function
_Z18kernel_setmodezeroP7double2i:
.LFB2081:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i
	.cfi_endproc
.LFE2081:
	.size	_Z18kernel_setmodezeroP7double2i, .-_Z18kernel_setmodezeroP7double2i
	.globl	_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d
	.type	_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d, @function
_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d:
.LFB2082:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	48(%rsp), %rdi
	leaq	60(%rsp), %rsi
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14kernel_burgersP7double2S0_d(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L21:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2082:
	.size	_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d, .-_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d
	.globl	_Z14kernel_burgersP7double2S0_d
	.type	_Z14kernel_burgersP7double2S0_d, @function
_Z14kernel_burgersP7double2S0_d:
.LFB2083:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d
	.cfi_endproc
.LFE2083:
	.size	_Z14kernel_burgersP7double2S0_d, .-_Z14kernel_burgersP7double2S0_d
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"w"
.LC3:
	.string	"data_burgers_gpu.dat"
.LC4:
	.string	"Device count, devid: %d %d\n"
.LC5:
	.string	"Device: %s\n"
.LC6:
	.string	"[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n"
.LC7:
	.string	"No CUDA devices!\n"
.LC9:
	.string	"Error %d\n"
.LC12:
	.string	"gpu time: %es\n"
.LC13:
	.string	"norm: %e\n"
.LC14:
	.string	"Error opening file\n"
.LC15:
	.string	"%.15f, %.15f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2051:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %rsi
	leaq	.LC3(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1176, %rsp
	.cfi_def_cfa_offset 1232
	movq	%fs:40, %rax
	movq	%rax, 1160(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	24(%rsp), %rdi
	movq	%rax, (%rsp)
	call	cudaGetDevice@PLT
	leaq	28(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	testl	%eax, %eax
	jne	.L27
	cmpl	$0, 28(%rsp)
	je	.L27
	leaq	128(%rsp), %rbx
	movl	24(%rsp), %esi
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	24(%rsp), %ecx
	movl	28(%rsp), %edx
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	movl	492(%rsp), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	movl	488(%rsp), %edx
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movl	$8388608, %edi
	call	malloc@PLT
	leaq	40(%rsp), %rdi
	movl	$8388608, %esi
	movq	%rax, %r12
	call	cudaMallocHost@PLT
	movq	40(%rsp), %rbp
	jmp	.L28
.L27:
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	jmp	.L49
.L28:
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC8(%rip), %xmm0
	movsd	%xmm0, (%r12,%rbx,8)
	call	sin@PLT
	movsd	%xmm0, 0(%rbp,%rbx,8)
	incq	%rbx
	cmpq	$1048576, %rbx
	jne	.L28
	leaq	48(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L29
.L50:
	movl	$2, %edi
	movl	%ebx, %edx
	leaq	.LC9(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
.L49:
	call	exit@PLT
.L29:
	call	cudaDeviceSynchronize@PLT
	leaq	64(%rsp), %rdi
	movl	$8388624, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$8388624, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$106, %edx
	movl	$1048576, %esi
	call	cufftPlan1d@PLT
	movl	$1, %ecx
	leaq	36(%rsp), %rdi
	movl	$108, %edx
	movl	$1048576, %esi
	call	cufftPlan1d@PLT
	movq	64(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	32(%rsp), %edi
	call	cufftExecD2Z@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movl	$1, 120(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 112(%rsp)
	movq	%rdi, 96(%rsp)
	movl	$1, 104(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	64(%rsp), %rdi
	movl	$524288, %esi
	call	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i
.L30:
	call	cudaDeviceSynchronize@PLT
	leaq	96(%rsp), %rax
	xorl	%esi, %esi
	movl	$8388609, %ebp
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	movl	$4000, %r14d
	salq	$9, %rbp
	call	gettimeofday@PLT
	movabsq	$4294969344, %r13
	movabsq	$4294967297, %rbx
	movabsq	$4294968320, %r15
.L36:
	movq	48(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	36(%rsp), %edi
	call	cufftExecZ2D@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%r13, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	48(%rsp), %rdi
	movl	$1048576, %esi
	call	_Z37__device_stub__Z16kernel_rescale_uPdiPdi
.L31:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%r13, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z36__device_stub__Z14kernel_calc_uuPdS_PdS_
.L32:
	call	cudaDeviceSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	32(%rsp), %edi
	call	cufftExecD2Z@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rbx, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	72(%rsp), %rdi
	movl	$524288, %esi
	call	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i
.L33:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbp, %rdx
	movl	$1, %ecx
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbp, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%r15, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movsd	.LC10(%rip), %xmm0
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z45__device_stub__Z14kernel_burgersP7double2S0_dP7double2S0_d
.L34:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rbx, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	64(%rsp), %rdi
	movl	$524288, %esi
	call	_Z46__device_stub__Z18kernel_setmodezeroP7double2iP7double2i
.L35:
	call	cudaDeviceSynchronize@PLT
	decl	%r14d
	jne	.L36
	movq	48(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	36(%rsp), %edi
	call	cufftExecZ2D@PLT
	call	cudaDeviceSynchronize@PLT
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$2, %ecx
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L50
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdx
	movsd	.LC11(%rip), %xmm1
	xorl	%eax, %eax
.L38:
	movsd	(%rdx,%rax,8), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rdx,%rax,8)
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L38
	leaq	112(%rsp), %rbx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	gettimeofday@PLT
	movq	8(%rsp), %rdx
	leaq	80(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z16timeval_subtractPdP7timevalS1_
	movsd	80(%rsp), %xmm0
	leaq	.LC12(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	40(%rsp), %rdx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L39:
	movsd	(%rdx,%rax,8), %xmm0
	incq	%rax
	mulsd	%xmm0, %xmm0
	addsd	%xmm0, %xmm1
	cmpq	$1048576, %rax
	jne	.L39
	movaps	%xmm1, %xmm0
	call	sqrt@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	cmpq	$0, (%rsp)
	jne	.L40
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L40:
	xorl	%ebx, %ebx
	leaq	.LC15(%rip), %rbp
.L41:
	movq	40(%rsp), %rax
	movq	(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$2, %esi
	movsd	(%r12,%rbx), %xmm0
	movsd	(%rax,%rbx), %xmm1
	movb	$2, %al
	addq	$8, %rbx
	call	__fprintf_chk@PLT
	cmpq	$8388608, %rbx
	jne	.L41
	movq	%r12, %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	32(%rsp), %edi
	call	cufftDestroy@PLT
	movl	36(%rsp), %edi
	call	cufftDestroy@PLT
	movq	1160(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$1176, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2051:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z14kernel_burgersP7double2S0_d"
.LC17:
	.string	"_Z18kernel_setmodezeroP7double2i"
.LC18:
	.string	"_Z14kernel_calc_uuPdS_"
.LC19:
	.string	"_Z16kernel_rescale_uPdi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2085:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14kernel_burgersP7double2S0_d(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18kernel_setmodezeroP7double2i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14kernel_calc_uuPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16kernel_rescale_uPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2085:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.align 8
.LC8:
	.long	1413754136
	.long	1054417403
	.align 8
.LC10:
	.long	-755914244
	.long	1062232653
	.align 8
.LC11:
	.long	0
	.long	1051721728
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* 
  sergeim19
  April 27, 2015
  Burgers equation - GPU CUDA version
*/

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <hip/hip_runtime.h>
#include <hipfft/hipfft.h>
#include <time.h>
#include <sys/time.h>

#define NADVANCE (4000)
#define nu (5.0e-2)

int timeval_subtract (double *result, struct timeval *x, struct timeval *y)
{
  struct timeval result0;
    
  /* Perform the carry for the later subtraction by updating y. */
  if (x->tv_usec < y->tv_usec) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000 + 1;
    y->tv_usec -= 1000000 * nsec;
    y->tv_sec += nsec;
  }
  if (x->tv_usec - y->tv_usec > 1000000) {
    int nsec = (y->tv_usec - x->tv_usec) / 1000000;
    y->tv_usec += 1000000 * nsec;
    y->tv_sec -= nsec;
  }

  /* Compute the time remaining to wait.
     tv_usec is certainly positive. */
  result0.tv_sec = x->tv_sec - y->tv_sec;
  result0.tv_usec = x->tv_usec - y->tv_usec;
  *result = ((double)result0.tv_usec)/1e6 + (double)result0.tv_sec;

  /* Return 1 if result is negative. */
  return x->tv_sec < y->tv_sec;
}

__global__ void kernel_rescale_u(double *u_dev, int N)
{  
  int j;
  j = blockIdx.x * blockDim.x + threadIdx.x;

  u_dev[j] = u_dev[j] / (double)N;
}

__global__ void kernel_calc_uu(double *u_dev, double *uu_dev)
{  
  int j;
  j = blockIdx.x * blockDim.x + threadIdx.x;

  uu_dev[j] = 0.5 * u_dev[j] * u_dev[j];
}

__global__ void kernel_setmodezero(hipfftDoubleComplex *fhat, int n)
{
  fhat[n].x = 0.0;
  fhat[n].y = 0.0;
}

__global__ void kernel_burgers(hipfftDoubleComplex *uhat, hipfftDoubleComplex *uuhat, double dt)
{  
  int jj;
  jj = blockIdx.x * blockDim.x + threadIdx.x;

  double j = (double)jj;

  uhat[jj].x = ( uhat[jj].x*(1.0 + j*j*nu*dt) + j*dt*uuhat[jj].y )/
    ( pow((1.0 + j*j*nu*dt), 2) );
  uhat[jj].y = ( uhat[jj].y*(1.0 + j*j*nu*dt) - j*dt*uuhat[jj].x )/
    ( pow((1.0 + j*j*nu*dt), 2) );

}

int main(void)
{
  FILE *out_file = fopen("data_burgers_gpu.dat", "w");
  int N = 1048576, blockSize = 512, nBlocks = N/blockSize;
  double dx = 2.0 * M_PI / (double)N, dt = 1.0e-3;
  double *x, *u, *u_dev, *uu_dev;
  double norm = 0.0;
  int devid, devcount, error;
  double restime;
  struct timeval  tdr0, tdr1;

  /*  find compute device an initialize it */
  /* add device detection */
  
  /* find number of device in current "context" */
  hipGetDevice(&devid);
  /* find how many devices are available */
  if (hipGetDeviceCount(&devcount) || devcount==0)
    {
      printf ("No CUDA devices!\n");
      exit (1);
    }
  else
    {
      hipDeviceProp_t deviceProp; 
      hipGetDeviceProperties (&deviceProp, devid);
      printf ("Device count, devid: %d %d\n", devcount, devid);
      printf ("Device: %s\n", deviceProp.name);
      printf("[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n", deviceProp.major, deviceProp.minor);
    }

  x = (double *) malloc (sizeof (double) * N); 
  hipHostMalloc((void **) &u, sizeof (double) * N, hipHostMallocDefault);
  
  // Generate initial conditions
  for (int i = 0; i < N; i++) {
    x[i] = (double)i * dx;
    u[i] = sin(x[i]);
  }

  // Allocate device memory
  hipMalloc((void **)&u_dev, sizeof (double) * N);
  hipMalloc((void **)&uu_dev, sizeof (double) * N);
  
  // Copy array to device memory
  if (error = hipMemcpy(u_dev, u, sizeof (double) * N, hipMemcpyHostToDevice))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  hipDeviceSynchronize();
  ///////////////////////////////////////////////////////////////////////////////////

  hipfftDoubleComplex *uhat, *uuhat;

  //int fourier_mem_size = sizeof(cufftDoubleComplex)* (N/2 + 1);
  hipMalloc((void**) &uhat, sizeof(hipfftDoubleComplex) * (N/2 + 1) );
  hipMalloc((void**) &uuhat, sizeof(hipfftDoubleComplex) * (N/2 + 1) );
  
  // CUFFT plans
  hipfftHandle plan_forward, plan_backward;
  hipfftPlan1d(&plan_forward, N, HIPFFT_D2Z, 1);
  hipfftPlan1d(&plan_backward, N, HIPFFT_Z2D, 1);

  // Get initial uhat 
  hipfftExecD2Z(plan_forward, u_dev, uhat);
  // Set N/2th mode to zero
  kernel_setmodezero<<<1, 1>>>(uhat, N/2);
  hipDeviceSynchronize();

  gettimeofday (&tdr0, NULL);

  // Main time stepping
  for (int i = 0; i < NADVANCE; i++) {

    // Fourier to real space
    hipfftExecZ2D(plan_backward, uhat, u_dev);
    hipDeviceSynchronize();

    // Rescale 
    kernel_rescale_u<<<nBlocks, blockSize>>>(u_dev, N);
    hipDeviceSynchronize();

    // Calculate nonlinear product in real space
    kernel_calc_uu<<<nBlocks, blockSize>>>(u_dev, uu_dev);
    hipDeviceSynchronize();

    // Nonlinear product in Fourier space
    hipfftExecD2Z(plan_forward, uu_dev, uuhat);
    hipDeviceSynchronize();
    kernel_setmodezero<<<1, 1>>>(uuhat, N/2);
    hipDeviceSynchronize();
    
    // New uhat
    kernel_burgers<<<nBlocks/2, blockSize>>>(uhat, uuhat, dt);
    hipDeviceSynchronize();
    kernel_setmodezero<<<1, 1>>>(uhat, N/2);
    hipDeviceSynchronize();
  }
  
  // Final result
  hipfftExecZ2D(plan_backward, uhat, u_dev);
  hipDeviceSynchronize();
  
  /* retrieve results from device (synchronous) */
  if (error = hipMemcpy(u, u_dev, sizeof (double) * N, hipMemcpyDeviceToHost))
    {
      printf ("Error %d\n", error);
      exit (error);
    }
  hipDeviceSynchronize();
  
  // Rescale
  for (int i = 0; i < N; i++) {
    u[i] = u[i] / (double)N;
  }

  gettimeofday (&tdr1, NULL);

  // Timing information
  timeval_subtract (&restime, &tdr1, &tdr0);
  printf ("gpu time: %es\n", restime);

  // Show L2 norm
  for (int i = 0; i < N; i++) {
    norm += fabs(u[i] * u[i]);
  }
  norm = sqrt(norm);
  printf ("norm: %e\n", norm);

  // Print results to file
  if (out_file == NULL) {
    printf("Error opening file\n");
  }
  for (int i = 0; i < N; i++) {
    fprintf(out_file, "%.15f, %.15f\n", x[i], u[i]);
  }
  
  free(x);
  hipFree(u);
  hipFree(u_dev);
  hipFree(uhat);
  hipFree(uuhat);
  hipfftDestroy(plan_forward);
  hipfftDestroy(plan_backward);
  
  return 0;
}






	.text
	.file	"burgers_cuda.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z16timeval_subtractPdP7timevalS1_
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z16timeval_subtractPdP7timevalS1_
	.type	_Z16timeval_subtractPdP7timevalS1_,@function
_Z16timeval_subtractPdP7timevalS1_:     # @_Z16timeval_subtractPdP7timevalS1_
	.cfi_startproc
# %bb.0:
	movq	%rdx, %rcx
	movq	8(%rsi), %rdx
	movq	(%rcx), %r8
	movq	8(%rcx), %r9
	movq	%r9, %rax
	movabsq	$4835703278458516699, %r10      # imm = 0x431BDE82D7B634DB
	subq	%rdx, %rax
	jle	.LBB0_2
# %bb.1:
	imulq	%r10
	movq	%rdx, %rax
	shrq	$18, %rax
	shrq	$63, %rdx
	addl	%edx, %eax
	incl	%eax
	imull	$1000000, %eax, %edx            # imm = 0xF4240
	movslq	%edx, %rdx
	subq	%rdx, %r9
	movq	%r9, 8(%rcx)
	cltq
	addq	%rax, %r8
	movq	%r8, (%rcx)
	movq	8(%rsi), %rdx
.LBB0_2:
	movq	%rdx, %rax
	subq	%r9, %rax
	cmpq	$1000001, %rax                  # imm = 0xF4241
	jl	.LBB0_4
# %bb.3:
	movq	%r9, %rax
	subq	%rdx, %rax
	imulq	%r10
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$18, %rdx
	addq	%rax, %rdx
	movabsq	$4294967296000000, %r10         # imm = 0xF424000000000
	imulq	%rdx, %r10
	sarq	$32, %r10
	addq	%r9, %r10
	movq	%r10, 8(%rcx)
	movslq	%edx, %rax
	subq	%rax, %r8
	movq	%r8, (%rcx)
	movq	8(%rsi), %rax
	subq	%r10, %rax
.LBB0_4:
	movq	(%rsi), %rcx
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	xorl	%eax, %eax
	subq	%r8, %rcx
	cvtsi2sd	%rcx, %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, (%rdi)
	setl	%al
	retq
.Lfunc_end0:
	.size	_Z16timeval_subtractPdP7timevalS1_, .Lfunc_end0-_Z16timeval_subtractPdP7timevalS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__kernel_rescale_uPdi # -- Begin function _Z31__device_stub__kernel_rescale_uPdi
	.type	_Z31__device_stub__kernel_rescale_uPdi,@function
_Z31__device_stub__kernel_rescale_uPdi: # @_Z31__device_stub__kernel_rescale_uPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_rescale_uPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__kernel_rescale_uPdi, .Lfunc_end1-_Z31__device_stub__kernel_rescale_uPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__kernel_calc_uuPdS_ # -- Begin function _Z29__device_stub__kernel_calc_uuPdS_
	.type	_Z29__device_stub__kernel_calc_uuPdS_,@function
_Z29__device_stub__kernel_calc_uuPdS_:  # @_Z29__device_stub__kernel_calc_uuPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_calc_uuPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__kernel_calc_uuPdS_, .Lfunc_end2-_Z29__device_stub__kernel_calc_uuPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi # -- Begin function _Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.type	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi,@function
_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi: # @_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi, .Lfunc_end3-_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d # -- Begin function _Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.type	_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d,@function
_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d: # @_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d, .Lfunc_end4-_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x3ed921fb54442d18              # double 5.9921124526782858E-6
.LCPI5_1:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
.LCPI5_2:
	.quad	0x3eb0000000000000              # double 9.5367431640625E-7
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI5_3:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 1632
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	36(%rsp), %rdi
	callq	hipGetDevice
	leaq	32(%rsp), %rdi
	callq	hipGetDeviceCount
	testl	%eax, %eax
	jne	.LBB5_32
# %bb.1:
	cmpl	$0, 32(%rsp)
	je	.LBB5_32
# %bb.2:
	movq	%rbx, 72(%rsp)                  # 8-byte Spill
	movl	36(%rsp), %esi
	leaq	104(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDevicePropertiesR0600
	movl	32(%rsp), %esi
	movl	36(%rsp), %edx
	xorl	%ebx, %ebx
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	360(%r14), %esi
	movl	364(%r14), %edx
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$8388608, %edi                  # imm = 0x800000
	callq	malloc
	movq	%rax, %r14
	leaq	16(%rsp), %rdi
	movl	$8388608, %esi                  # imm = 0x800000
	xorl	%edx, %edx
	callq	hipHostMalloc
.LBB5_3:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebx, %xmm0
	mulsd	.LCPI5_0(%rip), %xmm0
	movsd	%xmm0, (%r14,%rbx,8)
	callq	sin
	movq	16(%rsp), %rax
	movsd	%xmm0, (%rax,%rbx,8)
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB5_3
# %bb.4:
	leaq	8(%rsp), %r15
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movl	$8388608, %esi                  # imm = 0x800000
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	16(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_33
# %bb.5:
	movabsq	$4294967297, %r15               # imm = 0x100000001
	callq	hipDeviceSynchronize
	leaq	24(%rsp), %r12
	movl	$8388624, %esi                  # imm = 0x800010
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$8388624, %esi                  # imm = 0x800010
	callq	hipMalloc
	leaq	56(%rsp), %r13
	movq	%r13, %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	movl	$106, %edx
	movl	$1, %ecx
	callq	hipfftPlan1d
	leaq	48(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	movl	$108, %edx
	movl	$1, %ecx
	callq	hipfftPlan1d
	movq	(%r13), %rdi
	movq	8(%rsp), %rsi
	movq	(%r12), %rdx
	callq	hipfftExecD2Z
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_7
# %bb.6:
	movq	24(%rsp), %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
.LBB5_7:
	callq	hipDeviceSynchronize
	leaq	104(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	$4000, %ebx                     # imm = 0xFA0
	leaq	511(%r15), %r12
	leaq	2047(%r15), %r13
	leaq	1023(%r15), %rbp
.LBB5_8:                                # =>This Inner Loop Header: Depth=1
	movq	48(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	hipfftExecZ2D
	callq	hipDeviceSynchronize
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.9:                                #   in Loop: Header=BB5_8 Depth=1
	movq	8(%rsp), %rdi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	_Z31__device_stub__kernel_rescale_uPdi
.LBB5_10:                               #   in Loop: Header=BB5_8 Depth=1
	callq	hipDeviceSynchronize
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_12
# %bb.11:                               #   in Loop: Header=BB5_8 Depth=1
	movq	8(%rsp), %rdi
	movq	64(%rsp), %rsi
	callq	_Z29__device_stub__kernel_calc_uuPdS_
.LBB5_12:                               #   in Loop: Header=BB5_8 Depth=1
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	callq	hipfftExecD2Z
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_14
# %bb.13:                               #   in Loop: Header=BB5_8 Depth=1
	movq	40(%rsp), %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
.LBB5_14:                               #   in Loop: Header=BB5_8 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_16
# %bb.15:                               #   in Loop: Header=BB5_8 Depth=1
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rsi
	movsd	.LCPI5_1(%rip), %xmm0           # xmm0 = mem[0],zero
	callq	_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d
.LBB5_16:                               #   in Loop: Header=BB5_8 Depth=1
	callq	hipDeviceSynchronize
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.17:                               #   in Loop: Header=BB5_8 Depth=1
	movq	24(%rsp), %rdi
	movl	$524288, %esi                   # imm = 0x80000
	callq	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
.LBB5_18:                               #   in Loop: Header=BB5_8 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebx
	jne	.LBB5_8
# %bb.19:
	movq	48(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	hipfftExecZ2D
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_33
# %bb.20:
	callq	hipDeviceSynchronize
	xorl	%eax, %eax
	movq	16(%rsp), %rcx
	movsd	.LCPI5_2(%rip), %xmm0           # xmm0 = mem[0],zero
.LBB5_21:                               # =>This Inner Loop Header: Depth=1
	movsd	(%rcx,%rax,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%rcx,%rax,8)
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB5_21
# %bb.22:
	xorl	%ebx, %ebx
	leaq	88(%rsp), %r15
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	leaq	80(%rsp), %r12
	leaq	104(%rsp), %rdx
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_Z16timeval_subtractPdP7timevalS1_
	movsd	(%r12), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	xorpd	%xmm0, %xmm0
	movq	16(%rsp), %rax
	movapd	.LCPI5_3(%rip), %xmm1           # xmm1 = [NaN,NaN]
.LBB5_23:                               # =>This Inner Loop Header: Depth=1
	movsd	(%rax,%rbx,8), %xmm2            # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm2
	andpd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB5_23
# %bb.24:
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	movq	72(%rsp), %r15                  # 8-byte Reload
	jb	.LBB5_26
# %bb.25:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB5_27
.LBB5_26:                               # %call.sqrt
	callq	sqrt
.LBB5_27:                               # %.split
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	testq	%r15, %r15
	jne	.LBB5_28
# %bb.31:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB5_28:                               # %.preheader
	xorl	%ebx, %ebx
.LBB5_29:                               # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%rbx,8), %xmm0            # xmm0 = mem[0],zero
	movq	16(%rsp), %rax
	movsd	(%rax,%rbx,8), %xmm1            # xmm1 = mem[0],zero
	movl	$.L.str.10, %esi
	movq	%r15, %rdi
	movb	$2, %al
	callq	fprintf
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB5_29
# %bb.30:
	movq	%r14, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipfftDestroy
	movq	48(%rsp), %rdi
	callq	hipfftDestroy
	xorl	%eax, %eax
	addq	$1576, %rsp                     # imm = 0x628
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_33:
	.cfi_def_cfa_offset 1632
	movl	%eax, %ebp
	movl	$.L.str.6, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, %edi
	callq	exit
.LBB5_32:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernel_rescale_uPdi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14kernel_calc_uuPdS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16kernel_rescale_uPdi,@object # @_Z16kernel_rescale_uPdi
	.section	.rodata,"a",@progbits
	.globl	_Z16kernel_rescale_uPdi
	.p2align	3, 0x0
_Z16kernel_rescale_uPdi:
	.quad	_Z31__device_stub__kernel_rescale_uPdi
	.size	_Z16kernel_rescale_uPdi, 8

	.type	_Z14kernel_calc_uuPdS_,@object  # @_Z14kernel_calc_uuPdS_
	.globl	_Z14kernel_calc_uuPdS_
	.p2align	3, 0x0
_Z14kernel_calc_uuPdS_:
	.quad	_Z29__device_stub__kernel_calc_uuPdS_
	.size	_Z14kernel_calc_uuPdS_, 8

	.type	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi,@object # @_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.globl	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.p2align	3, 0x0
_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi:
	.quad	_Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.size	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi, 8

	.type	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d,@object # @_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.globl	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.p2align	3, 0x0
_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d:
	.quad	_Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.size	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"data_burgers_gpu.dat"
	.size	.L.str, 21

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w"
	.size	.L.str.1, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Device count, devid: %d %d\n"
	.size	.L.str.3, 28

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Device: %s\n"
	.size	.L.str.4, 12

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"[deviceProp.major.deviceProp.minor] = [%d.%d]\n\n"
	.size	.L.str.5, 48

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Error %d\n"
	.size	.L.str.6, 10

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"gpu time: %es\n"
	.size	.L.str.7, 15

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"norm: %e\n"
	.size	.L.str.8, 10

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%.15f, %.15f\n"
	.size	.L.str.10, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16kernel_rescale_uPdi"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14kernel_calc_uuPdS_"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi"
	.size	.L__unnamed_3, 49

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d"
	.size	.L__unnamed_4, 48

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error opening file"
	.size	.Lstr, 19

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"No CUDA devices!"
	.size	.Lstr.1, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__kernel_rescale_uPdi
	.addrsig_sym _Z29__device_stub__kernel_calc_uuPdS_
	.addrsig_sym _Z33__device_stub__kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.addrsig_sym _Z29__device_stub__kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16kernel_rescale_uPdi
	.addrsig_sym _Z14kernel_calc_uuPdS_
	.addrsig_sym _Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.addrsig_sym _Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16kernel_rescale_uPdi ; -- Begin function _Z16kernel_rescale_uPdi
	.globl	_Z16kernel_rescale_uPdi
	.p2align	8
	.type	_Z16kernel_rescale_uPdi,@function
_Z16kernel_rescale_uPdi:                ; @_Z16kernel_rescale_uPdi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s2, 0xffff
	s_load_b64 s[2:3], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_load_b32 s0, s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_cvt_f64_i32_e32 v[4:5], s0
	global_load_b64 v[2:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	v_div_fixup_f64 v[2:3], v[6:7], v[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_rescale_uPdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16kernel_rescale_uPdi, .Lfunc_end0-_Z16kernel_rescale_uPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14kernel_calc_uuPdS_  ; -- Begin function _Z14kernel_calc_uuPdS_
	.globl	_Z14kernel_calc_uuPdS_
	.p2align	8
	.type	_Z14kernel_calc_uuPdS_,@function
_Z14kernel_calc_uuPdS_:                 ; @_Z14kernel_calc_uuPdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_calc_uuPdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14kernel_calc_uuPdS_, .Lfunc_end1-_Z14kernel_calc_uuPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi ; -- Begin function _Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.globl	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
	.p2align	8
	.type	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi,@function
_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi: ; @_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v3, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[2:3], s[2:3], 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b128 v0, v[0:3], s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 4
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi, .Lfunc_end2-_Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 84
; NumSgprs: 4
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 4
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d ; -- Begin function _Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.globl	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
	.p2align	8
	.type	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d,@function
_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d: ; @_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	s_mov_b32 s5, 0x3fe55555
	s_mov_b32 s4, 0x55555555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s8, 0x4222de17
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s9, 0x3fbdee67
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, 0x9999999a
	s_mov_b32 s3, 0x3fa99999
	v_cvt_f64_i32_e32 v[6:7], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[6:7], v[6:7]
	v_mul_f64 v[0:1], v[0:1], s[2:3]
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[6:7], v[6:7], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[0:1], s[2:3], 1.0
	v_frexp_mant_f64_e64 v[3:4], |v[0:1]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[3:4]
	v_cndmask_b32_e64 v5, 0, 1, vcc_lo
	v_ldexp_f64 v[3:4], v[3:4], v5
	v_frexp_exp_i32_f64_e32 v5, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[3:4], 1.0
	v_add_f64 v[14:15], v[3:4], -1.0
	v_subrev_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[16:17], v[8:9], -1.0
	v_add_f64 v[3:4], v[3:4], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[10:11], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[8:9], v[12:13]
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[3:4], v[12:13], v[3:4], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[18:19], -v[3:4]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[8:9]
	v_add_f64 v[3:4], v[16:17], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[10:11], v[3:4]
	v_add_f64 v[8:9], v[12:13], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[12:13]
	v_mul_f64 v[12:13], v[8:9], v[8:9]
	v_add_f64 v[3:4], v[3:4], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[14:15], v[3:4], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[16:17], v[14:15], s[8:9], s[6:7]
	s_mov_b32 s6, 0x3abe935a
	s_mov_b32 s7, 0x3fbe25e4
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[22:23], v[8:9], v[14:15]
	s_mov_b32 s8, 0x652b82fe
	s_mov_b32 s9, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s6, 0xcfa74449
	s_mov_b32 s7, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s6, 0x1c7792ce
	s_mov_b32 s7, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s6, 0x9999999c
	s_mov_b32 s7, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[6:7]
	s_mov_b32 s7, 0x3c7abc9e
	s_mov_b32 s6, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[14:15], v[16:17]
	v_fma_f64 v[12:13], v[14:15], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], v[16:17], v[12:13]
	v_add_f64 v[16:17], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], s[4:5]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_mov_b32 s5, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[24:25], v[20:21], s[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_fma_f64 v[18:19], v[14:15], v[8:9], -v[22:23]
	s_mov_b32 s4, 0xd5df274d
	s_mov_b32 s5, 0x3c8543b0
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], s[4:5]
	v_fma_f64 v[14:15], v[14:15], v[3:4], v[18:19]
	s_mov_b32 s5, 0x3fe62e42
	s_mov_b32 s4, 0xfefa39ef
	v_ldexp_f64 v[3:4], v[3:4], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_fma_f64 v[10:11], v[10:11], v[8:9], v[14:15]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[22:23], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[20:21], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], v[14:15]
	v_add_f64 v[22:23], v[16:17], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], v[18:19]
	v_fma_f64 v[18:19], v[16:17], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	v_fma_f64 v[12:13], v[16:17], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[12:13]
	v_cvt_f64_i32_e32 v[14:15], v5
	v_add_f64 v[12:13], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[8:9], v[12:13]
	v_add_f64 v[18:19], v[12:13], -v[20:21]
	v_mul_f64 v[20:21], v[14:15], s[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[16:17], -v[8:9]
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[14:15], s[4:5], -v[20:21]
	s_mov_b32 s5, 0xbfe62e42
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[3:4], v[3:4], v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[6:7], v[18:19]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], v[8:9]
	v_add_f64 v[8:9], v[20:21], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], v[3:4]
	v_add_f64 v[20:21], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[8:9]
	v_add_f64 v[3:4], v[3:4], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[12:13], -v[18:19]
	v_add_f64 v[16:17], v[10:11], v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[3:4], v[3:4], -v[12:13]
	v_add_f64 v[18:19], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[12:13], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[3:4], v[3:4], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[8:9]
	v_add_f64 v[8:9], v[18:19], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], -v[18:19]
	v_add_f64 v[12:13], v[8:9], v[8:9]
	v_add_f64 v[3:4], v[3:4], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], 2.0, -v[12:13]
	v_cmp_class_f64_e64 vcc_lo, v[12:13], 0x204
	v_fma_f64 v[8:9], v[3:4], 2.0, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[12:13], v[8:9]
	v_dual_cndmask_b32 v15, v11, v13 :: v_dual_cndmask_b32 v14, v10, v12
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[3:4], v[14:15], s[8:9]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[16:17], v[3:4]
	v_fma_f64 v[3:4], v[16:17], s[4:5], v[14:15]
	s_mov_b32 s4, 0xfca7ab0c
	s_mov_b32 s5, 0x3e928af3
	v_cvt_i32_f64_e32 v28, v[16:17]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], s[6:7], v[3:4]
	s_mov_b32 s6, 0x6a5dcb37
	s_mov_b32 s7, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[3:4], v[18:19], s[6:7], s[4:5]
	s_mov_b32 s4, 0x623fde64
	s_mov_b32 s5, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[3:4], v[18:19], v[3:4], s[4:5]
	s_mov_b32 s4, 0x7c89e6b0
	s_mov_b32 s5, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[3:4], v[18:19], v[3:4], s[4:5]
	s_mov_b32 s4, 0x14761f6e
	s_mov_b32 s5, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[3:4], v[18:19], v[3:4], s[4:5]
	s_mov_b32 s4, 0x1852b7b0
	s_mov_b32 s5, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[4:5], v[18:19], v[3:4], s[4:5]
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s0, 0x11122322
	s_mov_b32 s1, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 4, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v24, vcc_lo, s4, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v21, vcc_lo
	v_add_co_u32 v20, vcc_lo, s6, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s7, v21, vcc_lo
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[14:15]|
	global_load_b64 v[26:27], v[20:21], off offset:8
	v_fma_f64 v[22:23], v[18:19], v[4:5], s[0:1]
	global_load_b128 v[2:5], v[24:25], off
	s_mov_b32 s0, 0x555502a1
	s_mov_b32 s1, 0x3fa55555
	v_dual_cndmask_b32 v9, 0, v9 :: v_dual_cndmask_b32 v8, 0, v8
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[14:15]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[18:19], v[22:23], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], v[22:23], 1.0
	v_ldexp_f64 v[12:13], v[16:17], v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, 0x7ff00000, v13, s0
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[0:1]|
	v_cndmask_b32_e64 v11, 0, v10, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, 0, v12, vcc_lo
	v_cmp_neq_f64_e64 s1, 0, v[0:1]
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v9, v9, v11 :: v_dual_cndmask_b32 v8, v8, v10
	s_and_b32 vcc_lo, s1, s0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v8, 0, v8 :: v_dual_and_b32 v9, 0x7fffffff, v9
	v_cndmask_b32_e64 v9, 0x7ff00000, v9, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, 0, v9, s1
	v_fma_f64 v[2:3], v[26:27], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[10:11], null, v[8:9], v[8:9], v[2:3]
	v_div_scale_f64 v[16:17], vcc_lo, v[2:3], v[8:9], v[2:3]
	v_rcp_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_mul_f64 v[14:15], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[10:11], v[14:15], v[16:17]
	v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[2:3], v[10:11], v[8:9], v[2:3]
	global_store_b64 v[24:25], v[2:3], off
	global_load_b64 v[2:3], v[20:21], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_fma_f64 v[0:1], v[4:5], v[0:1], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[2:3], null, v[8:9], v[8:9], v[0:1]
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, v[0:1], v[8:9], v[0:1]
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], -v[2:3], v[10:11], v[6:7]
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[2:3], v[8:9], v[0:1]
	global_store_b64 v[24:25], v[0:1], off offset:8
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d, .Lfunc_end3-_Z14kernel_burgersP15HIP_vector_typeIdLj2EES1_d
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2372
; NumSgprs: 18
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16kernel_rescale_uPdi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16kernel_rescale_uPdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
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    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _Z14kernel_calc_uuPdS_
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    .sgpr_spill_count: 0
    .symbol:         _Z14kernel_calc_uuPdS_.kd
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    .vgpr_spill_count: 0
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    .language:       OpenCL C
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    .name:           _Z18kernel_setmodezeroP15HIP_vector_typeIdLj2EEi
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    .sgpr_spill_count: 0
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    .vgpr_count:     4
    .vgpr_spill_count: 0
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
