#include <iostream>
#include <cstdio>
using namespace std;
#include <cuda_runtime.h>
#define TIMES 24

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////HELP FUNCTIONS/////////////////////////////////////////////////
void RandomInit(float* data, int n)
{
    for (int i=0; i<n; i++)
	{
        data[i] = rand() / (float)RAND_MAX;
	}
}

void RandomInit(unsigned* data, int n)
{
    for (int i=0; i<n; i++)
	{
        data[i] = rand() % n;
	}
}
#define checkCudaErrors(err)  __checkCudaErrors (err, __FILE__, __LINE__)
inline void __checkCudaErrors(cudaError err, const char *file, const int line )
{
    if(cudaSuccess != err)
    {
        fprintf(stderr, "%s(%i) : CUDA Runtime API error %d: %s.\n",file, line, (int)err, cudaGetErrorString( err ) );
        exit(-1);        
    }
}

// This will output the proper error string when calling cudaGetLastError
#define getLastCudaError(msg)      __getLastCudaError (msg, __FILE__, __LINE__)

inline void __getLastCudaError(const char *errorMessage, const char *file, const int line )
{
    cudaError_t err = cudaGetLastError();
    if (cudaSuccess != err)
    {
        fprintf(stderr, "%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n",
        file, line, errorMessage, (int)err, cudaGetErrorString( err ) );
        exit(-1);
    }
}

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////_VECTOR_ADDITION_///////////////////////////////////////////////////////
// Device code


__global__ void irreguler(const float* A, float* C, float* F)	
	
{	
int i = blockDim.x * blockIdx.x + threadIdx.x;	
	if(i == 0)
	{
	C[i] = A[i];
	__syncthreads();
	//high latncy
	C[i] = C[i] + A[i];
	__syncthreads();
	
	F[i] = C[i+1];
	}
	
}

__global__ void mb2(float* A, float* C)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	if(i == 0) {
	C[i] = A[i]; //write to C[i] is a miss (cache line is missing)
	__syncthreads();
	C[i+1] = A[i]; //write to C[i+1] is a hit (cache line is found)
	__syncthreads();
	C[i] = C[i] + A[i]; //read of C[i] is a miss (entire sector is missing, fetch it from memory)
	__syncthreads();
	A[i] = C[i] + C[i+1]; //read C[i] and C[i+1] are hits (entire sector exists)
	}
}	


__global__ void l1(float* A, float* C)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	if(i == 0) {
		C[i] = A[i] + A[i+32];

                __syncthreads();

        C[i] = A[i] + A[i+32] + C[i];
	}
}	


// Host code
void VectorAddition(int N, int threadsPerBlock)
{
	cout<<"Vector Addition for input size "<<N<<" :\n";
	// Variables
	float* h_A;
	float* h_C;

	
	float* d_A;
	float* d_C;
	
	float total_time=0;
    size_t size = N * sizeof(float);

    // Allocate input vectors h_A and h_B in host memory
    h_A = (float*)malloc(size);
    h_C = (float*)malloc(size);

    
    // Initialize input vectors
    RandomInit(h_A, N);

	
    // Allocate vectors in device memory
    checkCudaErrors( cudaMalloc((void**)&d_A, size) );
    checkCudaErrors( cudaMalloc((void**)&d_C, size) );

	
    // Copy vectors from host memory to device memory
    checkCudaErrors( cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice) );
	
	checkCudaErrors(cudaThreadSynchronize());
    // Invoke kernel
	cout<<"Invoke Kernel\n";	
	//int threads = 128;
    int blocksPerGrid = ((N+ threadsPerBlock-1) / threadsPerBlock);
  
  
	for (int i = 0; i < 1; i++) {
    l1<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_C);
    getLastCudaError("kernel launch failure");
	checkCudaErrors(cudaThreadSynchronize());
	}

	float dSeconds = total_time/((float)TIMES * 1000);
	float dNumOps = N;
	float gflops = 1.0e-9 * dNumOps/dSeconds;
	cout<<"Time = "<<dSeconds*1.0e3<< "msec"<<endl<<"gflops = "<<gflops<<endl;

    // Copy result from device memory to host memory
    // h_C contains the result in host memory
    checkCudaErrors( cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost) );
    
    // Verify result
    int i;
    for (i = 0; i < N; ++i) {
        float sum = h_A[i];
        if (fabs(h_C[i] - sum) > 1e-5)
            break;
    }

        // Free device memory
    if (d_A)
        cudaFree(d_A);
    if (d_C)
        cudaFree(d_C);

    // Free host memory
    if (h_A)
        free(h_A);
    if (h_C)
        free(h_C);
        
    cudaDeviceReset();

	if(i == N)
		cout<<"SUCCSESS"<<endl;
	else 
		cout<<"FAILED"<<endl;   
}
//////////////////////////////////////////////////////
int main(int argc,char *argv[])
{ 
  if(argc < 3)
     printf("Unsuffcient number of arguments!\n");
else
	{
		VectorAddition(atoi(argv[1]), atoi(argv[2]));
	}
}

	.file	"tmpxft_00226b62_00000000-6_l2_write_policy.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3643:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3643:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10RandomInitPfi
	.type	_Z10RandomInitPfi, @function
_Z10RandomInitPfi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z10RandomInitPfi, .-_Z10RandomInitPfi
	.globl	_Z10RandomInitPji
	.type	_Z10RandomInitPji, @function
_Z10RandomInitPji:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%esi, %ebx
.L9:
	cmpl	%ebp, %ebx
	jle	.L12
	call	rand@PLT
	cltd
	idivl	%ebx
	movl	%edx, (%r12,%rbp,4)
	incq	%rbp
	jmp	.L9
.L12:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10RandomInitPji, .-_Z10RandomInitPji
	.section	.rodata._Z17__checkCudaErrors9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%s(%i) : CUDA Runtime API error %d: %s.\n"
	.section	.text._Z17__checkCudaErrors9cudaErrorPKci,"axG",@progbits,_Z17__checkCudaErrors9cudaErrorPKci,comdat
	.weak	_Z17__checkCudaErrors9cudaErrorPKci
	.type	_Z17__checkCudaErrors9cudaErrorPKci, @function
_Z17__checkCudaErrors9cudaErrorPKci:
.LFB3637:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L13
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%edx, 12(%rsp)
	movl	%edi, 8(%rsp)
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	movl	$2, %esi
	pushq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rdx
	pushq	%rax
	.cfi_def_cfa_offset 48
	movl	24(%rsp), %r9d
	xorl	%eax, %eax
	movl	28(%rsp), %r8d
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L13:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z17__checkCudaErrors9cudaErrorPKci, .-_Z17__checkCudaErrors9cudaErrorPKci
	.text
	.globl	_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_
	.type	_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_, @function
_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9irregulerPKfPfS1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_, .-_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_
	.globl	_Z9irregulerPKfPfS1_
	.type	_Z9irregulerPKfPfS1_, @function
_Z9irregulerPKfPfS1_:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9irregulerPKfPfS1_PKfPfS1_
	.cfi_endproc
.LFE3666:
	.size	_Z9irregulerPKfPfS1_, .-_Z9irregulerPKfPfS1_
	.globl	_Z24__device_stub__Z3mb2PfS_PfS_
	.type	_Z24__device_stub__Z3mb2PfS_PfS_, @function
_Z24__device_stub__Z3mb2PfS_PfS_:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z3mb2PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L23:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z24__device_stub__Z3mb2PfS_PfS_, .-_Z24__device_stub__Z3mb2PfS_PfS_
	.globl	_Z3mb2PfS_
	.type	_Z3mb2PfS_, @function
_Z3mb2PfS_:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z3mb2PfS_PfS_
	.cfi_endproc
.LFE3668:
	.size	_Z3mb2PfS_, .-_Z3mb2PfS_
	.globl	_Z23__device_stub__Z2l1PfS_PfS_
	.type	_Z23__device_stub__Z2l1PfS_PfS_, @function
_Z23__device_stub__Z2l1PfS_PfS_:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z2l1PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L28:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z23__device_stub__Z2l1PfS_PfS_, .-_Z23__device_stub__Z2l1PfS_PfS_
	.globl	_Z2l1PfS_
	.type	_Z2l1PfS_, @function
_Z2l1PfS_:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z23__device_stub__Z2l1PfS_PfS_
	.cfi_endproc
.LFE3670:
	.size	_Z2l1PfS_, .-_Z2l1PfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Vector Addition for input size "
.LC3:
	.string	" :\n"
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/shen203/GPU_Microbenchmark/master/write_policy/l2_write_policy.cu"
.LC5:
	.string	"Invoke Kernel\n"
.LC6:
	.string	"kernel launch failure"
.LC7:
	.string	"%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n"
.LC10:
	.string	"Time = "
.LC11:
	.string	"msec"
.LC12:
	.string	"gflops = "
.LC15:
	.string	"SUCCSESS"
.LC16:
	.string	"FAILED"
	.text
	.globl	_Z14VectorAdditionii
	.type	_Z14VectorAdditionii, @function
_Z14VectorAdditionii:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	_ZSt4cout(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	leaq	.LC2(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%edi, %rbp
	movq	%r15, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	0(,%rbp,4), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movl	%ebp, %esi
	movq	%r12, %rdi
	movq	%rax, %r14
	call	_Z10RandomInitPfi
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$123, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z17__checkCudaErrors9cudaErrorPKci
	movq	(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$124, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z17__checkCudaErrors9cudaErrorPKci
	movq	(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$128, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z17__checkCudaErrors9cudaErrorPKci
	call	cudaThreadSynchronize@PLT
	movl	$130, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z17__checkCudaErrors9cudaErrorPKci
	leaq	.LC5(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leal	-1(%rbp,%r13), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rcx
	cltd
	movl	%r13d, 44(%rsp)
	idivl	%r13d
	movq	%rcx, 36(%rsp)
	movl	40(%rsp), %esi
	movq	%rcx, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	movl	%eax, 32(%rsp)
	movq	32(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z23__device_stub__Z2l1PfS_PfS_
.L34:
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L35
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$139, %r8d
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %r9
	pushq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 136
	leaq	.LC4(%rip), %rcx
	leaq	.LC7(%rip), %rdx
	xorl	%eax, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 144
	movl	$2, %esi
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L35:
	.cfi_restore_state
	call	cudaThreadSynchronize@PLT
	movl	$140, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%ebp, %ebp
	movl	%eax, %edi
	call	_Z17__checkCudaErrors9cudaErrorPKci
	cvtsi2ssl	%ebx, %xmm1
	xorps	%xmm0, %xmm0
	movq	%r15, %rdi
	leaq	.LC10(%rip), %rsi
	cvtss2sd	%xmm1, %xmm1
	mulsd	.LC8(%rip), %xmm1
	divsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, 12(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorps	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm1
	movq	%rax, %rdi
	cvtss2sd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	$150, %edx
	leaq	.LC4(%rip), %rsi
	movl	%eax, %edi
	call	_Z17__checkCudaErrors9cudaErrorPKci
	movsd	.LC14(%rip), %xmm2
	movss	.LC13(%rip), %xmm1
.L36:
	cmpl	%ebp, %ebx
	jle	.L41
	movss	(%r14,%rbp,4), %xmm0
	subss	(%r12,%rbp,4), %xmm0
	leaq	1(%rbp), %rax
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm2, %xmm0
	jbe	.L58
.L41:
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L39
	call	cudaFree@PLT
	jmp	.L39
.L58:
	movq	%rax, %rbp
	jmp	.L36
.L39:
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L42
	call	cudaFree@PLT
.L42:
	testq	%r12, %r12
	je	.L43
	movq	%r12, %rdi
	call	free@PLT
.L43:
	testq	%r14, %r14
	je	.L44
	movq	%r14, %rdi
	call	free@PLT
.L44:
	call	cudaDeviceReset@PLT
	leaq	.LC15(%rip), %rsi
	cmpl	%ebp, %ebx
	je	.L60
	leaq	.LC16(%rip), %rsi
.L60:
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z14VectorAdditionii, .-_Z14VectorAdditionii
	.section	.rodata.str1.1
.LC17:
	.string	"Unsuffcient number of arguments!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rcx
	.cfi_def_cfa_offset 32
	cmpl	$2, %edi
	jg	.L62
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L63
.L62:
	movq	16(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movq	8(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%ebp, %esi
	movl	%eax, %edi
	call	_Z14VectorAdditionii
.L63:
	popq	%rdx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z2l1PfS_"
.LC19:
	.string	"_Z3mb2PfS_"
.LC20:
	.string	"_Z9irregulerPKfPfS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3672:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z2l1PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3mb2PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9irregulerPKfPfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3672:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC8:
	.long	-400107883
	.long	1041313291
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC13:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC14:
	.long	-1998362383
	.long	1055193269
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <cstdio>
using namespace std;
#include <hip/hip_runtime.h>
#define TIMES 24

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////HELP FUNCTIONS/////////////////////////////////////////////////
void RandomInit(float* data, int n)
{
    for (int i=0; i<n; i++)
	{
        data[i] = rand() / (float)RAND_MAX;
	}
}

void RandomInit(unsigned* data, int n)
{
    for (int i=0; i<n; i++)
	{
        data[i] = rand() % n;
	}
}
#define checkCudaErrors(err)  __checkCudaErrors (err, __FILE__, __LINE__)
inline void __checkCudaErrors(hipError_t err, const char *file, const int line )
{
    if(hipSuccess != err)
    {
        fprintf(stderr, "%s(%i) : CUDA Runtime API error %d: %s.\n",file, line, (int)err, hipGetErrorString( err ) );
        exit(-1);        
    }
}

// This will output the proper error string when calling cudaGetLastError
#define getLastCudaError(msg)      __getLastCudaError (msg, __FILE__, __LINE__)

inline void __getLastCudaError(const char *errorMessage, const char *file, const int line )
{
    hipError_t err = hipGetLastError();
    if (hipSuccess != err)
    {
        fprintf(stderr, "%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n",
        file, line, errorMessage, (int)err, hipGetErrorString( err ) );
        exit(-1);
    }
}

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////_VECTOR_ADDITION_///////////////////////////////////////////////////////
// Device code


__global__ void irreguler(const float* A, float* C, float* F)	
	
{	
int i = blockDim.x * blockIdx.x + threadIdx.x;	
	if(i == 0)
	{
	C[i] = A[i];
	__syncthreads();
	//high latncy
	C[i] = C[i] + A[i];
	__syncthreads();
	
	F[i] = C[i+1];
	}
	
}

__global__ void mb2(float* A, float* C)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	if(i == 0) {
	C[i] = A[i]; //write to C[i] is a miss (cache line is missing)
	__syncthreads();
	C[i+1] = A[i]; //write to C[i+1] is a hit (cache line is found)
	__syncthreads();
	C[i] = C[i] + A[i]; //read of C[i] is a miss (entire sector is missing, fetch it from memory)
	__syncthreads();
	A[i] = C[i] + C[i+1]; //read C[i] and C[i+1] are hits (entire sector exists)
	}
}	


__global__ void l1(float* A, float* C)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	if(i == 0) {
		C[i] = A[i] + A[i+32];

                __syncthreads();

        C[i] = A[i] + A[i+32] + C[i];
	}
}	


// Host code
void VectorAddition(int N, int threadsPerBlock)
{
	cout<<"Vector Addition for input size "<<N<<" :\n";
	// Variables
	float* h_A;
	float* h_C;

	
	float* d_A;
	float* d_C;
	
	float total_time=0;
    size_t size = N * sizeof(float);

    // Allocate input vectors h_A and h_B in host memory
    h_A = (float*)malloc(size);
    h_C = (float*)malloc(size);

    
    // Initialize input vectors
    RandomInit(h_A, N);

	
    // Allocate vectors in device memory
    checkCudaErrors( hipMalloc((void**)&d_A, size) );
    checkCudaErrors( hipMalloc((void**)&d_C, size) );

	
    // Copy vectors from host memory to device memory
    checkCudaErrors( hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice) );
	
	checkCudaErrors(hipDeviceSynchronize());
    // Invoke kernel
	cout<<"Invoke Kernel\n";	
	//int threads = 128;
    int blocksPerGrid = ((N+ threadsPerBlock-1) / threadsPerBlock);
  
  
	for (int i = 0; i < 1; i++) {
    l1<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_C);
    getLastCudaError("kernel launch failure");
	checkCudaErrors(hipDeviceSynchronize());
	}

	float dSeconds = total_time/((float)TIMES * 1000);
	float dNumOps = N;
	float gflops = 1.0e-9 * dNumOps/dSeconds;
	cout<<"Time = "<<dSeconds*1.0e3<< "msec"<<endl<<"gflops = "<<gflops<<endl;

    // Copy result from device memory to host memory
    // h_C contains the result in host memory
    checkCudaErrors( hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost) );
    
    // Verify result
    int i;
    for (i = 0; i < N; ++i) {
        float sum = h_A[i];
        if (fabs(h_C[i] - sum) > 1e-5)
            break;
    }

        // Free device memory
    if (d_A)
        hipFree(d_A);
    if (d_C)
        hipFree(d_C);

    // Free host memory
    if (h_A)
        free(h_A);
    if (h_C)
        free(h_C);
        
    hipDeviceReset();

	if(i == N)
		cout<<"SUCCSESS"<<endl;
	else 
		cout<<"FAILED"<<endl;   
}
//////////////////////////////////////////////////////
int main(int argc,char *argv[])
{ 
  if(argc < 3)
     printf("Unsuffcient number of arguments!\n");
else
	{
		VectorAddition(atoi(argv[1]), atoi(argv[2]));
	}
}

	.text
	.file	"l2_write_policy.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10RandomInitPfi
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z10RandomInitPfi
	.type	_Z10RandomInitPfi,@function
_Z10RandomInitPfi:                      # @_Z10RandomInitPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z10RandomInitPfi, .Lfunc_end0-_Z10RandomInitPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10RandomInitPji               # -- Begin function _Z10RandomInitPji
	.type	_Z10RandomInitPji,@function
_Z10RandomInitPji:                      # @_Z10RandomInitPji
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %ebx
	movq	%rdi, %r14
	movl	%esi, %r15d
	xorl	%r12d, %r12d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r14,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB1_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z10RandomInitPji, .Lfunc_end1-_Z10RandomInitPji
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__irregulerPKfPfS1_ # -- Begin function _Z24__device_stub__irregulerPKfPfS1_
	.type	_Z24__device_stub__irregulerPKfPfS1_,@function
_Z24__device_stub__irregulerPKfPfS1_:   # @_Z24__device_stub__irregulerPKfPfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9irregulerPKfPfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__irregulerPKfPfS1_, .Lfunc_end2-_Z24__device_stub__irregulerPKfPfS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__mb2PfS_      # -- Begin function _Z18__device_stub__mb2PfS_
	.type	_Z18__device_stub__mb2PfS_,@function
_Z18__device_stub__mb2PfS_:             # @_Z18__device_stub__mb2PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3mb2PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z18__device_stub__mb2PfS_, .Lfunc_end3-_Z18__device_stub__mb2PfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z17__device_stub__l1PfS_       # -- Begin function _Z17__device_stub__l1PfS_
	.type	_Z17__device_stub__l1PfS_,@function
_Z17__device_stub__l1PfS_:              # @_Z17__device_stub__l1PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z2l1PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z17__device_stub__l1PfS_, .Lfunc_end4-_Z17__device_stub__l1PfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14VectorAdditionii
.LCPI5_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_1:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
.LCPI5_3:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI5_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z14VectorAdditionii
	.type	_Z14VectorAdditionii,@function
_Z14VectorAdditionii:                   # @_Z14VectorAdditionii
	.cfi_startproc
# %bb.0:                                # %.critedge
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %r13d
	movl	%edi, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movslq	%ebx, %rbp
	leaq	(,%rbp,4), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%ebp, %ebx
	testl	%ebp, %ebp
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph.preheader.i
	xorl	%ebp, %ebp
.LBB5_2:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %rbx
	jne	.LBB5_2
.LBB5_3:                                # %_Z10RandomInitPfi.exit
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_30
# %bb.4:                                # %_Z17__checkCudaErrors10hipError_tPKci.exit
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_31
# %bb.5:                                # %_Z17__checkCudaErrors10hipError_tPKci.exit52
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_32
# %bb.6:                                # %_Z17__checkCudaErrors10hipError_tPKci.exit54
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_33
# %bb.7:                                # %_Z17__checkCudaErrors10hipError_tPKci.exit56
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	40(%rsp), %rax                  # 8-byte Reload
	addl	%r13d, %eax
	decl	%eax
	cltd
	idivl	%r13d
                                        # kill: def $eax killed $eax def $rax
	btsq	$32, %rax
	movl	%r13d, %edx
	btsq	$32, %rdx
	movq	%rax, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.8:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z17__device_stub__l1PfS_
.LBB5_9:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_34
# %bb.10:                               # %_Z18__getLastCudaErrorPKcS0_i.exit
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.11:                               # %_Z17__checkCudaErrors10hipError_tPKci.exit59
	movq	40(%rsp), %r12                  # 8-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r12d, %xmm0
	cvtss2sd	%xmm0, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	xorpd	%xmm1, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	xorps	%xmm0, %xmm0
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.6, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %r13
	movl	$.L.str.7, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	36(%rsp), %xmm0                 # 4-byte Folded Reload
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_36
# %bb.12:                               # %_Z17__checkCudaErrors10hipError_tPKci.exit61.preheader
	testl	%r12d, %r12d
	movq	%r12, %r13
	jle	.LBB5_17
# %bb.13:                               # %.lr.ph.preheader
	xorl	%r12d, %r12d
	movaps	.LCPI5_2(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI5_3(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB5_14:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r14,%r12,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%r15,%r12,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm1, %xmm2
	ja	.LBB5_18
# %bb.15:                               # %_Z17__checkCudaErrors10hipError_tPKci.exit61
                                        #   in Loop: Header=BB5_14 Depth=1
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB5_14
# %bb.16:                               # %._crit_edge.loopexit
	movl	%ebx, %r12d
	jmp	.LBB5_18
.LBB5_17:
	xorl	%r12d, %r12d
.LBB5_18:                               # %._crit_edge
	movq	24(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_20
# %bb.19:
	callq	hipFree
.LBB5_20:
	movq	16(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_22
# %bb.21:
	callq	hipFree
.LBB5_22:
	testq	%r15, %r15
	je	.LBB5_24
# %bb.23:
	movq	%r15, %rdi
	callq	free
.LBB5_24:
	testq	%r14, %r14
	je	.LBB5_26
# %bb.25:
	movq	%r14, %rdi
	callq	free
.LBB5_26:
	callq	hipDeviceReset
	movl	$_ZSt4cout, %edi
	cmpl	%r13d, %r12d
	jne	.LBB5_28
# %bb.27:
	movl	$.L.str.8, %esi
	movl	$8, %edx
	jmp	.LBB5_29
.LBB5_28:
	movl	$.L.str.9, %esi
	movl	$6, %edx
.LBB5_29:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_30:
	.cfi_def_cfa_offset 112
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movl	$.L.str.2, %edx
	movq	%rbx, %rdi
	movl	$123, %ecx
	jmp	.LBB5_37
.LBB5_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movl	$.L.str.2, %edx
	movq	%rbx, %rdi
	movl	$124, %ecx
	jmp	.LBB5_37
.LBB5_32:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movl	$.L.str.2, %edx
	movq	%rbx, %rdi
	movl	$128, %ecx
	jmp	.LBB5_37
.LBB5_33:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movl	$.L.str.2, %edx
	movq	%rbx, %rdi
	movl	$130, %ecx
	jmp	.LBB5_37
.LBB5_34:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	%rax, (%rsp)
	movl	$.L.str.12, %esi
	movl	$.L.str.2, %edx
	movl	$.L.str.4, %r8d
	movq	%rbx, %rdi
	movl	$139, %ecx
	movl	%ebp, %r9d
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB5_38
.LBB5_35:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movl	$.L.str.2, %edx
	movq	%rbx, %rdi
	movl	$140, %ecx
	jmp	.LBB5_37
.LBB5_36:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	movl	$.L.str.2, %edx
	movq	%rbx, %rdi
	movl	$150, %ecx
.LBB5_37:
	movl	%ebp, %r8d
	movq	%rax, %r9
	xorl	%eax, %eax
	callq	fprintf
.LBB5_38:
	movl	$-1, %edi
	callq	exit
.Lfunc_end5:
	.size	_Z14VectorAdditionii, .Lfunc_end5-_Z14VectorAdditionii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jg	.LBB6_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB6_3
.LBB6_2:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%ebp, %edi
	movl	%eax, %esi
	callq	_Z14VectorAdditionii
.LBB6_3:
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9irregulerPKfPfS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3mb2PfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z2l1PfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9irregulerPKfPfS1_,@object    # @_Z9irregulerPKfPfS1_
	.section	.rodata,"a",@progbits
	.globl	_Z9irregulerPKfPfS1_
	.p2align	3, 0x0
_Z9irregulerPKfPfS1_:
	.quad	_Z24__device_stub__irregulerPKfPfS1_
	.size	_Z9irregulerPKfPfS1_, 8

	.type	_Z3mb2PfS_,@object              # @_Z3mb2PfS_
	.globl	_Z3mb2PfS_
	.p2align	3, 0x0
_Z3mb2PfS_:
	.quad	_Z18__device_stub__mb2PfS_
	.size	_Z3mb2PfS_, 8

	.type	_Z2l1PfS_,@object               # @_Z2l1PfS_
	.globl	_Z2l1PfS_
	.p2align	3, 0x0
_Z2l1PfS_:
	.quad	_Z17__device_stub__l1PfS_
	.size	_Z2l1PfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Vector Addition for input size "
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" :\n"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/shen203/GPU_Microbenchmark/master/write_policy/l2_write_policy.hip"
	.size	.L.str.2, 129

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Invoke Kernel\n"
	.size	.L.str.3, 15

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"kernel launch failure"
	.size	.L.str.4, 22

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Time = "
	.size	.L.str.5, 8

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"msec"
	.size	.L.str.6, 5

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"gflops = "
	.size	.L.str.7, 10

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"SUCCSESS"
	.size	.L.str.8, 9

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"FAILED"
	.size	.L.str.9, 7

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%s(%i) : CUDA Runtime API error %d: %s.\n"
	.size	.L.str.11, 41

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\n"
	.size	.L.str.12, 56

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9irregulerPKfPfS1_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z3mb2PfS_"
	.size	.L__unnamed_2, 11

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z2l1PfS_"
	.size	.L__unnamed_3, 10

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Unsuffcient number of arguments!"
	.size	.Lstr, 33

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__irregulerPKfPfS1_
	.addrsig_sym _Z18__device_stub__mb2PfS_
	.addrsig_sym _Z17__device_stub__l1PfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9irregulerPKfPfS1_
	.addrsig_sym _Z3mb2PfS_
	.addrsig_sym _Z2l1PfS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9irregulerPKfPfS1_    ; -- Begin function _Z9irregulerPKfPfS1_
	.globl	_Z9irregulerPKfPfS1_
	.p2align	8
	.type	_Z9irregulerPKfPfS1_,@function
_Z9irregulerPKfPfS1_:                   ; @_Z9irregulerPKfPfS1_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_sub_nc_u32_e32 v0, 0, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
	global_store_b32 v0, v1, s[6:7]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_clause 0x1
	global_load_b32 v1, v0, s[6:7]
	global_load_b32 v2, v0, s[4:5]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[6:7]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_load_b32 s2, s[6:7], 0x4
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v1, s2
	global_store_b32 v0, v1, s[0:1]
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9irregulerPKfPfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9irregulerPKfPfS1_, .Lfunc_end0-_Z9irregulerPKfPfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 16
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3mb2PfS_              ; -- Begin function _Z3mb2PfS_
	.globl	_Z3mb2PfS_
	.p2align	8
	.type	_Z3mb2PfS_,@function
_Z3mb2PfS_:                             ; @_Z3mb2PfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_sub_nc_u32_e32 v0, 0, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s4, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v0, s4
	global_store_b32 v2, v0, s[2:3]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v0, v2, s[0:1]
	s_waitcnt vmcnt(0)
	global_store_b32 v2, v0, s[2:3] offset:4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_clause 0x1
	global_load_b32 v0, v2, s[2:3]
	global_load_b32 v1, v2, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v1
	global_store_b32 v2, v0, s[2:3]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b64 v[0:1], v2, s[2:3]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v1
	global_store_b32 v2, v0, s[0:1]
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3mb2PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z3mb2PfS_, .Lfunc_end1-_Z3mb2PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 228
; NumSgprs: 16
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z2l1PfS_               ; -- Begin function _Z2l1PfS_
	.globl	_Z2l1PfS_
	.p2align	8
	.type	_Z2l1PfS_,@function
_Z2l1PfS_:                              ; @_Z2l1PfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_sub_nc_u32_e32 v0, 0, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s15, v0
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x0
	s_load_b32 s5, s[0:1], 0x80
	s_waitcnt lgkmcnt(0)
	v_add_f32_e64 v1, s4, s5
	global_store_b32 v0, v1, s[2:3]
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_clause 0x2
	global_load_b32 v1, v0, s[0:1]
	global_load_b32 v2, v0, s[0:1] offset:128
	global_load_b32 v3, v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v1, v1, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v3
	global_store_b32 v0, v1, s[2:3]
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z2l1PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z2l1PfS_, .Lfunc_end2-_Z2l1PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 16
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9irregulerPKfPfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z9irregulerPKfPfS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3mb2PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z3mb2PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z2l1PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z2l1PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
