#include <iostream>
#include <fstream>
#include <cmath>
#include <sys/time.h>

#define BSZ (16)

void checkErrors(char *label) {
// we need to synchronise first to catch errors due to
// asynchroneous operations that would otherwise
// potentially go unnoticed
    cudaError_t err;
    err = cudaThreadSynchronize();
    if (err != cudaSuccess) {
        char *e = (char *) cudaGetErrorString(err);
        fprintf(stderr, "CUDA Error: %s (at %s)\n", e, label);
    }
    err = cudaGetLastError();
    if (err != cudaSuccess) {
        char *e = (char *) cudaGetErrorString(err);
        fprintf(stderr, "CUDA Error: %s (at %s)\n", e, label);
    }
}

double get_time() {
    struct timeval tim;
    cudaThreadSynchronize();
    gettimeofday(&tim, NULL);
    return (double) tim.tv_sec + (tim.tv_usec / 1000000.0);
}

// GPU kernel
__global__ void copy_array(float *u, float *u_prev, int N) {
    int i = threadIdx.x;
    int j = threadIdx.y;
    int I = blockIdx.y * BSZ * N + blockIdx.x * BSZ + j * N + i;
    if (I >= N * N) { return; }
    u_prev[I] = u[I];

}

__global__ void update(float *u, float *u_prev, int N, float h, float dt, float alpha) {
    // Setting up indices
    int i = threadIdx.x;
    int j = threadIdx.y;
    int I = blockIdx.y * BSZ * N + blockIdx.x * BSZ + j * N + i;

    if (I >= N * N) { return; }

    __shared__ float u_prev_sh[BSZ][BSZ];

    u_prev_sh[i][j] = u_prev[I];

    __syncthreads();

    bool bound_check = ((I > N) && (I < N * N - 1 - N) && (I % N != 0) && (I % N != N - 1));
    bool block_check = ((i > 0) && (i < BSZ - 1) && (j > 0) && (j < BSZ - 1));

    // if not on block boundary do
    if (block_check) {
        u[I] = u_prev_sh[i][j] + alpha * dt / h / h * (u_prev_sh[i + 1][j] + u_prev_sh[i - 1][j] + u_prev_sh[i][j + 1] +
                                                       u_prev_sh[i][j - 1] - 4 * u_prev_sh[i][j]);
    }
        // if not on boundary
    else if (bound_check)
        //if (bound_check)
    {
        u[I] = u_prev[I] +
               alpha * dt / (h * h) * (u_prev[I + 1] + u_prev[I - 1] + u_prev[I + N] + u_prev[I - N] - 4 * u_prev[I]);
    }

    // Boundary conditions are automatically imposed
    // as we don't touch boundaries
}

int main(int argc, char *argv[]) {
    // Allocate in CPU
    int N = atoi(argv[1]);

    cudaSetDevice(0);

    float xmin = 0.0f;
    float xmax = 3.5f;
    float ymin = 0.0f;
    //float ymax 	= 2.0f;
    float h = (xmax - xmin) / (N - 1);
    float dt = 0.00001f;
    float alpha = 0.645f;
    float time = 0.4f;

    int steps = (int) ceil(time / dt);
    int I;

    float *x = new float[N * N];
    float *y = new float[N * N];
    float *u = new float[N * N];
    float *u_prev = new float[N * N];


    // Generate mesh and intial condition
    for (int j = 0; j < N; j++) {
        for (int i = 0; i < N; i++) {
            I = N * j + i;
            x[I] = xmin + h * i;
            y[I] = ymin + h * j;
            u[I] = 0.0f;
            if ((i == 0) || (j == 0)) { u[I] = 200.0f; }
        }
    }

    // Allocate in GPU
    float *u_d, *u_prev_d;

    cudaMalloc((void **) &u_d, N * N * sizeof(float));
    cudaMalloc((void **) &u_prev_d, N * N * sizeof(float));

    // Copy to GPU
    cudaMemcpy(u_d, u, N * N * sizeof(float), cudaMemcpyHostToDevice);

    // Loop
    dim3 dimGrid(int((N - 0.5) / BSZ) + 1, int((N - 0.5) / BSZ) + 1);
    dim3 dimBlock(BSZ, BSZ);
    double start = get_time();
    for (int t = 0; t < steps; t++) {
        copy_array <<<dimGrid, dimBlock>>>(u_d, u_prev_d, N);
        update <<<dimGrid, dimBlock>>>(u_d, u_prev_d, N, h, dt, alpha);
    }
    double stop = get_time();

    checkErrors("update");
    double elapsed = stop - start;
    std::cout << elapsed << std::endl;

    // Copy result back to host
    cudaMemcpy(u, u_d, N * N * sizeof(float), cudaMemcpyDeviceToHost);

    std::ofstream temperature("temperature_shared.txt");
    for (int j = 0; j < N; j++) {
        for (int i = 0; i < N; i++) {
            I = N * j + i;
            //	std::cout<<u[I]<<"\t";
            temperature << x[I] << "\t" << y[I] << "\t" << u[I] << std::endl;
        }
        temperature << "\n";
        //std::cout<<std::endl;
    }

    temperature.close();

    // Free device
    cudaFree(u_d);
    cudaFree(u_prev_d);
}

	.file	"tmpxft_0022795f_00000000-6_FD_2D_shared.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3771:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3771:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA Error: %s (at %s)\n"
	.text
	.globl	_Z11checkErrorsPc
	.type	_Z11checkErrorsPc, @function
_Z11checkErrorsPc:
.LFB3766:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaThreadSynchronize@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %r8
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L3:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L2
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %r8
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	movq	%rax, %rcx
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	jmp	__fprintf_chk@PLT
.L2:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z11checkErrorsPc, .-_Z11checkErrorsPc
	.globl	_Z8get_timev
	.type	_Z8get_timev, @function
_Z8get_timev:
.LFB3767:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	cudaThreadSynchronize@PLT
	leaq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	divsd	.LC1(%rip), %xmm0
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z8get_timev, .-_Z8get_timev
	.globl	_Z33__device_stub__Z10copy_arrayPfS_iPfS_i
	.type	_Z33__device_stub__Z10copy_arrayPfS_iPfS_i, @function
_Z33__device_stub__Z10copy_arrayPfS_iPfS_i:
.LFB3793:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10copy_arrayPfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3793:
	.size	_Z33__device_stub__Z10copy_arrayPfS_iPfS_i, .-_Z33__device_stub__Z10copy_arrayPfS_iPfS_i
	.globl	_Z10copy_arrayPfS_i
	.type	_Z10copy_arrayPfS_i, @function
_Z10copy_arrayPfS_i:
.LFB3794:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z10copy_arrayPfS_iPfS_i
	.cfi_endproc
.LFE3794:
	.size	_Z10copy_arrayPfS_i, .-_Z10copy_arrayPfS_i
	.globl	_Z31__device_stub__Z6updatePfS_ifffPfS_ifff
	.type	_Z31__device_stub__Z6updatePfS_ifffPfS_ifff, @function
_Z31__device_stub__Z6updatePfS_ifffPfS_ifff:
.LFB3795:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 8(%rsp)
	movss	%xmm1, 4(%rsp)
	movss	%xmm2, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6updatePfS_ifff(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L18:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3795:
	.size	_Z31__device_stub__Z6updatePfS_ifffPfS_ifff, .-_Z31__device_stub__Z6updatePfS_ifffPfS_ifff
	.globl	_Z6updatePfS_ifff
	.type	_Z6updatePfS_ifff, @function
_Z6updatePfS_ifff:
.LFB3796:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6updatePfS_ifffPfS_ifff
	.cfi_endproc
.LFE3796:
	.size	_Z6updatePfS_ifff, .-_Z6updatePfS_ifff
	.section	.rodata.str1.1
.LC2:
	.string	"_Z6updatePfS_ifff"
.LC3:
	.string	"_Z10copy_arrayPfS_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3798:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6updatePfS_ifff(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10copy_arrayPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3798:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC11:
	.string	"update"
.LC12:
	.string	"temperature_shared.txt"
.LC13:
	.string	"\t"
.LC14:
	.string	"\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3768:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3768
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$600, %rsp
	.cfi_def_cfa_offset 656
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 584(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	xorl	%edi, %edi
	movl	%eax, %ebx
.LEHB0:
	call	cudaSetDevice@PLT
	leal	-1(%rbx), %eax
	movss	.LC6(%rip), %xmm1
	cvtsi2ssl	%eax, %xmm0
	movl	%ebx, %eax
	imull	%ebx, %eax
	divss	%xmm0, %xmm1
	cltq
	leaq	0(,%rax,4), %r15
	movq	%r15, %rdi
	movss	%xmm1, 8(%rsp)
	call	_Znam@PLT
	movq	%r15, %rdi
	movq	%rax, %r13
	call	_Znam@PLT
	movq	%r15, %rdi
	movq	%rax, %r14
	call	_Znam@PLT
	xorl	%esi, %esi
	xorps	%xmm2, %xmm2
	movq	%rax, %r12
	movslq	%ebx, %rax
	salq	$2, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
.L26:
	cmpl	%ebx, %eax
	jge	.L49
	cvtsi2ssl	%eax, %xmm0
	mulss	8(%rsp), %xmm0
	movq	%rsi, %rcx
	xorl	%edx, %edx
	addss	%xmm2, %xmm0
.L29:
	cvtsi2ssl	%edx, %xmm1
	mulss	8(%rsp), %xmm1
	movss	%xmm0, (%r14,%rcx)
	addss	%xmm2, %xmm1
	movss	%xmm1, 0(%r13,%rcx)
	testl	%edx, %edx
	je	.L42
	xorps	%xmm1, %xmm1
	testl	%eax, %eax
	jne	.L27
.L42:
	movss	.LC5(%rip), %xmm1
.L27:
	incl	%edx
	movss	%xmm1, (%r12,%rcx)
	addq	$4, %rcx
	cmpl	%edx, %ebx
	jne	.L29
	movq	24(%rsp), %rdx
	incl	%eax
	addq	%rdx, %rsi
	jmp	.L26
.L49:
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	movl	$40000, %ebp
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2sdl	%ebx, %xmm0
	subsd	.LC7(%rip), %xmm0
	mulsd	.LC8(%rip), %xmm0
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	cvttsd2sil	%xmm0, %eax
	incl	%eax
	movl	%eax, 48(%rsp)
	movl	%eax, 52(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 60(%rsp)
	call	_Z8get_timev
	movsd	%xmm0, 16(%rsp)
.L33:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z33__device_stub__Z10copy_arrayPfS_iPfS_i
.L31:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movss	.LC9(%rip), %xmm2
	movss	.LC10(%rip), %xmm1
	movl	%ebx, %edx
	movss	8(%rsp), %xmm0
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z31__device_stub__Z6updatePfS_ifffPfS_ifff
.L32:
	decl	%ebp
	jne	.L33
	call	_Z8get_timev
	leaq	.LC11(%rip), %rdi
	xorl	%ebp, %ebp
	movsd	%xmm0, 8(%rsp)
	call	_Z11checkErrorsPc
	movsd	8(%rsp), %xmm0
	subsd	16(%rsp), %xmm0
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	32(%rsp), %rsi
	movq	%r15, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	72(%rsp), %rax
	movl	$16, %edx
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	xorl	%eax, %eax
	movl	%eax, 16(%rsp)
.L34:
	cmpl	%ebx, 16(%rsp)
	jge	.L50
	movq	24(%rsp), %rax
	leaq	0(%rbp,%rax), %r15
.L35:
	movq	8(%rsp), %rdi
	cvtss2sd	0(%r13,%rbp), %xmm0
.LEHB1:
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC13(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	cvtss2sd	(%r14,%rbp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC13(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	cvtss2sd	(%r12,%rbp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	addq	$4, %rbp
	cmpq	%r15, %rbp
	jne	.L35
	movq	8(%rsp), %rdi
	leaq	.LC14(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	incl	16(%rsp)
	movq	%r15, %rbp
	jmp	.L34
.L50:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.LEHE1:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	jmp	.L47
.L41:
	endbr64
	movq	%rax, %rbx
.L37:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L47
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L47:
	call	__stack_chk_fail@PLT
.L39:
	addq	$600, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3768:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3768-.LLSDACSB3768
.LLSDACSB3768:
	.uleb128 .LEHB0-.LFB3768
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3768
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L41-.LFB3768
	.uleb128 0
	.uleb128 .LEHB2-.LFB3768
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3768:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1093567616
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1128792064
	.align 4
.LC6:
	.long	1080033280
	.section	.rodata.cst8
	.align 8
.LC7:
	.long	0
	.long	1071644672
	.align 8
.LC8:
	.long	0
	.long	1068498944
	.section	.rodata.cst4
	.align 4
.LC9:
	.long	1059397304
	.align 4
.LC10:
	.long	925353388
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <cmath>
#include <sys/time.h>

#define BSZ (16)

void checkErrors(char *label) {
// we need to synchronise first to catch errors due to
// asynchroneous operations that would otherwise
// potentially go unnoticed
    hipError_t err;
    err = hipDeviceSynchronize();
    if (err != hipSuccess) {
        char *e = (char *) hipGetErrorString(err);
        fprintf(stderr, "CUDA Error: %s (at %s)\n", e, label);
    }
    err = hipGetLastError();
    if (err != hipSuccess) {
        char *e = (char *) hipGetErrorString(err);
        fprintf(stderr, "CUDA Error: %s (at %s)\n", e, label);
    }
}

double get_time() {
    struct timeval tim;
    hipDeviceSynchronize();
    gettimeofday(&tim, NULL);
    return (double) tim.tv_sec + (tim.tv_usec / 1000000.0);
}

// GPU kernel
__global__ void copy_array(float *u, float *u_prev, int N) {
    int i = threadIdx.x;
    int j = threadIdx.y;
    int I = blockIdx.y * BSZ * N + blockIdx.x * BSZ + j * N + i;
    if (I >= N * N) { return; }
    u_prev[I] = u[I];

}

__global__ void update(float *u, float *u_prev, int N, float h, float dt, float alpha) {
    // Setting up indices
    int i = threadIdx.x;
    int j = threadIdx.y;
    int I = blockIdx.y * BSZ * N + blockIdx.x * BSZ + j * N + i;

    if (I >= N * N) { return; }

    __shared__ float u_prev_sh[BSZ][BSZ];

    u_prev_sh[i][j] = u_prev[I];

    __syncthreads();

    bool bound_check = ((I > N) && (I < N * N - 1 - N) && (I % N != 0) && (I % N != N - 1));
    bool block_check = ((i > 0) && (i < BSZ - 1) && (j > 0) && (j < BSZ - 1));

    // if not on block boundary do
    if (block_check) {
        u[I] = u_prev_sh[i][j] + alpha * dt / h / h * (u_prev_sh[i + 1][j] + u_prev_sh[i - 1][j] + u_prev_sh[i][j + 1] +
                                                       u_prev_sh[i][j - 1] - 4 * u_prev_sh[i][j]);
    }
        // if not on boundary
    else if (bound_check)
        //if (bound_check)
    {
        u[I] = u_prev[I] +
               alpha * dt / (h * h) * (u_prev[I + 1] + u_prev[I - 1] + u_prev[I + N] + u_prev[I - N] - 4 * u_prev[I]);
    }

    // Boundary conditions are automatically imposed
    // as we don't touch boundaries
}

int main(int argc, char *argv[]) {
    // Allocate in CPU
    int N = atoi(argv[1]);

    hipSetDevice(0);

    float xmin = 0.0f;
    float xmax = 3.5f;
    float ymin = 0.0f;
    //float ymax 	= 2.0f;
    float h = (xmax - xmin) / (N - 1);
    float dt = 0.00001f;
    float alpha = 0.645f;
    float time = 0.4f;

    int steps = (int) ceil(time / dt);
    int I;

    float *x = new float[N * N];
    float *y = new float[N * N];
    float *u = new float[N * N];
    float *u_prev = new float[N * N];


    // Generate mesh and intial condition
    for (int j = 0; j < N; j++) {
        for (int i = 0; i < N; i++) {
            I = N * j + i;
            x[I] = xmin + h * i;
            y[I] = ymin + h * j;
            u[I] = 0.0f;
            if ((i == 0) || (j == 0)) { u[I] = 200.0f; }
        }
    }

    // Allocate in GPU
    float *u_d, *u_prev_d;

    hipMalloc((void **) &u_d, N * N * sizeof(float));
    hipMalloc((void **) &u_prev_d, N * N * sizeof(float));

    // Copy to GPU
    hipMemcpy(u_d, u, N * N * sizeof(float), hipMemcpyHostToDevice);

    // Loop
    dim3 dimGrid(int((N - 0.5) / BSZ) + 1, int((N - 0.5) / BSZ) + 1);
    dim3 dimBlock(BSZ, BSZ);
    double start = get_time();
    for (int t = 0; t < steps; t++) {
        copy_array <<<dimGrid, dimBlock>>>(u_d, u_prev_d, N);
        update <<<dimGrid, dimBlock>>>(u_d, u_prev_d, N, h, dt, alpha);
    }
    double stop = get_time();

    checkErrors("update");
    double elapsed = stop - start;
    std::cout << elapsed << std::endl;

    // Copy result back to host
    hipMemcpy(u, u_d, N * N * sizeof(float), hipMemcpyDeviceToHost);

    std::ofstream temperature("temperature_shared.txt");
    for (int j = 0; j < N; j++) {
        for (int i = 0; i < N; i++) {
            I = N * j + i;
            //	std::cout<<u[I]<<"\t";
            temperature << x[I] << "\t" << y[I] << "\t" << u[I] << std::endl;
        }
        temperature << "\n";
        //std::cout<<std::endl;
    }

    temperature.close();

    // Free device
    hipFree(u_d);
    hipFree(u_prev_d);
}

	.text
	.file	"FD_2D_shared.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z11checkErrorsPc               # -- Begin function _Z11checkErrorsPc
	.type	_Z11checkErrorsPc,@function
_Z11checkErrorsPc:                      # @_Z11checkErrorsPc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB0_1
.LBB0_2:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB0_1:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movq	%rax, %rdx
	movq	%rbx, %rcx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB0_2
.LBB0_4:
	movl	%eax, %edi
	callq	hipGetErrorString
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movq	%rax, %rdx
	movq	%rbx, %rcx
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fprintf                         # TAILCALL
.Lfunc_end0:
	.size	_Z11checkErrorsPc, .Lfunc_end0-_Z11checkErrorsPc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8get_timev
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z8get_timev
	.type	_Z8get_timev,@function
_Z8get_timev:                           # @_Z8get_timev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	callq	hipDeviceSynchronize
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8get_timev, .Lfunc_end1-_Z8get_timev
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__copy_arrayPfS_i # -- Begin function _Z25__device_stub__copy_arrayPfS_i
	.type	_Z25__device_stub__copy_arrayPfS_i,@function
_Z25__device_stub__copy_arrayPfS_i:     # @_Z25__device_stub__copy_arrayPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10copy_arrayPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__copy_arrayPfS_i, .Lfunc_end2-_Z25__device_stub__copy_arrayPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__updatePfS_ifff # -- Begin function _Z21__device_stub__updatePfS_ifff
	.type	_Z21__device_stub__updatePfS_ifff,@function
_Z21__device_stub__updatePfS_ifff:      # @_Z21__device_stub__updatePfS_ifff
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	4(%rsp), %rdi
	movss	%xmm1, (%rdi)
	movq	%rsp, %r8
	movss	%xmm2, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6updatePfS_ifff, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__updatePfS_ifff, .Lfunc_end3-_Z21__device_stub__updatePfS_ifff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x40600000                      # float 3.5
.LCPI4_1:
	.long	0x43480000                      # float 200
.LCPI4_4:
	.long	0x3727c5ac                      # float 9.99999974E-6
.LCPI4_5:
	.long	0x3f251eb8                      # float 0.64499998
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_2:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI4_3:
	.quad	0x3fb0000000000000              # double 0.0625
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 640
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	hipSetDevice
	leal	-1(%r15), %eax
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, (%rsp)                   # 4-byte Spill
	movl	%r15d, %r14d
	imull	%r14d, %r14d
	shlq	$2, %r14
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %r12
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	movq	%r14, %rdi
	callq	_Znam
	movss	(%rsp), %xmm6                   # 4-byte Reload
                                        # xmm6 = mem[0],zero,zero,zero
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%r15d, %r14d
	testl	%r15d, %r15d
	jle	.LBB4_9
# %bb.1:                                # %.preheader117.lr.ph
	xorps	%xmm0, %xmm0
	movss	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorl	%eax, %eax
.LBB4_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	movl	%ebx, %esi
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rsi,4), %rcx
	movq	40(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rsi,4), %rdx
	xorps	%xmm2, %xmm2
	cvtsi2ss	%eax, %xmm2
	leaq	(%r12,%rsi,4), %rsi
	mulss	%xmm6, %xmm2
	addss	%xmm0, %xmm2
	xorl	%edi, %edi
.LBB4_3:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm4, %xmm4
	movaps	%xmm1, %xmm3
	testq	%rdi, %rdi
	je	.LBB4_5
# %bb.4:                                #   in Loop: Header=BB4_3 Depth=2
	xorps	%xmm3, %xmm3
.LBB4_5:                                #   in Loop: Header=BB4_3 Depth=2
	xorps	%xmm5, %xmm5
	cvtsi2ss	%edi, %xmm5
	mulss	%xmm6, %xmm5
	addss	%xmm4, %xmm5
	movss	%xmm5, (%rsi,%rdi,4)
	movss	%xmm2, (%rdx,%rdi,4)
	movaps	%xmm1, %xmm4
	testq	%rax, %rax
	je	.LBB4_7
# %bb.6:                                #   in Loop: Header=BB4_3 Depth=2
	movaps	%xmm3, %xmm4
.LBB4_7:                                #   in Loop: Header=BB4_3 Depth=2
	movss	%xmm4, (%rcx,%rdi,4)
	incq	%rdi
	cmpq	%rdi, %r14
	jne	.LBB4_3
# %bb.8:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%rax
	addl	%r15d, %ebx
	cmpq	%r14, %rax
	jne	.LBB4_2
.LBB4_9:                                # %._crit_edge120
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	8(%rsp), %rbx                   # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15d, %xmm0
	addsd	.LCPI4_2(%rip), %xmm0
	mulsd	.LCPI4_3(%rip), %xmm0
	cvttsd2si	%xmm0, %eax
	incl	%eax
	movq	%rax, %r13
	shlq	$32, %r13
	orq	%rax, %r13
	movl	$40000, %ebx                    # imm = 0x9C40
	callq	_Z8get_timev
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
.LBB4_10:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.11:                               #   in Loop: Header=BB4_10 Depth=1
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	%r15d, %edx
	callq	_Z25__device_stub__copy_arrayPfS_i
.LBB4_12:                               #   in Loop: Header=BB4_10 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.13:                               #   in Loop: Header=BB4_10 Depth=1
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	%r15d, %edx
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI4_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI4_5(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	callq	_Z21__device_stub__updatePfS_ifff
.LBB4_14:                               #   in Loop: Header=BB4_10 Depth=1
	decl	%ebx
	jne	.LBB4_10
# %bb.15:
	callq	_Z8get_timev
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movl	$.L.str.1, %edi
	callq	_Z11checkErrorsPc
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	subsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rdi
	movl	$.L.str.2, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	testl	%r15d, %r15d
	jle	.LBB4_29
# %bb.16:                               # %.preheader.lr.ph
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	movq	%r15, 64(%rsp)                  # 8-byte Spill
	movq	%r12, 56(%rsp)                  # 8-byte Spill
.LBB4_17:                               # %.lr.ph123
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_18 Depth 2
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	%eax, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	movq	40(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	leaq	(%r12,%rax,4), %r12
	xorl	%r13d, %r13d
.LBB4_18:                               #   Parent Loop BB4_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%r13,4), %xmm0
.Ltmp0:
	leaq	72(%rsp), %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp1:
# %bb.19:                               # %_ZNSolsEf.exit
                                        #   in Loop: Header=BB4_18 Depth=2
.Ltmp2:
	movq	%rax, %rbp
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit105
                                        #   in Loop: Header=BB4_18 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r13,4), %xmm0
.Ltmp4:
	movq	%rbp, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp5:
# %bb.21:                               # %_ZNSolsEf.exit106
                                        #   in Loop: Header=BB4_18 Depth=2
.Ltmp6:
	movq	%rax, %rbp
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp7:
# %bb.22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit107
                                        #   in Loop: Header=BB4_18 Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r13,4), %xmm0
.Ltmp8:
	movq	%rbp, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp9:
# %bb.23:                               # %_ZNSolsEf.exit108
                                        #   in Loop: Header=BB4_18 Depth=2
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
.Ltmp10:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp11:
# %bb.24:                               # %.noexc
                                        #   in Loop: Header=BB4_18 Depth=2
.Ltmp12:
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
.Ltmp13:
# %bb.25:                               # %.noexc109
                                        #   in Loop: Header=BB4_18 Depth=2
.Ltmp14:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp15:
# %bb.26:                               # %_ZNSolsEPFRSoS_E.exit
                                        #   in Loop: Header=BB4_18 Depth=2
	incq	%r13
	cmpq	%r13, %r14
	jne	.LBB4_18
# %bb.27:                               # %._crit_edge124
                                        #   in Loop: Header=BB4_17 Depth=1
.Ltmp17:
	movl	$.L.str.4, %esi
	movl	$1, %edx
	leaq	72(%rsp), %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp18:
	movq	(%rsp), %rcx                    # 8-byte Reload
# %bb.28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
                                        #   in Loop: Header=BB4_17 Depth=1
	incq	%rcx
	movq	64(%rsp), %r15                  # 8-byte Reload
	movq	8(%rsp), %rax                   # 8-byte Reload
	addl	%r15d, %eax
	cmpq	%r14, %rcx
	movq	56(%rsp), %r12                  # 8-byte Reload
	jne	.LBB4_17
.LBB4_29:                               # %._crit_edge126
.Ltmp20:
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp21:
# %bb.30:
	movq	24(%rsp), %rdi
.Ltmp22:
	callq	hipFree
.Ltmp23:
# %bb.31:
	movq	32(%rsp), %rdi
.Ltmp24:
	callq	hipFree
.Ltmp25:
# %bb.32:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	80(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 72(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	320(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$584, %rsp                      # imm = 0x248
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_33:
	.cfi_def_cfa_offset 640
.Ltmp26:
	jmp	.LBB4_34
.LBB4_36:
.Ltmp19:
	jmp	.LBB4_34
.LBB4_35:
.Ltmp16:
.LBB4_34:
	movq	%rax, %rbx
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp15-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp25-.Ltmp20                #   Call between .Ltmp20 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin0          #     jumps to .Ltmp26
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Lfunc_end4-.Ltmp25            #   Call between .Ltmp25 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10copy_arrayPfS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6updatePfS_ifff, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA Error: %s (at %s)\n"
	.size	.L.str, 24

	.type	_Z10copy_arrayPfS_i,@object     # @_Z10copy_arrayPfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z10copy_arrayPfS_i
	.p2align	3, 0x0
_Z10copy_arrayPfS_i:
	.quad	_Z25__device_stub__copy_arrayPfS_i
	.size	_Z10copy_arrayPfS_i, 8

	.type	_Z6updatePfS_ifff,@object       # @_Z6updatePfS_ifff
	.globl	_Z6updatePfS_ifff
	.p2align	3, 0x0
_Z6updatePfS_ifff:
	.quad	_Z21__device_stub__updatePfS_ifff
	.size	_Z6updatePfS_ifff, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"update"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"temperature_shared.txt"
	.size	.L.str.2, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\t"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n"
	.size	.L.str.4, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10copy_arrayPfS_i"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6updatePfS_ifff"
	.size	.L__unnamed_2, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__copy_arrayPfS_i
	.addrsig_sym _Z21__device_stub__updatePfS_ifff
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z10copy_arrayPfS_i
	.addrsig_sym _Z6updatePfS_ifff
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10copy_arrayPfS_i     ; -- Begin function _Z10copy_arrayPfS_i
	.globl	_Z10copy_arrayPfS_i
	.p2align	8
	.type	_Z10copy_arrayPfS_i,@function
_Z10copy_arrayPfS_i:                    ; @_Z10copy_arrayPfS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_lshl_b32 s3, s14, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 4, v1
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, v1, s2
	s_mul_i32 s2, s2, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s3, v0, v1
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10copy_arrayPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10copy_arrayPfS_i, .Lfunc_end0-_Z10copy_arrayPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z6updatePfS_ifff       ; -- Begin function _Z6updatePfS_ifff
	.globl	_Z6updatePfS_ifff
	.p2align	8
	.type	_Z6updatePfS_ifff,@function
_Z6updatePfS_ifff:                      ; @_Z6updatePfS_ifff
; %bb.0:
	s_load_b128 s[8:11], s[0:1], 0x10
	v_bfe_u32 v7, v0, 10, 10
	v_and_b32_e32 v8, 0x3ff, v0
	s_lshl_b32 s2, s14, 4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 4, v7
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v1, v1, s8
	s_mul_i32 s3, s8, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s2, v8, v1
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB1_13
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b32_e32 v2, 2, v7
	s_mov_b32 s1, 0
	s_mov_b32 s12, 0
	s_mov_b32 s2, exec_lo
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_lshl_add_u32 v2, v8, 6, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v9, v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_i32_e64 s8, v0
	s_cbranch_execz .LBB1_5
; %bb.2:
	s_not_b32 s0, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s3, s0
	s_mov_b32 s0, 0
	v_cmp_gt_i32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:
	s_ashr_i32 s0, s8, 31
	v_add_nc_u32_e32 v11, v0, v1
	s_add_i32 s12, s8, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s0, s12, s0
	v_xor_b32_e32 v11, v11, v1
	v_cvt_f32_u32_e32 v9, s0
	s_sub_i32 s12, 0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x4f7ffffe, v9
	v_cvt_u32_f32_e32 v9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, s12, v9
	v_mul_hi_u32 v10, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v9, v10
	v_mul_hi_u32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v9, s0
	v_sub_nc_u32_e32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v10, s0, v9
	v_cmp_le_u32_e32 vcc_lo, s0, v9
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v10, s0, v9
	v_cmp_le_u32_e32 vcc_lo, s0, v9
	s_add_i32 s0, s8, -1
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v9, v9, v1
	v_sub_nc_u32_e32 v1, v9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v1
	v_cmp_ne_u32_e64 s0, s0, v1
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB1_4:                                ; %Flow103
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s12, s0, exec_lo
.LBB1_5:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v1, -1, v8
	v_add_nc_u32_e32 v7, -1, v7
                                        ; implicit-def: $vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v1, v1, v7
                                        ; implicit-def: $vgpr7
	v_cmp_lt_u32_e32 vcc_lo, 13, v1
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_9
; %bb.6:
                                        ; implicit-def: $vgpr7
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr1
	s_and_saveexec_b32 s2, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB1_8
; %bb.7:
	v_subrev_nc_u32_e32 v7, s8, v0
	s_ashr_i32 s13, s8, 31
	s_mov_b32 s12, s8
	global_load_b96 v[0:2], v[5:6], off offset:-4
	s_lshl_b64 s[12:13], s[12:13], 2
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_co_u32 v5, vcc_lo, v5, s12
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_mov_b32 s1, exec_lo
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	v_mul_f32_e64 v7, s10, s11
	v_mul_f32_e64 v8, s9, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v9, null, v8, v8, v7
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v10
	v_div_scale_f32 v11, vcc_lo, v7, v8, v7
	v_mul_f32_e32 v12, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v9, v12, v11
	v_fmac_f32_e32 v12, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v9, -v9, v12, v11
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v0, v2, v0
	v_div_fmas_f32 v2, v9, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v7, v2, v8, v7
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v0, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v8, v0, v6
.LBB1_8:                                ; %Flow100
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
                                        ; implicit-def: $vgpr2
.LBB1_9:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_mul_f32_e64 v0, s10, s11
	s_or_b32 s1, s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v1, null, s9, s9, v0
	v_div_scale_f32 v7, vcc_lo, v0, s9, v0
	v_rcp_f32_e32 v5, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v1, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v5
	v_mul_f32_e32 v6, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v1, v6, v7
	v_fmac_f32_e32 v6, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v1, -v1, v6, v7
	v_div_fmas_f32 v1, v1, v5, v6
	ds_load_2addr_b32 v[5:6], v2 offset0:1 offset1:16
	v_div_fixup_f32 v7, v1, s9, v0
	v_subrev_nc_u32_e32 v1, 64, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_div_scale_f32 v8, null, s9, s9, v7
	ds_load_b32 v11, v1
	v_div_scale_f32 v10, vcc_lo, v7, s9, v7
	v_rcp_f32_e32 v9, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v0, -v8, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v9, v0, v9 :: v_dual_add_nc_u32 v0, -4, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v6, v11
	v_mul_f32_e32 v12, v10, v9
	ds_load_2addr_b32 v[0:1], v0 offset1:1
	v_add_f32_e32 v5, v6, v5
	v_fma_f32 v2, -v8, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v2, v9
	v_fma_f32 v2, -v8, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v9, v12
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v8, v5, v0
	v_div_fixup_f32 v7, v2, s9, v7
.LBB1_11:                               ; %Flow101
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB1_13
; %bb.12:                               ; %.sink.split
	v_fmac_f32_e32 v8, -4.0, v1
	v_add_co_u32 v2, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v1, v7, v8
	global_store_b32 v[2:3], v1, off
.LBB1_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6updatePfS_ifff
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6updatePfS_ifff, .Lfunc_end1-_Z6updatePfS_ifff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1036
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10copy_arrayPfS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10copy_arrayPfS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6updatePfS_ifff
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6updatePfS_ifff.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
