/**
 * Sum two square matrix (A = B + C)
 * Exercise 3.1 of programming massively parallel processors book
 * Solution provided with matrix view as array
 * @author Niccolò Bellaccini
 */

#include <cuda.h>
#include <stdio.h>
#include <stdlib.h> //rand
#include <time.h> //rand
#include <math.h> //ceil

#include <iostream> //std::cerr

#define BLOCK_WIDTH 64

void initData(float* M, int nRows){ //Remeber: matrix square

	for (int i=0; i<nRows; i++){
		for(int j=0; j<nRows; j++){
			M[nRows * i + j] = (float) (rand() & 0xFF) / 10.0f;
		}
	}
}

void displayData(float *M, int nRows){

	for (int i=0; i<nRows; i++){
		printf("\n");
		for(int j=0; j<nRows; j++){
			printf("%.1f\t", M[nRows * i + j]);
		}
	}
}

/**
 * function-like macro
 * __LINE__ = contains the line number of the currently compiled line of code
 * __FILE__ = string that contains the name of the source file being compiled
 * # operator = turns the argument it precedes into a quoted string
 * Reference: [C the complete reference]
 * check with > nvcc -E
 */
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__, __LINE__, #value, value)

static void CheckCudaErrorAux (const char *file, unsigned line,
		const char *statement, cudaError_t err){
	if(err == cudaSuccess)
		return;
	std::cerr << statement << " returned " << cudaGetErrorString(err) <<
			"(" << err << ") at " << file << ":" << line << std::endl;
	exit(1);
}


//Kernel function (point b of exercise)
__global__ void matrixAddKernel(float *A, float *B, float *C, int nRows){
	int size = nRows * nRows; //Remember: square matrices
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	if (i<size)
		A[i] = B[i] + C[i];
}

//Kernel function (point c of exercise)
__global__ void matrixPerRowsAddKernel(float *A, float *B, float *C, int nRows){
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	if (i<nRows){
		for (int j=0; j<nRows; j++){
			A[i * nRows + j] = B[i * nRows + j] + C[i * nRows + j];
		}
	}
}

//Kernel function (point d of exercise)
__global__ void matrixPerColumnsAddKernel(float *A, float *B, float *C, int nColumns){
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	if (i<nColumns){
		for (int j=0; j<nColumns; j++){
			A[i + j * nColumns] = B[i + j * nColumns] + C[i + j * nColumns];
		}
	}
}

/**
 * Stub function used to compute matrices sum.
 * (function used to launch the kernel and to allocate device mem, ...)
 */
void matrixAdd(float* A, float *B, float *C, int nRows){

	size_t size = nRows * nRows * sizeof(float);
	float * d_A;
	float * d_B;
	float * d_C;

	//Allocate device memory for matrices
	CUDA_CHECK_RETURN(cudaMalloc((void **) &d_B, size));
	CUDA_CHECK_RETURN(cudaMalloc((void **) &d_C, size));
	CUDA_CHECK_RETURN(cudaMalloc((void **) &d_A, size));

	//Copy B and C to device memory
	CUDA_CHECK_RETURN(cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice));
	CUDA_CHECK_RETURN(cudaMemcpy(d_C, C, size, cudaMemcpyHostToDevice));

	//Kernel launch code
	//assume block of 64 threads
	matrixAddKernel <<< ceil((double)(nRows*nRows)/BLOCK_WIDTH), BLOCK_WIDTH>>>(d_A, d_B, d_C, nRows);

	//Two other possible kernel functions

	//matrixPerRowsAddKernel<<< ceil((double)nRows/BLOCK_WIDTH) ,BLOCK_WIDTH>>>(d_A, d_B, d_C, nRows);
	//matrixPerColumnsAddKernel<<< ceil((double)nRows/BLOCK_WIDTH) ,BLOCK_WIDTH>>>(d_A, d_B, d_C, nRows);

	//Copy A from the device memory
	CUDA_CHECK_RETURN(cudaMemcpy(A, d_A, size, cudaMemcpyDeviceToHost));

	//Free device matrices
	cudaFree(d_C);
	cudaFree(d_B);
	cudaFree(d_A);
}

int main(int argc, char** argv){

	//Initialize random seed
	//@see http://www.cplusplus.com/reference/cstdlib/srand/
	//@see https://stackoverflow.com/questions/20158841/my-random-number-generator-function-generates-the-same-number
    srand(time(NULL));

	int numRows;
	printf("\nInsert the number of rows (equivalently columns): ");
	scanf("%d", &numRows);

	int numColumns = numRows; //Square matrix
	int nElem = numRows * numColumns;
	float * B = (float *) malloc(nElem * sizeof(float));
	float * C = (float *) malloc(nElem * sizeof(float));

	float * A = (float *) malloc(nElem * sizeof(float));

	//Initialize B and C matrices
	initData(B, numRows);
	initData(C, numRows);

	//Display B and C matrices
	printf("\n\tMatrice B\n");
	displayData(B, numRows);
	printf("\n\n\tMatrice C\n");
	displayData(C, numRows);

	//matrices sum
	matrixAdd(A, B, C, numRows);

	//Display A matrix
	printf("\n\n\tMatrice A\n");
	displayData(A, numRows);
}

	.file	"tmpxft_0033fc06_00000000-6_MatrixSumTest.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" returned "
.LC1:
	.string	"("
.LC2:
	.string	") at "
.LC3:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/kinik93/Matrix-sum-CUDA/master/MatrixSumTest.cu"
.LC4:
	.string	":"
	.text
	.type	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0, @function
_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0:
.LFB4302:
	.cfi_startproc
	testl	%edx, %edx
	je	.L4
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%edi, %ebx
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %r12
	call	cudaGetErrorString@PLT
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L4:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	ret
	.cfi_endproc
.LFE4302:
	.size	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0, .-_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	.globl	_Z8initDataPfi
	.type	_Z8initDataPfi, @function
_Z8initDataPfi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movslq	%esi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
.L10:
	cmpl	%ebp, %r12d
	jge	.L15
	leaq	(%rbx,%r13), %r14
.L11:
	call	rand@PLT
	addq	$4, %rbx
	movzbl	%al, %eax
	cvtsi2ssl	%eax, %xmm0
	divss	.LC5(%rip), %xmm0
	movss	%xmm0, -4(%rbx)
	cmpq	%r14, %rbx
	jne	.L11
	incl	%r12d
	jmp	.L10
.L15:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z8initDataPfi, .-_Z8initDataPfi
	.section	.rodata.str1.1
.LC6:
	.string	"\n"
.LC7:
	.string	"%.1f\t"
	.text
	.globl	_Z11displayDataPfi
	.type	_Z11displayDataPfi, @function
_Z11displayDataPfi:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%esi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L17:
	cmpl	%ebp, %r12d
	jge	.L22
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	leaq	(%rbx,%r13), %r14
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %r15
.L18:
	cvtss2sd	(%rbx), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	addq	$4, %rbx
	cmpq	%r14, %rbx
	jne	.L18
	incl	%r12d
	jmp	.L17
.L22:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z11displayDataPfi, .-_Z11displayDataPfi
	.globl	_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i
	.type	_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i, @function
_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15matrixAddKernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i, .-_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i
	.globl	_Z15matrixAddKernelPfS_S_i
	.type	_Z15matrixAddKernelPfS_S_i, @function
_Z15matrixAddKernelPfS_S_i:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3665:
	.size	_Z15matrixAddKernelPfS_S_i, .-_Z15matrixAddKernelPfS_S_i
	.section	.rodata.str1.1
.LC8:
	.string	"cudaMalloc((void **) &d_B, size)"
.LC9:
	.string	"cudaMalloc((void **) &d_C, size)"
.LC10:
	.string	"cudaMalloc((void **) &d_A, size)"
.LC11:
	.string	"cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice)"
.LC12:
	.string	"cudaMemcpy(d_C, C, size, cudaMemcpyHostToDevice)"
.LC14:
	.string	"cudaMemcpy(A, d_A, size, cudaMemcpyDeviceToHost)"
	.text
	.globl	_Z9matrixAddPfS_S_i
	.type	_Z9matrixAddPfS_S_i, @function
_Z9matrixAddPfS_S_i:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %r15d
	imull	%ecx, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r15d, %rbx
	salq	$2, %rbx
	movq	%rbx, %rsi
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC8(%rip), %rsi
	movl	$97, %edi
	movl	%eax, %edx
	call	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	.LC9(%rip), %rsi
	movl	$98, %edi
	movl	%eax, %edx
	call	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	.LC10(%rip), %rsi
	movl	$99, %edi
	movl	%eax, %edx
	call	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rsi
	movl	$102, %edi
	movl	%eax, %edx
	call	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	movq	24(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC12(%rip), %rsi
	movl	$103, %edi
	movl	%eax, %edx
	call	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	cvtsi2sdl	%r15d, %xmm0
	mulsd	.LC13(%rip), %xmm0
	call	ceil@PLT
	movl	$67108865, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttsd2siq	%xmm0, %rax
	salq	$6, %rdx
	movl	$1, %ecx
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebp, %ecx
	movq	8(%rsp), %rdi
	call	_Z40__device_stub__Z15matrixAddKernelPfS_S_iPfS_S_i
.L29:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC14(%rip), %rsi
	movl	$115, %edi
	movl	%eax, %edx
	call	_ZL17CheckCudaErrorAuxPKcjS0_9cudaError.constprop.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z9matrixAddPfS_S_i, .-_Z9matrixAddPfS_S_i
	.section	.rodata.str1.1
.LC15:
	.string	"\nInsert the number of rows (equivalently columns): "
.LC16:
	.string	"%d"
.LC17:
	.string	"\n\tMatrice B\n"
.LC18:
	.string	"\n\n\tMatrice C\n"
.LC19:
	.string	"\n\n\tMatrice A\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%edi, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rsp), %rsi
	leaq	.LC16(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	4(%rsp), %r13d
	movl	%r13d, %ebx
	imull	%r13d, %ebx
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movl	%r13d, %esi
	movq	%rbp, %rdi
	movq	%rax, %rbx
	call	_Z8initDataPfi
	movl	4(%rsp), %esi
	movq	%r12, %rdi
	call	_Z8initDataPfi
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	4(%rsp), %esi
	movq	%rbp, %rdi
	call	_Z11displayDataPfi
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	4(%rsp), %esi
	movq	%r12, %rdi
	call	_Z11displayDataPfi
	movl	4(%rsp), %ecx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z9matrixAddPfS_S_i
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	4(%rsp), %esi
	movq	%rbx, %rdi
	call	_Z11displayDataPfi
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.text
	.globl	_Z47__device_stub__Z22matrixPerRowsAddKernelPfS_S_iPfS_S_i
	.type	_Z47__device_stub__Z22matrixPerRowsAddKernelPfS_S_iPfS_S_i, @function
_Z47__device_stub__Z22matrixPerRowsAddKernelPfS_S_iPfS_S_i:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22matrixPerRowsAddKernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L35:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z47__device_stub__Z22matrixPerRowsAddKernelPfS_S_iPfS_S_i, .-_Z47__device_stub__Z22matrixPerRowsAddKernelPfS_S_iPfS_S_i
	.globl	_Z22matrixPerRowsAddKernelPfS_S_i
	.type	_Z22matrixPerRowsAddKernelPfS_S_i, @function
_Z22matrixPerRowsAddKernelPfS_S_i:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z22matrixPerRowsAddKernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3667:
	.size	_Z22matrixPerRowsAddKernelPfS_S_i, .-_Z22matrixPerRowsAddKernelPfS_S_i
	.globl	_Z50__device_stub__Z25matrixPerColumnsAddKernelPfS_S_iPfS_S_i
	.type	_Z50__device_stub__Z25matrixPerColumnsAddKernelPfS_S_iPfS_S_i, @function
_Z50__device_stub__Z25matrixPerColumnsAddKernelPfS_S_iPfS_S_i:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z25matrixPerColumnsAddKernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L40:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z50__device_stub__Z25matrixPerColumnsAddKernelPfS_S_iPfS_S_i, .-_Z50__device_stub__Z25matrixPerColumnsAddKernelPfS_S_iPfS_S_i
	.globl	_Z25matrixPerColumnsAddKernelPfS_S_i
	.type	_Z25matrixPerColumnsAddKernelPfS_S_i, @function
_Z25matrixPerColumnsAddKernelPfS_S_i:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z25matrixPerColumnsAddKernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3669:
	.size	_Z25matrixPerColumnsAddKernelPfS_S_i, .-_Z25matrixPerColumnsAddKernelPfS_S_i
	.section	.rodata.str1.1
.LC20:
	.string	"_Z25matrixPerColumnsAddKernelPfS_S_i"
.LC21:
	.string	"_Z22matrixPerRowsAddKernelPfS_S_i"
.LC22:
	.string	"_Z15matrixAddKernelPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z25matrixPerColumnsAddKernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22matrixPerRowsAddKernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15matrixAddKernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1092616192
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC13:
	.long	0
	.long	1066401792
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Sum two square matrix (A = B + C)
 * Exercise 3.1 of programming massively parallel processors book
 * Solution provided with matrix view as array
 * @author Niccolò Bellaccini
 */

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h> //rand
#include <time.h> //rand
#include <math.h> //ceil

#include <iostream> //std::cerr

#define BLOCK_WIDTH 64

void initData(float* M, int nRows){ //Remeber: matrix square

	for (int i=0; i<nRows; i++){
		for(int j=0; j<nRows; j++){
			M[nRows * i + j] = (float) (rand() & 0xFF) / 10.0f;
		}
	}
}

void displayData(float *M, int nRows){

	for (int i=0; i<nRows; i++){
		printf("\n");
		for(int j=0; j<nRows; j++){
			printf("%.1f\t", M[nRows * i + j]);
		}
	}
}

/**
 * function-like macro
 * __LINE__ = contains the line number of the currently compiled line of code
 * __FILE__ = string that contains the name of the source file being compiled
 * # operator = turns the argument it precedes into a quoted string
 * Reference: [C the complete reference]
 * check with > nvcc -E
 */
#define CUDA_CHECK_RETURN(value) CheckCudaErrorAux(__FILE__, __LINE__, #value, value)

static void CheckCudaErrorAux (const char *file, unsigned line,
		const char *statement, hipError_t err){
	if(err == hipSuccess)
		return;
	std::cerr << statement << " returned " << hipGetErrorString(err) <<
			"(" << err << ") at " << file << ":" << line << std::endl;
	exit(1);
}


//Kernel function (point b of exercise)
__global__ void matrixAddKernel(float *A, float *B, float *C, int nRows){
	int size = nRows * nRows; //Remember: square matrices
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	if (i<size)
		A[i] = B[i] + C[i];
}

//Kernel function (point c of exercise)
__global__ void matrixPerRowsAddKernel(float *A, float *B, float *C, int nRows){
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	if (i<nRows){
		for (int j=0; j<nRows; j++){
			A[i * nRows + j] = B[i * nRows + j] + C[i * nRows + j];
		}
	}
}

//Kernel function (point d of exercise)
__global__ void matrixPerColumnsAddKernel(float *A, float *B, float *C, int nColumns){
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	if (i<nColumns){
		for (int j=0; j<nColumns; j++){
			A[i + j * nColumns] = B[i + j * nColumns] + C[i + j * nColumns];
		}
	}
}

/**
 * Stub function used to compute matrices sum.
 * (function used to launch the kernel and to allocate device mem, ...)
 */
void matrixAdd(float* A, float *B, float *C, int nRows){

	size_t size = nRows * nRows * sizeof(float);
	float * d_A;
	float * d_B;
	float * d_C;

	//Allocate device memory for matrices
	CUDA_CHECK_RETURN(hipMalloc((void **) &d_B, size));
	CUDA_CHECK_RETURN(hipMalloc((void **) &d_C, size));
	CUDA_CHECK_RETURN(hipMalloc((void **) &d_A, size));

	//Copy B and C to device memory
	CUDA_CHECK_RETURN(hipMemcpy(d_B, B, size, hipMemcpyHostToDevice));
	CUDA_CHECK_RETURN(hipMemcpy(d_C, C, size, hipMemcpyHostToDevice));

	//Kernel launch code
	//assume block of 64 threads
	matrixAddKernel <<< ceil((double)(nRows*nRows)/BLOCK_WIDTH), BLOCK_WIDTH>>>(d_A, d_B, d_C, nRows);

	//Two other possible kernel functions

	//matrixPerRowsAddKernel<<< ceil((double)nRows/BLOCK_WIDTH) ,BLOCK_WIDTH>>>(d_A, d_B, d_C, nRows);
	//matrixPerColumnsAddKernel<<< ceil((double)nRows/BLOCK_WIDTH) ,BLOCK_WIDTH>>>(d_A, d_B, d_C, nRows);

	//Copy A from the device memory
	CUDA_CHECK_RETURN(hipMemcpy(A, d_A, size, hipMemcpyDeviceToHost));

	//Free device matrices
	hipFree(d_C);
	hipFree(d_B);
	hipFree(d_A);
}

int main(int argc, char** argv){

	//Initialize random seed
	//@see http://www.cplusplus.com/reference/cstdlib/srand/
	//@see https://stackoverflow.com/questions/20158841/my-random-number-generator-function-generates-the-same-number
    srand(time(NULL));

	int numRows;
	printf("\nInsert the number of rows (equivalently columns): ");
	scanf("%d", &numRows);

	int numColumns = numRows; //Square matrix
	int nElem = numRows * numColumns;
	float * B = (float *) malloc(nElem * sizeof(float));
	float * C = (float *) malloc(nElem * sizeof(float));

	float * A = (float *) malloc(nElem * sizeof(float));

	//Initialize B and C matrices
	initData(B, numRows);
	initData(C, numRows);

	//Display B and C matrices
	printf("\n\tMatrice B\n");
	displayData(B, numRows);
	printf("\n\n\tMatrice C\n");
	displayData(C, numRows);

	//matrices sum
	matrixAdd(A, B, C, numRows);

	//Display A matrix
	printf("\n\n\tMatrice A\n");
	displayData(A, numRows);
}

	.text
	.file	"MatrixSumTest.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z8initDataPfi
.LCPI0_0:
	.long	0x41200000                      # float 10
	.text
	.globl	_Z8initDataPfi
	.type	_Z8initDataPfi,@function
_Z8initDataPfi:                         # @_Z8initDataPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, (%rsp)                    # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB0_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %ebx
	movl	%esi, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	%r12d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r14d, %r14d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movzbl	%al, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	movss	%xmm0, (%rbp,%r14,4)
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge13
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z8initDataPfi, .Lfunc_end0-_Z8initDataPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z11displayDataPfi              # -- Begin function _Z11displayDataPfi
	.type	_Z11displayDataPfi,@function
_Z11displayDataPfi:                     # @_Z11displayDataPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, (%rsp)                    # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB1_5
# %bb.1:                                # %.lr.ph14
	movl	%esi, %ebx
	movl	%esi, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movl	%r12d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%r14d, %r14d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp,%r14,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge15
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11displayDataPfi, .Lfunc_end1-_Z11displayDataPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__matrixAddKernelPfS_S_i # -- Begin function _Z30__device_stub__matrixAddKernelPfS_S_i
	.type	_Z30__device_stub__matrixAddKernelPfS_S_i,@function
_Z30__device_stub__matrixAddKernelPfS_S_i: # @_Z30__device_stub__matrixAddKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrixAddKernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__matrixAddKernelPfS_S_i, .Lfunc_end2-_Z30__device_stub__matrixAddKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i # -- Begin function _Z37__device_stub__matrixPerRowsAddKernelPfS_S_i
	.type	_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i,@function
_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i: # @_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22matrixPerRowsAddKernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i, .Lfunc_end3-_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i # -- Begin function _Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i
	.type	_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i,@function
_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i: # @_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25matrixPerColumnsAddKernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i, .Lfunc_end4-_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9matrixAddPfS_S_i
.LCPI5_0:
	.quad	0x3f90000000000000              # double 0.015625
	.text
	.globl	_Z9matrixAddPfS_S_i
	.type	_Z9matrixAddPfS_S_i,@function
_Z9matrixAddPfS_S_i:                    # @_Z9matrixAddPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	movl	%ecx, %ebp
	imull	%ebp, %ebp
	leaq	(,%rbp,4), %r14
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.3, %esi
	movl	$97, %edi
	movl	%eax, %edx
	callq	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.4, %esi
	movl	$98, %edi
	movl	%eax, %edx
	callq	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.5, %esi
	movl	$99, %edi
	movl	%eax, %edx
	callq	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	movq	(%rbx), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.6, %esi
	movl	$102, %edi
	movl	%eax, %edx
	callq	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %esi
	movl	$103, %edi
	movl	%eax, %edx
	callq	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	cvtsi2sd	%ebp, %xmm0
	mulsd	.LCPI5_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	callq	_Z30__device_stub__matrixAddKernelPfS_S_i
.LBB5_2:
	movq	(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.8, %esi
	movl	$115, %edi
	movl	%eax, %edx
	callq	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z9matrixAddPfS_S_i, .Lfunc_end5-_Z9matrixAddPfS_S_i
	.cfi_endproc
                                        # -- End function
	.type	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t,@function # -- Begin function _ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t: # @_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jne	.LBB6_2
# %bb.1:
	retq
.LBB6_2:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%edi, %ebx
	movl	$_ZSt4cerr, %edi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebp, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.15, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movl	$.L.str.16, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.17, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEj
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end6:
	.size	_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t, .Lfunc_end6-_ZL17CheckCudaErrorAuxPKcjS0_10hipError_t
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %rbx
	movl	$.L.str.10, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %ebp
	movl	%ebp, %r14d
	imull	%r14d, %r14d
	shlq	$2, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r15, %rdi
	movl	%ebp, %esi
	callq	_Z8initDataPfi
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_Z8initDataPfi
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	(%rbx), %esi
	movq	%r15, %rdi
	callq	_Z11displayDataPfi
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	(%rbx), %esi
	movq	%r12, %rdi
	callq	_Z11displayDataPfi
	movl	(%rbx), %ecx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	callq	_Z9matrixAddPfS_S_i
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	(%rbx), %esi
	movq	%r14, %rdi
	callq	_Z11displayDataPfi
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrixAddKernelPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22matrixPerRowsAddKernelPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25matrixPerColumnsAddKernelPfS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%.1f\t"
	.size	.L.str.1, 6

	.type	_Z15matrixAddKernelPfS_S_i,@object # @_Z15matrixAddKernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z15matrixAddKernelPfS_S_i
	.p2align	3, 0x0
_Z15matrixAddKernelPfS_S_i:
	.quad	_Z30__device_stub__matrixAddKernelPfS_S_i
	.size	_Z15matrixAddKernelPfS_S_i, 8

	.type	_Z22matrixPerRowsAddKernelPfS_S_i,@object # @_Z22matrixPerRowsAddKernelPfS_S_i
	.globl	_Z22matrixPerRowsAddKernelPfS_S_i
	.p2align	3, 0x0
_Z22matrixPerRowsAddKernelPfS_S_i:
	.quad	_Z37__device_stub__matrixPerRowsAddKernelPfS_S_i
	.size	_Z22matrixPerRowsAddKernelPfS_S_i, 8

	.type	_Z25matrixPerColumnsAddKernelPfS_S_i,@object # @_Z25matrixPerColumnsAddKernelPfS_S_i
	.globl	_Z25matrixPerColumnsAddKernelPfS_S_i
	.p2align	3, 0x0
_Z25matrixPerColumnsAddKernelPfS_S_i:
	.quad	_Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i
	.size	_Z25matrixPerColumnsAddKernelPfS_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/kinik93/Matrix-sum-CUDA/master/MatrixSumTest.hip"
	.size	.L.str.2, 111

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipMalloc((void **) &d_B, size)"
	.size	.L.str.3, 32

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"hipMalloc((void **) &d_C, size)"
	.size	.L.str.4, 32

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"hipMalloc((void **) &d_A, size)"
	.size	.L.str.5, 32

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"hipMemcpy(d_B, B, size, hipMemcpyHostToDevice)"
	.size	.L.str.6, 47

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"hipMemcpy(d_C, C, size, hipMemcpyHostToDevice)"
	.size	.L.str.7, 47

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"hipMemcpy(A, d_A, size, hipMemcpyDeviceToHost)"
	.size	.L.str.8, 47

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\nInsert the number of rows (equivalently columns): "
	.size	.L.str.9, 52

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%d"
	.size	.L.str.10, 3

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	" returned "
	.size	.L.str.14, 11

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"("
	.size	.L.str.15, 2

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	") at "
	.size	.L.str.16, 6

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	":"
	.size	.L.str.17, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrixAddKernelPfS_S_i"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z22matrixPerRowsAddKernelPfS_S_i"
	.size	.L__unnamed_2, 34

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z25matrixPerColumnsAddKernelPfS_S_i"
	.size	.L__unnamed_3, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n\tMatrice B"
	.size	.Lstr, 12

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n\n\tMatrice C"
	.size	.Lstr.1, 13

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"\n\n\tMatrice A"
	.size	.Lstr.2, 13

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrixAddKernelPfS_S_i
	.addrsig_sym _Z37__device_stub__matrixPerRowsAddKernelPfS_S_i
	.addrsig_sym _Z40__device_stub__matrixPerColumnsAddKernelPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15matrixAddKernelPfS_S_i
	.addrsig_sym _Z22matrixPerRowsAddKernelPfS_S_i
	.addrsig_sym _Z25matrixPerColumnsAddKernelPfS_S_i
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrixAddKernelPfS_S_i ; -- Begin function _Z15matrixAddKernelPfS_S_i
	.globl	_Z15matrixAddKernelPfS_S_i
	.p2align	8
	.type	_Z15matrixAddKernelPfS_S_i,@function
_Z15matrixAddKernelPfS_S_i:             ; @_Z15matrixAddKernelPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s3, s3, s3
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrixAddKernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrixAddKernelPfS_S_i, .Lfunc_end0-_Z15matrixAddKernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 188
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z22matrixPerRowsAddKernelPfS_S_i ; -- Begin function _Z22matrixPerRowsAddKernelPfS_S_i
	.globl	_Z22matrixPerRowsAddKernelPfS_S_i
	.p2align	8
	.type	_Z22matrixPerRowsAddKernelPfS_S_i,@function
_Z22matrixPerRowsAddKernelPfS_S_i:      ; @_Z22matrixPerRowsAddKernelPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_max_i32_e32 v0, 0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mul_lo_u32 v0, v1, s2
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[0:1], off
	global_load_b32 v7, v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v6, v7
	global_store_b32 v[4:5], v6, off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22matrixPerRowsAddKernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z22matrixPerRowsAddKernelPfS_S_i, .Lfunc_end1-_Z22matrixPerRowsAddKernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z25matrixPerColumnsAddKernelPfS_S_i ; -- Begin function _Z25matrixPerColumnsAddKernelPfS_S_i
	.globl	_Z25matrixPerColumnsAddKernelPfS_S_i
	.p2align	8
	.type	_Z25matrixPerColumnsAddKernelPfS_S_i,@function
_Z25matrixPerColumnsAddKernelPfS_S_i:   ; @_Z25matrixPerColumnsAddKernelPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mov_b32 s3, exec_lo
	v_max_i32_e32 v0, 0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, s2
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s3, 0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s2, v1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	global_store_b32 v[2:3], v0, off
	s_cbranch_scc1 .LBB2_2
.LBB2_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25matrixPerColumnsAddKernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z25matrixPerColumnsAddKernelPfS_S_i, .Lfunc_end2-_Z25matrixPerColumnsAddKernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 212
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15matrixAddKernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15matrixAddKernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22matrixPerRowsAddKernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22matrixPerRowsAddKernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25matrixPerColumnsAddKernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z25matrixPerColumnsAddKernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
