#include <stdio.h>

void print_matrix(int *s, int N){

  for(int i = 0; i < N; ++i){

    printf("%i | ", s[i]);

  }

}

void init_matrix(int *m, int val, int N){

  for(int i = 0; i < N; ++i){

    m[i] = val;

  }

}

// kernel for run in GPU
// This is a device code beacuse run in GPU
__global__
void saxpy_CUDA(int *s, int a, int *x, int *y, int N){

  for( int i = 0; i < N; ++i){

    s[i] = a*x[i] + y[i];

  }

}

// This is host code because it runs on CPU
int main(int argc, char *argv[]){

  // printf("%i \n", 10);
  if(argc != 2){

    printf("compile must be: \n ./program_name N \n");
  }

  int N = atoi(argv[1]);

  int a = 2;
  // int *s = new int[N];
  // int *x = new int[N];
  // int *y = new int[N];

  int *s, *x, *y;

  // Allocate Unified Memory
  // It's accesible from GPU and CPU
  cudaMallocManaged(&s, N*sizeof(int));
  cudaMallocManaged(&x, N*sizeof(int));
  cudaMallocManaged(&y, N*sizeof(int));

  // Init matrix
  init_matrix(s, 0, N);
  init_matrix(x, 1, N);
  init_matrix(y, 0, N);

  // printf("%i \n", z);

  // saxpy function
  // s = a * x + y
  // saxpy_CUDA(s, a, x, y, N);

  // Launch saxpy_CUDA to kernel for run in GPU
  saxpy_CUDA<<<1,1>>>(s, a, x, y, N)  ;

  // Wait for GPU to finish before accesing on host
  cudaDeviceSynchronize();
  
  print_matrix(s, N);

  // Free memory
  cudaFree(s);
  cudaFree(x);
  cudaFree(y);

  return 0;

}

// #include <iostream>
// #include <math.h>
// #include <typeinfo>

// using namespace std;

// // Kernel function to add the elements of two arrays
// __global__
// void add(int n, float *x, float *y)
// {
//   for (int i = 0; i < n; i++)
//     y[i] = x[i] + y[i];
// }

// int main(void)
// {

//   // int N = 1<<20;
//   int N = 20;

//   // printf("%i \n", N);

//   // float *x, *y;
//   int *x, *y;


//   // Allocate Unified Memory – accessible from CPU or GPU
//   cudaMallocManaged(&x, N*sizeof(float));
//   cudaMallocManaged(&y, N*sizeof(float));

//   // initialize x and y arrays on the host
//   for (int i = 0; i < N; i++) {
//     x[i] = 1.0f;
//     y[i] = 2.0f;
//   }

//   // Run kernel on 1M elements on the GPU
//   add<<<1, 1>>>(N, x, y);

//   // Wait for GPU to finish before accessing on host
//   cudaDeviceSynchronize();

//   // Check for errors (all values should be 3.0f)
//   float maxError = 0.0f;
//   for (int i = 0; i < N; i++)
//     maxError = fmax(maxError, fabs(y[i]-3.0f));
//   std::cout << "Max error: " << maxError << std::endl;

//   // Free memory
//   cudaFree(x);
//   cudaFree(y);
  
//   return 0;
// }
	.file	"tmpxft_0020f883_00000000-6_CUDA_test.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%i | "
	.text
	.globl	_Z12print_matrixPii
	.type	_Z12print_matrixPii, @function
_Z12print_matrixPii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L3
.L7:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12print_matrixPii, .-_Z12print_matrixPii
	.globl	_Z11init_matrixPiii
	.type	_Z11init_matrixPiii, @function
_Z11init_matrixPiii:
.LFB2028:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %edx
	jle	.L11
	movl	%esi, (%rdi,%rax,4)
	incq	%rax
	jmp	.L9
.L11:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11init_matrixPiii, .-_Z11init_matrixPiii
	.globl	_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i
	.type	_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i, @function
_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10saxpy_CUDAPiiS_S_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i, .-_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i
	.globl	_Z10saxpy_CUDAPiiS_S_i
	.type	_Z10saxpy_CUDAPiiS_S_i, @function
_Z10saxpy_CUDAPiiS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z10saxpy_CUDAPiiS_S_i, .-_Z10saxpy_CUDAPiiS_S_i
	.section	.rodata.str1.1
.LC1:
	.string	"compile must be: \n ./program_name N \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L18
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L18:
	movq	8(%rbx), %rdi
	call	atoi@PLT
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movslq	%eax, %rbp
	movq	%rbp, %rbx
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movq	%rbp, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rdi
	movl	%ebx, %edx
	xorl	%esi, %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	call	_Z11init_matrixPiii
	movq	16(%rsp), %rdi
	movl	$1, %esi
	call	_Z11init_matrixPiii
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	_Z11init_matrixPiii
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	%ebx, %r8d
	movl	$2, %esi
	movq	8(%rsp), %rdi
	call	_Z36__device_stub__Z10saxpy_CUDAPiiS_S_iPiiS_S_i
.L19:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z12print_matrixPii
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z10saxpy_CUDAPiiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10saxpy_CUDAPiiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

void print_matrix(int *s, int N){

  for(int i = 0; i < N; ++i){

    printf("%i | ", s[i]);

  }

}

void init_matrix(int *m, int val, int N){

  for(int i = 0; i < N; ++i){

    m[i] = val;

  }

}

// kernel for run in GPU
// This is a device code beacuse run in GPU
__global__
void saxpy_CUDA(int *s, int a, int *x, int *y, int N){

  for( int i = 0; i < N; ++i){

    s[i] = a*x[i] + y[i];

  }

}

// This is host code because it runs on CPU
int main(int argc, char *argv[]){

  // printf("%i \n", 10);
  if(argc != 2){

    printf("compile must be: \n ./program_name N \n");
  }

  int N = atoi(argv[1]);

  int a = 2;
  // int *s = new int[N];
  // int *x = new int[N];
  // int *y = new int[N];

  int *s, *x, *y;

  // Allocate Unified Memory
  // It's accesible from GPU and CPU
  hipMallocManaged(&s, N*sizeof(int));
  hipMallocManaged(&x, N*sizeof(int));
  hipMallocManaged(&y, N*sizeof(int));

  // Init matrix
  init_matrix(s, 0, N);
  init_matrix(x, 1, N);
  init_matrix(y, 0, N);

  // printf("%i \n", z);

  // saxpy function
  // s = a * x + y
  // saxpy_CUDA(s, a, x, y, N);

  // Launch saxpy_CUDA to kernel for run in GPU
  saxpy_CUDA<<<1,1>>>(s, a, x, y, N)  ;

  // Wait for GPU to finish before accesing on host
  hipDeviceSynchronize();
  
  print_matrix(s, N);

  // Free memory
  hipFree(s);
  hipFree(x);
  hipFree(y);

  return 0;

}

// #include <iostream>
// #include <math.h>
// #include <typeinfo>

// using namespace std;

// // Kernel function to add the elements of two arrays
// __global__
// void add(int n, float *x, float *y)
// {
//   for (int i = 0; i < n; i++)
//     y[i] = x[i] + y[i];
// }

// int main(void)
// {

//   // int N = 1<<20;
//   int N = 20;

//   // printf("%i \n", N);

//   // float *x, *y;
//   int *x, *y;


//   // Allocate Unified Memory – accessible from CPU or GPU
//   cudaMallocManaged(&x, N*sizeof(float));
//   cudaMallocManaged(&y, N*sizeof(float));

//   // initialize x and y arrays on the host
//   for (int i = 0; i < N; i++) {
//     x[i] = 1.0f;
//     y[i] = 2.0f;
//   }

//   // Run kernel on 1M elements on the GPU
//   add<<<1, 1>>>(N, x, y);

//   // Wait for GPU to finish before accessing on host
//   cudaDeviceSynchronize();

//   // Check for errors (all values should be 3.0f)
//   float maxError = 0.0f;
//   for (int i = 0; i < N; i++)
//     maxError = fmax(maxError, fabs(y[i]-3.0f));
//   std::cout << "Max error: " << maxError << std::endl;

//   // Free memory
//   cudaFree(x);
//   cudaFree(y);
  
//   return 0;
// }
	.text
	.file	"CUDA_test.hip"
	.globl	_Z12print_matrixPii             # -- Begin function _Z12print_matrixPii
	.type	_Z12print_matrixPii,@function
_Z12print_matrixPii:                    # @_Z12print_matrixPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z12print_matrixPii, .Lfunc_end0-_Z12print_matrixPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11init_matrixPiii             # -- Begin function _Z11init_matrixPiii
	.type	_Z11init_matrixPiii,@function
_Z11init_matrixPiii:                    # @_Z11init_matrixPiii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%esi, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z11init_matrixPiii, .Lfunc_end1-_Z11init_matrixPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__saxpy_CUDAPiiS_S_i # -- Begin function _Z25__device_stub__saxpy_CUDAPiiS_S_i
	.type	_Z25__device_stub__saxpy_CUDAPiiS_S_i,@function
_Z25__device_stub__saxpy_CUDAPiiS_S_i:  # @_Z25__device_stub__saxpy_CUDAPiiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10saxpy_CUDAPiiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__saxpy_CUDAPiiS_S_i, .Lfunc_end2-_Z25__device_stub__saxpy_CUDAPiiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	cmpl	$2, %edi
	je	.LBB3_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB3_2:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebx
	movslq	%eax, %r14
	shlq	$2, %r14
	movq	%rsp, %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%ebx, %r15d
	testl	%ebx, %ebx
	jle	.LBB3_6
# %bb.3:                                # %.lr.ph.preheader.i
	movq	(%rsp), %rdi
	leaq	(,%r15,4), %r14
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
	movq	16(%rsp), %rax
.LBB3_4:                                # %.lr.ph.i15
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, (%rax,%r12,4)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB3_4
# %bb.5:                                # %_Z11init_matrixPiii.exit19
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
.LBB3_6:                                # %_Z11init_matrixPiii.exit26
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$2, %esi
	movl	%ebx, %r8d
	callq	_Z25__device_stub__saxpy_CUDAPiiS_S_i
.LBB3_8:
	callq	hipDeviceSynchronize
	movq	(%rsp), %r14
	testl	%ebx, %ebx
	jle	.LBB3_12
# %bb.9:                                # %.lr.ph.preheader.i27
	xorl	%ebx, %ebx
.LBB3_10:                               # %.lr.ph.i29
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%rbx,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	%rbx, %r15
	jne	.LBB3_10
# %bb.11:                               # %_Z12print_matrixPii.exit.loopexit
	movq	(%rsp), %r14
.LBB3_12:                               # %_Z12print_matrixPii.exit
	movq	%r14, %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10saxpy_CUDAPiiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%i | "
	.size	.L.str, 6

	.type	_Z10saxpy_CUDAPiiS_S_i,@object  # @_Z10saxpy_CUDAPiiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10saxpy_CUDAPiiS_S_i
	.p2align	3, 0x0
_Z10saxpy_CUDAPiiS_S_i:
	.quad	_Z25__device_stub__saxpy_CUDAPiiS_S_i
	.size	_Z10saxpy_CUDAPiiS_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10saxpy_CUDAPiiS_S_i"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"compile must be: \n ./program_name N "
	.size	.Lstr, 37

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__saxpy_CUDAPiiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10saxpy_CUDAPiiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10saxpy_CUDAPiiS_S_i  ; -- Begin function _Z10saxpy_CUDAPiiS_S_i
	.globl	_Z10saxpy_CUDAPiiS_S_i
	.p2align	8
	.type	_Z10saxpy_CUDAPiiS_S_i,@function
_Z10saxpy_CUDAPiiS_S_i:                 ; @_Z10saxpy_CUDAPiiS_S_i
; %bb.0:
	s_load_b32 s6, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x2
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s7, s[0:1], 0x8
	s_load_b128 s[0:3], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[0:1]
	global_load_b32 v2, v0, s[2:3]
	s_add_i32 s6, s6, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v1, v1, s7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[4:5]
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10saxpy_CUDAPiiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10saxpy_CUDAPiiS_S_i, .Lfunc_end0-_Z10saxpy_CUDAPiiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10saxpy_CUDAPiiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z10saxpy_CUDAPiiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
