#include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gGRUFastBackward(float* outState, float* outXW, float* outSU, float* outB, const float* state, const float* xW, const float* sU, const float* b, const float* mask, const float* adj, size_t rows, size_t cols, bool final) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
float m = !mask || mask[j];

float* rowOutState = outState + j * cols;
float* rowOutXW = outXW + j * cols * 3;
float* rowOutSU = outSU + j * cols * 3;

const float* rowState = state + j * cols;
const float* rowXW = xW + j * cols * 3;
const float* rowSU = sU + j * cols * 3;
const float* rowAdj = adj + j * cols;

for(int tid = 0; tid < cols; tid += blockDim.x) {
int i = tid + threadIdx.x;
if(i < cols) {
int k = i + cols;
int l = i + 2 * cols;

float r = stableSigmoid(rowXW[i] + rowSU[i] + b[i]);
float z = stableSigmoid(rowXW[k] + rowSU[k] + b[k]);

float h;
if(final)
h = tanhf(rowXW[l] + (rowSU[l] + b[l]) * r);
else
h = tanhf(rowXW[l] + rowSU[l] * r + b[l]);

float adj = rowAdj[i];

float t = (1 - z) * (1 - h * h);

// df/ds
if(outState)
rowOutState[i] += (m * z - m + 1) * adj;

// df/d(xW_r) ...
float dfdxW_r = m * r * (1 - r) * t * adj;
if(final)
dfdxW_r *= rowSU[l] + b[l];
else
dfdxW_r *= rowSU[l];
if(outXW)
rowOutXW[i] += dfdxW_r;
if(outSU)
rowOutSU[i] += dfdxW_r;
if(outB)
atomicAdd(outB + i, dfdxW_r);

// df/d(xW_z) ...
float dfdxW_z = m * (1 - z) * z * (rowState[i] - h) * adj;
if(outXW)
rowOutXW[k] += dfdxW_z;
if(outSU)
rowOutSU[k] += dfdxW_z;
if(outB)
atomicAdd(outB + k, dfdxW_z);

// df/d(xW_x) ...
float dfdxW_x = m * t * adj;
if(outXW)
rowOutXW[l] += dfdxW_x;
if(outSU)
rowOutSU[l] += dfdxW_x * r;
if(outB)
if(final)
atomicAdd(outB + l, dfdxW_x * r);
else
atomicAdd(outB + l, dfdxW_x);
}
}
}
}
}
	.file	"tmpxft_0027e5df_00000000-6_gGRUFastBackward.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z63__device_stub__Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmbPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.type	_Z63__device_stub__Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmbPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, @function
_Z63__device_stub__Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmbPfS_S_S_PKfS1_S1_S1_S1_S1_mmb:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$280, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	112(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	124(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	296(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	304(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	104(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	312(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movl	336(%rsp), %eax
	movq	%r9, 48(%rsp)
	movb	%al, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	104(%rsp)
	.cfi_def_cfa_offset 296
	leaq	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb(%rip), %rdi
	pushq	104(%rsp)
	.cfi_def_cfa_offset 304
	movq	140(%rsp), %rcx
	movl	148(%rsp), %r8d
	movq	128(%rsp), %rsi
	movl	136(%rsp), %edx
	leaq	176(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 296
	popq	%rdx
	.cfi_def_cfa_offset 288
.L2:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$280, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z63__device_stub__Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmbPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, .-_Z63__device_stub__Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmbPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.globl	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.type	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, @function
_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb:
.LFB2034:
	.cfi_startproc
	endbr64
	movzbl	56(%rsp), %eax
	movl	%eax, 56(%rsp)
	jmp	_Z63__device_stub__Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmbPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.cfi_endproc
.LFE2034:
	.size	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, .-_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__device__ inline float stableSigmoid(float x) {
if(x >= 0) {
float z = expf(-x);
return 1.0 / (1.0 + z);
} else {
float z = expf(x);
return z / (1.0 + z);
}
}
__global__ void gGRUFastBackward(float* outState, float* outXW, float* outSU, float* outB, const float* state, const float* xW, const float* sU, const float* b, const float* mask, const float* adj, size_t rows, size_t cols, bool final) {
for(int bid = 0; bid < rows; bid += gridDim.x) {
int j = bid + blockIdx.x;
if(j < rows) {
float m = !mask || mask[j];

float* rowOutState = outState + j * cols;
float* rowOutXW = outXW + j * cols * 3;
float* rowOutSU = outSU + j * cols * 3;

const float* rowState = state + j * cols;
const float* rowXW = xW + j * cols * 3;
const float* rowSU = sU + j * cols * 3;
const float* rowAdj = adj + j * cols;

for(int tid = 0; tid < cols; tid += blockDim.x) {
int i = tid + threadIdx.x;
if(i < cols) {
int k = i + cols;
int l = i + 2 * cols;

float r = stableSigmoid(rowXW[i] + rowSU[i] + b[i]);
float z = stableSigmoid(rowXW[k] + rowSU[k] + b[k]);

float h;
if(final)
h = tanhf(rowXW[l] + (rowSU[l] + b[l]) * r);
else
h = tanhf(rowXW[l] + rowSU[l] * r + b[l]);

float adj = rowAdj[i];

float t = (1 - z) * (1 - h * h);

// df/ds
if(outState)
rowOutState[i] += (m * z - m + 1) * adj;

// df/d(xW_r) ...
float dfdxW_r = m * r * (1 - r) * t * adj;
if(final)
dfdxW_r *= rowSU[l] + b[l];
else
dfdxW_r *= rowSU[l];
if(outXW)
rowOutXW[i] += dfdxW_r;
if(outSU)
rowOutSU[i] += dfdxW_r;
if(outB)
atomicAdd(outB + i, dfdxW_r);

// df/d(xW_z) ...
float dfdxW_z = m * (1 - z) * z * (rowState[i] - h) * adj;
if(outXW)
rowOutXW[k] += dfdxW_z;
if(outSU)
rowOutSU[k] += dfdxW_z;
if(outB)
atomicAdd(outB + k, dfdxW_z);

// df/d(xW_x) ...
float dfdxW_x = m * t * adj;
if(outXW)
rowOutXW[l] += dfdxW_x;
if(outSU)
rowOutSU[l] += dfdxW_x * r;
if(outB)
if(final)
atomicAdd(outB + l, dfdxW_x * r);
else
atomicAdd(outB + l, dfdxW_x);
}
}
}
}
}
	.text
	.file	"gGRUFastBackward.hip"
	.globl	_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb # -- Begin function _Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.type	_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb,@function
_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb: # @_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movb	320(%rsp), %al
	leaq	72(%rsp), %r10
	movq	%rdi, (%r10)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	15(%rsp), %r9
	movb	%al, (%r9)
	leaq	112(%rsp), %rbx
	movq	%r10, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	movq	%r9, 96(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, .Lfunc_end0-_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb,@object # @_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.section	.rodata,"a",@progbits
	.globl	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.p2align	3, 0x0
_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb:
	.quad	_Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.size	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb"
	.size	.L__unnamed_1, 50

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb ; -- Begin function _Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.globl	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
	.p2align	8
	.type	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb,@function
_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb: ; @_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x40
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u64 s[8:9], 0
	s_cbranch_scc1 .LBB0_59
; %bb.1:                                ; %.lr.ph174
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x60
	s_load_b512 s[16:31], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x68
	v_mov_b32_e32 v15, 0
	s_mov_b32 s12, 0
	s_mov_b32 s43, 0xbbbac73d
	s_waitcnt lgkmcnt(0)
	s_bitcmp1_b32 s2, 0
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, s2, -1
	s_cmp_lg_u64 s[4:5], 0
	s_cselect_b32 s33, -1, 0
	s_cmp_lg_u64 s[10:11], 0
	s_cselect_b32 s38, -1, 0
	s_cmp_lg_u64 s[16:17], 0
	s_cselect_b32 s39, -1, 0
	s_cmp_lg_u64 s[18:19], 0
	s_cselect_b32 s40, -1, 0
	s_cmp_lg_u64 s[20:21], 0
	s_cselect_b32 s41, -1, 0
	s_cmp_lg_u64 s[22:23], 0
	s_cselect_b32 s42, -1, 0
	s_add_u32 s0, s0, 0x68
	s_addc_u32 s1, s1, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_8 Depth 2
                                        ;       Child Loop BB0_40 Depth 3
                                        ;       Child Loop BB0_48 Depth 3
                                        ;       Child Loop BB0_56 Depth 3
	s_add_i32 s34, s12, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s35, s34, 31
	v_cmp_ge_u64_e64 s13, s[34:35], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_58
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s33
	s_cbranch_vccnz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_lshl_b64 s[36:37], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s36, s4, s36
	s_addc_u32 s37, s5, s37
	global_load_b32 v1, v15, s[36:37]
	s_waitcnt vmcnt(0)
	v_cmp_neq_f32_e64 s13, 0, v1
	s_branch .LBB0_6
.LBB0_5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s13, -1
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s38
	s_cbranch_vccnz .LBB0_58
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mul_i32 s36, s34, s11
	s_mul_hi_u32 s37, s34, s10
	s_load_b32 s57, s[0:1], 0xc
	s_add_i32 s36, s37, s36
	s_mul_i32 s35, s35, s10
	s_mul_i32 s34, s34, s10
	s_add_i32 s35, s36, s35
	s_mul_hi_u32 s45, s34, 12
	s_lshl_b64 s[36:37], s[34:35], 2
	s_mul_i32 s35, s35, 12
	v_cndmask_b32_e64 v16, 0, 1.0, s13
	s_add_u32 s13, s16, s36
	s_mul_i32 s34, s34, 12
	s_addc_u32 s44, s17, s37
	s_add_i32 s35, s45, s35
	s_add_u32 s45, s18, s34
	s_addc_u32 s46, s19, s35
	s_add_u32 s47, s20, s34
	s_addc_u32 s48, s21, s35
	s_add_u32 s49, s24, s36
	s_addc_u32 s50, s25, s37
	s_add_u32 s51, s26, s34
	s_addc_u32 s52, s27, s35
	s_add_u32 s53, s28, s34
	s_addc_u32 s54, s29, s35
	s_add_u32 s55, s6, s36
	s_addc_u32 s56, s7, s37
	s_waitcnt lgkmcnt(0)
	s_and_b32 s57, s57, 0xffff
	s_mov_b32 s34, 0
.LBB0_8:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_40 Depth 3
                                        ;       Child Loop BB0_48 Depth 3
                                        ;       Child Loop BB0_56 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s34, v0
	s_mov_b32 s35, exec_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u64_e64 s[10:11], v[3:4]
	s_cbranch_execz .LBB0_57
; %bb.9:                                ;   in Loop: Header=BB0_8 Depth=2
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_mov_b32 s58, exec_lo
                                        ; implicit-def: $sgpr36_sgpr37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s51, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s52, v2, vcc_lo
	v_add_co_u32 v6, vcc_lo, s53, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s54, v2, vcc_lo
	global_load_b32 v8, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_u32 v4, vcc_lo, s30, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s31, v2, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v5, v8, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v4
                                        ; implicit-def: $vgpr5_vgpr6
	v_cmpx_le_f32_e32 0, v4
	s_xor_b32 s58, exec_lo, s58
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v5, 0xbfb8aa3b, v4
	v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v4
	s_mov_b64 s[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v6, v5
	v_fma_f32 v7, 0xbfb8aa3b, v4, -v5
	v_sub_f32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, 0xb2a5705f, v4
	v_cvt_i32_f32_e32 v6, v6
	v_add_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v5, v6
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, 0x7f800000, v5, vcc_lo
	v_cvt_f64_f32_e32 v[5:6], v4
                                        ; implicit-def: $vgpr4
.LBB0_11:                               ; %Flow236
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_saveexec_b32 s58, s58
	v_dual_mov_b32 v13, s36 :: v_dual_mov_b32 v14, s37
	s_xor_b32 exec_lo, exec_lo, s58
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v5, 0x3fb8aa3b, v4
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v6, v5
	v_fma_f32 v7, 0x3fb8aa3b, v4, -v5
	v_sub_f32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v7, 0x32a5705f, v4
	v_cvt_i32_f32_e32 v6, v6
	v_add_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v5, v5, v6
	v_cndmask_b32_e32 v5, 0, v5, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, 0x7f800000, v5, vcc_lo
	v_cvt_f64_f32_e32 v[5:6], v4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v14, v6 :: v_dual_mov_b32 v13, v5
.LBB0_13:                               ; %_Z13stableSigmoidf.exit
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s58
	v_add_nc_u32_e32 v11, s10, v3
	s_mov_b32 s58, exec_lo
                                        ; implicit-def: $sgpr36_sgpr37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[3:4], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s51, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s52, v4, vcc_lo
	v_add_co_u32 v9, vcc_lo, s53, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s54, v4, vcc_lo
	global_load_b32 v12, v[7:8], off
	global_load_b32 v9, v[9:10], off
	v_add_co_u32 v7, vcc_lo, s30, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s31, v4, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v8, v12, v9
                                        ; implicit-def: $vgpr9_vgpr10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v8, v7
	v_cmpx_le_f32_e32 0, v12
	s_xor_b32 s58, exec_lo, s58
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v7, 0xbfb8aa3b, v12
	v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v12
	s_mov_b64 s[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v8, v7
	v_fma_f32 v9, 0xbfb8aa3b, v12, -v7
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, 0xb2a5705f, v12
	v_cvt_i32_f32_e32 v8, v8
	v_add_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v12
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7f800000, v7, vcc_lo
	v_cvt_f64_f32_e32 v[9:10], v7
.LBB0_15:                               ; %Flow234
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_saveexec_b32 s58, s58
	v_dual_mov_b32 v7, s36 :: v_dual_mov_b32 v8, s37
	s_xor_b32 exec_lo, exec_lo, s58
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v7, 0x3fb8aa3b, v12
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v8, v7
	v_fma_f32 v9, 0x3fb8aa3b, v12, -v7
	v_sub_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v9, 0x32a5705f, v12
	v_cvt_i32_f32_e32 v8, v8
	v_add_f32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, 0x7f800000, v7, vcc_lo
	v_cvt_f64_f32_e32 v[9:10], v7
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v7, v9 :: v_dual_mov_b32 v8, v10
.LBB0_17:                               ; %_Z13stableSigmoidf.exit171
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s58
	v_add_f64 v[20:21], v[5:6], 1.0
	v_add_nc_u32_e32 v5, s10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v17, vcc_lo, s51, v5
	v_add_co_ci_u32_e32 v18, vcc_lo, s52, v6, vcc_lo
	v_add_co_u32 v11, vcc_lo, s53, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s54, v6, vcc_lo
	global_load_b32 v18, v[17:18], off
	global_load_b32 v19, v[11:12], off
	v_div_scale_f64 v[22:23], null, v[20:21], v[20:21], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[24:25], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[22:23], v[24:25], 1.0
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], -v[22:23], v[24:25], 1.0
	v_fma_f64 v[24:25], v[24:25], v[26:27], v[24:25]
	v_div_scale_f64 v[26:27], vcc_lo, v[13:14], v[20:21], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[28:29], v[26:27], v[24:25]
	v_fma_f64 v[22:23], -v[22:23], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[22:23], v[22:23], v[24:25], v[28:29]
	s_and_b32 vcc_lo, exec_lo, s14
	v_div_fixup_f64 v[13:14], v[22:23], v[20:21], v[13:14]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v13, v[13:14]
	s_cbranch_vccz .LBB0_23
; %bb.18:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v20, vcc_lo, s30, v5
	v_add_co_ci_u32_e32 v21, vcc_lo, s31, v6, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f32 v17, v19, v13, v18
	global_load_b32 v14, v[20:21], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v14, v14, v17
                                        ; implicit-def: $vgpr17
	v_cmp_ngt_f32_e64 s36, 0x3f200000, |v14|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s37, s36
	s_xor_b32 s36, exec_lo, s37
	s_cbranch_execz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_f32_e64 v17, |v14|, |v14|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v20, 0x3fb8aa3b, v17
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v17
	v_rndne_f32_e32 v21, v20
	v_fma_f32 v22, 0x3fb8aa3b, v17, -v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v20, v20, v21
	v_fmac_f32_e32 v22, 0x32a5705f, v17
	v_cvt_i32_f32_e32 v21, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v20, v20, v22
	v_exp_f32_e32 v20, v20
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v20, v20, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v20, 0, v20, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v17
	v_cndmask_b32_e32 v17, 0x7f800000, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v17, 1.0, v17
	v_rcp_f32_e32 v17, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, v17, -2.0, 1.0
.LBB0_20:                               ; %Flow229
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_saveexec_b32 s36, s36
; %bb.21:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v17, v14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v20, s43, v17, 0x3ca908c9
	v_fmaak_f32 v20, v17, v20, 0xbd5c1c4e
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v20, v17, v20, 0x3e088382
	v_fmaak_f32 v20, v17, v20, 0xbeaaaa99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v20, |v14|, v20
	v_fma_f32 v17, v17, v20, |v14|
; %bb.22:                               ; %_ZL5tanhff.exit167
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s36
	s_delay_alu instid0(VALU_DEP_1)
	v_bfi_b32 v17, 0x7fffffff, v17, v14
	s_mov_b32 s36, 0
	s_branch .LBB0_24
.LBB0_23:                               ;   in Loop: Header=BB0_8 Depth=2
	s_mov_b32 s36, -1
                                        ; implicit-def: $vgpr17
.LBB0_24:                               ; %Flow231
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s36
	s_cbranch_vccz .LBB0_30
; %bb.25:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v20, vcc_lo, s30, v5
	v_add_co_ci_u32_e32 v21, vcc_lo, s31, v6, vcc_lo
	global_load_b32 v14, v[20:21], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v14, v19, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v18, v14, v13
                                        ; implicit-def: $vgpr14
	v_cmp_ngt_f32_e64 s36, 0x3f200000, |v18|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s37, s36
	s_xor_b32 s36, exec_lo, s37
	s_cbranch_execz .LBB0_27
; %bb.26:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_f32_e64 v14, |v18|, |v18|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v17, 0x3fb8aa3b, v14
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v14
	v_rndne_f32_e32 v19, v17
	v_fma_f32 v20, 0x3fb8aa3b, v14, -v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v17, v17, v19 :: v_dual_fmac_f32 v20, 0x32a5705f, v14
	v_cvt_i32_f32_e32 v19, v19
	v_add_f32_e32 v17, v17, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v17, v17
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v17, v17, v19
	v_cndmask_b32_e32 v17, 0, v17, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, 0x7f800000, v17, vcc_lo
	v_add_f32_e32 v14, 1.0, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_f32_e32 v14, v14
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, v14, -2.0, 1.0
.LBB0_27:                               ; %Flow230
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_saveexec_b32 s36, s36
; %bb.28:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v14, v18, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v17, s43, v14, 0x3ca908c9
	v_fmaak_f32 v17, v14, v17, 0xbd5c1c4e
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v17, v14, v17, 0x3e088382
	v_fmaak_f32 v17, v14, v17, 0xbeaaaa99
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v17, |v18|, v17
	v_fma_f32 v14, v14, v17, |v18|
; %bb.29:                               ; %_ZL5tanhff.exit
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s36
	s_delay_alu instid0(VALU_DEP_1)
	v_bfi_b32 v17, 0x7fffffff, v14, v18
.LBB0_30:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_f64 v[9:10], v[9:10], 1.0
	v_add_co_u32 v24, vcc_lo, s55, v1
	v_add_co_ci_u32_e32 v25, vcc_lo, s56, v2, vcc_lo
	global_load_b32 v14, v[24:25], off
	s_waitcnt vmcnt(1)
	v_div_scale_f64 v[18:19], null, v[9:10], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[22:23], v[20:21]
	v_fma_f64 v[18:19], -v[18:19], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[24:25]
	s_and_not1_b32 vcc_lo, exec_lo, s39
	v_div_fixup_f64 v[7:8], v[18:19], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v18, v[7:8]
	s_cbranch_vccnz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v7, vcc_lo, s13, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, s44, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f32 v10, v16, v18, -v16
	global_load_b32 v9, v[7:8], off
	v_add_f32_e32 v10, 1.0, v10
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v9, v10, v14
	global_store_b32 v[7:8], v9, off
.LBB0_32:                               ;   in Loop: Header=BB0_8 Depth=2
	global_load_b32 v7, v[11:12], off
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v8, vcc_lo, s30, v5
	v_add_co_ci_u32_e32 v9, vcc_lo, s31, v6, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v7, v7, v8
.LBB0_34:                               ;   in Loop: Header=BB0_8 Depth=2
	v_dual_sub_f32 v12, 1.0, v18 :: v_dual_mul_f32 v9, v16, v13
	v_fma_f32 v8, -v17, v17, 1.0
	v_sub_f32_e32 v10, 1.0, v13
	s_and_not1_b32 vcc_lo, exec_lo, s40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v11, v12, v8 :: v_dual_mul_f32 v8, v9, v10
	v_mul_f32_e32 v8, v8, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v14, v8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v19, v8, v7
	s_cbranch_vccnz .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v7, vcc_lo, s45, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, s46, v2, vcc_lo
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v9, v19, v9
	global_store_b32 v[7:8], v9, off
.LBB0_36:                               ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB0_38
; %bb.37:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v7, vcc_lo, s47, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, s48, v2, vcc_lo
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v9, v19, v9
	global_store_b32 v[7:8], v9, off
.LBB0_38:                               ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s42
	s_cbranch_vccnz .LBB0_42
; %bb.39:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v7, vcc_lo, s22, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, s23, v2, vcc_lo
	s_mov_b32 s36, 0
	global_load_b32 v10, v[7:8], off
.LBB0_40:                               ; %atomicrmw.start
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v9, v10, v19
	global_atomic_cmpswap_b32 v9, v[7:8], v[9:10], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v9, v10
	v_mov_b32_e32 v10, v9
	s_or_b32 s36, vcc_lo, s36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s36
	s_cbranch_execnz .LBB0_40
; %bb.41:                               ; %Flow227
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s36
.LBB0_42:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s49, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s50, v2, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s40
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v2, v12, v16 :: v_dual_sub_f32 v1, v1, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v18
	v_mul_f32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v7, v14, v1
	s_cbranch_vccnz .LBB0_44
; %bb.43:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s45, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s46, v4, vcc_lo
	global_load_b32 v8, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v7, v8
	global_store_b32 v[1:2], v8, off
.LBB0_44:                               ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB0_46
; %bb.45:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s47, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s48, v4, vcc_lo
	global_load_b32 v8, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v7, v8
	global_store_b32 v[1:2], v8, off
.LBB0_46:                               ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s42
	s_cbranch_vccnz .LBB0_50
; %bb.47:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s22, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s23, v4, vcc_lo
	s_mov_b32 s36, 0
	global_load_b32 v4, v[1:2], off
.LBB0_48:                               ; %atomicrmw.start178
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v4, v7
	global_atomic_cmpswap_b32 v3, v[1:2], v[3:4], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v4
	v_mov_b32_e32 v4, v3
	s_or_b32 s36, vcc_lo, s36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s36
	s_cbranch_execnz .LBB0_48
; %bb.49:                               ; %Flow225
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s36
.LBB0_50:                               ;   in Loop: Header=BB0_8 Depth=2
	v_mul_f32_e32 v1, v11, v16
	s_and_not1_b32 vcc_lo, exec_lo, s40
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v3, v14, v1
	s_cbranch_vccnz .LBB0_52
; %bb.51:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s45, v5
	v_add_co_ci_u32_e32 v2, vcc_lo, s46, v6, vcc_lo
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, v3, v4
	global_store_b32 v[1:2], v4, off
.LBB0_52:                               ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB0_54
; %bb.53:                               ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s47, v5
	v_add_co_ci_u32_e32 v2, vcc_lo, s48, v6, vcc_lo
	global_load_b32 v4, v[1:2], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v3, v13
	global_store_b32 v[1:2], v4, off
.LBB0_54:                               ;   in Loop: Header=BB0_8 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s42
	s_cbranch_vccnz .LBB0_57
; %bb.55:                               ; %.sink.split
                                        ;   in Loop: Header=BB0_8 Depth=2
	v_add_co_u32 v1, vcc_lo, s22, v5
	v_add_co_ci_u32_e32 v2, vcc_lo, s23, v6, vcc_lo
	v_cndmask_b32_e64 v5, 1.0, v13, s2
	s_mov_b32 s36, 0
	global_load_b32 v4, v[1:2], off
	v_mul_f32_e32 v5, v3, v5
.LBB0_56:                               ; %atomicrmw.start184
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_8 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, v4, v5
	global_atomic_cmpswap_b32 v3, v[1:2], v[3:4], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v4
	v_mov_b32_e32 v4, v3
	s_or_b32 s36, vcc_lo, s36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s36
	s_cbranch_execnz .LBB0_56
.LBB0_57:                               ; %Flow237
                                        ;   in Loop: Header=BB0_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s35
	s_add_i32 s34, s34, s57
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s35, s34, 31
	v_cmp_lt_u64_e64 s35, s[34:35], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s35
	s_cbranch_vccnz .LBB0_8
.LBB0_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s12, s3, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s13, s12, 31
	v_cmp_ge_u64_e64 s13, s[12:13], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccz .LBB0_2
.LBB0_59:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 360
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 59
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb, .Lfunc_end0-_Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2904
; NumSgprs: 61
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 61
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           8
        .value_kind:     by_value
      - .offset:         88
        .size:           8
        .value_kind:     by_value
      - .offset:         96
        .size:           1
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         108
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         116
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         118
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         120
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         122
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         124
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         126
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         168
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 360
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb
    .private_segment_fixed_size: 0
    .sgpr_count:     61
    .sgpr_spill_count: 0
    .symbol:         _Z16gGRUFastBackwardPfS_S_S_PKfS1_S1_S1_S1_S1_mmb.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
