
#include <stdio.h> 
#include <queue>
#include <set>
#include <list>
#include <iterator>
#include <algorithm>
#include <time.h>
#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>

#define ARRAY_SIZE 30
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


// Structure to represent a vertex and its distance
struct distNode { 
	int node; 
	int dist; 
  bool operator<(const distNode& rhs) const
    {
        return dist > rhs.dist || (dist == rhs.dist && node > rhs.node);;
    }
}; 

// Structure to represent an edge
struct edge { 
	int from; 
	int to; 
 	int weight;
   	bool operator<(const edge& rhs) const
     {
         return weight > rhs.weight || (weight == rhs.weight && to > rhs.to);
     }
};

// Structure to represent an edge source & destination
struct fromTo { 
	int from; 
	int to; 
   	bool operator<(const fromTo& rhs) const
     {
         return to < rhs.to || (to == rhs.to && from < rhs.from);
     }
};


// Initialize global variables
__device__ __managed__ int parent[ARRAY_SIZE]; // Array to store parent nodes
__device__ __managed__ int dist[ARRAY_SIZE]; // Array to store node distances
__device__ __managed__ bool fixed[ARRAY_SIZE]; // Array to store flags for node traversal
std::vector<bool> nonEmptyIndices; // Array to store non empty indices of vertices

std::priority_queue<distNode> H; //binary heap of (j,dist) initially empty;
__device__ __managed__ int Q[ARRAY_SIZE], R[ARRAY_SIZE]; //set of vertices initially empty;
__device__ __managed__ fromTo T[ARRAY_SIZE*ARRAY_SIZE]; //{ set of edges } initially {};
__device__ __managed__ fromTo mwe[ARRAY_SIZE*ARRAY_SIZE]; //set of edges; minimum weight edges for all vertices
__device__ __managed__ int z_device, Q_index=0, R_index=0, mwe_index=0, T_index=0; //Indices to synchronize between host & device
__device__ __managed__ int edge_cnt=0; //keeps track of #edges

//Arrays to hold all edges of a graph
int allvertex_in[ARRAY_SIZE*ARRAY_SIZE], alledge_in[ARRAY_SIZE*ARRAY_SIZE], allweight_in[ARRAY_SIZE*ARRAY_SIZE];


// class to represent a graph object
class Graph
{
public:
	// construct a vector of vectors of edges to represent an adjacency list
	std::vector<std::vector<edge>> adjList;
	

	// Graph Constructor
	Graph(std::vector<edge> const &edges, int N)
	{
		// resize the vector to hold upto vertex of maximum label value (elements of type vector<edge>)
		//or assign labels to each vertex starting from 0
		adjList.resize(N);
		nonEmptyIndices.resize(N);

		// add edges to the undirected graph
		for (auto &e: edges)
		{
			int from = e.from;
			int to = e.to;
			int weight = e.weight;

			// insert at the end
			adjList[from].push_back(edge{from, to, weight});
			adjList[to].push_back(edge{to, from, weight});

			//flag the non empty indices in adjList
			nonEmptyIndices[from] = true;
			nonEmptyIndices[to] = true;
		}
	}
};


// print adjacency list representation of graph
void printGraph(Graph const &graph)
{
	printf("Input Graph\n");
	for (int i = 0; i < graph.adjList.size(); i++)
	{
		// print all neighboring vertices of given vertex
		for (edge v : graph.adjList[i]){
			printf("( %d, %d, %d )", v.from, v.to, v.weight);
		}
		//printf("\n");
	}
}

//Delete element from array
//template<typename T>
void deleteElement(int arr[], int arr_index, int size) 
{

   if (arr_index < size) 
   { 
     // decrease the size of array and move all elements ahead
     size = size - 1; 
     for (int j=arr_index; j<size; j++) 
        arr[j] = arr[j+1]; 
   }
} 

//Check if an element exists in an array
//template<typename T>
__device__ bool ifExist(int arr[], int val){
		for (int i=0; i<ARRAY_SIZE; i++) {
				if (arr[i] == val)
					return true;
		}
		return false;
}

__device__ bool ifExistMWE(fromTo arr[], fromTo ft){
		for (int i=0; i<edge_cnt; i++) {
				if (arr[i].from == ft.from && arr[i].to == ft.to)
					return true;
		}
		return false;
}


//Function to load edges into kernel pointer arrays
void load_kernelArrays(Graph const &graph) {
	// generate the input array on the host
	//atmost a node can connect to all other nodes
	for (int i = 0; i < graph.adjList.size(); i++) {
		for(edge adj : graph.adjList[i]) {
			allvertex_in[edge_cnt] = adj.from;
			alledge_in[edge_cnt] = adj.to;
			allweight_in[edge_cnt] = adj.weight;
			edge_cnt++;
		}
	}
}

//Identifies all minimum weight edges for all vertices
void initMWE(Graph const &graph) 
{ 
	for (int i = 0; i < graph.adjList.size(); i++) {
		int prevWeight=INT_MAX;
		int min_to, minFrom;
		// Iterate through all the vertices of graph 
		for (auto it=graph.adjList[i].begin(); it!=graph.adjList[i].end(); it++) {
			edge adj = *it;
			// Get the Minimum weight edge for vertex adj.from
			if (adj.weight < prevWeight) { 
				min_to = adj.to;
				minFrom = adj.from;
				prevWeight = adj.weight;
			}
		} 
		mwe[mwe_index] = fromTo{minFrom, min_to};
		mwe_index++;
	}
} 
 
 
//Kernel to process edges in Parallel
__global__ void parallel_processEdge(int *allvertex_devicein, int *alledge_devicein, 
	int *allweight_devicein, int z_device)
{
 
    int myId = threadIdx.x + blockDim.x * blockIdx.x;
	   // int tid  = threadIdx.x;

    //printf("block:%d, myId: %d\n", blockIdx.x, myId); 
	
    // process edges in R
	if (myId < edge_cnt) {
		//printf("myId:%d, allvertex_devicein[myId] :%d\n", myId, allvertex_devicein[myId]);
		if (allvertex_devicein[myId] == z_device)
		{
			//printf("Z found, allvertex_devicein[myId] :%d\n", allvertex_devicein[myId]);
			////printf("block:%d, myId: %d\n", blockIdx.x, myId); 
			printf("Thread %d looking for the Edge to be processed\n", threadIdx.x);
			int k_device = alledge_devicein[myId];
			//printf("k_device: %d\n", k_device);
			int w_device = allweight_devicein[myId];
			//printf("w_device: %d\n", w_device);
			printf("Edge {%d, %d, %d} found at myID:%d\n", z_device, k_device, w_device);

			if (!fixed[k_device]) {
				if (ifExistMWE(mwe, fromTo{z_device, k_device})) {
					//printf("In MWE and not fixed k, z:%d, k:%d\n", z_device, k_device);
					fixed[k_device] = true;
							
					int t = atomicAdd(&T_index, 1);
					T[t] = fromTo{k_device, z_device}; // z is the parent of k
							
					int r = atomicAdd(&R_index, 1);
					R[r] = k_device;
					printf("Destination node is not fixed & also a minimum edge for Z:%d\n", z_device);
					printf("Adding k:%d to Tree & R for processing\n", k_device);
					//printf("R_index in kernel:%d\n", R_index);
				}
				else if (dist[k_device] > w_device) {
					//printf("not minimum edge and not fixed k, z:%d, k:%d\n", z_device, k_device);
					//printf("\n");
					printf("Destination node is not fixed & NOT a minimum weight edge\n");
					printf("Adding k:%d to Q for inserting into Heap\n", k_device);
					dist[k_device] = w_device;
					parent[k_device] = z_device;

					if (!ifExist(Q, k_device)) {
						int q = atomicAdd(&Q_index, 1);
						Q[q] = k_device;
						//if (Q.find(k_device) == Q.end()) {
						//	Q.insert(k_device);
					}
				}
			}
			__syncthreads();        // make sure all updates are finished
		}
	}
}

//Kernel Setup
void kernel_setup(Graph const &graph, int z_device){
	
	int threads = 512;
	int blocks = ceil(float(edge_cnt) / float(threads));

	const int ARRAY_BYTES = ARRAY_SIZE * ARRAY_SIZE * sizeof(int);
	//printf("array bytes:%f\n", ARRAY_BYTES);

	// declare GPU memory pointers
    int * allvertex_devicein, * alledge_devicein, * allweight_devicein;

    // allocate GPU memory
    cudaMalloc((void **) &allvertex_devicein, ARRAY_BYTES);
	cudaMalloc((void **) &alledge_devicein, ARRAY_BYTES);
	cudaMalloc((void **) &allweight_devicein, ARRAY_BYTES);

	// transfer the input array to the GPU
	cudaMemcpy(allvertex_devicein, allvertex_in, ARRAY_BYTES, cudaMemcpyHostToDevice);
	gpuErrchk( cudaMemcpy(alledge_devicein, alledge_in, ARRAY_BYTES, cudaMemcpyHostToDevice) );
	gpuErrchk( cudaMemcpy(allweight_devicein, allweight_in, ARRAY_BYTES, cudaMemcpyHostToDevice) );


	//printf("Running global reduce\n");
	
	parallel_processEdge<<<blocks, threads>>>
		(allvertex_devicein, alledge_devicein, allweight_devicein, z_device);

	gpuErrchk( cudaPeekAtLastError() );
  	gpuErrchk( cudaDeviceSynchronize() );

	// free GPU memory allocation
	cudaFree(allvertex_devicein);
	cudaFree(alledge_devicein);
	cudaFree(allweight_devicein);
};
 

// Function to print the constructed MST 
void printMST(std::set<fromTo> T) 
{ 
	std::set<fromTo>::iterator it; //set iterator
	for (it=T.begin(); it!=T.end(); it++) {
		fromTo e = *it; 
		printf("%d - %d\n", e.from, e.to); 
  }
} 

// The main function that constructs Minimum Spanning Tree (MST) 
// using Prim's Parallel algorithm given in chapter 7
fromTo* primMST(Graph const &graph, int N, int source) 
{ 
	std::set<int>::iterator it; //set iterator 

	// Initialize and assign dist value of 
	// all vertices to 0 and source to infinite 
	for(int i = 0; i < N; i ++) {
		parent[i] = -1;
		dist[i] = INT_MAX;
		fixed[i] = false;
	}

	// Make distance value of source vertex as 0 so it is extracted first 
	dist[source] = 0; 
	H.push(distNode{source, dist[0]});

	initMWE(graph); //initialize minimum weight edges of given graph;

	// Loop for |V| - 1 iterations
	//while (!H.empty()) { 
	for (int i = 0; i < graph.adjList.size(); i++) {
		// Extract the vertex with minimum dist value 
		distNode d = H.top();
		H.pop();
		int j = d.node; //pop the minimum distance vertex
		printf("Popped minimum distance node:%d\n", j);
		if (!fixed[j]) {
			printf("Popped node is not fixed adding it to R\n");
			R[R_index] = j;
			R_index++;
			fixed[j] = true;
			if (parent[j] != -1) {
				T[T_index] = fromTo{j, parent[j]};
				T_index++;
			}

			//printf("R_index: %d\n", R_index);
			while (R_index != 0){
				// call processEdge for all neighbors of vertex in R 
				//printf("R_index: %d\n", R_index);
				z_device = R[0];
				//printf("Z before kernel:%d\n", z_device);
				deleteElement(R, 0, ARRAY_SIZE);
				R_index--;
				//call kernel setup
				printf("Calling kernel for processing edges of elements in R in parallel\n");
				kernel_setup(graph, z_device);
			}	
			
			while (Q_index != 0) {
				//for (int i = 0; i < Q_index; i++) {
					printf("Adding all elements from Q to Heap H\n");
					int z = Q[0];
					//printf("z in Q:%d\n", z);
					deleteElement(Q, 0, ARRAY_SIZE);
					Q_index--;
					if (!fixed[z]) {
						H.push(distNode{z, dist[z]});
					}
				//}
			}
		}
	}
	if (T_index == graph.adjList.size() -1) {
		return T;
	} else 
		return new fromTo[ARRAY_SIZE]; // return empty tree

} 

// Driver program to call Prim
int main() 
{ 
	printf("2010_Alaskan.txt\n");
	// vector of graph edges
    std::vector<edge> edges;
    
    edges.push_back(edge{0, 1, 866});
    edges.push_back(edge{0, 2, 187});
    edges.push_back(edge{0, 3, 399});

    edges.push_back(edge{1, 5, 605});
    edges.push_back(edge{1, 10, 1720});
    edges.push_back(edge{1, 11, 888});
    edges.push_back(edge{1, 12, 409});

    edges.push_back(edge{2, 1, 739});
    edges.push_back(edge{2, 3, 213});
    edges.push_back(edge{2, 4, 541});
    edges.push_back(edge{2, 5, 759});
    edges.push_back(edge{2, 6, 1416});
    edges.push_back(edge{2, 7, 1391});
    edges.push_back(edge{2, 8, 2474});
    edges.push_back(edge{2, 9, 2586});
    edges.push_back(edge{2, 10, 2421});
    edges.push_back(edge{2, 11, 1625});
    edges.push_back(edge{2, 12, 765});

    edges.push_back(edge{3, 4, 330});
    edges.push_back(edge{3, 5, 547});
    edges.push_back(edge{3, 12, 561});

    edges.push_back(edge{4, 5, 226});
    edges.push_back(edge{4, 6, 912});

    edges.push_back(edge{5, 6, 689});
    edges.push_back(edge{5, 7, 731});
    edges.push_back(edge{5, 11, 1199});
    edges.push_back(edge{5, 12, 213});

    edges.push_back(edge{6, 7, 224});
    edges.push_back(edge{6, 8, 1378});

    edges.push_back(edge{7, 8, 1234});
    edges.push_back(edge{7, 11, 641});
    edges.push_back(edge{7, 12, 631});

    edges.push_back(edge{8, 9, 337});
    edges.push_back(edge{8, 11, 861});

    edges.push_back(edge{9, 10, 678});
    edges.push_back(edge{9, 11, 967});

    edges.push_back(edge{10, 11, 1024});

	edges.push_back(edge{11, 12, 1013});


	
	// edges.push_back(edge{4,5,4});
	// edges.push_back(edge{4,11,8});
	// edges.push_back(edge{5,6,8});
	// edges.push_back(edge{5,11,11});
	// edges.push_back(edge{6,7,7});
	// edges.push_back(edge{6,12,2});
	// edges.push_back(edge{6,9,4});
	// edges.push_back(edge{7,8,9});
	// edges.push_back(edge{7,9,14});
	// edges.push_back(edge{8,9,10});
	// edges.push_back(edge{9,10,2});
	// edges.push_back(edge{10,11,1});
	// edges.push_back(edge{10,12,6});
	// edges.push_back(edge{11,12,7});

	// construct graph
	Graph graph(edges, ARRAY_SIZE);
	load_kernelArrays(graph);

	// print adjacency list representation of graph
	printGraph(graph);

	//Source vertex as first non empty vertex in adjacency List
	//Or modify this to take from input file
	int source;
	for(int i = 0; i<nonEmptyIndices.size(); i++) {
			if (nonEmptyIndices[i]) {
				source = i;
			break;
		}
	}	
	
	//printf("source:%d\n", source);
	
  	//printf("Before Prim\n");

	cudaEvent_t start, stop;
    	cudaEventCreate(&start);
        cudaEventCreate(&stop);

        //printf("Running global reduce\n");
    	cudaEventRecord(start, 0);

	primMST(graph, ARRAY_SIZE, source);

	 cudaEventRecord(stop, 0);

        cudaEventSynchronize(stop);
    	float elapsedTime;
        cudaEventElapsedTime(&elapsedTime, start, stop);
        printf("Parallel Elpased Time in ms:%f\n", elapsedTime);

	
  	//printf("After Prim\n");

	//printf("T size:%d\n", T_index);
	//printf("MST in iterator\n");
	printf("\n====================================\n");
	printf("Minimum Spanning Tree using Prim \n");
	for (int i =0; i<T_index; i++) {
		fromTo e = T[i]; 
		printf("%d - %d\n", e.from, e.to); 
	}

	
	return 0; 
} 

//Reference: https://www.geeksforgeeks.org/prims-mst-for-adjacency-list-representation-greedy-algo-6/
// https://www.techiedelight.com/graph-implementation-using-stl/


	.file	"tmpxft_0021c0ab_00000000-6_prim_parallel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL20__nv_init_managed_rtv, @function
_ZL20__nv_init_managed_rtv:
.LFB1:
	.cfi_startproc
	movb	_ZL22__nv_inited_managed_rt(%rip), %al
	testb	%al, %al
	jne	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	_ZL32__nv_fatbinhandle_for_managed_rt(%rip), %rdi
	call	__cudaInitModule@PLT
	movb	%al, _ZL22__nv_inited_managed_rt(%rip)
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L4:
	movb	%al, _ZL22__nv_inited_managed_rt(%rip)
	ret
	.cfi_endproc
.LFE1:
	.size	_ZL20__nv_init_managed_rtv, .-_ZL20__nv_init_managed_rtv
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4843:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4843:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z13deleteElementPiii.part.0, @function
_Z13deleteElementPiii.part.0:
.LFB5882:
	.cfi_startproc
	decl	%edx
	movslq	%esi, %rsi
.L10:
	cmpl	%esi, %edx
	jle	.L12
	movl	4(%rdi,%rsi,4), %eax
	movl	%eax, (%rdi,%rsi,4)
	incq	%rsi
	jmp	.L10
.L12:
	ret
	.cfi_endproc
.LFE5882:
	.size	_Z13deleteElementPiii.part.0, .-_Z13deleteElementPiii.part.0
	.align 2
	.type	_ZNSt14_Bit_referenceaSEb.isra.0, @function
_ZNSt14_Bit_referenceaSEb.isra.0:
.LFB5891:
	.cfi_startproc
	movq	(%rdi), %rcx
	movq	8(%rdi), %rdx
	movq	(%rcx), %rax
	testb	%sil, %sil
	je	.L14
	orq	%rdx, %rax
	jmp	.L15
.L14:
	notq	%rdx
	andq	%rdx, %rax
.L15:
	movq	%rax, (%rcx)
	ret
	.cfi_endproc
.LFE5891:
	.size	_ZNSt14_Bit_referenceaSEb.isra.0, .-_ZNSt14_Bit_referenceaSEb.isra.0
	.section	.text._ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev,"axG",@progbits,_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev
	.type	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev, @function
_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev:
.LFB5872:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L16
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L16:
	ret
	.cfi_endproc
.LFE5872:
	.size	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev, .-_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev
	.weak	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED1Ev
	.set	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED1Ev,_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev
	.text
	.type	_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.isra.0, @function
_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.isra.0:
.LFB5895:
	.cfi_startproc
	leaq	-1(%rsi), %rax
	movq	%rdx, %r8
	movl	$2, %r9d
	movl	%ecx, %r11d
	cqto
	idivq	%r9
	movq	%rcx, %rdx
	shrq	$32, %rdx
	movl	%edx, %r10d
.L21:
	cmpq	%r8, %rsi
	jle	.L19
	leaq	(%rdi,%rax,8), %rdx
	cmpl	%r10d, 4(%rdx)
	jg	.L20
	jne	.L19
	cmpl	%r11d, (%rdx)
	jle	.L19
.L20:
	movq	(%rdx), %rdx
	movq	%rdx, (%rdi,%rsi,8)
	leaq	-1(%rax), %rdx
	movq	%rax, %rsi
	movq	%rdx, %rax
	cqto
	idivq	%r9
	jmp	.L21
.L19:
	movq	%rcx, (%rdi,%rsi,8)
	ret
	.cfi_endproc
.LFE5895:
	.size	_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.isra.0, .-_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.isra.0
	.section	.text._ZNSt18_Bit_iterator_base10_M_bump_upEv,"axG",@progbits,_ZNSt18_Bit_iterator_base10_M_bump_upEv,comdat
	.align 2
	.weak	_ZNSt18_Bit_iterator_base10_M_bump_upEv
	.type	_ZNSt18_Bit_iterator_base10_M_bump_upEv, @function
_ZNSt18_Bit_iterator_base10_M_bump_upEv:
.LFB2916:
	.cfi_startproc
	endbr64
	movl	8(%rdi), %eax
	cmpl	$63, %eax
	je	.L23
	incl	%eax
	movl	%eax, 8(%rdi)
	ret
.L23:
	xorl	%eax, %eax
	addq	$8, (%rdi)
	movl	%eax, 8(%rdi)
	ret
	.cfi_endproc
.LFE2916:
	.size	_ZNSt18_Bit_iterator_base10_M_bump_upEv, .-_ZNSt18_Bit_iterator_base10_M_bump_upEv
	.section	.text._ZNSt18_Bit_iterator_base12_M_bump_downEv,"axG",@progbits,_ZNSt18_Bit_iterator_base12_M_bump_downEv,comdat
	.align 2
	.weak	_ZNSt18_Bit_iterator_base12_M_bump_downEv
	.type	_ZNSt18_Bit_iterator_base12_M_bump_downEv, @function
_ZNSt18_Bit_iterator_base12_M_bump_downEv:
.LFB2917:
	.cfi_startproc
	endbr64
	movl	8(%rdi), %eax
	testl	%eax, %eax
	je	.L26
	decl	%eax
	movl	%eax, 8(%rdi)
	ret
.L26:
	subq	$8, (%rdi)
	movl	$63, 8(%rdi)
	ret
	.cfi_endproc
.LFE2917:
	.size	_ZNSt18_Bit_iterator_base12_M_bump_downEv, .-_ZNSt18_Bit_iterator_base12_M_bump_downEv
	.section	.text._ZNSt18_Bit_iterator_base7_M_incrEl,"axG",@progbits,_ZNSt18_Bit_iterator_base7_M_incrEl,comdat
	.align 2
	.weak	_ZNSt18_Bit_iterator_base7_M_incrEl
	.type	_ZNSt18_Bit_iterator_base7_M_incrEl, @function
_ZNSt18_Bit_iterator_base7_M_incrEl:
.LFB2918:
	.cfi_startproc
	endbr64
	movl	8(%rdi), %eax
	movl	$64, %ecx
	addq	%rsi, %rax
	cqto
	idivq	%rcx
	movq	(%rdi), %rcx
	leaq	(%rcx,%rax,8), %rax
	testq	%rdx, %rdx
	jns	.L29
	addq	$64, %rdx
	subq	$8, %rax
.L29:
	movq	%rax, (%rdi)
	movl	%edx, 8(%rdi)
	ret
	.cfi_endproc
.LFE2918:
	.size	_ZNSt18_Bit_iterator_base7_M_incrEl, .-_ZNSt18_Bit_iterator_base7_M_incrEl
	.section	.text._ZStmiRKSt18_Bit_iterator_baseS1_,"axG",@progbits,_ZStmiRKSt18_Bit_iterator_baseS1_,comdat
	.weak	_ZStmiRKSt18_Bit_iterator_baseS1_
	.type	_ZStmiRKSt18_Bit_iterator_baseS1_, @function
_ZStmiRKSt18_Bit_iterator_baseS1_:
.LFB2925:
	.cfi_startproc
	endbr64
	movl	8(%rdi), %edx
	movq	(%rdi), %rax
	subq	(%rsi), %rax
	leaq	(%rdx,%rax,8), %rax
	movl	8(%rsi), %edx
	subq	%rdx, %rax
	ret
	.cfi_endproc
.LFE2925:
	.size	_ZStmiRKSt18_Bit_iterator_baseS1_, .-_ZStmiRKSt18_Bit_iterator_baseS1_
	.section	.text._ZNKSt13_Bit_iteratordeEv,"axG",@progbits,_ZNKSt13_Bit_iteratordeEv,comdat
	.align 2
	.weak	_ZNKSt13_Bit_iteratordeEv
	.type	_ZNKSt13_Bit_iteratordeEv, @function
_ZNKSt13_Bit_iteratordeEv:
.LFB2933:
	.cfi_startproc
	endbr64
	movl	8(%rdi), %ecx
	movl	$1, %edx
	movq	(%rdi), %rax
	salq	%cl, %rdx
	ret
	.cfi_endproc
.LFE2933:
	.size	_ZNKSt13_Bit_iteratordeEv, .-_ZNKSt13_Bit_iteratordeEv
	.section	.text._ZStplRKSt13_Bit_iteratorl,"axG",@progbits,_ZStplRKSt13_Bit_iteratorl,comdat
	.weak	_ZStplRKSt13_Bit_iteratorl
	.type	_ZStplRKSt13_Bit_iteratorl, @function
_ZStplRKSt13_Bit_iteratorl:
.LFB2941:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movups	(%rdi), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movups	%xmm0, 24(%rsp)
	call	_ZNSt18_Bit_iterator_base7_M_incrEl
	movq	24(%rsp), %rax
	movq	32(%rsp), %rdx
	movq	56(%rsp), %rcx
	subq	%fs:40, %rcx
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2941:
	.size	_ZStplRKSt13_Bit_iteratorl, .-_ZStplRKSt13_Bit_iteratorl
	.text
	.align 2
	.type	_ZNSt6vectorIbSaIbEEixEm.isra.0, @function
_ZNSt6vectorIbSaIbEEixEm.isra.0:
.LFB5896:
	.cfi_startproc
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rdi, 8(%rsp)
	leaq	8(%rsp), %rdi
	movl	%eax, 16(%rsp)
	call	_ZStplRKSt13_Bit_iteratorl
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	movq	%rdx, 32(%rsp)
	call	_ZNKSt13_Bit_iteratordeEv
	movq	40(%rsp), %rcx
	subq	%fs:40, %rcx
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5896:
	.size	_ZNSt6vectorIbSaIbEEixEm.isra.0, .-_ZNSt6vectorIbSaIbEEixEm.isra.0
	.section	.text._ZSt14__fill_bvectorPmjjb,"axG",@progbits,_ZSt14__fill_bvectorPmjjb,comdat
	.weak	_ZSt14__fill_bvectorPmjjb
	.type	_ZSt14__fill_bvectorPmjjb, @function
_ZSt14__fill_bvectorPmjjb:
.LFB3057:
	.cfi_startproc
	endbr64
	movl	%ecx, %r8d
	movl	$64, %ecx
	subl	%edx, %ecx
	orq	$-1, %rdx
	movq	%rdx, %rax
	shrq	%cl, %rax
	movl	%esi, %ecx
	salq	%cl, %rdx
	andq	%rdx, %rax
	movq	(%rdi), %rdx
	testb	%r8b, %r8b
	je	.L39
	orq	%rdx, %rax
	jmp	.L40
.L39:
	notq	%rax
	andq	%rdx, %rax
.L40:
	movq	%rax, (%rdi)
	ret
	.cfi_endproc
.LFE3057:
	.size	_ZSt14__fill_bvectorPmjjb, .-_ZSt14__fill_bvectorPmjjb
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB4788:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L47
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L41
	movl	%ebx, %edi
	call	exit@PLT
.L41:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L47:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4788:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Input Graph\n"
.LC2:
	.string	"( %d, %d, %d )"
	.text
	.globl	_Z10printGraphRK5Graph
	.type	_Z10printGraphRK5Graph, @function
_Z10printGraphRK5Graph:
.LFB4818:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movabsq	$-6148914691236517205, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rdx
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
.L51:
	movq	(%r12), %rdx
	movq	8(%r12), %rax
	subq	%rdx, %rax
	sarq	$3, %rax
	imulq	%r13, %rax
	cmpq	%rax, %rbp
	jnb	.L56
	imulq	$24, %rbp, %rax
	leaq	.LC2(%rip), %r15
	addq	%rax, %rdx
	movq	8(%rdx), %r14
	movq	(%rdx), %rbx
.L52:
	cmpq	%rbx, %r14
	je	.L57
	movl	4(%rbx), %ecx
	movl	8(%rbx), %r8d
	movq	%r15, %rsi
	movl	$2, %edi
	movl	(%rbx), %edx
	xorl	%eax, %eax
	addq	$12, %rbx
	call	__printf_chk@PLT
	jmp	.L52
.L57:
	incq	%rbp
	jmp	.L51
.L56:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4818:
	.size	_Z10printGraphRK5Graph, .-_Z10printGraphRK5Graph
	.globl	_Z13deleteElementPiii
	.type	_Z13deleteElementPiii, @function
_Z13deleteElementPiii:
.LFB4819:
	.cfi_startproc
	endbr64
	cmpl	%edx, %esi
	jge	.L58
	jmp	_Z13deleteElementPiii.part.0
.L58:
	ret
	.cfi_endproc
.LFE4819:
	.size	_Z13deleteElementPiii, .-_Z13deleteElementPiii
	.globl	_Z7ifExistPii
	.type	_Z7ifExistPii, @function
_Z7ifExistPii:
.LFB4820:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4820:
	.size	_Z7ifExistPii, .-_Z7ifExistPii
	.globl	_Z10ifExistMWEP6fromToS_
	.type	_Z10ifExistMWEP6fromToS_, @function
_Z10ifExistMWEP6fromToS_:
.LFB4821:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4821:
	.size	_Z10ifExistMWEP6fromToS_, .-_Z10ifExistMWEP6fromToS_
	.globl	_Z17load_kernelArraysRK5Graph
	.type	_Z17load_kernelArraysRK5Graph, @function
_Z17load_kernelArraysRK5Graph:
.LFB4822:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L65:
	movq	(%r12), %rdx
	movq	8(%r12), %rax
	movabsq	$-6148914691236517205, %rcx
	subq	%rdx, %rax
	sarq	$3, %rax
	imulq	%rcx, %rax
	cmpq	%rax, %rbp
	jnb	.L74
	imulq	$24, %rbp, %rax
	leaq	allvertex_in(%rip), %r13
	addq	%rax, %rdx
	movq	8(%rdx), %rax
	movq	(%rdx), %rbx
	movq	%rax, (%rsp)
.L66:
	cmpq	%rbx, (%rsp)
	je	.L75
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	(%rbx), %edx
	movl	4(%rbx), %r15d
	movl	8(%rbx), %r14d
	jne	.L67
	movl	%edx, 12(%rsp)
	call	_ZL20__nv_init_managed_rtv
	movl	12(%rsp), %edx
.L67:
	movq	_ZL8edge_cnt(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movslq	(%rax), %rax
	movl	%edx, 0(%r13,%rax,4)
	jne	.L68
	call	_ZL20__nv_init_managed_rtv
.L68:
	movq	_ZL8edge_cnt(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movslq	(%rax), %rdx
	leaq	alledge_in(%rip), %rax
	movl	%r15d, (%rax,%rdx,4)
	jne	.L69
	call	_ZL20__nv_init_managed_rtv
.L69:
	movq	_ZL8edge_cnt(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movslq	(%rax), %rdx
	leaq	allweight_in(%rip), %rax
	movl	%r14d, (%rax,%rdx,4)
	jne	.L70
	call	_ZL20__nv_init_managed_rtv
.L70:
	movq	_ZL8edge_cnt(%rip), %rax
	addq	$12, %rbx
	incl	(%rax)
	jmp	.L66
.L75:
	incq	%rbp
	jmp	.L65
.L74:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4822:
	.size	_Z17load_kernelArraysRK5Graph, .-_Z17load_kernelArraysRK5Graph
	.globl	_Z7initMWERK5Graph
	.type	_Z7initMWERK5Graph, @function
_Z7initMWERK5Graph:
.LFB4823:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movabsq	$-6148914691236517205, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 64
.L77:
	movq	0(%rbp), %rdx
	movq	8(%rbp), %rax
	subq	%rdx, %rax
	sarq	$3, %rax
	imulq	%r12, %rax
	cmpq	%rax, %rbx
	jnb	.L86
	imulq	$24, %rbx, %rax
	addq	%rax, %rdx
	movq	8(%rdx), %rsi
	movq	(%rdx), %rax
	movl	$2147483647, %edx
.L78:
	cmpq	%rax, %rsi
	je	.L87
	movl	8(%rax), %ecx
	cmpl	%ecx, %edx
	jle	.L79
	movl	(%rax), %r14d
	movl	4(%rax), %r13d
	movl	%ecx, %edx
.L79:
	addq	$12, %rax
	jmp	.L78
.L87:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L81
	call	_ZL20__nv_init_managed_rtv
.L81:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movq	_ZL3mwe(%rip), %r15
	jne	.L82
	call	_ZL20__nv_init_managed_rtv
.L82:
	movq	_ZL9mwe_index(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movslq	(%rax), %rax
	movl	%r14d, (%r15,%rax,8)
	movl	%r13d, 4(%r15,%rax,8)
	jne	.L83
	call	_ZL20__nv_init_managed_rtv
.L83:
	movq	_ZL9mwe_index(%rip), %rax
	incq	%rbx
	incl	(%rax)
	jmp	.L77
.L86:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4823:
	.size	_Z7initMWERK5Graph, .-_Z7initMWERK5Graph
	.section	.rodata.str1.1
.LC3:
	.string	"%d - %d\n"
	.text
	.globl	_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE
	.type	_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE, @function
_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE:
.LFB4825:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC3(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	24(%rdi), %rbx
.L89:
	leaq	8(%rbp), %rax
	cmpq	%rax, %rbx
	je	.L92
	movl	36(%rbx), %ecx
	movl	32(%rbx), %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_ZSt18_Rb_tree_incrementPKSt18_Rb_tree_node_base@PLT
	movq	%rax, %rbx
	jmp	.L89
.L92:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4825:
	.size	_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE, .-_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE
	.globl	_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i
	.type	_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i, @function
_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i:
.LFB4865:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20parallel_processEdgePiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L93:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L95
	call	__stack_chk_fail@PLT
.L95:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4865:
	.size	_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i, .-_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i
	.globl	_Z20parallel_processEdgePiS_S_i
	.type	_Z20parallel_processEdgePiS_S_i, @function
_Z20parallel_processEdgePiS_S_i:
.LFB4866:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i
	.cfi_endproc
.LFE4866:
	.size	_Z20parallel_processEdgePiS_S_i, .-_Z20parallel_processEdgePiS_S_i
	.section	.rodata.str1.1
.LC5:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/manjaripokala/ParallelAlgorithms_Su20/master/TermProject/PrimMST/prim_parallel.cu"
	.text
	.globl	_Z12kernel_setupRK5Graphi
	.type	_Z12kernel_setupRK5Graphi, @function
_Z12kernel_setupRK5Graphi:
.LFB4824:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L99
	call	_ZL20__nv_init_managed_rtv
.L99:
	movq	_ZL8edge_cnt(%rip), %rax
	leaq	.LC5(%rip), %rbx
	cvtsi2ssl	(%rax), %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	leaq	24(%rsp), %rdi
	movl	$3600, %esi
	movss	%xmm0, 12(%rsp)
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$3600, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$3600, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$3600, %edx
	leaq	allvertex_in(%rip), %rsi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$3600, %edx
	leaq	alledge_in(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$270, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$3600, %edx
	leaq	allweight_in(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$271, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movss	12(%rsp), %xmm0
	salq	$9, %rdx
	movl	$1, %ecx
	cvttss2sil	%xmm0, %eax
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L100
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebp, %ecx
	movq	24(%rsp), %rdi
	call	_Z45__device_stub__Z20parallel_processEdgePiS_S_iPiS_S_i
.L100:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$279, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$280, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4824:
	.size	_Z12kernel_setupRK5Graphi, .-_Z12kernel_setupRK5Graphi
	.section	.rodata.str1.1
.LC6:
	.string	"_Z20parallel_processEdgePiS_S_i"
.LC7:
	.string	"parent"
.LC8:
	.string	"dist"
.LC9:
	.string	"fixed"
.LC10:
	.string	"Q"
.LC11:
	.string	"R"
.LC12:
	.string	"T"
.LC13:
	.string	"mwe"
.LC14:
	.string	"z_device"
.LC15:
	.string	"Q_index"
.LC16:
	.string	"R_index"
.LC17:
	.string	"mwe_index"
.LC18:
	.string	"T_index"
.LC19:
	.string	"edge_cnt"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4868:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z20parallel_processEdgePiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	movq	%rax, _ZL32__nv_fatbinhandle_for_managed_rt(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movl	$120, %r9d
	leaq	_ZL6parent(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterManagedVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$120, %r9d
	leaq	_ZL4dist(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$30, %r9d
	leaq	_ZL5fixed(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$120, %r9d
	leaq	_ZL1Q(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$120, %r9d
	leaq	_ZL1R(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$7200, %r9d
	leaq	_ZL1T(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$7200, %r9d
	leaq	_ZL3mwe(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL8z_device(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL7Q_index(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL7R_index(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL9mwe_index(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL7T_index(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4, %r9d
	movq	%rdx, %rcx
	leaq	_ZL8edge_cnt(%rip), %rsi
	call	__cudaRegisterManagedVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4868:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorI4edgeSaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorI4edgeSaIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorI4edgeSaIS0_EED2Ev
	.type	_ZNSt6vectorI4edgeSaIS0_EED2Ev, @function
_ZNSt6vectorI4edgeSaIS0_EED2Ev:
.LFB5238:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L105
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L105:
	ret
	.cfi_endproc
.LFE5238:
	.size	_ZNSt6vectorI4edgeSaIS0_EED2Ev, .-_ZNSt6vectorI4edgeSaIS0_EED2Ev
	.weak	_ZNSt6vectorI4edgeSaIS0_EED1Ev
	.set	_ZNSt6vectorI4edgeSaIS0_EED1Ev,_ZNSt6vectorI4edgeSaIS0_EED2Ev
	.section	.text._ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	.type	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev, @function
_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev:
.LFB5199:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	8(%rdi), %r12
	movq	%rdi, %rbx
	movq	(%rdi), %rbp
.L108:
	cmpq	%rbp, %r12
	je	.L112
	movq	%rbp, %rdi
	addq	$24, %rbp
	call	_ZNSt6vectorI4edgeSaIS0_EED1Ev
	jmp	.L108
.L112:
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.L107
	movq	16(%rbx), %rsi
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	subq	%rdi, %rsi
	jmp	_ZdlPvm@PLT
.L107:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5199:
	.size	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev, .-_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	.weak	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED1Ev
	.set	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED1Ev,_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	.section	.text._ZNKSt6vectorIbSaIbEE4sizeEv,"axG",@progbits,_ZNKSt6vectorIbSaIbEE4sizeEv,comdat
	.align 2
	.weak	_ZNKSt6vectorIbSaIbEE4sizeEv
	.type	_ZNKSt6vectorIbSaIbEE4sizeEv, @function
_ZNKSt6vectorIbSaIbEE4sizeEv:
.LFB5240:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movq	16(%rdi), %rdx
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	movq	(%rdi), %rax
	leaq	24(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movl	%eax, 32(%rsp)
	movl	24(%rdi), %eax
	leaq	8(%rsp), %rdi
	movl	%eax, 16(%rsp)
	call	_ZStmiRKSt18_Bit_iterator_baseS1_
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L114
	call	__stack_chk_fail@PLT
.L114:
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5240:
	.size	_ZNKSt6vectorIbSaIbEE4sizeEv, .-_ZNKSt6vectorIbSaIbEE4sizeEv
	.section	.text._ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv,"axG",@progbits,_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv,comdat
	.align 2
	.weak	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	.type	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv, @function
_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv:
.LFB5390:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	.L116
	movq	32(%rbx), %rsi
	subq	%rdi, %rsi
	call	_ZdlPvm@PLT
	xorl	%eax, %eax
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	%rax, (%rbx)
	movl	%edx, 8(%rbx)
	movq	%rcx, 16(%rbx)
	movl	%esi, 24(%rbx)
	movq	%rdi, 32(%rbx)
.L116:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5390:
	.size	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv, .-_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	.section	.text._ZNSt6vectorIbSaIbEED2Ev,"axG",@progbits,_ZNSt6vectorIbSaIbEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIbSaIbEED2Ev
	.type	_ZNSt6vectorIbSaIbEED2Ev, @function
_ZNSt6vectorIbSaIbEED2Ev:
.LFB5875:
	.cfi_startproc
	endbr64
	jmp	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	.cfi_endproc
.LFE5875:
	.size	_ZNSt6vectorIbSaIbEED2Ev, .-_ZNSt6vectorIbSaIbEED2Ev
	.weak	_ZNSt6vectorIbSaIbEED1Ev
	.set	_ZNSt6vectorIbSaIbEED1Ev,_ZNSt6vectorIbSaIbEED2Ev
	.section	.rodata._ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm.str1.1,"aMS",@progbits,1
.LC20:
	.string	"vector::_M_default_append"
	.section	.text._ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm,comdat
	.align 2
	.weak	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm
	.type	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm, @function
_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm:
.LFB5415:
	.cfi_startproc
	endbr64
	testq	%rsi, %rsi
	je	.L141
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	movabsq	$-6148914691236517205, %rsi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	8(%rdi), %rcx
	movq	16(%rdi), %rax
	movq	(%rdi), %rdx
	subq	%rcx, %rax
	sarq	$3, %rax
	imulq	%rsi, %rax
	cmpq	%rbx, %rax
	jb	.L125
	movq	%rbx, %rdx
	movq	%rcx, %rax
.L126:
	xorl	%r8d, %r8d
	addq	$24, %rax
	movq	%r8, -24(%rax)
	movq	%r8, -16(%rax)
	movq	%r8, -8(%rax)
	decq	%rdx
	jne	.L126
	imulq	$24, %rbx, %rbx
	addq	%rcx, %rbx
	movq	%rbx, 8(%rbp)
	jmp	.L123
.L125:
	movabsq	$384307168202282325, %rax
	movq	%rcx, %r13
	subq	%rdx, %r13
	movq	%r13, %r15
	sarq	$3, %r15
	imulq	%rsi, %r15
	subq	%r15, %rax
	cmpq	%rbx, %rax
	jnb	.L127
	leaq	.LC20(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L127:
	cmpq	%r15, %rbx
	movq	%r15, %r12
	movq	%rcx, 24(%rsp)
	movabsq	$384307168202282325, %rax
	cmovnb	%rbx, %r12
	movq	%rdx, 16(%rsp)
	addq	%r15, %r12
	cmpq	%rax, %r12
	cmova	%rax, %r12
	imulq	$24, %r12, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Znwm@PLT
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	%rbx, %rsi
	movq	%rax, %r14
	leaq	(%rax,%r13), %rax
.L128:
	xorl	%edi, %edi
	addq	$24, %rax
	movq	%rdi, -24(%rax)
	movq	%rdi, -16(%rax)
	movq	%rdi, -8(%rax)
	decq	%rsi
	jne	.L128
	movq	%r14, %r12
	movq	%rdx, %r13
.L129:
	cmpq	%r13, %rcx
	je	.L144
	movq	0(%r13), %rsi
	xorl	%eax, %eax
	movq	%r13, %rdi
	movq	%rcx, 24(%rsp)
	movq	%rax, 0(%r13)
	addq	$24, %r12
	addq	$24, %r13
	movq	%rsi, -24(%r12)
	movq	-16(%r13), %rsi
	movq	%rax, -16(%r13)
	movq	%rsi, -16(%r12)
	movq	-8(%r13), %rsi
	movq	%rax, -8(%r13)
	movq	%rsi, -8(%r12)
	movq	%rdx, 16(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EED1Ev
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	jmp	.L129
.L144:
	testq	%rdx, %rdx
	je	.L131
	movq	16(%rbp), %rsi
	movq	%rdx, %rdi
	subq	%rdx, %rsi
	call	_ZdlPvm@PLT
.L131:
	addq	%r15, %rbx
	movq	8(%rsp), %rax
	movq	%r14, 0(%rbp)
	imulq	$24, %rbx, %rbx
	addq	%r14, %rbx
	addq	%rax, %r14
	movq	%rbx, 8(%rbp)
	movq	%r14, 16(%rbp)
.L123:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L141:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	.cfi_restore 15
	ret
	.cfi_endproc
.LFE5415:
	.size	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm, .-_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm
	.section	.rodata._ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_.str1.1,"aMS",@progbits,1
.LC21:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.type	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, @function
_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_:
.LFB5583:
	.cfi_startproc
	endbr64
	movabsq	$-6148914691236517205, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbp
	movq	(%rdi), %r15
	movq	%rsi, (%rsp)
	movabsq	$768614336404564650, %rsi
	movq	%rbp, %rbx
	subq	%r15, %rbx
	sarq	$2, %rbx
	imulq	%rax, %rbx
	cmpq	%rsi, %rbx
	jne	.L146
	leaq	.LC21(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L146:
	cmpq	%r15, %rbp
	movl	$1, %eax
	movq	(%rsp), %r12
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	addq	%rax, %rbx
	setc	%al
	subq	%r15, %r12
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L156
	xorl	%r14d, %r14d
	testq	%rbx, %rbx
	je	.L151
	movabsq	$768614336404564650, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L150
.L156:
	movq	%rsi, %rbx
.L150:
	imulq	$12, %rbx, %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r14
.L151:
	movq	(%rdx), %rax
	movq	%rax, (%r14,%r12)
	movl	8(%rdx), %eax
	movl	%eax, 8(%r14,%r12)
	testq	%r12, %r12
	jle	.L152
	movq	%r12, %rdx
	movq	%r15, %rsi
	movq	%r14, %rdi
	call	memmove@PLT
.L152:
	movq	(%rsp), %rcx
	leaq	12(%r14,%r12), %rax
	subq	%rcx, %rbp
	testq	%rbp, %rbp
	jle	.L153
	movq	%rcx, %rsi
	movq	%rax, %rdi
	movq	%rbp, %rcx
	rep movsb
.L153:
	addq	%rax, %rbp
	testq	%r15, %r15
	je	.L154
	movq	16(%r13), %rsi
	movq	%r15, %rdi
	subq	%r15, %rsi
	call	_ZdlPvm@PLT
.L154:
	imulq	$12, %rbx, %rax
	movq	%r14, 0(%r13)
	movq	%rbp, 8(%r13)
	leaq	(%r14,%rax), %rbx
	movq	%rbx, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5583:
	.size	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .-_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.text
	.align 2
	.type	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0, @function
_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0:
.LFB5916:
	.cfi_startproc
	movq	%rsi, %rdx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.L164
	movq	(%rdx), %rax
	addq	$12, %rsi
	movq	%rax, -12(%rsi)
	movl	8(%rdx), %eax
	movl	%eax, -4(%rsi)
	movq	%rsi, 8(%rdi)
	ret
.L164:
	jmp	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
.LFE5916:
	.size	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0, .-_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	.section	.text._ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_,"axG",@progbits,_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_,comdat
	.weak	_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_
	.type	_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_, @function
_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_:
.LFB5689:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r8, %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%rcx, 8(%rsp)
	movl	8(%rsp), %r14d
	movq	%rdx, (%rsp)
	cmpq	%rdi, %rdx
	je	.L168
	movzbl	(%r8), %r12d
	movq	%rdi, %r9
	testl	%esi, %esi
	je	.L169
	leaq	8(%rdi), %r13
	movl	%r12d, %ecx
	movl	$64, %edx
	call	_ZSt14__fill_bvectorPmjjb
	movq	%r13, %r9
.L169:
	movq	%rbp, %rcx
	movl	%r12d, %eax
	movq	%r9, %rdi
	subq	%r9, %rcx
	negl	%eax
	rep stosb
	testl	%r14d, %r14d
	je	.L167
	movzbl	(%rbx), %ecx
	movl	%r14d, %edx
	xorl	%esi, %esi
	jmp	.L177
.L168:
	cmpl	%esi, %r14d
	je	.L167
	movzbl	(%r8), %ecx
	movl	%r14d, %edx
.L177:
	addq	$32, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 48
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZSt14__fill_bvectorPmjjb
.L167:
	.cfi_restore_state
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5689:
	.size	_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_, .-_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_
	.section	.rodata._ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb.str1.1,"aMS",@progbits,1
.LC22:
	.string	"vector<bool>::_M_fill_insert"
	.section	.text._ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb,"axG",@progbits,_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb,comdat
	.align 2
	.weak	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb
	.type	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb, @function
_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb:
.LFB5579:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%rsi, 48(%rsp)
	movq	%rdx, 56(%rsp)
	movb	%r8b, 44(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	testq	%rcx, %rcx
	je	.L178
	movq	(%rdi), %rax
	movq	%rsi, %r12
	xorl	%esi, %esi
	movq	%rdi, %rbx
	movl	%esi, 176(%rsp)
	movq	%rcx, %rbp
	movq	%rax, 168(%rsp)
	movq	32(%rdi), %rax
	xorl	%edi, %edi
	movl	%edi, 160(%rsp)
	movq	%rax, 152(%rsp)
	leaq	168(%rsp), %rax
	movq	%rax, 16(%rsp)
	leaq	152(%rsp), %rax
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_ZStmiRKSt18_Bit_iterator_baseS1_
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	_ZNKSt6vectorIbSaIbEE4sizeEv
	leaq	120(%rsp), %rcx
	subq	%rax, %r13
	movq	%rcx, 8(%rsp)
	leaq	136(%rsp), %rcx
	cmpq	%rbp, %r13
	movq	%rcx, 24(%rsp)
	jb	.L180
	leaq	16(%rbx), %r13
	movq	%rbp, %rsi
	movq	%r13, %rdi
	call	_ZStplRKSt13_Bit_iteratorl
	movl	56(%rsp), %esi
	movq	16(%rbx), %rcx
	movq	%r12, 120(%rsp)
	movq	%rdx, 80(%rsp)
	movq	24(%rsp), %rdi
	movl	24(%rbx), %edx
	movq	%rax, 72(%rsp)
	movl	%esi, 128(%rsp)
	movq	8(%rsp), %rsi
	movq	%rax, 152(%rsp)
	movl	80(%rsp), %eax
	movq	%rcx, 136(%rsp)
	movl	%edx, 144(%rsp)
	movl	%eax, 160(%rsp)
	call	_ZStmiRKSt18_Bit_iterator_baseS1_
	movq	%rax, %rbx
.L181:
	testq	%rbx, %rbx
	jle	.L201
	movq	24(%rsp), %rdi
	call	_ZNSt18_Bit_iterator_base12_M_bump_downEv
	movq	24(%rsp), %rdi
	call	_ZNKSt13_Bit_iteratordeEv
	movq	(%rsp), %rdi
	movq	%rax, %r14
	movq	%rdx, %r12
	call	_ZNSt18_Bit_iterator_base12_M_bump_downEv
	movq	(%rsp), %rdi
	call	_ZNKSt13_Bit_iteratordeEv
	xorl	%esi, %esi
	movq	16(%rsp), %rdi
	andq	(%r14), %r12
	setne	%sil
	movq	%rax, 168(%rsp)
	decq	%rbx
	movq	%rdx, 176(%rsp)
	call	_ZNSt14_Bit_referenceaSEb.isra.0
	jmp	.L181
.L201:
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	call	_ZStplRKSt13_Bit_iteratorl
	movq	48(%rsp), %rdi
	movq	56(%rsp), %rsi
	leaq	44(%rsp), %r8
	movq	%rdx, 176(%rsp)
	movq	%rdx, %rcx
	movq	%rax, %rdx
	movq	%rax, 168(%rsp)
	call	_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_
	movq	%rbp, %rsi
	movq	%r13, %rdi
	call	_ZNSt18_Bit_iterator_base7_M_incrEl
	jmp	.L178
.L180:
	movabsq	$9223372036854775744, %rdx
	movq	%rdx, %rcx
	subq	%rax, %rcx
	cmpq	%rbp, %rcx
	jnb	.L183
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L200
	leaq	.LC22(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L183:
	cmpq	%rbp, %rax
	movq	%rbp, %rcx
	cmovnb	%rax, %rcx
	addq	%rcx, %rax
	jc	.L187
	movabsq	$9223372036854775744, %rdx
	cmpq	%rdx, %rax
	cmovbe	%rax, %rdx
.L187:
	addq	$63, %rdx
	shrq	$6, %rdx
	leaq	0(,%rdx,8), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	_Znwm@PLT
	movq	48(%rsp), %r14
	movq	(%rbx), %rsi
	movl	56(%rsp), %r15d
	movq	%rax, %r12
	movq	%r14, %r13
	subq	%rsi, %r13
	cmpq	$8, %r13
	jle	.L188
	movq	%r13, %rdx
	movq	%rax, %rdi
	call	memmove@PLT
	jmp	.L189
.L188:
	jne	.L189
	movq	(%rsi), %rax
	movq	%rax, (%r12)
.L189:
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	xorl	%edx, %edx
	addq	%r12, %r13
	xorl	%ecx, %ecx
	movq	%r13, 152(%rsp)
	movq	%r14, 120(%rsp)
	movl	%edx, 128(%rsp)
	movq	%r14, 136(%rsp)
	movl	%r15d, 144(%rsp)
	movl	%ecx, 160(%rsp)
	call	_ZStmiRKSt18_Bit_iterator_baseS1_
	movq	%rax, %r13
.L190:
	testq	%r13, %r13
	jle	.L202
	movq	120(%rsp), %rdx
	movl	$1, %eax
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	movl	128(%rsp), %ecx
	salq	%cl, %rax
	andq	(%rdx), %rax
	setne	%sil
	decq	%r13
	movl	%esi, 24(%rsp)
	call	_ZNKSt13_Bit_iteratordeEv
	movl	24(%rsp), %esi
	movq	16(%rsp), %rdi
	movq	%rax, 168(%rsp)
	movq	%rdx, 176(%rsp)
	call	_ZNSt14_Bit_referenceaSEb.isra.0
	movq	8(%rsp), %rdi
	call	_ZNSt18_Bit_iterator_base10_M_bump_upEv
	movq	(%rsp), %rdi
	call	_ZNSt18_Bit_iterator_base10_M_bump_upEv
	jmp	.L190
.L202:
	movl	160(%rsp), %eax
	movq	152(%rsp), %r13
	movq	%rbp, %rsi
	movl	%eax, 80(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	movq	%r13, 72(%rsp)
	call	_ZStplRKSt13_Bit_iteratorl
	movq	80(%rsp), %rsi
	leaq	44(%rsp), %r8
	movq	%r13, %rdi
	movq	%rdx, %rcx
	movq	%rdx, 96(%rsp)
	movq	%rax, %rdx
	movq	%rax, 88(%rsp)
	call	_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	_ZStplRKSt13_Bit_iteratorl
	movq	16(%rbx), %rcx
	movq	8(%rsp), %rsi
	leaq	136(%rsp), %rdi
	movq	%rdx, 112(%rsp)
	movl	24(%rbx), %edx
	movq	%rax, 104(%rsp)
	movq	%rax, 152(%rsp)
	movl	112(%rsp), %eax
	movq	%r14, 120(%rsp)
	movl	%r15d, 128(%rsp)
	movq	%rcx, 136(%rsp)
	movl	%edx, 144(%rsp)
	movl	%eax, 160(%rsp)
	call	_ZStmiRKSt18_Bit_iterator_baseS1_
	movq	%rax, %rbp
.L192:
	testq	%rbp, %rbp
	jle	.L203
	movq	8(%rsp), %rdi
	call	_ZNKSt13_Bit_iteratordeEv
	movq	(%rsp), %rdi
	movq	%rax, %r14
	movq	%rdx, %r13
	call	_ZNKSt13_Bit_iteratordeEv
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	andq	(%r14), %r13
	setne	%sil
	movq	%rax, 168(%rsp)
	decq	%rbp
	movq	%rdx, 176(%rsp)
	call	_ZNSt14_Bit_referenceaSEb.isra.0
	movq	8(%rsp), %rdi
	call	_ZNSt18_Bit_iterator_base10_M_bump_upEv
	movq	(%rsp), %rdi
	call	_ZNSt18_Bit_iterator_base10_M_bump_upEv
	jmp	.L192
.L203:
	movq	152(%rsp), %rax
	movq	%rbx, %rdi
	movq	%rax, 168(%rsp)
	movl	160(%rsp), %eax
	movl	%eax, 176(%rsp)
	call	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	movq	32(%rsp), %rax
	movq	%r12, (%rbx)
	addq	%r12, %rax
	movq	%rax, 32(%rbx)
	xorl	%eax, %eax
	movl	%eax, 8(%rbx)
	movq	168(%rsp), %rax
	movq	%rax, 16(%rbx)
	movl	176(%rsp), %eax
	movl	%eax, 24(%rbx)
.L178:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L194
.L200:
	call	__stack_chk_fail@PLT
.L194:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5579:
	.size	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb, .-_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb
	.section	.text._ZNSt6vectorIbSaIbEE6resizeEmb,"axG",@progbits,_ZNSt6vectorIbSaIbEE6resizeEmb,comdat
	.align 2
	.weak	_ZNSt6vectorIbSaIbEE6resizeEmb
	.type	_ZNSt6vectorIbSaIbEE6resizeEmb, @function
_ZNSt6vectorIbSaIbEE6resizeEmb:
.LFB5202:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_ZNKSt6vectorIbSaIbEE4sizeEv
	cmpq	%rax, %rbp
	jnb	.L205
	movq	(%rbx), %rax
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movl	%eax, 48(%rsp)
	call	_ZStplRKSt13_Bit_iteratorl
	movq	%rax, 8(%rsp)
	movq	%rdx, 16(%rsp)
	movq	%rax, 16(%rbx)
	movl	16(%rsp), %eax
	movl	%eax, 24(%rbx)
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L208
	jmp	.L209
.L205:
	movl	24(%rbx), %edx
	movq	16(%rbx), %rsi
	movl	%edx, 48(%rsp)
	movq	%rsi, 40(%rsp)
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	jne	.L209
	movq	%rbp, %rcx
	movq	48(%rsp), %rdx
	addq	$64, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	movzbl	%r12b, %r8d
	movq	%rbx, %rdi
	subq	%rax, %rcx
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb
.L209:
	.cfi_restore_state
	call	__stack_chk_fail@PLT
.L208:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5202:
	.size	_ZNSt6vectorIbSaIbEE6resizeEmb, .-_ZNSt6vectorIbSaIbEE6resizeEmb
	.section	.text._ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,"axG",@progbits,_ZN5GraphC5ERKSt6vectorI4edgeSaIS1_EEi,comdat
	.align 2
	.weak	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
	.type	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi, @function
_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi:
.LFB4816:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4816
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%edx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, (%rdi)
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	testq	%rbp, %rbp
	jne	.L212
.L214:
	leaq	nonEmptyIndices(%rip), %r14
	xorl	%edx, %edx
	movq	%rbp, %rsi
	movq	%r14, %rdi
.LEHB0:
	call	_ZNSt6vectorIbSaIbEE6resizeEmb
	movq	8(%r12), %rax
	movq	(%r12), %rbp
	movq	%rax, 24(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, (%rsp)
	jmp	.L215
.L212:
	movq	%rbp, %rsi
	call	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm
	jmp	.L214
.L216:
	movslq	0(%rbp), %rax
	movl	4(%rbp), %r13d
	movl	8(%rbp), %r15d
	movq	(%rsp), %rsi
	imulq	$24, %rax, %rdi
	addq	(%rbx), %rdi
	movq	%rax, 8(%rsp)
	movq	%rax, %r12
	movl	%eax, 40(%rsp)
	movl	%r13d, 44(%rsp)
	movl	%r15d, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movslq	%r13d, %rax
	movq	(%rsp), %rsi
	movl	%r13d, 40(%rsp)
	imulq	$24, %rax, %rdi
	addq	(%rbx), %rdi
	movq	%rax, 16(%rsp)
	movl	%r12d, 44(%rsp)
	movl	%r15d, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
.LEHE0:
	movq	(%r14), %r12
	movq	8(%rsp), %rsi
	addq	$12, %rbp
	movq	%r12, %rdi
	call	_ZNSt6vectorIbSaIbEEixEm.isra.0
	movq	(%rsp), %rdi
	movl	$1, %esi
	movq	%rax, 40(%rsp)
	movq	%rdx, 48(%rsp)
	call	_ZNSt14_Bit_referenceaSEb.isra.0
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	call	_ZNSt6vectorIbSaIbEEixEm.isra.0
	movq	(%rsp), %rdi
	movl	$1, %esi
	movq	%rax, 40(%rsp)
	movq	%rdx, 48(%rsp)
	call	_ZNSt14_Bit_referenceaSEb.isra.0
.L215:
	cmpq	%rbp, 24(%rsp)
	jne	.L216
	jmp	.L225
.L220:
	endbr64
	movq	%rax, %rbp
.L217:
	movq	%rbx, %rdi
	call	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED1Ev
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L224
	movq	%rbp, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L225:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L219
.L224:
	call	__stack_chk_fail@PLT
.L219:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4816:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,"aG",@progbits,_ZN5GraphC5ERKSt6vectorI4edgeSaIS1_EEi,comdat
.LLSDA4816:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4816-.LLSDACSB4816
.LLSDACSB4816:
	.uleb128 .LEHB0-.LFB4816
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L220-.LFB4816
	.uleb128 0
	.uleb128 .LEHB1-.LFB4816
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE4816:
	.section	.text._ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,"axG",@progbits,_ZN5GraphC5ERKSt6vectorI4edgeSaIS1_EEi,comdat
	.size	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi, .-_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
	.weak	_ZN5GraphC1ERKSt6vectorI4edgeSaIS1_EEi
	.set	_ZN5GraphC1ERKSt6vectorI4edgeSaIS1_EEi,_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
	.section	.text._ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.type	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, @function
_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_:
.LFB5711:
	.cfi_startproc
	endbr64
	movabsq	$1152921504606846975, %rcx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	subq	%r14, %rbx
	sarq	$3, %rbx
	cmpq	%rcx, %rbx
	jne	.L227
	leaq	.LC21(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L227:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rsi, %r15
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	movq	%rsi, %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L237
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	.L232
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L231
.L237:
	movq	%rcx, %rbx
.L231:
	leaq	0(,%rbx,8), %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r12
.L232:
	movq	(%rdx), %rax
	movq	%rax, (%r12,%r15)
	testq	%r15, %r15
	jle	.L233
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L233:
	movq	(%rsp), %rax
	leaq	8(%r12,%r15), %rdx
	subq	%rbp, %rax
	testq	%rax, %rax
	jle	.L234
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%rax, %rcx
	rep movsb
.L234:
	leaq	(%rdx,%rax), %rbp
	testq	%r14, %r14
	je	.L235
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L235:
	leaq	(%r12,%rbx,8), %rax
	movq	%r12, 0(%r13)
	movq	%rbp, 8(%r13)
	movq	%rax, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5711:
	.size	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .-_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.section	.text._ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_,"axG",@progbits,_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_,comdat
	.align 2
	.weak	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	.type	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_, @function
_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_:
.LFB5225:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.L245
	movq	(%rdx), %rax
	addq	$8, %rsi
	movq	%rax, -8(%rsi)
	movq	%rsi, 8(%rdi)
	jmp	.L246
.L245:
	call	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.L246:
	movq	8(%rbx), %rsi
	movq	(%rbx), %rdi
	xorl	%edx, %edx
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	-8(%rsi), %rcx
	subq	%rdi, %rsi
	sarq	$3, %rsi
	decq	%rsi
	jmp	_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.isra.0
	.cfi_endproc
.LFE5225:
	.size	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_, .-_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	.section	.rodata.str1.1
.LC23:
	.string	"Popped minimum distance node:%d\n"
.LC24:
	.string	"Popped node is not fixed adding it to R\n"
.LC25:
	.string	"Calling kernel for processing edges of elements in R in parallel\n"
.LC26:
	.string	"Adding all elements from Q to Heap H\n"
	.text
	.globl	_Z7primMSTRK5Graphii
	.type	_Z7primMSTRK5Graphii, @function
_Z7primMSTRK5Graphii:
.LFB4826:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
.L249:
	movb	_ZL22__nv_inited_managed_rt(%rip), %al
	cmpl	%r13d, %r12d
	jge	.L303
	testb	%al, %al
	jne	.L250
	call	_ZL20__nv_init_managed_rtv
.L250:
	movq	_ZL6parent(%rip), %rax
	movslq	%r12d, %r14
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	$-1, (%rax,%r14,4)
	jne	.L251
	call	_ZL20__nv_init_managed_rtv
.L251:
	movq	_ZL4dist(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	$2147483647, (%rax,%r14,4)
	jne	.L252
	call	_ZL20__nv_init_managed_rtv
.L252:
	movq	_ZL5fixed(%rip), %rax
	incl	%r12d
	movb	$0, (%rax,%r14)
	jmp	.L249
.L303:
	testb	%al, %al
	jne	.L254
	call	_ZL20__nv_init_managed_rtv
.L254:
	movq	_ZL4dist(%rip), %rax
	xorl	%ecx, %ecx
	movslq	%ebp, %rdx
	movl	%ebp, 16(%rsp)
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	%ecx, (%rax,%rdx,4)
	jne	.L255
	call	_ZL20__nv_init_managed_rtv
.L255:
	movq	_ZL4dist(%rip), %rax
	leaq	16(%rsp), %rsi
	leaq	H(%rip), %rdi
	xorl	%r13d, %r13d
	movabsq	$-6148914691236517205, %r15
	movl	(%rax), %eax
	movl	%eax, 20(%rsp)
	call	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	movq	%rbx, %rdi
	call	_Z7initMWERK5Graph
.L256:
	movq	8(%rbx), %rax
	subq	(%rbx), %rax
	sarq	$3, %rax
	imulq	%r15, %rax
	cmpq	%rax, %r13
	jnb	.L304
	movq	8+H(%rip), %rax
	movq	H(%rip), %rdi
	movq	%rax, %rdx
	movl	(%rdi), %ebp
	leaq	-8(%rax), %r12
	subq	%rdi, %rdx
	cmpq	$8, %rdx
	jle	.L257
	movq	%r12, %rcx
	movq	(%rdi), %rdx
	movq	-8(%rax), %r8
	movl	$2, %esi
	subq	%rdi, %rcx
	sarq	$3, %rcx
	movq	%rdx, -8(%rax)
	leaq	-1(%rcx), %rax
	cqto
	idivq	%rsi
	xorl	%esi, %esi
.L258:
	cmpq	%rax, %rsi
	jge	.L305
	leaq	1(%rsi), %rdx
	addq	%rdx, %rdx
	leaq	-1(%rdx), %r9
	leaq	(%rdi,%rdx,8), %r11
	leaq	(%rdi,%r9,8), %r10
	movl	4(%r10), %r14d
	cmpl	%r14d, 4(%r11)
	jg	.L259
	jne	.L299
	movl	(%r10), %r10d
	cmpl	%r10d, (%r11)
	cmovle	%rdx, %r9
	jmp	.L259
.L299:
	movq	%rdx, %r9
.L259:
	movq	(%rdi,%r9,8), %rdx
	movq	%rdx, (%rdi,%rsi,8)
	movq	%r9, %rsi
	jmp	.L258
.L305:
	testb	$1, %cl
	jne	.L261
	leaq	-2(%rcx), %rax
	movl	$2, %ecx
	cqto
	idivq	%rcx
	cmpq	%rax, %rsi
	jne	.L261
	leaq	(%rsi,%rsi), %rax
	incq	%rax
	movq	(%rdi,%rax,8), %rdx
	movq	%rdx, (%rdi,%rsi,8)
	movq	%rax, %rsi
.L261:
	movq	%r8, %rcx
	xorl	%edx, %edx
	call	_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.isra.0
.L257:
	xorl	%eax, %eax
	movl	%ebp, %edx
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	movq	%r12, 8+H(%rip)
	call	__printf_chk@PLT
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L262
	call	_ZL20__nv_init_managed_rtv
.L262:
	movq	_ZL5fixed(%rip), %rax
	movslq	%ebp, %r12
	cmpb	$0, (%rax,%r12)
	je	.L263
.L291:
	incq	%r13
	jmp	.L256
.L263:
	xorl	%eax, %eax
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L264
	call	_ZL20__nv_init_managed_rtv
.L264:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movq	_ZL1R(%rip), %r14
	jne	.L265
	call	_ZL20__nv_init_managed_rtv
.L265:
	movq	_ZL7R_index(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movslq	(%rax), %rax
	movl	%ebp, (%r14,%rax,4)
	jne	.L266
	call	_ZL20__nv_init_managed_rtv
.L266:
	movq	_ZL7R_index(%rip), %rax
	incl	(%rax)
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L267
	call	_ZL20__nv_init_managed_rtv
.L267:
	movq	_ZL5fixed(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movb	$1, (%rax,%r12)
	jne	.L268
	call	_ZL20__nv_init_managed_rtv
.L268:
	movq	_ZL6parent(%rip), %rax
	cmpl	$-1, (%rax,%r12,4)
	je	.L269
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L270
	call	_ZL20__nv_init_managed_rtv
.L270:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movq	_ZL1T(%rip), %r14
	jne	.L271
	call	_ZL20__nv_init_managed_rtv
.L271:
	movq	_ZL7T_index(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	(%rax), %eax
	movl	%eax, 12(%rsp)
	jne	.L272
	call	_ZL20__nv_init_managed_rtv
.L272:
	movq	_ZL6parent(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	(%rax,%r12,4), %edx
	movslq	12(%rsp), %rax
	movl	%ebp, (%r14,%rax,8)
	movl	%edx, 4(%r14,%rax,8)
	jne	.L273
	call	_ZL20__nv_init_managed_rtv
.L273:
	movq	_ZL7T_index(%rip), %rax
	incl	(%rax)
.L269:
	leaq	.LC25(%rip), %rbp
.L274:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L280
	call	_ZL20__nv_init_managed_rtv
.L280:
	movq	_ZL7R_index(%rip), %rax
	movb	_ZL22__nv_inited_managed_rt(%rip), %dl
	cmpl	$0, (%rax)
	je	.L306
	testb	%dl, %dl
	jne	.L275
	call	_ZL20__nv_init_managed_rtv
.L275:
	movq	_ZL1R(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	(%rax), %r12d
	jne	.L276
	call	_ZL20__nv_init_managed_rtv
.L276:
	movq	_ZL8z_device(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	%r12d, (%rax)
	jne	.L277
	call	_ZL20__nv_init_managed_rtv
.L277:
	movq	_ZL1R(%rip), %rdi
	xorl	%esi, %esi
	movl	$30, %edx
	call	_Z13deleteElementPiii.part.0
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L278
	call	_ZL20__nv_init_managed_rtv
.L278:
	movq	_ZL7R_index(%rip), %rax
	movq	%rbp, %rsi
	movl	$2, %edi
	decl	(%rax)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L279
	call	_ZL20__nv_init_managed_rtv
.L279:
	movq	_ZL8z_device(%rip), %rax
	movq	%rbx, %rdi
	movl	(%rax), %esi
	call	_Z12kernel_setupRK5Graphi
	jmp	.L274
.L306:
	leaq	.LC26(%rip), %r14
.L287:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L289
	call	_ZL20__nv_init_managed_rtv
.L289:
	movq	_ZL7Q_index(%rip), %rax
	cmpl	$0, (%rax)
	je	.L291
	xorl	%eax, %eax
	movq	%r14, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L283
	call	_ZL20__nv_init_managed_rtv
.L283:
	movq	_ZL1Q(%rip), %rax
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	(%rax), %r12d
	jne	.L284
	call	_ZL20__nv_init_managed_rtv
.L284:
	movq	_ZL1Q(%rip), %rdi
	xorl	%esi, %esi
	movl	$30, %edx
	call	_Z13deleteElementPiii.part.0
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L285
	call	_ZL20__nv_init_managed_rtv
.L285:
	movq	_ZL7Q_index(%rip), %rax
	decl	(%rax)
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L286
	call	_ZL20__nv_init_managed_rtv
.L286:
	movq	_ZL5fixed(%rip), %rax
	movslq	%r12d, %rbp
	cmpb	$0, (%rax,%rbp)
	jne	.L287
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	movl	%r12d, 16(%rsp)
	jne	.L288
	call	_ZL20__nv_init_managed_rtv
.L288:
	movq	_ZL4dist(%rip), %rax
	leaq	16(%rsp), %rsi
	leaq	H(%rip), %rdi
	movl	(%rax,%rbp,4), %eax
	movl	%eax, 20(%rsp)
	call	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	jmp	.L287
.L304:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L293
	call	_ZL20__nv_init_managed_rtv
.L293:
	movq	_ZL7T_index(%rip), %rax
	movabsq	$-6148914691236517205, %rcx
	movslq	(%rax), %rdx
	movq	8(%rbx), %rax
	subq	(%rbx), %rax
	sarq	$3, %rax
	imulq	%rcx, %rax
	decq	%rax
	cmpq	%rax, %rdx
	jne	.L294
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	jne	.L295
	call	_ZL20__nv_init_managed_rtv
.L295:
	movq	_ZL1T(%rip), %rax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L298
	jmp	.L301
.L294:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L301
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$240, %edi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Znam@PLT
.L301:
	.cfi_restore_state
	call	__stack_chk_fail@PLT
.L298:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4826:
	.size	_Z7primMSTRK5Graphii, .-_Z7primMSTRK5Graphii
	.section	.rodata.str1.1
.LC27:
	.string	"2010_Alaskan.txt\n"
.LC28:
	.string	"Parallel Elpased Time in ms:%f\n"
.LC29:
	.string	"\n====================================\n"
.LC30:
	.string	"Minimum Spanning Tree using Prim \n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4827:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4827
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rbp
	leaq	24(%rsp), %rbx
.LEHB2:
	call	__printf_chk@PLT
.LEHE2:
	xorl	%eax, %eax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	movl	$1, %eax
	salq	$32, %rax
	movl	$866, 56(%rsp)
	movq	%rax, 48(%rsp)
.LEHB3:
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movl	$1, %eax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$187, 56(%rsp)
	salq	$33, %rax
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movl	$3, %eax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$399, 56(%rsp)
	salq	$32, %rax
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$21474836481, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$605, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$42949672961, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1720, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640257, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$888, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$51539607553, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$409, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movl	$2147483649, %eax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$739, 56(%rsp)
	addq	%rax, %rax
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$12884901890, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$213, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$17179869186, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$541, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$21474836482, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$759, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$25769803778, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1416, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$30064771074, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1391, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$34359738370, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$2474, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$38654705666, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$2586, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$42949672962, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$2421, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640258, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1625, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$51539607554, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$765, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$17179869187, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$330, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$21474836483, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$547, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$51539607555, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$561, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$21474836484, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$226, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$25769803780, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$912, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$25769803781, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$689, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$30064771077, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$731, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640261, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1199, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$51539607557, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$213, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$30064771078, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$224, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$34359738374, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1378, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$34359738375, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1234, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640263, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$641, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$51539607559, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$631, 56(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rbx, %r12
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$38654705672, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$337, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640264, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$861, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$42949672969, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$678, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640265, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$967, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$47244640266, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1024, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movabsq	$51539607563, %rax
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movl	$1013, 56(%rsp)
	movq	%rax, 48(%rsp)
	call	_ZNSt6vectorI4edgeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_.isra.0
	movl	$30, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_ZN5GraphC1ERKSt6vectorI4edgeSaIS1_EEi
.LEHE3:
	movq	%rbp, %rdi
.LEHB4:
	call	_Z17load_kernelArraysRK5Graph
	movq	%rbp, %rdi
	call	_Z10printGraphRK5Graph
	xorl	%r13d, %r13d
	leaq	nonEmptyIndices(%rip), %r15
.L308:
	movq	%r15, %rdi
	call	_ZNKSt6vectorIbSaIbEE4sizeEv
	cmpq	%rax, %r13
	jnb	.L309
	movq	(%r15), %rdi
	movq	%r13, %rsi
	call	_ZNSt6vectorIbSaIbEEixEm.isra.0
	andq	(%rax), %rdx
	leaq	1(%r13), %rax
	je	.L324
	movl	%r13d, %r14d
	jmp	.L309
.L324:
	movq	%rax, %r13
	jmp	.L308
.L309:
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r14d, %edx
	movl	$30, %esi
	movq	%rbp, %rdi
	call	_Z7primMSTRK5Graphii
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC29(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC30(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r13d, %r13d
	leaq	.LC3(%rip), %r14
.L311:
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	je	.L315
.L318:
	movq	_ZL7T_index(%rip), %rax
	cmpl	%r13d, (%rax)
	jle	.L334
	cmpb	$0, _ZL22__nv_inited_managed_rt(%rip)
	je	.L312
.L314:
	movq	_ZL1T(%rip), %rax
	movslq	%r13d, %rdx
	movq	%r14, %rsi
	movl	$2, %edi
	movl	4(%rax,%rdx,8), %ecx
	movl	(%rax,%rdx,8), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	incl	%r13d
	jmp	.L311
.L312:
	call	_ZL20__nv_init_managed_rtv
	jmp	.L314
.L315:
	call	_ZL20__nv_init_managed_rtv
.LEHE4:
	jmp	.L318
.L334:
	movq	%rbp, %rdi
	call	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorI4edgeSaIS0_EED1Ev
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L322
	jmp	.L332
.L327:
	endbr64
	movq	%rax, %r12
.L319:
	movq	%rbp, %rdi
	call	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED1Ev
	jmp	.L320
.L326:
	endbr64
	movq	%rax, %r12
.L320:
	movq	%rbx, %rdi
	call	_ZNSt6vectorI4edgeSaIS0_EED1Ev
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L332
	movq	%r12, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L332:
	call	__stack_chk_fail@PLT
.L322:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4827:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4827:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4827-.LLSDACSB4827
.LLSDACSB4827:
	.uleb128 .LEHB2-.LFB4827
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB4827
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L326-.LFB4827
	.uleb128 0
	.uleb128 .LEHB4-.LFB4827
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L327-.LFB4827
	.uleb128 0
	.uleb128 .LEHB5-.LFB4827
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE4827:
	.section	.text.startup
	.size	main, .-main
	.type	_GLOBAL__sub_I_nonEmptyIndices, @function
_GLOBAL__sub_I_nonEmptyIndices:
.LFB5877:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	__dso_handle(%rip), %rbx
	xorl	%eax, %eax
	leaq	nonEmptyIndices(%rip), %rsi
	movq	%rbx, %rdx
	leaq	_ZNSt6vectorIbSaIbEED1Ev(%rip), %rdi
	movq	%rax, nonEmptyIndices(%rip)
	movq	%rax, 8+nonEmptyIndices(%rip)
	movq	%rax, 16+nonEmptyIndices(%rip)
	movq	%rax, 24+nonEmptyIndices(%rip)
	movq	%rax, 32+nonEmptyIndices(%rip)
	call	__cxa_atexit@PLT
	xorl	%edx, %edx
	leaq	H(%rip), %rsi
	leaq	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED1Ev(%rip), %rdi
	movq	%rdx, H(%rip)
	movq	%rdx, 8+H(%rip)
	movq	%rdx, 16+H(%rip)
	movq	%rbx, %rdx
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	__cxa_atexit@PLT
	.cfi_endproc
.LFE5877:
	.size	_GLOBAL__sub_I_nonEmptyIndices, .-_GLOBAL__sub_I_nonEmptyIndices
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_nonEmptyIndices
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	allweight_in
	.bss
	.align 32
	.type	allweight_in, @object
	.size	allweight_in, 3600
allweight_in:
	.zero	3600
	.globl	alledge_in
	.align 32
	.type	alledge_in, @object
	.size	alledge_in, 3600
alledge_in:
	.zero	3600
	.globl	allvertex_in
	.align 32
	.type	allvertex_in, @object
	.size	allvertex_in, 3600
allvertex_in:
	.zero	3600
	.section	__nv_managed_data__,"aw"
	.align 8
	.type	_ZL8edge_cnt, @object
	.size	_ZL8edge_cnt, 8
_ZL8edge_cnt:
	.zero	8
	.align 8
	.type	_ZL7T_index, @object
	.size	_ZL7T_index, 8
_ZL7T_index:
	.zero	8
	.align 8
	.type	_ZL9mwe_index, @object
	.size	_ZL9mwe_index, 8
_ZL9mwe_index:
	.zero	8
	.align 8
	.type	_ZL7R_index, @object
	.size	_ZL7R_index, 8
_ZL7R_index:
	.zero	8
	.align 8
	.type	_ZL7Q_index, @object
	.size	_ZL7Q_index, 8
_ZL7Q_index:
	.zero	8
	.align 8
	.type	_ZL8z_device, @object
	.size	_ZL8z_device, 8
_ZL8z_device:
	.zero	8
	.align 8
	.type	_ZL3mwe, @object
	.size	_ZL3mwe, 8
_ZL3mwe:
	.zero	8
	.align 8
	.type	_ZL1T, @object
	.size	_ZL1T, 8
_ZL1T:
	.zero	8
	.align 8
	.type	_ZL1R, @object
	.size	_ZL1R, 8
_ZL1R:
	.zero	8
	.align 8
	.type	_ZL1Q, @object
	.size	_ZL1Q, 8
_ZL1Q:
	.zero	8
	.globl	H
	.bss
	.align 32
	.type	H, @object
	.size	H, 32
H:
	.zero	32
	.globl	nonEmptyIndices
	.align 32
	.type	nonEmptyIndices, @object
	.size	nonEmptyIndices, 40
nonEmptyIndices:
	.zero	40
	.section	__nv_managed_data__
	.align 8
	.type	_ZL5fixed, @object
	.size	_ZL5fixed, 8
_ZL5fixed:
	.zero	8
	.align 8
	.type	_ZL4dist, @object
	.size	_ZL4dist, 8
_ZL4dist:
	.zero	8
	.align 8
	.type	_ZL6parent, @object
	.size	_ZL6parent, 8
_ZL6parent:
	.zero	8
	.local	_ZL32__nv_fatbinhandle_for_managed_rt
	.comm	_ZL32__nv_fatbinhandle_for_managed_rt,8,8
	.local	_ZL22__nv_inited_managed_rt
	.comm	_ZL22__nv_inited_managed_rt,1,1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	989855744
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdio.h> 
#include <queue>
#include <set>
#include <list>
#include <iterator>
#include <algorithm>
#include <time.h>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#define ARRAY_SIZE 30
#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}


// Structure to represent a vertex and its distance
struct distNode { 
	int node; 
	int dist; 
  bool operator<(const distNode& rhs) const
    {
        return dist > rhs.dist || (dist == rhs.dist && node > rhs.node);;
    }
}; 

// Structure to represent an edge
struct edge { 
	int from; 
	int to; 
 	int weight;
   	bool operator<(const edge& rhs) const
     {
         return weight > rhs.weight || (weight == rhs.weight && to > rhs.to);
     }
};

// Structure to represent an edge source & destination
struct fromTo { 
	int from; 
	int to; 
   	bool operator<(const fromTo& rhs) const
     {
         return to < rhs.to || (to == rhs.to && from < rhs.from);
     }
};


// Initialize global variables
__device__ __managed__ int parent[ARRAY_SIZE]; // Array to store parent nodes
__device__ __managed__ int dist[ARRAY_SIZE]; // Array to store node distances
__device__ __managed__ bool fixed[ARRAY_SIZE]; // Array to store flags for node traversal
std::vector<bool> nonEmptyIndices; // Array to store non empty indices of vertices

std::priority_queue<distNode> H; //binary heap of (j,dist) initially empty;
__device__ __managed__ int Q[ARRAY_SIZE], R[ARRAY_SIZE]; //set of vertices initially empty;
__device__ __managed__ fromTo T[ARRAY_SIZE*ARRAY_SIZE]; //{ set of edges } initially {};
__device__ __managed__ fromTo mwe[ARRAY_SIZE*ARRAY_SIZE]; //set of edges; minimum weight edges for all vertices
__device__ __managed__ int z_device, Q_index=0, R_index=0, mwe_index=0, T_index=0; //Indices to synchronize between host & device
__device__ __managed__ int edge_cnt=0; //keeps track of #edges

//Arrays to hold all edges of a graph
int allvertex_in[ARRAY_SIZE*ARRAY_SIZE], alledge_in[ARRAY_SIZE*ARRAY_SIZE], allweight_in[ARRAY_SIZE*ARRAY_SIZE];


// class to represent a graph object
class Graph
{
public:
	// construct a vector of vectors of edges to represent an adjacency list
	std::vector<std::vector<edge>> adjList;
	

	// Graph Constructor
	Graph(std::vector<edge> const &edges, int N)
	{
		// resize the vector to hold upto vertex of maximum label value (elements of type vector<edge>)
		//or assign labels to each vertex starting from 0
		adjList.resize(N);
		nonEmptyIndices.resize(N);

		// add edges to the undirected graph
		for (auto &e: edges)
		{
			int from = e.from;
			int to = e.to;
			int weight = e.weight;

			// insert at the end
			adjList[from].push_back(edge{from, to, weight});
			adjList[to].push_back(edge{to, from, weight});

			//flag the non empty indices in adjList
			nonEmptyIndices[from] = true;
			nonEmptyIndices[to] = true;
		}
	}
};


// print adjacency list representation of graph
void printGraph(Graph const &graph)
{
	printf("Input Graph\n");
	for (int i = 0; i < graph.adjList.size(); i++)
	{
		// print all neighboring vertices of given vertex
		for (edge v : graph.adjList[i]){
			printf("( %d, %d, %d )", v.from, v.to, v.weight);
		}
		//printf("\n");
	}
}

//Delete element from array
//template<typename T>
void deleteElement(int arr[], int arr_index, int size) 
{

   if (arr_index < size) 
   { 
     // decrease the size of array and move all elements ahead
     size = size - 1; 
     for (int j=arr_index; j<size; j++) 
        arr[j] = arr[j+1]; 
   }
} 

//Check if an element exists in an array
//template<typename T>
__device__ bool ifExist(int arr[], int val){
		for (int i=0; i<ARRAY_SIZE; i++) {
				if (arr[i] == val)
					return true;
		}
		return false;
}

__device__ bool ifExistMWE(fromTo arr[], fromTo ft){
		for (int i=0; i<edge_cnt; i++) {
				if (arr[i].from == ft.from && arr[i].to == ft.to)
					return true;
		}
		return false;
}


//Function to load edges into kernel pointer arrays
void load_kernelArrays(Graph const &graph) {
	// generate the input array on the host
	//atmost a node can connect to all other nodes
	for (int i = 0; i < graph.adjList.size(); i++) {
		for(edge adj : graph.adjList[i]) {
			allvertex_in[edge_cnt] = adj.from;
			alledge_in[edge_cnt] = adj.to;
			allweight_in[edge_cnt] = adj.weight;
			edge_cnt++;
		}
	}
}

//Identifies all minimum weight edges for all vertices
void initMWE(Graph const &graph) 
{ 
	for (int i = 0; i < graph.adjList.size(); i++) {
		int prevWeight=INT_MAX;
		int min_to, minFrom;
		// Iterate through all the vertices of graph 
		for (auto it=graph.adjList[i].begin(); it!=graph.adjList[i].end(); it++) {
			edge adj = *it;
			// Get the Minimum weight edge for vertex adj.from
			if (adj.weight < prevWeight) { 
				min_to = adj.to;
				minFrom = adj.from;
				prevWeight = adj.weight;
			}
		} 
		mwe[mwe_index] = fromTo{minFrom, min_to};
		mwe_index++;
	}
} 
 
 
//Kernel to process edges in Parallel
__global__ void parallel_processEdge(int *allvertex_devicein, int *alledge_devicein, 
	int *allweight_devicein, int z_device)
{
 
    int myId = threadIdx.x + blockDim.x * blockIdx.x;
	   // int tid  = threadIdx.x;

    //printf("block:%d, myId: %d\n", blockIdx.x, myId); 
	
    // process edges in R
	if (myId < edge_cnt) {
		//printf("myId:%d, allvertex_devicein[myId] :%d\n", myId, allvertex_devicein[myId]);
		if (allvertex_devicein[myId] == z_device)
		{
			//printf("Z found, allvertex_devicein[myId] :%d\n", allvertex_devicein[myId]);
			////printf("block:%d, myId: %d\n", blockIdx.x, myId); 
			printf("Thread %d looking for the Edge to be processed\n", threadIdx.x);
			int k_device = alledge_devicein[myId];
			//printf("k_device: %d\n", k_device);
			int w_device = allweight_devicein[myId];
			//printf("w_device: %d\n", w_device);
			printf("Edge {%d, %d, %d} found at myID:%d\n", z_device, k_device, w_device);

			if (!fixed[k_device]) {
				if (ifExistMWE(mwe, fromTo{z_device, k_device})) {
					//printf("In MWE and not fixed k, z:%d, k:%d\n", z_device, k_device);
					fixed[k_device] = true;
							
					int t = atomicAdd(&T_index, 1);
					T[t] = fromTo{k_device, z_device}; // z is the parent of k
							
					int r = atomicAdd(&R_index, 1);
					R[r] = k_device;
					printf("Destination node is not fixed & also a minimum edge for Z:%d\n", z_device);
					printf("Adding k:%d to Tree & R for processing\n", k_device);
					//printf("R_index in kernel:%d\n", R_index);
				}
				else if (dist[k_device] > w_device) {
					//printf("not minimum edge and not fixed k, z:%d, k:%d\n", z_device, k_device);
					//printf("\n");
					printf("Destination node is not fixed & NOT a minimum weight edge\n");
					printf("Adding k:%d to Q for inserting into Heap\n", k_device);
					dist[k_device] = w_device;
					parent[k_device] = z_device;

					if (!ifExist(Q, k_device)) {
						int q = atomicAdd(&Q_index, 1);
						Q[q] = k_device;
						//if (Q.find(k_device) == Q.end()) {
						//	Q.insert(k_device);
					}
				}
			}
			__syncthreads();        // make sure all updates are finished
		}
	}
}

//Kernel Setup
void kernel_setup(Graph const &graph, int z_device){
	
	int threads = 512;
	int blocks = ceil(float(edge_cnt) / float(threads));

	const int ARRAY_BYTES = ARRAY_SIZE * ARRAY_SIZE * sizeof(int);
	//printf("array bytes:%f\n", ARRAY_BYTES);

	// declare GPU memory pointers
    int * allvertex_devicein, * alledge_devicein, * allweight_devicein;

    // allocate GPU memory
    hipMalloc((void **) &allvertex_devicein, ARRAY_BYTES);
	hipMalloc((void **) &alledge_devicein, ARRAY_BYTES);
	hipMalloc((void **) &allweight_devicein, ARRAY_BYTES);

	// transfer the input array to the GPU
	hipMemcpy(allvertex_devicein, allvertex_in, ARRAY_BYTES, hipMemcpyHostToDevice);
	gpuErrchk( hipMemcpy(alledge_devicein, alledge_in, ARRAY_BYTES, hipMemcpyHostToDevice) );
	gpuErrchk( hipMemcpy(allweight_devicein, allweight_in, ARRAY_BYTES, hipMemcpyHostToDevice) );


	//printf("Running global reduce\n");
	
	parallel_processEdge<<<blocks, threads>>>
		(allvertex_devicein, alledge_devicein, allweight_devicein, z_device);

	gpuErrchk( hipPeekAtLastError() );
  	gpuErrchk( hipDeviceSynchronize() );

	// free GPU memory allocation
	hipFree(allvertex_devicein);
	hipFree(alledge_devicein);
	hipFree(allweight_devicein);
};
 

// Function to print the constructed MST 
void printMST(std::set<fromTo> T) 
{ 
	std::set<fromTo>::iterator it; //set iterator
	for (it=T.begin(); it!=T.end(); it++) {
		fromTo e = *it; 
		printf("%d - %d\n", e.from, e.to); 
  }
} 

// The main function that constructs Minimum Spanning Tree (MST) 
// using Prim's Parallel algorithm given in chapter 7
fromTo* primMST(Graph const &graph, int N, int source) 
{ 
	std::set<int>::iterator it; //set iterator 

	// Initialize and assign dist value of 
	// all vertices to 0 and source to infinite 
	for(int i = 0; i < N; i ++) {
		parent[i] = -1;
		dist[i] = INT_MAX;
		fixed[i] = false;
	}

	// Make distance value of source vertex as 0 so it is extracted first 
	dist[source] = 0; 
	H.push(distNode{source, dist[0]});

	initMWE(graph); //initialize minimum weight edges of given graph;

	// Loop for |V| - 1 iterations
	//while (!H.empty()) { 
	for (int i = 0; i < graph.adjList.size(); i++) {
		// Extract the vertex with minimum dist value 
		distNode d = H.top();
		H.pop();
		int j = d.node; //pop the minimum distance vertex
		printf("Popped minimum distance node:%d\n", j);
		if (!fixed[j]) {
			printf("Popped node is not fixed adding it to R\n");
			R[R_index] = j;
			R_index++;
			fixed[j] = true;
			if (parent[j] != -1) {
				T[T_index] = fromTo{j, parent[j]};
				T_index++;
			}

			//printf("R_index: %d\n", R_index);
			while (R_index != 0){
				// call processEdge for all neighbors of vertex in R 
				//printf("R_index: %d\n", R_index);
				z_device = R[0];
				//printf("Z before kernel:%d\n", z_device);
				deleteElement(R, 0, ARRAY_SIZE);
				R_index--;
				//call kernel setup
				printf("Calling kernel for processing edges of elements in R in parallel\n");
				kernel_setup(graph, z_device);
			}	
			
			while (Q_index != 0) {
				//for (int i = 0; i < Q_index; i++) {
					printf("Adding all elements from Q to Heap H\n");
					int z = Q[0];
					//printf("z in Q:%d\n", z);
					deleteElement(Q, 0, ARRAY_SIZE);
					Q_index--;
					if (!fixed[z]) {
						H.push(distNode{z, dist[z]});
					}
				//}
			}
		}
	}
	if (T_index == graph.adjList.size() -1) {
		return T;
	} else 
		return new fromTo[ARRAY_SIZE]; // return empty tree

} 

// Driver program to call Prim
int main() 
{ 
	printf("2010_Alaskan.txt\n");
	// vector of graph edges
    std::vector<edge> edges;
    
    edges.push_back(edge{0, 1, 866});
    edges.push_back(edge{0, 2, 187});
    edges.push_back(edge{0, 3, 399});

    edges.push_back(edge{1, 5, 605});
    edges.push_back(edge{1, 10, 1720});
    edges.push_back(edge{1, 11, 888});
    edges.push_back(edge{1, 12, 409});

    edges.push_back(edge{2, 1, 739});
    edges.push_back(edge{2, 3, 213});
    edges.push_back(edge{2, 4, 541});
    edges.push_back(edge{2, 5, 759});
    edges.push_back(edge{2, 6, 1416});
    edges.push_back(edge{2, 7, 1391});
    edges.push_back(edge{2, 8, 2474});
    edges.push_back(edge{2, 9, 2586});
    edges.push_back(edge{2, 10, 2421});
    edges.push_back(edge{2, 11, 1625});
    edges.push_back(edge{2, 12, 765});

    edges.push_back(edge{3, 4, 330});
    edges.push_back(edge{3, 5, 547});
    edges.push_back(edge{3, 12, 561});

    edges.push_back(edge{4, 5, 226});
    edges.push_back(edge{4, 6, 912});

    edges.push_back(edge{5, 6, 689});
    edges.push_back(edge{5, 7, 731});
    edges.push_back(edge{5, 11, 1199});
    edges.push_back(edge{5, 12, 213});

    edges.push_back(edge{6, 7, 224});
    edges.push_back(edge{6, 8, 1378});

    edges.push_back(edge{7, 8, 1234});
    edges.push_back(edge{7, 11, 641});
    edges.push_back(edge{7, 12, 631});

    edges.push_back(edge{8, 9, 337});
    edges.push_back(edge{8, 11, 861});

    edges.push_back(edge{9, 10, 678});
    edges.push_back(edge{9, 11, 967});

    edges.push_back(edge{10, 11, 1024});

	edges.push_back(edge{11, 12, 1013});


	
	// edges.push_back(edge{4,5,4});
	// edges.push_back(edge{4,11,8});
	// edges.push_back(edge{5,6,8});
	// edges.push_back(edge{5,11,11});
	// edges.push_back(edge{6,7,7});
	// edges.push_back(edge{6,12,2});
	// edges.push_back(edge{6,9,4});
	// edges.push_back(edge{7,8,9});
	// edges.push_back(edge{7,9,14});
	// edges.push_back(edge{8,9,10});
	// edges.push_back(edge{9,10,2});
	// edges.push_back(edge{10,11,1});
	// edges.push_back(edge{10,12,6});
	// edges.push_back(edge{11,12,7});

	// construct graph
	Graph graph(edges, ARRAY_SIZE);
	load_kernelArrays(graph);

	// print adjacency list representation of graph
	printGraph(graph);

	//Source vertex as first non empty vertex in adjacency List
	//Or modify this to take from input file
	int source;
	for(int i = 0; i<nonEmptyIndices.size(); i++) {
			if (nonEmptyIndices[i]) {
				source = i;
			break;
		}
	}	
	
	//printf("source:%d\n", source);
	
  	//printf("Before Prim\n");

	hipEvent_t start, stop;
    	hipEventCreate(&start);
        hipEventCreate(&stop);

        //printf("Running global reduce\n");
    	hipEventRecord(start, 0);

	primMST(graph, ARRAY_SIZE, source);

	 hipEventRecord(stop, 0);

        hipEventSynchronize(stop);
    	float elapsedTime;
        hipEventElapsedTime(&elapsedTime, start, stop);
        printf("Parallel Elpased Time in ms:%f\n", elapsedTime);

	
  	//printf("After Prim\n");

	//printf("T size:%d\n", T_index);
	//printf("MST in iterator\n");
	printf("\n====================================\n");
	printf("Minimum Spanning Tree using Prim \n");
	for (int i =0; i<T_index; i++) {
		fromTo e = T[i]; 
		printf("%d - %d\n", e.from, e.to); 
	}

	
	return 0; 
} 

//Reference: https://www.geeksforgeeks.org/prims-mst-for-adjacency-list-representation-greedy-algo-6/
// https://www.techiedelight.com/graph-implementation-using-stl/


	.text
	.file	"prim_parallel.hip"
	.section	.text._ZNSt13_Bvector_baseISaIbEED2Ev,"axG",@progbits,_ZNSt13_Bvector_baseISaIbEED2Ev,comdat
	.weak	_ZNSt13_Bvector_baseISaIbEED2Ev # -- Begin function _ZNSt13_Bvector_baseISaIbEED2Ev
	.p2align	1, 0x90
	.type	_ZNSt13_Bvector_baseISaIbEED2Ev,@function
_ZNSt13_Bvector_baseISaIbEED2Ev:        # @_ZNSt13_Bvector_baseISaIbEED2Ev
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
.Ltmp0:
	callq	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
.Ltmp1:
# %bb.1:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 16
.Ltmp2:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end0:
	.size	_ZNSt13_Bvector_baseISaIbEED2Ev, .Lfunc_end0-_ZNSt13_Bvector_baseISaIbEED2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZNSt13_Bvector_baseISaIbEED2Ev,"aG",@progbits,_ZNSt13_Bvector_baseISaIbEED2Ev,comdat
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	1                               #   On action: 1
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev,"axG",@progbits,_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev,comdat
	.weak	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev # -- Begin function _ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev,@function
_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev: # @_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	jne	_ZdlPv                          # TAILCALL
# %bb.1:                                # %_ZNSt6vectorI8distNodeSaIS0_EED2Ev.exit
	retq
.Lfunc_end1:
	.size	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev, .Lfunc_end1-_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z10printGraphRK5Graph          # -- Begin function _Z10printGraphRK5Graph
	.type	_Z10printGraphRK5Graph,@function
_Z10printGraphRK5Graph:                 # @_Z10printGraphRK5Graph
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
	cmpq	%rax, %rcx
	je	.LBB2_6
# %bb.1:                                # %.lr.ph14.preheader
	movabsq	$-6148914691236517205, %r14     # imm = 0xAAAAAAAAAAAAAAAB
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph14
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	leaq	(%r15,%r15,2), %rdx
	movq	(%rax,%rdx,8), %r12
	movq	8(%rax,%rdx,8), %r13
	cmpq	%r13, %r12
	je	.LBB2_5
.LBB2_3:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r12), %esi
	movl	4(%r12), %edx
	movl	8(%r12), %ecx
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	addq	$12, %r12
	cmpq	%r13, %r12
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	(%rbx), %rax
	movq	8(%rbx), %rcx
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	movq	%rcx, %rdx
	subq	%rax, %rdx
	sarq	$3, %rdx
	imulq	%r14, %rdx
	cmpq	%r15, %rdx
	ja	.LBB2_2
.LBB2_6:                                # %._crit_edge15
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10printGraphRK5Graph, .Lfunc_end2-_Z10printGraphRK5Graph
	.cfi_endproc
                                        # -- End function
	.globl	_Z13deleteElementPiii           # -- Begin function _Z13deleteElementPiii
	.type	_Z13deleteElementPiii,@function
_Z13deleteElementPiii:                  # @_Z13deleteElementPiii
	.cfi_startproc
# %bb.0:
	cmpl	%edx, %esi
	jge	.LBB3_4
# %bb.1:
	decl	%edx
	cmpl	%esi, %edx
	jle	.LBB3_4
# %bb.2:                                # %.lr.ph.preheader
	movslq	%esi, %rcx
	movslq	%edx, %rax
.LBB3_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	4(%rdi,%rcx,4), %edx
	movl	%edx, (%rdi,%rcx,4)
	leaq	1(%rcx), %rdx
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	jne	.LBB3_3
.LBB3_4:                                # %.loopexit
	retq
.Lfunc_end3:
	.size	_Z13deleteElementPiii, .Lfunc_end3-_Z13deleteElementPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17load_kernelArraysRK5Graph   # -- Begin function _Z17load_kernelArraysRK5Graph
	.type	_Z17load_kernelArraysRK5Graph,@function
_Z17load_kernelArraysRK5Graph:          # @_Z17load_kernelArraysRK5Graph
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	8(%rdi), %rdx
	subq	%rax, %rdx
	je	.LBB4_6
# %bb.1:                                # %.lr.ph14.preheader
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	sarq	$3, %rdx
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rdx, %rcx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	xorl	%edx, %edx
.LBB4_2:                                # %.lr.ph14
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	leaq	(%rdx,%rdx,2), %rdi
	movq	(%rax,%rdi,8), %rsi
	movq	8(%rax,%rdi,8), %rdi
.LBB4_3:                                # %.lr.ph14
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%rdi, %rsi
	je	.LBB4_4
# %bb.7:                                # %.lr.ph
                                        #   in Loop: Header=BB4_3 Depth=2
	movl	(%rsi), %r8d
	movl	4(%rsi), %r9d
	movl	8(%rsi), %r10d
	movq	edge_cnt(%rip), %r11
	movslq	(%r11), %rbx
	movl	%r8d, allvertex_in(,%rbx,4)
	movslq	(%r11), %r8
	movl	%r9d, alledge_in(,%r8,4)
	movslq	(%r11), %r8
	movl	%r10d, allweight_in(,%r8,4)
	incl	(%r11)
	addq	$12, %rsi
	jmp	.LBB4_3
.LBB4_4:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%rdx
	cmpq	%rcx, %rdx
	jne	.LBB4_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB4_6:                                # %._crit_edge15
	retq
.Lfunc_end4:
	.size	_Z17load_kernelArraysRK5Graph, .Lfunc_end4-_Z17load_kernelArraysRK5Graph
	.cfi_endproc
                                        # -- End function
	.globl	_Z7initMWERK5Graph              # -- Begin function _Z7initMWERK5Graph
	.type	_Z7initMWERK5Graph,@function
_Z7initMWERK5Graph:                     # @_Z7initMWERK5Graph
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %r9
	cmpq	%r9, 8(%rdi)
	je	.LBB5_8
# %bb.1:                                # %.lr.ph33.preheader
	xorl	%eax, %eax
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
                                        # implicit-def: $esi
                                        # implicit-def: $edx
.LBB5_2:                                # %.lr.ph33
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	leaq	(%rax,%rax,2), %r10
	movq	(%r9,%r10,8), %r8
	movq	8(%r9,%r10,8), %r9
	cmpq	%r9, %r8
	je	.LBB5_7
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	$2147483647, %r10d              # imm = 0x7FFFFFFF
.LBB5_4:                                # %.lr.ph
                                        #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	8(%r8), %r11d
	cmpl	%r10d, %r11d
	jge	.LBB5_6
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB5_4 Depth=2
	movl	(%r8), %edx
	movl	4(%r8), %esi
	movl	%r11d, %r10d
.LBB5_6:                                # %.lr.ph
                                        #   in Loop: Header=BB5_4 Depth=2
	addq	$12, %r8
	cmpq	%r9, %r8
	jne	.LBB5_4
.LBB5_7:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	movq	mwe_index(%rip), %r8
	movslq	(%r8), %r8
	movq	mwe(%rip), %r9
	movl	%edx, (%r9,%r8,8)
	movl	%esi, 4(%r9,%r8,8)
	movq	mwe_index(%rip), %r8
	incl	(%r8)
	incq	%rax
	movq	(%rdi), %r9
	movq	8(%rdi), %r8
	subq	%r9, %r8
	sarq	$3, %r8
	imulq	%rcx, %r8
	cmpq	%rax, %r8
	ja	.LBB5_2
.LBB5_8:                                # %._crit_edge34
	retq
.Lfunc_end5:
	.size	_Z7initMWERK5Graph, .Lfunc_end5-_Z7initMWERK5Graph
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__parallel_processEdgePiS_S_i # -- Begin function _Z35__device_stub__parallel_processEdgePiS_S_i
	.type	_Z35__device_stub__parallel_processEdgePiS_S_i,@function
_Z35__device_stub__parallel_processEdgePiS_S_i: # @_Z35__device_stub__parallel_processEdgePiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20parallel_processEdgePiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z35__device_stub__parallel_processEdgePiS_S_i, .Lfunc_end6-_Z35__device_stub__parallel_processEdgePiS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12kernel_setupRK5Graphi
.LCPI7_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z12kernel_setupRK5Graphi
	.type	_Z12kernel_setupRK5Graphi,@function
_Z12kernel_setupRK5Graphi:              # @_Z12kernel_setupRK5Graphi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	edge_cnt(%rip), %rax
	cvtsi2ssl	(%rax), %xmm0
	movl	%esi, %ebx
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	movss	%xmm0, 20(%rsp)                 # 4-byte Spill
	leaq	32(%rsp), %r14
	movl	$3600, %esi                     # imm = 0xE10
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r15
	movl	$3600, %esi                     # imm = 0xE10
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$3600, %esi                     # imm = 0xE10
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$allvertex_in, %esi
	movl	$3600, %edx                     # imm = 0xE10
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$alledge_in, %esi
	movl	$3600, %edx                     # imm = 0xE10
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	movq	8(%rsp), %rdi
	movl	$allweight_in, %esi
	movl	$3600, %edx                     # imm = 0xE10
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit7
	cvttss2si	20(%rsp), %eax          # 4-byte Folded Reload
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.6:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z35__device_stub__parallel_processEdgePiS_S_i
.LBB7_7:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB7_8
# %bb.10:                               # %_Z9gpuAssert10hipError_tPKcib.exit9
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB7_11
# %bb.12:                               # %_Z9gpuAssert10hipError_tPKcib.exit11
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_1:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$270, %r8d                      # imm = 0x10E
	jmp	.LBB7_2
.LBB7_4:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	movl	$.L.str.3, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$271, %r8d                      # imm = 0x10F
.LBB7_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB7_8:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	movl	$.L.str.3, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$279, %r8d                      # imm = 0x117
	jmp	.LBB7_9
.LBB7_11:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	movl	$.L.str.3, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$280, %r8d                      # imm = 0x118
.LBB7_9:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end7:
	.size	_Z12kernel_setupRK5Graphi, .Lfunc_end7-_Z12kernel_setupRK5Graphi
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE # -- Begin function _Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE
	.type	_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE,@function
_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE: # @_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movq	24(%rdi), %r14
	addq	$8, %rbx
	cmpq	%rbx, %r14
	je	.LBB8_2
.LBB8_1:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	32(%r14), %esi
	movl	36(%r14), %edx
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdi
	callq	_ZSt18_Rb_tree_incrementPKSt18_Rb_tree_node_base
	movq	%rax, %r14
	cmpq	%rbx, %rax
	jne	.LBB8_1
.LBB8_2:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE, .Lfunc_end8-_Z8printMSTSt3setI6fromToSt4lessIS0_ESaIS0_EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z7primMSTRK5Graphii            # -- Begin function _Z7primMSTRK5Graphii
	.type	_Z7primMSTRK5Graphii,@function
_Z7primMSTRK5Graphii:                   # @_Z7primMSTRK5Graphii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	testl	%esi, %esi
	jle	.LBB9_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB9_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	parent(%rip), %rsi
	movl	$-1, (%rsi,%rcx,4)
	movq	dist(%rip), %rsi
	movl	$2147483647, (%rsi,%rcx,4)      # imm = 0x7FFFFFFF
	movq	fixed(%rip), %rsi
	movb	$0, (%rsi,%rcx)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB9_2
.LBB9_3:                                # %._crit_edge
	movslq	%edx, %rax
	movq	dist(%rip), %rcx
	movl	$0, (%rcx,%rax,4)
	movq	%rsp, %rsi
	movl	%eax, (%rsi)
	movq	dist(%rip), %rax
	movl	(%rax), %eax
	movl	%eax, 4(%rsi)
	movl	$H, %edi
	callq	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	movq	%rbx, %rdi
	callq	_Z7initMWERK5Graph
	movq	8(%rbx), %rax
	movq	(%rbx), %rcx
	movabsq	$-6148914691236517205, %r15     # imm = 0xAAAAAAAAAAAAAAAB
	subq	%rcx, %rax
	je	.LBB9_4
# %bb.7:                                # %.lr.ph48
	movq	%rsp, %r14
	xorl	%r12d, %r12d
.LBB9_8:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_11 Depth 2
                                        #     Child Loop BB9_12 Depth 2
	movq	H(%rip), %rax
	movl	(%rax), %ebp
	movl	$H, %edi
	callq	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv
	movl	$.L.str.5, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movslq	%ebp, %r13
	movq	fixed(%rip), %rax
	cmpb	$0, (%rax,%r13)
	jne	.LBB9_15
# %bb.9:                                #   in Loop: Header=BB9_8 Depth=1
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	R_index(%rip), %rax
	movslq	(%rax), %rax
	movq	R(%rip), %rcx
	movl	%r13d, (%rcx,%rax,4)
	movq	R_index(%rip), %rax
	incl	(%rax)
	movq	fixed(%rip), %rax
	movb	$1, (%rax,%r13)
	movq	parent(%rip), %rax
	movl	(%rax,%r13,4), %eax
	cmpl	$-1, %eax
	je	.LBB9_11
# %bb.10:                               #   in Loop: Header=BB9_8 Depth=1
	movq	T_index(%rip), %rcx
	movslq	(%rcx), %rcx
	movq	T(%rip), %rdx
	movl	%ebp, (%rdx,%rcx,8)
	movl	%eax, 4(%rdx,%rcx,8)
	movq	T_index(%rip), %rax
	incl	(%rax)
	jmp	.LBB9_11
.LBB9_18:                               # %.lr.ph43
                                        #   in Loop: Header=BB9_11 Depth=2
	movq	R(%rip), %rax
	movl	(%rax), %eax
	movq	z_device(%rip), %rcx
	movl	%eax, (%rcx)
	movq	R(%rip), %rdi
	leaq	4(%rdi), %rsi
	movl	$116, %edx
	callq	memmove@PLT
	movq	R_index(%rip), %rax
	decl	(%rax)
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	z_device(%rip), %rax
	movl	(%rax), %esi
	callq	_Z12kernel_setupRK5Graphi
.LBB9_11:                               #   Parent Loop BB9_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	R_index(%rip), %rax
	cmpl	$0, (%rax)
	jne	.LBB9_18
	jmp	.LBB9_12
.LBB9_13:                               # %.lr.ph45
                                        #   in Loop: Header=BB9_12 Depth=2
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	Q(%rip), %rdi
	movl	(%rdi), %ebp
	leaq	4(%rdi), %rsi
	movl	$116, %edx
	callq	memmove@PLT
	movq	Q_index(%rip), %rax
	decl	(%rax)
	movslq	%ebp, %rax
	movq	fixed(%rip), %rcx
	cmpb	$0, (%rcx,%rax)
	jne	.LBB9_12
# %bb.14:                               #   in Loop: Header=BB9_12 Depth=2
	movl	%eax, (%rsp)
	movq	dist(%rip), %rcx
	movl	(%rcx,%rax,4), %eax
	movl	%eax, 4(%rsp)
	movl	$H, %edi
	movq	%r14, %rsi
	callq	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
.LBB9_12:                               # %.preheader
                                        #   Parent Loop BB9_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	Q_index(%rip), %rax
	cmpl	$0, (%rax)
	jne	.LBB9_13
.LBB9_15:                               # %.loopexit
                                        #   in Loop: Header=BB9_8 Depth=1
	movq	8(%rbx), %rax
	subq	(%rbx), %rax
	incq	%r12
	sarq	$3, %rax
	imulq	%r15, %rax
	cmpq	%r12, %rax
	ja	.LBB9_8
	jmp	.LBB9_5
.LBB9_4:
	sarq	$3, %rax
	imulq	%r15, %rax
.LBB9_5:                                # %._crit_edge49
	movq	T_index(%rip), %rcx
	movslq	(%rcx), %rcx
	decq	%rax
	cmpq	%rcx, %rax
	jne	.LBB9_16
# %bb.6:
	movq	T(%rip), %rax
	jmp	.LBB9_17
.LBB9_16:
	movl	$240, %edi
	callq	_Znam
.LBB9_17:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z7primMSTRK5Graphii, .Lfunc_end9-_Z7primMSTRK5Graphii
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_,"axG",@progbits,_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_,comdat
	.weak	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_ # -- Begin function _ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	.p2align	1, 0x90
	.type	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_,@function
_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_: # @_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	movq	(%rbx), %rax
	movq	8(%rbx), %rsi
	movq	-8(%rsi), %rcx
	subq	%rax, %rsi
	sarq	$3, %rsi
	leaq	-1(%rsi), %rdx
	cmpq	$2, %rsi
	jl	.LBB10_7
# %bb.1:                                # %.lr.ph.i.i.preheader
	movq	%rcx, %rsi
	shrq	$32, %rsi
.LBB10_2:                               # %.lr.ph.i.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	-1(%rdx), %rdi
	movq	%rdi, %r8
	shrq	%r8
	cmpl	%esi, 4(%rax,%r8,8)
	jg	.LBB10_5
# %bb.3:                                #   in Loop: Header=BB10_2 Depth=1
	jne	.LBB10_7
# %bb.4:                                # %_ZN9__gnu_cxx5__ops14_Iter_comp_valISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEES3_EEbT_RT0_.exit.i.i
                                        #   in Loop: Header=BB10_2 Depth=1
	cmpl	%ecx, (%rax,%r8,8)
	jle	.LBB10_7
.LBB10_5:                               # %_ZN9__gnu_cxx5__ops14_Iter_comp_valISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEES3_EEbT_RT0_.exit.thread.i.i
                                        #   in Loop: Header=BB10_2 Depth=1
	movq	(%rax,%r8,8), %r9
	movq	%r9, (%rax,%rdx,8)
	movq	%r8, %rdx
	cmpq	$1, %rdi
	ja	.LBB10_2
# %bb.6:
	xorl	%edx, %edx
.LBB10_7:                               # %_ZSt9push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEESt4lessIS2_EEvT_SA_T0_.exit
	movq	%rcx, (%rax,%rdx,8)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_, .Lfunc_end10-_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE4pushEOS0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv,"axG",@progbits,_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv,comdat
	.weak	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv # -- Begin function _ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv
	.p2align	1, 0x90
	.type	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv,@function
_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv: # @_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	movq	8(%rbx), %rax
	movq	%rax, %rcx
	subq	%rdi, %rcx
	cmpq	$9, %rcx
	jl	.LBB11_2
# %bb.1:
	leaq	-8(%rax), %rdx
	movq	-8(%rax), %rcx
	movq	(%rdi), %rsi
	movq	%rsi, -8(%rax)
	subq	%rdi, %rdx
	sarq	$3, %rdx
	xorl	%esi, %esi
	callq	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_
	movq	8(%rbx), %rax
.LBB11_2:                               # %_ZSt8pop_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEESt4lessIS2_EEvT_SA_T0_.exit
	addq	$-8, %rax
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv, .Lfunc_end11-_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EE3popEv
	.cfi_endproc
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$80, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -16
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorps	%xmm0, %xmm0
	leaq	32(%rsp), %rdi
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	movabsq	$4294967296, %rax               # imm = 0x100000000
	leaq	8(%rsp), %rdx
	movq	%rax, (%rdx)
	movl	$866, 8(%rdx)                   # imm = 0x362
.Ltmp3:
	xorl	%esi, %esi
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp4:
# %bb.1:                                # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit
	movq	40(%rsp), %rax
	movq	48(%rsp), %rsi
	movabsq	$8589934592, %rcx               # imm = 0x200000000
	movq	%rcx, 8(%rsp)
	movl	$187, 16(%rsp)
	cmpq	%rsi, %rax
	je	.LBB12_3
# %bb.2:
	movl	16(%rsp), %ecx
	movl	%ecx, 8(%rax)
	movq	8(%rsp), %rcx
	movq	%rcx, (%rax)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_5
.LBB12_3:
.Ltmp6:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp7:
# %bb.4:                                # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit28_crit_edge
	movq	40(%rsp), %rsi
.LBB12_5:                               # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit28
	movabsq	$12884901888, %rax              # imm = 0x300000000
	movq	%rax, 8(%rsp)
	movl	$399, 16(%rsp)                  # imm = 0x18F
	cmpq	48(%rsp), %rsi
	je	.LBB12_7
# %bb.6:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_9
.LBB12_7:
.Ltmp9:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp10:
# %bb.8:                                # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit31_crit_edge
	movq	40(%rsp), %rsi
.LBB12_9:                               # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit31
	movabsq	$21474836481, %rax              # imm = 0x500000001
	movq	%rax, 8(%rsp)
	movl	$605, 16(%rsp)                  # imm = 0x25D
	cmpq	48(%rsp), %rsi
	je	.LBB12_11
# %bb.10:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_13
.LBB12_11:
.Ltmp12:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp13:
# %bb.12:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit34_crit_edge
	movq	40(%rsp), %rsi
.LBB12_13:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit34
	movabsq	$42949672961, %rax              # imm = 0xA00000001
	movq	%rax, 8(%rsp)
	movl	$1720, 16(%rsp)                 # imm = 0x6B8
	cmpq	48(%rsp), %rsi
	je	.LBB12_15
# %bb.14:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_17
.LBB12_15:
.Ltmp15:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp16:
# %bb.16:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit37_crit_edge
	movq	40(%rsp), %rsi
.LBB12_17:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit37
	movabsq	$47244640257, %rax              # imm = 0xB00000001
	movq	%rax, 8(%rsp)
	movl	$888, 16(%rsp)                  # imm = 0x378
	cmpq	48(%rsp), %rsi
	je	.LBB12_19
# %bb.18:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_21
.LBB12_19:
.Ltmp18:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp19:
# %bb.20:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit40_crit_edge
	movq	40(%rsp), %rsi
.LBB12_21:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit40
	movabsq	$51539607553, %rax              # imm = 0xC00000001
	movq	%rax, 8(%rsp)
	movl	$409, 16(%rsp)                  # imm = 0x199
	cmpq	48(%rsp), %rsi
	je	.LBB12_23
# %bb.22:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_25
.LBB12_23:
.Ltmp21:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp22:
# %bb.24:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit43_crit_edge
	movq	40(%rsp), %rsi
.LBB12_25:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit43
	movabsq	$4294967298, %rax               # imm = 0x100000002
	movq	%rax, 8(%rsp)
	movl	$739, 16(%rsp)                  # imm = 0x2E3
	cmpq	48(%rsp), %rsi
	je	.LBB12_27
# %bb.26:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_29
.LBB12_27:
.Ltmp24:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp25:
# %bb.28:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit46_crit_edge
	movq	40(%rsp), %rsi
.LBB12_29:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit46
	movabsq	$12884901890, %rax              # imm = 0x300000002
	movq	%rax, 8(%rsp)
	movl	$213, 16(%rsp)
	cmpq	48(%rsp), %rsi
	je	.LBB12_31
# %bb.30:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_33
.LBB12_31:
.Ltmp27:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp28:
# %bb.32:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit49_crit_edge
	movq	40(%rsp), %rsi
.LBB12_33:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit49
	movabsq	$17179869186, %rax              # imm = 0x400000002
	movq	%rax, 8(%rsp)
	movl	$541, 16(%rsp)                  # imm = 0x21D
	cmpq	48(%rsp), %rsi
	je	.LBB12_35
# %bb.34:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_37
.LBB12_35:
.Ltmp30:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp31:
# %bb.36:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit52_crit_edge
	movq	40(%rsp), %rsi
.LBB12_37:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit52
	movabsq	$21474836482, %rax              # imm = 0x500000002
	movq	%rax, 8(%rsp)
	movl	$759, 16(%rsp)                  # imm = 0x2F7
	cmpq	48(%rsp), %rsi
	je	.LBB12_39
# %bb.38:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_41
.LBB12_39:
.Ltmp33:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp34:
# %bb.40:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit55_crit_edge
	movq	40(%rsp), %rsi
.LBB12_41:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit55
	movabsq	$25769803778, %rax              # imm = 0x600000002
	movq	%rax, 8(%rsp)
	movl	$1416, 16(%rsp)                 # imm = 0x588
	cmpq	48(%rsp), %rsi
	je	.LBB12_43
# %bb.42:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_45
.LBB12_43:
.Ltmp36:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp37:
# %bb.44:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit58_crit_edge
	movq	40(%rsp), %rsi
.LBB12_45:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit58
	movabsq	$30064771074, %rax              # imm = 0x700000002
	movq	%rax, 8(%rsp)
	movl	$1391, 16(%rsp)                 # imm = 0x56F
	cmpq	48(%rsp), %rsi
	je	.LBB12_47
# %bb.46:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_49
.LBB12_47:
.Ltmp39:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp40:
# %bb.48:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit61_crit_edge
	movq	40(%rsp), %rsi
.LBB12_49:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit61
	movabsq	$34359738370, %rax              # imm = 0x800000002
	movq	%rax, 8(%rsp)
	movl	$2474, 16(%rsp)                 # imm = 0x9AA
	cmpq	48(%rsp), %rsi
	je	.LBB12_51
# %bb.50:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_53
.LBB12_51:
.Ltmp42:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp43:
# %bb.52:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit64_crit_edge
	movq	40(%rsp), %rsi
.LBB12_53:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit64
	movabsq	$38654705666, %rax              # imm = 0x900000002
	movq	%rax, 8(%rsp)
	movl	$2586, 16(%rsp)                 # imm = 0xA1A
	cmpq	48(%rsp), %rsi
	je	.LBB12_55
# %bb.54:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_57
.LBB12_55:
.Ltmp45:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp46:
# %bb.56:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit67_crit_edge
	movq	40(%rsp), %rsi
.LBB12_57:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit67
	movabsq	$42949672962, %rax              # imm = 0xA00000002
	movq	%rax, 8(%rsp)
	movl	$2421, 16(%rsp)                 # imm = 0x975
	cmpq	48(%rsp), %rsi
	je	.LBB12_59
# %bb.58:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_61
.LBB12_59:
.Ltmp48:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp49:
# %bb.60:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit70_crit_edge
	movq	40(%rsp), %rsi
.LBB12_61:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit70
	movabsq	$47244640258, %rax              # imm = 0xB00000002
	movq	%rax, 8(%rsp)
	movl	$1625, 16(%rsp)                 # imm = 0x659
	cmpq	48(%rsp), %rsi
	je	.LBB12_63
# %bb.62:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_65
.LBB12_63:
.Ltmp51:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp52:
# %bb.64:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit73_crit_edge
	movq	40(%rsp), %rsi
.LBB12_65:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit73
	movabsq	$51539607554, %rax              # imm = 0xC00000002
	movq	%rax, 8(%rsp)
	movl	$765, 16(%rsp)                  # imm = 0x2FD
	cmpq	48(%rsp), %rsi
	je	.LBB12_67
# %bb.66:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_69
.LBB12_67:
.Ltmp54:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp55:
# %bb.68:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit76_crit_edge
	movq	40(%rsp), %rsi
.LBB12_69:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit76
	movabsq	$17179869187, %rax              # imm = 0x400000003
	movq	%rax, 8(%rsp)
	movl	$330, 16(%rsp)                  # imm = 0x14A
	cmpq	48(%rsp), %rsi
	je	.LBB12_71
# %bb.70:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_73
.LBB12_71:
.Ltmp57:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp58:
# %bb.72:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit79_crit_edge
	movq	40(%rsp), %rsi
.LBB12_73:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit79
	movabsq	$21474836483, %rax              # imm = 0x500000003
	movq	%rax, 8(%rsp)
	movl	$547, 16(%rsp)                  # imm = 0x223
	cmpq	48(%rsp), %rsi
	je	.LBB12_75
# %bb.74:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_77
.LBB12_75:
.Ltmp60:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp61:
# %bb.76:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit82_crit_edge
	movq	40(%rsp), %rsi
.LBB12_77:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit82
	movabsq	$51539607555, %rax              # imm = 0xC00000003
	movq	%rax, 8(%rsp)
	movl	$561, 16(%rsp)                  # imm = 0x231
	cmpq	48(%rsp), %rsi
	je	.LBB12_79
# %bb.78:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_81
.LBB12_79:
.Ltmp63:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp64:
# %bb.80:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit85_crit_edge
	movq	40(%rsp), %rsi
.LBB12_81:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit85
	movabsq	$21474836484, %rax              # imm = 0x500000004
	movq	%rax, 8(%rsp)
	movl	$226, 16(%rsp)
	cmpq	48(%rsp), %rsi
	je	.LBB12_83
# %bb.82:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_85
.LBB12_83:
.Ltmp66:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp67:
# %bb.84:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit88_crit_edge
	movq	40(%rsp), %rsi
.LBB12_85:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit88
	movabsq	$25769803780, %rax              # imm = 0x600000004
	movq	%rax, 8(%rsp)
	movl	$912, 16(%rsp)                  # imm = 0x390
	cmpq	48(%rsp), %rsi
	je	.LBB12_87
# %bb.86:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_89
.LBB12_87:
.Ltmp69:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp70:
# %bb.88:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit91_crit_edge
	movq	40(%rsp), %rsi
.LBB12_89:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit91
	movabsq	$25769803781, %rax              # imm = 0x600000005
	movq	%rax, 8(%rsp)
	movl	$689, 16(%rsp)                  # imm = 0x2B1
	cmpq	48(%rsp), %rsi
	je	.LBB12_91
# %bb.90:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_93
.LBB12_91:
.Ltmp72:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp73:
# %bb.92:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit94_crit_edge
	movq	40(%rsp), %rsi
.LBB12_93:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit94
	movabsq	$30064771077, %rax              # imm = 0x700000005
	movq	%rax, 8(%rsp)
	movl	$731, 16(%rsp)                  # imm = 0x2DB
	cmpq	48(%rsp), %rsi
	je	.LBB12_95
# %bb.94:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_97
.LBB12_95:
.Ltmp75:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp76:
# %bb.96:                               # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit97_crit_edge
	movq	40(%rsp), %rsi
.LBB12_97:                              # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit97
	movabsq	$47244640261, %rax              # imm = 0xB00000005
	movq	%rax, 8(%rsp)
	movl	$1199, 16(%rsp)                 # imm = 0x4AF
	cmpq	48(%rsp), %rsi
	je	.LBB12_99
# %bb.98:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_101
.LBB12_99:
.Ltmp78:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp79:
# %bb.100:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit100_crit_edge
	movq	40(%rsp), %rsi
.LBB12_101:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit100
	movabsq	$51539607557, %rax              # imm = 0xC00000005
	movq	%rax, 8(%rsp)
	movl	$213, 16(%rsp)
	cmpq	48(%rsp), %rsi
	je	.LBB12_103
# %bb.102:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_105
.LBB12_103:
.Ltmp81:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp82:
# %bb.104:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit103_crit_edge
	movq	40(%rsp), %rsi
.LBB12_105:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit103
	movabsq	$30064771078, %rax              # imm = 0x700000006
	movq	%rax, 8(%rsp)
	movl	$224, 16(%rsp)
	cmpq	48(%rsp), %rsi
	je	.LBB12_107
# %bb.106:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_109
.LBB12_107:
.Ltmp84:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp85:
# %bb.108:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit106_crit_edge
	movq	40(%rsp), %rsi
.LBB12_109:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit106
	movabsq	$34359738374, %rax              # imm = 0x800000006
	movq	%rax, 8(%rsp)
	movl	$1378, 16(%rsp)                 # imm = 0x562
	cmpq	48(%rsp), %rsi
	je	.LBB12_111
# %bb.110:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_113
.LBB12_111:
.Ltmp87:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp88:
# %bb.112:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit109_crit_edge
	movq	40(%rsp), %rsi
.LBB12_113:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit109
	movabsq	$34359738375, %rax              # imm = 0x800000007
	movq	%rax, 8(%rsp)
	movl	$1234, 16(%rsp)                 # imm = 0x4D2
	cmpq	48(%rsp), %rsi
	je	.LBB12_115
# %bb.114:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_117
.LBB12_115:
.Ltmp90:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp91:
# %bb.116:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit112_crit_edge
	movq	40(%rsp), %rsi
.LBB12_117:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit112
	movabsq	$47244640263, %rax              # imm = 0xB00000007
	movq	%rax, 8(%rsp)
	movl	$641, 16(%rsp)                  # imm = 0x281
	cmpq	48(%rsp), %rsi
	je	.LBB12_119
# %bb.118:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_121
.LBB12_119:
.Ltmp93:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp94:
# %bb.120:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit115_crit_edge
	movq	40(%rsp), %rsi
.LBB12_121:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit115
	movabsq	$51539607559, %rax              # imm = 0xC00000007
	movq	%rax, 8(%rsp)
	movl	$631, 16(%rsp)                  # imm = 0x277
	cmpq	48(%rsp), %rsi
	je	.LBB12_123
# %bb.122:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_125
.LBB12_123:
.Ltmp96:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp97:
# %bb.124:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit118_crit_edge
	movq	40(%rsp), %rsi
.LBB12_125:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit118
	movabsq	$38654705672, %rax              # imm = 0x900000008
	movq	%rax, 8(%rsp)
	movl	$337, 16(%rsp)                  # imm = 0x151
	cmpq	48(%rsp), %rsi
	je	.LBB12_127
# %bb.126:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_129
.LBB12_127:
.Ltmp99:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp100:
# %bb.128:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit121_crit_edge
	movq	40(%rsp), %rsi
.LBB12_129:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit121
	movabsq	$47244640264, %rax              # imm = 0xB00000008
	movq	%rax, 8(%rsp)
	movl	$861, 16(%rsp)                  # imm = 0x35D
	cmpq	48(%rsp), %rsi
	je	.LBB12_131
# %bb.130:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_133
.LBB12_131:
.Ltmp102:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp103:
# %bb.132:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit124_crit_edge
	movq	40(%rsp), %rsi
.LBB12_133:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit124
	movabsq	$42949672969, %rax              # imm = 0xA00000009
	movq	%rax, 8(%rsp)
	movl	$678, 16(%rsp)                  # imm = 0x2A6
	cmpq	48(%rsp), %rsi
	je	.LBB12_135
# %bb.134:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_137
.LBB12_135:
.Ltmp105:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp106:
# %bb.136:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit127_crit_edge
	movq	40(%rsp), %rsi
.LBB12_137:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit127
	movabsq	$47244640265, %rax              # imm = 0xB00000009
	movq	%rax, 8(%rsp)
	movl	$967, 16(%rsp)                  # imm = 0x3C7
	cmpq	48(%rsp), %rsi
	je	.LBB12_139
# %bb.138:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_141
.LBB12_139:
.Ltmp108:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp109:
# %bb.140:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit130_crit_edge
	movq	40(%rsp), %rsi
.LBB12_141:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit130
	movabsq	$47244640266, %rax              # imm = 0xB0000000A
	movq	%rax, 8(%rsp)
	movl	$1024, 16(%rsp)                 # imm = 0x400
	cmpq	48(%rsp), %rsi
	je	.LBB12_143
# %bb.142:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	movq	40(%rsp), %rsi
	addq	$12, %rsi
	movq	%rsi, 40(%rsp)
	jmp	.LBB12_145
.LBB12_143:
.Ltmp111:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp112:
# %bb.144:                              # %._ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit133_crit_edge
	movq	40(%rsp), %rsi
.LBB12_145:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit133
	movabsq	$51539607563, %rax              # imm = 0xC0000000B
	movq	%rax, 8(%rsp)
	movl	$1013, 16(%rsp)                 # imm = 0x3F5
	cmpq	48(%rsp), %rsi
	je	.LBB12_147
# %bb.146:
	movl	16(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	8(%rsp), %rax
	movq	%rax, (%rsi)
	addq	$12, 40(%rsp)
	jmp	.LBB12_148
.LBB12_147:
.Ltmp114:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp115:
.LBB12_148:                             # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit136
.Ltmp117:
	leaq	8(%rsp), %rdi
	leaq	32(%rsp), %rsi
	movl	$30, %edx
	callq	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
.Ltmp118:
# %bb.149:
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_Z17load_kernelArraysRK5Graph
	movq	%rbx, %rdi
	callq	_Z10printGraphRK5Graph
	movq	nonEmptyIndices+16(%rip), %rdx
	movl	nonEmptyIndices+24(%rip), %esi
	movq	nonEmptyIndices(%rip), %rax
	movq	%rdx, %rcx
	subq	%rax, %rcx
	shlq	$3, %rcx
	addq	%rsi, %rcx
	je	.LBB12_153
# %bb.150:                              # %.lr.ph.preheader
	leal	(%rsi,%rdx,8), %ebx
	leal	(,%rax,8), %edx
	subl	%edx, %ebx
	xorl	%edx, %edx
.LBB12_151:                             # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, %esi
	shrl	$6, %esi
	movq	(%rax,%rsi,8), %rsi
	btq	%rdx, %rsi
	jb	.LBB12_154
# %bb.152:                              #   in Loop: Header=BB12_151 Depth=1
	incq	%rdx
	cmpq	%rdx, %rcx
	ja	.LBB12_151
	jmp	.LBB12_155
.LBB12_153:
	xorl	%ebx, %ebx
	jmp	.LBB12_155
.LBB12_154:                             # %._crit_edge.loopexit.split.loop.exit
	movl	%edx, %ebx
.LBB12_155:                             # %._crit_edge
.Ltmp120:
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
.Ltmp121:
# %bb.156:
.Ltmp122:
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
.Ltmp123:
# %bb.157:
	movq	72(%rsp), %rdi
.Ltmp124:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp125:
# %bb.158:
.Ltmp126:
	leaq	8(%rsp), %rdi
	movl	$30, %esi
	movl	%ebx, %edx
	callq	_Z7primMSTRK5Graphii
.Ltmp127:
# %bb.159:
	movq	56(%rsp), %rdi
.Ltmp128:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp129:
# %bb.160:
	movq	56(%rsp), %rdi
.Ltmp130:
	callq	hipEventSynchronize
.Ltmp131:
# %bb.161:
	movq	72(%rsp), %rsi
	movq	56(%rsp), %rdx
.Ltmp133:
	leaq	68(%rsp), %rdi
	callq	hipEventElapsedTime
.Ltmp134:
# %bb.162:
	cvtss2sd	68(%rsp), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movq	T_index(%rip), %rax
	cmpl	$0, (%rax)
	jle	.LBB12_165
# %bb.163:                              # %.lr.ph146.preheader
	xorl	%ebx, %ebx
.LBB12_164:                             # %.lr.ph146
                                        # =>This Inner Loop Header: Depth=1
	movq	T(%rip), %rax
	movl	(%rax,%rbx,8), %esi
	movl	4(%rax,%rbx,8), %edx
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	movq	T_index(%rip), %rax
	movslq	(%rax), %rax
	cmpq	%rax, %rbx
	jl	.LBB12_164
.LBB12_165:                             # %._crit_edge147
	leaq	8(%rsp), %rdi
	callq	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_167
# %bb.166:
	callq	_ZdlPv
.LBB12_167:                             # %_ZNSt6vectorI4edgeSaIS0_EED2Ev.exit
	xorl	%eax, %eax
	addq	$80, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB12_168:
	.cfi_def_cfa_offset 96
.Ltmp116:
	jmp	.LBB12_208
.LBB12_169:
.Ltmp113:
	jmp	.LBB12_208
.LBB12_170:
.Ltmp110:
	jmp	.LBB12_208
.LBB12_171:
.Ltmp107:
	jmp	.LBB12_208
.LBB12_172:
.Ltmp104:
	jmp	.LBB12_208
.LBB12_173:
.Ltmp101:
	jmp	.LBB12_208
.LBB12_174:
.Ltmp98:
	jmp	.LBB12_208
.LBB12_175:
.Ltmp95:
	jmp	.LBB12_208
.LBB12_176:
.Ltmp92:
	jmp	.LBB12_208
.LBB12_177:
.Ltmp89:
	jmp	.LBB12_208
.LBB12_178:
.Ltmp86:
	jmp	.LBB12_208
.LBB12_179:
.Ltmp83:
	jmp	.LBB12_208
.LBB12_180:
.Ltmp80:
	jmp	.LBB12_208
.LBB12_181:
.Ltmp77:
	jmp	.LBB12_208
.LBB12_182:
.Ltmp74:
	jmp	.LBB12_208
.LBB12_183:
.Ltmp71:
	jmp	.LBB12_208
.LBB12_184:
.Ltmp68:
	jmp	.LBB12_208
.LBB12_185:
.Ltmp65:
	jmp	.LBB12_208
.LBB12_186:
.Ltmp62:
	jmp	.LBB12_208
.LBB12_187:
.Ltmp59:
	jmp	.LBB12_208
.LBB12_188:
.Ltmp56:
	jmp	.LBB12_208
.LBB12_189:
.Ltmp53:
	jmp	.LBB12_208
.LBB12_190:
.Ltmp50:
	jmp	.LBB12_208
.LBB12_191:
.Ltmp47:
	jmp	.LBB12_208
.LBB12_192:
.Ltmp44:
	jmp	.LBB12_208
.LBB12_193:
.Ltmp41:
	jmp	.LBB12_208
.LBB12_194:
.Ltmp38:
	jmp	.LBB12_208
.LBB12_195:
.Ltmp35:
	jmp	.LBB12_208
.LBB12_196:
.Ltmp32:
	jmp	.LBB12_208
.LBB12_197:
.Ltmp29:
	jmp	.LBB12_208
.LBB12_198:
.Ltmp26:
	jmp	.LBB12_208
.LBB12_199:
.Ltmp23:
	jmp	.LBB12_208
.LBB12_200:
.Ltmp20:
	jmp	.LBB12_208
.LBB12_201:
.Ltmp17:
	jmp	.LBB12_208
.LBB12_202:
.Ltmp14:
	jmp	.LBB12_208
.LBB12_203:
.Ltmp11:
	jmp	.LBB12_208
.LBB12_204:
.Ltmp8:
	jmp	.LBB12_208
.LBB12_205:
.Ltmp135:
	jmp	.LBB12_210
.LBB12_206:
.Ltmp119:
	jmp	.LBB12_208
.LBB12_207:
.Ltmp5:
.LBB12_208:
	movq	%rax, %rbx
	jmp	.LBB12_211
.LBB12_209:
.Ltmp132:
.LBB12_210:
	movq	%rax, %rbx
	leaq	8(%rsp), %rdi
	callq	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
.LBB12_211:
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_213
# %bb.212:
	callq	_ZdlPv
.LBB12_213:                             # %_ZNSt6vectorI4edgeSaIS0_EED2Ev.exit138
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end12:
	.size	main, .Lfunc_end12-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table12:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp3-.Lfunc_begin1           # >> Call Site 1 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin1           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin1           # >> Call Site 2 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin1           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin1           # >> Call Site 3 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin1          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin1          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin1          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp19-.Ltmp18                #   Call between .Ltmp18 and .Ltmp19
	.uleb128 .Ltmp20-.Lfunc_begin1          #     jumps to .Ltmp20
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp21-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Ltmp22-.Ltmp21                #   Call between .Ltmp21 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin1          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin1          # >> Call Site 8 <<
	.uleb128 .Ltmp25-.Ltmp24                #   Call between .Ltmp24 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin1          #     jumps to .Ltmp26
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin1          # >> Call Site 9 <<
	.uleb128 .Ltmp28-.Ltmp27                #   Call between .Ltmp27 and .Ltmp28
	.uleb128 .Ltmp29-.Lfunc_begin1          #     jumps to .Ltmp29
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin1          # >> Call Site 10 <<
	.uleb128 .Ltmp31-.Ltmp30                #   Call between .Ltmp30 and .Ltmp31
	.uleb128 .Ltmp32-.Lfunc_begin1          #     jumps to .Ltmp32
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin1          # >> Call Site 11 <<
	.uleb128 .Ltmp34-.Ltmp33                #   Call between .Ltmp33 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin1          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin1          # >> Call Site 12 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin1          #     jumps to .Ltmp38
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin1          # >> Call Site 13 <<
	.uleb128 .Ltmp40-.Ltmp39                #   Call between .Ltmp39 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin1          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin1          # >> Call Site 14 <<
	.uleb128 .Ltmp43-.Ltmp42                #   Call between .Ltmp42 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin1          #     jumps to .Ltmp44
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin1          # >> Call Site 15 <<
	.uleb128 .Ltmp46-.Ltmp45                #   Call between .Ltmp45 and .Ltmp46
	.uleb128 .Ltmp47-.Lfunc_begin1          #     jumps to .Ltmp47
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin1          # >> Call Site 16 <<
	.uleb128 .Ltmp49-.Ltmp48                #   Call between .Ltmp48 and .Ltmp49
	.uleb128 .Ltmp50-.Lfunc_begin1          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin1          # >> Call Site 17 <<
	.uleb128 .Ltmp52-.Ltmp51                #   Call between .Ltmp51 and .Ltmp52
	.uleb128 .Ltmp53-.Lfunc_begin1          #     jumps to .Ltmp53
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp54-.Lfunc_begin1          # >> Call Site 18 <<
	.uleb128 .Ltmp55-.Ltmp54                #   Call between .Ltmp54 and .Ltmp55
	.uleb128 .Ltmp56-.Lfunc_begin1          #     jumps to .Ltmp56
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin1          # >> Call Site 19 <<
	.uleb128 .Ltmp58-.Ltmp57                #   Call between .Ltmp57 and .Ltmp58
	.uleb128 .Ltmp59-.Lfunc_begin1          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin1          # >> Call Site 20 <<
	.uleb128 .Ltmp61-.Ltmp60                #   Call between .Ltmp60 and .Ltmp61
	.uleb128 .Ltmp62-.Lfunc_begin1          #     jumps to .Ltmp62
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin1          # >> Call Site 21 <<
	.uleb128 .Ltmp64-.Ltmp63                #   Call between .Ltmp63 and .Ltmp64
	.uleb128 .Ltmp65-.Lfunc_begin1          #     jumps to .Ltmp65
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin1          # >> Call Site 22 <<
	.uleb128 .Ltmp67-.Ltmp66                #   Call between .Ltmp66 and .Ltmp67
	.uleb128 .Ltmp68-.Lfunc_begin1          #     jumps to .Ltmp68
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp69-.Lfunc_begin1          # >> Call Site 23 <<
	.uleb128 .Ltmp70-.Ltmp69                #   Call between .Ltmp69 and .Ltmp70
	.uleb128 .Ltmp71-.Lfunc_begin1          #     jumps to .Ltmp71
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp72-.Lfunc_begin1          # >> Call Site 24 <<
	.uleb128 .Ltmp73-.Ltmp72                #   Call between .Ltmp72 and .Ltmp73
	.uleb128 .Ltmp74-.Lfunc_begin1          #     jumps to .Ltmp74
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp75-.Lfunc_begin1          # >> Call Site 25 <<
	.uleb128 .Ltmp76-.Ltmp75                #   Call between .Ltmp75 and .Ltmp76
	.uleb128 .Ltmp77-.Lfunc_begin1          #     jumps to .Ltmp77
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp78-.Lfunc_begin1          # >> Call Site 26 <<
	.uleb128 .Ltmp79-.Ltmp78                #   Call between .Ltmp78 and .Ltmp79
	.uleb128 .Ltmp80-.Lfunc_begin1          #     jumps to .Ltmp80
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin1          # >> Call Site 27 <<
	.uleb128 .Ltmp82-.Ltmp81                #   Call between .Ltmp81 and .Ltmp82
	.uleb128 .Ltmp83-.Lfunc_begin1          #     jumps to .Ltmp83
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp84-.Lfunc_begin1          # >> Call Site 28 <<
	.uleb128 .Ltmp85-.Ltmp84                #   Call between .Ltmp84 and .Ltmp85
	.uleb128 .Ltmp86-.Lfunc_begin1          #     jumps to .Ltmp86
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp87-.Lfunc_begin1          # >> Call Site 29 <<
	.uleb128 .Ltmp88-.Ltmp87                #   Call between .Ltmp87 and .Ltmp88
	.uleb128 .Ltmp89-.Lfunc_begin1          #     jumps to .Ltmp89
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp90-.Lfunc_begin1          # >> Call Site 30 <<
	.uleb128 .Ltmp91-.Ltmp90                #   Call between .Ltmp90 and .Ltmp91
	.uleb128 .Ltmp92-.Lfunc_begin1          #     jumps to .Ltmp92
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp93-.Lfunc_begin1          # >> Call Site 31 <<
	.uleb128 .Ltmp94-.Ltmp93                #   Call between .Ltmp93 and .Ltmp94
	.uleb128 .Ltmp95-.Lfunc_begin1          #     jumps to .Ltmp95
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp96-.Lfunc_begin1          # >> Call Site 32 <<
	.uleb128 .Ltmp97-.Ltmp96                #   Call between .Ltmp96 and .Ltmp97
	.uleb128 .Ltmp98-.Lfunc_begin1          #     jumps to .Ltmp98
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp99-.Lfunc_begin1          # >> Call Site 33 <<
	.uleb128 .Ltmp100-.Ltmp99               #   Call between .Ltmp99 and .Ltmp100
	.uleb128 .Ltmp101-.Lfunc_begin1         #     jumps to .Ltmp101
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp102-.Lfunc_begin1         # >> Call Site 34 <<
	.uleb128 .Ltmp103-.Ltmp102              #   Call between .Ltmp102 and .Ltmp103
	.uleb128 .Ltmp104-.Lfunc_begin1         #     jumps to .Ltmp104
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp105-.Lfunc_begin1         # >> Call Site 35 <<
	.uleb128 .Ltmp106-.Ltmp105              #   Call between .Ltmp105 and .Ltmp106
	.uleb128 .Ltmp107-.Lfunc_begin1         #     jumps to .Ltmp107
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp108-.Lfunc_begin1         # >> Call Site 36 <<
	.uleb128 .Ltmp109-.Ltmp108              #   Call between .Ltmp108 and .Ltmp109
	.uleb128 .Ltmp110-.Lfunc_begin1         #     jumps to .Ltmp110
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp111-.Lfunc_begin1         # >> Call Site 37 <<
	.uleb128 .Ltmp112-.Ltmp111              #   Call between .Ltmp111 and .Ltmp112
	.uleb128 .Ltmp113-.Lfunc_begin1         #     jumps to .Ltmp113
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp114-.Lfunc_begin1         # >> Call Site 38 <<
	.uleb128 .Ltmp115-.Ltmp114              #   Call between .Ltmp114 and .Ltmp115
	.uleb128 .Ltmp116-.Lfunc_begin1         #     jumps to .Ltmp116
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp117-.Lfunc_begin1         # >> Call Site 39 <<
	.uleb128 .Ltmp118-.Ltmp117              #   Call between .Ltmp117 and .Ltmp118
	.uleb128 .Ltmp119-.Lfunc_begin1         #     jumps to .Ltmp119
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp120-.Lfunc_begin1         # >> Call Site 40 <<
	.uleb128 .Ltmp131-.Ltmp120              #   Call between .Ltmp120 and .Ltmp131
	.uleb128 .Ltmp132-.Lfunc_begin1         #     jumps to .Ltmp132
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp133-.Lfunc_begin1         # >> Call Site 41 <<
	.uleb128 .Ltmp134-.Ltmp133              #   Call between .Ltmp133 and .Ltmp134
	.uleb128 .Ltmp135-.Lfunc_begin1         #     jumps to .Ltmp135
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp134-.Lfunc_begin1         # >> Call Site 42 <<
	.uleb128 .Lfunc_end12-.Ltmp134          #   Call between .Ltmp134 and .Lfunc_end12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,"axG",@progbits,_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,comdat
	.weak	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi # -- Begin function _ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
	.p2align	1, 0x90
	.type	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,@function
_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi: # @_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	movslq	%edx, %r15
.Ltmp136:
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	callq	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm
.Ltmp137:
# %bb.1:
.Ltmp138:
	movl	$nonEmptyIndices, %edi
	movq	%r15, %rsi
	xorl	%edx, %edx
	callq	_ZNSt6vectorIbSaIbEE6resizeEmb
.Ltmp139:
# %bb.2:
	movq	(%r14), %r13
	movq	8(%r14), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	cmpq	%rax, %r13
	je	.LBB13_3
.LBB13_5:                               # =>This Inner Loop Header: Depth=1
	movl	(%r13), %ebp
	movl	4(%r13), %r14d
	movl	8(%r13), %ebx
	movslq	%ebp, %r15
	movq	24(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rax
	leaq	(%r15,%r15,2), %rcx
	leaq	(%rax,%rcx,8), %rdi
	movl	%r15d, 12(%rsp)
	movl	%r14d, 16(%rsp)
	movl	%ebx, 20(%rsp)
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB13_7
# %bb.6:                                #   in Loop: Header=BB13_5 Depth=1
	movl	20(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	12(%rsp), %rax
	movq	%rax, (%rsi)
	addq	$12, 8(%rdi)
	jmp	.LBB13_8
.LBB13_7:                               #   in Loop: Header=BB13_5 Depth=1
.Ltmp141:
	leaq	12(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp142:
.LBB13_8:                               # %_ZNSt6vectorI4edgeSaIS0_EE9push_backEOS0_.exit
                                        #   in Loop: Header=BB13_5 Depth=1
	movslq	%r14d, %r12
	movq	24(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rax
	leaq	(%r12,%r12,2), %rcx
	leaq	(%rax,%rcx,8), %rdi
	movl	%r14d, 12(%rsp)
	movl	%ebp, 16(%rsp)
	movl	%ebx, 20(%rsp)
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB13_10
# %bb.9:                                #   in Loop: Header=BB13_5 Depth=1
	movl	20(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	12(%rsp), %rax
	movq	%rax, (%rsi)
	addq	$12, 8(%rdi)
	jmp	.LBB13_11
.LBB13_10:                              #   in Loop: Header=BB13_5 Depth=1
.Ltmp144:
	leaq	12(%rsp), %rdx
	callq	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp145:
.LBB13_11:                              #   in Loop: Header=BB13_5 Depth=1
	movq	nonEmptyIndices(%rip), %rax
	leal	63(%rbp), %ecx
	testl	%ebp, %ebp
	cmovnsl	%ebp, %ecx
	movl	%ecx, %edx
	sarl	$6, %edx
	movslq	%edx, %rdx
	leaq	(%rax,%rdx,8), %rdx
	andl	$-64, %ecx
	subl	%ecx, %ebp
	sarl	$31, %ebp
	movl	$1, %esi
	movl	%r15d, %ecx
	shlq	%cl, %rsi
	movslq	%ebp, %rcx
	orq	%rsi, (%rdx,%rcx,8)
	leal	63(%r14), %ecx
	testl	%r14d, %r14d
	cmovnsl	%r14d, %ecx
	movl	%ecx, %edx
	sarl	$6, %edx
	movslq	%edx, %rdx
	leaq	(%rax,%rdx,8), %rax
	andl	$-64, %ecx
	subl	%ecx, %r14d
	sarl	$31, %r14d
	movl	$1, %edx
	movl	%r12d, %ecx
	shlq	%cl, %rdx
	movslq	%r14d, %rcx
	orq	%rdx, (%rax,%rcx,8)
	addq	$12, %r13
	cmpq	32(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB13_5
.LBB13_3:                               # %._crit_edge
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_4:
	.cfi_def_cfa_offset 96
.Ltmp140:
	jmp	.LBB13_14
.LBB13_12:
.Ltmp143:
	jmp	.LBB13_14
.LBB13_13:
.Ltmp146:
.LBB13_14:
	movq	%rax, %r14
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end13:
	.size	_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi, .Lfunc_end13-_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi
	.cfi_endproc
	.section	.gcc_except_table._ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,"aG",@progbits,_ZN5GraphC2ERKSt6vectorI4edgeSaIS1_EEi,comdat
	.p2align	2, 0x0
GCC_except_table13:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Ltmp136-.Lfunc_begin2         # >> Call Site 1 <<
	.uleb128 .Ltmp139-.Ltmp136              #   Call between .Ltmp136 and .Ltmp139
	.uleb128 .Ltmp140-.Lfunc_begin2         #     jumps to .Ltmp140
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp141-.Lfunc_begin2         # >> Call Site 2 <<
	.uleb128 .Ltmp142-.Ltmp141              #   Call between .Ltmp141 and .Ltmp142
	.uleb128 .Ltmp143-.Lfunc_begin2         #     jumps to .Ltmp143
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp144-.Lfunc_begin2         # >> Call Site 3 <<
	.uleb128 .Ltmp145-.Ltmp144              #   Call between .Ltmp144 and .Ltmp145
	.uleb128 .Ltmp146-.Lfunc_begin2         #     jumps to .Ltmp146
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp145-.Lfunc_begin2         # >> Call Site 4 <<
	.uleb128 .Lfunc_end13-.Ltmp145          #   Call between .Ltmp145 and .Lfunc_end13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end14:
	.size	__clang_call_terminate, .Lfunc_end14-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm,"axG",@progbits,_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm,comdat
	.weak	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm # -- Begin function _ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm,@function
_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm: # @_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rcx
	movq	8(%rdi), %r14
	movq	%r14, %rax
	subq	%rcx, %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %rdx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdx
	movq	%rsi, %rax
	subq	%rdx, %rax
	jbe	.LBB15_1
# %bb.9:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm # TAILCALL
.LBB15_1:
	.cfi_def_cfa_offset 48
	jae	.LBB15_8
# %bb.2:
	leaq	(%rsi,%rsi,2), %rax
	leaq	(%rcx,%rax,8), %r15
	cmpq	%r15, %r14
	je	.LBB15_8
# %bb.3:                                # %.lr.ph.i.i.i.i.preheader
	movq	%r15, %r12
.LBB15_4:                               # %.lr.ph.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r12), %rdi
	testq	%rdi, %rdi
	je	.LBB15_6
# %bb.5:                                #   in Loop: Header=BB15_4 Depth=1
	callq	_ZdlPv
.LBB15_6:                               # %_ZSt8_DestroyISt6vectorI4edgeSaIS1_EEEvPT_.exit.i.i.i.i
                                        #   in Loop: Header=BB15_4 Depth=1
	addq	$24, %r12
	cmpq	%r14, %r12
	jne	.LBB15_4
# %bb.7:                                # %_ZSt8_DestroyIPSt6vectorI4edgeSaIS1_EES3_EvT_S5_RSaIT0_E.exit.i
	movq	%r15, 8(%rbx)
.LBB15_8:                               # %_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE15_M_erase_at_endEPS2_.exit
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm, .Lfunc_end15-_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE6resizeEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIbSaIbEE6resizeEmb,"axG",@progbits,_ZNSt6vectorIbSaIbEE6resizeEmb,comdat
	.weak	_ZNSt6vectorIbSaIbEE6resizeEmb  # -- Begin function _ZNSt6vectorIbSaIbEE6resizeEmb
	.p2align	1, 0x90
	.type	_ZNSt6vectorIbSaIbEE6resizeEmb,@function
_ZNSt6vectorIbSaIbEE6resizeEmb:         # @_ZNSt6vectorIbSaIbEE6resizeEmb
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %r8
	movq	16(%rdi), %rax
	movl	24(%rdi), %r9d
	movq	%rax, %rcx
	subq	%r8, %rcx
	leaq	(%r9,%rcx,8), %r10
	movq	%rsi, %rcx
	subq	%r10, %rcx
	jae	.LBB16_2
# %bb.1:
	leaq	63(%rsi), %rax
	testq	%rsi, %rsi
	cmovnsq	%rsi, %rax
	movq	%rax, %rcx
	sarq	$6, %rcx
	leaq	(%r8,%rcx,8), %rcx
	andq	$-64, %rax
	movq	%rsi, %rdx
	subq	%rax, %rdx
	sarq	$63, %rdx
	leaq	(%rcx,%rdx,8), %rax
	andl	$63, %esi
	movq	%rax, 16(%rdi)
	movl	%esi, 24(%rdi)
	retq
.LBB16_2:
	movzbl	%dl, %r8d
	movq	%rax, %rsi
	movl	%r9d, %edx
	jmp	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb # TAILCALL
.Lfunc_end16:
	.size	_ZNSt6vectorIbSaIbEE6resizeEmb, .Lfunc_end16-_ZNSt6vectorIbSaIbEE6resizeEmb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev,comdat
	.weak	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev # -- Begin function _ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev,@function
_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev: # @_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	(%rdi), %rbx
	movq	8(%rdi), %r15
	cmpq	%r15, %rbx
	je	.LBB17_6
# %bb.1:                                # %.lr.ph.i.i.i.preheader
	movq	%rdi, %r14
.LBB17_2:                               # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB17_4
# %bb.3:                                #   in Loop: Header=BB17_2 Depth=1
	callq	_ZdlPv
.LBB17_4:                               # %_ZSt8_DestroyISt6vectorI4edgeSaIS1_EEEvPT_.exit.i.i.i
                                        #   in Loop: Header=BB17_2 Depth=1
	addq	$24, %rbx
	cmpq	%r15, %rbx
	jne	.LBB17_2
# %bb.5:                                # %_ZSt8_DestroyIPSt6vectorI4edgeSaIS1_EES3_EvT_S5_RSaIT0_E.exitthread-pre-split
	movq	(%r14), %rbx
.LBB17_6:                               # %_ZSt8_DestroyIPSt6vectorI4edgeSaIS1_EES3_EvT_S5_RSaIT0_E.exit
	testq	%rbx, %rbx
	je	.LBB17_7
# %bb.8:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.LBB17_7:                               # %_ZNSt12_Vector_baseISt6vectorI4edgeSaIS1_EESaIS3_EED2Ev.exit
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev, .Lfunc_end17-_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm,comdat
	.weak	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm # -- Begin function _ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm,@function
_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm: # @_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB18_13
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	8(%rdi), %r15
	movabsq	$-6148914691236517205, %rax     # imm = 0xAAAAAAAAAAAAAAAB
	movq	16(%rdi), %rcx
	subq	%r15, %rcx
	sarq	$3, %rcx
	imulq	%rax, %rcx
	cmpq	%rsi, %rcx
	jae	.LBB18_2
# %bb.3:
	movq	(%rbx), %r12
	movq	%r15, %r13
	subq	%r12, %r13
	sarq	$3, %r13
	imulq	%rax, %r13
	movl	$.L.str.14, %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc
	testq	%rax, %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	je	.LBB18_4
# %bb.5:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB18_6
.LBB18_2:                               # %_ZSt27__uninitialized_default_n_aIPSt6vectorI4edgeSaIS1_EEmS3_ET_S5_T0_RSaIT1_E.exit
	shlq	$3, %r14
	leaq	(%r14,%r14,2), %r14
	movq	%r15, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
	addq	%r14, %r15
	movq	%r15, 8(%rbx)
	jmp	.LBB18_12
.LBB18_4:
	xorl	%ebp, %ebp
.LBB18_6:
	leaq	(,%r13,2), %rax
	addq	%r13, %rax
	leaq	(%rbp,%rax,8), %r13
	leaq	(,%r14,8), %rax
	leaq	(%rax,%rax,2), %rdx
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	cmpq	%r15, %r12
	je	.LBB18_9
# %bb.7:                                # %.lr.ph.i.i.i.preheader
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.LBB18_8:                               # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r12,%rax), %rcx
	addq	$24, %rcx
	movq	-24(%rcx), %rdx
	movq	%rdx, (%rbp,%rax)
	movq	-16(%rcx), %rdx
	movq	%rdx, 8(%rbp,%rax)
	movq	-8(%rcx), %rdx
	movq	%rdx, 16(%rbp,%rax)
	movups	%xmm0, -24(%rcx)
	movq	$0, -8(%rcx)
	addq	$24, %rax
	cmpq	%r15, %rcx
	jne	.LBB18_8
.LBB18_9:                               # %_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE11_S_relocateEPS2_S5_S5_RS3_.exit
	testq	%r12, %r12
	je	.LBB18_11
# %bb.10:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB18_11:                              # %_ZNSt12_Vector_baseISt6vectorI4edgeSaIS1_EESaIS3_EE13_M_deallocateEPS3_m.exit37
	movq	%rbp, (%rbx)
	leaq	(%r14,%r14,2), %rax
	leaq	(,%rax,8), %rax
	addq	%r13, %rax
	movq	%rax, 8(%rbx)
	movq	(%rsp), %rax                    # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
.LBB18_12:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB18_13:
	retq
.Lfunc_end18:
	.size	_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm, .Lfunc_end18-_ZNSt6vectorIS_I4edgeSaIS0_EESaIS2_EE17_M_default_appendEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$384307168202282325, %rcx       # imm = 0x555555555555555
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB19_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB19_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end19:
	.size	_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc, .Lfunc_end19-_ZNKSt6vectorIS_I4edgeSaIS0_EESaIS2_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv: # @_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB20_1
# %bb.3:
	shlq	$3, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB20_1:
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jb	.LBB20_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB20_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end20:
	.size	_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv, .Lfunc_end20-_ZNSt15__new_allocatorISt6vectorI4edgeSaIS1_EEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb,"axG",@progbits,_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb,comdat
	.weak	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb # -- Begin function _ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb
	.p2align	1, 0x90
	.type	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb,@function
_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb: # @_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb
	.cfi_startproc
# %bb.0:
	testq	%rcx, %rcx
	je	.LBB21_41
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %r12
	movl	%edx, %r10d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	movl	%r8d, %r15d
	negb	%r15b
	movq	32(%rdi), %rax
	movq	(%rdi), %rsi
	movq	16(%rdi), %rdx
	subq	%rsi, %rax
	shlq	$3, %rax
	movl	24(%rdi), %ecx
	subq	%rdx, %rsi
	subq	%rcx, %rax
	leaq	(%rax,%rsi,8), %rax
	cmpq	%r12, %rax
	jae	.LBB21_2
# %bb.19:
	movl	%r10d, 12(%rsp)                 # 4-byte Spill
	movl	$.L.str.15, %edx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc
	movq	%rax, %r13
	addq	$63, %r13
	shrq	$6, %r13
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorImE8allocateEmPKv
	movq	(%rbx), %rsi
	movq	%r14, %rbp
	subq	%rsi, %rbp
	cmpq	$9, %rbp
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	jl	.LBB21_21
# %bb.20:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%rbp, %rdx
	callq	memmove@PLT
	movq	16(%rsp), %rax                  # 8-byte Reload
.LBB21_23:                              # %_ZNSt6vectorIbSaIbEE15_M_copy_alignedESt19_Bit_const_iteratorS2_St13_Bit_iterator.exit
	addq	%rax, %rbp
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movq	%rbp, %r8
	xorl	%r9d, %r9d
	callq	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_
	movl	%edx, %edx
	movq	%rdx, %rbp
	addq	%r12, %rbp
	leaq	63(%rdx,%r12), %rcx
	cmovnsq	%rbp, %rcx
	movq	%rcx, %rsi
	sarq	$6, %rsi
	leaq	(%rax,%rsi,8), %rsi
	andq	$-64, %rcx
	movq	%rbp, %rdi
	subq	%rcx, %rdi
	sarq	$63, %rdi
	leaq	(%rsi,%rdi,8), %r12
	andl	$63, %ebp
	cmpq	%r12, %rax
	je	.LBB21_34
# %bb.24:
	testq	%rdx, %rdx
	je	.LBB21_29
# %bb.25:
	movq	$-1, %rsi
	movl	%edx, %ecx
	shlq	%cl, %rsi
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB21_27
# %bb.26:
	orq	(%rax), %rsi
	jmp	.LBB21_28
.LBB21_2:
	leaq	(%rcx,%r12), %rax
	addq	$63, %rax
	movq	%rcx, %r9
	addq	%r12, %r9
	cmovnsq	%r9, %rax
	movq	%rax, %rsi
	sarq	$6, %rsi
	leaq	(%rdx,%rsi,8), %rsi
	andq	$-64, %rax
	movq	%r9, %rdi
	subq	%rax, %rdi
	sarq	$63, %rdi
	leaq	(%rsi,%rdi,8), %r8
	andl	$63, %r9d
	movq	%r14, %rdi
	movl	%r10d, %esi
                                        # kill: def $ecx killed $ecx killed $rcx
                                        # kill: def $r9d killed $r9d killed $r9
	movl	%r10d, %ebp
	callq	_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_
	movl	%ebp, %edi
	movl	%ebp, %eax
	movq	%rax, %r13
	addq	%r12, %r13
	leaq	63(%rax,%r12), %rcx
	cmovnsq	%r13, %rcx
	movq	%rcx, %rdx
	sarq	$6, %rdx
	leaq	(%r14,%rdx,8), %rdx
	andq	$-64, %rcx
	movq	%r13, %rsi
	subq	%rcx, %rsi
	sarq	$63, %rsi
	leaq	(%rdx,%rsi,8), %rbp
	andl	$63, %r13d
	cmpq	%r14, %rbp
	je	.LBB21_13
# %bb.3:
	testl	%edi, %edi
	je	.LBB21_8
# %bb.4:
	movq	$-1, %rdx
	movl	%eax, %ecx
	shlq	%cl, %rdx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB21_6
# %bb.5:
	orq	(%r14), %rdx
	jmp	.LBB21_7
.LBB21_34:
	cmpl	%ebp, %edx
	movl	12(%rsp), %esi                  # 4-byte Reload
	je	.LBB21_39
# %bb.35:
	movl	%ebp, %ecx
	negb	%cl
	movq	$-1, %rdi
	shrq	%cl, %rdi
	movl	%edx, %ecx
	shrq	%cl, %rdi
	shlq	%cl, %rdi
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB21_37
# %bb.36:
	orq	(%rax), %rdi
	jmp	.LBB21_38
.LBB21_13:
	cmpl	%edi, %r13d
	je	.LBB21_18
# %bb.14:
	negb	%r13b
	movq	$-1, %rdx
	movl	%r13d, %ecx
	shrq	%cl, %rdx
	movl	%eax, %ecx
	shrq	%cl, %rdx
	shlq	%cl, %rdx
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB21_16
# %bb.15:
	orq	(%r14), %rdx
	jmp	.LBB21_17
.LBB21_27:
	notq	%rsi
	andq	(%rax), %rsi
.LBB21_28:                              # %_ZSt14__fill_bvectorPmjjb.exit.i.i.i58
	movq	%rsi, (%rax)
	addq	$8, %rax
.LBB21_29:
	movq	%r12, %rdx
	subq	%rax, %rdx
	movzbl	%r15b, %esi
	movq	%rax, %rdi
	callq	memset@PLT
	testl	%ebp, %ebp
	movl	12(%rsp), %esi                  # 4-byte Reload
	je	.LBB21_39
# %bb.30:
	movl	%ebp, %ecx
	negb	%cl
	movq	$-1, %rax
	shrq	%cl, %rax
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB21_32
# %bb.31:
	orq	(%r12), %rax
	jmp	.LBB21_33
.LBB21_6:
	notq	%rdx
	andq	(%r14), %rdx
.LBB21_7:                               # %_ZSt14__fill_bvectorPmjjb.exit.i.i.i
	movq	%rdx, (%r14)
	addq	$8, %r14
.LBB21_8:
	movq	%rbp, %rdx
	subq	%r14, %rdx
	movzbl	%r15b, %esi
	movq	%r14, %rdi
	callq	memset@PLT
	testl	%r13d, %r13d
	je	.LBB21_18
# %bb.9:
	negb	%r13b
	movq	$-1, %rax
	movl	%r13d, %ecx
	shrq	%cl, %rax
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	je	.LBB21_11
# %bb.10:
	orq	(%rbp), %rax
	jmp	.LBB21_12
.LBB21_32:
	notq	%rax
	andq	(%r12), %rax
.LBB21_33:                              # %_ZSt14__fill_bvectorPmjjb.exit29.i.i.i64
	movq	%rax, (%r12)
	jmp	.LBB21_39
.LBB21_11:
	notq	%rax
	andq	(%rbp), %rax
.LBB21_12:                              # %_ZSt14__fill_bvectorPmjjb.exit29.i.i.i
	movq	%rax, (%rbp)
	jmp	.LBB21_18
.LBB21_37:
	notq	%rdi
	andq	(%rax), %rdi
.LBB21_38:                              # %_ZSt14__fill_bvectorPmjjb.exit31.i.i.i68
	movq	%rdi, (%rax)
.LBB21_39:                              # %_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_.exit70
	movq	16(%rbx), %rdx
	movl	24(%rbx), %ecx
	movq	%r14, %rdi
	movq	%r12, %r8
	movl	%ebp, %r9d
	callq	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_
	movq	%rax, %r15
	movl	%edx, %r14d
	movq	%rbx, %rdi
	callq	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%r13,8), %rax
	movq	%rax, 32(%rbx)
	movq	%rcx, (%rbx)
	movl	$0, 8(%rbx)
	movq	%r15, 16(%rbx)
	jmp	.LBB21_40
.LBB21_16:
	notq	%rdx
	andq	(%r14), %rdx
.LBB21_17:                              # %_ZSt14__fill_bvectorPmjjb.exit31.i.i.i
	movq	%rdx, (%r14)
.LBB21_18:                              # %_ZSt4fillISt13_Bit_iteratorbEvT_S1_RKT0_.exit
	movl	24(%rbx), %r14d
	leaq	(%r14,%r12), %rax
	addq	$63, %rax
	addq	%r12, %r14
	cmovnsq	%r14, %rax
	movq	%rax, %rcx
	sarq	$6, %rcx
	shlq	$3, %rcx
	addq	16(%rbx), %rcx
	andq	$-64, %rax
	movq	%r14, %rdx
	subq	%rax, %rdx
	sarq	$63, %rdx
	leaq	(%rcx,%rdx,8), %rax
	movq	%rax, 16(%rbx)
	andl	$63, %r14d
.LBB21_40:                              # %.sink.split
	movl	%r14d, 24(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB21_41:
	retq
.LBB21_21:
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %rbp, -16
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpq	$8, %rbp
	jne	.LBB21_23
# %bb.22:
	movq	(%rsi), %rcx
	movq	%rcx, (%rax)
	jmp	.LBB21_23
.Lfunc_end21:
	.size	_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb, .Lfunc_end21-_ZNSt6vectorIbSaIbEE14_M_fill_insertESt13_Bit_iteratormb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$9223372036854775744, %rcx      # imm = 0x7FFFFFFFFFFFFFC0
	movq	16(%rdi), %rax
	movl	24(%rdi), %r8d
	subq	(%rdi), %rax
	leaq	(%r8,%rax,8), %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB22_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB22_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end22:
	.size	_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc, .Lfunc_end22-_ZNKSt6vectorIbSaIbEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv,"axG",@progbits,_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv,comdat
	.weak	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv # -- Begin function _ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	.p2align	1, 0x90
	.type	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv,@function
_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv: # @_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	.LBB23_2
# %bb.1:
	callq	_ZdlPv
	xorl	%eax, %eax
	movq	%rax, (%rbx)
	movl	%eax, 8(%rbx)
	movq	%rax, 16(%rbx)
	movl	%eax, 24(%rbx)
	movq	%rax, 32(%rbx)
.LBB23_2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv, .Lfunc_end23-_ZNSt13_Bvector_baseISaIbEE13_M_deallocateEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_,"axG",@progbits,_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_,comdat
	.weak	_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_ # -- Begin function _ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_
	.p2align	1, 0x90
	.type	_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_,@function
_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_: # @_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_
	.cfi_startproc
# %bb.0:
	movq	%r8, %rax
	movl	%ecx, %r8d
	movq	%rdx, %r11
	subq	%rdi, %r11
	movl	%ecx, %ecx
	movl	%esi, %r10d
	movq	%rcx, %rsi
	subq	%r10, %rsi
	leaq	(%rsi,%r11,8), %rsi
	testq	%rsi, %rsi
	jle	.LBB24_7
# %bb.1:                                # %_ZNSt13_Bit_iteratormmEv.exit.preheader
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	leaq	(%rcx,%rdx,8), %rsi
	subq	%r10, %rsi
	shlq	$3, %rdi
	subq	%rdi, %rsi
	incq	%rsi
	movl	$63, %edi
.LBB24_2:                               # %_ZNSt13_Bit_iteratormmEv.exit
                                        # =>This Inner Loop Header: Depth=1
	cmpl	$1, %r9d
	movl	$0, %ebx
	sbbq	%rbx, %rbx
	subl	$1, %r9d
	cmovbl	%edi, %r9d
	cmpl	$1, %r8d
	movl	$0, %r10d
	sbbq	%r10, %r10
	subl	$1, %r8d
	cmovbl	%edi, %r8d
	movl	$1, %r11d
	movl	%r9d, %ecx
	shlq	%cl, %r11
	leaq	(%rax,%rbx,8), %rax
	movq	(%rdx,%r10,8), %rcx
	btq	%r8, %rcx
	jae	.LBB24_4
# %bb.3:                                #   in Loop: Header=BB24_2 Depth=1
	orq	(%rax), %r11
	jmp	.LBB24_5
.LBB24_4:                               #   in Loop: Header=BB24_2 Depth=1
	notq	%r11
	andq	(%rax), %r11
.LBB24_5:                               # %_ZNSt14_Bit_referenceaSERKS_.exit
                                        #   in Loop: Header=BB24_2 Depth=1
	leaq	(%rdx,%r10,8), %rdx
	movq	%r11, (%rax)
	decq	%rsi
	cmpq	$1, %rsi
	jg	.LBB24_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB24_7:                               # %._crit_edge
	movl	%r9d, %edx
	retq
.Lfunc_end24:
	.size	_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_, .Lfunc_end24-_ZNSt20__copy_move_backwardILb0ELb0ESt26random_access_iterator_tagE13__copy_move_bISt13_Bit_iteratorS3_EET0_T_S5_S4_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorImE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorImE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorImE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorImE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorImE8allocateEmPKv,@function
_ZNSt15__new_allocatorImE8allocateEmPKv: # @_ZNSt15__new_allocatorImE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB25_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB25_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB25_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB25_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end25:
	.size	_ZNSt15__new_allocatorImE8allocateEmPKv, .Lfunc_end25-_ZNSt15__new_allocatorImE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_,"axG",@progbits,_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_,comdat
	.weak	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_ # -- Begin function _ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_
	.p2align	1, 0x90
	.type	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_,@function
_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_: # @_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
	movq	%r8, %rax
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdx, %r8
	subq	%rdi, %r8
	movl	%ecx, %ecx
	movl	%esi, %r10d
	movq	%rcx, %r11
	subq	%r10, %r11
	leaq	(%r11,%r8,8), %r8
	testq	%r8, %r8
	jle	.LBB26_1
# %bb.3:                                # %.lr.ph.preheader
	leaq	(%rcx,%rdx,8), %r8
	subq	%r10, %r8
	leaq	(,%rdi,8), %rcx
	subq	%rcx, %r8
	incq	%r8
	xorl	%r10d, %r10d
.LBB26_4:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rdi), %r11
	movl	$1, %edx
	movl	%r9d, %ecx
	shlq	%cl, %rdx
	btq	%rsi, %r11
	jae	.LBB26_6
# %bb.5:                                #   in Loop: Header=BB26_4 Depth=1
	orq	(%rax), %rdx
	jmp	.LBB26_7
.LBB26_6:                               #   in Loop: Header=BB26_4 Depth=1
	notq	%rdx
	andq	(%rax), %rdx
.LBB26_7:                               # %_ZNSt14_Bit_referenceaSEb.exit
                                        #   in Loop: Header=BB26_4 Depth=1
	movq	%rdx, (%rax)
	xorl	%ecx, %ecx
	cmpl	$63, %esi
	leal	1(%rsi), %esi
	sete	%cl
	cmovel	%r10d, %esi
	leaq	(%rdi,%rcx,8), %rdi
	leal	1(%r9), %edx
	xorl	%ecx, %ecx
	cmpl	$63, %r9d
	sete	%cl
	cmovel	%r10d, %edx
	leaq	(%rax,%rcx,8), %rax
	decq	%r8
                                        # kill: def $esi killed $esi def $rsi
	movl	%edx, %r9d
	cmpq	$1, %r8
	jg	.LBB26_4
# %bb.2:                                # %._crit_edge
	retq
.LBB26_1:
	movl	%r9d, %edx
	retq
.Lfunc_end26:
	.size	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_, .Lfunc_end26-_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt19_Bit_const_iteratorSt13_Bit_iteratorEET0_T_S6_S5_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_,"axG",@progbits,_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_,comdat
	.weak	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_ # -- Begin function _ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_
	.p2align	1, 0x90
	.type	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_,@function
_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_: # @_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
	movq	%r8, %rax
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdx, %r8
	subq	%rdi, %r8
	movl	%ecx, %ecx
	movl	%esi, %r10d
	movq	%rcx, %r11
	subq	%r10, %r11
	leaq	(%r11,%r8,8), %r8
	testq	%r8, %r8
	jle	.LBB27_1
# %bb.3:                                # %.lr.ph.preheader
	leaq	(%rcx,%rdx,8), %r8
	subq	%r10, %r8
	leaq	(,%rdi,8), %rcx
	subq	%rcx, %r8
	incq	%r8
	xorl	%r10d, %r10d
.LBB27_4:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$1, %edx
	movl	%r9d, %ecx
	shlq	%cl, %rdx
	movq	(%rdi), %rcx
	btq	%rsi, %rcx
	jae	.LBB27_6
# %bb.5:                                #   in Loop: Header=BB27_4 Depth=1
	orq	(%rax), %rdx
	jmp	.LBB27_7
.LBB27_6:                               #   in Loop: Header=BB27_4 Depth=1
	notq	%rdx
	andq	(%rax), %rdx
.LBB27_7:                               # %_ZNSt14_Bit_referenceaSERKS_.exit
                                        #   in Loop: Header=BB27_4 Depth=1
	movq	%rdx, (%rax)
	xorl	%ecx, %ecx
	cmpl	$63, %esi
	leal	1(%rsi), %esi
	sete	%cl
	cmovel	%r10d, %esi
	leaq	(%rdi,%rcx,8), %rdi
	leal	1(%r9), %edx
	xorl	%ecx, %ecx
	cmpl	$63, %r9d
	sete	%cl
	leaq	(%rax,%rcx,8), %rax
	cmovel	%r10d, %edx
	decq	%r8
                                        # kill: def $esi killed $esi def $rsi
	movl	%edx, %r9d
	cmpq	$1, %r8
	jg	.LBB27_4
# %bb.2:                                # %._crit_edge
	retq
.LBB27_1:
	movl	%r9d, %edx
	retq
.Lfunc_end27:
	.size	_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_, .Lfunc_end27-_ZNSt11__copy_moveILb0ELb0ESt26random_access_iterator_tagE8__copy_mISt13_Bit_iteratorS3_EET0_T_S5_S4_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.weak	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_ # -- Begin function _ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,@function
_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_: # @_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.16, %edx
	callq	_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc
	movq	%rax, %rsi
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %rax
	sarq	$2, %rax
	movabsq	$-6148914691236517205, %r14     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %r14
	testq	%rsi, %rsi
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	je	.LBB28_1
# %bb.2:
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorI4edgeE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB28_3
.LBB28_1:
	xorl	%ebp, %ebp
.LBB28_3:                               # %_ZNSt12_Vector_baseI4edgeSaIS0_EE11_M_allocateEm.exit
	leaq	(%r14,%r14,2), %rax
	movq	(%rsp), %rdx                    # 8-byte Reload
	movl	8(%rdx), %ecx
	movl	%ecx, 8(%rbp,%rax,4)
	movq	(%rdx), %rcx
	movq	%rcx, (%rbp,%rax,4)
	testq	%r12, %r12
	jle	.LBB28_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB28_5:                               # %_ZNSt6vectorI4edgeSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	leaq	(%r12,%rbp), %r14
	addq	$12, %r14
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB28_7
# %bb.6:
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB28_7:                               # %_ZNSt6vectorI4edgeSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit16
	testq	%r13, %r13
	je	.LBB28_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB28_9:                               # %_ZNSt12_Vector_baseI4edgeSaIS0_EE13_M_deallocateEPS0_m.exit
	addq	%r15, %r14
	movq	%rbp, (%rbx)
	movq	%r14, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .Lfunc_end28-_ZNSt6vectorI4edgeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$768614336404564650, %rcx       # imm = 0xAAAAAAAAAAAAAAA
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$2, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB29_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB29_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end29:
	.size	_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc, .Lfunc_end29-_ZNKSt6vectorI4edgeSaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorI4edgeE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorI4edgeE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorI4edgeE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorI4edgeE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorI4edgeE8allocateEmPKv,@function
_ZNSt15__new_allocatorI4edgeE8allocateEmPKv: # @_ZNSt15__new_allocatorI4edgeE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jae	.LBB30_1
# %bb.3:
	shlq	$2, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB30_1:
	.cfi_def_cfa_offset 16
	movabsq	$1537228672809129302, %rax      # imm = 0x1555555555555556
	cmpq	%rax, %rsi
	jb	.LBB30_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB30_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end30:
	.size	_ZNSt15__new_allocatorI4edgeE8allocateEmPKv, .Lfunc_end30-_ZNSt15__new_allocatorI4edgeE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_,"axG",@progbits,_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_,comdat
	.weak	_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_ # -- Begin function _ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_,@function
_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_: # @_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB31_2
# %bb.1:
	movq	(%rdx), %rax
	movq	%rax, (%rsi)
	movq	8(%rbx), %rax
	addq	$8, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB31_3
.LBB31_2:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	movq	8(%rbx), %rax
.LBB31_3:
	addq	$-8, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end31:
	.size	_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_, .Lfunc_end31-_ZNSt6vectorI8distNodeSaIS0_EE12emplace_backIJS0_EEERS0_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.weak	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_ # -- Begin function _ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,@function
_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_: # @_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.16, %edx
	callq	_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$3, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB32_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB32_3
.LBB32_1:
	xorl	%ebp, %ebp
.LBB32_3:                               # %_ZNSt12_Vector_baseI8distNodeSaIS0_EE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rax
	movq	%rax, (%rbp,%r14,8)
	testq	%r12, %r12
	jle	.LBB32_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB32_5:                               # %_ZNSt6vectorI8distNodeSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	addq	%rbp, %r12
	addq	$8, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB32_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB32_7:                               # %_ZNSt6vectorI8distNodeSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit16
	testq	%r13, %r13
	je	.LBB32_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB32_9:                               # %_ZNSt12_Vector_baseI8distNodeSaIS0_EE13_M_deallocateEPS0_m.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end32:
	.size	_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .Lfunc_end32-_ZNSt6vectorI8distNodeSaIS0_EE17_M_realloc_insertIJS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$1152921504606846975, %rcx      # imm = 0xFFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$3, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB33_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB33_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end33:
	.size	_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc, .Lfunc_end33-_ZNKSt6vectorI8distNodeSaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorI8distNodeE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorI8distNodeE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv,@function
_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv: # @_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB34_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB34_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB34_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB34_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end34:
	.size	_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv, .Lfunc_end34-_ZNSt15__new_allocatorI8distNodeE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_,"axG",@progbits,_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_,comdat
	.weak	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_ # -- Begin function _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_
	.type	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_,@function
_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_: # @_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_
	.cfi_startproc
# %bb.0:
	leaq	-1(%rdx), %rax
	shrq	$63, %rax
	leaq	(%rdx,%rax), %r8
	decq	%r8
	sarq	%r8
	movq	%rsi, %rax
	cmpq	%rsi, %r8
	jle	.LBB35_7
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %r9
.LBB35_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r9,%r9), %r11
	leaq	1(,%r9,2), %r10
	movl	12(%rdi,%r11,8), %eax
	cmpl	%eax, 20(%rdi,%r11,8)
	jle	.LBB35_3
.LBB35_5:                               # %_ZN9__gnu_cxx5__ops15_Iter_comp_iterISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEESC_EEbT_T0_.exit.thread
                                        #   in Loop: Header=BB35_2 Depth=1
	movq	%r10, %rax
	jmp	.LBB35_6
.LBB35_3:                               #   in Loop: Header=BB35_2 Depth=1
	leaq	2(%r9,%r9), %rax
	jne	.LBB35_6
# %bb.4:                                # %_ZN9__gnu_cxx5__ops15_Iter_comp_iterISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEESC_EEbT_T0_.exit
                                        #   in Loop: Header=BB35_2 Depth=1
	movl	16(%rdi,%r11,8), %r11d
	cmpl	(%rdi,%r10,8), %r11d
	jg	.LBB35_5
.LBB35_6:                               # %_ZN9__gnu_cxx5__ops15_Iter_comp_iterISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEESC_EEbT_T0_.exit.thread37
                                        #   in Loop: Header=BB35_2 Depth=1
	movq	(%rdi,%rax,8), %r10
	movq	%r10, (%rdi,%r9,8)
	movq	%rax, %r9
	cmpq	%r8, %rax
	jl	.LBB35_2
.LBB35_7:                               # %._crit_edge
	testb	$1, %dl
	jne	.LBB35_10
# %bb.8:
	addq	$-2, %rdx
	sarq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB35_10
# %bb.9:
	leaq	(%rax,%rax), %rdx
	movq	8(%rdi,%rdx,8), %rdx
	movq	%rdx, (%rdi,%rax,8)
	leaq	1(,%rax,2), %rax
.LBB35_10:
	cmpq	%rsi, %rax
	jle	.LBB35_11
# %bb.12:                               # %.lr.ph.i.preheader
	movq	%rcx, %rdx
	shrq	$32, %rdx
.LBB35_13:                              # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	-1(%rax), %r8
	shrq	$63, %r8
	addq	%rax, %r8
	decq	%r8
	sarq	%r8
	cmpl	%edx, 4(%rdi,%r8,8)
	jg	.LBB35_16
# %bb.14:                               #   in Loop: Header=BB35_13 Depth=1
	jne	.LBB35_11
# %bb.15:                               # %_ZN9__gnu_cxx5__ops14_Iter_comp_valISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEES3_EEbT_RT0_.exit.i
                                        #   in Loop: Header=BB35_13 Depth=1
	cmpl	%ecx, (%rdi,%r8,8)
	jle	.LBB35_11
.LBB35_16:                              # %_ZN9__gnu_cxx5__ops14_Iter_comp_valISt4lessI8distNodeEEclINS_17__normal_iteratorIPS3_St6vectorIS3_SaIS3_EEEES3_EEbT_RT0_.exit.thread.i
                                        #   in Loop: Header=BB35_13 Depth=1
	movq	(%rdi,%r8,8), %r9
	movq	%r9, (%rdi,%rax,8)
	movq	%r8, %rax
	cmpq	%rsi, %r8
	jg	.LBB35_13
	jmp	.LBB35_17
.LBB35_11:
	movq	%rax, %r8
.LBB35_17:                              # %_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valISt4lessIS2_EEEEvT_T0_SE_T1_RT2_.exit
	movq	%rcx, (%rdi,%r8,8)
	retq
.Lfunc_end35:
	.size	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_, .Lfunc_end35-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP8distNodeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterISt4lessIS2_EEEEvT_T0_SE_T1_T2_
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_prim_parallel.hip,@function # -- Begin function _GLOBAL__sub_I_prim_parallel.hip
_GLOBAL__sub_I_prim_parallel.hip:       # @_GLOBAL__sub_I_prim_parallel.hip
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	xorl	%ebx, %ebx
	movq	%rbx, nonEmptyIndices(%rip)
	movl	%ebx, nonEmptyIndices+8(%rip)
	movq	%rbx, nonEmptyIndices+16(%rip)
	movl	%ebx, nonEmptyIndices+24(%rip)
	movq	%rbx, nonEmptyIndices+32(%rip)
	movl	$_ZNSt13_Bvector_baseISaIbEED2Ev, %edi
	movl	$nonEmptyIndices, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	xorps	%xmm0, %xmm0
	movups	%xmm0, H(%rip)
	movq	%rbx, H+16(%rip)
	movl	$_ZNSt14priority_queueI8distNodeSt6vectorIS0_SaIS0_EESt4lessIS0_EED2Ev, %edi
	movl	$H, %esi
	movl	$__dso_handle, %edx
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	__cxa_atexit                    # TAILCALL
.Lfunc_end36:
	.size	_GLOBAL__sub_I_prim_parallel.hip, .Lfunc_end36-_GLOBAL__sub_I_prim_parallel.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB37_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB37_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20parallel_processEdgePiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$parent, %esi
	movl	$parent.managed, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$120, %r8d
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$dist, %esi
	movl	$dist.managed, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$120, %r8d
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$fixed, %esi
	movl	$fixed.managed, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$30, %r8d
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$Q, %esi
	movl	$Q.managed, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$120, %r8d
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$R, %esi
	movl	$R.managed, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$120, %r8d
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$T, %esi
	movl	$T.managed, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$7200, %r8d                     # imm = 0x1C20
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$mwe, %esi
	movl	$mwe.managed, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$7200, %r8d                     # imm = 0x1C20
	movq	%rbx, %rdi
	movl	$16, %r9d
	callq	__hipRegisterManagedVar
	movl	$z_device, %esi
	movl	$z_device.managed, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$Q_index, %esi
	movl	$Q_index.managed, %edx
	movl	$.L__unnamed_10, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$R_index, %esi
	movl	$R_index.managed, %edx
	movl	$.L__unnamed_11, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$mwe_index, %esi
	movl	$mwe_index.managed, %edx
	movl	$.L__unnamed_12, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$T_index, %esi
	movl	$T_index.managed, %edx
	movl	$.L__unnamed_13, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$edge_cnt, %esi
	movl	$edge_cnt.managed, %edx
	movl	$.L__unnamed_14, %ecx
	movl	$4, %r8d
	movq	%rbx, %rdi
	movl	$4, %r9d
	callq	__hipRegisterManagedVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end37:
	.size	__hip_module_ctor, .Lfunc_end37-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB38_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB38_2:
	retq
.Lfunc_end38:
	.size	__hip_module_dtor, .Lfunc_end38-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	parent.managed,@object          # @parent.managed
	.local	parent.managed
	.comm	parent.managed,120,16
	.type	dist.managed,@object            # @dist.managed
	.local	dist.managed
	.comm	dist.managed,120,16
	.type	fixed.managed,@object           # @fixed.managed
	.local	fixed.managed
	.comm	fixed.managed,30,16
	.type	nonEmptyIndices,@object         # @nonEmptyIndices
	.bss
	.globl	nonEmptyIndices
	.p2align	3, 0x0
nonEmptyIndices:
	.zero	40
	.size	nonEmptyIndices, 40

	.hidden	__dso_handle
	.type	H,@object                       # @H
	.globl	H
	.p2align	3, 0x0
H:
	.zero	32
	.size	H, 32

	.type	Q.managed,@object               # @Q.managed
	.local	Q.managed
	.comm	Q.managed,120,16
	.type	R.managed,@object               # @R.managed
	.local	R.managed
	.comm	R.managed,120,16
	.type	T.managed,@object               # @T.managed
	.local	T.managed
	.comm	T.managed,7200,16
	.type	mwe.managed,@object             # @mwe.managed
	.local	mwe.managed
	.comm	mwe.managed,7200,16
	.type	z_device.managed,@object        # @z_device.managed
	.local	z_device.managed
	.comm	z_device.managed,4,4
	.type	Q_index.managed,@object         # @Q_index.managed
	.local	Q_index.managed
	.comm	Q_index.managed,4,4
	.type	R_index.managed,@object         # @R_index.managed
	.local	R_index.managed
	.comm	R_index.managed,4,4
	.type	mwe_index.managed,@object       # @mwe_index.managed
	.local	mwe_index.managed
	.comm	mwe_index.managed,4,4
	.type	T_index.managed,@object         # @T_index.managed
	.local	T_index.managed
	.comm	T_index.managed,4,4
	.type	edge_cnt.managed,@object        # @edge_cnt.managed
	.local	edge_cnt.managed
	.comm	edge_cnt.managed,4,4
	.type	allvertex_in,@object            # @allvertex_in
	.globl	allvertex_in
	.p2align	4, 0x0
allvertex_in:
	.zero	3600
	.size	allvertex_in, 3600

	.type	alledge_in,@object              # @alledge_in
	.globl	alledge_in
	.p2align	4, 0x0
alledge_in:
	.zero	3600
	.size	alledge_in, 3600

	.type	allweight_in,@object            # @allweight_in
	.globl	allweight_in
	.p2align	4, 0x0
allweight_in:
	.zero	3600
	.size	allweight_in, 3600

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"( %d, %d, %d )"
	.size	.L.str.2, 15

	.type	_Z20parallel_processEdgePiS_S_i,@object # @_Z20parallel_processEdgePiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z20parallel_processEdgePiS_S_i
	.p2align	3, 0x0
_Z20parallel_processEdgePiS_S_i:
	.quad	_Z35__device_stub__parallel_processEdgePiS_S_i
	.size	_Z20parallel_processEdgePiS_S_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/manjaripokala/ParallelAlgorithms_Su20/master/TermProject/PrimMST/prim_parallel.hip"
	.size	.L.str.3, 145

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d - %d\n"
	.size	.L.str.4, 9

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Popped minimum distance node:%d\n"
	.size	.L.str.5, 33

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Parallel Elpased Time in ms:%f\n"
	.size	.L.str.10, 32

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.13, 21

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"vector::_M_default_append"
	.size	.L.str.14, 26

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"vector<bool>::_M_fill_insert"
	.size	.L.str.15, 29

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.16, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20parallel_processEdgePiS_S_i"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"parent"
	.size	.L__unnamed_2, 7

	.type	parent,@object                  # @parent
	.local	parent
	.comm	parent,8,8
	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"dist"
	.size	.L__unnamed_3, 5

	.type	dist,@object                    # @dist
	.local	dist
	.comm	dist,8,8
	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"fixed"
	.size	.L__unnamed_4, 6

	.type	fixed,@object                   # @fixed
	.local	fixed
	.comm	fixed,8,8
	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"Q"
	.size	.L__unnamed_5, 2

	.type	Q,@object                       # @Q
	.local	Q
	.comm	Q,8,8
	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"R"
	.size	.L__unnamed_6, 2

	.type	R,@object                       # @R
	.local	R
	.comm	R,8,8
	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"T"
	.size	.L__unnamed_7, 2

	.type	T,@object                       # @T
	.local	T
	.comm	T,8,8
	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"mwe"
	.size	.L__unnamed_8, 4

	.type	mwe,@object                     # @mwe
	.local	mwe
	.comm	mwe,8,8
	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"z_device"
	.size	.L__unnamed_9, 9

	.type	z_device,@object                # @z_device
	.local	z_device
	.comm	z_device,8,8
	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"Q_index"
	.size	.L__unnamed_10, 8

	.type	Q_index,@object                 # @Q_index
	.local	Q_index
	.comm	Q_index,8,8
	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"R_index"
	.size	.L__unnamed_11, 8

	.type	R_index,@object                 # @R_index
	.local	R_index
	.comm	R_index,8,8
	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"mwe_index"
	.size	.L__unnamed_12, 10

	.type	mwe_index,@object               # @mwe_index
	.local	mwe_index
	.comm	mwe_index,8,8
	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"T_index"
	.size	.L__unnamed_13, 8

	.type	T_index,@object                 # @T_index
	.local	T_index
	.comm	T_index,8,8
	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"edge_cnt"
	.size	.L__unnamed_14, 9

	.type	edge_cnt,@object                # @edge_cnt
	.local	edge_cnt
	.comm	edge_cnt,8,8
	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_prim_parallel.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Input Graph"
	.size	.Lstr, 12

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Popped node is not fixed adding it to R"
	.size	.Lstr.1, 40

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Adding all elements from Q to Heap H"
	.size	.Lstr.2, 37

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Calling kernel for processing edges of elements in R in parallel"
	.size	.Lstr.3, 65

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"2010_Alaskan.txt"
	.size	.Lstr.4, 17

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"\n===================================="
	.size	.Lstr.5, 38

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Minimum Spanning Tree using Prim "
	.size	.Lstr.6, 34

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__parallel_processEdgePiS_S_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _GLOBAL__sub_I_prim_parallel.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym parent.managed
	.addrsig_sym dist.managed
	.addrsig_sym fixed.managed
	.addrsig_sym nonEmptyIndices
	.addrsig_sym __dso_handle
	.addrsig_sym H
	.addrsig_sym Q.managed
	.addrsig_sym R.managed
	.addrsig_sym T.managed
	.addrsig_sym mwe.managed
	.addrsig_sym z_device.managed
	.addrsig_sym Q_index.managed
	.addrsig_sym R_index.managed
	.addrsig_sym mwe_index.managed
	.addrsig_sym T_index.managed
	.addrsig_sym edge_cnt.managed
	.addrsig_sym allvertex_in
	.addrsig_sym alledge_in
	.addrsig_sym allweight_in
	.addrsig_sym _Z20parallel_processEdgePiS_S_i
	.addrsig_sym parent
	.addrsig_sym dist
	.addrsig_sym fixed
	.addrsig_sym Q
	.addrsig_sym R
	.addrsig_sym T
	.addrsig_sym mwe
	.addrsig_sym z_device
	.addrsig_sym Q_index
	.addrsig_sym R_index
	.addrsig_sym mwe_index
	.addrsig_sym T_index
	.addrsig_sym edge_cnt
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	v_or_b32_e32 v2, 2, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v2, v0, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[7:8]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v11, 2 :: v_dual_and_b32 v6, 2, v10
	v_mov_b32_e32 v30, 0
	v_and_b32_e32 v0, -3, v10
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v12, 1
	s_mov_b32 s12, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_13 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
                                        ;     Child Loop BB0_29 Depth 2
                                        ;     Child Loop BB0_37 Depth 2
                                        ;     Child Loop BB0_45 Depth 2
                                        ;     Child Loop BB0_53 Depth 2
                                        ;     Child Loop BB0_61 Depth 2
                                        ;     Child Loop BB0_69 Depth 2
                                        ;     Child Loop BB0_75 Depth 2
                                        ;     Child Loop BB0_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v32, 0, v5 :: v_dual_cndmask_b32 v31, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v31
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v31
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[9:10], 3, v[31:32]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, v8
	v_mov_b32_e32 v13, v7
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB0_5:                                ; %.preheader31
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v10, v[13:14]
	v_mov_b32_e32 v16, s11
	v_add_co_u32 v13, vcc_lo, v13, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v15, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], s4, v[15:16]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v9
	v_or_b32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v15, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow232
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_7:                                ; %Flow234
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB0_8:                                ; %Flow236
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v7
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[7:8]
	flat_load_u8 v3, v[7:8] offset:1
	flat_load_u8 v9, v[7:8] offset:2
	flat_load_u8 v10, v[7:8] offset:3
	flat_load_u8 v13, v[7:8] offset:5
	flat_load_u8 v14, v[7:8] offset:4
	v_mov_b32_e32 v16, v30
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v2, 0xffff, v2
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 8, v3
	s_clause 0x1
	flat_load_u8 v15, v[7:8] offset:7
	flat_load_d16_hi_u8 v16, v[7:8] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v10, 24, v10
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v9, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v15
	v_add_nc_u32_e32 v15, -8, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v16, v9
	v_add_co_u32 v9, vcc_lo, v7, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
.LBB0_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v15
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v15
	s_cbranch_execz .LBB0_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_13:                               ; %.preheader29
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v16, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v15
	flat_load_u8 v16, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, s11 :: v_dual_and_b32 v16, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s0, v[16:17]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v16, v13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_13
; %bb.14:                               ; %Flow227
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_15:                               ; %Flow229
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr15
.LBB0_16:                               ; %Flow231
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v17, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v13, v[9:10]
	flat_load_u8 v14, v[9:10] offset:1
	flat_load_u8 v16, v[9:10] offset:2
	flat_load_u8 v17, v[9:10] offset:3
	flat_load_u8 v18, v[9:10] offset:5
	flat_load_u8 v19, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v20, v30 :: v_dual_and_b32 v13, 0xffff, v13
	s_clause 0x1
	flat_load_u8 v21, v[9:10] offset:7
	flat_load_d16_hi_u8 v20, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v14, 8, v14
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v16, 16, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 24, v17
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v13, v14, v13
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v14, 8, v18
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v13, v13, v16, v17
	s_waitcnt vmcnt(2)
	v_or3_b32 v14, 0, v19, v14
	v_add_nc_u32_e32 v17, -8, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v13, v13, 0, 0
	v_or3_b32 v13, v13, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v16, 24, v21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v14, v14, v20, v16
.LBB0_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v17
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.19:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v17
	s_cbranch_execz .LBB0_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_21:                               ; %.preheader27
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v17
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s11 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v18, v15
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_21
; %bb.22:                               ; %Flow222
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_23:                               ; %Flow224
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr17
.LBB0_24:                               ; %Flow226
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v19, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v15, v[9:10]
	flat_load_u8 v16, v[9:10] offset:1
	flat_load_u8 v18, v[9:10] offset:2
	flat_load_u8 v19, v[9:10] offset:3
	flat_load_u8 v20, v[9:10] offset:5
	flat_load_u8 v21, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v22, v30 :: v_dual_and_b32 v15, 0xffff, v15
	s_clause 0x1
	flat_load_u8 v23, v[9:10] offset:7
	flat_load_d16_hi_u8 v22, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v16, 8, v16
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v15, v16, v15
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v16, 8, v20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v15, v15, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v16, 0, v21, v16
	v_add_nc_u32_e32 v19, -8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v15, v15, 0, 0
	v_or3_b32 v15, v15, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v16, v16, v22, v18
.LBB0_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v19
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_32
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v19
	s_cbranch_execz .LBB0_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_29:                               ; %.preheader25
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v19
	flat_load_u8 v20, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v21, s11 :: v_dual_and_b32 v20, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s0, v[20:21]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v20, v17
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_29
; %bb.30:                               ; %Flow217
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_31:                               ; %Flow219
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr19
.LBB0_32:                               ; %Flow221
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v21, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v17, v[9:10]
	flat_load_u8 v18, v[9:10] offset:1
	flat_load_u8 v20, v[9:10] offset:2
	flat_load_u8 v21, v[9:10] offset:3
	flat_load_u8 v22, v[9:10] offset:5
	flat_load_u8 v23, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v30 :: v_dual_and_b32 v17, 0xffff, v17
	s_clause 0x1
	flat_load_u8 v25, v[9:10] offset:7
	flat_load_d16_hi_u8 v24, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v20, 16, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v17, v18, v17
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v17, v17, v20, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	v_add_nc_u32_e32 v21, -8, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v17, v17, 0, 0
	v_or3_b32 v17, v17, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v20, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v18, v18, v24, v20
.LBB0_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v21
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_40
; %bb.35:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v21
	s_cbranch_execz .LBB0_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_37:                               ; %.preheader23
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v21
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s11 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v22, v19
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_37
; %bb.38:                               ; %Flow212
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_39:                               ; %Flow214
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr21
.LBB0_40:                               ; %Flow216
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v23, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v19, v[9:10]
	flat_load_u8 v20, v[9:10] offset:1
	flat_load_u8 v22, v[9:10] offset:2
	flat_load_u8 v23, v[9:10] offset:3
	flat_load_u8 v24, v[9:10] offset:5
	flat_load_u8 v25, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v26, v30 :: v_dual_and_b32 v19, 0xffff, v19
	s_clause 0x1
	flat_load_u8 v27, v[9:10] offset:7
	flat_load_d16_hi_u8 v26, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v20, 8, v20
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v19, v20, v19
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v20, 8, v24
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v19, v19, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v20, 0, v25, v20
	v_add_nc_u32_e32 v23, -8, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v19, v19, 0, 0
	v_or3_b32 v19, v19, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v20, v20, v26, v22
.LBB0_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v23
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_48
; %bb.43:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v23
	s_cbranch_execz .LBB0_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_45:                               ; %.preheader21
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v24, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v23
	flat_load_u8 v24, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v25, s11 :: v_dual_and_b32 v24, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s0, v[24:25]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v24, v21
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_45
; %bb.46:                               ; %Flow207
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_47:                               ; %Flow209
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr23
.LBB0_48:                               ; %Flow211
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v25, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_50
; %bb.49:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v21, v[9:10]
	flat_load_u8 v22, v[9:10] offset:1
	flat_load_u8 v24, v[9:10] offset:2
	flat_load_u8 v25, v[9:10] offset:3
	flat_load_u8 v26, v[9:10] offset:5
	flat_load_u8 v27, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v30 :: v_dual_and_b32 v21, 0xffff, v21
	s_clause 0x1
	flat_load_u8 v29, v[9:10] offset:7
	flat_load_d16_hi_u8 v28, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v24, 16, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v21, v22, v21
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v21, v21, v24, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	v_add_nc_u32_e32 v25, -8, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v21, 0, 0
	v_or3_b32 v21, v21, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v24, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v22, v22, v28, v24
.LBB0_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v25
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB0_56
; %bb.51:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v25
	s_cbranch_execz .LBB0_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB0_53:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v26, v[9:10]
	v_mov_b32_e32 v27, s11
	v_add_nc_u32_e32 v25, -1, v25
	v_add_co_u32 v9, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v26, 0xffff, v26
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v24, v27, v24
	v_or_b32_e32 v23, v26, v23
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_53
; %bb.54:                               ; %Flow202
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_55:                               ; %Flow204
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr9_vgpr10
.LBB0_56:                               ; %Flow206
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v23, v[9:10]
	flat_load_u8 v24, v[9:10] offset:1
	flat_load_u8 v25, v[9:10] offset:2
	flat_load_u8 v26, v[9:10] offset:3
	flat_load_u8 v27, v[9:10] offset:5
	flat_load_u8 v28, v[9:10] offset:4
	v_mov_b32_e32 v29, v30
	s_clause 0x1
	flat_load_u8 v34, v[9:10] offset:7
	flat_load_d16_hi_u8 v29, v[9:10] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v9, 0xffff, v23
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v10, 8, v24
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v25
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v24, 8, v27
	v_or_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 24, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v9, v9, v23, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v10, 0, v28, v24
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v34
	v_or3_b32 v9, v9, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v24, v10, v29, v23
	v_or3_b32 v23, v9, 0, 0
.LBB0_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v29, v33
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v29
	v_cmp_eq_u32_e64 s0, s0, v29
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_64
; %bb.59:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[27:28], v30, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b64 v[25:26], v30, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v28
	v_and_b32_e32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v34, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v34, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v26, v10, vcc_lo
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[27:28]
	s_cbranch_execz .LBB0_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s5, 0
.LBB0_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[25:26], v30, s[2:3] offset:40
	global_load_b64 v[34:35], v30, s[2:3]
	v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v27, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, v25, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[34:35]
	v_and_b32_e32 v34, v26, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, v34, 24, v[10:11]
	v_mov_b32_e32 v10, v25
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[27:28]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_61
; %bb.62:                               ; %Flow199
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_63:                               ; %Flow201
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v30, s[2:3] offset:40
	global_load_b128 v[25:28], v30, s[2:3]
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_66
; %bb.65:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v26, vcc_lo
	v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v10, v30
	global_store_b128 v[34:35], v[9:12], off offset:8
.LBB0_66:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v9, 0, v1
	v_or_b32_e32 v10, v0, v6
	v_lshl_add_u32 v34, v31, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v9, v1 :: v_dual_cndmask_b32 v0, v10, v0
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v27, vcc_lo, v27, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v28, vcc_lo, s7, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v27, v9
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, v28, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[0:3], off
	global_store_b128 v[9:10], v[13:16], off offset:16
	global_store_b128 v[9:10], v[17:20], off offset:32
	global_store_b128 v[9:10], v[21:24], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_74
; %bb.67:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x1
	global_load_b64 v[17:18], v30, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v30, s[2:3] offset:40
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v16, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v13, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v26, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[13:14], v[17:18], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v30, v[15:18], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[17:18]
	s_cbranch_execz .LBB0_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
.LBB0_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[13:14], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v30, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_69
.LBB0_70:                               ; %Flow197
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v30, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_72
; %bb.71:                               ;   in Loop: Header=BB0_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v29, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[29:30], off offset:8
.LBB0_72:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v29, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v29
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[29:30], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_74:                               ; %Flow198
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_75:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_79
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_80
.LBB0_79:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, -1
.LBB0_80:                               ; %Flow192
                                        ;   in Loop: Header=BB0_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_75
; %bb.81:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b128 v[0:3], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_85
; %bb.82:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v30, s[2:3] offset:40
	global_load_b64 v[9:10], v30, s[2:3] offset:24 glc
	global_load_b64 v[15:16], v30, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v17, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v17, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_and_b32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v13, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v17, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v15, v2
	v_mov_b32_e32 v15, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, v16, v3, vcc_lo
	v_mov_b32_e32 v16, v10
	global_store_b64 v[2:3], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s0, 0
.LBB0_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[15:16]
	v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_84
.LBB0_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v31
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v32, vcc_lo
	v_add_co_u32 v7, s0, v7, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, v8, v32, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
; %bb.86:                               ; %Flow237
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr10
.LBB0_87:                               ; %Flow253
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB0_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[7:8], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB0_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v3, 24, v[11:12]
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_91
; %bb.92:                               ; %Flow249
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_93:                               ; %Flow251
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, v3
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[8:9], v[11:14], off offset:8
.LBB0_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB0_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_99
.LBB0_100:                              ; %Flow247
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_104:                              ; %Flow248
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_107
; %bb.106:                              ;   in Loop: Header=BB0_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_107:                              ;   in Loop: Header=BB0_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_110
.LBB0_109:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, -1
.LBB0_110:                              ; %Flow242
                                        ;   in Loop: Header=BB0_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_114
.LBB0_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_116:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5708
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z20parallel_processEdgePiS_S_i ; -- Begin function _Z20parallel_processEdgePiS_S_i
	.globl	_Z20parallel_processEdgePiS_S_i
	.p2align	8
	.type	_Z20parallel_processEdgePiS_S_i,@function
_Z20parallel_processEdgePiS_S_i:        ; @_Z20parallel_processEdgePiS_S_i
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	v_mov_b32_e32 v38, v0
	s_add_u32 s0, s18, 32
	s_addc_u32 s1, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, edge_cnt@rel32@lo+4
	s_addc_u32 s3, s3, edge_cnt@rel32@hi+12
	s_mov_b32 s32, 0
	s_load_b64 s[2:3], s[2:3], 0x0
	s_load_b32 s4, s[18:19], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[2:3], 0x0
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[38:39]
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_381
; %bb.1:
	s_clause 0x1
	s_load_b128 s[20:23], s[18:19], 0x0
	s_load_b32 s26, s[18:19], 0x18
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[40:41], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s20, v40
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s21, v41, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s26, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_381
; %bb.2:
	s_load_b64 s[20:21], s[0:1], 0x50
	v_mbcnt_lo_u32_b32 v45, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v45
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_8
; %bb.3:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_7
; %bb.4:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB1_5:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_5
; %bb.6:                                ; %Flow691
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_7:                                ; %Flow693
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_8:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	s_load_b64 s[24:25], s[18:19], 0x10
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_10
; %bb.9:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_10:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_17
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_13
.LBB1_12:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_12
.LBB1_13:                               ; %Flow689
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_15
; %bb.14:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_15:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_17
; %bb.16:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_17:                               ; %Flow690
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_20
; %bb.19:                               ;   in Loop: Header=BB1_18 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_20:                               ;   in Loop: Header=BB1_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_22
; %bb.21:                               ;   in Loop: Header=BB1_18 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_23
.LBB1_22:                               ;   in Loop: Header=BB1_18 Depth=1
	s_mov_b32 s1, -1
.LBB1_23:                               ; %Flow684
                                        ;   in Loop: Header=BB1_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_18
; %bb.24:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_28
; %bb.25:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_28
; %bb.26:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_27:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_27
.LBB1_28:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 48, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 32
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v45
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_34
; %bb.29:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB1_33
; %bb.30:                               ; %.preheader3.i.i.i42.preheader
	s_mov_b32 s3, 0
.LBB1_31:                               ; %.preheader3.i.i.i42
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_31
; %bb.32:                               ; %Flow677
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_33:                               ; %Flow679
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_34:                               ; %.loopexit4.i.i.i37
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_36
; %bb.35:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB1_36:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_44
; %bb.37:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB1_40
; %bb.38:                               ; %.preheader1.i.i.i40.preheader
	s_mov_b32 s8, 0
.LBB1_39:                               ; %.preheader1.i.i.i40
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_39
.LBB1_40:                               ; %Flow675
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_42
; %bb.41:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_42:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_44
; %bb.43:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_44:                               ; %Flow676
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_45:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_47
; %bb.46:                               ;   in Loop: Header=BB1_45 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_47:                               ;   in Loop: Header=BB1_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_49
; %bb.48:                               ;   in Loop: Header=BB1_45 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_50
.LBB1_49:                               ;   in Loop: Header=BB1_45 Depth=1
	s_mov_b32 s1, -1
.LBB1_50:                               ; %Flow670
                                        ;   in Loop: Header=BB1_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_45
; %bb.51:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_55
; %bb.52:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_55
; %bb.53:                               ; %.preheader.i.i.i39.preheader
	s_mov_b32 s0, 0
.LBB1_54:                               ; %.preheader.i.i.i39
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_54
.LBB1_55:                               ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, s22, v40
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v41, vcc_lo
	v_add_co_u32 v2, vcc_lo, s24, v40
	v_add_co_ci_u32_e32 v3, vcc_lo, s25, v41, vcc_lo
	v_mov_b32_e32 v4, v45
	global_load_b32 v40, v[0:1], off
	global_load_b32 v43, v[2:3], off
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_61
; %bb.56:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_60
; %bb.57:                               ; %.preheader3.i.i.i48.preheader
	s_mov_b32 s3, 0
.LBB1_58:                               ; %.preheader3.i.i.i48
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_58
; %bb.59:                               ; %Flow663
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_60:                               ; %Flow665
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_61:                               ; %.loopexit4.i.i.i43
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_63
; %bb.62:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_63:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_71
; %bb.64:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_67
; %bb.65:                               ; %.preheader1.i.i.i46.preheader
	s_mov_b32 s8, 0
.LBB1_66:                               ; %.preheader1.i.i.i46
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_66
.LBB1_67:                               ; %Flow661
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_69
; %bb.68:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_69:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_71
; %bb.70:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_71:                               ; %Flow662
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_72:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_74
; %bb.73:                               ;   in Loop: Header=BB1_72 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_74:                               ;   in Loop: Header=BB1_72 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_76
; %bb.75:                               ;   in Loop: Header=BB1_72 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_77
.LBB1_76:                               ;   in Loop: Header=BB1_72 Depth=1
	s_mov_b32 s1, -1
.LBB1_77:                               ; %Flow656
                                        ;   in Loop: Header=BB1_72 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_72
; %bb.78:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_82
; %bb.79:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_82
; %bb.80:                               ; %.preheader.i.i.i45.preheader
	s_mov_b32 s0, 0
.LBB1_81:                               ; %.preheader.i.i.i45
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_81
.LBB1_82:                               ; %__ockl_printf_begin.exit49
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 36, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 32
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v2, v45
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_88
; %bb.83:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[8:9], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB1_87
; %bb.84:                               ; %.preheader3.i.i.i55.preheader
	s_mov_b32 s3, 0
.LBB1_85:                               ; %.preheader3.i.i.i55
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[10:11], v3, s[20:21]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_85
; %bb.86:                               ; %Flow649
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_87:                               ; %Flow651
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_88:                               ; %.loopexit4.i.i.i50
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[20:21] offset:40
	global_load_b128 v[4:7], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_90
; %bb.89:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB1_90:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s22, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s8, s22
	s_mov_b32 s9, s22
	s_mov_b32 s10, s22
	s_mov_b32 s11, s22
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, s26
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v11, s11
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v10, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_98
; %bb.91:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB1_94
; %bb.92:                               ; %.preheader1.i.i.i53.preheader
	s_mov_b32 s8, 0
.LBB1_93:                               ; %.preheader1.i.i.i53
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_93
.LBB1_94:                               ; %Flow647
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_96
; %bb.95:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_96:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_98
; %bb.97:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_98:                               ; %Flow648
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_99:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_101
; %bb.100:                              ;   in Loop: Header=BB1_99 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_101:                              ;   in Loop: Header=BB1_99 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_103
; %bb.102:                              ;   in Loop: Header=BB1_99 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_104
.LBB1_103:                              ;   in Loop: Header=BB1_99 Depth=1
	s_mov_b32 s1, -1
.LBB1_104:                              ; %Flow642
                                        ;   in Loop: Header=BB1_99 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_99
; %bb.105:
	global_load_b64 v[38:39], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_109
; %bb.106:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_109
; %bb.107:                              ; %.preheader.i.i.i52.preheader
	s_mov_b32 s0, 0
.LBB1_108:                              ; %.preheader.i.i.i52
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_108
.LBB1_109:                              ; %__ockl_printf_append_args.exit56
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v4, v45 :: v_dual_mov_b32 v5, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v4
	v_mov_b32_e32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_115
; %bb.110:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[7:8], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v7
	v_and_b32_e32 v2, v2, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[5:6], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v0, v[5:8], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[7:8]
	s_cbranch_execz .LBB1_114
; %bb.111:                              ; %.preheader3.i.i.i62.preheader
	s_mov_b32 s3, 0
.LBB1_112:                              ; %.preheader3.i.i.i62
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[9:10], v0, s[20:21]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[9:10]
	v_and_b32_e32 v9, v2, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v1, v6
	v_mad_u64_u32 v[2:3], null, v9, 24, v[1:2]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v2
	global_load_b64 v[5:6], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v0, v[5:8], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_112
; %bb.113:                              ; %Flow635
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_114:                              ; %Flow637
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_115:                              ; %.loopexit4.i.i.i57
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v41, 0
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[7:8], v41, s[20:21] offset:40
	global_load_b128 v[0:3], v41, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_117
; %bb.116:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, v41
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v10, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB1_117:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v5, v41
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 6, v[4:5]
	v_and_or_b32 v38, 0xffffff1f, v38, 32
	v_add_co_u32 v6, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v3, vcc_lo
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v3, s9
	v_dual_mov_b32 v4, s10 :: v_dual_mov_b32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[38:41], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_125
; %bb.118:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_121
; %bb.119:                              ; %.preheader1.i.i.i60.preheader
	s_mov_b32 s8, 0
.LBB1_120:                              ; %.preheader1.i.i.i60
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_120
.LBB1_121:                              ; %Flow633
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_123
; %bb.122:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_123:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_125
; %bb.124:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_125:                              ; %Flow634
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	v_dual_mov_b32 v38, v40 :: v_dual_mov_b32 v39, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_126:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_128
; %bb.127:                              ;   in Loop: Header=BB1_126 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_128:                              ;   in Loop: Header=BB1_126 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_130
; %bb.129:                              ;   in Loop: Header=BB1_126 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_131
.LBB1_130:                              ;   in Loop: Header=BB1_126 Depth=1
	s_mov_b32 s1, -1
.LBB1_131:                              ; %Flow628
                                        ;   in Loop: Header=BB1_126 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_126
; %bb.132:
	global_load_b64 v[41:42], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_136
; %bb.133:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_136
; %bb.134:                              ; %.preheader.i.i.i59.preheader
	s_mov_b32 s0, 0
.LBB1_135:                              ; %.preheader.i.i.i59
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_135
.LBB1_136:                              ; %__ockl_printf_append_args.exit63
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_142
; %bb.137:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_141
; %bb.138:                              ; %.preheader3.i.i.i69.preheader
	s_mov_b32 s3, 0
.LBB1_139:                              ; %.preheader3.i.i.i69
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_139
; %bb.140:                              ; %Flow621
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_141:                              ; %Flow623
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_142:                              ; %.loopexit4.i.i.i64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_144
; %bb.143:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_144:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v6
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v41, 0xffffff1d, v41, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_mov_b32_e32 v44, v5
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[41:44], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_152
; %bb.145:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v8, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[11:12]
	s_cbranch_execz .LBB1_148
; %bb.146:                              ; %.preheader1.i.i.i67.preheader
	s_mov_b32 s8, 0
.LBB1_147:                              ; %.preheader1.i.i.i67
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_147
.LBB1_148:                              ; %Flow619
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_150
; %bb.149:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_150:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_152
; %bb.151:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_152:                              ; %Flow620
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_153:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_155
; %bb.154:                              ;   in Loop: Header=BB1_153 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_155:                              ;   in Loop: Header=BB1_153 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_157
; %bb.156:                              ;   in Loop: Header=BB1_153 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_158
.LBB1_157:                              ;   in Loop: Header=BB1_153 Depth=1
	s_mov_b32 s1, -1
.LBB1_158:                              ; %Flow614
                                        ;   in Loop: Header=BB1_153 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_153
; %bb.159:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_163
; %bb.160:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_163
; %bb.161:                              ; %.preheader.i.i.i66.preheader
	s_mov_b32 s0, 0
.LBB1_162:                              ; %.preheader.i.i.i66
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_162
.LBB1_163:                              ; %__ockl_printf_append_args.exit70
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, fixed@rel32@lo+4
	s_addc_u32 s1, s1, fixed@rel32@hi+12
	v_ashrrev_i32_e32 v41, 31, v40
	s_mov_b32 s23, 0
	global_load_b64 v[1:2], v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v46, vcc_lo, v1, v40
	v_add_co_ci_u32_e32 v47, vcc_lo, v2, v41, vcc_lo
	global_load_u8 v1, v[46:47], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_380
; %bb.164:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, edge_cnt@rel32@lo+4
	s_addc_u32 s1, s1, edge_cnt@rel32@hi+12
	global_load_b64 v[0:1], v0, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v2
	s_cbranch_vccnz .LBB1_172
; %bb.165:                              ; %.lr.ph.i.preheader
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, mwe@rel32@lo+4
	s_addc_u32 s1, s1, mwe@rel32@hi+12
	s_mov_b32 s3, -1
	s_mov_b32 s2, 0
	global_load_b64 v[0:1], v0, s[0:1]
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_166:                              ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v3, v[0:1], off offset:-4
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s7, s26, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB1_168
; %bb.167:                              ;   in Loop: Header=BB1_166 Depth=1
	global_load_b32 v3, v[0:1], off
	s_and_not1_b32 s4, s7, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v3, v40
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s7, s4, s5
.LBB1_168:                              ; %Flow604
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr4
	s_and_saveexec_b32 s6, s7
; %bb.169:                              ;   in Loop: Header=BB1_166 Depth=1
	s_add_i32 s2, s2, 1
	v_add_co_u32 v0, vcc_lo, v0, 8
	v_cmp_lt_i32_e64 s4, s2, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s2, v2
	s_and_not1_b32 s3, s3, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s4, exec_lo
	s_or_b32 s3, s3, s5
	s_or_not1_b32 s5, vcc_lo, exec_lo
; %bb.170:                              ; %Flow605
                                        ;   in Loop: Header=BB1_166 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_xor_b32 s3, s3, -1
	s_and_b32 s5, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s5, s1
	s_and_not1_b32 s0, s0, exec_lo
	s_and_b32 s3, s3, exec_lo
	s_or_b32 s0, s0, s3
	s_mov_b32 s3, s4
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_166
; %bb.171:                              ; %_Z10ifExistMWEP6fromToS_.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s23, -1
	s_branch .LBB1_173
.LBB1_172:
	s_mov_b32 s0, -1
.LBB1_173:                              ; %Flow607
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s24, s0
	s_cbranch_execz .LBB1_267
; %bb.174:                              ; %.critedge
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, dist@rel32@lo+4
	s_addc_u32 s1, s1, dist@rel32@hi+12
	v_lshlrev_b64 v[41:42], 2, v[40:41]
	s_mov_b32 s25, exec_lo
	global_load_b64 v[0:1], v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v41
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v42, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v0, v43
	s_cbranch_execz .LBB1_266
; %bb.175:
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_181
; %bb.176:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_180
; %bb.177:                              ; %.preheader3.i.i.i104.preheader
	s_mov_b32 s3, 0
.LBB1_178:                              ; %.preheader3.i.i.i104
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_178
; %bb.179:                              ; %Flow541
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_180:                              ; %Flow543
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_181:                              ; %.loopexit4.i.i.i99
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_183
; %bb.182:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_183:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_191
; %bb.184:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_187
; %bb.185:                              ; %.preheader1.i.i.i102.preheader
	s_mov_b32 s8, 0
.LBB1_186:                              ; %.preheader1.i.i.i102
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_186
.LBB1_187:                              ; %Flow539
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_189
; %bb.188:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_189:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_191
; %bb.190:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_191:                              ; %Flow540
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_192:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_194
; %bb.193:                              ;   in Loop: Header=BB1_192 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_194:                              ;   in Loop: Header=BB1_192 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_196
; %bb.195:                              ;   in Loop: Header=BB1_192 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_197
.LBB1_196:                              ;   in Loop: Header=BB1_192 Depth=1
	s_mov_b32 s1, -1
.LBB1_197:                              ; %Flow534
                                        ;   in Loop: Header=BB1_192 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_192
; %bb.198:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_202
; %bb.199:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_202
; %bb.200:                              ; %.preheader.i.i.i101.preheader
	s_mov_b32 s0, 0
.LBB1_201:                              ; %.preheader.i.i.i101
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_201
.LBB1_202:                              ; %__ockl_printf_begin.exit105
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 59, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 32
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_208
; %bb.203:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_207
; %bb.204:                              ; %.preheader3.i.i.i111.preheader
	s_mov_b32 s3, 0
.LBB1_205:                              ; %.preheader3.i.i.i111
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_205
; %bb.206:                              ; %Flow527
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_207:                              ; %Flow529
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_208:                              ; %.loopexit4.i.i.i106
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_210
; %bb.209:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_210:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_218
; %bb.211:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_214
; %bb.212:                              ; %.preheader1.i.i.i109.preheader
	s_mov_b32 s8, 0
.LBB1_213:                              ; %.preheader1.i.i.i109
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_213
.LBB1_214:                              ; %Flow525
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_216
; %bb.215:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_216:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_218
; %bb.217:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_218:                              ; %Flow526
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_219:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_221
; %bb.220:                              ;   in Loop: Header=BB1_219 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_221:                              ;   in Loop: Header=BB1_219 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_223
; %bb.222:                              ;   in Loop: Header=BB1_219 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_224
.LBB1_223:                              ;   in Loop: Header=BB1_219 Depth=1
	s_mov_b32 s1, -1
.LBB1_224:                              ; %Flow520
                                        ;   in Loop: Header=BB1_219 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_219
; %bb.225:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_229
; %bb.226:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_229
; %bb.227:                              ; %.preheader.i.i.i108.preheader
	s_mov_b32 s0, 0
.LBB1_228:                              ; %.preheader.i.i.i108
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_228
.LBB1_229:                              ; %__ockl_printf_begin.exit112
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.5@rel32@lo+4
	s_addc_u32 s1, s1, .str.5@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 42, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 32
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v45
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_235
; %bb.230:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[6:7], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB1_234
; %bb.231:                              ; %.preheader3.i.i.i118.preheader
	s_mov_b32 s3, 0
.LBB1_232:                              ; %.preheader3.i.i.i118
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[11:12], v1, s[20:21]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_232
; %bb.233:                              ; %Flow513
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_234:                              ; %Flow515
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_235:                              ; %.loopexit4.i.i.i113
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[20:21] offset:40
	global_load_b128 v[1:4], v6, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_237
; %bb.236:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB1_237:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v7, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v4, vcc_lo
	v_lshlrev_b64 v[3:4], 6, v[5:6]
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v7, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v4, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_245
; %bb.238:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB1_241
; %bb.239:                              ; %.preheader1.i.i.i116.preheader
	s_mov_b32 s8, 0
.LBB1_240:                              ; %.preheader1.i.i.i116
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_240
.LBB1_241:                              ; %Flow511
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_243
; %bb.242:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_243:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_245
; %bb.244:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_245:                              ; %Flow512
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_246:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_248
; %bb.247:                              ;   in Loop: Header=BB1_246 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_248:                              ;   in Loop: Header=BB1_246 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_250
; %bb.249:                              ;   in Loop: Header=BB1_246 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_251
.LBB1_250:                              ;   in Loop: Header=BB1_246 Depth=1
	s_mov_b32 s1, -1
.LBB1_251:                              ; %Flow506
                                        ;   in Loop: Header=BB1_246 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_246
; %bb.252:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_256
; %bb.253:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_256
; %bb.254:                              ; %.preheader.i.i.i115.preheader
	s_mov_b32 s0, 0
.LBB1_255:                              ; %.preheader.i.i.i115
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_255
.LBB1_256:                              ; %__ockl_printf_append_args.exit119
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, s26
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, dist@rel32@lo+4
	s_addc_u32 s1, s1, dist@rel32@hi+12
	global_load_b64 v[0:1], v2, s[0:1]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, parent@rel32@lo+4
	s_addc_u32 s1, s1, parent@rel32@hi+12
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v41
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v42, vcc_lo
	global_store_b32 v[0:1], v43, off
	global_load_b64 v[0:1], v2, s[0:1]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Q@rel32@lo+4
	s_addc_u32 s1, s1, Q@rel32@hi+12
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v0, v41
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v42, vcc_lo
	global_store_b32 v[0:1], v3, off
	global_load_b64 v[0:1], v2, s[0:1]
	s_waitcnt vmcnt(0)
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v2, v40
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_266
; %bb.257:                              ; %.lr.ph.preheader
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s1, 0
	s_mov_b32 s3, 0
                                        ; implicit-def: $sgpr2
.LBB1_258:                              ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_or_b32 s2, s2, exec_lo
	s_cmp_eq_u32 s3, 29
	s_cbranch_scc1 .LBB1_260
; %bb.259:                              ;   in Loop: Header=BB1_258 Depth=1
	global_load_b32 v2, v[0:1], off
	v_add_co_u32 v0, s0, v0, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	s_and_not1_b32 s2, s2, exec_lo
	s_add_i32 s0, s3, 1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v40
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
	s_branch .LBB1_261
.LBB1_260:                              ;   in Loop: Header=BB1_258 Depth=1
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $vgpr0_vgpr1
.LBB1_261:                              ; %Flow501
                                        ;   in Loop: Header=BB1_258 Depth=1
	v_mov_b32_e32 v2, s3
	s_and_b32 s4, exec_lo, s2
	s_mov_b32 s3, s0
	s_or_b32 s1, s4, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_258
; %bb.262:                              ; %_Z7ifExistPii.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_lt_u32_e32 vcc_lo, 28, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_266
; %bb.263:
	s_mov_b32 s1, exec_lo
	s_mov_b32 s0, exec_lo
	v_mbcnt_lo_u32_b32 v0, s1, 0
                                        ; implicit-def: $vgpr1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_265
; %bb.264:
	v_mov_b32_e32 v1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, Q_index@rel32@lo+4
	s_addc_u32 s3, s3, Q_index@rel32@hi+12
	s_bcnt1_i32_b32 s1, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s1
	global_load_b64 v[1:2], v1, s[2:3]
	s_waitcnt vmcnt(0)
	global_atomic_add_u32 v1, v[1:2], v3, off glc
.LBB1_265:
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, Q@rel32@lo+4
	s_addc_u32 s1, s1, Q@rel32@hi+12
	global_load_b64 v[2:3], v2, s[0:1]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s0, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b32 v[0:1], v40, off
.LBB1_266:                              ; %Flow544
	s_or_b32 exec_lo, exec_lo, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s23, s23, exec_lo
.LBB1_267:                              ; %Flow608
	s_or_b32 exec_lo, exec_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s23
	s_cbranch_execz .LBB1_380
; %bb.268:
	s_mov_b32 s0, exec_lo
	v_mov_b32_e32 v0, 1
	v_mbcnt_lo_u32_b32 v1, s0, 0
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr2
	global_store_b8 v[46:47], v0, off
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB1_270
; %bb.269:
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, T_index@rel32@lo+4
	s_addc_u32 s3, s3, T_index@rel32@hi+12
	s_bcnt1_i32_b32 s0, s0
	global_load_b64 v[2:3], v0, s[2:3]
	v_mov_b32_e32 v0, s0
	s_waitcnt vmcnt(0)
	global_atomic_add_u32 v2, v[2:3], v0, off glc
.LBB1_270:
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v2
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, T@rel32@lo+4
	s_addc_u32 s3, s3, T@rel32@hi+12
	s_mov_b32 s0, exec_lo
	v_mov_b32_e32 v41, s26
	v_add_nc_u32_e32 v1, s1, v1
	global_load_b64 v[3:4], v0, s[2:3]
	s_mov_b32 s1, exec_lo
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_mbcnt_lo_u32_b32 v1, s0, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, v4, v6, vcc_lo
	global_store_b64 v[2:3], v[40:41], off
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB1_272
; %bb.271:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, R_index@rel32@lo+4
	s_addc_u32 s3, s3, R_index@rel32@hi+12
	s_bcnt1_i32_b32 s0, s0
	global_load_b64 v[2:3], v0, s[2:3]
	v_mov_b32_e32 v4, s0
	s_waitcnt vmcnt(0)
	global_atomic_add_u32 v2, v[2:3], v4, off glc
.LBB1_272:
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, R@rel32@lo+4
	s_addc_u32 s1, s1, R@rel32@hi+12
	v_mov_b32_e32 v6, 0
	global_load_b64 v[3:4], v0, s[0:1]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v0, s0, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo
	v_mov_b32_e32 v4, v45
	global_store_b32 v[0:1], v40, off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_278
; %bb.273:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_277
; %bb.274:                              ; %.preheader3.i.i.i76.preheader
	s_mov_b32 s3, 0
.LBB1_275:                              ; %.preheader3.i.i.i76
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_275
; %bb.276:                              ; %Flow599
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_277:                              ; %Flow601
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_278:                              ; %.loopexit4.i.i.i71
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_280
; %bb.279:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_280:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_288
; %bb.281:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_284
; %bb.282:                              ; %.preheader1.i.i.i74.preheader
	s_mov_b32 s8, 0
.LBB1_283:                              ; %.preheader1.i.i.i74
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_283
.LBB1_284:                              ; %Flow597
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_286
; %bb.285:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_286:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_288
; %bb.287:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_288:                              ; %Flow598
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_289:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_291
; %bb.290:                              ;   in Loop: Header=BB1_289 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_291:                              ;   in Loop: Header=BB1_289 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_293
; %bb.292:                              ;   in Loop: Header=BB1_289 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_294
.LBB1_293:                              ;   in Loop: Header=BB1_289 Depth=1
	s_mov_b32 s1, -1
.LBB1_294:                              ; %Flow592
                                        ;   in Loop: Header=BB1_289 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_289
; %bb.295:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_299
; %bb.296:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_299
; %bb.297:                              ; %.preheader.i.i.i73.preheader
	s_mov_b32 s0, 0
.LBB1_298:                              ; %.preheader.i.i.i73
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_298
.LBB1_299:                              ; %__ockl_printf_begin.exit77
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 62, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 32
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v2, v45
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_305
; %bb.300:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v3, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[8:9], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB1_304
; %bb.301:                              ; %.preheader3.i.i.i83.preheader
	s_mov_b32 s3, 0
.LBB1_302:                              ; %.preheader3.i.i.i83
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[20:21] offset:40
	global_load_b64 v[10:11], v3, s[20:21]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_302
; %bb.303:                              ; %Flow585
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_304:                              ; %Flow587
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_305:                              ; %.loopexit4.i.i.i78
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[20:21] offset:40
	global_load_b128 v[4:7], v3, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_307
; %bb.306:
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, v3
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s8, v5, vcc_lo
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB1_307:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[2:3], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v2
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v0, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v11, vcc_lo, v7, v3, vcc_lo
	v_dual_mov_b32 v2, s26 :: v_dual_mov_b32 v3, s22
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_315
; %bb.308:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[20:21] offset:32 glc
	global_load_b64 v[0:1], v8, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB1_311
; %bb.309:                              ; %.preheader1.i.i.i81.preheader
	s_mov_b32 s8, 0
.LBB1_310:                              ; %.preheader1.i.i.i81
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_310
.LBB1_311:                              ; %Flow583
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_313
; %bb.312:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_313:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_315
; %bb.314:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_315:                              ; %Flow584
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_316:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_318
; %bb.317:                              ;   in Loop: Header=BB1_316 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_318:                              ;   in Loop: Header=BB1_316 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_320
; %bb.319:                              ;   in Loop: Header=BB1_316 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_321
.LBB1_320:                              ;   in Loop: Header=BB1_316 Depth=1
	s_mov_b32 s1, -1
.LBB1_321:                              ; %Flow578
                                        ;   in Loop: Header=BB1_316 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_316
; %bb.322:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_326
; %bb.323:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_326
; %bb.324:                              ; %.preheader.i.i.i80.preheader
	s_mov_b32 s0, 0
.LBB1_325:                              ; %.preheader.i.i.i80
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_325
.LBB1_326:                              ; %__ockl_printf_append_args.exit84
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, v45
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_332
; %bb.327:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_331
; %bb.328:                              ; %.preheader3.i.i.i90.preheader
	s_mov_b32 s3, 0
.LBB1_329:                              ; %.preheader3.i.i.i90
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_329
; %bb.330:                              ; %Flow571
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_331:                              ; %Flow573
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_332:                              ; %.loopexit4.i.i.i85
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_334
; %bb.333:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_334:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_342
; %bb.335:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_338
; %bb.336:                              ; %.preheader1.i.i.i88.preheader
	s_mov_b32 s8, 0
.LBB1_337:                              ; %.preheader1.i.i.i88
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_337
.LBB1_338:                              ; %Flow569
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_340
; %bb.339:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_340:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_342
; %bb.341:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_342:                              ; %Flow570
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_343:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_345
; %bb.344:                              ;   in Loop: Header=BB1_343 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_345:                              ;   in Loop: Header=BB1_343 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_347
; %bb.346:                              ;   in Loop: Header=BB1_343 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_348
.LBB1_347:                              ;   in Loop: Header=BB1_343 Depth=1
	s_mov_b32 s1, -1
.LBB1_348:                              ; %Flow564
                                        ;   in Loop: Header=BB1_343 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_343
; %bb.349:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_353
; %bb.350:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_353
; %bb.351:                              ; %.preheader.i.i.i87.preheader
	s_mov_b32 s0, 0
.LBB1_352:                              ; %.preheader.i.i.i87
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_352
.LBB1_353:                              ; %__ockl_printf_begin.exit91
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 40, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 32
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v45
	v_mov_b32_e32 v5, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v45
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_359
; %bb.354:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[7:8], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[4:5], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v7
	v_and_b32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v6, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	global_load_b64 v[5:6], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[7:8]
	s_cbranch_execz .LBB1_358
; %bb.355:                              ; %.preheader3.i.i.i97.preheader
	s_mov_b32 s3, 0
.LBB1_356:                              ; %.preheader3.i.i.i97
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[9:10], v1, s[20:21]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v5 :: v_dual_and_b32 v3, v3, v8
	v_mad_u64_u32 v[5:6], null, v3, 24, v[2:3]
	global_load_b64 v[5:6], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_356
; %bb.357:                              ; %Flow557
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_358:                              ; %Flow559
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_359:                              ; %.loopexit4.i.i.i92
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v46, 0
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[7:8], v46, s[20:21] offset:40
	global_load_b128 v[1:4], v46, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_361
; %bb.360:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, v46
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v10, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB1_361:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	v_lshlrev_b64 v[3:4], 6, v[45:46]
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v5, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, v6, v4, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_369
; %bb.362:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB1_365
; %bb.363:                              ; %.preheader1.i.i.i95.preheader
	s_mov_b32 s8, 0
.LBB1_364:                              ; %.preheader1.i.i.i95
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_364
.LBB1_365:                              ; %Flow555
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_367
; %bb.366:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_367:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_369
; %bb.368:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_369:                              ; %Flow556
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_370:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_372
; %bb.371:                              ;   in Loop: Header=BB1_370 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_372:                              ;   in Loop: Header=BB1_370 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_374
; %bb.373:                              ;   in Loop: Header=BB1_370 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_375
.LBB1_374:                              ;   in Loop: Header=BB1_370 Depth=1
	s_mov_b32 s1, -1
.LBB1_375:                              ; %Flow550
                                        ;   in Loop: Header=BB1_370 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_370
; %bb.376:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_380
; %bb.377:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_380
; %bb.378:                              ; %.preheader.i.i.i94.preheader
	s_mov_b32 s0, 0
.LBB1_379:                              ; %.preheader.i.i.i94
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_379
.LBB1_380:                              ; %__ockl_printf_append_args.exit98
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB1_381:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20parallel_processEdgePiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 48
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z20parallel_processEdgePiS_S_i, .Lfunc_end1-_Z20parallel_processEdgePiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 19784
; NumSgprs: 35
; NumVgprs: 48
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 48
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	parent.managed          ; @parent.managed
	.type	parent.managed,@object
	.section	.bss,"aw",@nobits
	.globl	parent.managed
	.p2align	4, 0x0
parent.managed:
	.zero	120
	.size	parent.managed, 120

	.protected	dist.managed            ; @dist.managed
	.type	dist.managed,@object
	.globl	dist.managed
	.p2align	4, 0x0
dist.managed:
	.zero	120
	.size	dist.managed, 120

	.protected	fixed.managed           ; @fixed.managed
	.type	fixed.managed,@object
	.globl	fixed.managed
	.p2align	4, 0x0
fixed.managed:
	.zero	30
	.size	fixed.managed, 30

	.protected	Q.managed               ; @Q.managed
	.type	Q.managed,@object
	.globl	Q.managed
	.p2align	4, 0x0
Q.managed:
	.zero	120
	.size	Q.managed, 120

	.protected	R.managed               ; @R.managed
	.type	R.managed,@object
	.globl	R.managed
	.p2align	4, 0x0
R.managed:
	.zero	120
	.size	R.managed, 120

	.protected	T.managed               ; @T.managed
	.type	T.managed,@object
	.globl	T.managed
	.p2align	4, 0x0
T.managed:
	.zero	7200
	.size	T.managed, 7200

	.protected	mwe.managed             ; @mwe.managed
	.type	mwe.managed,@object
	.globl	mwe.managed
	.p2align	4, 0x0
mwe.managed:
	.zero	7200
	.size	mwe.managed, 7200

	.protected	z_device.managed        ; @z_device.managed
	.type	z_device.managed,@object
	.globl	z_device.managed
	.p2align	2, 0x0
z_device.managed:
	.long	0                               ; 0x0
	.size	z_device.managed, 4

	.protected	Q_index.managed         ; @Q_index.managed
	.type	Q_index.managed,@object
	.globl	Q_index.managed
	.p2align	2, 0x0
Q_index.managed:
	.long	0                               ; 0x0
	.size	Q_index.managed, 4

	.protected	R_index.managed         ; @R_index.managed
	.type	R_index.managed,@object
	.globl	R_index.managed
	.p2align	2, 0x0
R_index.managed:
	.long	0                               ; 0x0
	.size	R_index.managed, 4

	.protected	mwe_index.managed       ; @mwe_index.managed
	.type	mwe_index.managed,@object
	.globl	mwe_index.managed
	.p2align	2, 0x0
mwe_index.managed:
	.long	0                               ; 0x0
	.size	mwe_index.managed, 4

	.protected	T_index.managed         ; @T_index.managed
	.type	T_index.managed,@object
	.globl	T_index.managed
	.p2align	2, 0x0
T_index.managed:
	.long	0                               ; 0x0
	.size	T_index.managed, 4

	.protected	edge_cnt.managed        ; @edge_cnt.managed
	.type	edge_cnt.managed,@object
	.globl	edge_cnt.managed
	.p2align	2, 0x0
edge_cnt.managed:
	.long	0                               ; 0x0
	.size	edge_cnt.managed, 4

	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"Thread %d looking for the Edge to be processed\n"
	.size	.str, 48

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"Edge {%d, %d, %d} found at myID:%d\n"
	.size	.str.1, 36

	.type	.str.2,@object                  ; @.str.2
.str.2:
	.asciz	"Destination node is not fixed & also a minimum edge for Z:%d\n"
	.size	.str.2, 62

	.type	.str.3,@object                  ; @.str.3
.str.3:
	.asciz	"Adding k:%d to Tree & R for processing\n"
	.size	.str.3, 40

	.type	.str.4,@object                  ; @.str.4
.str.4:
	.asciz	"Destination node is not fixed & NOT a minimum weight edge\n"
	.size	.str.4, 59

	.type	.str.5,@object                  ; @.str.5
.str.5:
	.asciz	"Adding k:%d to Q for inserting into Heap\n"
	.size	.str.5, 42

	.protected	parent                  ; @parent
	.type	parent,@object
	.section	.bss,"aw",@nobits
	.globl	parent
	.p2align	3, 0x0
parent:
	.quad	0
	.size	parent, 8

	.protected	dist                    ; @dist
	.type	dist,@object
	.globl	dist
	.p2align	3, 0x0
dist:
	.quad	0
	.size	dist, 8

	.protected	fixed                   ; @fixed
	.type	fixed,@object
	.globl	fixed
	.p2align	3, 0x0
fixed:
	.quad	0
	.size	fixed, 8

	.protected	Q                       ; @Q
	.type	Q,@object
	.globl	Q
	.p2align	3, 0x0
Q:
	.quad	0
	.size	Q, 8

	.protected	R                       ; @R
	.type	R,@object
	.globl	R
	.p2align	3, 0x0
R:
	.quad	0
	.size	R, 8

	.protected	T                       ; @T
	.type	T,@object
	.globl	T
	.p2align	3, 0x0
T:
	.quad	0
	.size	T, 8

	.protected	mwe                     ; @mwe
	.type	mwe,@object
	.globl	mwe
	.p2align	3, 0x0
mwe:
	.quad	0
	.size	mwe, 8

	.protected	z_device                ; @z_device
	.type	z_device,@object
	.globl	z_device
	.p2align	3, 0x0
z_device:
	.quad	0
	.size	z_device, 8

	.protected	Q_index                 ; @Q_index
	.type	Q_index,@object
	.globl	Q_index
	.p2align	3, 0x0
Q_index:
	.quad	0
	.size	Q_index, 8

	.protected	R_index                 ; @R_index
	.type	R_index,@object
	.globl	R_index
	.p2align	3, 0x0
R_index:
	.quad	0
	.size	R_index, 8

	.protected	mwe_index               ; @mwe_index
	.type	mwe_index,@object
	.globl	mwe_index
	.p2align	3, 0x0
mwe_index:
	.quad	0
	.size	mwe_index, 8

	.protected	T_index                 ; @T_index
	.type	T_index,@object
	.globl	T_index
	.p2align	3, 0x0
T_index:
	.quad	0
	.size	T_index, 8

	.protected	edge_cnt                ; @edge_cnt
	.type	edge_cnt,@object
	.globl	edge_cnt
	.p2align	3, 0x0
edge_cnt:
	.quad	0
	.size	edge_cnt, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym parent.managed
	.addrsig_sym dist.managed
	.addrsig_sym fixed.managed
	.addrsig_sym Q.managed
	.addrsig_sym R.managed
	.addrsig_sym T.managed
	.addrsig_sym mwe.managed
	.addrsig_sym z_device.managed
	.addrsig_sym Q_index.managed
	.addrsig_sym R_index.managed
	.addrsig_sym mwe_index.managed
	.addrsig_sym T_index.managed
	.addrsig_sym edge_cnt.managed
	.addrsig_sym parent
	.addrsig_sym dist
	.addrsig_sym fixed
	.addrsig_sym Q
	.addrsig_sym R
	.addrsig_sym T
	.addrsig_sym mwe
	.addrsig_sym z_device
	.addrsig_sym Q_index
	.addrsig_sym R_index
	.addrsig_sym mwe_index
	.addrsig_sym T_index
	.addrsig_sym edge_cnt
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
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        .size:           2
        .value_kind:     hidden_group_size_y
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        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
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        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
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        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         112
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20parallel_processEdgePiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z20parallel_processEdgePiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     48
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
