#include <stdio.h>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <chrono>

using namespace std;

__global__
void addKernel( int* a, int* b, int* c )
{
    int idx = threadIdx.x;
    c[idx] = a[idx] + b[idx];
}
void testCudaAdd() {
    const int COUNT = 10;
    int* a = new int[COUNT];
    int* b = new int[COUNT];
    int* c = new int[COUNT];

    for( int i=0;i<COUNT;++i) {
        a[i] = i;
        b[i] = i*100;
    }

    int *devArrayA = 0, *devArrayB = 0, *devArrayC = 0;
    cudaMalloc( &devArrayA, sizeof(int) * COUNT );
    cudaMalloc( &devArrayB, sizeof(int) * COUNT );
    cudaMalloc( &devArrayC, sizeof(int) * COUNT );

    // ̓f[^̓].
    cudaMemcpy( devArrayA, a, sizeof(int)*COUNT, cudaMemcpyHostToDevice );
    cudaMemcpy( devArrayB, b, sizeof(int)*COUNT, cudaMemcpyHostToDevice );

    // s.
    addKernel<<<1, COUNT>>>(devArrayA, devArrayB, devArrayC );
    cudaDeviceSynchronize();

    // ʂ̓ǂݖ߂.
    cudaMemcpy( c, devArrayC, sizeof(int)*COUNT, cudaMemcpyDeviceToHost );
    for(int i=0;i<COUNT;++i) {
        printf( "%d ", c[i] );
    }
    printf( "\n" );

    cudaFree( devArrayC );
    cudaFree( devArrayB );
    cudaFree( devArrayA );

    delete[] a;
    delete[] b;
    delete[] c;
}

__global__
void multMatrix( float* a, float* b, float* c, int COUNT )
{
    int idx = blockDim.x * threadIdx.y + threadIdx.x;
    int idxCol = blockDim.x * blockIdx.x + threadIdx.x;
    int idxRow = blockDim.y * blockIdx.y + threadIdx.y;
    float scanSum = 0;
    for( int i=0;i<COUNT;++i) {
        if( idxCol >= COUNT || idxRow >= COUNT ) {
            continue;
        }
#if 01
        scanSum += a[ idxRow*COUNT + i ] * b[ idxCol + i*COUNT ]; 
#else
        // x̖肪o.
        scanSum = __fadd_rn( scanSum, __fmul_rn( a[idxRow*COUNT+i], b[idxCol+i*COUNT] ) );
#endif
    }
    if( idxCol < COUNT && idxRow < COUNT ) {
        c[idxCol+idxRow*COUNT] = scanSum;
    }
}
void testCudaMult() {
    const int COUNT = 1024;
    const int SIZE = COUNT*COUNT; // sTCY
    float* a = new float[SIZE];
    float* b = new float[SIZE];
    float* c = new float[SIZE];
    for( int i=0;i<SIZE;++i) {
        a[i] = float(0.001f * i );
        b[i] = float(0.005f * i );
    }

    chrono::high_resolution_clock::time_point start, stop;
    start = chrono::high_resolution_clock::now();
    for( int i=0;i<COUNT;++i ) {
        for( int j=0;j<COUNT;++j ) {
            float tmp = float(0);
            for(int t=0;t<COUNT;++t) {
                tmp += a[t+i*COUNT] * b[j+COUNT*t];
            }
            c[i*COUNT+j] = tmp;
        }
    }
    stop = chrono::high_resolution_clock::now();

#if 0
    for(int i=0;i<COUNT;++i) {
        for(int j=0;j<COUNT;++j) {
            printf( "%f ", c[i*COUNT+j] );
        }
        printf( "\n" );
    }
#endif
    chrono::microseconds cpuTime = chrono::duration_cast<chrono::microseconds>(stop-start);
    printf( "CPU: %d (us)\n", cpuTime.count() );
    printf( "\n" );

    float* gpuC = new float[SIZE];
    for( int i=0;i<SIZE;++i) {
        a[i] = float(0.001f * i );
        b[i] = float(0.005f * i );
        gpuC[i] = 0.0f;
    }

    float *devA, *devB, *devC;
    cudaMalloc( &devA, sizeof(float) * SIZE );
    cudaMalloc( &devB, sizeof(float) * SIZE );
    cudaMalloc( &devC, sizeof(float) * SIZE );
    cudaMemcpy( devA, a, sizeof(float)*SIZE, cudaMemcpyHostToDevice );
    cudaMemcpy( devB, b, sizeof(float)*SIZE, cudaMemcpyHostToDevice );
    
    start = chrono::high_resolution_clock::now();

    const int thrCount=32;
    int blockXY = ( COUNT + (thrCount-1) ) / thrCount;
    dim3 blk( blockXY,blockXY);
    dim3 thr( thrCount,thrCount);
    multMatrix<<<blk,thr>>>( devA, devB, devC, COUNT );
    cudaDeviceSynchronize();
    stop = chrono::high_resolution_clock::now();
    cudaMemcpy( gpuC, devC, sizeof(float)*SIZE, cudaMemcpyDeviceToHost );
#if 0
    for(int i=0;i<COUNT;++i) {
        for(int j=0;j<COUNT;++j) {
            printf( "%.2f(%.2f) ", gpuC[i*COUNT+j], c[i*COUNT+j] );
        }
        printf( "\n" );
    }
#endif
    int mismatchCount = 0;
    for(int i=0;i<SIZE;++i) {
        if( c[i] != gpuC[i] ) {
            mismatchCount++;
        }
    }
    if( mismatchCount > 0 ) {
        printf( "mismatchCount= %d (%d)\n", mismatchCount, SIZE );
    }

    chrono::microseconds gpuTime = chrono::duration_cast<chrono::microseconds>(stop-start);
    printf( "GPU: %d (us)\n", gpuTime.count() );
    printf( "\n" );
    printf( "rate = %.4f (%dx%d matrix)\n", cpuTime.count() / (double)gpuTime.count(), COUNT, COUNT );

    cudaFree( devA );
    cudaFree( devB );
    cudaFree( devC );
}

int main() {
    printf( "Hello,CUDA\n" );
    testCudaAdd();
    testCudaMult();
    cudaDeviceReset();
    return 0;
}

	.file	"tmpxft_003a535c_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2138:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2138:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z9addKernelPiS_S_PiS_S_
	.type	_Z32__device_stub__Z9addKernelPiS_S_PiS_S_, @function
_Z32__device_stub__Z9addKernelPiS_S_PiS_S_:
.LFB2160:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9addKernelPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2160:
	.size	_Z32__device_stub__Z9addKernelPiS_S_PiS_S_, .-_Z32__device_stub__Z9addKernelPiS_S_PiS_S_
	.globl	_Z9addKernelPiS_S_
	.type	_Z9addKernelPiS_S_, @function
_Z9addKernelPiS_S_:
.LFB2161:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9addKernelPiS_S_PiS_S_
	.cfi_endproc
.LFE2161:
	.size	_Z9addKernelPiS_S_, .-_Z9addKernelPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z11testCudaAddv
	.type	_Z11testCudaAddv, @function
_Z11testCudaAddv:
.LFB2126:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$40, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$40, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$40, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	imull	$100, %eax, %edx
	movl	%eax, (%r12,%rax,4)
	movl	%edx, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$10, %rax
	jne	.L9
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movl	$40, %esi
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$40, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	movl	$2147483653, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z32__device_stub__Z9addKernelPiS_S_PiS_S_
.L10:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%r13d, %r13d
	movl	$2, %ecx
	movl	$40, %edx
	leaq	.LC0(%rip), %r14
	call	cudaMemcpy@PLT
.L11:
	movl	(%rbx,%r13,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	cmpq	$10, %r13
	jne	.L11
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2126:
	.size	_Z11testCudaAddv, .-_Z11testCudaAddv
	.globl	_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i
	.type	_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i, @function
_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i:
.LFB2162:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10multMatrixPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2162:
	.size	_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i
	.globl	_Z10multMatrixPfS_S_i
	.type	_Z10multMatrixPfS_S_i, @function
_Z10multMatrixPfS_S_i:
.LFB2163:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2163:
	.size	_Z10multMatrixPfS_S_i, .-_Z10multMatrixPfS_S_i
	.section	.rodata.str1.1
.LC5:
	.string	"CPU: %d (us)\n"
.LC6:
	.string	"mismatchCount= %d (%d)\n"
.LC7:
	.string	"GPU: %d (us)\n"
.LC8:
	.string	"rate = %.4f (%dx%d matrix)\n"
	.text
	.globl	_Z12testCudaMultv
	.type	_Z12testCudaMultv, @function
_Z12testCudaMultv:
.LFB2127:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$4194304, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movq	%rax, %r14
	xorl	%eax, %eax
.L22:
	cvtsi2ssl	%eax, %xmm0
	movss	.LC3(%rip), %xmm1
	mulss	%xmm0, %xmm1
	mulss	.LC4(%rip), %xmm0
	movss	%xmm1, 0(%r13,%rax,4)
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L22
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%edx, %edx
	movq	%rax, %rbx
.L23:
	xorl	%ecx, %ecx
	leaq	0(%r13,%rdx), %r8
	leaq	(%r14,%rdx), %rdi
.L27:
	leaq	(%r12,%rcx,4), %rax
	xorl	%esi, %esi
	xorps	%xmm0, %xmm0
.L24:
	movss	(%r8,%rsi,4), %xmm1
	mulss	(%rax), %xmm1
	incq	%rsi
	addq	$4096, %rax
	addss	%xmm1, %xmm0
	cmpq	$1024, %rsi
	jne	.L24
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	$1024, %rcx
	jne	.L27
	addq	$4096, %rdx
	cmpq	$4194304, %rdx
	jne	.L23
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	subq	%rbx, %rax
	leaq	.LC1(%rip), %r15
	cqto
	idivq	%rcx
	movq	%rax, %rdx
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4194304, %edi
	call	_Znam@PLT
	xorl	%ecx, %ecx
	movq	%rax, %rbp
.L28:
	cvtsi2ssl	%ecx, %xmm0
	movss	.LC3(%rip), %xmm1
	mulss	%xmm0, %xmm1
	mulss	.LC4(%rip), %xmm0
	movss	%xmm1, 0(%r13,%rcx,4)
	movss	%xmm0, (%r12,%rcx,4)
	incq	%rcx
	cmpq	$1048576, %rcx
	jne	.L28
	xorl	%eax, %eax
	movq	%rbp, %rdi
	movl	$4194304, %esi
	rep stosl
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdi
	movl	$1, %esi
	movq	%rax, %r12
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1024, %ecx
	movq	8(%rsp), %rdi
	call	_Z35__device_stub__Z10multMatrixPfS_S_iPfS_S_i
.L29:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movl	$4194304, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	movq	%rax, %r13
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorl	%edx, %edx
.L32:
	movss	(%r14,%rax), %xmm0
	ucomiss	0(%rbp,%rax), %xmm0
	jp	.L35
	je	.L30
.L35:
	incl	%edx
.L30:
	addq	$4, %rax
	cmpq	$4194304, %rax
	jne	.L32
	testl	%edx, %edx
	jle	.L33
	movl	$1048576, %ecx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L33:
	movq	%r13, %rax
	movl	$1000, %ecx
	movl	$2, %edi
	subq	%r12, %rax
	leaq	.LC7(%rip), %rsi
	cqto
	idivq	%rcx
	movq	%rax, %rdx
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cvtsi2sdq	%rbp, %xmm1
	movl	$1024, %ecx
	movb	$1, %al
	cvtsi2sdq	%rbx, %xmm0
	movl	$1024, %edx
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2127:
	.size	_Z12testCudaMultv, .-_Z12testCudaMultv
	.section	.rodata.str1.1
.LC9:
	.string	"Hello,CUDA\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2135:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_Z11testCudaAddv
	call	_Z12testCudaMultv
	call	cudaDeviceReset@PLT
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2135:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z10multMatrixPfS_S_i"
.LC11:
	.string	"_Z9addKernelPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2165:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10multMatrixPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9addKernelPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2165:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	981668463
	.align 4
.LC4:
	.long	1000593162
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

#include <chrono>

using namespace std;

__global__
void addKernel( int* a, int* b, int* c )
{
    int idx = threadIdx.x;
    c[idx] = a[idx] + b[idx];
}
void testCudaAdd() {
    const int COUNT = 10;
    int* a = new int[COUNT];
    int* b = new int[COUNT];
    int* c = new int[COUNT];

    for( int i=0;i<COUNT;++i) {
        a[i] = i;
        b[i] = i*100;
    }

    int *devArrayA = 0, *devArrayB = 0, *devArrayC = 0;
    hipMalloc( &devArrayA, sizeof(int) * COUNT );
    hipMalloc( &devArrayB, sizeof(int) * COUNT );
    hipMalloc( &devArrayC, sizeof(int) * COUNT );

    // ̓f[^̓].
    hipMemcpy( devArrayA, a, sizeof(int)*COUNT, hipMemcpyHostToDevice );
    hipMemcpy( devArrayB, b, sizeof(int)*COUNT, hipMemcpyHostToDevice );

    // s.
    addKernel<<<1, COUNT>>>(devArrayA, devArrayB, devArrayC );
    hipDeviceSynchronize();

    // ʂ̓ǂݖ߂.
    hipMemcpy( c, devArrayC, sizeof(int)*COUNT, hipMemcpyDeviceToHost );
    for(int i=0;i<COUNT;++i) {
        printf( "%d ", c[i] );
    }
    printf( "\n" );

    hipFree( devArrayC );
    hipFree( devArrayB );
    hipFree( devArrayA );

    delete[] a;
    delete[] b;
    delete[] c;
}

__global__
void multMatrix( float* a, float* b, float* c, int COUNT )
{
    int idx = blockDim.x * threadIdx.y + threadIdx.x;
    int idxCol = blockDim.x * blockIdx.x + threadIdx.x;
    int idxRow = blockDim.y * blockIdx.y + threadIdx.y;
    float scanSum = 0;
    for( int i=0;i<COUNT;++i) {
        if( idxCol >= COUNT || idxRow >= COUNT ) {
            continue;
        }
#if 01
        scanSum += a[ idxRow*COUNT + i ] * b[ idxCol + i*COUNT ]; 
#else
        // x̖肪o.
        scanSum = __fadd_rn( scanSum, __fmul_rn( a[idxRow*COUNT+i], b[idxCol+i*COUNT] ) );
#endif
    }
    if( idxCol < COUNT && idxRow < COUNT ) {
        c[idxCol+idxRow*COUNT] = scanSum;
    }
}
void testCudaMult() {
    const int COUNT = 1024;
    const int SIZE = COUNT*COUNT; // sTCY
    float* a = new float[SIZE];
    float* b = new float[SIZE];
    float* c = new float[SIZE];
    for( int i=0;i<SIZE;++i) {
        a[i] = float(0.001f * i );
        b[i] = float(0.005f * i );
    }

    chrono::high_resolution_clock::time_point start, stop;
    start = chrono::high_resolution_clock::now();
    for( int i=0;i<COUNT;++i ) {
        for( int j=0;j<COUNT;++j ) {
            float tmp = float(0);
            for(int t=0;t<COUNT;++t) {
                tmp += a[t+i*COUNT] * b[j+COUNT*t];
            }
            c[i*COUNT+j] = tmp;
        }
    }
    stop = chrono::high_resolution_clock::now();

#if 0
    for(int i=0;i<COUNT;++i) {
        for(int j=0;j<COUNT;++j) {
            printf( "%f ", c[i*COUNT+j] );
        }
        printf( "\n" );
    }
#endif
    chrono::microseconds cpuTime = chrono::duration_cast<chrono::microseconds>(stop-start);
    printf( "CPU: %d (us)\n", cpuTime.count() );
    printf( "\n" );

    float* gpuC = new float[SIZE];
    for( int i=0;i<SIZE;++i) {
        a[i] = float(0.001f * i );
        b[i] = float(0.005f * i );
        gpuC[i] = 0.0f;
    }

    float *devA, *devB, *devC;
    hipMalloc( &devA, sizeof(float) * SIZE );
    hipMalloc( &devB, sizeof(float) * SIZE );
    hipMalloc( &devC, sizeof(float) * SIZE );
    hipMemcpy( devA, a, sizeof(float)*SIZE, hipMemcpyHostToDevice );
    hipMemcpy( devB, b, sizeof(float)*SIZE, hipMemcpyHostToDevice );
    
    start = chrono::high_resolution_clock::now();

    const int thrCount=32;
    int blockXY = ( COUNT + (thrCount-1) ) / thrCount;
    dim3 blk( blockXY,blockXY);
    dim3 thr( thrCount,thrCount);
    multMatrix<<<blk,thr>>>( devA, devB, devC, COUNT );
    hipDeviceSynchronize();
    stop = chrono::high_resolution_clock::now();
    hipMemcpy( gpuC, devC, sizeof(float)*SIZE, hipMemcpyDeviceToHost );
#if 0
    for(int i=0;i<COUNT;++i) {
        for(int j=0;j<COUNT;++j) {
            printf( "%.2f(%.2f) ", gpuC[i*COUNT+j], c[i*COUNT+j] );
        }
        printf( "\n" );
    }
#endif
    int mismatchCount = 0;
    for(int i=0;i<SIZE;++i) {
        if( c[i] != gpuC[i] ) {
            mismatchCount++;
        }
    }
    if( mismatchCount > 0 ) {
        printf( "mismatchCount= %d (%d)\n", mismatchCount, SIZE );
    }

    chrono::microseconds gpuTime = chrono::duration_cast<chrono::microseconds>(stop-start);
    printf( "GPU: %d (us)\n", gpuTime.count() );
    printf( "\n" );
    printf( "rate = %.4f (%dx%d matrix)\n", cpuTime.count() / (double)gpuTime.count(), COUNT, COUNT );

    hipFree( devA );
    hipFree( devB );
    hipFree( devC );
}

int main() {
    printf( "Hello,CUDA\n" );
    testCudaAdd();
    testCudaMult();
    hipDeviceReset();
    return 0;
}

	.text
	.file	"kernel.hip"
	.globl	_Z24__device_stub__addKernelPiS_S_ # -- Begin function _Z24__device_stub__addKernelPiS_S_
	.type	_Z24__device_stub__addKernelPiS_S_,@function
_Z24__device_stub__addKernelPiS_S_:     # @_Z24__device_stub__addKernelPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernelPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__addKernelPiS_S_, .Lfunc_end0-_Z24__device_stub__addKernelPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11testCudaAddv                # -- Begin function _Z11testCudaAddv
	.type	_Z11testCudaAddv,@function
_Z11testCudaAddv:                       # @_Z11testCudaAddv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$40, %edi
	callq	_Znam
	movq	%rax, %rbx
	movl	$40, %edi
	callq	_Znam
	movq	%rax, %r14
	movl	$40, %edi
	callq	_Znam
	movq	%rax, %r15
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rbx,%rcx,4)
	movl	%eax, (%r14,%rcx,4)
	incq	%rcx
	addl	$100, %eax
	cmpq	$10, %rcx
	jne	.LBB1_1
# %bb.2:
	xorl	%eax, %eax
	leaq	16(%rsp), %r13
	movq	%rax, (%r13)
	leaq	8(%rsp), %r12
	movq	%rax, (%r12)
	movq	%rsp, %rbp
	movq	%rax, (%rbp)
	movl	$40, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movl	$40, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$40, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$40, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$40, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	9(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z24__device_stub__addKernelPiS_S_
.LBB1_4:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movl	$40, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r12,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB1_5
# %bb.6:
	movl	$10, %edi
	callq	putchar@PLT
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11testCudaAddv, .Lfunc_end1-_Z11testCudaAddv
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__multMatrixPfS_S_i # -- Begin function _Z25__device_stub__multMatrixPfS_S_i
	.type	_Z25__device_stub__multMatrixPfS_S_i,@function
_Z25__device_stub__multMatrixPfS_S_i:   # @_Z25__device_stub__multMatrixPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10multMatrixPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__multMatrixPfS_S_i, .Lfunc_end2-_Z25__device_stub__multMatrixPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12testCudaMultv
.LCPI3_0:
	.long	0x3a83126f                      # float 0.00100000005
.LCPI3_1:
	.long	0x3ba3d70a                      # float 0.00499999989
	.text
	.globl	_Z12testCudaMultv
	.type	_Z12testCudaMultv,@function
_Z12testCudaMultv:                      # @_Z12testCudaMultv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r12
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r15
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %rbx
	xorl	%eax, %eax
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movaps	%xmm0, %xmm1
	mulss	.LCPI3_0(%rip), %xmm1
	movss	%xmm1, (%r12,%rax,4)
	mulss	.LCPI3_1(%rip), %xmm0
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB3_1
# %bb.2:
	xorl	%r13d, %r13d
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	movq	%r12, %rax
.LBB3_3:                                # %.preheader80
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_5 Depth 3
	movq	%r13, %rcx
	shlq	$12, %rcx
	addq	%rbx, %rcx
	movq	%r15, %rdx
	xorl	%esi, %esi
.LBB3_4:                                # %.preheader
                                        #   Parent Loop BB3_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_5 Depth 3
	xorps	%xmm0, %xmm0
	movq	%rdx, %rdi
	xorl	%r8d, %r8d
.LBB3_5:                                #   Parent Loop BB3_3 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r8,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdi), %xmm1
	addss	%xmm1, %xmm0
	incq	%r8
	addq	$4096, %rdi                     # imm = 0x1000
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_4 Depth=2
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	addq	$4, %rdx
	cmpq	$1024, %rsi                     # imm = 0x400
	jne	.LBB3_4
# %bb.7:                                #   in Loop: Header=BB3_3 Depth=1
	incq	%r13
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$1024, %r13                     # imm = 0x400
	jne	.LBB3_3
# %bb.8:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r14, %rax
	movabsq	$2361183241434822607, %rcx      # imm = 0x20C49BA5E353F7CF
	imulq	%rcx
	movq	%rdx, %r14
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %r14
	addq	%rax, %r14
	xorl	%ebp, %ebp
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r13
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movss	.LCPI3_0(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movss	.LCPI3_1(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
.LBB3_9:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	movaps	%xmm0, %xmm1
	mulss	%xmm2, %xmm1
	movss	%xmm1, (%r12,%rbp,4)
	mulss	%xmm3, %xmm0
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	cmpq	$1048576, %rbp                  # imm = 0x100000
	jne	.LBB3_9
# %bb.10:
	leaq	16(%rsp), %rbp
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z25__device_stub__multMatrixPfS_S_i
.LBB3_12:
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbp
	movq	(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB3_13:                               # =>This Inner Loop Header: Depth=1
	movss	(%r13,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	cmpneqss	(%rbx,%rax,4), %xmm0
	movd	%xmm0, %ecx
	subl	%ecx, %r12d
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB3_13
# %bb.14:
	testl	%r12d, %r12d
	je	.LBB3_16
# %bb.15:
	movl	$.L.str.3, %edi
	movl	%r12d, %esi
	movl	$1048576, %edx                  # imm = 0x100000
	xorl	%eax, %eax
	callq	printf
.LBB3_16:
	subq	%r15, %rbp
	movq	%rbp, %rax
	movabsq	$2361183241434822607, %rcx      # imm = 0x20C49BA5E353F7CF
	imulq	%rcx
	movq	%rdx, %rbx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rbx
	addq	%rax, %rbx
	movl	$.L.str.4, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14, %xmm0
	cvtsi2sd	%rbx, %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.5, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z12testCudaMultv, .Lfunc_end3-_Z12testCudaMultv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$.Lstr, %edi
	callq	puts@PLT
	callq	_Z11testCudaAddv
	callq	_Z12testCudaMultv
	callq	hipDeviceReset
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernelPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10multMatrixPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9addKernelPiS_S_,@object      # @_Z9addKernelPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z9addKernelPiS_S_
	.p2align	3, 0x0
_Z9addKernelPiS_S_:
	.quad	_Z24__device_stub__addKernelPiS_S_
	.size	_Z9addKernelPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	_Z10multMatrixPfS_S_i,@object   # @_Z10multMatrixPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10multMatrixPfS_S_i
	.p2align	3, 0x0
_Z10multMatrixPfS_S_i:
	.quad	_Z25__device_stub__multMatrixPfS_S_i
	.size	_Z10multMatrixPfS_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"CPU: %d (us)\n"
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"mismatchCount= %d (%d)\n"
	.size	.L.str.3, 24

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU: %d (us)\n"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"rate = %.4f (%dx%d matrix)\n"
	.size	.L.str.5, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9addKernelPiS_S_"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10multMatrixPfS_S_i"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Hello,CUDA"
	.size	.Lstr, 11

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__addKernelPiS_S_
	.addrsig_sym _Z25__device_stub__multMatrixPfS_S_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9addKernelPiS_S_
	.addrsig_sym _Z10multMatrixPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9addKernelPiS_S_      ; -- Begin function _Z9addKernelPiS_S_
	.globl	_Z9addKernelPiS_S_
	.p2align	8
	.type	_Z9addKernelPiS_S_,@function
_Z9addKernelPiS_S_:                     ; @_Z9addKernelPiS_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[4:5]
	global_load_b32 v2, v0, s[6:7]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernelPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9addKernelPiS_S_, .Lfunc_end0-_Z9addKernelPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 72
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10multMatrixPfS_S_i   ; -- Begin function _Z10multMatrixPfS_S_i
	.globl	_Z10multMatrixPfS_S_i
	.p2align	8
	.type	_Z10multMatrixPfS_S_i,@function
_Z10multMatrixPfS_S_i:                  ; @_Z10multMatrixPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s9, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s9, 0xffff
	s_lshr_b32 s0, s9, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s14, s1, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s0, v[3:4]
	s_cmp_lt_i32 s8, 1
	v_max_i32_e32 v7, v0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s8, v7
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s8
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s1, s8
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[10:11], 2, v[4:5]
	v_add_co_u32 v8, s0, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s0, s5, v9, s0
	v_add_co_u32 v10, s0, s6, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s7, v11, s0
	global_load_b32 v3, v[8:9], off
	global_load_b32 v5, v[10:11], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v3, v5
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v4, s8, v4
	v_add_nc_u32_e32 v2, 1, v2
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_6
.LBB1_5:
	v_mov_b32_e32 v6, 0
.LBB1_6:                                ; %Flow55
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e64 s8, v7
	s_cbranch_execz .LBB1_8
; %bb.7:
	v_mad_u64_u32 v[2:3], null, v1, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10multMatrixPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10multMatrixPfS_S_i, .Lfunc_end1-_Z10multMatrixPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 344
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernelPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernelPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10multMatrixPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10multMatrixPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
