#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <stdbool.h>
static int grid_array[5]={5,9,16,23,30};
static int block_array[5]={2,3,5,10,12};
static FILE *pointerToFile;
__device__
static void calculate(int *readingArray, int* writingArray, double *weights, int n ,int current,int xAxes, int yAxes){
		double Sum = 0;
		if(current < n*n)
		{
	// loop through all the points that affect
	for(int p=-2;p<3;p++){
	for(int q=-2;q<3;q++){
	Sum += weights[(p+2)*5+(q+2)] * readingArray[((p + yAxes + n) % n) * n + ( q + xAxes + n) % n];
	// index properly in order to include the wrap points
	// add the weight to Sum
	}
	}

	// check to decide which value the current spin should take
			if(Sum > 0.00001)// set to 0.000001 in order to take into account
			// floating points
				writingArray[current] = 1;
			else if(Sum < -0.00001)
				writingArray[current] = -1;
			else // if it is zero then let the value remain the same
				writingArray[current] = readingArray[current];
		}
}
// cuda function to parallelize the spin calculation
__global__ void spinCalculation(int n, double * gpuWeights,int *gpuG,int *gpuGTemp,int i,int block,int looper) {
 // variable to hold the sum of the weights

	int current = blockIdx.x * block * block + threadIdx.x; // calculation of the current index



	int xAxes;
	int yAxes;


for(int q=0;q<looper;q++)
{
	// switch the i%2 which is the current number of iretarion
	// so periodically we will be writing to gpuGTemp and then to gpuG
switch (i%2) {
	case 0:
xAxes=(current*looper+q)%n;
yAxes=(current*looper+q)/n;
	 calculate(gpuG,gpuGTemp,gpuWeights,n,current*looper+q,xAxes,yAxes);
	break;
// here everything is the same with the difference that is reading from the gpuGTemp array
// and write to the gpuG
case 1:
xAxes=(current*looper+q)%n;
yAxes=(current*looper+q)/n;
calculate(gpuGTemp,gpuG,gpuWeights,n,current*looper+q,xAxes,yAxes);
break;
}
}
}
void takeBinData(int *array, FILE *file,int n){

if (file==NULL)
{
printf("error opening file");
exit(1);
}
fread(array,sizeof(int),n*n,file);
fclose(file);
}
void ising (int *G, double *w, int k, int n,int grid ,int block)
{
int looper= n*n/(grid*grid*block*block) + 1;
double *weights;
 cudaMalloc(&weights,sizeof(double)*25);

cudaMemcpy(weights,w,25*sizeof(double),cudaMemcpyHostToDevice);

int *tempG=(int *) malloc(sizeof(int)*n*n);

memcpy(tempG,G,n*n*sizeof(int));
  int *gpuTempG;
	cudaMalloc(&gpuTempG,n*n*sizeof(int));
  int *gpuG;
	cudaMalloc(&gpuG,n*n*sizeof(int));
  cudaMemcpy(gpuTempG,tempG,n*n*sizeof(int),cudaMemcpyHostToDevice);
  cudaMemcpy(gpuG,G,n*n*sizeof(int),cudaMemcpyHostToDevice);

for(int i=0;i<k;i++){
	spinCalculation<<<grid*grid,block*block>>>(n,weights,gpuG,gpuTempG,i,block,looper);
  cudaDeviceSynchronize();
}
if(k%2==1){
cudaMemcpy(G,gpuTempG,n*n*sizeof(int),cudaMemcpyDeviceToHost);
}
else{
	cudaMemcpy(G,gpuG,n*n*sizeof(int),cudaMemcpyDeviceToHost);
}


cudaFree(gpuG);
cudaFree(gpuTempG);
free(tempG);
}

void checkCorrectness(int *G, int *expectedState,int n,int k){
bool noMistake=true;
int counter=0;
	for(int i=0;i<n*n;i++)
	{
		if(expectedState[i]!=G[i])
			{
				//printf("wrong in index %d\n",i );
counter++;
	noMistake=false;

	}
	}
	if (noMistake) {
	printf("ising for k=%d is correct\n",k );
	}
	else{
		printf("ising for k=%d is wrong\n",k );

	}
printf("%d\n",counter );
}

int main(){
int n=517;
int grid,block;
for(int i=0;i<5;i++){
	for(int j=0;j<5;j++)
{
grid=grid_array[i];
block=block_array[j];
int *initialG=(int *) malloc(sizeof(int)*n*n);
int *G=(int *)malloc(sizeof(int)*n*n);
int *expectedState=(int *)malloc(sizeof(int)*n*n);
FILE *file;
file= fopen("conf-init.bin","rb");
takeBinData(initialG,file,n);
memcpy(G,initialG,sizeof(int)*n*n);
double weights[] = {0.004, 0.016, 0.026, 0.016, 0.004,
			0.016, 0.071, 0.117, 0.071, 0.016,
		0.026, 0.117, 0, 0.117, 0.026,
		0.016, 0.071, 0.117, 0.071, 0.016,
		0.004, 0.016, 0.026, 0.016, 0.004};
clock_t start,end;
start=clock();
ising(G,weights,1,n,grid,block);
end=clock();
printf("%lf\n",((double)(end-start))/CLOCKS_PER_SEC);
file=fopen("conf-1.bin","rb");
takeBinData(expectedState,file,n);
checkCorrectness(G,expectedState,n,1);
memcpy(G,initialG,sizeof(int)*n*n);
start=clock();
ising(G,weights,4,n,grid,block);
end=clock();
printf("%lf\n",((double)(end-start))/CLOCKS_PER_SEC );
file =fopen("conf-4.bin","rb");
takeBinData(expectedState,file,n);
checkCorrectness(G,expectedState,n,4);
memcpy(G,initialG,sizeof(int)*n*n);
start=clock();
ising(G,weights,11,n,grid,block);
end=clock();
printf("%lf\n",((double)(end-start))/CLOCKS_PER_SEC );
file =fopen("conf-11.bin","rb");
takeBinData(expectedState,file,n);
checkCorrectness(G,expectedState,n,11);
}
}

	return 0;
}

	.file	"tmpxft_0039c0d1_00000000-6_V2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"error opening file"
	.text
	.globl	_Z11takeBinDataPiP8_IO_FILEi
	.type	_Z11takeBinDataPiP8_IO_FILEi, @function
_Z11takeBinDataPiP8_IO_FILEi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	testq	%rsi, %rsi
	jne	.L3
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L3:
	imull	%edx, %edx
	movq	%rsi, %rbx
	movq	%rsi, %r8
	orq	$-1, %rsi
	movslq	%edx, %rcx
	movl	$4, %edx
	call	__fread_chk@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11takeBinDataPiP8_IO_FILEi, .-_Z11takeBinDataPiP8_IO_FILEi
	.section	.rodata.str1.1
.LC2:
	.string	"ising for k=%d is correct\n"
.LC3:
	.string	"ising for k=%d is wrong\n"
.LC4:
	.string	"%d\n"
	.text
	.globl	_Z16checkCorrectnessPiS_ii
	.type	_Z16checkCorrectnessPiS_ii, @function
_Z16checkCorrectnessPiS_ii:
.LFB2030:
	.cfi_startproc
	endbr64
	movl	%edx, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%ecx, %edx
	xorl	%ebx, %ebx
	imull	%eax, %eax
	movb	$1, %r8b
	movl	%eax, %ecx
	xorl	%eax, %eax
.L7:
	cmpl	%eax, %ecx
	jle	.L14
	movl	(%rdi,%rax,4), %r9d
	cmpl	%r9d, (%rsi,%rax,4)
	je	.L8
	incl	%ebx
	xorl	%r8d, %r8d
.L8:
	incq	%rax
	jmp	.L7
.L14:
	leaq	.LC2(%rip), %rsi
	testb	%r8b, %r8b
	jne	.L13
	leaq	.LC3(%rip), %rsi
.L13:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z16checkCorrectnessPiS_ii, .-_Z16checkCorrectnessPiS_ii
	.globl	_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii
	.type	_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii, @function
_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 40(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15spinCalculationiPdPiS0_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii, .-_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii
	.globl	_Z15spinCalculationiPdPiS0_iii
	.type	_Z15spinCalculationiPdPiS0_iii, @function
_Z15spinCalculationiPdPiS0_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii
	.cfi_endproc
.LFE2057:
	.size	_Z15spinCalculationiPdPiS0_iii, .-_Z15spinCalculationiPdPiS0_iii
	.globl	_Z5isingPiPdiiii
	.type	_Z5isingPiPdiiii, @function
_Z5isingPiPdiiii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	imull	%r8d, %r8d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4294967297, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	movl	$200, %esi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r9d, %ebx
	movl	%ebx, %r15d
	imull	%ebx, %r15d
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movl	%edx, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movl	%ecx, %eax
	imull	%ecx, %eax
	movl	%r8d, %ecx
	imull	%r9d, %ecx
	cltd
	imull	%r9d, %ecx
	idivl	%ecx
	incl	%eax
	movl	%eax, 28(%rsp)
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	movl	$200, %edx
	xorl	%r13d, %r13d
	call	cudaMemcpy@PLT
	movslq	%ebp, %rax
	imulq	%rax, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rcx
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	movq	%rcx, %rdx
	call	__memcpy_chk@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
.L21:
	movl	24(%rsp), %eax
	cmpl	%eax, %r13d
	jge	.L30
	movq	%r14, 80(%rsp)
	movl	84(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, 68(%rsp)
	movl	72(%rsp), %esi
	movl	%r15d, 76(%rsp)
	movq	76(%rsp), %rdx
	movl	%r12d, 64(%rsp)
	movq	64(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	%rax
	.cfi_def_cfa_offset 168
	movl	36(%rsp), %eax
	movl	%ebx, %r9d
	movl	%r13d, %r8d
	movl	%ebp, %edi
	pushq	%rax
	.cfi_def_cfa_offset 176
	movq	64(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	56(%rsp), %rsi
	call	_Z44__device_stub__Z15spinCalculationiPdPiS0_iiiiPdPiS0_iii
	popq	%rdx
	.cfi_def_cfa_offset 168
	popq	%rcx
	.cfi_def_cfa_offset 160
.L22:
	call	cudaDeviceSynchronize@PLT
	incl	%r13d
	jmp	.L21
.L30:
	cltd
	movl	$2, %ecx
	idivl	%ecx
	decl	%edx
	jne	.L24
	movq	(%rsp), %rdx
	movq	48(%rsp), %rsi
	jmp	.L29
.L24:
	movq	(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
.L29:
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	movq	16(%rsp), %rdi
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z5isingPiPdiiii, .-_Z5isingPiPdiiii
	.section	.rodata.str1.1
.LC5:
	.string	"rb"
.LC6:
	.string	"conf-init.bin"
.LC8:
	.string	"%lf\n"
.LC9:
	.string	"conf-1.bin"
.LC10:
	.string	"conf-4.bin"
.LC11:
	.string	"conf-11.bin"
	.section	.rodata
	.align 32
.LC0:
	.long	-755914244
	.long	1064329805
	.long	-755914244
	.long	1066426957
	.long	1992864825
	.long	1067098046
	.long	-755914244
	.long	1066426957
	.long	-755914244
	.long	1064329805
	.long	-755914244
	.long	1066426957
	.long	1443109011
	.long	1068641550
	.long	1168231105
	.long	1069413302
	.long	1443109011
	.long	1068641550
	.long	-755914244
	.long	1066426957
	.long	1992864825
	.long	1067098046
	.long	1168231105
	.long	1069413302
	.long	0
	.long	0
	.long	1168231105
	.long	1069413302
	.long	1992864825
	.long	1067098046
	.long	-755914244
	.long	1066426957
	.long	1443109011
	.long	1068641550
	.long	1168231105
	.long	1069413302
	.long	1443109011
	.long	1068641550
	.long	-755914244
	.long	1066426957
	.long	-755914244
	.long	1064329805
	.long	-755914244
	.long	1066426957
	.long	1992864825
	.long	1067098046
	.long	-755914244
	.long	1066426957
	.long	-755914244
	.long	1064329805
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	20+_ZL11block_array(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	_ZL10grid_array(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$248, %rsp
	.cfi_def_cfa_offset 304
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
.L32:
	leaq	_ZL11block_array(%rip), %rbp
.L33:
	movl	(%r12), %eax
	movl	$1069156, %edi
	addq	$4, %rbp
	movl	%eax, 16(%rsp)
	movl	-4(%rbp), %eax
	movl	%eax, 20(%rsp)
	call	malloc@PLT
	movl	$1069156, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$1069156, %edi
	movq	%rax, (%rsp)
	call	malloc@PLT
	leaq	.LC5(%rip), %rsi
	leaq	.LC6(%rip), %rdi
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movl	$517, %edx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	call	_Z11takeBinDataPiP8_IO_FILEi
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$267289, %ecx
	rep movsl
	leaq	32(%rsp), %rdi
	leaq	.LC0(%rip), %rsi
	movl	$50, %ecx
	rep movsl
	call	clock@PLT
	movl	20(%rsp), %r9d
	movl	16(%rsp), %r8d
	movl	$517, %ecx
	movq	(%rsp), %rdi
	movq	%rax, %r13
	leaq	32(%rsp), %rax
	movl	$1, %edx
	movq	%rax, %rsi
	movq	%rax, 24(%rsp)
	call	_Z5isingPiPdiiii
	call	clock@PLT
	movl	$2, %edi
	subq	%r13, %rax
	leaq	.LC8(%rip), %r13
	cvtsi2sdq	%rax, %xmm0
	movq	%r13, %rsi
	movb	$1, %al
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	leaq	.LC9(%rip), %rdi
	call	fopen@PLT
	movq	8(%rsp), %rdi
	movl	$517, %edx
	movq	%rax, %rsi
	call	_Z11takeBinDataPiP8_IO_FILEi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$517, %edx
	movl	$1, %ecx
	call	_Z16checkCorrectnessPiS_ii
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$267289, %ecx
	rep movsl
	call	clock@PLT
	movl	20(%rsp), %r9d
	movl	16(%rsp), %r8d
	movl	$517, %ecx
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$4, %edx
	movq	%rax, %r15
	call	_Z5isingPiPdiiii
	call	clock@PLT
	movq	%r13, %rsi
	movl	$2, %edi
	subq	%r15, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	leaq	.LC10(%rip), %rdi
	call	fopen@PLT
	movq	8(%rsp), %rdi
	movl	$517, %edx
	movq	%rax, %rsi
	call	_Z11takeBinDataPiP8_IO_FILEi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$517, %edx
	movl	$4, %ecx
	call	_Z16checkCorrectnessPiS_ii
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$267289, %ecx
	rep movsl
	call	clock@PLT
	movl	20(%rsp), %r9d
	movl	16(%rsp), %r8d
	movl	$517, %ecx
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$11, %edx
	movq	%rax, %rbx
	call	_Z5isingPiPdiiii
	call	clock@PLT
	movq	%r13, %rsi
	movl	$2, %edi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	leaq	.LC11(%rip), %rdi
	call	fopen@PLT
	movq	8(%rsp), %rdi
	movl	$517, %edx
	movq	%rax, %rsi
	call	_Z11takeBinDataPiP8_IO_FILEi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$11, %ecx
	movl	$517, %edx
	call	_Z16checkCorrectnessPiS_ii
	cmpq	%r14, %rbp
	leaq	20+_ZL10grid_array(%rip), %r11
	jne	.L33
	addq	$4, %r12
	cmpq	%r11, %r12
	jne	.L32
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$248, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC13:
	.string	"_Z15spinCalculationiPdPiS0_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15spinCalculationiPdPiS0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.align 16
	.type	_ZL11block_array, @object
	.size	_ZL11block_array, 20
_ZL11block_array:
	.long	2
	.long	3
	.long	5
	.long	10
	.long	12
	.align 16
	.type	_ZL10grid_array, @object
	.size	_ZL10grid_array, 20
_ZL10grid_array:
	.long	5
	.long	9
	.long	16
	.long	23
	.long	30
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <stdbool.h>
static int grid_array[5]={5,9,16,23,30};
static int block_array[5]={2,3,5,10,12};
static FILE *pointerToFile;
__device__
static void calculate(int *readingArray, int* writingArray, double *weights, int n ,int current,int xAxes, int yAxes){
		double Sum = 0;
		if(current < n*n)
		{
	// loop through all the points that affect
	for(int p=-2;p<3;p++){
	for(int q=-2;q<3;q++){
	Sum += weights[(p+2)*5+(q+2)] * readingArray[((p + yAxes + n) % n) * n + ( q + xAxes + n) % n];
	// index properly in order to include the wrap points
	// add the weight to Sum
	}
	}

	// check to decide which value the current spin should take
			if(Sum > 0.00001)// set to 0.000001 in order to take into account
			// floating points
				writingArray[current] = 1;
			else if(Sum < -0.00001)
				writingArray[current] = -1;
			else // if it is zero then let the value remain the same
				writingArray[current] = readingArray[current];
		}
}
// cuda function to parallelize the spin calculation
__global__ void spinCalculation(int n, double * gpuWeights,int *gpuG,int *gpuGTemp,int i,int block,int looper) {
 // variable to hold the sum of the weights

	int current = blockIdx.x * block * block + threadIdx.x; // calculation of the current index



	int xAxes;
	int yAxes;


for(int q=0;q<looper;q++)
{
	// switch the i%2 which is the current number of iretarion
	// so periodically we will be writing to gpuGTemp and then to gpuG
switch (i%2) {
	case 0:
xAxes=(current*looper+q)%n;
yAxes=(current*looper+q)/n;
	 calculate(gpuG,gpuGTemp,gpuWeights,n,current*looper+q,xAxes,yAxes);
	break;
// here everything is the same with the difference that is reading from the gpuGTemp array
// and write to the gpuG
case 1:
xAxes=(current*looper+q)%n;
yAxes=(current*looper+q)/n;
calculate(gpuGTemp,gpuG,gpuWeights,n,current*looper+q,xAxes,yAxes);
break;
}
}
}
void takeBinData(int *array, FILE *file,int n){

if (file==NULL)
{
printf("error opening file");
exit(1);
}
fread(array,sizeof(int),n*n,file);
fclose(file);
}
void ising (int *G, double *w, int k, int n,int grid ,int block)
{
int looper= n*n/(grid*grid*block*block) + 1;
double *weights;
 hipMalloc(&weights,sizeof(double)*25);

hipMemcpy(weights,w,25*sizeof(double),hipMemcpyHostToDevice);

int *tempG=(int *) malloc(sizeof(int)*n*n);

memcpy(tempG,G,n*n*sizeof(int));
  int *gpuTempG;
	hipMalloc(&gpuTempG,n*n*sizeof(int));
  int *gpuG;
	hipMalloc(&gpuG,n*n*sizeof(int));
  hipMemcpy(gpuTempG,tempG,n*n*sizeof(int),hipMemcpyHostToDevice);
  hipMemcpy(gpuG,G,n*n*sizeof(int),hipMemcpyHostToDevice);

for(int i=0;i<k;i++){
	spinCalculation<<<grid*grid,block*block>>>(n,weights,gpuG,gpuTempG,i,block,looper);
  hipDeviceSynchronize();
}
if(k%2==1){
hipMemcpy(G,gpuTempG,n*n*sizeof(int),hipMemcpyDeviceToHost);
}
else{
	hipMemcpy(G,gpuG,n*n*sizeof(int),hipMemcpyDeviceToHost);
}


hipFree(gpuG);
hipFree(gpuTempG);
free(tempG);
}

void checkCorrectness(int *G, int *expectedState,int n,int k){
bool noMistake=true;
int counter=0;
	for(int i=0;i<n*n;i++)
	{
		if(expectedState[i]!=G[i])
			{
				//printf("wrong in index %d\n",i );
counter++;
	noMistake=false;

	}
	}
	if (noMistake) {
	printf("ising for k=%d is correct\n",k );
	}
	else{
		printf("ising for k=%d is wrong\n",k );

	}
printf("%d\n",counter );
}

int main(){
int n=517;
int grid,block;
for(int i=0;i<5;i++){
	for(int j=0;j<5;j++)
{
grid=grid_array[i];
block=block_array[j];
int *initialG=(int *) malloc(sizeof(int)*n*n);
int *G=(int *)malloc(sizeof(int)*n*n);
int *expectedState=(int *)malloc(sizeof(int)*n*n);
FILE *file;
file= fopen("conf-init.bin","rb");
takeBinData(initialG,file,n);
memcpy(G,initialG,sizeof(int)*n*n);
double weights[] = {0.004, 0.016, 0.026, 0.016, 0.004,
			0.016, 0.071, 0.117, 0.071, 0.016,
		0.026, 0.117, 0, 0.117, 0.026,
		0.016, 0.071, 0.117, 0.071, 0.016,
		0.004, 0.016, 0.026, 0.016, 0.004};
clock_t start,end;
start=clock();
ising(G,weights,1,n,grid,block);
end=clock();
printf("%lf\n",((double)(end-start))/CLOCKS_PER_SEC);
file=fopen("conf-1.bin","rb");
takeBinData(expectedState,file,n);
checkCorrectness(G,expectedState,n,1);
memcpy(G,initialG,sizeof(int)*n*n);
start=clock();
ising(G,weights,4,n,grid,block);
end=clock();
printf("%lf\n",((double)(end-start))/CLOCKS_PER_SEC );
file =fopen("conf-4.bin","rb");
takeBinData(expectedState,file,n);
checkCorrectness(G,expectedState,n,4);
memcpy(G,initialG,sizeof(int)*n*n);
start=clock();
ising(G,weights,11,n,grid,block);
end=clock();
printf("%lf\n",((double)(end-start))/CLOCKS_PER_SEC );
file =fopen("conf-11.bin","rb");
takeBinData(expectedState,file,n);
checkCorrectness(G,expectedState,n,11);
}
}

	return 0;
}

	.text
	.file	"V2.hip"
	.globl	_Z30__device_stub__spinCalculationiPdPiS0_iii # -- Begin function _Z30__device_stub__spinCalculationiPdPiS0_iii
	.type	_Z30__device_stub__spinCalculationiPdPiS0_iii,@function
_Z30__device_stub__spinCalculationiPdPiS0_iii: # @_Z30__device_stub__spinCalculationiPdPiS0_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15spinCalculationiPdPiS0_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__spinCalculationiPdPiS0_iii, .Lfunc_end0-_Z30__device_stub__spinCalculationiPdPiS0_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11takeBinDataPiP8_IO_FILEi    # -- Begin function _Z11takeBinDataPiP8_IO_FILEi
	.type	_Z11takeBinDataPiP8_IO_FILEi,@function
_Z11takeBinDataPiP8_IO_FILEi:           # @_Z11takeBinDataPiP8_IO_FILEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
                                        # kill: def $edx killed $edx def $rdx
	testq	%rsi, %rsi
	je	.LBB1_1
# %bb.2:
	movq	%rsi, %rbx
	imull	%edx, %edx
	movl	$4, %esi
	movq	%rbx, %rcx
	callq	fread
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.LBB1_1:
	.cfi_def_cfa_offset 16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z11takeBinDataPiP8_IO_FILEi, .Lfunc_end1-_Z11takeBinDataPiP8_IO_FILEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z5isingPiPdiiii                # -- Begin function _Z5isingPiPdiiii
	.type	_Z5isingPiPdiiii,@function
_Z5isingPiPdiiii:                       # @_Z5isingPiPdiiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movl	%edx, %ebp
	movq	%rsi, %r14
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movl	%ecx, %ebx
	imull	%ebx, %ebx
	imull	%r8d, %r8d
	movl	%r9d, 44(%rsp)                  # 4-byte Spill
	movl	%r9d, %ecx
	imull	%r9d, %ecx
	movl	%ecx, 36(%rsp)                  # 4-byte Spill
	movl	%r8d, 40(%rsp)                  # 4-byte Spill
	imull	%r8d, %ecx
	xorl	%r13d, %r13d
	movl	%ebx, %eax
	xorl	%edx, %edx
	idivl	%ecx
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	leaq	64(%rsp), %r12
	movl	$200, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$200, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r15d, %r14d
	movslq	%r15d, %rdi
	imulq	%rdi, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r15
	shlq	$2, %rbx
	movq	%rax, %rdi
	movq	48(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	movq	%rbx, %rdx
	callq	memcpy@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%ebp, %ebp
	jle	.LBB2_5
# %bb.1:                                # %.lr.ph
	incl	12(%rsp)                        # 4-byte Folded Spill
	movl	40(%rsp), %r15d                 # 4-byte Reload
	btsq	$32, %r15
	movl	36(%rsp), %r12d                 # 4-byte Reload
	btsq	$32, %r12
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movq	64(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rcx
	movl	12(%rsp), %eax                  # 4-byte Reload
	movl	%eax, (%rsp)
	movl	%r14d, %edi
	movl	%r13d, %r8d
	movl	44(%rsp), %r9d                  # 4-byte Reload
	callq	_Z30__device_stub__spinCalculationiPdPiS0_iii
.LBB2_4:                                #   in Loop: Header=BB2_2 Depth=1
	callq	hipDeviceSynchronize
	incl	%r13d
	cmpl	%r13d, %ebp
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge
	andl	$-2147483647, %ebp              # imm = 0x80000001
	cmpl	$1, %ebp
	leaq	24(%rsp), %rax
	leaq	16(%rsp), %rcx
	cmoveq	%rax, %rcx
	movq	(%rcx), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z5isingPiPdiiii, .Lfunc_end2-_Z5isingPiPdiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16checkCorrectnessPiS_ii      # -- Begin function _Z16checkCorrectnessPiS_ii
	.type	_Z16checkCorrectnessPiS_ii,@function
_Z16checkCorrectnessPiS_ii:             # @_Z16checkCorrectnessPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
                                        # kill: def $edx killed $edx def $rdx
	testl	%edx, %edx
	je	.LBB3_1
# %bb.2:                                # %.lr.ph.preheader
	imull	%edx, %edx
	cmpl	$1, %edx
	adcl	$0, %edx
	movb	$1, %al
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	xorl	%ebx, %ebx
.LBB3_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rsi,%r9,4), %r10d
	xorl	%r11d, %r11d
	cmpl	(%rdi,%r9,4), %r10d
	movzbl	%al, %eax
	cmovnel	%r8d, %eax
	setne	%r11b
	addl	%r11d, %ebx
	incq	%r9
	cmpq	%r9, %rdx
	jne	.LBB3_3
# %bb.4:                                # %._crit_edge
	testb	$1, %al
	movl	$.L.str.2, %eax
	movl	$.L.str.1, %edi
	cmoveq	%rax, %rdi
	jmp	.LBB3_5
.LBB3_1:
	xorl	%ebx, %ebx
	movl	$.L.str.1, %edi
.LBB3_5:                                # %._crit_edge.thread
	movl	%ecx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end3:
	.size	_Z16checkCorrectnessPiS_ii, .Lfunc_end3-_Z16checkCorrectnessPiS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	leaq	32(%rsp), %r12
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	_ZL10grid_array(,%rax,4), %eax
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	movq	$-20, %rax
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	_ZL11block_array+20(%rax), %r13d
	movl	$1069156, %edi                  # imm = 0x105064
	callq	malloc
	movq	%rax, %rbp
	movl	$1069156, %edi                  # imm = 0x105064
	callq	malloc
	movq	%rax, %r14
	movl	$1069156, %edi                  # imm = 0x105064
	callq	malloc
	movq	%rax, %r15
	movl	$.L.str.4, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rbp, %rdi
	movq	%rax, %rsi
	movl	$517, %edx                      # imm = 0x205
	callq	_Z11takeBinDataPiP8_IO_FILEi
	movl	$1069156, %edx                  # imm = 0x105064
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	memcpy@PLT
	movl	$.L__const.main.weights, %esi
	movl	$200, %edx
	movq	%r12, %rdi
	callq	memcpy@PLT
	callq	clock
	movq	%rax, %rbx
	movq	%r14, %rdi
	leaq	32(%rsp), %rsi
	movl	$1, %edx
	movl	$517, %ecx                      # imm = 0x205
	movl	12(%rsp), %r12d                 # 4-byte Reload
	movl	%r12d, %r8d
	movl	%r13d, %r9d
	callq	_Z5isingPiPdiiii
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.7, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%r15, %rdi
	movq	%rax, %rsi
	movl	$517, %edx                      # imm = 0x205
	callq	_Z11takeBinDataPiP8_IO_FILEi
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$517, %edx                      # imm = 0x205
	movl	$1, %ecx
	callq	_Z16checkCorrectnessPiS_ii
	movl	$1069156, %edx                  # imm = 0x105064
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	memcpy@PLT
	callq	clock
	movq	%rax, %rbx
	movq	%r14, %rdi
	leaq	32(%rsp), %rsi
	movl	$4, %edx
	movl	$517, %ecx                      # imm = 0x205
	movl	%r12d, %r8d
	movl	%r13d, %r9d
	callq	_Z5isingPiPdiiii
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.8, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%r15, %rdi
	movq	%rax, %rsi
	movl	$517, %edx                      # imm = 0x205
	callq	_Z11takeBinDataPiP8_IO_FILEi
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$517, %edx                      # imm = 0x205
	movl	$4, %ecx
	callq	_Z16checkCorrectnessPiS_ii
	movl	$1069156, %edx                  # imm = 0x105064
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	memcpy@PLT
	callq	clock
	movq	%rax, %rbx
	movq	%r14, %rdi
	leaq	32(%rsp), %rsi
	movl	$11, %edx
	movl	$517, %ecx                      # imm = 0x205
	movl	%r12d, %r8d
	movl	%r13d, %r9d
	callq	_Z5isingPiPdiiii
	callq	clock
	subq	%rbx, %rax
	leaq	32(%rsp), %r12
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.9, %edi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%r15, %rdi
	movq	%rax, %rsi
	movl	$517, %edx                      # imm = 0x205
	callq	_Z11takeBinDataPiP8_IO_FILEi
	movq	%r14, %rdi
	movq	%r15, %rsi
	movl	$517, %edx                      # imm = 0x205
	movl	$11, %ecx
	callq	_Z16checkCorrectnessPiS_ii
	movq	24(%rsp), %rax                  # 8-byte Reload
	addq	$4, %rax
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	movq	16(%rsp), %rax                  # 8-byte Reload
	incq	%rax
	cmpq	$5, %rax
	jne	.LBB4_1
# %bb.4:
	xorl	%eax, %eax
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15spinCalculationiPdPiS0_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15spinCalculationiPdPiS0_iii,@object # @_Z15spinCalculationiPdPiS0_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15spinCalculationiPdPiS0_iii
	.p2align	3, 0x0
_Z15spinCalculationiPdPiS0_iii:
	.quad	_Z30__device_stub__spinCalculationiPdPiS0_iii
	.size	_Z15spinCalculationiPdPiS0_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"error opening file"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"ising for k=%d is correct\n"
	.size	.L.str.1, 27

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"ising for k=%d is wrong\n"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d\n"
	.size	.L.str.3, 4

	.type	_ZL10grid_array,@object         # @_ZL10grid_array
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
_ZL10grid_array:
	.long	5                               # 0x5
	.long	9                               # 0x9
	.long	16                              # 0x10
	.long	23                              # 0x17
	.long	30                              # 0x1e
	.size	_ZL10grid_array, 20

	.type	_ZL11block_array,@object        # @_ZL11block_array
	.p2align	4, 0x0
_ZL11block_array:
	.long	2                               # 0x2
	.long	3                               # 0x3
	.long	5                               # 0x5
	.long	10                              # 0xa
	.long	12                              # 0xc
	.size	_ZL11block_array, 20

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"conf-init.bin"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"rb"
	.size	.L.str.5, 3

	.type	.L__const.main.weights,@object  # @__const.main.weights
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
.L__const.main.weights:
	.quad	0x3f70624dd2f1a9fc              # double 0.0040000000000000001
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3f9a9fbe76c8b439              # double 0.025999999999999999
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3f70624dd2f1a9fc              # double 0.0040000000000000001
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3fb22d0e56041893              # double 0.070999999999999994
	.quad	0x3fbdf3b645a1cac1              # double 0.11700000000000001
	.quad	0x3fb22d0e56041893              # double 0.070999999999999994
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3f9a9fbe76c8b439              # double 0.025999999999999999
	.quad	0x3fbdf3b645a1cac1              # double 0.11700000000000001
	.quad	0x0000000000000000              # double 0
	.quad	0x3fbdf3b645a1cac1              # double 0.11700000000000001
	.quad	0x3f9a9fbe76c8b439              # double 0.025999999999999999
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3fb22d0e56041893              # double 0.070999999999999994
	.quad	0x3fbdf3b645a1cac1              # double 0.11700000000000001
	.quad	0x3fb22d0e56041893              # double 0.070999999999999994
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3f70624dd2f1a9fc              # double 0.0040000000000000001
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3f9a9fbe76c8b439              # double 0.025999999999999999
	.quad	0x3f90624dd2f1a9fc              # double 0.016
	.quad	0x3f70624dd2f1a9fc              # double 0.0040000000000000001
	.size	.L__const.main.weights, 200

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"%lf\n"
	.size	.L.str.6, 5

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"conf-1.bin"
	.size	.L.str.7, 11

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"conf-4.bin"
	.size	.L.str.8, 11

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"conf-11.bin"
	.size	.L.str.9, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15spinCalculationiPdPiS0_iii"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__spinCalculationiPdPiS0_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15spinCalculationiPdPiS0_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15spinCalculationiPdPiS0_iii ; -- Begin function _Z15spinCalculationiPdPiS0_iii
	.globl	_Z15spinCalculationiPdPiS0_iii
	.p2align	8
	.type	_Z15spinCalculationiPdPiS0_iii,@function
_Z15spinCalculationiPdPiS0_iii:         ; @_Z15spinCalculationiPdPiS0_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_34
; %bb.1:                                ; %.lr.ph
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_mul_i32 s15, s15, s5
	s_mov_b32 s20, 0
	s_mov_b32 s13, 0xbee4f8b5
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mul_i32 s19, s2, s2
	s_add_i32 s7, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s7, s7, s3
	v_cvt_f32_u32_e32 v1, s7
	s_sub_i32 s12, 0, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
	s_lshr_b32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s5, s4, s5
	v_mul_lo_u32 v4, s12, v3
	s_and_b32 s5, s5, -2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_sub_i32 s18, s4, s5
	s_mov_b32 s4, 0x88e368f1
	s_mov_b32 s5, 0x3ee4f8b5
	v_mul_hi_u32 v0, v3, v4
	v_mul_lo_u32 v4, v1, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v3, v0
.LBB0_2:                                ; %NodeBlock
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_7 Depth 3
                                        ;     Child Loop BB0_22 Depth 2
                                        ;       Child Loop BB0_23 Depth 3
	s_cmp_lt_i32 s18, 1
	s_mov_b32 s12, -1
	s_cbranch_scc1 .LBB0_18
; %bb.3:                                ; %LeafBlock98
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_cmp_eq_u32 s18, 1
	s_cbranch_scc0 .LBB0_17
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, s20, v4
	s_mov_b32 s21, exec_lo
	v_cmpx_gt_i32_e64 s19, v0
	s_cbranch_execz .LBB0_16
; %bb.5:                                ; %.preheader33.i43
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s12, -2
	s_mov_b64 s[14:15], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v0, v1
	v_xor_b32_e32 v9, s3, v1
	v_xor_b32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v5
	v_mul_lo_u32 v6, v3, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v3
	v_subrev_nc_u32_e32 v7, s7, v2
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v2, v2, v7
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	v_cndmask_b32_e32 v2, v3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v9
	v_sub_nc_u32_e32 v3, v9, v2
	v_sub_nc_u32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, s2, v3, s[2:3]
	v_add_nc_u32_e32 v6, s2, v2
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v7, v0, v7, -2
.LBB0_6:                                ; %.preheader.i44
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_7 Depth 3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s12, v6
	s_mov_b64 s[16:17], 0
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v9
	v_xor_b32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v8, v5
	v_mul_lo_u32 v10, v10, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v10
	v_subrev_nc_u32_e32 v10, s7, v8
	v_cmp_le_u32_e32 vcc_lo, s7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_subrev_nc_u32_e32 v10, s7, v8
	v_cmp_le_u32_e32 vcc_lo, s7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_xor_b32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v8, v9
	v_mov_b32_e32 v9, v7
	v_mul_lo_u32 v8, v8, s2
.LBB0_7:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v9
	s_add_u32 s22, s14, s16
	s_addc_u32 s23, s15, s17
	s_add_u32 s16, s16, 8
	s_load_b64 s[22:23], s[22:23], 0x0
	v_add_nc_u32_e32 v11, v9, v10
	v_add_nc_u32_e32 v9, 1, v9
	s_addc_u32 s17, s17, 0
	s_cmp_eq_u32 s16, 40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v11, v11, v10
	v_mul_hi_u32 v12, v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v12, v12, s7
	v_sub_nc_u32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v12, s7, v11
	v_cmp_le_u32_e32 vcc_lo, s7, v11
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v12, s7, v11
	v_cmp_le_u32_e32 vcc_lo, s7, v11
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v11, v11, v10
	v_sub_nc_u32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v10, v8
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[10:11], v10
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], s[22:23], v[10:11], v[2:3]
	s_cbranch_scc0 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=2
	s_add_i32 s12, s12, 1
	s_add_u32 s14, s14, 40
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s12, 3
	s_cbranch_scc0 .LBB0_6
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
                                        ; implicit-def: $vgpr6
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f64_e32 s[4:5], v[2:3]
	s_xor_b32 s14, exec_lo, s12
	s_cbranch_execz .LBB0_13
; %bb.10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s12, s4
	v_mov_b32_e32 v6, -1
	v_cmp_ngt_f64_e32 vcc_lo, s[12:13], v[2:3]
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v6, v[2:3], off
.LBB0_12:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_13:                               ; %Flow100
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s12, s14
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v6, 1
.LBB0_15:                               ; %.sink.split.i51
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
.LBB0_16:                               ; %Flow101
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB0_17:                               ; %Flow102
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s12, 0
.LBB0_18:                               ; %Flow107
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB0_33
; %bb.19:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_cmp_lg_u32 s18, 0
	s_cbranch_scc1 .LBB0_33
; %bb.20:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v0, s20, v4
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s19, v0
	s_cbranch_execz .LBB0_32
; %bb.21:                               ; %.preheader33.i
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s12, -2
	s_mov_b64 s[14:15], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v0, v1
	v_xor_b32_e32 v9, s3, v1
	v_xor_b32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v5
	v_mul_lo_u32 v6, v3, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v3
	v_subrev_nc_u32_e32 v7, s7, v2
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v2, v2, v7
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	v_cndmask_b32_e32 v2, v3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v9
	v_sub_nc_u32_e32 v3, v9, v2
	v_sub_nc_u32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, s2, v3, s[2:3]
	v_add_nc_u32_e32 v6, s2, v2
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v7, v0, v7, -2
.LBB0_22:                               ; %.preheader.i
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_23 Depth 3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s12, v6
	s_mov_b64 s[16:17], 0
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v8, v9
	v_xor_b32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v8, v5
	v_mul_lo_u32 v10, v10, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v10
	v_subrev_nc_u32_e32 v10, s7, v8
	v_cmp_le_u32_e32 vcc_lo, s7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_subrev_nc_u32_e32 v10, s7, v8
	v_cmp_le_u32_e32 vcc_lo, s7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, v8, v10, vcc_lo
	v_xor_b32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v8, v8, v9
	v_mov_b32_e32 v9, v7
	v_mul_lo_u32 v8, v8, s2
.LBB0_23:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_22 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v9
	s_add_u32 s22, s14, s16
	s_addc_u32 s23, s15, s17
	s_add_u32 s16, s16, 8
	s_load_b64 s[22:23], s[22:23], 0x0
	v_add_nc_u32_e32 v11, v9, v10
	v_add_nc_u32_e32 v9, 1, v9
	s_addc_u32 s17, s17, 0
	s_cmp_eq_u32 s16, 40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v11, v11, v10
	v_mul_hi_u32 v12, v11, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v12, v12, s7
	v_sub_nc_u32_e32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v12, s7, v11
	v_cmp_le_u32_e32 vcc_lo, s7, v11
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v12, s7, v11
	v_cmp_le_u32_e32 vcc_lo, s7, v11
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v11, v11, v10
	v_sub_nc_u32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, v10, v8
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_add_co_u32 v10, vcc_lo, s10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	global_load_b32 v10, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cvt_f64_i32_e32 v[10:11], v10
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], s[22:23], v[10:11], v[2:3]
	s_cbranch_scc0 .LBB0_23
; %bb.24:                               ;   in Loop: Header=BB0_22 Depth=2
	s_add_i32 s12, s12, 1
	s_add_u32 s14, s14, 40
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s12, 3
	s_cbranch_scc0 .LBB0_22
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
                                        ; implicit-def: $vgpr6
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f64_e32 s[4:5], v[2:3]
	s_xor_b32 s14, exec_lo, s12
	s_cbranch_execz .LBB0_29
; %bb.26:                               ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s12, s4
	v_mov_b32_e32 v6, -1
	v_cmp_ngt_f64_e32 vcc_lo, s[12:13], v[2:3]
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v6, v[2:3], off
.LBB0_28:                               ; %Flow103
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB0_29:                               ; %Flow104
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s12, s14
	s_cbranch_execz .LBB0_31
; %bb.30:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v6, 1
.LBB0_31:                               ; %.sink.split.i
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v6, off
.LBB0_32:                               ; %Flow105
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB0_33:                               ; %_ZL9calculatePiS_Pdiiii.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s20, s20, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s20, s6
	s_cbranch_scc0 .LBB0_2
.LBB0_34:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15spinCalculationiPdPiS0_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15spinCalculationiPdPiS0_iii, .Lfunc_end0-_Z15spinCalculationiPdPiS0_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1536
; NumSgprs: 26
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15spinCalculationiPdPiS0_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z15spinCalculationiPdPiS0_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
