#include<stdio.h>
#include<stdlib.h>
#include<sys/time.h>

#define CUDA_ERROR_EXIT(str) do{\
    cudaError err = cudaGetLastError();\
    if( err != cudaSuccess){\
        printf("Cuda Error: '%s' for %s\n", cudaGetErrorString(err), str);\
        exit(-1);\
    }\
}while(0);

__global__ void Xor(int *dX,int num)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if(num%2==0){
        if(i>num/2||i==0)
        return;
        dX[i]=dX[i]^dX[i+num/2];
    }
    if(num%2!=0){
        if(i>num/2||i==0)
        return;
        dX[i]=dX[i]^dX[i+num/2+1];
    }
}

int main(int argc, char **argv)
{
    int ctr;
    int *hX,*S,*dX;

    /*Allocate memory on the host (CPU) */

    if(argc!=3){
        printf("Incorrect number of arguments\n");
        exit(1);
    }

    int n = atoi(argv[1]);
    int seed = atoi(argv[2]);
    int size = (n+1) * sizeof(int);

    hX = (int *) malloc(size);
    if(!hX){
        perror("malloc");
        exit(-1);
    }

    S= (int *)malloc(2*sizeof(int));
    //printf("%d\n",n);
    srand(seed);
    hX[0]=0;
    for(ctr=1; ctr <= n; ++ctr){
        hX[ctr] = random()/*%10000*/;
        //printf("%d\n",hX[ctr]);
    }

    /*Allocate memory on the device (GPU) */

    cudaMalloc(&dX,  size);
    CUDA_ERROR_EXIT("cudaMalloc");

    /*Copy hX --> dX */

    cudaMemcpy(dX, hX, size, cudaMemcpyHostToDevice);
    CUDA_ERROR_EXIT("memcpy1");

    int blocks;

    /*Invoke the kernel*/

    int num=n;
    while(num>1){
        blocks=(num+1023)>>10;
        //printf("num= %d\n",num);
        Xor<<<blocks, 1024>>>(dX, num);
        CUDA_ERROR_EXIT("kernel invocation");
        num=num/2+num%2;
    }

    /*Copy back results*/
    cudaMemcpy(S, dX, 2*sizeof(int), cudaMemcpyDeviceToHost);
    CUDA_ERROR_EXIT("memcpy");

    printf("%d\n", S[1]);

    free(hX);
    free(S);
    cudaFree(dX);
}

	.file	"tmpxft_00387708_00000000-6_qn2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z23__device_stub__Z3XorPiiPii
	.type	_Z23__device_stub__Z3XorPiiPii, @function
_Z23__device_stub__Z3XorPiiPii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z3XorPii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z23__device_stub__Z3XorPiiPii, .-_Z23__device_stub__Z3XorPiiPii
	.globl	_Z3XorPii
	.type	_Z3XorPii, @function
_Z3XorPii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z23__device_stub__Z3XorPiiPii
	.cfi_endproc
.LFE2053:
	.size	_Z3XorPii, .-_Z3XorPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Incorrect number of arguments\n"
.LC1:
	.string	"malloc"
.LC2:
	.string	"cudaMalloc"
.LC3:
	.string	"Cuda Error: '%s' for %s\n"
.LC4:
	.string	"memcpy1"
.LC5:
	.string	"kernel invocation"
.LC6:
	.string	"memcpy"
.LC7:
	.string	"%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L9
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %edi
	jmp	.L23
.L9:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	leal	4(,%rbx,4), %r13d
	movslq	%r13d, %r13
	movl	%eax, %r14d
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%rax, %rbp
	testq	%rax, %rax
	jne	.L10
	leaq	.LC1(%rip), %rdi
	call	perror@PLT
.L24:
	orl	$-1, %edi
.L23:
	call	exit@PLT
.L10:
	movl	$8, %edi
	call	malloc@PLT
	movl	%r14d, %edi
	xorl	%r14d, %r14d
	movq	%rax, %r12
	call	srand@PLT
	xorl	%eax, %eax
	movl	%eax, 0(%rbp)
.L11:
	incq	%r14
	cmpl	%r14d, %ebx
	jl	.L26
	call	random@PLT
	movl	%eax, 0(%rbp,%r14,4)
	jmp	.L11
.L26:
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L13
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rcx
	movq	%rax, %rdx
	jmp	.L25
.L13:
	movq	8(%rsp), %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%rbp, %rsi
	movabsq	$4294968320, %r13
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %rcx
	movq	%rax, %rdx
	jmp	.L25
.L16:
	movl	%ebx, %eax
	andl	$1, %ebx
	sarl	%eax
	addl	%eax, %ebx
.L14:
	cmpl	$1, %ebx
	jle	.L27
	leal	1023(%rbx), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	sarl	$10, %eax
	movl	$1, %ecx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z23__device_stub__Z3XorPiiPii
.L15:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L16
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rcx
	movq	%rax, %rdx
	jmp	.L25
.L27:
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	movl	$8, %edx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	leaq	.LC6(%rip), %rcx
	movq	%rax, %rdx
.L25:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L24
.L18:
	movl	4(%r12), %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z3XorPii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3XorPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<sys/time.h>

#define CUDA_ERROR_EXIT(str) do{\
    hipError_t err = hipGetLastError();\
    if( err != hipSuccess){\
        printf("Cuda Error: '%s' for %s\n", hipGetErrorString(err), str);\
        exit(-1);\
    }\
}while(0);

__global__ void Xor(int *dX,int num)
{
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if(num%2==0){
        if(i>num/2||i==0)
        return;
        dX[i]=dX[i]^dX[i+num/2];
    }
    if(num%2!=0){
        if(i>num/2||i==0)
        return;
        dX[i]=dX[i]^dX[i+num/2+1];
    }
}

int main(int argc, char **argv)
{
    int ctr;
    int *hX,*S,*dX;

    /*Allocate memory on the host (CPU) */

    if(argc!=3){
        printf("Incorrect number of arguments\n");
        exit(1);
    }

    int n = atoi(argv[1]);
    int seed = atoi(argv[2]);
    int size = (n+1) * sizeof(int);

    hX = (int *) malloc(size);
    if(!hX){
        perror("malloc");
        exit(-1);
    }

    S= (int *)malloc(2*sizeof(int));
    //printf("%d\n",n);
    srand(seed);
    hX[0]=0;
    for(ctr=1; ctr <= n; ++ctr){
        hX[ctr] = random()/*%10000*/;
        //printf("%d\n",hX[ctr]);
    }

    /*Allocate memory on the device (GPU) */

    hipMalloc(&dX,  size);
    CUDA_ERROR_EXIT("hipMalloc");

    /*Copy hX --> dX */

    hipMemcpy(dX, hX, size, hipMemcpyHostToDevice);
    CUDA_ERROR_EXIT("memcpy1");

    int blocks;

    /*Invoke the kernel*/

    int num=n;
    while(num>1){
        blocks=(num+1023)>>10;
        //printf("num= %d\n",num);
        Xor<<<blocks, 1024>>>(dX, num);
        CUDA_ERROR_EXIT("kernel invocation");
        num=num/2+num%2;
    }

    /*Copy back results*/
    hipMemcpy(S, dX, 2*sizeof(int), hipMemcpyDeviceToHost);
    CUDA_ERROR_EXIT("memcpy");

    printf("%d\n", S[1]);

    free(hX);
    free(S);
    hipFree(dX);
}

	.text
	.file	"qn2.hip"
	.globl	_Z18__device_stub__XorPii       # -- Begin function _Z18__device_stub__XorPii
	.type	_Z18__device_stub__XorPii,@function
_Z18__device_stub__XorPii:              # @_Z18__device_stub__XorPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3XorPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__XorPii, .Lfunc_end0-_Z18__device_stub__XorPii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB1_17
# %bb.1:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r15d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	leal	4(,%r15,4), %eax
	movslq	%eax, %r12
	movq	%r12, %rdi
	callq	malloc
	testq	%rax, %rax
	je	.LBB1_18
# %bb.2:
	movq	%rax, %rbx
	movl	$8, %edi
	callq	malloc
	movq	%rax, %r14
	movl	%ebp, %edi
	callq	srand
	movl	$0, (%rbx)
	testl	%r15d, %r15d
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph.preheader
	leal	1(%r15), %r13d
	movl	$1, %ebp
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	random
	movl	%eax, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB1_4
.LBB1_5:                                # %._crit_edge
	movq	%rsp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.6:
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.7:                                # %.preheader
	cmpl	$2, %r15d
	jl	.LBB1_13
# %bb.8:                                # %.lr.ph57.preheader
	movabsq	$4294967296, %r13               # imm = 0x100000000
	leaq	1024(%r13), %r12
.LBB1_9:                                # %.lr.ph57
                                        # =>This Inner Loop Header: Depth=1
	leal	1023(%r15), %edi
	shrl	$10, %edi
	orq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:                               #   in Loop: Header=BB1_9 Depth=1
	movq	(%rsp), %rdi
	movl	%r15d, %esi
	callq	_Z18__device_stub__XorPii
.LBB1_11:                               #   in Loop: Header=BB1_9 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.12:                               #   in Loop: Header=BB1_9 Depth=1
	movl	%r15d, %eax
	shrl	%eax
	andl	$1, %r15d
	addl	%eax, %r15d
	cmpl	$1, %r15d
	ja	.LBB1_9
.LBB1_13:                               # %._crit_edge58
	movq	(%rsp), %rsi
	movl	$8, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.14:
	movl	4(%r14), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_15:
	.cfi_def_cfa_offset 64
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$.L.str.5, %edx
.LBB1_16:
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB1_19:
	movl	$-1, %edi
	callq	exit
.LBB1_17:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.LBB1_18:
	movl	$.L.str.1, %edi
	callq	perror
	jmp	.LBB1_19
.LBB1_20:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %edx
	jmp	.LBB1_16
.LBB1_21:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$.L.str.4, %edx
	jmp	.LBB1_16
.LBB1_22:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$.L.str.6, %edx
	jmp	.LBB1_16
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3XorPii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3XorPii,@object               # @_Z3XorPii
	.section	.rodata,"a",@progbits
	.globl	_Z3XorPii
	.p2align	3, 0x0
_Z3XorPii:
	.quad	_Z18__device_stub__XorPii
	.size	_Z3XorPii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"malloc"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Cuda Error: '%s' for %s\n"
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"hipMalloc"
	.size	.L.str.3, 10

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"memcpy1"
	.size	.L.str.4, 8

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"kernel invocation"
	.size	.L.str.5, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"memcpy"
	.size	.L.str.6, 7

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%d\n"
	.size	.L.str.7, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3XorPii"
	.size	.L__unnamed_1, 10

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Incorrect number of arguments"
	.size	.Lstr, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__XorPii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3XorPii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3XorPii               ; -- Begin function _Z3XorPii
	.globl	_Z3XorPii
	.p2align	8
	.type	_Z3XorPii,@function
_Z3XorPii:                              ; @_Z3XorPii
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b32 s4, s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s5, 0xffff
	s_bitcmp1_b32 s4, 0
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_mov_b32 s1, 0
	v_cmp_eq_u32_e64 s0, 0, v1
	s_cbranch_vccz .LBB0_4
; %bb.1:
	s_lshr_b32 s1, s4, 31
	s_mov_b32 s5, 0
	s_add_i32 s1, s4, s1
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s7, s1, 1
	s_xor_b32 s1, s0, -1
	v_cmp_ge_i32_e32 vcc_lo, s7, v1
	s_and_b32 s6, vcc_lo, s1
	s_mov_b32 s1, 0
	s_and_saveexec_b32 s8, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s8
; %bb.2:
	v_add_nc_u32_e32 v2, s7, v1
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v2, vcc_lo
; %bb.3:                                ; %Flow33
	s_or_b32 exec_lo, exec_lo, s6
	s_branch .LBB0_5
.LBB0_4:
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_5:                                ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_9
; %bb.6:
	s_ashr_i32 s4, s4, 1
	s_xor_b32 s0, s0, -1
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
                                        ; implicit-def: $vgpr3_vgpr4
	s_and_b32 s5, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s5
; %bb.7:
	v_add_nc_u32_e32 v2, s4, v1
	s_or_b32 s1, s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
; %bb.8:                                ; %Flow35
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_9:                                ; %Flow34
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_11
; %bb.10:                               ; %.sink.split
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3XorPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3XorPii, .Lfunc_end0-_Z3XorPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3XorPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3XorPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
