//: nvcc mm.cu -o mm

#include <stdlib.h>
#include <stdio.h>
#include <math.h>

__global__ void mm_kernel(float *d_m, float *d_n, float *d_p, int size)
{
    const int row = blockIdx.y;
    const int col = blockIdx.x;
    float val = 0.0;
    for (int i = 0; i < size; ++i)
    {
        val += d_m[row * size + i] * d_n[i * size + col];
    }
    d_p[row * size + col] = val;
}

/*
 * En declarant une variable comme __shared
 * tous les threads dans un bloc peuvent se partager la valeur
 * donner la valeur dans 
 * 
 * __shared_int sum;
 * if (threadIdx.x == 0)
 * {
 *  sum = 0; // ne peut etre initialisee que par le premier, par de maniere globale
 * }
 * __syncthread();
 * atomicAdd(&sum, 5); // la memoire partagee n'est pas changee par plusieurs threads
 * __syncthread(); // on attend que les autres threads soient OK pour passer a la suite
 * 
 * atomicAdd est VRAIMENT lent
 */

void multiply(float *m, float *n, float *p, int size)
{
    // Pointers on the device:
    float *d_m, *d_n, *d_p;
    
    // Matrice allouee directement dans un vecteur unique
    // sinon un nombre enorme de cuda malloc
    const int nbytes = (size * size) * sizeof(float);

    cudaMalloc((void**)&d_m, nbytes);
    cudaMalloc((void**)&d_n, nbytes);
    cudaMalloc((void**)&d_p, nbytes);
    
    cudaMemcpy(d_m, m, nbytes, cudaMemcpyHostToDevice);
    cudaMemcpy(d_n, n, nbytes, cudaMemcpyHostToDevice);

    // definit une grid
    dim3 dimGrid(1, 1);
    // definit un block de size by size
    dim3 dimBlock(size, size);
    // balance sur les GPU
    mm_kernel<<<dimBlock,dimGrid>>>(d_m, d_n, d_p, size);
    
    cudaMemcpy(p, d_p, nbytes, cudaMemcpyDeviceToHost);

    cudaFree(d_m);
    cudaFree(d_n);
    cudaFree(d_p);
}

void print_matrix(float *m, FILE *out, int size)
{
    // Print matrix:
    for (int i = 0; i < size; ++i)
    {
        for (int j = 0; j < size; ++j)
        {
            fprintf(out, "%8.4f ", m[i * size + j]);
        }
        fprintf(out, "\n");
    }
}

int main(int argc, char **argv)
{
    const int size = (argc == 2)? atof(argv[1]) : 10;
    const int nbytes = (size * size) * sizeof(float);

    float *m = (float*)malloc(nbytes);
    float *n = (float*)malloc(nbytes);
    float *p = (float*)malloc(nbytes);

    // Fill matrices m & n:
    for (int i = 0; i < size; ++i)
    {
        for (int j = 0; j < size; ++j)
        {
            m[i * size + j] = cos(j) * sqrt(i);
            n[i * size + j] = sin(j) + 0.1 * i;
        }
    }

    multiply(m, n, p, size);

    print_matrix(p, stdout, size);

    free(m);
    free(n);
    free(p);
    return EXIT_SUCCESS;
}


	.file	"tmpxft_0023d185_00000000-6_mm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%8.4f "
.LC1:
	.string	"\n"
	.text
	.globl	_Z12print_matrixPfP8_IO_FILEi
	.type	_Z12print_matrixPfP8_IO_FILEi, @function
_Z12print_matrixPfP8_IO_FILEi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%edx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	0(,%r13,4), %r14
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rsi, 8(%rsp)
.L3:
	cmpl	%ebp, %r12d
	jge	.L9
	xorl	%r15d, %r15d
.L4:
	movq	8(%rsp), %rdi
	cvtss2sd	(%rbx,%r15,4), %xmm0
	leaq	.LC0(%rip), %rdx
	movb	$1, %al
	movl	$2, %esi
	incq	%r15
	call	__fprintf_chk@PLT
	cmpq	%r13, %r15
	jne	.L4
	movq	8(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	incl	%r12d
	leaq	.LC1(%rip), %rdx
	addq	%r14, %rbx
	call	__fprintf_chk@PLT
	jmp	.L3
.L9:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12print_matrixPfP8_IO_FILEi, .-_Z12print_matrixPfP8_IO_FILEi
	.globl	_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i
	.type	_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i, @function
_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9mm_kernelPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i, .-_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i
	.globl	_Z9mm_kernelPfS_S_i
	.type	_Z9mm_kernelPfS_S_i, @function
_Z9mm_kernelPfS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z9mm_kernelPfS_S_i, .-_Z9mm_kernelPfS_S_i
	.globl	_Z8multiplyPfS_S_i
	.type	_Z8multiplyPfS_S_i, @function
_Z8multiplyPfS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%ecx, %ebx
	imull	%ecx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	sall	$2, %ebx
	leaq	8(%rsp), %rdi
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r14d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 48(%rsp)
	movq	44(%rsp), %rdi
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%r14d, %ecx
	movq	8(%rsp), %rdi
	call	_Z33__device_stub__Z9mm_kernelPfS_S_iPfS_S_i
.L16:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8multiplyPfS_S_i, .-_Z8multiplyPfS_S_i
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$10, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	cmpl	$2, %edi
	jne	.L20
	movq	8(%rsi), %rdi
	call	atof@PLT
	cvttsd2sil	%xmm0, %ebx
.L20:
	movl	%ebx, %ebp
	movslq	%ebx, %r15
	xorl	%r14d, %r14d
	imull	%ebx, %ebp
	sall	$2, %ebp
	movslq	%ebp, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbp, %rdi
	xorl	%ebp, %ebp
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rax, 8(%rsp)
	leaq	0(,%r15,4), %rax
	movq	%rax, 32(%rsp)
.L21:
	cmpl	%ebx, %r14d
	jge	.L28
	xorl	%r15d, %r15d
.L22:
	cvtsi2sdl	%r15d, %xmm0
	leaq	56(%rsp), %rdi
	leaq	48(%rsp), %rsi
	call	sincos@PLT
	cvtsi2sdl	%r14d, %xmm1
	movsd	48(%rsp), %xmm2
	movsd	56(%rsp), %xmm3
	movsd	%xmm2, 16(%rsp)
	movsd	%xmm3, 24(%rsp)
	movaps	%xmm1, %xmm0
	movsd	%xmm1, 40(%rsp)
	call	sqrt@PLT
	mulsd	16(%rsp), %xmm0
	movsd	40(%rsp), %xmm1
	leaq	0(%r13,%rbp), %rcx
	mulsd	.LC2(%rip), %xmm1
	addsd	24(%rsp), %xmm1
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%r15,4)
	leaq	(%r12,%rbp), %rcx
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, (%rcx,%r15,4)
	incq	%r15
	cmpl	%r15d, %ebx
	jg	.L22
	movq	32(%rsp), %rax
	incl	%r14d
	addq	%rax, %rbp
	jmp	.L21
.L28:
	movq	8(%rsp), %rdx
	movl	%ebx, %ecx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_Z8multiplyPfS_S_i
	movq	stdout(%rip), %rsi
	movq	8(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z12print_matrixPfP8_IO_FILEi
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z9mm_kernelPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9mm_kernelPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1717986918
	.long	1069128089
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//: nvcc mm.cu -o mm


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <math.h>

__global__ void mm_kernel(float *d_m, float *d_n, float *d_p, int size)
{
    const int row = blockIdx.y;
    const int col = blockIdx.x;
    float val = 0.0;
    for (int i = 0; i < size; ++i)
    {
        val += d_m[row * size + i] * d_n[i * size + col];
    }
    d_p[row * size + col] = val;
}

/*
 * En declarant une variable comme __shared
 * tous les threads dans un bloc peuvent se partager la valeur
 * donner la valeur dans 
 * 
 * __shared_int sum;
 * if (threadIdx.x == 0)
 * {
 *  sum = 0; // ne peut etre initialisee que par le premier, par de maniere globale
 * }
 * __syncthread();
 * atomicAdd(&sum, 5); // la memoire partagee n'est pas changee par plusieurs threads
 * __syncthread(); // on attend que les autres threads soient OK pour passer a la suite
 * 
 * atomicAdd est VRAIMENT lent
 */

void multiply(float *m, float *n, float *p, int size)
{
    // Pointers on the device:
    float *d_m, *d_n, *d_p;
    
    // Matrice allouee directement dans un vecteur unique
    // sinon un nombre enorme de cuda malloc
    const int nbytes = (size * size) * sizeof(float);

    hipMalloc((void**)&d_m, nbytes);
    hipMalloc((void**)&d_n, nbytes);
    hipMalloc((void**)&d_p, nbytes);
    
    hipMemcpy(d_m, m, nbytes, hipMemcpyHostToDevice);
    hipMemcpy(d_n, n, nbytes, hipMemcpyHostToDevice);

    // definit une grid
    dim3 dimGrid(1, 1);
    // definit un block de size by size
    dim3 dimBlock(size, size);
    // balance sur les GPU
    mm_kernel<<<dimBlock,dimGrid>>>(d_m, d_n, d_p, size);
    
    hipMemcpy(p, d_p, nbytes, hipMemcpyDeviceToHost);

    hipFree(d_m);
    hipFree(d_n);
    hipFree(d_p);
}

void print_matrix(float *m, FILE *out, int size)
{
    // Print matrix:
    for (int i = 0; i < size; ++i)
    {
        for (int j = 0; j < size; ++j)
        {
            fprintf(out, "%8.4f ", m[i * size + j]);
        }
        fprintf(out, "\n");
    }
}

int main(int argc, char **argv)
{
    const int size = (argc == 2)? atof(argv[1]) : 10;
    const int nbytes = (size * size) * sizeof(float);

    float *m = (float*)malloc(nbytes);
    float *n = (float*)malloc(nbytes);
    float *p = (float*)malloc(nbytes);

    // Fill matrices m & n:
    for (int i = 0; i < size; ++i)
    {
        for (int j = 0; j < size; ++j)
        {
            m[i * size + j] = cos(j) * sqrt(i);
            n[i * size + j] = sin(j) + 0.1 * i;
        }
    }

    multiply(m, n, p, size);

    print_matrix(p, stdout, size);

    free(m);
    free(n);
    free(p);
    return EXIT_SUCCESS;
}


	.text
	.file	"mm.hip"
	.globl	_Z24__device_stub__mm_kernelPfS_S_i # -- Begin function _Z24__device_stub__mm_kernelPfS_S_i
	.type	_Z24__device_stub__mm_kernelPfS_S_i,@function
_Z24__device_stub__mm_kernelPfS_S_i:    # @_Z24__device_stub__mm_kernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9mm_kernelPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__mm_kernelPfS_S_i, .Lfunc_end0-_Z24__device_stub__mm_kernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8multiplyPfS_S_i              # -- Begin function _Z8multiplyPfS_S_i
	.type	_Z8multiplyPfS_S_i,@function
_Z8multiplyPfS_S_i:                     # @_Z8multiplyPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	%ecx, %eax
	imull	%ecx, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z24__device_stub__mm_kernelPfS_S_i
.LBB1_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8multiplyPfS_S_i, .Lfunc_end1-_Z8multiplyPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPfP8_IO_FILEi   # -- Begin function _Z12print_matrixPfP8_IO_FILEi
	.type	_Z12print_matrixPfP8_IO_FILEi,@function
_Z12print_matrixPfP8_IO_FILEi:          # @_Z12print_matrixPfP8_IO_FILEi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	testl	%edx, %edx
	jle	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	movq	%rsi, %r14
	movl	12(%rsp), %r12d                 # 4-byte Reload
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%r13d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%ebx, %ebx
.LBB2_3:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%rbx,4), %xmm0
	movl	$.L.str, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	movq	%r14, %rsi
	callq	fputc@PLT
	incq	%rbp
	addl	12(%rsp), %r13d                 # 4-byte Folded Reload
	cmpq	%r12, %rbp
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge15
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12print_matrixPfP8_IO_FILEi, .Lfunc_end2-_Z12print_matrixPfP8_IO_FILEi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
.LCPI3_1:
	.quad	0x0000000000000000              # double 0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$10, %ebx
	cmpl	$2, %edi
	jne	.LBB3_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atof
	cvttsd2si	%xmm0, %ebx
.LBB3_2:
	movl	%ebx, %eax
	imull	%ebx, %eax
	shll	$2, %eax
	movslq	%eax, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB3_9
# %bb.3:                                # %.preheader.lr.ph
	movl	%ebx, %r13d
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
	movl	%ebx, 4(%rsp)                   # 4-byte Spill
.LBB3_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	movl	%ebp, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12d, %xmm0
	movapd	%xmm0, %xmm1
	mulsd	.LCPI3_0(%rip), %xmm1
	movsd	%xmm1, 56(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	sqrtsd	%xmm0, %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	xorl	%ebx, %ebx
.LBB3_5:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebx, %xmm0
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	callq	cos
	movapd	%xmm0, %xmm1
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI3_1(%rip), %xmm0
	movsd	48(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	jae	.LBB3_7
# %bb.6:                                # %call.sqrt
                                        #   in Loop: Header=BB3_5 Depth=2
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	callq	sqrt
	movsd	40(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
.LBB3_7:                                # %.split
                                        #   in Loop: Header=BB3_5 Depth=2
	mulsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%rbx,4)
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sin
	addsd	56(%rsp), %xmm0                 # 8-byte Folded Reload
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r14,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r13
	jne	.LBB3_5
# %bb.8:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=1
	incq	%r12
	movl	4(%rsp), %ebx                   # 4-byte Reload
	addl	%ebx, %ebp
	cmpq	%r13, %r12
	jne	.LBB3_4
.LBB3_9:                                # %._crit_edge38
	movq	16(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	8(%rsp), %r15                   # 8-byte Reload
	movq	%r15, %rsi
	movq	32(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdx
	movl	%ebx, %ecx
	callq	_Z8multiplyPfS_S_i
	movq	stdout(%rip), %rsi
	movq	%r12, %rdi
	movl	%ebx, %edx
	callq	_Z12print_matrixPfP8_IO_FILEi
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9mm_kernelPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9mm_kernelPfS_S_i,@object     # @_Z9mm_kernelPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z9mm_kernelPfS_S_i
	.p2align	3, 0x0
_Z9mm_kernelPfS_S_i:
	.quad	_Z24__device_stub__mm_kernelPfS_S_i
	.size	_Z9mm_kernelPfS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%8.4f "
	.size	.L.str, 7

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9mm_kernelPfS_S_i"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__mm_kernelPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9mm_kernelPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9mm_kernelPfS_S_i     ; -- Begin function _Z9mm_kernelPfS_S_i
	.globl	_Z9mm_kernelPfS_S_i
	.p2align	8
	.type	_Z9mm_kernelPfS_S_i,@function
_Z9mm_kernelPfS_S_i:                    ; @_Z9mm_kernelPfS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_mul_i32 s2, s15, s8
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s15, s14, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[10:11], s[14:15], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s6, s10
	s_addc_u32 s7, s7, s11
	s_ashr_i32 s3, s2, 31
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[12:13], s[2:3], 2
	s_lshl_b64 s[10:11], s[8:9], 2
	s_add_u32 s4, s4, s12
	s_addc_u32 s5, s5, s13
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s3, s[4:5], 0x0
	s_load_b32 s9, s[6:7], 0x0
	s_add_i32 s8, s8, -1
	s_add_u32 s6, s6, s10
	s_addc_u32 s7, s7, s11
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s8, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e64 v0, s3, s9
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v0, 0
.LBB0_4:                                ; %Flow38
	s_add_i32 s2, s2, s14
	v_mov_b32_e32 v1, 0
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b32 v1, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9mm_kernelPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9mm_kernelPfS_S_i, .Lfunc_end0-_Z9mm_kernelPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 16
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9mm_kernelPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z9mm_kernelPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
