#include <cuda.h>
#include <stdio.h>
#include <sys/time.h>

#define BLOCK_SIZE 16


__global__ void lud_diagonal(float *m, int matrix_dim, int offset)
{
  int i,j;
  __shared__ float shadow[BLOCK_SIZE][BLOCK_SIZE];

  /* Each thread block, i.e. 1D 16 threads, loads a 
   * 2D block, i.e. 16x16, of data from the diagonal
   * of the matrix into shared memory 'shadow' */
  int array_offset = offset*matrix_dim+offset;
  for(i = 0; i < BLOCK_SIZE; i++){
    shadow[i][threadIdx.x] = m[array_offset+threadIdx.x];
    array_offset += matrix_dim;
  }
  __syncthreads();

  for(i = 0; i < BLOCK_SIZE-1; i++) {
    if ( threadIdx.x > i) { /* starts at 15 threads and then decrease one thread each time */
      for(j = 0; j < i; j++) { /* This for loop computes cols */
        shadow[threadIdx.x][i] -= shadow[threadIdx.x][j]*shadow[j][i];
      }
      shadow[threadIdx.x][i] /= shadow[i][i];
    }
    __syncthreads();

    if ( threadIdx.x > i) {
      for( j = 0; j < i+1; j++) { /* This for loop computes rows */
        shadow[i+1][threadIdx.x] -= shadow[i+1][j]*shadow[j][threadIdx.x];
      }
    }
    __syncthreads();
  }

  /* The first row is not modified, it
   * is no need to write it back to the
   * global memory */
  array_offset = (offset+1)*matrix_dim+offset;
  for(i = 1; i < BLOCK_SIZE; i++) {
    m[array_offset+threadIdx.x] = shadow[i][threadIdx.x];
    array_offset += matrix_dim;
  }
}

__global__ void lud_diagonal_noshr(float *m, int matrix_dim, int offset)
{
  int i,j;

  int array_offset = offset*matrix_dim+offset;

  for(i = 0; i < BLOCK_SIZE-1; i++) {
    if ( threadIdx.x > i) { /* starts at 15 threads and then decrease one thread each time */
      for(j = 0; j < i; j++) { /* This for loop computes cols */
        m[(array_offset+threadIdx.x*matrix_dim) + i] -= 
          m[(array_offset+threadIdx.x*matrix_dim) + j]*
          m[(array_offset+j*matrix_dim) + i];
      }
      m[(array_offset+threadIdx.x*matrix_dim) + i] /= m[(array_offset+i*matrix_dim) + i];
    }
    __syncthreads();

    if ( threadIdx.x > i) {
      for( j = 0; j < i+1; j++) { /* This for loop computes rows */
        m[(array_offset+(i+1)*matrix_dim) + threadIdx.x] -=
          m[(array_offset+(i+1)*matrix_dim) + j]*
          m[(array_offset+j*matrix_dim) + threadIdx.x];
      }
    }
    __syncthreads();
  }
}

__global__ void lud_perimeter(float *m, int matrix_dim, int offset)
{
  __shared__ float dia[BLOCK_SIZE][BLOCK_SIZE];
  __shared__ float peri_row[BLOCK_SIZE][BLOCK_SIZE];
  __shared__ float peri_col[BLOCK_SIZE][BLOCK_SIZE];

  int i,j, array_offset;
  int idx;

  /* For this kernel, each block contains 32 threads */
  if ( threadIdx.x < BLOCK_SIZE) { /* threads 0 ... 15 */
    idx = threadIdx.x;
    
    array_offset = offset*matrix_dim+offset;
    for (i=0; i < BLOCK_SIZE/2; i++){
      dia[i][idx]=m[array_offset+idx];
      array_offset += matrix_dim;
    }
    
    array_offset = offset*matrix_dim+offset;
    for (i=0; i < BLOCK_SIZE; i++) {
      peri_row[i][idx]=m[array_offset+(blockIdx.x+1)*BLOCK_SIZE+idx];
      array_offset += matrix_dim;
    }

  } else { /* threads 16 ... 31 */
    idx = threadIdx.x-BLOCK_SIZE;
    
    array_offset = (offset+BLOCK_SIZE/2)*matrix_dim+offset;
    for (i=BLOCK_SIZE/2; i < BLOCK_SIZE; i++){
      dia[i][idx]=m[array_offset+idx];
      array_offset += matrix_dim;
    }
    
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    for (i=0; i < BLOCK_SIZE; i++) {
      peri_col[i][idx] = m[array_offset+idx];
      array_offset += matrix_dim;
    }
  }
  __syncthreads();

/* this version works ok on hardware, but not gpgpusim
 **************************************************************
  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    idx=threadIdx.x;
    for(i=1; i < BLOCK_SIZE; i++){
      for (j=0; j < i; j++)
        peri_row[i][idx]-=dia[i][j]*peri_row[j][idx];
    }

    
    array_offset = (offset+1)*matrix_dim+offset;
    for(i=1; i < BLOCK_SIZE; i++){
      m[array_offset+(blockIdx.x+1)*BLOCK_SIZE+idx] = peri_row[i][idx];
      array_offset += matrix_dim;
    }
  } else { //peri-col
    idx=threadIdx.x - BLOCK_SIZE;
    for(i=0; i < BLOCK_SIZE; i++){
      for(j=0; j < i; j++)
        peri_col[idx][i]-=peri_col[idx][j]*dia[j][i];
      peri_col[idx][i] /= dia[i][i];
    }

    __syncthreads();
    
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    for(i=0; i < BLOCK_SIZE; i++){
      m[array_offset+idx] =  peri_col[i][idx];
      array_offset += matrix_dim;
    }
  }
***************************************************************/
  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    idx=threadIdx.x;
    for(i=1; i < BLOCK_SIZE; i++){
      for (j=0; j < i; j++) {
        peri_row[i][idx]-=dia[i][j]*peri_row[j][idx];
      }
    }
  } else { //peri-col
    idx=threadIdx.x - BLOCK_SIZE;
    for(i=0; i < BLOCK_SIZE; i++){
      for(j=0; j < i; j++) {
        peri_col[idx][i]-=peri_col[idx][j]*dia[j][i];
      }
      peri_col[idx][i] /= dia[i][i];
    }
  }

  __syncthreads();
   
  /* write data back to global memory */ 
  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    idx=threadIdx.x;
    array_offset = (offset+1)*matrix_dim+offset;
    for(i=1; i < BLOCK_SIZE; i++){
      m[array_offset+(blockIdx.x+1)*BLOCK_SIZE+idx] = peri_row[i][idx];
      array_offset += matrix_dim;
    }
  } else { //peri-col
    idx=threadIdx.x - BLOCK_SIZE;
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    for(i=0; i < BLOCK_SIZE; i++){
      m[array_offset+idx] =  peri_col[i][idx];
      array_offset += matrix_dim;
    }
  }
}

__global__ void lud_perimeter_noshr(float *m, int matrix_dim, int offset)
{
  int i,j, array_offset;
  int idx;

  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    array_offset = offset*matrix_dim+offset;
    idx=threadIdx.x;
    for(i=1; i < BLOCK_SIZE; i++){
      for (j=0; j < i; j++) {
        m[array_offset+i*matrix_dim+(blockIdx.x+1)*BLOCK_SIZE+idx] -= 
          m[array_offset+i*matrix_dim+j] * m[array_offset+j*matrix_dim+(blockIdx.x+1)*BLOCK_SIZE+idx];
      }
    }
  } else { //peri-col
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    idx=threadIdx.x - BLOCK_SIZE;
    for(i=0; i < BLOCK_SIZE; i++){
      for(j=0; j < i; j++) {
        m[array_offset+idx*matrix_dim+i] -= m[array_offset+idx*matrix_dim+j] * m[offset*matrix_dim+offset+j*matrix_dim+i];
      }
      m[array_offset+idx*matrix_dim+i] /= m[offset*matrix_dim+offset+i*matrix_dim+i];
    }
  }
}

__global__ void lud_internal(float *m, int matrix_dim, int offset)
{
  __shared__ float peri_row[BLOCK_SIZE][BLOCK_SIZE];
  __shared__ float peri_col[BLOCK_SIZE][BLOCK_SIZE];

  int i;
  float sum;

  int global_row_id = offset + (blockIdx.y+1)*BLOCK_SIZE;
  int global_col_id = offset + (blockIdx.x+1)*BLOCK_SIZE;

  peri_row[threadIdx.y][threadIdx.x] = m[(offset+threadIdx.y)*matrix_dim+global_col_id+threadIdx.x];
  peri_col[threadIdx.y][threadIdx.x] = m[(global_row_id+threadIdx.y)*matrix_dim+offset+threadIdx.x];

  __syncthreads();

  sum = 0;
  for (i=0; i < BLOCK_SIZE; i++) {
    sum += peri_col[threadIdx.y][i] * peri_row[i][threadIdx.x];
  }
  m[(global_row_id+threadIdx.y)*matrix_dim+global_col_id+threadIdx.x] -= sum;
}

__global__ void lud_internal_noshr(float *m, int matrix_dim, int offset)
{
  int i;
  float sum;

  int global_row_id = offset + (blockIdx.y+1)*BLOCK_SIZE;
  int global_col_id = offset + (blockIdx.x+1)*BLOCK_SIZE;

  sum = 0;
  for (i=0; i < BLOCK_SIZE; i++) {
    sum += m[(global_row_id+threadIdx.y)*matrix_dim+offset+i] * m[(offset+i)*matrix_dim+global_col_id+threadIdx.x];
  }
  m[(global_row_id+threadIdx.y)*matrix_dim+global_col_id+threadIdx.x] -= sum;
}

void lud_cuda(float *m, int matrix_dim, int do_shared)
{
  int i=0;
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

  /* beginning of timing point */
  struct timeval tv1, tv2;
  gettimeofday(&tv1, NULL);

  if( do_shared) {
    //printf("Executing kernels with shared memory!\n");
    for (i=0; i < matrix_dim-BLOCK_SIZE; i += BLOCK_SIZE) {
      lud_diagonal<<<1, BLOCK_SIZE>>>(m, matrix_dim, i);
      lud_perimeter<<<(matrix_dim-i)/BLOCK_SIZE-1, BLOCK_SIZE*2>>>(m, matrix_dim, i);
      dim3 dimGrid((matrix_dim-i)/BLOCK_SIZE-1, (matrix_dim-i)/BLOCK_SIZE-1);
      lud_internal<<<dimGrid, dimBlock>>>(m, matrix_dim, i); 
    }
    lud_diagonal<<<1,BLOCK_SIZE>>>(m, matrix_dim, i);
  }
  else { 
    //printf("Executing kernels without shared memory!\n");
    
    cudaFuncSetCacheConfig("lud_diagonal_noshr", cudaFuncCachePreferL1);
    cudaFuncSetCacheConfig("lud_perimeter_noshr", cudaFuncCachePreferL1);
    cudaFuncSetCacheConfig("lud_internal_noshr", cudaFuncCachePreferL1);

    for (i=0; i < matrix_dim-BLOCK_SIZE; i += BLOCK_SIZE) {
      lud_diagonal_noshr<<<1, BLOCK_SIZE>>>(m, matrix_dim, i);
      lud_perimeter_noshr<<<(matrix_dim-i)/BLOCK_SIZE-1, BLOCK_SIZE*2>>>(m, matrix_dim, i);
      dim3 dimGrid((matrix_dim-i)/BLOCK_SIZE-1, (matrix_dim-i)/BLOCK_SIZE-1);
      lud_internal_noshr<<<dimGrid, dimBlock>>>(m, matrix_dim, i); 
    }
    lud_diagonal<<<1,BLOCK_SIZE>>>(m, matrix_dim, i);
  }

  /* end of timing point */
  gettimeofday(&tv2, NULL);
  double runtime = ((tv2.tv_sec*1000.0 + tv2.tv_usec/1000.0)-(tv1.tv_sec*1000.0 + tv1.tv_usec/1000.0));
  printf("Runtime(milliseconds): %f\n", runtime);
}


	.file	"tmpxft_002b5e52_00000000-6_lud_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z12lud_diagonalPfiiPfii
	.type	_Z34__device_stub__Z12lud_diagonalPfiiPfii, @function
_Z34__device_stub__Z12lud_diagonalPfiiPfii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12lud_diagonalPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z34__device_stub__Z12lud_diagonalPfiiPfii, .-_Z34__device_stub__Z12lud_diagonalPfiiPfii
	.globl	_Z12lud_diagonalPfii
	.type	_Z12lud_diagonalPfii, @function
_Z12lud_diagonalPfii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12lud_diagonalPfiiPfii
	.cfi_endproc
.LFE2053:
	.size	_Z12lud_diagonalPfii, .-_Z12lud_diagonalPfii
	.globl	_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii
	.type	_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii, @function
_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18lud_diagonal_noshrPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L8:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii, .-_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii
	.globl	_Z18lud_diagonal_noshrPfii
	.type	_Z18lud_diagonal_noshrPfii, @function
_Z18lud_diagonal_noshrPfii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii
	.cfi_endproc
.LFE2055:
	.size	_Z18lud_diagonal_noshrPfii, .-_Z18lud_diagonal_noshrPfii
	.globl	_Z35__device_stub__Z13lud_perimeterPfiiPfii
	.type	_Z35__device_stub__Z13lud_perimeterPfiiPfii, @function
_Z35__device_stub__Z13lud_perimeterPfiiPfii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13lud_perimeterPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z35__device_stub__Z13lud_perimeterPfiiPfii, .-_Z35__device_stub__Z13lud_perimeterPfiiPfii
	.globl	_Z13lud_perimeterPfii
	.type	_Z13lud_perimeterPfii, @function
_Z13lud_perimeterPfii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z13lud_perimeterPfiiPfii
	.cfi_endproc
.LFE2057:
	.size	_Z13lud_perimeterPfii, .-_Z13lud_perimeterPfii
	.globl	_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii
	.type	_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii, @function
_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z19lud_perimeter_noshrPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L18:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii, .-_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii
	.globl	_Z19lud_perimeter_noshrPfii
	.type	_Z19lud_perimeter_noshrPfii, @function
_Z19lud_perimeter_noshrPfii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii
	.cfi_endproc
.LFE2059:
	.size	_Z19lud_perimeter_noshrPfii, .-_Z19lud_perimeter_noshrPfii
	.globl	_Z34__device_stub__Z12lud_internalPfiiPfii
	.type	_Z34__device_stub__Z12lud_internalPfiiPfii, @function
_Z34__device_stub__Z12lud_internalPfiiPfii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12lud_internalPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L23:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z34__device_stub__Z12lud_internalPfiiPfii, .-_Z34__device_stub__Z12lud_internalPfiiPfii
	.globl	_Z12lud_internalPfii
	.type	_Z12lud_internalPfii, @function
_Z12lud_internalPfii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12lud_internalPfiiPfii
	.cfi_endproc
.LFE2061:
	.size	_Z12lud_internalPfii, .-_Z12lud_internalPfii
	.globl	_Z40__device_stub__Z18lud_internal_noshrPfiiPfii
	.type	_Z40__device_stub__Z18lud_internal_noshrPfiiPfii, @function
_Z40__device_stub__Z18lud_internal_noshrPfiiPfii:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z18lud_internal_noshrPfii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L28:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z40__device_stub__Z18lud_internal_noshrPfiiPfii, .-_Z40__device_stub__Z18lud_internal_noshrPfiiPfii
	.globl	_Z18lud_internal_noshrPfii
	.type	_Z18lud_internal_noshrPfii, @function
_Z18lud_internal_noshrPfii:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z18lud_internal_noshrPfiiPfii
	.cfi_endproc
.LFE2063:
	.size	_Z18lud_internal_noshrPfii, .-_Z18lud_internal_noshrPfii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"lud_diagonal_noshr"
.LC1:
	.string	"lud_perimeter_noshr"
.LC2:
	.string	"lud_internal_noshr"
.LC4:
	.string	"Runtime(milliseconds): %f\n"
	.text
	.globl	_Z8lud_cudaPfii
	.type	_Z8lud_cudaPfii, @function
_Z8lud_cudaPfii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movabsq	$4294967312, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	xorl	%esi, %esi
	leal	-16(%rbx), %r14d
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movabsq	$68719476752, %rax
	leaq	24(%rsp), %rdi
	movl	$1, 8(%rsp)
	movq	%rax, (%rsp)
	call	gettimeofday@PLT
	testl	%r12d, %r12d
	je	.L56
.L34:
	movq	%r15, 40(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movabsq	$4294967297, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 48(%rsp)
	movq	%rdi, 12(%rsp)
	movl	$1, 20(%rsp)
	cmpl	%r13d, %r14d
	jle	.L55
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movl	%r13d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z34__device_stub__Z12lud_diagonalPfiiPfii
.L36:
	movl	%ebx, %r12d
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subl	%r13d, %r12d
	salq	$5, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	sarl	$4, %r12d
	movq	%rax, 16(%rsp)
	movl	20(%rsp), %esi
	decl	%r12d
	movq	%rdx, 40(%rsp)
	movl	%r12d, 12(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movl	%r13d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z35__device_stub__Z13lud_perimeterPfiiPfii
.L37:
	movl	%r12d, 40(%rsp)
	movl	8(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 44(%rsp)
	movq	(%rsp), %rdx
	movl	$1, %esi
	movq	40(%rsp), %rdi
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movl	%r13d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z34__device_stub__Z12lud_internalPfiiPfii
.L38:
	addl	$16, %r13d
	jmp	.L34
.L56:
	movl	$2, %esi
	leaq	.LC0(%rip), %rdi
	movabsq	$4294967312, %r15
	call	cudaFuncSetCacheConfig@PLT
	movl	$2, %esi
	leaq	.LC1(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
	movl	$2, %esi
	leaq	.LC2(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
.L42:
	movq	%r15, 40(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movabsq	$4294967297, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 48(%rsp)
	movq	%rdi, 12(%rsp)
	movl	$1, 20(%rsp)
	cmpl	%r12d, %r14d
	jle	.L55
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z40__device_stub__Z18lud_diagonal_noshrPfiiPfii
.L43:
	movl	%ebx, %r13d
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subl	%r12d, %r13d
	salq	$5, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	sarl	$4, %r13d
	movq	%rax, 16(%rsp)
	movl	20(%rsp), %esi
	decl	%r13d
	movq	%rdx, 40(%rsp)
	movl	%r13d, 12(%rsp)
	movq	12(%rsp), %rdi
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z41__device_stub__Z19lud_perimeter_noshrPfiiPfii
.L44:
	movl	%r13d, 40(%rsp)
	movl	8(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r13d, 44(%rsp)
	movq	(%rsp), %rdx
	movl	$1, %esi
	movq	40(%rsp), %rdi
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_Z40__device_stub__Z18lud_internal_noshrPfiiPfii
.L45:
	addl	$16, %r12d
	jmp	.L42
.L55:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	leal	-1(%rbx), %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	andl	$-16, %edx
	testl	%ebx, %ebx
	cmovle	%eax, %edx
	call	_Z34__device_stub__Z12lud_diagonalPfiiPfii
.L41:
	xorl	%esi, %esi
	leaq	40(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	48(%rsp), %xmm1
	movb	$1, %al
	movsd	.LC3(%rip), %xmm2
	cvtsi2sdq	32(%rsp), %xmm3
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	cvtsi2sdq	40(%rsp), %xmm0
	divsd	%xmm2, %xmm1
	mulsd	%xmm2, %xmm0
	divsd	%xmm2, %xmm3
	addsd	%xmm1, %xmm0
	cvtsi2sdq	24(%rsp), %xmm1
	mulsd	%xmm2, %xmm1
	addsd	%xmm3, %xmm1
	subsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8lud_cudaPfii, .-_Z8lud_cudaPfii
	.section	.rodata.str1.1
.LC5:
	.string	"_Z18lud_internal_noshrPfii"
.LC6:
	.string	"_Z12lud_internalPfii"
.LC7:
	.string	"_Z19lud_perimeter_noshrPfii"
.LC8:
	.string	"_Z13lud_perimeterPfii"
.LC9:
	.string	"_Z18lud_diagonal_noshrPfii"
.LC10:
	.string	"_Z12lud_diagonalPfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18lud_internal_noshrPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12lud_internalPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z19lud_perimeter_noshrPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13lud_perimeterPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18lud_diagonal_noshrPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12lud_diagonalPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>

#define BLOCK_SIZE 16


__global__ void lud_diagonal(float *m, int matrix_dim, int offset)
{
  int i,j;
  __shared__ float shadow[BLOCK_SIZE][BLOCK_SIZE];

  /* Each thread block, i.e. 1D 16 threads, loads a 
   * 2D block, i.e. 16x16, of data from the diagonal
   * of the matrix into shared memory 'shadow' */
  int array_offset = offset*matrix_dim+offset;
  for(i = 0; i < BLOCK_SIZE; i++){
    shadow[i][threadIdx.x] = m[array_offset+threadIdx.x];
    array_offset += matrix_dim;
  }
  __syncthreads();

  for(i = 0; i < BLOCK_SIZE-1; i++) {
    if ( threadIdx.x > i) { /* starts at 15 threads and then decrease one thread each time */
      for(j = 0; j < i; j++) { /* This for loop computes cols */
        shadow[threadIdx.x][i] -= shadow[threadIdx.x][j]*shadow[j][i];
      }
      shadow[threadIdx.x][i] /= shadow[i][i];
    }
    __syncthreads();

    if ( threadIdx.x > i) {
      for( j = 0; j < i+1; j++) { /* This for loop computes rows */
        shadow[i+1][threadIdx.x] -= shadow[i+1][j]*shadow[j][threadIdx.x];
      }
    }
    __syncthreads();
  }

  /* The first row is not modified, it
   * is no need to write it back to the
   * global memory */
  array_offset = (offset+1)*matrix_dim+offset;
  for(i = 1; i < BLOCK_SIZE; i++) {
    m[array_offset+threadIdx.x] = shadow[i][threadIdx.x];
    array_offset += matrix_dim;
  }
}

__global__ void lud_diagonal_noshr(float *m, int matrix_dim, int offset)
{
  int i,j;

  int array_offset = offset*matrix_dim+offset;

  for(i = 0; i < BLOCK_SIZE-1; i++) {
    if ( threadIdx.x > i) { /* starts at 15 threads and then decrease one thread each time */
      for(j = 0; j < i; j++) { /* This for loop computes cols */
        m[(array_offset+threadIdx.x*matrix_dim) + i] -= 
          m[(array_offset+threadIdx.x*matrix_dim) + j]*
          m[(array_offset+j*matrix_dim) + i];
      }
      m[(array_offset+threadIdx.x*matrix_dim) + i] /= m[(array_offset+i*matrix_dim) + i];
    }
    __syncthreads();

    if ( threadIdx.x > i) {
      for( j = 0; j < i+1; j++) { /* This for loop computes rows */
        m[(array_offset+(i+1)*matrix_dim) + threadIdx.x] -=
          m[(array_offset+(i+1)*matrix_dim) + j]*
          m[(array_offset+j*matrix_dim) + threadIdx.x];
      }
    }
    __syncthreads();
  }
}

__global__ void lud_perimeter(float *m, int matrix_dim, int offset)
{
  __shared__ float dia[BLOCK_SIZE][BLOCK_SIZE];
  __shared__ float peri_row[BLOCK_SIZE][BLOCK_SIZE];
  __shared__ float peri_col[BLOCK_SIZE][BLOCK_SIZE];

  int i,j, array_offset;
  int idx;

  /* For this kernel, each block contains 32 threads */
  if ( threadIdx.x < BLOCK_SIZE) { /* threads 0 ... 15 */
    idx = threadIdx.x;
    
    array_offset = offset*matrix_dim+offset;
    for (i=0; i < BLOCK_SIZE/2; i++){
      dia[i][idx]=m[array_offset+idx];
      array_offset += matrix_dim;
    }
    
    array_offset = offset*matrix_dim+offset;
    for (i=0; i < BLOCK_SIZE; i++) {
      peri_row[i][idx]=m[array_offset+(blockIdx.x+1)*BLOCK_SIZE+idx];
      array_offset += matrix_dim;
    }

  } else { /* threads 16 ... 31 */
    idx = threadIdx.x-BLOCK_SIZE;
    
    array_offset = (offset+BLOCK_SIZE/2)*matrix_dim+offset;
    for (i=BLOCK_SIZE/2; i < BLOCK_SIZE; i++){
      dia[i][idx]=m[array_offset+idx];
      array_offset += matrix_dim;
    }
    
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    for (i=0; i < BLOCK_SIZE; i++) {
      peri_col[i][idx] = m[array_offset+idx];
      array_offset += matrix_dim;
    }
  }
  __syncthreads();

/* this version works ok on hardware, but not gpgpusim
 **************************************************************
  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    idx=threadIdx.x;
    for(i=1; i < BLOCK_SIZE; i++){
      for (j=0; j < i; j++)
        peri_row[i][idx]-=dia[i][j]*peri_row[j][idx];
    }

    
    array_offset = (offset+1)*matrix_dim+offset;
    for(i=1; i < BLOCK_SIZE; i++){
      m[array_offset+(blockIdx.x+1)*BLOCK_SIZE+idx] = peri_row[i][idx];
      array_offset += matrix_dim;
    }
  } else { //peri-col
    idx=threadIdx.x - BLOCK_SIZE;
    for(i=0; i < BLOCK_SIZE; i++){
      for(j=0; j < i; j++)
        peri_col[idx][i]-=peri_col[idx][j]*dia[j][i];
      peri_col[idx][i] /= dia[i][i];
    }

    __syncthreads();
    
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    for(i=0; i < BLOCK_SIZE; i++){
      m[array_offset+idx] =  peri_col[i][idx];
      array_offset += matrix_dim;
    }
  }
***************************************************************/
  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    idx=threadIdx.x;
    for(i=1; i < BLOCK_SIZE; i++){
      for (j=0; j < i; j++) {
        peri_row[i][idx]-=dia[i][j]*peri_row[j][idx];
      }
    }
  } else { //peri-col
    idx=threadIdx.x - BLOCK_SIZE;
    for(i=0; i < BLOCK_SIZE; i++){
      for(j=0; j < i; j++) {
        peri_col[idx][i]-=peri_col[idx][j]*dia[j][i];
      }
      peri_col[idx][i] /= dia[i][i];
    }
  }

  __syncthreads();
   
  /* write data back to global memory */ 
  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    idx=threadIdx.x;
    array_offset = (offset+1)*matrix_dim+offset;
    for(i=1; i < BLOCK_SIZE; i++){
      m[array_offset+(blockIdx.x+1)*BLOCK_SIZE+idx] = peri_row[i][idx];
      array_offset += matrix_dim;
    }
  } else { //peri-col
    idx=threadIdx.x - BLOCK_SIZE;
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    for(i=0; i < BLOCK_SIZE; i++){
      m[array_offset+idx] =  peri_col[i][idx];
      array_offset += matrix_dim;
    }
  }
}

__global__ void lud_perimeter_noshr(float *m, int matrix_dim, int offset)
{
  int i,j, array_offset;
  int idx;

  if (threadIdx.x < BLOCK_SIZE) { //peri-row
    array_offset = offset*matrix_dim+offset;
    idx=threadIdx.x;
    for(i=1; i < BLOCK_SIZE; i++){
      for (j=0; j < i; j++) {
        m[array_offset+i*matrix_dim+(blockIdx.x+1)*BLOCK_SIZE+idx] -= 
          m[array_offset+i*matrix_dim+j] * m[array_offset+j*matrix_dim+(blockIdx.x+1)*BLOCK_SIZE+idx];
      }
    }
  } else { //peri-col
    array_offset = (offset+(blockIdx.x+1)*BLOCK_SIZE)*matrix_dim+offset;
    idx=threadIdx.x - BLOCK_SIZE;
    for(i=0; i < BLOCK_SIZE; i++){
      for(j=0; j < i; j++) {
        m[array_offset+idx*matrix_dim+i] -= m[array_offset+idx*matrix_dim+j] * m[offset*matrix_dim+offset+j*matrix_dim+i];
      }
      m[array_offset+idx*matrix_dim+i] /= m[offset*matrix_dim+offset+i*matrix_dim+i];
    }
  }
}

__global__ void lud_internal(float *m, int matrix_dim, int offset)
{
  __shared__ float peri_row[BLOCK_SIZE][BLOCK_SIZE];
  __shared__ float peri_col[BLOCK_SIZE][BLOCK_SIZE];

  int i;
  float sum;

  int global_row_id = offset + (blockIdx.y+1)*BLOCK_SIZE;
  int global_col_id = offset + (blockIdx.x+1)*BLOCK_SIZE;

  peri_row[threadIdx.y][threadIdx.x] = m[(offset+threadIdx.y)*matrix_dim+global_col_id+threadIdx.x];
  peri_col[threadIdx.y][threadIdx.x] = m[(global_row_id+threadIdx.y)*matrix_dim+offset+threadIdx.x];

  __syncthreads();

  sum = 0;
  for (i=0; i < BLOCK_SIZE; i++) {
    sum += peri_col[threadIdx.y][i] * peri_row[i][threadIdx.x];
  }
  m[(global_row_id+threadIdx.y)*matrix_dim+global_col_id+threadIdx.x] -= sum;
}

__global__ void lud_internal_noshr(float *m, int matrix_dim, int offset)
{
  int i;
  float sum;

  int global_row_id = offset + (blockIdx.y+1)*BLOCK_SIZE;
  int global_col_id = offset + (blockIdx.x+1)*BLOCK_SIZE;

  sum = 0;
  for (i=0; i < BLOCK_SIZE; i++) {
    sum += m[(global_row_id+threadIdx.y)*matrix_dim+offset+i] * m[(offset+i)*matrix_dim+global_col_id+threadIdx.x];
  }
  m[(global_row_id+threadIdx.y)*matrix_dim+global_col_id+threadIdx.x] -= sum;
}

void lud_cuda(float *m, int matrix_dim, int do_shared)
{
  int i=0;
  dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

  /* beginning of timing point */
  struct timeval tv1, tv2;
  gettimeofday(&tv1, NULL);

  if( do_shared) {
    //printf("Executing kernels with shared memory!\n");
    for (i=0; i < matrix_dim-BLOCK_SIZE; i += BLOCK_SIZE) {
      lud_diagonal<<<1, BLOCK_SIZE>>>(m, matrix_dim, i);
      lud_perimeter<<<(matrix_dim-i)/BLOCK_SIZE-1, BLOCK_SIZE*2>>>(m, matrix_dim, i);
      dim3 dimGrid((matrix_dim-i)/BLOCK_SIZE-1, (matrix_dim-i)/BLOCK_SIZE-1);
      lud_internal<<<dimGrid, dimBlock>>>(m, matrix_dim, i); 
    }
    lud_diagonal<<<1,BLOCK_SIZE>>>(m, matrix_dim, i);
  }
  else { 
    //printf("Executing kernels without shared memory!\n");
    
    hipFuncSetCacheConfig(reinterpret_cast<const void*>("lud_diagonal_noshr"), hipFuncCachePreferL1);
    hipFuncSetCacheConfig(reinterpret_cast<const void*>("lud_perimeter_noshr"), hipFuncCachePreferL1);
    hipFuncSetCacheConfig(reinterpret_cast<const void*>("lud_internal_noshr"), hipFuncCachePreferL1);

    for (i=0; i < matrix_dim-BLOCK_SIZE; i += BLOCK_SIZE) {
      lud_diagonal_noshr<<<1, BLOCK_SIZE>>>(m, matrix_dim, i);
      lud_perimeter_noshr<<<(matrix_dim-i)/BLOCK_SIZE-1, BLOCK_SIZE*2>>>(m, matrix_dim, i);
      dim3 dimGrid((matrix_dim-i)/BLOCK_SIZE-1, (matrix_dim-i)/BLOCK_SIZE-1);
      lud_internal_noshr<<<dimGrid, dimBlock>>>(m, matrix_dim, i); 
    }
    lud_diagonal<<<1,BLOCK_SIZE>>>(m, matrix_dim, i);
  }

  /* end of timing point */
  gettimeofday(&tv2, NULL);
  double runtime = ((tv2.tv_sec*1000.0 + tv2.tv_usec/1000.0)-(tv1.tv_sec*1000.0 + tv1.tv_usec/1000.0));
  printf("Runtime(milliseconds): %f\n", runtime);
}


	.text
	.file	"lud_kernel.hip"
	.globl	_Z27__device_stub__lud_diagonalPfii # -- Begin function _Z27__device_stub__lud_diagonalPfii
	.type	_Z27__device_stub__lud_diagonalPfii,@function
_Z27__device_stub__lud_diagonalPfii:    # @_Z27__device_stub__lud_diagonalPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12lud_diagonalPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__lud_diagonalPfii, .Lfunc_end0-_Z27__device_stub__lud_diagonalPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__lud_diagonal_noshrPfii # -- Begin function _Z33__device_stub__lud_diagonal_noshrPfii
	.type	_Z33__device_stub__lud_diagonal_noshrPfii,@function
_Z33__device_stub__lud_diagonal_noshrPfii: # @_Z33__device_stub__lud_diagonal_noshrPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18lud_diagonal_noshrPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z33__device_stub__lud_diagonal_noshrPfii, .Lfunc_end1-_Z33__device_stub__lud_diagonal_noshrPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__lud_perimeterPfii # -- Begin function _Z28__device_stub__lud_perimeterPfii
	.type	_Z28__device_stub__lud_perimeterPfii,@function
_Z28__device_stub__lud_perimeterPfii:   # @_Z28__device_stub__lud_perimeterPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13lud_perimeterPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__lud_perimeterPfii, .Lfunc_end2-_Z28__device_stub__lud_perimeterPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__lud_perimeter_noshrPfii # -- Begin function _Z34__device_stub__lud_perimeter_noshrPfii
	.type	_Z34__device_stub__lud_perimeter_noshrPfii,@function
_Z34__device_stub__lud_perimeter_noshrPfii: # @_Z34__device_stub__lud_perimeter_noshrPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19lud_perimeter_noshrPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z34__device_stub__lud_perimeter_noshrPfii, .Lfunc_end3-_Z34__device_stub__lud_perimeter_noshrPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__lud_internalPfii # -- Begin function _Z27__device_stub__lud_internalPfii
	.type	_Z27__device_stub__lud_internalPfii,@function
_Z27__device_stub__lud_internalPfii:    # @_Z27__device_stub__lud_internalPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12lud_internalPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__lud_internalPfii, .Lfunc_end4-_Z27__device_stub__lud_internalPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__lud_internal_noshrPfii # -- Begin function _Z33__device_stub__lud_internal_noshrPfii
	.type	_Z33__device_stub__lud_internal_noshrPfii,@function
_Z33__device_stub__lud_internal_noshrPfii: # @_Z33__device_stub__lud_internal_noshrPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18lud_internal_noshrPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z33__device_stub__lud_internal_noshrPfii, .Lfunc_end5-_Z33__device_stub__lud_internal_noshrPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8lud_cudaPfii
.LCPI6_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	_Z8lud_cudaPfii
	.type	_Z8lud_cudaPfii,@function
_Z8lud_cudaPfii:                        # @_Z8lud_cudaPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %ebx
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movabsq	$4294967297, %r12               # imm = 0x100000001
	xorl	%r15d, %r15d
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	testl	%ebp, %ebp
	movq	%rbx, (%rsp)                    # 8-byte Spill
	je	.LBB6_10
# %bb.1:                                # %.preheader
	cmpl	$17, %ebx
	jl	.LBB6_19
# %bb.2:                                # %.lr.ph.preheader
	movq	(%rsp), %rbx                    # 8-byte Reload
	leal	-16(%rbx), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	xorl	%r15d, %r15d
	leaq	15(%r12), %rbp
	leaq	31(%r12), %r13
                                        # kill: def $ebx killed $ebx killed $rbx def $rbx
.LBB6_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_5
# %bb.4:                                #   in Loop: Header=BB6_3 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z27__device_stub__lud_diagonalPfii
.LBB6_5:                                #   in Loop: Header=BB6_3 Depth=1
	leal	15(%rbx), %r14d
	testl	%ebx, %ebx
	cmovnsl	%ebx, %r14d
	sarl	$4, %r14d
	decl	%r14d
	leaq	(%r12,%r14), %rdi
	decq	%rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_7
# %bb.6:                                #   in Loop: Header=BB6_3 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z28__device_stub__lud_perimeterPfii
.LBB6_7:                                #   in Loop: Header=BB6_3 Depth=1
	imulq	%r12, %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_9
# %bb.8:                                #   in Loop: Header=BB6_3 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z27__device_stub__lud_internalPfii
.LBB6_9:                                #   in Loop: Header=BB6_3 Depth=1
	addl	$16, %r15d
	addl	$-16, %ebx
	cmpl	20(%rsp), %r15d                 # 4-byte Folded Reload
	jl	.LBB6_3
	jmp	.LBB6_19
.LBB6_10:
	movl	$.L.str, %edi
	movl	$2, %esi
	callq	hipFuncSetCacheConfig
	movl	$.L.str.1, %edi
	movl	$2, %esi
	callq	hipFuncSetCacheConfig
	movl	$.L.str.2, %edi
	movl	$2, %esi
	callq	hipFuncSetCacheConfig
	xorl	%r15d, %r15d
	cmpl	$17, %ebx
	jl	.LBB6_19
# %bb.11:                               # %.lr.ph131.preheader
	movq	(%rsp), %rbx                    # 8-byte Reload
	leal	-16(%rbx), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	xorl	%r15d, %r15d
	leaq	15(%r12), %rbp
	leaq	31(%r12), %r13
                                        # kill: def $ebx killed $ebx killed $rbx def $rbx
.LBB6_12:                               # %.lr.ph131
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.13:                               #   in Loop: Header=BB6_12 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z33__device_stub__lud_diagonal_noshrPfii
.LBB6_14:                               #   in Loop: Header=BB6_12 Depth=1
	leal	15(%rbx), %r14d
	testl	%ebx, %ebx
	cmovnsl	%ebx, %r14d
	sarl	$4, %r14d
	decl	%r14d
	leaq	(%r12,%r14), %rdi
	decq	%rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_16
# %bb.15:                               #   in Loop: Header=BB6_12 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z34__device_stub__lud_perimeter_noshrPfii
.LBB6_16:                               #   in Loop: Header=BB6_12 Depth=1
	imulq	%r12, %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_18
# %bb.17:                               #   in Loop: Header=BB6_12 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z33__device_stub__lud_internal_noshrPfii
.LBB6_18:                               #   in Loop: Header=BB6_12 Depth=1
	addl	$16, %r15d
	addl	$-16, %ebx
	cmpl	20(%rsp), %r15d                 # 4-byte Folded Reload
	jl	.LBB6_12
.LBB6_19:                               # %._crit_edge132
	leaq	15(%r12), %rdx
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_21
# %bb.20:                               # %.sink.split
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	(%rsp), %rsi                    # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	callq	_Z27__device_stub__lud_diagonalPfii
.LBB6_21:
	leaq	40(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	movsd	.LCPI6_0(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	divsd	%xmm2, %xmm0
	addsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	24(%rsp), %xmm1
	mulsd	%xmm2, %xmm1
	cvtsi2sdq	32(%rsp), %xmm3
	divsd	%xmm2, %xmm3
	addsd	%xmm1, %xmm3
	subsd	%xmm3, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end6:
	.size	_Z8lud_cudaPfii, .Lfunc_end6-_Z8lud_cudaPfii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12lud_diagonalPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18lud_diagonal_noshrPfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13lud_perimeterPfii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19lud_perimeter_noshrPfii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12lud_internalPfii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18lud_internal_noshrPfii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12lud_diagonalPfii,@object    # @_Z12lud_diagonalPfii
	.section	.rodata,"a",@progbits
	.globl	_Z12lud_diagonalPfii
	.p2align	3, 0x0
_Z12lud_diagonalPfii:
	.quad	_Z27__device_stub__lud_diagonalPfii
	.size	_Z12lud_diagonalPfii, 8

	.type	_Z18lud_diagonal_noshrPfii,@object # @_Z18lud_diagonal_noshrPfii
	.globl	_Z18lud_diagonal_noshrPfii
	.p2align	3, 0x0
_Z18lud_diagonal_noshrPfii:
	.quad	_Z33__device_stub__lud_diagonal_noshrPfii
	.size	_Z18lud_diagonal_noshrPfii, 8

	.type	_Z13lud_perimeterPfii,@object   # @_Z13lud_perimeterPfii
	.globl	_Z13lud_perimeterPfii
	.p2align	3, 0x0
_Z13lud_perimeterPfii:
	.quad	_Z28__device_stub__lud_perimeterPfii
	.size	_Z13lud_perimeterPfii, 8

	.type	_Z19lud_perimeter_noshrPfii,@object # @_Z19lud_perimeter_noshrPfii
	.globl	_Z19lud_perimeter_noshrPfii
	.p2align	3, 0x0
_Z19lud_perimeter_noshrPfii:
	.quad	_Z34__device_stub__lud_perimeter_noshrPfii
	.size	_Z19lud_perimeter_noshrPfii, 8

	.type	_Z12lud_internalPfii,@object    # @_Z12lud_internalPfii
	.globl	_Z12lud_internalPfii
	.p2align	3, 0x0
_Z12lud_internalPfii:
	.quad	_Z27__device_stub__lud_internalPfii
	.size	_Z12lud_internalPfii, 8

	.type	_Z18lud_internal_noshrPfii,@object # @_Z18lud_internal_noshrPfii
	.globl	_Z18lud_internal_noshrPfii
	.p2align	3, 0x0
_Z18lud_internal_noshrPfii:
	.quad	_Z33__device_stub__lud_internal_noshrPfii
	.size	_Z18lud_internal_noshrPfii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"lud_diagonal_noshr"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"lud_perimeter_noshr"
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"lud_internal_noshr"
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Runtime(milliseconds): %f\n"
	.size	.L.str.3, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12lud_diagonalPfii"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18lud_diagonal_noshrPfii"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13lud_perimeterPfii"
	.size	.L__unnamed_3, 22

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z19lud_perimeter_noshrPfii"
	.size	.L__unnamed_4, 28

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12lud_internalPfii"
	.size	.L__unnamed_5, 21

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z18lud_internal_noshrPfii"
	.size	.L__unnamed_6, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__lud_diagonalPfii
	.addrsig_sym _Z33__device_stub__lud_diagonal_noshrPfii
	.addrsig_sym _Z28__device_stub__lud_perimeterPfii
	.addrsig_sym _Z34__device_stub__lud_perimeter_noshrPfii
	.addrsig_sym _Z27__device_stub__lud_internalPfii
	.addrsig_sym _Z33__device_stub__lud_internal_noshrPfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12lud_diagonalPfii
	.addrsig_sym _Z18lud_diagonal_noshrPfii
	.addrsig_sym _Z13lud_perimeterPfii
	.addrsig_sym _Z19lud_perimeter_noshrPfii
	.addrsig_sym _Z12lud_internalPfii
	.addrsig_sym _Z18lud_internal_noshrPfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12lud_diagonalPfii    ; -- Begin function _Z12lud_diagonalPfii
	.globl	_Z12lud_diagonalPfii
	.p2align	8
	.type	_Z12lud_diagonalPfii,@function
_Z12lud_diagonalPfii:                   ; @_Z12lud_diagonalPfii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v3, 2, v0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s0, s7, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v1, s6, v1
	v_add_co_u32 v4, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_add_nc_u32_e32 v5, s0, v3
	s_add_i32 s0, s0, 64
	s_cmpk_lg_i32 s0, 0x400
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
	s_cbranch_scc1 .LBB0_1
; %bb.2:
	v_lshlrev_b32_e32 v1, 6, v0
	v_lshlrev_b32_e32 v2, 2, v0
	s_mov_b32 s1, 0
	s_mov_b32 s2, 0
	s_mov_b32 s3, 1
	s_mov_b32 s8, 64
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;     Child Loop BB0_14 Depth 2
	v_cmp_lt_u32_e64 s0, s2, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_12
; %bb.4:                                ; %.preheader46
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_cmp_lg_u32 s2, 0
	s_cbranch_scc0 .LBB0_8
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v5, s2, 2, v1
	v_mov_b32_e32 v6, v1
	s_mov_b32 s10, 0
	s_mov_b32 s11, s1
	ds_load_b32 v4, v5
.LBB0_6:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v7, s11
	s_add_i32 s10, s10, 1
	s_add_i32 s11, s11, 64
	s_cmp_lt_u32 s10, s2
	ds_load_b32 v8, v6
	ds_load_b32 v7, v7
	v_add_nc_u32_e32 v6, 4, v6
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v4, -v8, v7, v4
	ds_store_b32 v5, v4
	s_cbranch_scc1 .LBB0_6
; %bb.7:                                ; %Flow94
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s10, 0
	s_branch .LBB0_9
.LBB0_8:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s10, -1
                                        ; implicit-def: $vgpr4
.LBB0_9:                                ; %Flow95
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccz .LBB0_11
; %bb.10:                               ; %.preheader46.._crit_edge_crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	ds_load_b32 v4, v1
.LBB0_11:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_lshl_b32 s10, s2, 2
	s_lshl_b32 s11, s2, 6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s11, s11, s10
	v_mov_b32_e32 v5, s11
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v6, null, v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v4, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v7
	v_fma_f32 v10, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v6, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v7, v9
	v_lshl_add_u32 v7, v0, 6, s10
	v_div_fixup_f32 v4, v6, v5, v4
	ds_store_b32 v7, v4
.LBB0_12:                               ; %Flow96
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_15
; %bb.13:                               ; %.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v5, s2, 6, v2
	s_mov_b32 s0, s3
	s_mov_b32 s10, s8
	v_mov_b32_e32 v6, v3
	ds_load_b32 v4, v5 offset:64
	v_add_nc_u32_e32 v5, 64, v5
.LBB0_14:                               ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v7, s10
	s_add_i32 s0, s0, -1
	s_add_i32 s10, s10, 4
	s_cmp_lg_u32 s0, 0
	ds_load_b32 v8, v6
	ds_load_b32 v7, v7
	v_add_nc_u32_e32 v6, 64, v6
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v4, -v7, v8, v4
	ds_store_b32 v5, v4
	s_cbranch_scc1 .LBB0_14
.LBB0_15:                               ; %Flow93
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_add_i32 s2, s2, 1
	s_add_i32 s3, s3, 1
	s_add_i32 s1, s1, 4
	s_add_i32 s8, s8, 64
	s_cmp_lg_u32 s2, 15
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_3
; %bb.16:
	s_add_i32 s0, s7, 1
	v_mov_b32_e32 v1, 0
	s_mul_i32 s0, s0, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add3_u32 v0, s0, s7, v0
	s_mov_b32 s0, 64
.LBB0_17:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, s0, v3
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_add_nc_u32_e32 v0, s6, v0
	s_add_i32 s0, s0, 64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s0, 0x400
	ds_load_b32 v2, v2
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[4:5], v2, off
	s_cbranch_scc1 .LBB0_17
; %bb.18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12lud_diagonalPfii
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12lud_diagonalPfii, .Lfunc_end0-_Z12lud_diagonalPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 708
; NumSgprs: 14
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18lud_diagonal_noshrPfii ; -- Begin function _Z18lud_diagonal_noshrPfii
	.globl	_Z18lud_diagonal_noshrPfii
	.p2align	8
	.type	_Z18lud_diagonal_noshrPfii,@function
_Z18lud_diagonal_noshrPfii:             ; @_Z18lud_diagonal_noshrPfii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s0, s7
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, s2, v0
	v_mad_u64_u32 v[3:4], null, v0, s6, s[2:3]
	s_mov_b32 s3, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v2
	s_add_i32 s8, s6, s2
	s_mov_b32 s7, 0
	s_mov_b32 s12, s2
.LBB1_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
                                        ;     Child Loop BB1_8 Depth 2
	v_cmp_lt_u32_e64 s0, s7, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_6
; %bb.2:                                ; %.preheader50
                                        ;   in Loop: Header=BB1_1 Depth=1
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_cmp_eq_u32 s7, 0
	s_mov_b32 s9, s2
	s_cbranch_scc1 .LBB1_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_1 Depth=1
	v_add_nc_u32_e32 v1, s7, v3
	s_add_i32 s9, s7, s2
	s_mov_b32 s13, 0
	s_mov_b32 s10, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_co_u32 v7, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	v_dual_mov_b32 v6, v2 :: v_dual_mov_b32 v5, v1
	global_load_b32 v10, v[7:8], off
.LBB1_4:                                ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v1, s13, v3
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[10:11], 2
	s_add_u32 s14, s4, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_addc_u32 s15, s5, s15
	s_add_i32 s13, s13, 1
	s_add_i32 s10, s10, s6
	s_cmp_lt_u32 s13, s7
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[11:12], off
	global_load_b32 v11, v2, s[14:15]
	s_waitcnt vmcnt(0)
	v_fma_f32 v10, -v1, v11, v10
	global_store_b32 v[7:8], v10, off
	s_cbranch_scc1 .LBB1_4
.LBB1_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_mul_i32 s10, s7, s6
	s_add_i32 s10, s9, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s11, s10, 31
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_lshl_b64 s[10:11], s[10:11], 2
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_add_u32 s10, s4, s10
	s_addc_u32 s11, s5, s11
	s_clause 0x1
	global_load_b32 v1, v2, s[10:11]
	global_load_b32 v7, v[5:6], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v8, null, v1, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v8, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	v_div_scale_f32 v11, vcc_lo, v7, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v11, v10
	v_fma_f32 v13, -v8, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v13, v10
	v_fma_f32 v8, -v8, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v8, v8, v10, v12
	v_div_fixup_f32 v1, v8, v1, v7
	global_store_b32 v[5:6], v1, off
.LBB1_6:                                ; %Flow83
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s7, s7, 1
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB1_9
; %bb.7:                                ; %.preheader
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_mul_i32 s0, s7, s6
	s_ashr_i32 s9, s8, 31
	v_add3_u32 v1, s0, s2, v0
	s_lshl_b64 s[0:1], s[8:9], 2
	s_mov_b32 s9, s3
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_mov_b32_e32 v1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v7, v[5:6], off
.LBB1_8:                                ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b64 v[10:11], 2, v[1:2]
	s_add_i32 s9, s9, -1
	v_add_nc_u32_e32 v1, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, s4, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b32 v8, v2, s[0:1]
	global_load_b32 v10, v[10:11], off
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s9, 0
	s_waitcnt vmcnt(0)
	v_fma_f32 v7, -v8, v10, v7
	global_store_b32 v[5:6], v7, off
	s_cbranch_scc1 .LBB1_8
.LBB1_9:                                ; %Flow80
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s3, s3, 1
	s_add_i32 s12, s12, 1
	s_add_i32 s8, s8, s6
	s_cmp_lg_u32 s7, 15
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_1
; %bb.10:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18lud_diagonal_noshrPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18lud_diagonal_noshrPfii, .Lfunc_end1-_Z18lud_diagonal_noshrPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 672
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13lud_perimeterPfii   ; -- Begin function _Z13lud_perimeterPfii
	.globl	_Z13lud_perimeterPfii
	.p2align	8
	.type	_Z13lud_perimeterPfii,@function
_Z13lud_perimeterPfii:                  ; @_Z13lud_perimeterPfii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_cmp_lt_u32_e64 s0, 15, v0
	v_lshlrev_b32_e32 v4, 2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB2_5
; %bb.1:
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s7, 8
	v_add_nc_u32_e32 v3, 0x1c0, v4
	s_mul_i32 s2, s2, s6
	s_mov_b32 s8, 0
	s_add_i32 s2, s2, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	v_add_co_u32 v1, s2, s2, v0
	v_add_co_ci_u32_e64 v2, null, s3, 0, s2
	s_ashr_i32 s3, s6, 31
	s_mov_b32 s2, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_lshl_b64 s[2:3], s[2:3], 2
	v_add_co_u32 v1, vcc_lo, v1, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, 0xffffffc0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, -1, v2, vcc_lo
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	v_add_co_u32 v1, vcc_lo, v1, s2
	v_add_nc_u32_e32 v6, s8, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_add_i32 s8, s8, 64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s8, 0x200
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
	s_cbranch_scc1 .LBB2_2
; %bb.3:
	s_lshl_b32 s8, s15, 4
	v_add_nc_u32_e32 v3, 0x3c0, v4
	s_add_i32 s8, s8, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s8, 16
	s_mul_i32 s8, s8, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s8, s7
	s_ashr_i32 s9, s8, 31
	v_add_co_u32 v1, s8, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s9, 0, s8
	s_mov_b32 s8, 0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, s4
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, 0xffffffc0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, -1, v2, vcc_lo
.LBB2_4:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	v_add_co_u32 v1, vcc_lo, v1, s2
	v_add_nc_u32_e32 v6, s8, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_add_i32 s8, s8, 64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s8, 0x400
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
	s_cbranch_scc1 .LBB2_4
.LBB2_5:                                ; %Flow228
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB2_10
; %bb.6:
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s6, 1
	s_ashr_i32 s3, s6, 31
	v_mad_u64_u32 v[1:2], null, s2, s7, v[0:1]
	s_mov_b32 s2, s6
	s_mov_b32 s8, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB2_7:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v2, s2
	v_add_nc_u32_e32 v6, s8, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_add_i32 s8, s8, 64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s8, 0x200
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
	s_cbranch_scc0 .LBB2_7
; %bb.8:                                ; %.preheader111
	s_lshl_b32 s2, s15, 4
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, 0x800, v4
	v_add3_u32 v1, v1, s2, 16
	s_mov_b32 s2, 0
.LBB2_9:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_nc_u32_e32 v1, s6, v1
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	v_add_nc_u32_e32 v6, s2, v3
	s_add_i32 s2, s2, 64
	s_cmpk_eq_i32 s2, 0x400
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
	s_cbranch_scc0 .LBB2_9
.LBB2_10:                               ; %Flow229
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB2_20
; %bb.11:
	v_add_nc_u32_e32 v1, -16, v0
	v_lshlrev_b32_e32 v2, 6, v0
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v3, v1, 6, 0x400
	v_lshlrev_b32_e32 v5, 6, v1
.LBB2_12:                               ; %.preheader109
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_14 Depth 2
	s_cmp_lg_u32 s3, 0
	s_cbranch_scc0 .LBB2_16
; %bb.13:                               ; %.lr.ph
                                        ;   in Loop: Header=BB2_12 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v6, s3, 2, v5
	s_mov_b32 s8, 0
	s_mov_b32 s9, s2
	v_mov_b32_e32 v7, v2
	ds_load_b32 v4, v6 offset:1024
	v_add_nc_u32_e32 v6, 0x400, v6
.LBB2_14:                               ;   Parent Loop BB2_12 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v8, s9
	s_add_i32 s8, s8, 1
	s_add_i32 s9, s9, 64
	s_cmp_lt_u32 s8, s3
	ds_load_b32 v9, v7
	ds_load_b32 v8, v8
	v_add_nc_u32_e32 v7, 4, v7
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v4, -v9, v8, v4
	ds_store_b32 v6, v4
	s_cbranch_scc1 .LBB2_14
; %bb.15:                               ; %Flow220
                                        ;   in Loop: Header=BB2_12 Depth=1
	s_mov_b32 s8, 0
	s_branch .LBB2_17
.LBB2_16:                               ;   in Loop: Header=BB2_12 Depth=1
	s_mov_b32 s8, -1
                                        ; implicit-def: $vgpr4
.LBB2_17:                               ; %Flow221
                                        ;   in Loop: Header=BB2_12 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB2_19
; %bb.18:                               ; %.preheader109.._crit_edge_crit_edge
                                        ;   in Loop: Header=BB2_12 Depth=1
	ds_load_b32 v4, v3
.LBB2_19:                               ; %._crit_edge
                                        ;   in Loop: Header=BB2_12 Depth=1
	s_lshl_b32 s8, s3, 6
	s_lshl_b32 s9, s3, 2
	s_add_i32 s3, s3, 1
	s_add_i32 s8, s9, s8
	s_add_i32 s2, s2, 4
	v_mov_b32_e32 v6, s8
	s_cmp_lg_u32 s3, 16
	ds_load_b32 v6, v6
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v7, null, v6, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v7, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v7, v7, v8, v10
	v_lshl_add_u32 v8, v1, 6, s9
	v_div_fixup_f32 v4, v7, v6, v4
	ds_store_b32 v8, v4 offset:1024
                                        ; implicit-def: $vgpr4
	s_cbranch_scc1 .LBB2_12
.LBB2_20:                               ; %Flow224
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB2_25
; %bb.21:                               ; %.preheader.preheader
	v_lshl_add_u32 v1, v0, 2, 0x800
	s_mov_b32 s2, 1
	s_mov_b32 s3, 64
.LBB2_22:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_23 Depth 2
	v_lshl_add_u32 v3, s2, 6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v5, v1
	s_mov_b32 s8, s3
	s_mov_b32 s9, s2
	ds_load_b32 v2, v3 offset:2048
	v_add_nc_u32_e32 v3, 0x800, v3
.LBB2_23:                               ;   Parent Loop BB2_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v6, s8
	s_add_i32 s9, s9, -1
	s_add_i32 s8, s8, 4
	s_cmp_lg_u32 s9, 0
	ds_load_b32 v7, v5
	ds_load_b32 v6, v6
	v_add_nc_u32_e32 v5, 64, v5
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v2, -v6, v7, v2
	ds_store_b32 v3, v2
	s_cbranch_scc1 .LBB2_23
; %bb.24:                               ;   in Loop: Header=BB2_22 Depth=1
	s_add_i32 s2, s2, 1
	s_add_i32 s3, s3, 64
	s_cmp_eq_u32 s2, 16
	s_cbranch_scc0 .LBB2_22
.LBB2_25:                               ; %Flow225
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB2_28
; %bb.26:
	s_lshl_b32 s0, s15, 4
	v_lshl_add_u32 v3, v0, 2, 0x3c0
	s_add_i32 s0, s0, s7
	s_mov_b32 s3, 0
	s_add_i32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s6
	s_add_i32 s0, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_ashr_i32 s1, s0, 31
	v_add_co_u32 v1, s0, s0, v0
	v_add_co_ci_u32_e64 v2, null, s1, 0, s0
	s_ashr_i32 s1, s6, 31
	s_mov_b32 s0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_lshl_b64 s[0:1], s[0:1], 2
	v_add_co_u32 v1, vcc_lo, v1, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, 0xffffffc0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, -1, v2, vcc_lo
.LBB2_27:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v0, s3, v3
	s_add_i32 s3, s3, 64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s3, 0x400
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v0, off
	v_add_co_u32 v1, vcc_lo, v1, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
                                        ; implicit-def: $vgpr0
	s_cbranch_scc1 .LBB2_27
.LBB2_28:                               ; %Flow217
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_31
; %bb.29:
	s_add_i32 s0, s7, 1
	s_lshl_b32 s1, s15, 4
	s_mul_i32 s0, s0, s6
	v_lshl_add_u32 v2, v0, 2, 0x840
	s_add_i32 s0, s1, s0
	v_mov_b32_e32 v1, 0
	s_add_i32 s0, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add3_u32 v0, s0, v0, 16
	s_mov_b32 s0, 0
.LBB2_30:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s0, v2
	s_add_i32 s0, s0, 64
	s_cmpk_eq_i32 s0, 0x3c0
	ds_load_b32 v5, v3
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_nc_u32_e32 v0, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB2_30
.LBB2_31:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13lud_perimeterPfii
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13lud_perimeterPfii, .Lfunc_end2-_Z13lud_perimeterPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1440
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19lud_perimeter_noshrPfii ; -- Begin function _Z19lud_perimeter_noshrPfii
	.globl	_Z19lud_perimeter_noshrPfii
	.p2align	8
	.type	_Z19lud_perimeter_noshrPfii,@function
_Z19lud_perimeter_noshrPfii:            ; @_Z19lud_perimeter_noshrPfii
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, exec_lo
	v_cmpx_lt_u32_e32 15, v0
	s_xor_b32 s6, exec_lo, s4
	s_cbranch_execz .LBB3_6
; %bb.1:
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v0, -16, v0
	s_lshl_b32 s4, s15, 4
	s_waitcnt lgkmcnt(0)
	s_add_i32 s7, s2, 1
	s_add_i32 s4, s4, s3
	v_mul_lo_u32 v0, v0, s2
	s_add_i32 s4, s4, 16
	s_mul_i32 s7, s7, s3
	s_mul_i32 s4, s4, s2
	s_mov_b32 s8, 0
	s_mov_b32 s9, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, s4, s3, v0
	v_ashrrev_i32_e32 v2, 31, v1
.LBB3_2:                                ; %.preheader62
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_4 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v3, v1
	s_cmp_eq_u32 s8, 0
	s_mov_b32 s10, s7
	s_cbranch_scc1 .LBB3_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_2 Depth=1
	v_add_nc_u32_e32 v3, s8, v1
	s_add_i32 s10, s8, s7
	s_mov_b32 s11, 0
	s_mov_b32 s4, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b32 v0, v[5:6], off
.LBB3_4:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v8, s11, v1
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[4:5], 2
	s_add_u32 s12, s0, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	s_addc_u32 s13, s1, s13
	s_add_i32 s11, s11, 1
	s_add_i32 s4, s4, s2
	s_cmp_lt_u32 s11, s8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v7, s[12:13]
	s_waitcnt vmcnt(0)
	v_fma_f32 v0, -v8, v9, v0
	global_store_b32 v[5:6], v0, off
	s_cbranch_scc1 .LBB3_4
.LBB3_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_mul_i32 s4, s8, s2
	s_add_i32 s4, s10, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s5, s4, 31
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_lshl_b64 s[4:5], s[4:5], 2
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_add_u32 s4, s0, s4
	s_addc_u32 s5, s1, s5
	s_clause 0x1
	global_load_b32 v0, v7, s[4:5]
	global_load_b32 v5, v[3:4], off
	s_add_i32 s8, s8, 1
	s_add_i32 s9, s9, 1
	s_cmp_lg_u32 s8, 16
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v6, null, v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v6, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v5, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v6, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v6, -v6, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v8, v10
	v_div_fixup_f32 v0, v6, v0, v5
	global_store_b32 v[3:4], v0, off
                                        ; implicit-def: $vgpr0
	s_cbranch_scc1 .LBB3_2
.LBB3_6:                                ; %Flow99
	s_and_not1_saveexec_b32 s4, s6
	s_cbranch_execz .LBB3_11
; %bb.7:
	s_waitcnt lgkmcnt(0)
	s_add_i32 s10, s2, 1
	s_lshl_b32 s5, s15, 4
	s_mul_i32 s10, s10, s3
	s_add_i32 s3, s5, 16
	s_add_i32 s4, s2, s10
	v_mov_b32_e32 v1, 0
	s_ashr_i32 s5, s4, 31
	v_or_b32_e32 v4, s3, v0
	s_lshl_b64 s[4:5], s[4:5], 2
	v_add3_u32 v5, s3, s10, v0
	s_add_u32 s4, s0, s4
	s_addc_u32 s5, s1, s5
	s_ashr_i32 s3, s2, 31
	s_mov_b32 s11, 1
	s_lshl_b64 s[6:7], s[2:3], 2
.LBB3_8:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_9 Depth 2
	s_mul_i32 s3, s11, s2
	s_mov_b64 s[8:9], s[4:5]
	v_add3_u32 v0, s3, s10, v4
	s_mov_b32 s3, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_mov_b32_e32 v0, v5
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v6, v[2:3], off
.LBB3_9:                                ;   Parent Loop BB3_8 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	s_add_i32 s3, s3, -1
	v_add_nc_u32_e32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	global_load_b32 v9, v1, s[8:9]
	global_load_b32 v7, v[7:8], off
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmp_lg_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_fma_f32 v6, -v9, v7, v6
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB3_9
; %bb.10:                               ;   in Loop: Header=BB3_8 Depth=1
	s_add_i32 s11, s11, 1
	s_add_u32 s4, s4, s6
	s_addc_u32 s5, s5, s7
	s_cmp_eq_u32 s11, 16
	s_cbranch_scc0 .LBB3_8
.LBB3_11:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19lud_perimeter_noshrPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z19lud_perimeter_noshrPfii, .Lfunc_end3-_Z19lud_perimeter_noshrPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 728
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12lud_internalPfii    ; -- Begin function _Z12lud_internalPfii
	.globl	_Z12lud_internalPfii
	.p2align	8
	.type	_Z12lud_internalPfii,@function
_Z12lud_internalPfii:                   ; @_Z12lud_internalPfii
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_bfe_u32 v8, v0, 10, 10
	v_and_b32_e32 v9, 0x3ff, v0
	s_lshl_b32 s4, s15, 4
	s_lshl_b32 s5, s14, 4
	s_waitcnt lgkmcnt(0)
	s_add_i32 s6, s3, 16
	v_add_nc_u32_e32 v3, s3, v8
	v_add3_u32 v0, s6, s5, v9
	v_add3_u32 v4, s4, s6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[1:2], null, v3, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	v_mul_lo_u32 v3, v4, s2
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add3_u32 v1, v3, v9, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_lshlrev_b32_e32 v1, 6, v8
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_lshlrev_b32_e32 v7, 2, v9
	v_add_nc_u32_e32 v4, 0x400, v7
	v_add_nc_u32_e32 v7, v1, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v4, v1
	s_waitcnt vmcnt(1)
	ds_store_b32 v8, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB4_1:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v5, s2, v1
	s_add_i32 s2, s2, 4
	ds_load_b32 v6, v4
	ds_load_b32 v5, v5
	v_add_nc_u32_e32 v4, 64, v4
	s_cmp_lg_u32 s2, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v5, v6
	s_cbranch_scc1 .LBB4_1
; %bb.2:
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12lud_internalPfii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12lud_internalPfii, .Lfunc_end4-_Z12lud_internalPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18lud_internal_noshrPfii ; -- Begin function _Z18lud_internal_noshrPfii
	.globl	_Z18lud_internal_noshrPfii
	.p2align	8
	.type	_Z18lud_internal_noshrPfii,@function
_Z18lud_internal_noshrPfii:             ; @_Z18lud_internal_noshrPfii
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	s_lshl_b32 s5, s15, 4
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v6, 0x3ff, v0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s4, s3, 16
	s_add_i32 s6, s2, 1
	v_add3_u32 v1, s4, s5, v1
	s_lshl_b32 s5, s14, 4
	s_mul_i32 s6, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s6, s5, s6
	v_mul_lo_u32 v4, v1, s2
	v_add3_u32 v0, s6, v6, 16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v7, s3, v4
	s_mov_b32 s3, 0
.LBB5_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v1, v3 :: v_dual_add_nc_u32 v2, s3, v7
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s3, 16
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[8:9], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v5, v8, v1 :: v_dual_add_nc_u32 v0, s2, v0
	s_cbranch_scc1 .LBB5_1
; %bb.2:
	s_add_i32 s4, s4, s5
	v_mov_b32_e32 v1, 0
	v_add3_u32 v0, s4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v5
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18lud_internal_noshrPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z18lud_internal_noshrPfii, .Lfunc_end5-_Z18lud_internal_noshrPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12lud_diagonalPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z12lud_diagonalPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18lud_diagonal_noshrPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18lud_diagonal_noshrPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13lud_perimeterPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13lud_perimeterPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19lud_perimeter_noshrPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19lud_perimeter_noshrPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12lud_internalPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12lud_internalPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18lud_internal_noshrPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18lud_internal_noshrPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
