#include <assert.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>

__global__ void vectorAddGPU(float* a, float* b, float* c, int N) {
  int idx = blockIdx.x * blockDim.x + threadIdx.x;

  if (idx < N) {
    c[idx] = a[idx] + b[idx];
  }
}

void multiGPU(int size = 1000000) {
  int n = size;
  int work_per_gpu = (n - 1) / 2 + 1;
  int nBytes = n * sizeof(float);
  int nBytes_per_gpu = work_per_gpu * sizeof(float);

  int devices_count = 2;

  float *h_a, *h_b, *h_c;
  h_a = (float*)malloc(nBytes);
  h_b = (float*)malloc(nBytes);
  h_c = (float*)malloc(nBytes);
  cudaHostRegister(h_a, nBytes, 0);
  cudaHostRegister(h_b, nBytes, 0);
  cudaHostRegister(h_c, nBytes, 0);

  for (int i = 0; i < n; i++) {
    h_a[i] = i;
    h_b[i] = i + 1;
  }

  float *d_a1, *d_b1, *d_c1;
  float *d_a2, *d_b2, *d_c2;

  cudaSetDevice(0);
  printf("Allocating memory at GPU0\n");
  cudaMalloc(&d_a1, nBytes_per_gpu);
  cudaMalloc(&d_b1, nBytes_per_gpu);
  cudaMalloc(&d_c1, nBytes_per_gpu);
  cudaSetDevice(1);
  printf("Allocating memory at GPU1\n");
  cudaMalloc(&d_a2, nBytes_per_gpu);
  cudaMalloc(&d_b2, nBytes_per_gpu);
  cudaMalloc(&d_c2, nBytes_per_gpu);
  cudaSetDevice(0);

  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  const int BLOCK_SIZE = 1024;
  const int GRID_SIZE = (work_per_gpu - 1) / BLOCK_SIZE + 1;

  cudaEventRecord(start);

  printf("Copying memory to GPU0\n");
  cudaSetDevice(0);
  cudaMemcpyAsync(d_a1, &h_a[0], nBytes_per_gpu, cudaMemcpyHostToDevice);
  cudaMemcpyAsync(d_b1, &h_b[0], nBytes_per_gpu, cudaMemcpyHostToDevice);

  printf("Doing GPU0 Vector add\n");
  vectorAddGPU<<<GRID_SIZE, BLOCK_SIZE>>>(d_a1, d_b1, d_c1, n);

  cudaMemcpyAsync(&h_c[0], d_c1, nBytes_per_gpu, cudaMemcpyDeviceToHost);

  cudaSetDevice(1);
  printf("Copying memory to GPU1\n");
  cudaMemcpyAsync(d_a2, &h_a[work_per_gpu], nBytes_per_gpu,
                  cudaMemcpyHostToDevice);
  cudaMemcpyAsync(d_b2, &h_b[work_per_gpu], nBytes_per_gpu,
                  cudaMemcpyHostToDevice);

  printf("Doing GPU1 Vector add\n");
  vectorAddGPU<<<GRID_SIZE, BLOCK_SIZE>>>(d_a2, d_b2, d_c2, n);

  cudaMemcpyAsync(&h_c[work_per_gpu], d_c2, nBytes_per_gpu,
                  cudaMemcpyDeviceToHost);

  cudaDeviceSynchronize();
  cudaSetDevice(0);
  cudaDeviceSynchronize();

  cudaEventRecord(stop);
  cudaEventSynchronize(stop);
  float msecs = 0;
  cudaEventElapsedTime(&msecs, start, stop);
  printf("%d GPU(s) Elapsed Time: %f ms\n", devices_count, msecs);

  cudaFree(d_a1);
  cudaFree(d_b1);
  cudaFree(d_c1);
  cudaSetDevice(1);
  cudaFree(d_a2);
  cudaFree(d_b2);
  cudaFree(d_c2);
  cudaSetDevice(0);
  cudaHostUnregister(h_a);
  cudaHostUnregister(h_b);
  cudaHostUnregister(h_c);
  free(h_a);
  free(h_b);
  free(h_c);
}

void singleGPU(int size = 1000000) {
  int n = size;
  int nBytes = n * sizeof(float);

  float *h_a, *h_b, *h_c;

  h_a = (float*)malloc(nBytes);
  h_b = (float*)malloc(nBytes);
  h_c = (float*)malloc(nBytes);

  float *d_a, *d_b, *d_c;

  dim3 block(256);
  dim3 grid((unsigned int)ceil(n / (float)block.x));

  for (int i = 0; i < n; i++) {
    h_a[i] = rand() / (float)RAND_MAX;
    h_b[i] = rand() / (float)RAND_MAX;
    h_c[i] = 0;
  }

  printf("Allocating device memory on host..\n");

  cudaMalloc((void**)&d_a, n * sizeof(float));
  cudaMalloc((void**)&d_b, n * sizeof(float));
  cudaMalloc((void**)&d_c, n * sizeof(float));

  printf("Copying to device..\n");

  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  cudaEventRecord(start);

  cudaMemcpy(d_a, h_a, n * sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, h_b, n * sizeof(float), cudaMemcpyHostToDevice);

  printf("Doing GPU Vector add\n");

  vectorAddGPU<<<grid, block>>>(d_a, d_b, d_c, n);

  cudaEventRecord(stop);
  cudaEventSynchronize(stop);
  float msecs = 0;
  cudaEventElapsedTime(&msecs, start, stop);
  printf("1 GPU Elapsed time: %f ms.\n", msecs);

  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);
  free(h_a);
  free(h_b);
  free(h_c);
}

int main(int argc, char** argv) {
  singleGPU(atoi(argv[1]));
  std::cout << "---------------------------\n---------------------------\n";
  multiGPU(atoi(argv[1]));
  return 0;
}

	.file	"tmpxft_003789c8_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3739:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3739:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i
	.type	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i, @function
_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i:
.LFB3761:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12vectorAddGPUPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3761:
	.size	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i, .-_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i
	.globl	_Z12vectorAddGPUPfS_S_i
	.type	_Z12vectorAddGPUPfS_S_i, @function
_Z12vectorAddGPUPfS_S_i:
.LFB3762:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i
	.cfi_endproc
.LFE3762:
	.size	_Z12vectorAddGPUPfS_S_i, .-_Z12vectorAddGPUPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Allocating memory at GPU0\n"
.LC1:
	.string	"Allocating memory at GPU1\n"
.LC2:
	.string	"Copying memory to GPU0\n"
.LC3:
	.string	"Doing GPU0 Vector add\n"
.LC4:
	.string	"Copying memory to GPU1\n"
.LC5:
	.string	"Doing GPU1 Vector add\n"
.LC7:
	.string	"%d GPU(s) Elapsed Time: %f ms\n"
	.text
	.globl	_Z8multiGPUi
	.type	_Z8multiGPUi, @function
_Z8multiGPUi:
.LFB3734:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2, %ecx
	movl	%edi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leal	0(,%rdi,4), %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%r12d, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leal	-1(%rdi), %eax
	movq	%r12, %rdi
	cltd
	movl	%eax, 12(%rsp)
	idivl	%ecx
	incl	%eax
	movslq	%eax, %r14
	sall	$2, %eax
	movl	%eax, (%rsp)
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	cudaHostRegister@PLT
	xorl	%edx, %edx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	cudaHostRegister@PLT
	xorl	%edx, %edx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	cudaHostRegister@PLT
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %r15d
	jle	.L16
	cvtsi2ssl	%eax, %xmm0
	leal	1(%rax), %edx
	movss	%xmm0, 0(%rbp,%rax,4)
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	jmp	.L9
.L16:
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	(%rsp), %rax
	leaq	16(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	%rbp, %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	movq	(%rsp), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	12(%rsp), %eax
	movl	$2048, %esi
	movl	$4194305, %ecx
	salq	$10, %rcx
	movl	$1, 100(%rsp)
	cltd
	movq	%rcx, 92(%rsp)
	idivl	%esi
	xorl	%r9d, %r9d
	movq	%rcx, %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	leal	1(%rax), %r12d
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movl	88(%rsp), %esi
	movl	%r12d, 80(%rsp)
	movq	80(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	%r15d, %ecx
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i
.L11:
	movq	(%rsp), %rdx
	movq	32(%rsp), %rsi
	xorl	%r8d, %r8d
	movq	%r13, %rdi
	movl	$2, %ecx
	salq	$2, %r14
	call	cudaMemcpyAsync@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rdi
	xorl	%r8d, %r8d
	leaq	0(%rbp,%r14), %rsi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	movq	(%rsp), %rdx
	xorl	%r8d, %r8d
	leaq	(%rbx,%r14), %rsi
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$4194305, %edx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	salq	$10, %rdx
	movl	88(%rsp), %esi
	movq	%rdx, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%r15d, %ecx
	movq	40(%rsp), %rdi
	call	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i
.L12:
	movq	(%rsp), %rdx
	movq	56(%rsp), %rsi
	xorl	%r8d, %r8d
	movl	$2, %ecx
	leaq	0(%r13,%r14), %rdi
	call	cudaMemcpyAsync@PLT
	call	cudaDeviceSynchronize@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	92(%rsp), %rdi
	movl	$0x00000000, 92(%rsp)
	call	cudaEventElapsedTime@PLT
	movl	$2, %edx
	leaq	.LC7(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %edi
	call	cudaSetDevice@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	%rbp, %rdi
	call	cudaHostUnregister@PLT
	movq	%rbx, %rdi
	call	cudaHostUnregister@PLT
	movq	%r13, %rdi
	call	cudaHostUnregister@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	movq	%r13, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE3734:
	.size	_Z8multiGPUi, .-_Z8multiGPUi
	.section	.rodata.str1.1
.LC10:
	.string	"Allocating device memory on host..\n"
.LC11:
	.string	"Copying to device..\n"
.LC12:
	.string	"Doing GPU Vector add\n"
.LC13:
	.string	"1 GPU Elapsed time: %f ms.\n"
	.text
	.globl	_Z9singleGPUi
	.type	_Z9singleGPUi, @function
_Z9singleGPUi:
.LFB3735:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%edi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leal	0(,%r15,4), %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%ebp, %rbp
	movq	%r15, %rbx
	movq	%rbp, %rdi
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbp, %rdi
	movabsq	$4294967297, %rbp
	movq	%rax, %r12
	call	malloc@PLT
	cvtsi2ssl	%r15d, %xmm0
	movq	%rbp, 52(%rsp)
	mulss	.LC8(%rip), %xmm0
	movq	%rax, %r14
	call	ceilf@PLT
	movq	%rbp, 64(%rsp)
	xorl	%ebp, %ebp
	cvttss2siq	%xmm0, %rax
	movl	%eax, 60(%rsp)
.L18:
	cmpl	%ebp, %ebx
	jle	.L24
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC9(%rip), %xmm0
	movss	%xmm0, 0(%r13,%rbp,4)
	call	rand@PLT
	movl	$0x00000000, (%r14,%rbp,4)
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC9(%rip), %xmm0
	movss	%xmm0, (%r12,%rbp,4)
	incq	%rbp
	jmp	.L18
.L24:
	salq	$2, %r15
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movl	$256, 48(%rsp)
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%ebx, %ecx
	movq	8(%rsp), %rdi
	call	_Z37__device_stub__Z12vectorAddGPUPfS_S_iPfS_S_i
.L20:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	movq	%r14, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE3735:
	.size	_Z9singleGPUi, .-_Z9singleGPUi
	.section	.rodata.str1.1
.LC14:
	.string	"---------------------------\n---------------------------\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3736:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movl	%eax, %edi
	call	_Z9singleGPUi
	movl	$56, %edx
	leaq	.LC14(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %edi
	call	_Z8multiGPUi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3736:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z12vectorAddGPUPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3764:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12vectorAddGPUPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3764:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	998244352
	.align 4
.LC9:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <assert.h>
#include <hip/hip_runtime.h>


#include <stdio.h>
#include <chrono>
#include <cstdlib>
#include <iostream>

__global__ void vectorAddGPU(float* a, float* b, float* c, int N) {
  int idx = blockIdx.x * blockDim.x + threadIdx.x;

  if (idx < N) {
    c[idx] = a[idx] + b[idx];
  }
}

void multiGPU(int size = 1000000) {
  int n = size;
  int work_per_gpu = (n - 1) / 2 + 1;
  int nBytes = n * sizeof(float);
  int nBytes_per_gpu = work_per_gpu * sizeof(float);

  int devices_count = 2;

  float *h_a, *h_b, *h_c;
  h_a = (float*)malloc(nBytes);
  h_b = (float*)malloc(nBytes);
  h_c = (float*)malloc(nBytes);
  hipHostRegister(h_a, nBytes, 0);
  hipHostRegister(h_b, nBytes, 0);
  hipHostRegister(h_c, nBytes, 0);

  for (int i = 0; i < n; i++) {
    h_a[i] = i;
    h_b[i] = i + 1;
  }

  float *d_a1, *d_b1, *d_c1;
  float *d_a2, *d_b2, *d_c2;

  hipSetDevice(0);
  printf("Allocating memory at GPU0\n");
  hipMalloc(&d_a1, nBytes_per_gpu);
  hipMalloc(&d_b1, nBytes_per_gpu);
  hipMalloc(&d_c1, nBytes_per_gpu);
  hipSetDevice(1);
  printf("Allocating memory at GPU1\n");
  hipMalloc(&d_a2, nBytes_per_gpu);
  hipMalloc(&d_b2, nBytes_per_gpu);
  hipMalloc(&d_c2, nBytes_per_gpu);
  hipSetDevice(0);

  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);

  const int BLOCK_SIZE = 1024;
  const int GRID_SIZE = (work_per_gpu - 1) / BLOCK_SIZE + 1;

  hipEventRecord(start);

  printf("Copying memory to GPU0\n");
  hipSetDevice(0);
  hipMemcpyAsync(d_a1, &h_a[0], nBytes_per_gpu, hipMemcpyHostToDevice);
  hipMemcpyAsync(d_b1, &h_b[0], nBytes_per_gpu, hipMemcpyHostToDevice);

  printf("Doing GPU0 Vector add\n");
  vectorAddGPU<<<GRID_SIZE, BLOCK_SIZE>>>(d_a1, d_b1, d_c1, n);

  hipMemcpyAsync(&h_c[0], d_c1, nBytes_per_gpu, hipMemcpyDeviceToHost);

  hipSetDevice(1);
  printf("Copying memory to GPU1\n");
  hipMemcpyAsync(d_a2, &h_a[work_per_gpu], nBytes_per_gpu,
                  hipMemcpyHostToDevice);
  hipMemcpyAsync(d_b2, &h_b[work_per_gpu], nBytes_per_gpu,
                  hipMemcpyHostToDevice);

  printf("Doing GPU1 Vector add\n");
  vectorAddGPU<<<GRID_SIZE, BLOCK_SIZE>>>(d_a2, d_b2, d_c2, n);

  hipMemcpyAsync(&h_c[work_per_gpu], d_c2, nBytes_per_gpu,
                  hipMemcpyDeviceToHost);

  hipDeviceSynchronize();
  hipSetDevice(0);
  hipDeviceSynchronize();

  hipEventRecord(stop);
  hipEventSynchronize(stop);
  float msecs = 0;
  hipEventElapsedTime(&msecs, start, stop);
  printf("%d GPU(s) Elapsed Time: %f ms\n", devices_count, msecs);

  hipFree(d_a1);
  hipFree(d_b1);
  hipFree(d_c1);
  hipSetDevice(1);
  hipFree(d_a2);
  hipFree(d_b2);
  hipFree(d_c2);
  hipSetDevice(0);
  hipHostUnregister(h_a);
  hipHostUnregister(h_b);
  hipHostUnregister(h_c);
  free(h_a);
  free(h_b);
  free(h_c);
}

void singleGPU(int size = 1000000) {
  int n = size;
  int nBytes = n * sizeof(float);

  float *h_a, *h_b, *h_c;

  h_a = (float*)malloc(nBytes);
  h_b = (float*)malloc(nBytes);
  h_c = (float*)malloc(nBytes);

  float *d_a, *d_b, *d_c;

  dim3 block(256);
  dim3 grid((unsigned int)ceil(n / (float)block.x));

  for (int i = 0; i < n; i++) {
    h_a[i] = rand() / (float)RAND_MAX;
    h_b[i] = rand() / (float)RAND_MAX;
    h_c[i] = 0;
  }

  printf("Allocating device memory on host..\n");

  hipMalloc((void**)&d_a, n * sizeof(float));
  hipMalloc((void**)&d_b, n * sizeof(float));
  hipMalloc((void**)&d_c, n * sizeof(float));

  printf("Copying to device..\n");

  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);

  hipEventRecord(start);

  hipMemcpy(d_a, h_a, n * sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(d_b, h_b, n * sizeof(float), hipMemcpyHostToDevice);

  printf("Doing GPU Vector add\n");

  vectorAddGPU<<<grid, block>>>(d_a, d_b, d_c, n);

  hipEventRecord(stop);
  hipEventSynchronize(stop);
  float msecs = 0;
  hipEventElapsedTime(&msecs, start, stop);
  printf("1 GPU Elapsed time: %f ms.\n", msecs);

  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);
  free(h_a);
  free(h_b);
  free(h_c);
}

int main(int argc, char** argv) {
  singleGPU(atoi(argv[1]));
  std::cout << "---------------------------\n---------------------------\n";
  multiGPU(atoi(argv[1]));
  return 0;
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__vectorAddGPUPfS_S_i # -- Begin function _Z27__device_stub__vectorAddGPUPfS_S_i
	.type	_Z27__device_stub__vectorAddGPUPfS_S_i,@function
_Z27__device_stub__vectorAddGPUPfS_S_i: # @_Z27__device_stub__vectorAddGPUPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12vectorAddGPUPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__vectorAddGPUPfS_S_i, .Lfunc_end0-_Z27__device_stub__vectorAddGPUPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8multiGPUi                    # -- Begin function _Z8multiGPUi
	.type	_Z8multiGPUi,@function
_Z8multiGPUi:                           # @_Z8multiGPUi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %r15d
	leal	-1(%r15), %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
                                        # kill: def $eax killed $eax killed $rax def $rax
	shrl	$31, %eax
	addl	%r15d, %eax
	decl	%eax
	sarl	%eax
	leal	(,%r15,4), %ecx
	leal	4(,%rax,4), %edx
	movl	%edx, 76(%rsp)                  # 4-byte Spill
	movl	%eax, %ebp
	incl	%ebp
	movslq	%ecx, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostRegister
	movq	%r14, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostRegister
	movq	%r12, 96(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostRegister
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	testl	%r15d, %r15d
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	8(%rsp), %eax                   # 4-byte Reload
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	leaq	1(%rcx), %rdx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%edx, %xmm1
	movss	%xmm0, (%rbx,%rcx,4)
	movss	%xmm1, (%r14,%rcx,4)
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	movslq	%ebp, %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movabsq	$4294968320, %r15               # imm = 0x100000400
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	$.Lstr, %edi
	callq	puts@PLT
	movslq	76(%rsp), %r13                  # 4-byte Folded Reload
	leaq	64(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movl	$1, %edi
	callq	hipSetDevice
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	104(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	80(%rsp), %rax                  # 8-byte Reload
	leal	2047(%rax), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	sarl	$11, %r12d
	incl	%r12d
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	leaq	(%r12,%r15), %rbp
	addq	$-1024, %rbp                    # imm = 0xFC00
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.4:
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z27__device_stub__vectorAddGPUPfS_S_i
.LBB1_5:
	movq	48(%rsp), %rsi
	movq	96(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$1, %edi
	callq	hipSetDevice
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	40(%rsp), %rdi
	movq	88(%rsp), %r12                  # 8-byte Reload
	leaq	(%rbx,%r12,4), %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movq	32(%rsp), %rdi
	leaq	(%r14,%r12,4), %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	%rbp, %rdi
	movl	$1, %esi
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	8(%rsp), %rcx                   # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z27__device_stub__vectorAddGPUPfS_S_i
.LBB1_7:
	leaq	(%r15,%r12,4), %rdi
	movq	24(%rsp), %rsi
	movq	%r13, %rdx
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	callq	hipDeviceSynchronize
	xorl	%edi, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	116(%rsp), %r12
	movl	$0, (%r12)
	movq	104(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.6, %edi
	movl	$2, %esi
	movb	$1, %al
	callq	printf
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movl	$1, %edi
	callq	hipSetDevice
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	%rbx, %rdi
	callq	hipHostUnregister
	movq	%r14, %rdi
	callq	hipHostUnregister
	movq	%r15, %rdi
	callq	hipHostUnregister
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8multiGPUi, .Lfunc_end1-_Z8multiGPUi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9singleGPUi
.LCPI2_0:
	.long	0x3b800000                      # float 0.00390625
.LCPI2_1:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z9singleGPUi
	.type	_Z9singleGPUi,@function
_Z9singleGPUi:                          # @_Z9singleGPUi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, 4(%rsp)                   # 4-byte Spill
	movslq	%edi, %rbp
	leaq	(,%rbp,4), %r12
	movq	%rbp, %r14
	shlq	$34, %r14
	sarq	$32, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	malloc
	cvtsi2ss	%ebp, %xmm0
	movq	%rax, %r14
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %r13d
	btsq	$32, %r13
	testl	%ebp, %ebp
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movl	4(%rsp), %ebp                   # 4-byte Reload
	xorl	%r15d, %r15d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %rbp
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	addq	$256, %rdx                      # imm = 0x100
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	4(%rsp), %ecx                   # 4-byte Reload
	callq	_Z27__device_stub__vectorAddGPUPfS_S_i
.LBB2_5:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	52(%rsp), %r15
	movl	$0, (%r15)
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9singleGPUi, .Lfunc_end2-_Z9singleGPUi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %edi
	callq	_Z9singleGPUi
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$56, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %edi
	callq	_Z8multiGPUi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12vectorAddGPUPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12vectorAddGPUPfS_S_i,@object # @_Z12vectorAddGPUPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z12vectorAddGPUPfS_S_i
	.p2align	3, 0x0
_Z12vectorAddGPUPfS_S_i:
	.quad	_Z27__device_stub__vectorAddGPUPfS_S_i
	.size	_Z12vectorAddGPUPfS_S_i, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"%d GPU(s) Elapsed Time: %f ms\n"
	.size	.L.str.6, 31

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"1 GPU Elapsed time: %f ms.\n"
	.size	.L.str.10, 28

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"---------------------------\n---------------------------\n"
	.size	.L.str.11, 57

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12vectorAddGPUPfS_S_i"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Allocating memory at GPU0"
	.size	.Lstr, 26

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Allocating memory at GPU1"
	.size	.Lstr.1, 26

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Copying memory to GPU0"
	.size	.Lstr.2, 23

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Doing GPU0 Vector add"
	.size	.Lstr.3, 22

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Copying memory to GPU1"
	.size	.Lstr.4, 23

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Doing GPU1 Vector add"
	.size	.Lstr.5, 22

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Allocating device memory on host.."
	.size	.Lstr.6, 35

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Copying to device.."
	.size	.Lstr.7, 20

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"Doing GPU Vector add"
	.size	.Lstr.8, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__vectorAddGPUPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12vectorAddGPUPfS_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12vectorAddGPUPfS_S_i ; -- Begin function _Z12vectorAddGPUPfS_S_i
	.globl	_Z12vectorAddGPUPfS_S_i
	.p2align	8
	.type	_Z12vectorAddGPUPfS_S_i,@function
_Z12vectorAddGPUPfS_S_i:                ; @_Z12vectorAddGPUPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12vectorAddGPUPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12vectorAddGPUPfS_S_i, .Lfunc_end0-_Z12vectorAddGPUPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12vectorAddGPUPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12vectorAddGPUPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
