// To compile - gcc -o 3dFDTD FDTD3D.c -lm

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>
#include <cuda_runtime.h>

#define IMAX 100
#define JMAX 100
#define KMAX 100

// This was taken from stackoverflow.com/questions/14038589/what-is-the-canonical-way-to-check-for-errors-using-the-cuda-runtime-api
#define CHECK_ERROR(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line) {
    if (code != cudaSuccess) {
        printf("GPU error: %s %s %d\n", cudaGetErrorString(code), file, line);
        exit(code);
    }
}

/**
 *  First half of the total loop circuit
 */
extern __global__ void loop1_GPU(double (*Ex)[IMAX][JMAX], double (*Ey)[IMAX][JMAX], double (*Ez)[IMAX][JMAX], double (*Hy)[IMAX][JMAX], double (*Hz)[IMAX][JMAX], double Cb, double Ca, int n, int no, int nhalf) {
  int i, j;
  int k = blockIdx.x * 32 + threadIdx.x;
  
  if (k < KMAX && k > 0) {
    for (j=1; j<JMAX; j++) {
      for (i=0; i<IMAX; i++) {
	Ex[i][j][k] = Ca*Ex[i][j][k] + Cb*((Hz[i][j][k] - Hy[i][j-1][k]) + (Hy[i][j][k-1] - Hy[i][j][k]));
      }
    }
    for (j=0; j<JMAX; j++) {
      for (i=1; i<IMAX; i++) {
	Ey[i][j][k] = Ca*Ey[i][j][k] + Cb*((Hz[i-1][j][k] - Hy[i][j][k]) + (Hy[i][j][k] - Hy[i][j][k-1]));
      }
    }
  } // end if k
  if (k < KMAX) {
    for (j=1; j<JMAX; j++) {
      for (i=1; i<IMAX; i++) {
	Ez[i][j][k] = Ca*Ez[i][j][k] + Cb*((Hz[i][j][k] - Hy[i-1][j][k]) + (Hy[i][j-1][k] - Hy[i][j][k]));
      }
    }
  } // end if k
  if (k==(KMAX/2)) {
    Ez[IMAX/2][JMAX/2][k] = exp(-(pow(((n-no)/(double)nhalf),2.0)));
  }
}

/**
 *  Second half of the total loop circuit.
 */
extern __global__ void loop2_GPU(double (*Ez)[IMAX][JMAX], double (*Hx)[IMAX][JMAX], double (*Hy)[IMAX][JMAX], double (*Hz)[IMAX][JMAX], double Da, double Db) {
    int i, j;
    int k = blockIdx.x * 32 + threadIdx.x;

    if (k < KMAX) {
        for (j = 0; j < JMAX-1; j++) {
            for (i = 1; i < IMAX-1; i++) {
                Hx[i][j][k] = Da*Hx[i][j][k] + Db*((Ez[i][j][k] - Ez[i][j+1][k]) + (Ez[i][j][k+1]-Ez[i][j][k]));
            }
        }
       for (j = 1; j < JMAX-1; j++) {
           for (i = 0; i < IMAX-1; i++) {
               Hy[i][j][k] = Da*Hy[i][j][k] + Db*((Ez[i+1][j][k] - Ez[i][j][k]) + (Ez[i][j][k]-Ez[i][j][k+1]));
           }
       }
    } // end if k
    if (k < KMAX && k > 0) {
       for (j = 0; j < JMAX-1; j++) {
           for (i = 0; i < IMAX-1; i++) {
               Hz[i][j][k] = Da*Hz[i][j][k] + Db*((Ez[i][j][k] - Ez[i+1][j][k]) + (Ez[i][j+1][k]-Ez[i][j][k]));
           }
       }
    } // end if k
}

int main() {
    int nmax = 400, nhalf = 20, no = nhalf*3;
    int n;
    double c = 2.99792458e8, pi = 3.141592654, sigma = 0, mu = 4.0 * pi * 1.0e-7, eps = 8.85418782e-12;
    double delta = 1e-3;
    double dt = delta/(c*1.41421356237);

    int counter = 0;

    double *Ex, *Ey, *Ez, *Hy, *Hx, *Hz;

    cudaEvent_t start_event, stop_event;
    float elapsed_time;

    Ex = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Ey = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Ez = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Hx = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Hy = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Hz = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));

    double (*g_Ex)[IMAX][JMAX];
    double (*g_Ey)[IMAX][JMAX];
    double (*g_Ez)[IMAX][JMAX];
    double (*g_Hx)[IMAX][JMAX];
    double (*g_Hy)[IMAX][JMAX];
    double (*g_Hz)[IMAX][JMAX];
    CHECK_ERROR(cudaMalloc((void**)&g_Ex, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(cudaMalloc((void**)&g_Ey, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(cudaMalloc((void**)&g_Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(cudaMalloc((void**)&g_Hx, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(cudaMalloc((void**)&g_Hy, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(cudaMalloc((void**)&g_Hz, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));

    double Ca,Cb,Da,Db;

    Ca = (1-((sigma*dt)/(2*eps)))/(1+((sigma*dt)/(2*eps)));
    Cb = (dt/(eps*delta))/(1+((sigma*dt)/(2*eps)));
    Da = (1-((sigma*dt)/(2*mu)))/(1+((sigma*dt)/(2*mu)));
    Db = (dt/(mu*delta))/(1+((sigma*dt)/(2*mu)));

    CHECK_ERROR(cudaEventCreate(&start_event));
    CHECK_ERROR(cudaEventCreate(&stop_event));
    CHECK_ERROR(cudaEventRecord(start_event, 0));

    CHECK_ERROR(cudaMemcpy(g_Ex, Ex, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyHostToDevice));
    CHECK_ERROR(cudaMemcpy(g_Ey, Ey, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyHostToDevice));
    CHECK_ERROR(cudaMemcpy(g_Ez, Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyHostToDevice));
    CHECK_ERROR(cudaMemcpy(g_Hx, Hx, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyHostToDevice));
    CHECK_ERROR(cudaMemcpy(g_Hy, Hy, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyHostToDevice));
    CHECK_ERROR(cudaMemcpy(g_Hz, Hz, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyHostToDevice));

    dim3 threadsPerBlock(32);
    dim3 numBlocks((KMAX + 31) / 32);

    dim3 singleThread(1);
    dim3 singleBlock(1);

    for (n = 0; n < nmax; n++) {
      // loop 1
      loop1_GPU<<<numBlocks, threadsPerBlock>>>(g_Ex, g_Ey, g_Ez, g_Hy, g_Hz, Cb, Ca, n, no, nhalf);
      CHECK_ERROR(cudaPeekAtLastError());
      CHECK_ERROR(cudaDeviceSynchronize());
      // error checking  
      //CHECK_ERROR(cudaMemcpy(Ez, g_Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
      //CHECK_ERROR(cudaPeekAtLastError());
      //printf("%d EZ: %.12f\t%.12f\n", counter++, /*Ez[(JMAX*KMAX)+(KMAX)], Ez[(JMAX*KMAX)+(KMAX)+1]); */ Ez[((IMAX/2)*JMAX*KMAX)+((JMAX/2)*KMAX)+(KMAX/2)], 0.0);
      // loop 2
      loop2_GPU<<<numBlocks, threadsPerBlock>>>(g_Ez, g_Hx, g_Hy, g_Hz, Da, Db);
      CHECK_ERROR(cudaPeekAtLastError());
      CHECK_ERROR(cudaDeviceSynchronize());
    }

    CHECK_ERROR(cudaMemcpy(Ex, g_Ex, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
    CHECK_ERROR(cudaMemcpy(Ey, g_Ey, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
    CHECK_ERROR(cudaMemcpy(Ez, g_Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
    CHECK_ERROR(cudaMemcpy(Hx, g_Hx, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
    CHECK_ERROR(cudaMemcpy(Hy, g_Hy, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
    CHECK_ERROR(cudaMemcpy(Hz, g_Hz, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));

    CHECK_ERROR(cudaFree(g_Ex));
    CHECK_ERROR(cudaFree(g_Ey));
    CHECK_ERROR(cudaFree(g_Ez));
    CHECK_ERROR(cudaFree(g_Hx));
    CHECK_ERROR(cudaFree(g_Hy));
    CHECK_ERROR(cudaFree(g_Hz));

    cudaEventRecord(stop_event, 0);
    cudaEventSynchronize(stop_event);
    cudaEventElapsedTime(&elapsed_time, start_event, stop_event);

    printf("GPU Time: %.2f\n", elapsed_time);

    FILE * fPointer;
    fPointer = fopen("parlleloutput.dat", "w");
    char buf[18];
    int x, y, z;
    for (x=1; x<IMAX; x++) {
      for (y=1; y<JMAX; y++) {
	for (z=0; z<KMAX; z++) {
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Ex[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Ey[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Ez[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Hx[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Hy[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Hz[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
          memset(buf, 0, 18);
	  sprintf(buf, "                 \n");
	  fputs(buf, fPointer);
	}
      }
    }
    fclose(fPointer);

    return 0;
}

	.file	"tmpxft_0033b34b_00000000-6_cudacontig.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPU error: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKci,"axG",@progbits,_Z9gpuAssert9cudaErrorPKci,comdat
	.weak	_Z9gpuAssert9cudaErrorPKci
	.type	_Z9gpuAssert9cudaErrorPKci, @function
_Z9gpuAssert9cudaErrorPKci:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movq	%rbp, %rcx
	movl	$2, %edi
	movq	%rax, %rdx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9gpuAssert9cudaErrorPKci, .-_Z9gpuAssert9cudaErrorPKci
	.text
	.globl	_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii
	.type	_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii, @function
_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movl	%r9d, 4(%rsp)
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L8:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii, .-_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii
	.globl	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.type	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, @function
_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii
	.cfi_endproc
.LFE2054:
	.size	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, .-_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.globl	_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd
	.type	_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd, @function
_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L13:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd, .-_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd
	.globl	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.type	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd, @function
_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd
	.cfi_endproc
.LFE2056:
	.size	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd, .-_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/hoggetaylor/parallel_final/master/cuda/cudacontig.cu"
.LC5:
	.string	"GPU Time: %.2f\n"
.LC6:
	.string	"w"
.LC7:
	.string	"parlleloutput.dat"
.LC8:
	.string	"%e\n"
.LC9:
	.string	"                 \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8, %esi
	movl	$1030301, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	.LC1(%rip), %rbx
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	call	calloc@PLT
	movl	$8, %esi
	movl	$1030301, %edi
	movq	%rax, %rbp
	call	calloc@PLT
	movl	$8, %esi
	movl	$1030301, %edi
	movq	%rax, 16(%rsp)
	call	calloc@PLT
	movl	$8, %esi
	movl	$1030301, %edi
	movq	%rax, 24(%rsp)
	call	calloc@PLT
	movl	$8, %esi
	movl	$1030301, %edi
	movq	%rax, %r12
	call	calloc@PLT
	movl	$8, %esi
	movl	$1030301, %edi
	movq	%rax, %r13
	call	calloc@PLT
	leaq	72(%rsp), %rdi
	movl	$8242408, %esi
	movq	%rax, %r14
	call	cudaMalloc@PLT
	movl	$108, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	80(%rsp), %rdi
	movl	$8242408, %esi
	call	cudaMalloc@PLT
	movl	$109, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	88(%rsp), %rdi
	movl	$8242408, %esi
	call	cudaMalloc@PLT
	movl	$110, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	96(%rsp), %rdi
	movl	$8242408, %esi
	call	cudaMalloc@PLT
	movl	$111, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	104(%rsp), %rdi
	movl	$8242408, %esi
	call	cudaMalloc@PLT
	movl	$112, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	112(%rsp), %rdi
	movl	$8242408, %esi
	call	cudaMalloc@PLT
	movl	$113, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$122, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$123, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$124, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$126, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	16(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$127, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	24(%rsp), %rsi
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$128, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	96(%rsp), %rdi
	movq	%r12, %rsi
	xorl	%r15d, %r15d
	movl	$1, %ecx
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$129, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$130, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	112(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$131, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movl	$134217729, %eax
	movl	$1, 132(%rsp)
	movl	$1, 144(%rsp)
	salq	$5, %rax
	movq	%rax, 124(%rsp)
	subq	$28, %rax
	movq	%rax, 136(%rsp)
.L21:
	movl	132(%rsp), %ecx
	movq	124(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	136(%rsp), %rdi
	movl	144(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	$20
	.cfi_def_cfa_offset 248
	movsd	.LC2(%rip), %xmm1
	movl	%r15d, %r9d
	pushq	$60
	.cfi_def_cfa_offset 256
	movsd	.LC3(%rip), %xmm0
	movq	128(%rsp), %r8
	movq	120(%rsp), %rcx
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z55__device_stub__Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiiiPA100_A100_dS1_S1_S1_S1_ddiii
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L19:
	call	cudaPeekAtLastError@PLT
	movl	$142, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	call	cudaDeviceSynchronize@PLT
	movl	$143, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	124(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	132(%rsp), %ecx
	movq	136(%rsp), %rdi
	movl	144(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movsd	.LC4(%rip), %xmm1
	movsd	.LC2(%rip), %xmm0
	movq	112(%rsp), %rcx
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z49__device_stub__Z9loop2_GPUPA100_A100_dS1_S1_S1_ddPA100_A100_dS1_S1_S1_dd
.L20:
	call	cudaPeekAtLastError@PLT
	movl	$150, %edx
	leaq	.LC1(%rip), %rsi
	incl	%r15d
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	call	cudaDeviceSynchronize@PLT
	movl	$151, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	cmpl	$400, %r15d
	jne	.L21
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movl	$8242408, %edx
	movq	%rbp, %rdi
	movl	$80000, %r15d
	call	cudaMemcpy@PLT
	movl	$154, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	80(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$155, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	88(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$156, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$157, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$158, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	112(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdi
	movl	$8242408, %edx
	call	cudaMemcpy@PLT
	movl	$159, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$161, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movl	$162, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	$163, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	$164, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movl	$165, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movl	$166, %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKci
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	leaq	52(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	leaq	.LC7(%rip), %rdi
	call	fopen@PLT
	movq	%rax, 8(%rsp)
.L22:
	xorl	%r8d, %r8d
.L26:
	imulq	$800, %r8, %rax
	movl	$100, %r11d
	leaq	800(%r15,%rax), %rbx
.L23:
	movl	$18, %ecx
	movsd	0(%rbp,%rbx), %xmm0
	movl	$18, %edx
	leaq	150(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%rax, %rdi
	xorl	%eax, %eax
	movl	$2, %esi
	rep stosb
	movq	(%rsp), %rdi
	movb	$1, %al
	movl	%r11d, 44(%rsp)
	leaq	.LC8(%rip), %rcx
	movq	%r8, 32(%rsp)
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	$18, %ecx
	movl	$18, %edx
	movl	$2, %esi
	rep stosb
	movq	16(%rsp), %rcx
	movq	(%rsp), %rdi
	movb	$1, %al
	movsd	(%rcx,%rbx), %xmm0
	leaq	.LC8(%rip), %rcx
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	$18, %ecx
	movl	$18, %edx
	movl	$2, %esi
	rep stosb
	movq	24(%rsp), %rcx
	movq	(%rsp), %rdi
	movb	$1, %al
	movsd	(%rcx,%rbx), %xmm0
	leaq	.LC8(%rip), %rcx
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	$18, %ecx
	movsd	(%r12,%rbx), %xmm0
	movl	$18, %edx
	movl	$2, %esi
	rep stosb
	movq	(%rsp), %rdi
	leaq	.LC8(%rip), %rcx
	movb	$1, %al
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	$18, %ecx
	movsd	0(%r13,%rbx), %xmm0
	movl	$18, %edx
	movl	$2, %esi
	rep stosb
	movq	(%rsp), %rdi
	leaq	.LC8(%rip), %rcx
	movb	$1, %al
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	$18, %ecx
	movsd	(%r14,%rbx), %xmm0
	movl	$18, %edx
	movl	$2, %esi
	addq	$8, %rbx
	rep stosb
	movq	(%rsp), %rdi
	leaq	.LC8(%rip), %rcx
	movb	$1, %al
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	$18, %ecx
	movl	$18, %edx
	movl	$2, %esi
	rep stosb
	movq	(%rsp), %rdi
	leaq	.LC9(%rip), %rcx
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	fputs@PLT
	movl	44(%rsp), %r11d
	movq	32(%rsp), %r8
	decl	%r11d
	jne	.L23
	incq	%r8
	cmpq	$99, %r8
	jne	.L26
	addq	$80000, %r15
	cmpq	$8000000, %r15
	jne	.L22
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd"
.LC11:
	.string	"_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1072693248
	.align 8
.LC3:
	.long	-1981208395
	.long	1081124407
	.align 8
.LC4:
	.long	-1065780835
	.long	1063174279
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// To compile - gcc -o 3dFDTD FDTD3D.c -lm

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

#define IMAX 100
#define JMAX 100
#define KMAX 100

// This was taken from stackoverflow.com/questions/14038589/what-is-the-canonical-way-to-check-for-errors-using-the-cuda-runtime-api
#define CHECK_ERROR(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line) {
    if (code != hipSuccess) {
        printf("GPU error: %s %s %d\n", hipGetErrorString(code), file, line);
        exit(code);
    }
}

/**
 *  First half of the total loop circuit
 */
extern __global__ void loop1_GPU(double (*Ex)[IMAX][JMAX], double (*Ey)[IMAX][JMAX], double (*Ez)[IMAX][JMAX], double (*Hy)[IMAX][JMAX], double (*Hz)[IMAX][JMAX], double Cb, double Ca, int n, int no, int nhalf) {
  int i, j;
  int k = blockIdx.x * 32 + threadIdx.x;
  
  if (k < KMAX && k > 0) {
    for (j=1; j<JMAX; j++) {
      for (i=0; i<IMAX; i++) {
	Ex[i][j][k] = Ca*Ex[i][j][k] + Cb*((Hz[i][j][k] - Hy[i][j-1][k]) + (Hy[i][j][k-1] - Hy[i][j][k]));
      }
    }
    for (j=0; j<JMAX; j++) {
      for (i=1; i<IMAX; i++) {
	Ey[i][j][k] = Ca*Ey[i][j][k] + Cb*((Hz[i-1][j][k] - Hy[i][j][k]) + (Hy[i][j][k] - Hy[i][j][k-1]));
      }
    }
  } // end if k
  if (k < KMAX) {
    for (j=1; j<JMAX; j++) {
      for (i=1; i<IMAX; i++) {
	Ez[i][j][k] = Ca*Ez[i][j][k] + Cb*((Hz[i][j][k] - Hy[i-1][j][k]) + (Hy[i][j-1][k] - Hy[i][j][k]));
      }
    }
  } // end if k
  if (k==(KMAX/2)) {
    Ez[IMAX/2][JMAX/2][k] = exp(-(pow(((n-no)/(double)nhalf),2.0)));
  }
}

/**
 *  Second half of the total loop circuit.
 */
extern __global__ void loop2_GPU(double (*Ez)[IMAX][JMAX], double (*Hx)[IMAX][JMAX], double (*Hy)[IMAX][JMAX], double (*Hz)[IMAX][JMAX], double Da, double Db) {
    int i, j;
    int k = blockIdx.x * 32 + threadIdx.x;

    if (k < KMAX) {
        for (j = 0; j < JMAX-1; j++) {
            for (i = 1; i < IMAX-1; i++) {
                Hx[i][j][k] = Da*Hx[i][j][k] + Db*((Ez[i][j][k] - Ez[i][j+1][k]) + (Ez[i][j][k+1]-Ez[i][j][k]));
            }
        }
       for (j = 1; j < JMAX-1; j++) {
           for (i = 0; i < IMAX-1; i++) {
               Hy[i][j][k] = Da*Hy[i][j][k] + Db*((Ez[i+1][j][k] - Ez[i][j][k]) + (Ez[i][j][k]-Ez[i][j][k+1]));
           }
       }
    } // end if k
    if (k < KMAX && k > 0) {
       for (j = 0; j < JMAX-1; j++) {
           for (i = 0; i < IMAX-1; i++) {
               Hz[i][j][k] = Da*Hz[i][j][k] + Db*((Ez[i][j][k] - Ez[i+1][j][k]) + (Ez[i][j+1][k]-Ez[i][j][k]));
           }
       }
    } // end if k
}

int main() {
    int nmax = 400, nhalf = 20, no = nhalf*3;
    int n;
    double c = 2.99792458e8, pi = 3.141592654, sigma = 0, mu = 4.0 * pi * 1.0e-7, eps = 8.85418782e-12;
    double delta = 1e-3;
    double dt = delta/(c*1.41421356237);

    int counter = 0;

    double *Ex, *Ey, *Ez, *Hy, *Hx, *Hz;

    hipEvent_t start_event, stop_event;
    float elapsed_time;

    Ex = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Ey = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Ez = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Hx = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Hy = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));
    Hz = (double *)calloc((IMAX+1) * (JMAX+1) * (KMAX+1), sizeof(double));

    double (*g_Ex)[IMAX][JMAX];
    double (*g_Ey)[IMAX][JMAX];
    double (*g_Ez)[IMAX][JMAX];
    double (*g_Hx)[IMAX][JMAX];
    double (*g_Hy)[IMAX][JMAX];
    double (*g_Hz)[IMAX][JMAX];
    CHECK_ERROR(hipMalloc((void**)&g_Ex, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(hipMalloc((void**)&g_Ey, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(hipMalloc((void**)&g_Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(hipMalloc((void**)&g_Hx, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(hipMalloc((void**)&g_Hy, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));
    CHECK_ERROR(hipMalloc((void**)&g_Hz, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double)));

    double Ca,Cb,Da,Db;

    Ca = (1-((sigma*dt)/(2*eps)))/(1+((sigma*dt)/(2*eps)));
    Cb = (dt/(eps*delta))/(1+((sigma*dt)/(2*eps)));
    Da = (1-((sigma*dt)/(2*mu)))/(1+((sigma*dt)/(2*mu)));
    Db = (dt/(mu*delta))/(1+((sigma*dt)/(2*mu)));

    CHECK_ERROR(hipEventCreate(&start_event));
    CHECK_ERROR(hipEventCreate(&stop_event));
    CHECK_ERROR(hipEventRecord(start_event, 0));

    CHECK_ERROR(hipMemcpy(g_Ex, Ex, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyHostToDevice));
    CHECK_ERROR(hipMemcpy(g_Ey, Ey, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyHostToDevice));
    CHECK_ERROR(hipMemcpy(g_Ez, Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyHostToDevice));
    CHECK_ERROR(hipMemcpy(g_Hx, Hx, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyHostToDevice));
    CHECK_ERROR(hipMemcpy(g_Hy, Hy, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyHostToDevice));
    CHECK_ERROR(hipMemcpy(g_Hz, Hz, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyHostToDevice));

    dim3 threadsPerBlock(32);
    dim3 numBlocks((KMAX + 31) / 32);

    dim3 singleThread(1);
    dim3 singleBlock(1);

    for (n = 0; n < nmax; n++) {
      // loop 1
      loop1_GPU<<<numBlocks, threadsPerBlock>>>(g_Ex, g_Ey, g_Ez, g_Hy, g_Hz, Cb, Ca, n, no, nhalf);
      CHECK_ERROR(hipPeekAtLastError());
      CHECK_ERROR(hipDeviceSynchronize());
      // error checking  
      //CHECK_ERROR(cudaMemcpy(Ez, g_Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), cudaMemcpyDeviceToHost));
      //CHECK_ERROR(cudaPeekAtLastError());
      //printf("%d EZ: %.12f\t%.12f\n", counter++, /*Ez[(JMAX*KMAX)+(KMAX)], Ez[(JMAX*KMAX)+(KMAX)+1]); */ Ez[((IMAX/2)*JMAX*KMAX)+((JMAX/2)*KMAX)+(KMAX/2)], 0.0);
      // loop 2
      loop2_GPU<<<numBlocks, threadsPerBlock>>>(g_Ez, g_Hx, g_Hy, g_Hz, Da, Db);
      CHECK_ERROR(hipPeekAtLastError());
      CHECK_ERROR(hipDeviceSynchronize());
    }

    CHECK_ERROR(hipMemcpy(Ex, g_Ex, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyDeviceToHost));
    CHECK_ERROR(hipMemcpy(Ey, g_Ey, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyDeviceToHost));
    CHECK_ERROR(hipMemcpy(Ez, g_Ez, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyDeviceToHost));
    CHECK_ERROR(hipMemcpy(Hx, g_Hx, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyDeviceToHost));
    CHECK_ERROR(hipMemcpy(Hy, g_Hy, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyDeviceToHost));
    CHECK_ERROR(hipMemcpy(Hz, g_Hz, (IMAX+1) * (JMAX+1) * (KMAX+1) * sizeof(double), hipMemcpyDeviceToHost));

    CHECK_ERROR(hipFree(g_Ex));
    CHECK_ERROR(hipFree(g_Ey));
    CHECK_ERROR(hipFree(g_Ez));
    CHECK_ERROR(hipFree(g_Hx));
    CHECK_ERROR(hipFree(g_Hy));
    CHECK_ERROR(hipFree(g_Hz));

    hipEventRecord(stop_event, 0);
    hipEventSynchronize(stop_event);
    hipEventElapsedTime(&elapsed_time, start_event, stop_event);

    printf("GPU Time: %.2f\n", elapsed_time);

    FILE * fPointer;
    fPointer = fopen("parlleloutput.dat", "w");
    char buf[18];
    int x, y, z;
    for (x=1; x<IMAX; x++) {
      for (y=1; y<JMAX; y++) {
	for (z=0; z<KMAX; z++) {
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Ex[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Ey[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Ez[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Hx[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Hy[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
	  memset(buf, 0, 18);
	  sprintf(buf, "%e\n", Hz[(x*JMAX*KMAX) + (y*KMAX) + z]);
	  fputs(buf, fPointer);
          memset(buf, 0, 18);
	  sprintf(buf, "                 \n");
	  fputs(buf, fPointer);
	}
      }
    }
    fclose(fPointer);

    return 0;
}

	.text
	.file	"cudacontig.hip"
	.globl	_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii # -- Begin function _Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.type	_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii,@function
_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii: # @_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	24(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	4(%rsp), %r11
	movl	%r9d, (%r11)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r10, 48(%rbx)
	movq	%r11, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, .Lfunc_end0-_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd # -- Begin function _Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd
	.type	_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd,@function
_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd: # @_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	16(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd, .Lfunc_end1-_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x4070a63789e928b5              # double 266.38855925634135
.LCPI2_1:
	.quad	0x3ff0000000000000              # double 1
.LCPI2_2:
	.quad	0x3f5ec087c079799d              # double 0.0018769574834532684
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_3:
	.zero	16
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$1030301, %edi                  # imm = 0xFB89D
	movl	$8, %esi
	callq	calloc
	movq	%rax, %r12
	movl	$1030301, %edi                  # imm = 0xFB89D
	movl	$8, %esi
	callq	calloc
	movq	%rax, %r13
	movl	$1030301, %edi                  # imm = 0xFB89D
	movl	$8, %esi
	callq	calloc
	movq	%rax, %rbp
	movl	$1030301, %edi                  # imm = 0xFB89D
	movl	$8, %esi
	callq	calloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	$1030301, %edi                  # imm = 0xFB89D
	movl	$8, %esi
	callq	calloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$1030301, %edi                  # imm = 0xFB89D
	movl	$8, %esi
	callq	calloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	leaq	96(%rsp), %rdi
	movl	$8242408, %esi                  # imm = 0x7DC4E8
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKci.exit
	leaq	88(%rsp), %rdi
	movl	$8242408, %esi                  # imm = 0x7DC4E8
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKci.exit106
	leaq	72(%rsp), %rdi
	movl	$8242408, %esi                  # imm = 0x7DC4E8
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKci.exit108
	leaq	80(%rsp), %rdi
	movl	$8242408, %esi                  # imm = 0x7DC4E8
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKci.exit110
	leaq	64(%rsp), %rdi
	movl	$8242408, %esi                  # imm = 0x7DC4E8
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.11:                               # %_Z9gpuAssert10hipError_tPKci.exit112
	leaq	56(%rsp), %rdi
	movl	$8242408, %esi                  # imm = 0x7DC4E8
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.13:                               # %_Z9gpuAssert10hipError_tPKci.exit114
	leaq	144(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKci.exit116
	leaq	104(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKci.exit118
	movq	144(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKci.exit120
	movq	96(%rsp), %rdi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.21:                               # %_Z9gpuAssert10hipError_tPKci.exit122
	movq	88(%rsp), %rdi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.23:                               # %_Z9gpuAssert10hipError_tPKci.exit124
	movq	72(%rsp), %rdi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.25:                               # %_Z9gpuAssert10hipError_tPKci.exit126
	movq	80(%rsp), %rdi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.27:                               # %_Z9gpuAssert10hipError_tPKci.exit128
	movq	64(%rsp), %rdi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_28
# %bb.29:                               # %_Z9gpuAssert10hipError_tPKci.exit130
	movq	56(%rsp), %rdi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_31
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKci.exit132.preheader.preheader
	xorl	%ebx, %ebx
	movabsq	$4294967300, %rax               # imm = 0x100000004
	leaq	28(%rax), %r14
.LBB2_33:                               # %_Z9gpuAssert10hipError_tPKci.exit132.preheader
                                        # =>This Inner Loop Header: Depth=1
	movabsq	$4294967300, %rdi               # imm = 0x100000004
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_35
# %bb.34:                               #   in Loop: Header=BB2_33 Depth=1
	movq	96(%rsp), %rdi
	movq	88(%rsp), %rsi
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rcx
	movq	56(%rsp), %r8
	movsd	.LCPI2_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movl	%ebx, %r9d
	pushq	$20
	.cfi_adjust_cfa_offset 8
	pushq	$60
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB2_35:                               #   in Loop: Header=BB2_33 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB2_36
# %bb.38:                               # %_Z9gpuAssert10hipError_tPKci.exit134
                                        #   in Loop: Header=BB2_33 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_39
# %bb.40:                               # %_Z9gpuAssert10hipError_tPKci.exit136
                                        #   in Loop: Header=BB2_33 Depth=1
	movabsq	$4294967300, %rdi               # imm = 0x100000004
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_42
# %bb.41:                               #   in Loop: Header=BB2_33 Depth=1
	movq	72(%rsp), %rdi
	movq	80(%rsp), %rsi
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rcx
	movsd	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero
	callq	_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd
.LBB2_42:                               #   in Loop: Header=BB2_33 Depth=1
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB2_43
# %bb.44:                               # %_Z9gpuAssert10hipError_tPKci.exit138
                                        #   in Loop: Header=BB2_33 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_45
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKci.exit132
                                        #   in Loop: Header=BB2_33 Depth=1
	incl	%ebx
	cmpl	$400, %ebx                      # imm = 0x190
	jne	.LBB2_33
# %bb.46:
	movq	96(%rsp), %rsi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_47
# %bb.48:                               # %_Z9gpuAssert10hipError_tPKci.exit142
	movq	88(%rsp), %rsi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_49
# %bb.50:                               # %_Z9gpuAssert10hipError_tPKci.exit144
	movq	72(%rsp), %rsi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_51
# %bb.52:                               # %_Z9gpuAssert10hipError_tPKci.exit146
	movq	80(%rsp), %rsi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_53
# %bb.54:                               # %_Z9gpuAssert10hipError_tPKci.exit148
	movq	64(%rsp), %rsi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_55
# %bb.56:                               # %_Z9gpuAssert10hipError_tPKci.exit150
	movq	56(%rsp), %rsi
	movl	$8242408, %edx                  # imm = 0x7DC4E8
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_57
# %bb.58:                               # %_Z9gpuAssert10hipError_tPKci.exit152
	movq	96(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_59
# %bb.60:                               # %_Z9gpuAssert10hipError_tPKci.exit154
	movq	88(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_61
# %bb.62:                               # %_Z9gpuAssert10hipError_tPKci.exit156
	movq	72(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_63
# %bb.64:                               # %_Z9gpuAssert10hipError_tPKci.exit158
	movq	80(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_65
# %bb.66:                               # %_Z9gpuAssert10hipError_tPKci.exit160
	movq	64(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_67
# %bb.68:                               # %_Z9gpuAssert10hipError_tPKci.exit162
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_69
# %bb.70:                               # %_Z9gpuAssert10hipError_tPKci.exit164
	movq	104(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	104(%rsp), %rdi
	callq	hipEventSynchronize
	movq	144(%rsp), %rsi
	movq	104(%rsp), %rdx
	leaq	196(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.2, %edi
	movl	$.L.str.3, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$80800, %eax                    # imm = 0x13BA0
	movq	32(%rsp), %rsi                  # 8-byte Reload
	addq	%rax, %rsi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	addq	%rax, %rdx
	movq	48(%rsp), %rcx                  # 8-byte Reload
	addq	%rax, %rcx
	addq	%rax, %rbp
	addq	%rax, %r13
	addq	%rax, %r12
	movl	$1, %eax
	xorps	%xmm0, %xmm0
	movq	%rsp, %r14
.LBB2_71:                               # %.preheader175
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_72 Depth 2
                                        #       Child Loop BB2_73 Depth 3
	movq	%rax, 152(%rsp)                 # 8-byte Spill
	movq	%r12, 176(%rsp)                 # 8-byte Spill
	movq	%r13, 168(%rsp)                 # 8-byte Spill
	movq	%rbp, 160(%rsp)                 # 8-byte Spill
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movl	$1, %edi
.LBB2_72:                               # %.preheader
                                        #   Parent Loop BB2_71 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_73 Depth 3
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
	movq	%rbp, 120(%rsp)                 # 8-byte Spill
	movq	%rcx, 128(%rsp)                 # 8-byte Spill
	movq	%r13, 136(%rsp)                 # 8-byte Spill
	movq	%rdi, 184(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
	movq	%rsi, %r13
.LBB2_73:                               #   Parent Loop BB2_71 Depth=1
                                        #     Parent Loop BB2_72 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movaps	%xmm0, (%rsp)
	movw	%r15w, 16(%rsp)
	movsd	(%r12,%rbp), %xmm0              # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	sprintf
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rsp)
	movw	%r15w, 16(%rsp)
	movq	136(%rsp), %rax                 # 8-byte Reload
	movsd	(%rax,%rbp), %xmm0              # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	sprintf
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rsp)
	movw	%r15w, 16(%rsp)
	movq	120(%rsp), %rax                 # 8-byte Reload
	movsd	(%rax,%rbp), %xmm0              # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	sprintf
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rsp)
	movw	%r15w, 16(%rsp)
	movq	128(%rsp), %rax                 # 8-byte Reload
	movsd	(%rax,%rbp), %xmm0              # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	sprintf
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rsp)
	movw	%r15w, 16(%rsp)
	movq	112(%rsp), %rax                 # 8-byte Reload
	movsd	(%rax,%rbp), %xmm0              # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	sprintf
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	xorps	%xmm0, %xmm0
	movaps	%xmm0, (%rsp)
	movw	%r15w, 16(%rsp)
	movsd	(%r13,%rbp), %xmm0              # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movb	$1, %al
	callq	sprintf
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	movups	.L.str.5(%rip), %xmm0
	movaps	%xmm0, (%rsp)
	movl	$663584, 15(%rsp)               # imm = 0xA2020
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	fputs
	xorps	%xmm0, %xmm0
	addq	$8, %rbp
	cmpq	$800, %rbp                      # imm = 0x320
	jne	.LBB2_73
# %bb.74:                               #   in Loop: Header=BB2_72 Depth=2
	movq	184(%rsp), %rdi                 # 8-byte Reload
	incq	%rdi
	movl	$800, %eax                      # imm = 0x320
	movq	%r13, %rsi
	addq	%rax, %rsi
	movq	112(%rsp), %r8                  # 8-byte Reload
	addq	%rax, %r8
	movq	128(%rsp), %rcx                 # 8-byte Reload
	addq	%rax, %rcx
	movq	120(%rsp), %rbp                 # 8-byte Reload
	addq	%rax, %rbp
	movq	136(%rsp), %r13                 # 8-byte Reload
	addq	%rax, %r13
	addq	%rax, %r12
	cmpq	$100, %rdi
	movq	%r8, %rdx
	jne	.LBB2_72
# %bb.75:                               #   in Loop: Header=BB2_71 Depth=1
	movq	152(%rsp), %rax                 # 8-byte Reload
	incq	%rax
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$80000, %edi                    # imm = 0x13880
	addq	%rdi, %rsi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	addq	%rdi, %rdx
	movq	48(%rsp), %rcx                  # 8-byte Reload
	addq	%rdi, %rcx
	movq	160(%rsp), %rbp                 # 8-byte Reload
	addq	%rdi, %rbp
	movq	168(%rsp), %r13                 # 8-byte Reload
	addq	%rdi, %r13
	movq	176(%rsp), %r12                 # 8-byte Reload
	addq	%rdi, %r12
	cmpq	$100, %rax
	jne	.LBB2_71
# %bb.76:
	movq	%rbx, %rdi
	callq	fclose
	xorl	%eax, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_36:
	.cfi_def_cfa_offset 256
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$142, %ecx
	jmp	.LBB2_37
.LBB2_39:
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$143, %ecx
	jmp	.LBB2_37
.LBB2_43:
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$150, %ecx
	jmp	.LBB2_37
.LBB2_45:
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$151, %ecx
.LBB2_37:
	xorl	%eax, %eax
	callq	printf
	movl	%r15d, %edi
	callq	exit
.LBB2_1:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$108, %ecx
	jmp	.LBB2_2
.LBB2_4:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$109, %ecx
	jmp	.LBB2_2
.LBB2_6:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$110, %ecx
	jmp	.LBB2_2
.LBB2_8:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$111, %ecx
	jmp	.LBB2_2
.LBB2_10:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$112, %ecx
	jmp	.LBB2_2
.LBB2_12:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$113, %ecx
	jmp	.LBB2_2
.LBB2_14:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$122, %ecx
	jmp	.LBB2_2
.LBB2_16:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$123, %ecx
	jmp	.LBB2_2
.LBB2_18:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$124, %ecx
	jmp	.LBB2_2
.LBB2_20:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$126, %ecx
	jmp	.LBB2_2
.LBB2_22:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$127, %ecx
	jmp	.LBB2_2
.LBB2_24:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$128, %ecx
	jmp	.LBB2_2
.LBB2_26:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$129, %ecx
	jmp	.LBB2_2
.LBB2_28:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$130, %ecx
	jmp	.LBB2_2
.LBB2_31:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$131, %ecx
	jmp	.LBB2_2
.LBB2_47:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$154, %ecx
	jmp	.LBB2_2
.LBB2_49:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$155, %ecx
	jmp	.LBB2_2
.LBB2_51:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$156, %ecx
	jmp	.LBB2_2
.LBB2_53:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$157, %ecx
	jmp	.LBB2_2
.LBB2_55:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$158, %ecx
	jmp	.LBB2_2
.LBB2_57:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$159, %ecx
	jmp	.LBB2_2
.LBB2_59:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$161, %ecx
	jmp	.LBB2_2
.LBB2_61:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$162, %ecx
	jmp	.LBB2_2
.LBB2_63:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$163, %ecx
	jmp	.LBB2_2
.LBB2_65:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$164, %ecx
	jmp	.LBB2_2
.LBB2_67:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$165, %ecx
	jmp	.LBB2_2
.LBB2_69:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	movl	$.L.str, %edx
	movq	%rax, %rsi
	movl	$166, %ecx
.LBB2_2:
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii,@object # @_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.section	.rodata,"a",@progbits
	.globl	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.p2align	3, 0x0
_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii:
	.quad	_Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.size	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, 8

	.type	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd,@object # @_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.globl	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.p2align	3, 0x0
_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd:
	.quad	_Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd
	.size	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/hoggetaylor/parallel_final/master/cuda/cudacontig.hip"
	.size	.L.str, 116

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPU Time: %.2f\n"
	.size	.L.str.1, 16

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"parlleloutput.dat"
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"w"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%e\n"
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"                 \n"
	.size	.L.str.5, 19

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPU error: %s %s %d\n"
	.size	.L.str.6, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.addrsig_sym _Z24__device_stub__loop2_GPUPA100_A100_dS1_S1_S1_dd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.addrsig_sym _Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii ; -- Begin function _Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.globl	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
	.p2align	8
	.type	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii,@function
_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii: ; @_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b256 s[16:23], s[0:1], 0x20
	v_lshl_add_u32 v0, s15, 5, v0
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, -1, v0
	v_cmpx_gt_u32_e32 0x63, v3
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.preheader114
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v1
	v_lshlrev_b64 v[1:2], 3, v[0:1]
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, v3, s10
	v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v11, vcc_lo, 0x320, v1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, 0x320, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v11, vcc_lo, s16, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	s_mov_b32 s4, 1
.LBB0_2:                                ; %.preheader113
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mov_b64 s[2:3], 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v13, vcc_lo, v11, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v12, vcc_lo
	v_add_co_u32 v15, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v16, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v17, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v6, vcc_lo
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[15:16], v[15:16], off
	s_clause 0x1
	global_load_b64 v[19:20], v[17:18], off
	global_load_b64 v[17:18], v[17:18], off offset:800
	v_add_co_u32 v21, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v22, vcc_lo, s3, v10, vcc_lo
	s_add_u32 s2, s2, 0x13880
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 0x7a1200
	global_load_b64 v[23:24], v[21:22], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[13:14], v[13:14], -v[19:20]
	s_waitcnt vmcnt(1)
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], v[15:16]
	v_mul_f64 v[13:14], v[13:14], s[18:19]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[13:14], v[23:24], s[20:21], v[13:14]
	global_store_b64 v[21:22], v[13:14], off
	s_cbranch_scc1 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v7, vcc_lo, 0x320, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, 0x320, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, 0x320, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v11, vcc_lo, 0x320, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s4, 0x64
	s_cbranch_scc1 .LBB0_2
; %bb.5:                                ; %.preheader110.preheader
	v_add_co_u32 v7, vcc_lo, 0x13880, v1
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s16, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s17, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x13880, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_mov_b32 s4, 0
.LBB0_6:                                ; %.preheader110
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_7 Depth 2
	s_mov_b64 s[2:3], 0
.LBB0_7:                                ;   Parent Loop BB0_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v9, vcc_lo, v1, s2
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v11, vcc_lo, v7, s2
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v8, vcc_lo
	v_add_co_u32 v13, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v4, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	global_load_b64 v[11:12], v[11:12], off
	global_load_b64 v[13:14], v[13:14], off
	v_add_co_u32 v15, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v16, vcc_lo, s3, v6, vcc_lo
	s_add_u32 s2, s2, 0x13880
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 0x78d980
	global_load_b64 v[17:18], v[15:16], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_waitcnt vmcnt(1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_mul_f64 v[9:10], v[9:10], s[18:19]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[17:18], s[20:21], v[9:10]
	global_store_b64 v[15:16], v[9:10], off
	s_cbranch_scc1 .LBB0_7
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=1
	v_add_co_u32 v1, vcc_lo, 0x320, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, 0x320, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v7, vcc_lo, 0x320, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x320, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s4, 0x64
	s_cbranch_scc1 .LBB0_6
.LBB0_9:                                ; %Flow214
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e32 0x64, v0
	s_cbranch_execz .LBB0_14
; %bb.10:                               ; %.preheader109
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s5, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 3, v[0:1]
	v_add_co_u32 v5, vcc_lo, 0x13ba0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s16, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
.LBB0_11:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_12 Depth 2
	s_mov_b64 s[2:3], 0
.LBB0_12:                               ;   Parent Loop BB0_11 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, v1, s2
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v9, vcc_lo, v5, s2
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v6, vcc_lo
	v_add_co_u32 v11, vcc_lo, 0x13000, v7
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v8, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	s_clause 0x2
	global_load_b64 v[7:8], v[7:8], off offset:800
	global_load_b64 v[13:14], v[11:12], off offset:2176
	global_load_b64 v[11:12], v[11:12], off offset:2976
	v_add_co_u32 v15, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v16, vcc_lo, s3, v4, vcc_lo
	s_add_u32 s2, s2, 0x13880
	s_addc_u32 s3, s3, 0
	s_cmp_lg_u32 s2, 0x78d980
	global_load_b64 v[17:18], v[15:16], off
	s_waitcnt vmcnt(3)
	v_add_f64 v[7:8], v[9:10], -v[7:8]
	s_waitcnt vmcnt(1)
	v_add_f64 v[9:10], v[13:14], -v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_mul_f64 v[7:8], v[7:8], s[18:19]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[7:8], v[17:18], s[20:21], v[7:8]
	global_store_b64 v[15:16], v[7:8], off
	s_cbranch_scc1 .LBB0_12
; %bb.13:                               ;   in Loop: Header=BB0_11 Depth=1
	v_add_co_u32 v1, vcc_lo, 0x320, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x320, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, 0x320, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s5, 0x64
	s_cbranch_scc1 .LBB0_11
.LBB0_14:                               ; %Flow212
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 50, v0
	s_cbranch_execz .LBB0_16
; %bb.15:
	s_load_b128 s[0:3], s[0:1], 0x38
	s_mov_b32 s4, 0x4222de17
	s_mov_b32 s5, 0x3fbdee67
	s_mov_b32 s7, 0x3c7abc9e
	s_mov_b32 s6, 0x3b39803f
	s_mov_b32 s11, 0x3ff71547
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s12, 0xfca7ab0c
	s_mov_b32 s14, 0x6a5dcb37
	s_mov_b32 s13, 0x3e928af3
	s_mov_b32 s15, 0x3e5ade15
	s_mov_b32 s16, 0x623fde64
	s_mov_b32 s17, 0x3ec71dee
	s_mov_b32 s18, 0x7c89e6b0
	s_mov_b32 s19, 0x3efa0199
	s_mov_b32 s20, 0x14761f6e
	s_mov_b32 s21, 0x3f2a01a0
	s_mov_b32 s22, 0x1852b7b0
	s_mov_b32 s23, 0x3f56c16c
	s_mov_b32 s24, 0x11122322
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s0, s0, s1
	v_cvt_f64_i32_e32 v[0:1], s2
	v_cvt_f64_i32_e32 v[2:3], s0
	s_mov_b32 s1, 0x3fe55555
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s2, 0x968915a9
	s_mov_b32 s3, 0x3fba6564
	s_mov_b32 s25, 0x3f811111
	s_mov_b32 s26, 0x555502a1
	s_mov_b32 s27, 0x3fa55555
	s_mov_b32 s28, 0x55555511
	s_mov_b32 s29, 0x3fc55555
	s_mov_b32 s30, 11
	s_mov_b32 s31, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[4:5], null, v[0:1], v[0:1], v[2:3]
	v_div_scale_f64 v[10:11], vcc_lo, v[2:3], v[0:1], v[2:3]
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[4:5], v[0:1], v[2:3]
	v_frexp_mant_f64_e64 v[2:3], |v[0:1]|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[0:1], v[2:3]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	v_rcp_f64_e32 v[6:7], v[4:5]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[8:9], v[4:5], -v[14:15]
	v_fma_f64 v[2:3], v[8:9], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[2:3]
	v_add_f64 v[12:13], v[10:11], -v[4:5]
	v_add_f64 v[14:15], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_add_f64 v[2:3], v[14:15], -v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], -v[4:5]
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[8:9], v[2:3]
	v_add_f64 v[6:7], v[4:5], -v[8:9]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_fma_f64 v[6:7], v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[2:3], v[2:3]
	v_fma_f64 v[6:7], v[4:5], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[8:9], v[6:7]
	v_fma_f64 v[12:13], v[10:11], s[4:5], s[2:3]
	s_mov_b32 s2, 0x3abe935a
	s_mov_b32 s3, 0x3fbe25e4
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_mul_f64 v[18:19], v[4:5], v[10:11]
	s_mov_b32 s5, 0x3fe62e42
	s_mov_b32 s4, 0xfefa39ef
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x47e6c9c2
	s_mov_b32 s3, 0x3fc110ef
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0xcfa74449
	s_mov_b32 s3, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x71bf3c30
	s_mov_b32 s3, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x1c7792ce
	s_mov_b32 s3, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x924920da
	s_mov_b32 s3, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0x9999999c
	s_mov_b32 s3, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[10:11], v[12:13], s[2:3]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[10:11], v[12:13]
	v_fma_f64 v[8:9], v[10:11], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[6:7], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[12:13], s[0:1]
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	s_mov_b32 s1, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[20:21], v[16:17], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	v_fma_f64 v[14:15], v[10:11], v[4:5], -v[18:19]
	s_mov_b32 s0, 0xd5df274d
	s_mov_b32 s1, 0x3c8543b0
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], s[0:1]
	v_fma_f64 v[10:11], v[10:11], v[2:3], v[14:15]
	v_ldexp_f64 v[2:3], v[2:3], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], v[12:13]
	v_fma_f64 v[6:7], v[6:7], v[4:5], v[10:11]
	v_ldexp_f64 v[4:5], v[4:5], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[16:17], v[8:9]
	v_add_f64 v[12:13], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[16:17], -v[10:11]
	v_mul_f64 v[16:17], v[12:13], v[10:11]
	v_add_f64 v[18:19], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], v[14:15]
	v_fma_f64 v[14:15], v[12:13], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	v_fma_f64 v[8:9], v[12:13], v[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[8:9]
	v_frexp_exp_i32_f64_e32 v10, v[0:1]
	v_add_f64 v[8:9], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 1.0, v[0:1]
	v_cvt_f64_i32_e32 v[10:11], v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[4:5], v[8:9]
	v_add_f64 v[14:15], v[8:9], -v[16:17]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s3, 0x3ff00000, 2.0
	v_mul_f64 v[16:17], v[10:11], s[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[12:13], -v[4:5]
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[10:11], s[4:5], -v[16:17]
	s_mov_b32 s5, 0xbfe62e42
	v_add_f64 v[4:5], v[8:9], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[10:11], s[6:7], v[14:15]
	s_mov_b32 s7, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[12:13], v[2:3]
	v_add_f64 v[16:17], v[4:5], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[4:5], v[8:9]
	v_add_f64 v[12:13], v[8:9], -v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[10:11], -v[4:5]
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[10:11], -v[14:15]
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	v_add_f64 v[12:13], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[18:19]
	v_add_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[12:13], -v[6:7]
	v_add_f64 v[4:5], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[8:9]
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_add_f64 v[14:15], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[12:13]
	v_add_f64 v[8:9], v[14:15], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], -v[14:15]
	v_mul_f64 v[8:9], s[2:3], v[4:5]
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], s[2:3], v[4:5], -v[8:9]
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x204
	v_fma_f64 v[2:3], s[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[8:9], v[2:3]
	v_dual_cndmask_b32 v7, v5, v9 :: v_dual_cndmask_b32 v6, v4, v8
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	v_mul_f64 v[8:9], s[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], s[10:11]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[6:7]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[6:7]
	v_cmp_neq_f64_e64 s1, 0x7ff00000, |v[6:7]|
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_trunc_f64_e32 v[4:5], s[2:3]
	v_rndne_f64_e32 v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, 0, v3, s1
	v_cndmask_b32_e64 v2, 0, v2, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[10:11], s[4:5], v[6:7]
	v_cvt_i32_f64_e32 v16, v[10:11]
	v_trunc_f64_e32 v[6:7], v[8:9]
	v_fma_f64 v[12:13], v[10:11], s[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_neq_f64_e64 s1, v[6:7], v[8:9]
	v_fma_f64 v[14:15], v[12:13], s[14:15], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[16:17]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[20:21]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[24:25]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[28:29]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], 1.0
	v_fma_f64 v[10:11], v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[10:11], v[10:11], v16
	v_cndmask_b32_e32 v11, 0x7ff00000, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s11, v10
	v_cndmask_b32_e64 v11, 0, v11, s0
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s11, s11, 0
	v_cmp_eq_f64_e64 s0, s[2:3], v[4:5]
	v_mov_b32_e32 v10, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[10:11], v[2:3], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	v_readfirstlane_b32 s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_and_b32 s3, vcc_lo, exec_lo
	v_cndmask_b32_e32 v2, v3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	s_cselect_b32 s3, s11, s2
	s_and_b32 vcc_lo, s0, s1
	v_cmp_gt_f64_e64 s1, 0, v[0:1]
	v_cmp_class_f64_e64 s11, v[0:1], 0x204
	v_cmp_eq_f64_e64 s2, 0, v[0:1]
	v_cndmask_b32_e32 v3, 0x3ff00000, v1, vcc_lo
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v2, 0x7fffffff, v2, v3
	v_cndmask_b32_e64 v3, 0x7ff80000, v2, s0
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s0, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v2, v2, v3, s1
	s_and_b32 s1, s1, exec_lo
	s_cselect_b32 s1, s0, s3
	s_or_b32 vcc_lo, s2, s11
	s_and_b32 s0, s2, exec_lo
	s_cselect_b32 s0, 0, 0x7ff00000
	s_and_b32 s2, vcc_lo, exec_lo
	v_bfi_b32 v3, 0x7fffffff, s0, v4
	v_cmp_o_f64_e64 s0, v[0:1], v[0:1]
	s_cselect_b32 s1, 0, s1
	s_mov_b32 s11, 0xbff71547
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_cndmask_b32_e64 v1, 0x7ff80000, v2, s0
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s0, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, s0
	v_mul_f64 v[2:3], v[0:1], s[10:11]
	v_cmp_ngt_f64_e32 vcc_lo, 0xc0900000, v[0:1]
	v_cmp_nlt_f64_e64 s0, 0x4090cc00, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[2:3], v[2:3]
	v_fma_f64 v[4:5], v[2:3], s[4:5], -v[0:1]
	v_cvt_i32_f64_e32 v8, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], s[6:7], v[4:5]
	v_fma_f64 v[6:7], v[4:5], s[14:15], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[20:21]
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[24:25]
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[28:29]
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], 1.0
	v_fma_f64 v[2:3], v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v8
	v_cndmask_b32_e32 v3, 0x7ff00000, v3, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, 0, v2, vcc_lo
	v_mov_b32_e32 v2, 0x3da000
	v_cndmask_b32_e64 v1, 0, v3, s0
	global_store_b64 v2, v[0:1], s[8:9] offset:1744
.LBB0_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 68
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii, .Lfunc_end0-_Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3652
; NumSgprs: 34
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd ; -- Begin function _Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.globl	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
	.p2align	8
	.type	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd,@function
_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd:    ; @_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b128 s[0:3], s[0:1], 0x20
	v_lshl_add_u32 v0, s15, 5, v0
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0x64, v0
	s_cbranch_execz .LBB1_9
; %bb.1:                                ; %.preheader107
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, v3, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, 0x13880, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v6, vcc_lo
	v_dual_mov_b32 v6, v2 :: v_dual_mov_b32 v5, v1
.LBB1_2:                                ; %.preheader106
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	s_mov_b64 s[6:7], 0
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v9, vcc_lo, v5, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v13, vcc_lo, 0x13000, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v15, vcc_lo, v7, s6
	v_add_co_ci_u32_e32 v16, vcc_lo, s7, v8, vcc_lo
	s_clause 0x1
	global_load_b128 v[9:12], v[13:14], off offset:2176
	global_load_b64 v[13:14], v[13:14], off offset:2976
	s_add_u32 s6, s6, 0x13880
	s_addc_u32 s7, s7, 0
	global_load_b64 v[17:18], v[15:16], off
	s_cmp_lg_u32 s6, 0x77a100
	s_waitcnt vmcnt(1)
	v_add_f64 v[13:14], v[9:10], -v[13:14]
	v_add_f64 v[9:10], v[11:12], -v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[13:14], v[9:10]
	v_mul_f64 v[9:10], v[9:10], s[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[9:10], v[17:18], s[0:1], v[9:10]
	global_store_b64 v[15:16], v[9:10], off
	s_cbranch_scc1 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_co_u32 v7, vcc_lo, 0x320, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, 0x320, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_add_i32 s13, s13, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s13, 0x63
	s_cbranch_scc1 .LBB1_2
; %bb.5:                                ; %.preheader103.preheader
	v_add_co_u32 v3, vcc_lo, v3, s8
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_mov_b32 s8, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, 0x320, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB1_6:                                ; %.preheader103
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
	s_mov_b64 s[6:7], 0
.LBB1_7:                                ;   Parent Loop BB1_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v1, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	v_add_co_u32 v7, vcc_lo, 0x13000, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v11, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v4, vcc_lo
	s_clause 0x1
	global_load_b64 v[9:10], v[7:8], off offset:2976
	global_load_b128 v[5:8], v[5:6], off offset:800
	s_add_u32 s6, s6, 0x13880
	s_addc_u32 s7, s7, 0
	global_load_b64 v[13:14], v[11:12], off
	s_cmp_lg_u32 s6, 0x78d980
	s_waitcnt vmcnt(1)
	v_add_f64 v[9:10], v[9:10], -v[5:6]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[9:10], v[5:6]
	v_mul_f64 v[5:6], v[5:6], s[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[5:6], v[13:14], s[0:1], v[5:6]
	global_store_b64 v[11:12], v[5:6], off
	s_cbranch_scc1 .LBB1_7
; %bb.8:                                ;   in Loop: Header=BB1_6 Depth=1
	v_add_co_u32 v1, vcc_lo, 0x320, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, 0x320, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s8, 0x63
	s_cbranch_scc1 .LBB1_6
.LBB1_9:                                ; %Flow179
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v1, -1, v0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x63, v1
	s_cbranch_execz .LBB1_14
; %bb.10:                               ; %.preheader102
	v_mov_b32_e32 v1, 0
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB1_11:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_12 Depth 2
	s_mov_b64 s[4:5], 0
.LBB1_12:                               ;   Parent Loop BB1_11 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_co_u32 v4, vcc_lo, v2, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, 0x13000, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v10, vcc_lo, v0, s4
	s_clause 0x2
	global_load_b64 v[8:9], v[4:5], off
	global_load_b64 v[6:7], v[6:7], off offset:2176
	global_load_b64 v[4:5], v[4:5], off offset:800
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v1, vcc_lo
	s_add_u32 s4, s4, 0x13880
	s_addc_u32 s5, s5, 0
	s_cmp_lg_u32 s4, 0x78d980
	global_load_b64 v[12:13], v[10:11], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_waitcnt vmcnt(1)
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[6:7], v[4:5]
	v_mul_f64 v[4:5], v[4:5], s[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], v[12:13], s[0:1], v[4:5]
	global_store_b64 v[10:11], v[4:5], off
	s_cbranch_scc1 .LBB1_12
; %bb.13:                               ;   in Loop: Header=BB1_11 Depth=1
	v_add_co_u32 v0, vcc_lo, 0x320, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x320, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_lg_i32 s6, 0x63
	s_cbranch_scc1 .LBB1_11
.LBB1_14:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd, .Lfunc_end1-_Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 924
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 68
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z9loop1_GPUPA100_A100_dS1_S1_S1_S1_ddiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     25
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9loop2_GPUPA100_A100_dS1_S1_S1_dd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9loop2_GPUPA100_A100_dS1_S1_S1_dd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
