// RUN: %run_test hipify "%s" "%t" %hipify_args %clang_args

#include <iostream>

// CHECK: #include <hip/hip_runtime.h>
#include <cuda.h>

template<typename T>
__global__ void axpy(T a, T *x, T *y) {
  y[threadIdx.x] = a * x[threadIdx.x];
}

template<typename T>
__global__ void axpy_empty() {
}

__global__ void empty() {
}

__global__ void nonempty(int x, int y, int z) {
}

int main(int argc, char* argv[]) {
  const int kDataLen = 4;

  float a = 2.0f;
  float host_x[kDataLen] = {1.0f, 2.0f, 3.0f, 4.0f};
  float host_y[kDataLen];

  // Copy input data to device.
  float* device_x;
  float* device_y;

  // CHECK: hipMalloc(&device_x, kDataLen * sizeof(float));
  cudaMalloc(&device_x, kDataLen * sizeof(float));

  // CHECK: hipMalloc(&device_y, kDataLen * sizeof(float));
  cudaMalloc(&device_y, kDataLen * sizeof(float));

  // CHECK: hipMemcpy(device_x, host_x, kDataLen * sizeof(float), hipMemcpyHostToDevice);
  cudaMemcpy(device_x, host_x, kDataLen * sizeof(float), cudaMemcpyHostToDevice);

  int x = 1, y = 2, z = 3;
  size_t N = 32;
  // CHECK: hipStream_t stream = NULL;
  cudaStream_t stream = NULL;
  // CHECK: hipStreamCreate(&stream);
  cudaStreamCreate(&stream);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<1, kDataLen>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), kDataLen>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<1, dim3(kDataLen)>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), dim3(kDataLen)>>>(a, device_x, device_y);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<1, kDataLen, N>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), kDataLen, N>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<1, dim3(kDataLen), N>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), dim3(kDataLen), N>>>(a, device_x, device_y);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<1, kDataLen, N, stream>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<dim3(1), kDataLen, N, stream>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<1, dim3(kDataLen), N, stream>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<dim3(1), dim3(kDataLen), N, stream>>>(a, device_x, device_y);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<1, kDataLen>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<dim3(1), kDataLen>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<1, dim3(kDataLen)>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<dim3(1), dim3(kDataLen)>>>();

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<1, kDataLen, N>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<dim3(1), kDataLen, N>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<1, dim3(kDataLen), N>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<dim3(1), dim3(kDataLen), N>>>();

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<1, kDataLen, N, stream>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<dim3(1), kDataLen, N, stream>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<1, dim3(kDataLen), N, stream>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<dim3(1), dim3(kDataLen), N, stream>>>();

  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<1, kDataLen>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<dim3(1), kDataLen>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<1, dim3(kDataLen)>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<dim3(1), dim3(kDataLen)>>> ( );

  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<1, kDataLen, N>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<dim3(1), kDataLen, N>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<1, dim3(kDataLen), N>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<dim3(1), dim3(kDataLen), N>>> ( );

  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<1, kDataLen, N, stream>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<dim3(1), kDataLen, N, stream>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<1, dim3(kDataLen), N, stream>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<dim3(1), dim3(kDataLen), N, stream>>> ( );

  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<1, kDataLen>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<dim3(1), kDataLen>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<1, dim3(kDataLen)>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<dim3(1), dim3(kDataLen)>>> (x, y, z);

  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<1, kDataLen, N>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<dim3(1), kDataLen, N>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<1, dim3(kDataLen), N>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<dim3(1), dim3(kDataLen), N>>> (x, y, z);

  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<1, kDataLen, N, stream>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<dim3(1), kDataLen, N, stream>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<1, dim3(kDataLen), N, stream>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<dim3(1), dim3(kDataLen), N, stream>>> (x, y, z);

  // Copy output data to host.
  // CHECK: hipDeviceSynchronize();
  cudaDeviceSynchronize();

  // CHECK: hipMemcpy(host_y, device_y, kDataLen * sizeof(float), hipMemcpyDeviceToHost);
  cudaMemcpy(host_y, device_y, kDataLen * sizeof(float), cudaMemcpyDeviceToHost);

  // Print the results.
  for (int i = 0; i < kDataLen; ++i) {
    std::cout << "y[" << i << "] = " << host_y[i] << "\n";
  }

  // CHECK: hipDeviceReset();
  cudaDeviceReset();
  return 0;
}

	.file	"tmpxft_00388015_00000000-6_kernel_launch_syntax.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0, @function
_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0:
.LFB4300:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	leaq	32(%rsp), %rdx
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	leaq	48(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	movss	%xmm0, 12(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4axpyIfEvT_PS0_S1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4300:
	.size	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0, .-_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
	.section	.text._Z4axpyIfEvT_PS0_S1_,"axG",@progbits,_Z4axpyIfEvT_PS0_S1_,comdat
	.weak	_Z4axpyIfEvT_PS0_S1_
	.type	_Z4axpyIfEvT_PS0_S1_, @function
_Z4axpyIfEvT_PS0_S1_:
.LFB3974:
	.cfi_startproc
	endbr64
	jmp	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
	.cfi_endproc
.LFE3974:
	.size	_Z4axpyIfEvT_PS0_S1_, .-_Z4axpyIfEvT_PS0_S1_
	.text
	.type	_ZL33__device_stub__Z10axpy_emptyIfEvvv, @function
_ZL33__device_stub__Z10axpy_emptyIfEvvv:
.LFB3670:
	.cfi_startproc
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z10axpy_emptyIfEvv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L8:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_ZL33__device_stub__Z10axpy_emptyIfEvvv, .-_ZL33__device_stub__Z10axpy_emptyIfEvvv
	.section	.text._Z10axpy_emptyIfEvv,"axG",@progbits,_Z10axpy_emptyIfEvv,comdat
	.weak	_Z10axpy_emptyIfEvv
	.type	_Z10axpy_emptyIfEvv, @function
_Z10axpy_emptyIfEvv:
.LFB3975:
	.cfi_startproc
	endbr64
	jmp	_ZL33__device_stub__Z10axpy_emptyIfEvvv
	.cfi_endproc
.LFE3975:
	.size	_Z10axpy_emptyIfEvv, .-_Z10axpy_emptyIfEvv
	.text
	.globl	_Z23__device_stub__Z5emptyvv
	.type	_Z23__device_stub__Z5emptyvv, @function
_Z23__device_stub__Z5emptyvv:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z5emptyv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L13:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z23__device_stub__Z5emptyvv, .-_Z23__device_stub__Z5emptyvv
	.globl	_Z5emptyv
	.type	_Z5emptyv, @function
_Z5emptyv:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z23__device_stub__Z5emptyvv
	.cfi_endproc
.LFE3665:
	.size	_Z5emptyv, .-_Z5emptyv
	.globl	_Z28__device_stub__Z8nonemptyiiiiii
	.type	_Z28__device_stub__Z8nonemptyiiiiii, @function
_Z28__device_stub__Z8nonemptyiiiiii:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8nonemptyiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L18:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z28__device_stub__Z8nonemptyiiiiii, .-_Z28__device_stub__Z8nonemptyiiiiii
	.globl	_Z8nonemptyiii
	.type	_Z8nonemptyiii, @function
_Z8nonemptyiii:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z8nonemptyiiiiii
	.cfi_endproc
.LFE3667:
	.size	_Z8nonemptyiii, .-_Z8nonemptyiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"y["
.LC2:
	.string	"] = "
.LC3:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$16, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$96, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	movabsq	$4611686019492741120, %rax
	leaq	8(%rsp), %rdi
	movq	%rax, 56(%rsp)
	movabsq	$4647714816524288000, %rax
	movq	%rax, 64(%rsp)
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	leaq	56(%rsp), %rsi
	movl	$1, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	cudaStreamCreate@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L24:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L25:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L26:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L27:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L28:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L29:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L30:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L31:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L32:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L33:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L34:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movss	.LC0(%rip), %xmm0
	call	_Z27__wrapper__device_stub_axpyIfEvRT_RPS0_S3_.isra.0
.L35:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L36:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L37:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L38:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L39:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L40:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L41:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L42:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L43:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L44:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L45:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L46:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	call	_ZL33__device_stub__Z10axpy_emptyIfEvvv
.L47:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	call	_Z23__device_stub__Z5emptyvv
.L48:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	call	_Z23__device_stub__Z5emptyvv
.L49:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	call	_Z23__device_stub__Z5emptyvv
.L50:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	call	_Z23__device_stub__Z5emptyvv
.L51:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	call	_Z23__device_stub__Z5emptyvv
.L52:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	call	_Z23__device_stub__Z5emptyvv
.L53:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	call	_Z23__device_stub__Z5emptyvv
.L54:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	call	_Z23__device_stub__Z5emptyvv
.L55:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	call	_Z23__device_stub__Z5emptyvv
.L56:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	call	_Z23__device_stub__Z5emptyvv
.L57:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	call	_Z23__device_stub__Z5emptyvv
.L58:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	call	_Z23__device_stub__Z5emptyvv
.L59:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L60:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L61:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L62:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L63:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L64:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L65:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L66:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L67:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L68
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L68:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L69:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 40(%rsp)
	movq	%rdx, 32(%rsp)
	movq	%rdi, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L70:
	movl	$1073741825, %edx
	movq	24(%rsp), %r9
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$2, %rdx
	movl	$32, %r8d
	movl	$1, %esi
	movl	$1, 52(%rsp)
	movq	%rdx, 44(%rsp)
	movq	%rdi, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	movl	$3, %edx
	movl	$2, %esi
	movl	$1, %edi
	call	_Z28__device_stub__Z8nonemptyiiiiii
.L71:
	call	cudaDeviceSynchronize@PLT
	leaq	72(%rsp), %rbp
	xorl	%ebx, %ebx
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$16, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %r12
.L72:
	movq	%r12, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	incq	%rbx
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$4, %rbx
	jne	.L72
	call	cudaDeviceReset@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	addq	$96, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z10axpy_emptyIfEvv"
.LC5:
	.string	"_Z4axpyIfEvT_PS0_S1_"
.LC6:
	.string	"_Z8nonemptyiii"
.LC7:
	.string	"_Z5emptyv"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3673:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10axpy_emptyIfEvv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4axpyIfEvT_PS0_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8nonemptyiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5emptyv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3673:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1073741824
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// RUN: %run_test hipify "%s" "%t" %hipify_args %clang_args

#include <iostream>

// CHECK: #include <hip/hip_runtime.h>
#include <hip/hip_runtime.h>

template<typename T>
__global__ void axpy(T a, T *x, T *y) {
  y[threadIdx.x] = a * x[threadIdx.x];
}

template<typename T>
__global__ void axpy_empty() {
}

__global__ void empty() {
}

__global__ void nonempty(int x, int y, int z) {
}

int main(int argc, char* argv[]) {
  const int kDataLen = 4;

  float a = 2.0f;
  float host_x[kDataLen] = {1.0f, 2.0f, 3.0f, 4.0f};
  float host_y[kDataLen];

  // Copy input data to device.
  float* device_x;
  float* device_y;

  // CHECK: hipMalloc(&device_x, kDataLen * sizeof(float));
  hipMalloc(&device_x, kDataLen * sizeof(float));

  // CHECK: hipMalloc(&device_y, kDataLen * sizeof(float));
  hipMalloc(&device_y, kDataLen * sizeof(float));

  // CHECK: hipMemcpy(device_x, host_x, kDataLen * sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(device_x, host_x, kDataLen * sizeof(float), hipMemcpyHostToDevice);

  int x = 1, y = 2, z = 3;
  size_t N = 32;
  // CHECK: hipStream_t stream = NULL;
  hipStream_t stream = NULL;
  // CHECK: hipStreamCreate(&stream);
  hipStreamCreate(&stream);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<1, kDataLen>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), kDataLen>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<1, dim3(kDataLen)>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), 0, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), dim3(kDataLen)>>>(a, device_x, device_y);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<1, kDataLen, N>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), kDataLen, N>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<1, dim3(kDataLen), N>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, 0, a, device_x, device_y);
  axpy<float><<<dim3(1), dim3(kDataLen), N>>>(a, device_x, device_y);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<1, kDataLen, N, stream>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<dim3(1), kDataLen, N, stream>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<1, dim3(kDataLen), N, stream>>>(a, device_x, device_y);
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy<float>), dim3(1), dim3(kDataLen), N, stream, a, device_x, device_y);
  axpy<float><<<dim3(1), dim3(kDataLen), N, stream>>>(a, device_x, device_y);

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<1, kDataLen>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<dim3(1), kDataLen>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<1, dim3(kDataLen)>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), 0, 0);
  axpy_empty<float><<<dim3(1), dim3(kDataLen)>>>();

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<1, kDataLen, N>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<dim3(1), kDataLen, N>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<1, dim3(kDataLen), N>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, 0);
  axpy_empty<float><<<dim3(1), dim3(kDataLen), N>>>();

  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<1, kDataLen, N, stream>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<dim3(1), kDataLen, N, stream>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<1, dim3(kDataLen), N, stream>>>();
  // CHECK: hipLaunchKernelGGL(HIP_KERNEL_NAME(axpy_empty<float>), dim3(1), dim3(kDataLen), N, stream);
  axpy_empty<float><<<dim3(1), dim3(kDataLen), N, stream>>>();

  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<1, kDataLen>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<dim3(1), kDataLen>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<1, dim3(kDataLen)>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), 0, 0);
  empty<<<dim3(1), dim3(kDataLen)>>> ( );

  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<1, kDataLen, N>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<dim3(1), kDataLen, N>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<1, dim3(kDataLen), N>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, 0);
  empty<<<dim3(1), dim3(kDataLen), N>>> ( );

  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<1, kDataLen, N, stream>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<dim3(1), kDataLen, N, stream>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<1, dim3(kDataLen), N, stream>>> ( );
  // CHECK: hipLaunchKernelGGL(empty, dim3(1), dim3(kDataLen), N, stream);
  empty<<<dim3(1), dim3(kDataLen), N, stream>>> ( );

  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<1, kDataLen>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<dim3(1), kDataLen>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<1, dim3(kDataLen)>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), 0, 0, x, y, z);
  nonempty<<<dim3(1), dim3(kDataLen)>>> (x, y, z);

  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<1, kDataLen, N>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<dim3(1), kDataLen, N>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<1, dim3(kDataLen), N>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, 0, x, y, z);
  nonempty<<<dim3(1), dim3(kDataLen), N>>> (x, y, z);

  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<1, kDataLen, N, stream>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<dim3(1), kDataLen, N, stream>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<1, dim3(kDataLen), N, stream>>> (x, y, z);
  // CHECK: hipLaunchKernelGGL(nonempty, dim3(1), dim3(kDataLen), N, stream, x, y, z);
  nonempty<<<dim3(1), dim3(kDataLen), N, stream>>> (x, y, z);

  // Copy output data to host.
  // CHECK: hipDeviceSynchronize();
  hipDeviceSynchronize();

  // CHECK: hipMemcpy(host_y, device_y, kDataLen * sizeof(float), hipMemcpyDeviceToHost);
  hipMemcpy(host_y, device_y, kDataLen * sizeof(float), hipMemcpyDeviceToHost);

  // Print the results.
  for (int i = 0; i < kDataLen; ++i) {
    std::cout << "y[" << i << "] = " << host_y[i] << "\n";
  }

  // CHECK: hipDeviceReset();
  hipDeviceReset();
  return 0;
}

	.text
	.file	"kernel_launch_syntax.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20__device_stub__emptyv       # -- Begin function _Z20__device_stub__emptyv
	.type	_Z20__device_stub__emptyv,@function
_Z20__device_stub__emptyv:              # @_Z20__device_stub__emptyv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z5emptyv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__emptyv, .Lfunc_end0-_Z20__device_stub__emptyv
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__nonemptyiii  # -- Begin function _Z23__device_stub__nonemptyiii
	.type	_Z23__device_stub__nonemptyiii,@function
_Z23__device_stub__nonemptyiii:         # @_Z23__device_stub__nonemptyiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8nonemptyiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z23__device_stub__nonemptyiii, .Lfunc_end1-_Z23__device_stub__nonemptyiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x3f800000                      # float 1
	.long	0x40000000                      # float 2
	.long	0x40400000                      # float 3
	.long	0x40800000                      # float 4
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_1:
	.long	0x40000000                      # float 2
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	movaps	.LCPI2_0(%rip), %xmm0           # xmm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
	leaq	48(%rsp), %r14
	movaps	%xmm0, (%r14)
	leaq	24(%rsp), %r15
	movl	$16, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$16, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	callq	hipStreamCreate
	leaq	3(%rbx), %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_2:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_4:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_6:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.7:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_8:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_10:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.11:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_12:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.13:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_14:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.15:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_16:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.17:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_18:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.19:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_20:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.21:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_22:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.23:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movss	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	callq	_Z19__device_stub__axpyIfEvT_PS0_S1_
.LBB2_24:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.25:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_26:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_28
# %bb.27:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_28:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.29:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_30:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_32
# %bb.31:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_32:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_34
# %bb.33:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_34:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_36
# %bb.35:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_36:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_38
# %bb.37:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_38:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_40
# %bb.39:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_40:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_42
# %bb.41:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_42:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_44
# %bb.43:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_44:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_46
# %bb.45:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_46:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_48
# %bb.47:
	callq	_Z25__device_stub__axpy_emptyIfEvv
.LBB2_48:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_50
# %bb.49:
	callq	_Z20__device_stub__emptyv
.LBB2_50:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_52
# %bb.51:
	callq	_Z20__device_stub__emptyv
.LBB2_52:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_54
# %bb.53:
	callq	_Z20__device_stub__emptyv
.LBB2_54:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_56
# %bb.55:
	callq	_Z20__device_stub__emptyv
.LBB2_56:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_58
# %bb.57:
	callq	_Z20__device_stub__emptyv
.LBB2_58:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_60
# %bb.59:
	callq	_Z20__device_stub__emptyv
.LBB2_60:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_62
# %bb.61:
	callq	_Z20__device_stub__emptyv
.LBB2_62:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_64
# %bb.63:
	callq	_Z20__device_stub__emptyv
.LBB2_64:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_66
# %bb.65:
	callq	_Z20__device_stub__emptyv
.LBB2_66:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_68
# %bb.67:
	callq	_Z20__device_stub__emptyv
.LBB2_68:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_70
# %bb.69:
	callq	_Z20__device_stub__emptyv
.LBB2_70:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_72
# %bb.71:
	callq	_Z20__device_stub__emptyv
.LBB2_72:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_74
# %bb.73:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_74:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_76
# %bb.75:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_76:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_78
# %bb.77:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_78:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_80
# %bb.79:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_80:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_82
# %bb.81:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_82:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_84
# %bb.83:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_84:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_86
# %bb.85:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_86:
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_88
# %bb.87:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_88:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_90
# %bb.89:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_90:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_92
# %bb.91:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_92:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_94
# %bb.93:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_94:
	movq	8(%rsp), %r9
	movl	$32, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_96
# %bb.95:
	movl	$1, %edi
	movl	$2, %esi
	movl	$3, %edx
	callq	_Z23__device_stub__nonemptyiii
.LBB2_96:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movl	$16, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
.LBB2_97:                               # =>This Inner Loop Header: Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp,%rbx,4), %xmm0
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$4, %rbx
	jne	.LBB2_97
# %bb.98:
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19__device_stub__axpyIfEvT_PS0_S1_,"axG",@progbits,_Z19__device_stub__axpyIfEvT_PS0_S1_,comdat
	.weak	_Z19__device_stub__axpyIfEvT_PS0_S1_ # -- Begin function _Z19__device_stub__axpyIfEvT_PS0_S1_
	.type	_Z19__device_stub__axpyIfEvT_PS0_S1_,@function
_Z19__device_stub__axpyIfEvT_PS0_S1_:   # @_Z19__device_stub__axpyIfEvT_PS0_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movss	%xmm0, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rdi, (%rcx)
	leaq	32(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4axpyIfEvT_PS0_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z19__device_stub__axpyIfEvT_PS0_S1_, .Lfunc_end3-_Z19__device_stub__axpyIfEvT_PS0_S1_
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__axpy_emptyIfEvv,"axG",@progbits,_Z25__device_stub__axpy_emptyIfEvv,comdat
	.weak	_Z25__device_stub__axpy_emptyIfEvv # -- Begin function _Z25__device_stub__axpy_emptyIfEvv
	.type	_Z25__device_stub__axpy_emptyIfEvv,@function
_Z25__device_stub__axpy_emptyIfEvv:     # @_Z25__device_stub__axpy_emptyIfEvv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z10axpy_emptyIfEvv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__axpy_emptyIfEvv, .Lfunc_end4-_Z25__device_stub__axpy_emptyIfEvv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5emptyv, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8nonemptyiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4axpyIfEvT_PS0_S1_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10axpy_emptyIfEvv, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5emptyv,@object               # @_Z5emptyv
	.section	.rodata,"a",@progbits
	.globl	_Z5emptyv
	.p2align	3, 0x0
_Z5emptyv:
	.quad	_Z20__device_stub__emptyv
	.size	_Z5emptyv, 8

	.type	_Z8nonemptyiii,@object          # @_Z8nonemptyiii
	.globl	_Z8nonemptyiii
	.p2align	3, 0x0
_Z8nonemptyiii:
	.quad	_Z23__device_stub__nonemptyiii
	.size	_Z8nonemptyiii, 8

	.type	_Z4axpyIfEvT_PS0_S1_,@object    # @_Z4axpyIfEvT_PS0_S1_
	.section	.rodata._Z4axpyIfEvT_PS0_S1_,"aG",@progbits,_Z4axpyIfEvT_PS0_S1_,comdat
	.weak	_Z4axpyIfEvT_PS0_S1_
	.p2align	3, 0x0
_Z4axpyIfEvT_PS0_S1_:
	.quad	_Z19__device_stub__axpyIfEvT_PS0_S1_
	.size	_Z4axpyIfEvT_PS0_S1_, 8

	.type	_Z10axpy_emptyIfEvv,@object     # @_Z10axpy_emptyIfEvv
	.section	.rodata._Z10axpy_emptyIfEvv,"aG",@progbits,_Z10axpy_emptyIfEvv,comdat
	.weak	_Z10axpy_emptyIfEvv
	.p2align	3, 0x0
_Z10axpy_emptyIfEvv:
	.quad	_Z25__device_stub__axpy_emptyIfEvv
	.size	_Z10axpy_emptyIfEvv, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"y["
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"] = "
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n"
	.size	.L.str.2, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5emptyv"
	.size	.L__unnamed_1, 10

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8nonemptyiii"
	.size	.L__unnamed_2, 15

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z4axpyIfEvT_PS0_S1_"
	.size	.L__unnamed_3, 21

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z10axpy_emptyIfEvv"
	.size	.L__unnamed_4, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__emptyv
	.addrsig_sym _Z23__device_stub__nonemptyiii
	.addrsig_sym _Z19__device_stub__axpyIfEvT_PS0_S1_
	.addrsig_sym _Z25__device_stub__axpy_emptyIfEvv
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5emptyv
	.addrsig_sym _Z8nonemptyiii
	.addrsig_sym _Z4axpyIfEvT_PS0_S1_
	.addrsig_sym _Z10axpy_emptyIfEvv
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5emptyv               ; -- Begin function _Z5emptyv
	.globl	_Z5emptyv
	.p2align	8
	.type	_Z5emptyv,@function
_Z5emptyv:                              ; @_Z5emptyv
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5emptyv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5emptyv, .Lfunc_end0-_Z5emptyv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8nonemptyiii          ; -- Begin function _Z8nonemptyiii
	.globl	_Z8nonemptyiii
	.p2align	8
	.type	_Z8nonemptyiii,@function
_Z8nonemptyiii:                         ; @_Z8nonemptyiii
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8nonemptyiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8nonemptyiii, .Lfunc_end1-_Z8nonemptyiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z4axpyIfEvT_PS0_S1_,"axG",@progbits,_Z4axpyIfEvT_PS0_S1_,comdat
	.protected	_Z4axpyIfEvT_PS0_S1_    ; -- Begin function _Z4axpyIfEvT_PS0_S1_
	.globl	_Z4axpyIfEvT_PS0_S1_
	.p2align	8
	.type	_Z4axpyIfEvT_PS0_S1_,@function
_Z4axpyIfEvT_PS0_S1_:                   ; @_Z4axpyIfEvT_PS0_S1_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s0, s[0:1], 0x0
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[4:5]
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v1, s0, v1
	global_store_b32 v0, v1, s[6:7]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4axpyIfEvT_PS0_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z4axpyIfEvT_PS0_S1_,"axG",@progbits,_Z4axpyIfEvT_PS0_S1_,comdat
.Lfunc_end2:
	.size	_Z4axpyIfEvT_PS0_S1_, .Lfunc_end2-_Z4axpyIfEvT_PS0_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 64
; NumSgprs: 8
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z10axpy_emptyIfEvv,"axG",@progbits,_Z10axpy_emptyIfEvv,comdat
	.protected	_Z10axpy_emptyIfEvv     ; -- Begin function _Z10axpy_emptyIfEvv
	.globl	_Z10axpy_emptyIfEvv
	.p2align	8
	.type	_Z10axpy_emptyIfEvv,@function
_Z10axpy_emptyIfEvv:                    ; @_Z10axpy_emptyIfEvv
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10axpy_emptyIfEvv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10axpy_emptyIfEvv,"axG",@progbits,_Z10axpy_emptyIfEvv,comdat
.Lfunc_end3:
	.size	_Z10axpy_emptyIfEvv, .Lfunc_end3-_Z10axpy_emptyIfEvv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5emptyv
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z5emptyv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8nonemptyiii
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z8nonemptyiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4axpyIfEvT_PS0_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z4axpyIfEvT_PS0_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10axpy_emptyIfEvv
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z10axpy_emptyIfEvv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
