#include "includes.h"
__global__ void computeDotProducts(float3* pDotProducts, size_t pSize, int* pCandidates, size_t* pJumpLength, size_t* pCandidateSize, size_t pNumberOfCandidates, int* pFeatureIdsNeighbor, float* pValuesNeighbor, size_t pMaxNnzNeighbor, size_t* pSizeNeighbor, int* pFeatureIdsInstance, float* pValuesInstance, size_t pMaxNnzInstance, size_t* pSizeInstance, float* pPreComputedDotProductsNeighbor, float* pPreComputedDotProductsInstance) {


int instanceCandidates = blockIdx.x;
int round = 0;
int i = 0;
const int threadCount = 32;
__shared__ int instanceCounter;
__shared__ int neighbor;
__shared__ int instance;

__shared__ int featureIdX[threadCount];
__shared__ int featureIdY[threadCount];
__shared__ float value[threadCount];
__shared__ int pStartPosX;
__shared__ int pEndPosX;
__shared__ int pStartPosY;
__shared__ int pEndPosY;

while (instanceCandidates < pNumberOfCandidates) {
if (threadIdx.x == 0) {
neighbor = pCandidates[pJumpLength[instanceCandidates]];
instanceCounter = 0;
}
__syncthreads();
while (instanceCounter < pCandidateSize[neighbor]) {

if (threadIdx.x == 0) {
instance = pCandidates[pJumpLength[instanceCandidates]+instanceCounter];
pStartPosX = neighbor*pMaxNnzNeighbor;
pEndPosX = neighbor*pMaxNnzNeighbor + pSizeNeighbor[neighbor];
pStartPosY = instance*pMaxNnzInstance;
pEndPosY = instance*pMaxNnzInstance + pSizeInstance[instance];
}
value[threadIdx.x] = 0.0;

__syncthreads();

while (pStartPosX < pEndPosX+threadCount - (pEndPosX%threadCount) && pStartPosY < pEndPosY+threadCount - (pEndPosY%threadCount) ) {

featureIdX[threadIdx.x] = pFeatureIdsNeighbor[pStartPosX + threadIdx.x];
featureIdY[threadIdx.x] = pFeatureIdsInstance[pStartPosY + threadIdx.x];

while (round < threadCount) {
if (featureIdX[(threadIdx.x + round) % threadCount] == featureIdY[threadIdx.x]) {
value[threadIdx.x] += pValuesNeighbor[pStartPosX + ((threadIdx.x + round) % threadCount)] * pValuesInstance[pStartPosY + threadIdx.x];
break;
}
++round;
}
__syncthreads();
round = 0;
if (threadIdx.x == 0) {
if (featureIdX[threadCount-1] == featureIdY[threadCount-1]) {
pStartPosY += threadCount;
pStartPosX += threadCount;
} else if (featureIdX[threadCount-1] < featureIdY[threadCount-1]) {
pStartPosX += threadCount;
} else {
pStartPosY += threadCount;
}
}
__syncthreads();
}
__syncthreads();

i = blockDim.x/2;
while (i != 0) {
if (threadIdx.x < i) {
value[threadIdx.x] += value[threadIdx.x + i];
}
__syncthreads();
i /= 2;
}
if (threadIdx.x == 0) {
pDotProducts[pJumpLength[instanceCandidates]+instanceCounter].y = value[0];
pDotProducts[pJumpLength[instanceCandidates]+instanceCounter].x = pPreComputedDotProductsNeighbor[neighbor];
pDotProducts[pJumpLength[instanceCandidates]+instanceCounter].z = pPreComputedDotProductsInstance[instance];
++instanceCounter;
}
__syncthreads();
}
instanceCandidates += gridDim.x;
}
}
	.file	"tmpxft_002d1999_00000000-6_computeDotProducts.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z78__device_stub__Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_P6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_
	.type	_Z78__device_stub__Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_P6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_, @function
_Z78__device_stub__Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_P6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$328, %rsp
	.cfi_def_cfa_offset 336
	movq	336(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	136(%rsp), %rdi
	movq	%rsi, 96(%rsp)
	leaq	148(%rsp), %rsi
	movq	%rax, 56(%rsp)
	movq	344(%rsp), %rax
	movq	%rdx, 88(%rsp)
	leaq	120(%rsp), %rdx
	movq	%rax, 48(%rsp)
	movq	360(%rsp), %rax
	movq	%rcx, 80(%rsp)
	leaq	128(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movq	368(%rsp), %rax
	movq	%r8, 72(%rsp)
	movq	%rax, 32(%rsp)
	movq	376(%rsp), %rax
	movq	%r9, 64(%rsp)
	movq	%rax, 24(%rsp)
	movq	392(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	400(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	408(%rsp), %rax
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 312(%rsp)
	xorl	%eax, %eax
	leaq	104(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	384(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 296(%rsp)
	movq	%rsp, %rax
	movq	%rax, 304(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 136(%rsp)
	movl	$1, 144(%rsp)
	movq	%rax, 148(%rsp)
	movl	$1, 156(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	128(%rsp)
	.cfi_def_cfa_offset 344
	leaq	_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_(%rip), %rdi
	pushq	128(%rsp)
	.cfi_def_cfa_offset 352
	movq	164(%rsp), %rcx
	movl	172(%rsp), %r8d
	movq	152(%rsp), %rsi
	movl	160(%rsp), %edx
	leaq	200(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 344
	popq	%rdx
	.cfi_def_cfa_offset 336
.L2:
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$328, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z78__device_stub__Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_P6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_, .-_Z78__device_stub__Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_P6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_
	.globl	_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_
	.type	_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_, @function
_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z78__device_stub__Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_P6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_
	.cfi_endproc
.LFE2033:
	.size	_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_, .-_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18computeDotProductsP6float3mPiPmS2_mS1_PfmS2_S1_S3_mS2_S3_S3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__global__ void computeDotProducts(float3* pDotProducts, size_t pSize, int* pCandidates, size_t* pJumpLength, size_t* pCandidateSize, size_t pNumberOfCandidates, int* pFeatureIdsNeighbor, float* pValuesNeighbor, size_t pMaxNnzNeighbor, size_t* pSizeNeighbor, int* pFeatureIdsInstance, float* pValuesInstance, size_t pMaxNnzInstance, size_t* pSizeInstance, float* pPreComputedDotProductsNeighbor, float* pPreComputedDotProductsInstance) {


int instanceCandidates = blockIdx.x;
int round = 0;
int i = 0;
const int threadCount = 32;
__shared__ int instanceCounter;
__shared__ int neighbor;
__shared__ int instance;

__shared__ int featureIdX[threadCount];
__shared__ int featureIdY[threadCount];
__shared__ float value[threadCount];
__shared__ int pStartPosX;
__shared__ int pEndPosX;
__shared__ int pStartPosY;
__shared__ int pEndPosY;

while (instanceCandidates < pNumberOfCandidates) {
if (threadIdx.x == 0) {
neighbor = pCandidates[pJumpLength[instanceCandidates]];
instanceCounter = 0;
}
__syncthreads();
while (instanceCounter < pCandidateSize[neighbor]) {

if (threadIdx.x == 0) {
instance = pCandidates[pJumpLength[instanceCandidates]+instanceCounter];
pStartPosX = neighbor*pMaxNnzNeighbor;
pEndPosX = neighbor*pMaxNnzNeighbor + pSizeNeighbor[neighbor];
pStartPosY = instance*pMaxNnzInstance;
pEndPosY = instance*pMaxNnzInstance + pSizeInstance[instance];
}
value[threadIdx.x] = 0.0;

__syncthreads();

while (pStartPosX < pEndPosX+threadCount - (pEndPosX%threadCount) && pStartPosY < pEndPosY+threadCount - (pEndPosY%threadCount) ) {

featureIdX[threadIdx.x] = pFeatureIdsNeighbor[pStartPosX + threadIdx.x];
featureIdY[threadIdx.x] = pFeatureIdsInstance[pStartPosY + threadIdx.x];

while (round < threadCount) {
if (featureIdX[(threadIdx.x + round) % threadCount] == featureIdY[threadIdx.x]) {
value[threadIdx.x] += pValuesNeighbor[pStartPosX + ((threadIdx.x + round) % threadCount)] * pValuesInstance[pStartPosY + threadIdx.x];
break;
}
++round;
}
__syncthreads();
round = 0;
if (threadIdx.x == 0) {
if (featureIdX[threadCount-1] == featureIdY[threadCount-1]) {
pStartPosY += threadCount;
pStartPosX += threadCount;
} else if (featureIdX[threadCount-1] < featureIdY[threadCount-1]) {
pStartPosX += threadCount;
} else {
pStartPosY += threadCount;
}
}
__syncthreads();
}
__syncthreads();

i = blockDim.x/2;
while (i != 0) {
if (threadIdx.x < i) {
value[threadIdx.x] += value[threadIdx.x + i];
}
__syncthreads();
i /= 2;
}
if (threadIdx.x == 0) {
pDotProducts[pJumpLength[instanceCandidates]+instanceCounter].y = value[0];
pDotProducts[pJumpLength[instanceCandidates]+instanceCounter].x = pPreComputedDotProductsNeighbor[neighbor];
pDotProducts[pJumpLength[instanceCandidates]+instanceCounter].z = pPreComputedDotProductsInstance[instance];
++instanceCounter;
}
__syncthreads();
}
instanceCandidates += gridDim.x;
}
}
	.text
	.file	"computeDotProducts.hip"
	.globl	_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_ # -- Begin function _Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.type	_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_,@function
_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_: # @_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_, .Lfunc_end0-_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_,@object # @_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.section	.rodata,"a",@progbits
	.globl	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.p2align	3, 0x0
_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_:
	.quad	_Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.size	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_"
	.size	.L__unnamed_1, 82

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_ ; -- Begin function _Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.globl	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
	.p2align	8
	.type	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_,@function
_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_: ; @_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
; %bb.0:
	s_mov_b32 s34, s15
	s_load_b512 s[4:19], s[0:1], 0x10
	s_ashr_i32 s35, s34, 31
	s_waitcnt lgkmcnt(0)
	v_cmp_ge_u64_e64 s2, s[34:35], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_34
; %bb.1:                                ; %.lr.ph68
	s_clause 0x3
	s_load_b64 s[36:37], s[0:1], 0x0
	s_load_b256 s[20:27], s[0:1], 0x50
	s_load_b128 s[28:31], s[0:1], 0x70
	s_load_b32 s3, s[0:1], 0x80
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v9, 2, v0
	v_cmp_eq_u32_e64 s2, 0, v0
	v_mov_b32_e32 v12, 0x180
	s_add_u32 s0, s0, 0x80
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v10, 0x100, v9
	v_add_nc_u32_e32 v11, 0x80, v9
	s_addc_u32 s1, s1, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
                                        ;       Child Loop BB0_27 Depth 3
	s_and_saveexec_b32 s17, s2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_lshl_b64 s[38:39], s[34:35], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_u32 s38, s6, s38
	s_addc_u32 s39, s7, s39
	global_load_b64 v[3:4], v2, s[38:39]
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v2, v2, v1 offset0:98 offset1:100
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[7:8], v2 offset0:98 offset1:100
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v3, v8
	v_ashrrev_i32_e32 v4, 31, v8
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[3:4]
	v_add_co_u32 v5, vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_le_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_cbranch_vccnz .LBB0_33
; %bb.5:                                ; %.lr.ph64
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s17, s[0:1], 0xc
	s_lshl_b64 s[38:39], s[34:35], 3
	v_mov_b32_e32 v6, v3
	s_add_u32 s38, s6, s38
	s_addc_u32 s39, s7, s39
	s_waitcnt lgkmcnt(0)
	s_and_b32 s25, s17, 0xffff
	s_bfe_u32 s17, s17, 0xf0001
	s_cmp_gt_u32 s25, 1
	s_cselect_b32 s25, -1, 0
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_11 Depth 4
                                        ;       Child Loop BB0_27 Depth 3
	s_and_saveexec_b32 s33, s2
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	global_load_b64 v[13:14], v2, s[38:39]
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v1, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, v5, v8, vcc_lo
	v_lshlrev_b64 v[4:5], 3, v[3:4]
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v4, vcc_lo, s18, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 3, v[7:8]
	v_mul_lo_u32 v8, v3, s16
	v_mul_lo_u32 v3, v6, s16
	v_add_co_u32 v13, vcc_lo, s26, v13
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v14, vcc_lo, s27, v14, vcc_lo
	global_load_b32 v1, v[4:5], off
	global_load_b32 v5, v[13:14], off
	v_mul_lo_u32 v13, v7, s24
	v_mul_lo_u32 v4, v7, s24
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v1, v1, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v5, v5, v13
	ds_store_b64 v2, v[3:4] offset:384
	ds_store_b32 v2, v7 offset:396
	ds_store_2addr_b32 v2, v1, v5 offset0:101 offset1:102
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s33
	ds_store_b32 v10, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[3:4], v2 offset0:96 offset1:101
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 27, v1
	v_add_nc_u32_e32 v1, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 0xffffffe0, v1
	v_add_nc_u32_e32 v1, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v1
	s_cbranch_vccnz .LBB0_26
.LBB0_9:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_11 Depth 4
	ds_load_2addr_b32 v[4:5], v2 offset0:97 offset1:102
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 27, v1
	v_add_nc_u32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 0xffffffe0, v1
	v_add_nc_u32_e32 v1, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v4, v1
	s_cbranch_vccnz .LBB0_19
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=3
	v_add_nc_u32_e32 v1, v3, v0
	s_mov_b32 s33, 0
	s_mov_b32 s35, 0
                                        ; implicit-def: $sgpr40
                                        ; implicit-def: $sgpr42
                                        ; implicit-def: $sgpr41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_nc_u32_e32 v1, v4, v0
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s20, v4
	v_add_co_ci_u32_e32 v14, vcc_lo, s21, v5, vcc_lo
	global_load_b32 v6, v[6:7], off
	global_load_b32 v1, v[13:14], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v6
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v1
.LBB0_11:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_add_nc_u32_e32 v6, s35, v0
	s_or_b32 s41, s41, exec_lo
	s_or_b32 s42, s42, exec_lo
	s_mov_b32 s43, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, 31, v6
	v_lshlrev_b32_e32 v7, 2, v6
	ds_load_b32 v7, v7
	s_waitcnt lgkmcnt(0)
	v_cmpx_ne_u32_e64 v7, v1
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=4
	s_add_i32 s35, s35, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s35, 32
	s_cselect_b32 s44, -1, 0
	s_and_not1_b32 s42, s42, exec_lo
	s_and_b32 s44, s44, exec_lo
	s_and_not1_b32 s41, s41, exec_lo
	s_or_b32 s42, s42, s44
; %bb.13:                               ; %Flow128
                                        ;   in Loop: Header=BB0_11 Depth=4
	s_or_b32 exec_lo, exec_lo, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s43, exec_lo, s42
	s_or_b32 s33, s43, s33
	s_and_not1_b32 s40, s40, exec_lo
	s_and_b32 s43, s41, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s40, s40, s43
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB0_11
; %bb.14:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s33
	s_and_saveexec_b32 s33, s40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s33, exec_lo, s33
	s_cbranch_execz .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_9 Depth=3
	v_add_nc_u32_e32 v1, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s14, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v7, vcc_lo
	v_add_co_u32 v3, vcc_lo, s22, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s23, v5, vcc_lo
	global_load_b32 v1, v[6:7], off
	global_load_b32 v3, v[3:4], off
	ds_load_b32 v4, v10
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v4, v1, v3
	ds_store_b32 v10, v4
.LBB0_16:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s33
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s33, s2
	s_cbranch_execz .LBB0_24
; %bb.17:                               ;   in Loop: Header=BB0_9 Depth=3
	ds_load_2addr_b32 v[3:4], v2 offset0:31 offset1:63
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v3, v4
	s_cbranch_vccz .LBB0_20
; %bb.18:                               ;   in Loop: Header=BB0_9 Depth=3
	v_cmp_lt_i32_e32 vcc_lo, v3, v4
	s_mov_b32 s35, 0
	v_cndmask_b32_e32 v1, 0x184, v12, vcc_lo
	s_branch .LBB0_21
.LBB0_19:                               ;   in Loop: Header=BB0_9 Depth=3
	s_mov_b32 s33, -1
                                        ; implicit-def: $vgpr3
	s_branch .LBB0_25
.LBB0_20:                               ;   in Loop: Header=BB0_9 Depth=3
	s_mov_b32 s35, -1
                                        ; implicit-def: $vgpr1
.LBB0_21:                               ; %Flow126
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s35
	s_cbranch_vccnz .LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_9 Depth=3
	ds_load_b32 v1, v2 offset:388
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, 32, v1
	v_mov_b32_e32 v1, 0x180
	ds_store_b32 v2, v3 offset:388
.LBB0_23:                               ; %.sink.split
                                        ;   in Loop: Header=BB0_9 Depth=3
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, 32, v3
	ds_store_b32 v1, v3
.LBB0_24:                               ; %Flow127
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s33
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[3:4], v2 offset0:96 offset1:101
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v1, 27, v1
	v_add_nc_u32_e32 v1, v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, 0xffffffe0, v1
	v_add_nc_u32_e32 v1, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e64 s33, v3, v1
.LBB0_25:                               ; %Flow129
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s33
	s_cbranch_vccz .LBB0_9
.LBB0_26:                               ; %.critedge
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s25
	s_mov_b32 s33, s17
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_30
.LBB0_27:                               ; %.lr.ph62
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_mov_b32 s35, exec_lo
	v_cmpx_gt_u32_e64 s33, v0
	s_cbranch_execz .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_27 Depth=3
	v_lshl_add_u32 v1, s33, 2, v10
	ds_load_b32 v1, v1
	ds_load_b32 v3, v10
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v3
	ds_store_b32 v10, v1
.LBB0_29:                               ;   in Loop: Header=BB0_27 Depth=3
	s_or_b32 exec_lo, exec_lo, s35
	s_lshr_b32 s35, s33, 1
	s_cmp_gt_u32 s33, 1
	s_mov_b32 s33, s35
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_27
.LBB0_30:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_and_saveexec_b32 s33, s2
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_6 Depth=2
	global_load_b64 v[3:4], v2, s[38:39]
	ds_load_b64 v[5:6], v2 offset:392
	ds_load_b32 v7, v2 offset:400
	ds_load_b32 v8, v2 offset:256
	s_waitcnt lgkmcnt(2)
	v_mul_lo_u32 v13, v5, 12
	v_mul_hi_i32 v14, v5, 12
	v_add_nc_u32_e32 v5, 1, v5
	ds_store_b32 v2, v5 offset:392
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v1, v4, 12
	v_mul_hi_u32 v4, v3, 12
	v_mul_lo_u32 v3, v3, 12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v4, v1
	v_add_co_u32 v3, vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s37, v1, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, v1, v14, vcc_lo
	s_waitcnt lgkmcnt(1)
	global_store_b32 v[3:4], v8, off offset:4
	global_load_b64 v[3:4], v2, s[38:39]
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s28, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s29, v8, vcc_lo
	global_load_b32 v1, v[7:8], off
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v4, v4, 12
	v_mul_hi_u32 v7, v3, 12
	v_mul_lo_u32 v3, v3, 12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v7, v4
	v_add_co_u32 v3, vcc_lo, s36, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s30, v6
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v1, off
	global_load_b64 v[3:4], v2, s[38:39]
	v_add_co_ci_u32_e32 v7, vcc_lo, s31, v7, vcc_lo
	global_load_b32 v1, v[6:7], off
	s_waitcnt vmcnt(1)
	v_mul_lo_u32 v4, v4, 12
	v_mul_hi_u32 v6, v3, 12
	v_mul_lo_u32 v3, v3, 12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v4, v14, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[3:4], v1, off offset:8
.LBB0_32:                               ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s33
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[5:6], v2 offset0:98 offset1:100
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v4, 31, v6
	v_mov_b32_e32 v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[3:4]
	v_add_co_u32 v7, vcc_lo, s8, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	global_load_b64 v[13:14], v[7:8], off
	v_ashrrev_i32_e32 v8, 31, v5
	v_mov_b32_e32 v7, v5
	s_waitcnt vmcnt(0)
	v_cmp_gt_u64_e32 vcc_lo, v[13:14], v[7:8]
	s_cbranch_vccnz .LBB0_6
.LBB0_33:                               ; %._crit_edge65
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s34, s3, s34
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s35, s34, 31
	v_cmp_lt_u64_e64 s17, s[34:35], s[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_2
.LBB0_34:                               ; %._crit_edge69
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
		.amdhsa_group_segment_fixed_size 412
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 384
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 45
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_, .Lfunc_end0-_Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1940
; NumSgprs: 47
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 412 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 47
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .offset:         128
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         132
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         140
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         142
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         144
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         146
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         148
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         150
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         192
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 412
    .kernarg_segment_align: 8
    .kernarg_segment_size: 384
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_
    .private_segment_fixed_size: 0
    .sgpr_count:     47
    .sgpr_spill_count: 0
    .symbol:         _Z18computeDotProductsP15HIP_vector_typeIfLj3EEmPiPmS3_mS2_PfmS3_S2_S4_mS3_S4_S4_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
