#include<iostream>
#include <cuda.h>
#include <math.h>
#include<stdio.h>
#include<stdlib.h>
#include <sys/types.h>
#include <time.h>



using namespace std;

__device__ int min2(int a, int b)
{
	int m = a;
	if(m > b)
		m=b;
	return m;
}
__device__ int min1(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

int min3(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

void swapPointers(int **prev,int **current)
{
     int * temp = *prev;
     *prev      = *current;
     *current   = temp;
}



__global__ void main_work(char* s1, char *s2, int* G1, int* G2, int* D1, int* D2, int* I1, int* I2, int* u, int* v, int* se, int ge, int gi, int n, int i, int numElements)
{
	int j =   blockIdx.x * blockDim.x + threadIdx.x;
	int s=0;
	
	if( j > numElements ) return ;
	
	__syncthreads();
			if(j==0 && i>0)
			{
				G2[0]=gi+ge*i;
				I2[0]=G2[0]+ge;
			}
			if(j>0 && i == 0)
			{
				G1[j]=gi+ge*j;
				D1[j]=G1[j]+ge;
			}
			if(i>0 && j>0)
			{
				D2[j]=min2(D1[j],G1[j]+gi)+ge;
				__syncthreads();
				if(s1[i]!=s2[j])
					s=1;
				else
					s=0;
				__syncthreads();
				u[j] = min2(D2[j],G1[j-1]+s);
				__syncthreads();
				v[j] = u[j]+gi-j*ge;
				__syncthreads();
				se[j]=v[j];
				__syncthreads();
				for(int k=1; k<=j;k++)
				{
					if(se[j] > v[k])
						se[j]=v[k];
				}
				__syncthreads();
				I2[j+1]=se[j]+(j+1)*ge;
				__syncthreads();
				if(j==1)
					I2[1]=min2(I2[0],G2[0]+gi) + ge;
				__syncthreads();
				G2[j]=min1(D2[j],I2[j],G1[j-1]+s);
			}
}


int main(int argc, char** argv)
{
	int i,n;
	time_t t0, t1;
    clock_t c0,c1;
	char skip;

	scanf("%d",&n);
	printf("%d \n",n);
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	size_t size = (n+1) * sizeof(char);
	size_t size1 = (n+1)*sizeof(int);

	char* h_s1 = (char*)malloc(size);
	char* h_s2 = (char*)malloc(size);
	
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s1[i]);
	}
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s2[i]);
	}
	

	t0=time(NULL);
        c0=clock();

        printf ("\tbegin (wall):            %ld\n", (long) t0);
        printf ("\tbegin (CPU):             %d\n", (int) c0);
	
	int* h_D1 = (int*)malloc(size1);
	int* h_D2 = (int*)malloc(size1);
	int* h_G1 = (int*)malloc(size1);
	int* h_G2 = (int*)malloc(size1);
	int* h_I1 = (int*)malloc(size1);
	int* h_I2 = (int*)malloc(size1);
	
	int gi,ge,cost;
	gi=2;ge=1;
	
		int *d_D1, *d_D2;
    	cudaMalloc(&d_D1, size1);
		cudaMalloc(&d_D2, size1);
    	int *d_G1, *d_G2;
    	cudaMalloc(&d_G1, size1);
		cudaMalloc(&d_G2, size1);
    	int *d_I1, *d_I2;
    	cudaMalloc(&d_I1, size1);
		cudaMalloc(&d_I2, size1);
    	int *d_u, *d_v, *d_se;
    	cudaMalloc(&d_u, size1);
		cudaMalloc(&d_v, size1);
		cudaMalloc(&d_se, size1);
	
	char *d_s1, *d_s2;
	cudaMalloc(&d_s1, size);
	cudaMalloc(&d_s2, size);

    cudaMemcpy(d_s1, h_s1, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_s2, h_s2, size, cudaMemcpyHostToDevice);
	
	h_G1[0]=0;										
	cudaMemcpy(d_G1, h_G1, size1, cudaMemcpyHostToDevice);
	
	int num_threads;
	int num_blocks;
	int numElements;
	
		numElements = n+1;
		if( numElements <= 256) {
		 num_threads = numElements;
		 num_blocks =1 ;
		 }
		 else
		 {
		   num_threads = 256 ;
		   num_blocks = numElements/num_threads + ((numElements/num_threads == 0) ? 0 : 1) ;
		 }

	for(i=0;i<=n;i++)								
	{
	
		
		main_work<<<num_blocks,num_threads>>>(d_s1, d_s2, d_G1, d_G2, d_D1, d_D2, d_I1, d_I2, d_u, d_v, d_se, ge, gi, n, i, numElements);
		
		if(i > 0)
		{
			swapPointers(&d_D1,&d_D2);
			swapPointers(&d_I1,&d_I2);
			swapPointers(&d_G1,&d_G2);
		}

	}													//--- end of loop for calculation
	
	cudaMemcpy(h_D1, d_D1, size1, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_D2, d_D2, size1, cudaMemcpyDeviceToHost);
    	cudaMemcpy(h_G1, d_G1, size1, cudaMemcpyDeviceToHost);
   	cudaMemcpy(h_G2, d_G2, size1, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_I1, d_I1, size1, cudaMemcpyDeviceToHost);
	cudaMemcpy(h_I2, d_I2, size1, cudaMemcpyDeviceToHost);
	
	cost=min3(h_D1[n],h_I1[n],h_G1[n]);			//--- allignment cost
	
	cout<<"Optimal Allignment cost: "<<cost<<endl;
	
	t1=time(NULL);
        c1=clock();
        printf ("\telapsed wall clock time: %ld\n", (long) (t1 - t0));
        printf ("\telapsed CPU time:        %f\n", (float) (c1 - c0)/CLOCKS_PER_SEC);
	
	cudaFree(d_D1);
	cudaFree(d_D2);
	cudaFree(d_I1);
	cudaFree(d_I2);
	cudaFree(d_G1);
	cudaFree(d_G2);
	cudaFree(d_u);
	cudaFree(d_v);
	cudaFree(d_se);
	
	free(h_s1);
	free(h_s2);
	return 0;
}


	.file	"tmpxft_002eafd6_00000000-6_row.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0:
.LFB4298:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4298:
	.size	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	.globl	_Z4min2ii
	.type	_Z4min2ii, @function
_Z4min2ii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z4min2ii, .-_Z4min2ii
	.globl	_Z4min1iii
	.type	_Z4min1iii, @function
_Z4min1iii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z4min1iii, .-_Z4min1iii
	.globl	_Z4min3iii
	.type	_Z4min3iii, @function
_Z4min3iii:
.LFB3637:
	.cfi_startproc
	endbr64
	cmpl	%edx, %esi
	movl	%edi, %eax
	cmovg	%edx, %esi
	cmpl	%edi, %esi
	cmovle	%esi, %eax
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z4min3iii, .-_Z4min3iii
	.globl	_Z12swapPointersPPiS0_
	.type	_Z12swapPointersPPiS0_, @function
_Z12swapPointersPPiS0_:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	movq	%rdx, (%rdi)
	movq	%rax, (%rsi)
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z12swapPointersPPiS0_, .-_Z12swapPointersPPiS0_
	.globl	_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.type	_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, @function
_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	320(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	120(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	132(%rsp), %rsi
	movq	%rax, 40(%rsp)
	movq	328(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	104(%rsp), %rdx
	movq	%rax, 32(%rsp)
	movq	336(%rsp), %rax
	movq	%rcx, 64(%rsp)
	leaq	112(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	352(%rsp), %rax
	movq	%r9, 48(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	384(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	392(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 120(%rsp)
	movl	$1, 128(%rsp)
	movq	%rax, 132(%rsp)
	movl	$1, 140(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	112(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii(%rip), %rdi
	pushq	112(%rsp)
	.cfi_def_cfa_offset 336
	movq	148(%rsp), %rcx
	movl	156(%rsp), %r8d
	movq	136(%rsp), %rsi
	movl	144(%rsp), %edx
	leaq	184(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L9:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, .-_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.globl	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.type	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, @function
_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.cfi_endproc
.LFE3665:
	.size	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, .-_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d"
.LC1:
	.string	"%d \n"
.LC2:
	.string	"%c"
.LC3:
	.string	"\tbegin (wall):            %ld\n"
.LC4:
	.string	"\tbegin (CPU):             %d\n"
.LC5:
	.string	"Optimal Allignment cost: "
.LC6:
	.string	"\telapsed wall clock time: %ld\n"
.LC8:
	.string	"\telapsed CPU time:        %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	84(%rsp), %rsi
	call	__isoc23_scanf@PLT
	movl	84(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
.L16:
	leaq	83(%rsp), %rbx
	xorl	%eax, %eax
	movq	%r12, %rdi
	movq	%rbx, %rsi
	call	__isoc23_scanf@PLT
	cmpb	$10, 83(%rsp)
	jne	.L16
	movl	84(%rsp), %eax
	xorl	%r13d, %r13d
	leal	1(%rax), %ebp
	movslq	%ebp, %rbp
	leaq	0(,%rbp,4), %rax
	movq	%rbp, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rax, 16(%rsp)
.L17:
	incq	%r13
	cmpl	%r13d, 84(%rsp)
	jl	.L20
	movq	8(%rsp), %rax
	movq	%r12, %rdi
	leaq	(%rax,%r13), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L17
.L20:
	xorl	%eax, %eax
	movq	%rbx, %rsi
	movq	%r12, %rdi
	call	__isoc23_scanf@PLT
	cmpb	$10, 83(%rsp)
	jne	.L20
	xorl	%ebx, %ebx
.L19:
	incq	%rbx
	cmpl	%ebx, 84(%rsp)
	jl	.L35
	movq	16(%rsp), %rax
	movq	%r12, %rdi
	leaq	(%rax,%rbx), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	jmp	.L19
.L35:
	xorl	%edi, %edi
	call	time@PLT
	movq	%rax, 24(%rsp)
	call	clock@PLT
	movq	24(%rsp), %rdx
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	movq	%rax, 32(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	32(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 56(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 64(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 48(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	movq	%rax, 72(%rsp)
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rsi
	leaq	152(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	%rbp, %rsi
	leaq	160(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	%rbp, %rsi
	leaq	168(%rsp), %rdi
	call	_Z10cudaMallocIiE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	movq	%rbp, %rdx
	movq	160(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	%rbp, %rdx
	movq	168(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movq	(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	%eax, (%rbx)
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	84(%rsp), %eax
	leal	1(%rax), %ebp
	cmpl	$256, %ebp
	jle	.L29
	movl	%ebp, %r13d
	movl	$256, %r14d
	sarl	$8, %r13d
	incl	%r13d
	jmp	.L22
.L29:
	movl	%ebp, %r14d
	movl	$1, %r13d
.L22:
	movabsq	$4294967297, %r15
	xorl	%r12d, %r12d
.L23:
	cmpl	%r12d, 84(%rsp)
	jl	.L36
	movq	%r15, 192(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	196(%rsp), %ecx
	movq	%r15, 180(%rsp)
	movl	184(%rsp), %esi
	movl	%r14d, 188(%rsp)
	movq	188(%rsp), %rdx
	movl	%r13d, 176(%rsp)
	movq	176(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	%rbp
	.cfi_def_cfa_offset 280
	pushq	%r12
	.cfi_def_cfa_offset 288
	movl	100(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 296
	pushq	$2
	.cfi_def_cfa_offset 304
	pushq	$1
	.cfi_def_cfa_offset 312
	pushq	192(%rsp)
	.cfi_def_cfa_offset 320
	pushq	192(%rsp)
	.cfi_def_cfa_offset 328
	pushq	192(%rsp)
	.cfi_def_cfa_offset 336
	pushq	192(%rsp)
	.cfi_def_cfa_offset 344
	pushq	192(%rsp)
	.cfi_def_cfa_offset 352
	movq	176(%rsp), %r9
	movq	168(%rsp), %r8
	movq	192(%rsp), %rcx
	movq	184(%rsp), %rdx
	movq	248(%rsp), %rsi
	movq	240(%rsp), %rdi
	call	_Z61__device_stub__Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiiiPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	addq	$80, %rsp
	.cfi_def_cfa_offset 272
.L24:
	testl	%r12d, %r12d
	je	.L25
	movq	88(%rsp), %rax
	movq	96(%rsp), %rdx
	movq	%rax, 96(%rsp)
	movq	120(%rsp), %rax
	movq	%rdx, 88(%rsp)
	movq	128(%rsp), %rdx
	movq	%rax, 128(%rsp)
	movq	104(%rsp), %rax
	movq	%rdx, 120(%rsp)
	movq	112(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movq	%rdx, 104(%rsp)
.L25:
	incl	%r12d
	jmp	.L23
.L36:
	movq	(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	56(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	$2, %ecx
	movq	64(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	movq	48(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rdi
	movl	$2, %ecx
	movq	128(%rsp), %rsi
	call	cudaMemcpy@PLT
	movslq	84(%rsp), %rdx
	movq	48(%rsp), %rcx
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	(%rbx,%rdx,4), %eax
	movl	(%rcx,%rdx,4), %ecx
	cmpl	%ecx, %eax
	cmovg	%ecx, %eax
	movq	40(%rsp), %rcx
	movl	(%rcx,%rdx,4), %edx
	cmpl	%edx, %eax
	movl	%edx, %ebx
	cmovle	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%edi, %edi
	call	time@PLT
	movq	%rax, %rbx
	call	clock@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbp
	movq	24(%rsp), %rax
	subq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbx, %rdx
	call	__printf_chk@PLT
	movq	32(%rsp), %rax
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	subq	%rax, %rbp
	movb	$1, %al
	cvtsi2ssq	%rbp, %xmm0
	divss	.LC7(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC7:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<iostream>
#include <hip/hip_runtime.h>
#include <math.h>
#include<stdio.h>
#include<stdlib.h>
#include <sys/types.h>
#include <time.h>



using namespace std;

__device__ int min2(int a, int b)
{
	int m = a;
	if(m > b)
		m=b;
	return m;
}
__device__ int min1(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

int min3(int a,int b,int c)
{
	int m=a;
    if(m>b)
		m=b;
    if(m>c)
		m=c;
    return m;
}	

void swapPointers(int **prev,int **current)
{
     int * temp = *prev;
     *prev      = *current;
     *current   = temp;
}



__global__ void main_work(char* s1, char *s2, int* G1, int* G2, int* D1, int* D2, int* I1, int* I2, int* u, int* v, int* se, int ge, int gi, int n, int i, int numElements)
{
	int j =   blockIdx.x * blockDim.x + threadIdx.x;
	int s=0;
	
	if( j > numElements ) return ;
	
	__syncthreads();
			if(j==0 && i>0)
			{
				G2[0]=gi+ge*i;
				I2[0]=G2[0]+ge;
			}
			if(j>0 && i == 0)
			{
				G1[j]=gi+ge*j;
				D1[j]=G1[j]+ge;
			}
			if(i>0 && j>0)
			{
				D2[j]=min2(D1[j],G1[j]+gi)+ge;
				__syncthreads();
				if(s1[i]!=s2[j])
					s=1;
				else
					s=0;
				__syncthreads();
				u[j] = min2(D2[j],G1[j-1]+s);
				__syncthreads();
				v[j] = u[j]+gi-j*ge;
				__syncthreads();
				se[j]=v[j];
				__syncthreads();
				for(int k=1; k<=j;k++)
				{
					if(se[j] > v[k])
						se[j]=v[k];
				}
				__syncthreads();
				I2[j+1]=se[j]+(j+1)*ge;
				__syncthreads();
				if(j==1)
					I2[1]=min2(I2[0],G2[0]+gi) + ge;
				__syncthreads();
				G2[j]=min1(D2[j],I2[j],G1[j-1]+s);
			}
}


int main(int argc, char** argv)
{
	int i,n;
	time_t t0, t1;
    clock_t c0,c1;
	char skip;

	scanf("%d",&n);
	printf("%d \n",n);
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	size_t size = (n+1) * sizeof(char);
	size_t size1 = (n+1)*sizeof(int);

	char* h_s1 = (char*)malloc(size);
	char* h_s2 = (char*)malloc(size);
	
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s1[i]);
	}
	while(1)
	{
		scanf("%c",&skip);
		if(skip == '\n')
			break;
	}
	for(i=1; i<=n; i++)
	{
		scanf("%c",&h_s2[i]);
	}
	

	t0=time(NULL);
        c0=clock();

        printf ("\tbegin (wall):            %ld\n", (long) t0);
        printf ("\tbegin (CPU):             %d\n", (int) c0);
	
	int* h_D1 = (int*)malloc(size1);
	int* h_D2 = (int*)malloc(size1);
	int* h_G1 = (int*)malloc(size1);
	int* h_G2 = (int*)malloc(size1);
	int* h_I1 = (int*)malloc(size1);
	int* h_I2 = (int*)malloc(size1);
	
	int gi,ge,cost;
	gi=2;ge=1;
	
		int *d_D1, *d_D2;
    	hipMalloc(&d_D1, size1);
		hipMalloc(&d_D2, size1);
    	int *d_G1, *d_G2;
    	hipMalloc(&d_G1, size1);
		hipMalloc(&d_G2, size1);
    	int *d_I1, *d_I2;
    	hipMalloc(&d_I1, size1);
		hipMalloc(&d_I2, size1);
    	int *d_u, *d_v, *d_se;
    	hipMalloc(&d_u, size1);
		hipMalloc(&d_v, size1);
		hipMalloc(&d_se, size1);
	
	char *d_s1, *d_s2;
	hipMalloc(&d_s1, size);
	hipMalloc(&d_s2, size);

    hipMemcpy(d_s1, h_s1, size, hipMemcpyHostToDevice);
	hipMemcpy(d_s2, h_s2, size, hipMemcpyHostToDevice);
	
	h_G1[0]=0;										
	hipMemcpy(d_G1, h_G1, size1, hipMemcpyHostToDevice);
	
	int num_threads;
	int num_blocks;
	int numElements;
	
		numElements = n+1;
		if( numElements <= 256) {
		 num_threads = numElements;
		 num_blocks =1 ;
		 }
		 else
		 {
		   num_threads = 256 ;
		   num_blocks = numElements/num_threads + ((numElements/num_threads == 0) ? 0 : 1) ;
		 }

	for(i=0;i<=n;i++)								
	{
	
		
		main_work<<<num_blocks,num_threads>>>(d_s1, d_s2, d_G1, d_G2, d_D1, d_D2, d_I1, d_I2, d_u, d_v, d_se, ge, gi, n, i, numElements);
		
		if(i > 0)
		{
			swapPointers(&d_D1,&d_D2);
			swapPointers(&d_I1,&d_I2);
			swapPointers(&d_G1,&d_G2);
		}

	}													//--- end of loop for calculation
	
	hipMemcpy(h_D1, d_D1, size1, hipMemcpyDeviceToHost);
	hipMemcpy(h_D2, d_D2, size1, hipMemcpyDeviceToHost);
    	hipMemcpy(h_G1, d_G1, size1, hipMemcpyDeviceToHost);
   	hipMemcpy(h_G2, d_G2, size1, hipMemcpyDeviceToHost);
	hipMemcpy(h_I1, d_I1, size1, hipMemcpyDeviceToHost);
	hipMemcpy(h_I2, d_I2, size1, hipMemcpyDeviceToHost);
	
	cost=min3(h_D1[n],h_I1[n],h_G1[n]);			//--- allignment cost
	
	cout<<"Optimal Allignment cost: "<<cost<<endl;
	
	t1=time(NULL);
        c1=clock();
        printf ("\telapsed wall clock time: %ld\n", (long) (t1 - t0));
        printf ("\telapsed CPU time:        %f\n", (float) (c1 - c0)/CLOCKS_PER_SEC);
	
	hipFree(d_D1);
	hipFree(d_D2);
	hipFree(d_I1);
	hipFree(d_I2);
	hipFree(d_G1);
	hipFree(d_G2);
	hipFree(d_u);
	hipFree(d_v);
	hipFree(d_se);
	
	free(h_s1);
	free(h_s2);
	return 0;
}


	.text
	.file	"row.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z4min3iii                      # -- Begin function _Z4min3iii
	.type	_Z4min3iii,@function
_Z4min3iii:                             # @_Z4min3iii
	.cfi_startproc
# %bb.0:
	movl	%esi, %eax
	cmpl	%esi, %edi
	cmovll	%edi, %eax
	cmpl	%edx, %eax
	cmovgel	%edx, %eax
	retq
.Lfunc_end0:
	.size	_Z4min3iii, .Lfunc_end0-_Z4min3iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12swapPointersPPiS0_          # -- Begin function _Z12swapPointersPPiS0_
	.type	_Z12swapPointersPPiS0_,@function
_Z12swapPointersPPiS0_:                 # @_Z12swapPointersPPiS0_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movq	(%rsi), %rcx
	movq	%rcx, (%rdi)
	movq	%rax, (%rsi)
	retq
.Lfunc_end1:
	.size	_Z12swapPointersPPiS0_, .Lfunc_end1-_Z12swapPointersPPiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii # -- Begin function _Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.type	_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii,@function
_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii: # @_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, .Lfunc_end2-_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	4(%rsp), %rbx
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	3(%rsp), %rbx
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	cmpb	$10, 3(%rsp)
	jne	.LBB3_1
# %bb.2:
	movslq	4(%rsp), %rbx
	leaq	1(%rbx), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	testq	%rbx, %rbx
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
	movq	64(%rsp), %rax                  # 8-byte Reload
	leaq	1(%rax), %r14
	xorl	%r12d, %r12d
.LBB3_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r14,%r12), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	4(%rsp), %rax
	incq	%r12
	cmpq	%rax, %r12
	jl	.LBB3_4
.LBB3_5:                                # %.preheader85.preheader
	leaq	4(,%rbx,4), %r13
	leaq	3(%rsp), %rbx
.LBB3_6:                                # %.preheader85
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.2, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	cmpb	$10, 3(%rsp)
	jne	.LBB3_6
# %bb.7:                                # %.preheader
	cmpl	$0, 4(%rsp)
	jle	.LBB3_10
# %bb.8:                                # %.lr.ph90.preheader
	movq	56(%rsp), %rbx                  # 8-byte Reload
	incq	%rbx
	xorl	%r14d, %r14d
.LBB3_9:                                # %.lr.ph90
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rbx,%r14), %rsi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	4(%rsp), %rax
	incq	%r14
	cmpq	%rax, %r14
	jl	.LBB3_9
.LBB3_10:                               # %._crit_edge
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movq	%rax, %r12
	callq	clock
	movq	%rax, %r14
	movl	$.L.str.3, %edi
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movq	%r14, 144(%rsp)                 # 8-byte Spill
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	80(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	72(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	160(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	152(%rsp), %r14
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$0, (%r12)
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r12, %rbp
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	4(%rsp), %eax
	testl	%eax, %eax
	js	.LBB3_17
# %bb.11:                               # %.lr.ph94
	leal	1(%rax), %r14d
	movl	%r14d, %r15d
	shrl	$8, %r15d
	incl	%r15d
	movl	$256, %r12d                     # imm = 0x100
	cmpl	%r12d, %eax
	cmovbl	%r14d, %r12d
	movl	$1, %eax
	cmovbl	%eax, %r15d
	btsq	$32, %r15
	btsq	$32, %r12
.LBB3_12:                               # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_14
# %bb.13:                               #   in Loop: Header=BB3_12 Depth=1
	movq	160(%rsp), %rdi
	movq	152(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	48(%rsp), %r8
	movq	40(%rsp), %r9
	movl	4(%rsp), %eax
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	$2
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
.LBB3_14:                               #   in Loop: Header=BB3_12 Depth=1
	testl	%ebx, %ebx
	je	.LBB3_16
# %bb.15:                               #   in Loop: Header=BB3_12 Depth=1
	movq	48(%rsp), %rax
	movq	40(%rsp), %rcx
	movq	%rcx, 48(%rsp)
	movq	%rax, 40(%rsp)
	movq	24(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	%rcx, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	8(%rsp), %rax
	movq	32(%rsp), %rcx
	movq	%rcx, 8(%rsp)
	movq	%rax, 32(%rsp)
.LBB3_16:                               #   in Loop: Header=BB3_12 Depth=1
	leal	1(%rbx), %eax
	cmpl	4(%rsp), %ebx
	movl	%eax, %ebx
	jl	.LBB3_12
.LBB3_17:                               # %._crit_edge95
	movq	48(%rsp), %rsi
	movq	128(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rsi
	movq	96(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movq	%rbp, %r14
	movq	%rbp, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi
	movq	104(%rsp), %rdi                 # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	120(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movslq	4(%rsp), %rax
	movl	(%rbx,%rax,4), %ecx
	movl	(%r15,%rax,4), %ebp
	cmpl	%ebp, %ecx
	cmovll	%ecx, %ebp
	movl	(%r14,%rax,4), %eax
	cmpl	%eax, %ebp
	cmovgel	%eax, %ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%edi, %edi
	callq	time
	movq	%rax, %rbx
	callq	clock
	movq	%rax, %r14
	subq	136(%rsp), %rbx                 # 8-byte Folded Reload
	movl	$.L.str.6, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	subq	144(%rsp), %r14                 # 8-byte Folded Reload
	cvtsi2ss	%r14, %xmm0
	divss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii,@object # @_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.section	.rodata,"a",@progbits
	.globl	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.p2align	3, 0x0
_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii:
	.quad	_Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.size	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d \n"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%c"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\tbegin (wall):            %ld\n"
	.size	.L.str.3, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\tbegin (CPU):             %d\n"
	.size	.L.str.4, 30

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Optimal Allignment cost: "
	.size	.L.str.5, 26

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"\telapsed wall clock time: %ld\n"
	.size	.L.str.6, 31

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"\telapsed CPU time:        %f\n"
	.size	.L.str.7, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii"
	.size	.L__unnamed_1, 48

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii ; -- Begin function _Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.globl	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
	.p2align	8
	.type	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii,@function
_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii: ; @_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x7c
	s_load_b64 s[24:25], s[0:1], 0x64
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_ge_i32_e64 s25, v1
	s_cbranch_execz .LBB0_13
; %bb.1:
	s_clause 0x3
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b128 s[20:23], s[0:1], 0x20
	s_load_b256 s[12:19], s[0:1], 0x38
	s_load_b64 s[2:3], s[0:1], 0x58
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_cmp_gt_i32 s24, 0
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s1, -1, 0
	s_barrier
	s_and_b32 s25, s1, vcc_lo
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s25
; %bb.2:
	s_mul_i32 s25, s24, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s25, s25, s3
	s_add_i32 s26, s25, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, s26
	v_mov_b32_e32 v2, s25
	s_clause 0x1
	global_store_b32 v0, v2, s[10:11]
	global_store_b32 v0, v3, s[12:13]
; %bb.3:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	s_cmp_eq_u32 s24, 0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_saveexec_b32 s25, s0
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v1, s2, s[0:1]
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s2, v3
	v_add_co_u32 v6, s0, s8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s9, v5, s0
	v_add_co_u32 v4, s0, s20, v4
	v_add_co_ci_u32_e64 v5, s0, s21, v5, s0
	global_store_b32 v[6:7], v3, off
	global_store_b32 v[4:5], v0, off
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s25
	s_and_b32 s0, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_13
; %bb.6:
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v9, s24
	s_add_u32 s0, s16, 4
	s_addc_u32 s1, s17, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v5, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s21, v4, vcc_lo
	global_load_b32 v0, v[5:6], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v0, s3, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_min_i32_e32 v0, v7, v0
	v_add_co_u32 v7, vcc_lo, s22, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s23, v4, vcc_lo
	v_add_nc_u32_e32 v0, s2, v0
	global_store_b32 v[7:8], v0, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_u8 v0, v9, s[4:5]
	global_load_u8 v9, v1, s[6:7]
	s_waitcnt vmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b32 v10, v[5:6], off offset:-4
	global_load_b32 v11, v[7:8], off
	s_mov_b32 s4, 0
	v_cmp_ne_u16_e32 vcc_lo, v0, v9
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v10, vcc_lo
	v_add_co_u32 v9, vcc_lo, s14, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s15, v4, vcc_lo
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_min_i32_e32 v11, v11, v12
	global_store_b32 v[9:10], v11, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v12, v[9:10], off
	v_mul_lo_u32 v11, v1, s2
	v_add_co_u32 v9, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v13, s3, v11
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
	v_mov_b32_e32 v13, v1
	global_store_b32 v[9:10], v12, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v12, v[9:10], off
	v_add_co_u32 v9, vcc_lo, s18, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s19, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[9:10], v12, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v12, v[9:10], off
.LBB0_7:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v14, v2, s[0:1]
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v12, v14
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_7 Depth=1
	v_mov_b32_e32 v12, v14
	global_store_b32 v[9:10], v14, off
.LBB0_9:                                ;   in Loop: Header=BB0_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_add_nc_u32_e32 v13, -1, v13
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v13
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_7
; %bb.10:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v12, v[9:10], off
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_add_co_u32 v9, vcc_lo, s12, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	s_waitcnt vmcnt(0)
	v_add3_u32 v2, v11, s2, v12
	global_store_b32 v[9:10], v2, off offset:4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_eq_u32_e32 1, v1
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_mov_b32_e32 v1, 0
	s_clause 0x1
	global_load_b32 v2, v1, s[10:11]
	global_load_b32 v9, v1, s[12:13]
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v2, s3, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v2, v9, v2
	v_add_nc_u32_e32 v2, s2, v2
	global_store_b32 v1, v2, s[12:13] offset:4
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v1, vcc_lo, s12, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s13, v4, vcc_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v5, v[5:6], off offset:-4
	global_load_b32 v6, v[7:8], off
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v0, v5, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_min3_i32 v2, v6, v1, v0
	v_add_co_u32 v0, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v4, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 368
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 27
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii, .Lfunc_end0-_Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1056
; NumSgprs: 29
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 29
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         92
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     by_value
      - .offset:         100
        .size:           4
        .value_kind:     by_value
      - .offset:         104
        .size:           4
        .value_kind:     by_value
      - .offset:         112
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         116
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         120
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         124
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         126
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         128
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         130
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         132
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         134
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         176
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 368
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     29
    .sgpr_spill_count: 0
    .symbol:         _Z9main_workPcS_PiS0_S0_S0_S0_S0_S0_S0_S0_iiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
