// allocate pitch memory and cudaArray

#include <stdio.h>
#include <memory.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define NX 1003
#define NY 1024


__global__ void PLShift(float* odata, int pitch, int width, int height, int shiftx, int shifty, cudaTextureObject_t texRefPL ){
    int global_x_ = threadIdx.x + blockIdx.x*blockDim.x;
    int global_y_ = threadIdx.y + blockIdx.y*blockDim.y;

    /*
    if(threadIdx.x == 0 && blockIdx.x == 0){
        for(int i=0; i<NX; i++){
            for(int j=0;j<NY;j++){
                printf("%d ", tex2D<float>(texRefPL,
                    (i) / (float) width,
                    (j) / (float) height))
            }
            printf("\n");
        }
    }
    */


    //odata[global_y_*pitch + global_x_] = tex2D<float>(texRefPL,
    //                                 (global_x_) / (float) width,
    //                                 (global_y_) / (float) height);        //because using normalizedCoords and cudaAddressModeWrap(automaticaly loop), Line 78/80/81
    odata[global_y_*pitch + global_x_] = tex2D<float>(texRefPL,
                                    (global_x_ + shiftx)%width,
                                     (global_y_ + shifty)%height);
}


int main(){

    size_t sizeByte = NX*NY*sizeof(float);
    //host data declaration and initialization
    float* hdata = (float* )malloc(sizeByte);
    for(int i=0;i<NX*NY; i++){
        hdata[i] = i;
    }
    float* hdata_res = (float* )malloc(sizeByte);
    memset(hdata_res, 0, sizeByte);
    //gloden result
    float *gold = (float*) malloc(sizeByte);
    for (int j = 0; j < NY; ++j)
    {
        int jshift = (j + 2) % NY;

        for (int i = 0; i < NX; ++i)
        {
            int ishift = (i + 1) % NX;
            gold[j * NX + i] = hdata[jshift * NX + ishift];
        }
    }

    //cudaChannelDesc, similar to data type
     cudaChannelFormatDesc channelDesc = cudaCreateChannelDesc<float>();

    //using pitch linear memory
    float *ddata_pl;
    float *ddata_pl_res;
    size_t sizePL;

    cudaMallocPitch((void**)&ddata_pl, &sizePL, NX*sizeof(float), NY);
    cudaMallocPitch((void**)&ddata_pl_res, &sizePL, NX*sizeof(float), NY);

    printf("Pitch of ddata_pl is %d , while NX =%d\n", sizePL, NX);

    //memory copy: host -> device
    cudaMemcpy2D(ddata_pl, sizePL, hdata, NX*sizeof(float),NX*sizeof(float), NY, cudaMemcpyHostToDevice);      //no padding in host memory, so spitch = width

    //allocate texture memory
    //cudaResourceDesc  -->  cudaTextureDesc --> cudaTextureObject_t
    
    //cudaResourceDesc
    cudaResourceDesc texRes;
    memset(&texRes,0,sizeof(cudaResourceDesc));
    texRes.resType = cudaResourceTypePitch2D;
    texRes.res.pitch2D.devPtr = ddata_pl;
    texRes.res.pitch2D.desc = channelDesc;
    texRes.res.pitch2D.width = NX;
    texRes.res.pitch2D.height = NY;
    texRes.res.pitch2D.pitchInBytes = sizePL;       //why not sizePL

    //cudaTextureDesc
    cudaTextureDesc         texDescr;
    memset(&texDescr,0,sizeof(cudaTextureDesc));
    texDescr.normalizedCoords = false;
    texDescr.filterMode       = cudaFilterModePoint;
    texDescr.addressMode[0] = cudaAddressModeWrap;
    texDescr.addressMode[1] = cudaAddressModeWrap;
    texDescr.readMode = cudaReadModeElementType;

    //create cudaTextureObject
    cudaTextureObject_t         texRefPL;
    cudaCreateTextureObject(&texRefPL, &texRes, &texDescr, NULL);


    //start running kernel
    cudaMemset2D(ddata_pl_res, sizePL, 0, NX*sizeof(float), NY);
    dim3 mygrid(32, 32, 1);
    dim3 myblock(32, 32, 1);
    PLShift<<<mygrid, myblock>>>(ddata_pl_res, sizePL/sizeof(float), NX, NY, 1, 2, texRefPL);

    cudaMemcpy2D(hdata_res, NX*sizeof(float), ddata_pl_res, sizePL, NX*sizeof(float), NY, cudaMemcpyDeviceToHost);

    for(int i=0;i<NX*NY;i++){
        if(hdata_res[i] != gold[i]){
            printf("Error at %d, GPU(%lf) != CPU(%lf)\n",i, hdata_res[i], gold[i]);
            //return 0;
        }
    }
}

	.file	"tmpxft_00236f5f_00000000-6_simplePitchLinearTexture.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy
	.type	_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy, @function
_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z7PLShiftPfiiiiiy(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy, .-_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy
	.globl	_Z7PLShiftPfiiiiiy
	.type	_Z7PLShiftPfiiiiiy, @function
_Z7PLShiftPfiiiiiy:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy
	.cfi_endproc
.LFE2053:
	.size	_Z7PLShiftPfiiiiiy, .-_Z7PLShiftPfiiiiiy
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Pitch of ddata_pl is %d , while NX =%d\n"
.LC1:
	.string	"Error at %d, GPU(%lf) != CPU(%lf)\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$4108288, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$232, %rsp
	.cfi_def_cfa_offset 272
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rax, %r13
.L9:
	cvtsi2ssl	%ebx, %xmm0
	movss	%xmm0, 0(%r13,%rbx,4)
	incq	%rbx
	cmpq	$1027072, %rbx
	jne	.L9
	movl	$4108288, %edi
	call	malloc@PLT
	movq	%rbx, %rcx
	movq	%rax, %rbp
	xorl	%eax, %eax
	movq	%rbp, %rdi
	rep stosl
	movl	$4108288, %edi
	call	malloc@PLT
	xorl	%edi, %edi
	movl	$1003, %r9d
	movq	%rax, %r12
	movq	%rax, %r8
.L11:
	leal	2(%rdi), %esi
	movl	$1, %ecx
	andl	$1023, %esi
	imull	$1003, %esi, %esi
.L10:
	movl	%ecx, %eax
	cltd
	idivl	%r9d
	addl	%esi, %edx
	movslq	%edx, %rdx
	movss	0(%r13,%rdx,4), %xmm0
	movss	%xmm0, -4(%r8,%rcx,4)
	incq	%rcx
	cmpq	$1004, %rcx
	jne	.L10
	incl	%edi
	addq	$4012, %r8
	cmpl	$1024, %edi
	jne	.L11
	leaq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	leaq	16(%rsp), %rbx
	xorl	%ecx, %ecx
	movl	$2, %r9d
	xorl	%edx, %edx
	movl	$32, %esi
	call	cudaCreateChannelDesc@PLT
	movq	%rsp, %rdi
	movq	%rbx, %rsi
	movl	$1024, %ecx
	movl	$4012, %edx
	call	cudaMallocPitch@PLT
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1024, %ecx
	movl	$4012, %edx
	call	cudaMallocPitch@PLT
	movq	16(%rsp), %rdx
	movl	$1003, %ecx
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1024, %r9d
	movl	$4012, %ecx
	movq	%r13, %rdx
	pushq	%r10
	.cfi_def_cfa_offset 280
	movl	$4012, %r8d
	pushq	$1
	.cfi_def_cfa_offset 288
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	cudaMemcpy2D@PLT
	leaq	100(%rsp), %rdx
	xorl	%eax, %eax
	movl	$9, %ecx
	movq	%rdx, %rdi
	movq	16(%rsp), %rdx
	movups	76(%rsp), %xmm2
	leaq	96(%rsp), %rsi
	rep stosl
	movl	$18, %ecx
	movl	$3, 96(%rsp)
	movq	%rdx, 104(%rsp)
	movl	92(%rsp), %edx
	movups	%xmm2, 112(%rsp)
	movl	%edx, 128(%rsp)
	movq	32(%rsp), %rdx
	movq	$1003, 136(%rsp)
	movq	%rdx, 152(%rsp)
	leaq	160(%rsp), %rdx
	movq	$1024, 144(%rsp)
	movq	%rdx, %rdi
	rep stosl
	popq	%r11
	.cfi_def_cfa_offset 280
	popq	%rbx
	.cfi_def_cfa_offset 272
	leaq	24(%rsp), %rdi
	call	cudaCreateTextureObject@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	xorl	%edx, %edx
	movl	$1024, %r8d
	movl	$4012, %ecx
	call	cudaMemset2D@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	16(%rsp), %rsi
	pushq	%rdi
	.cfi_def_cfa_offset 280
	movl	$1024, %ecx
	movl	$1003, %edx
	pushq	32(%rsp)
	.cfi_def_cfa_offset 288
	movq	24(%rsp), %rdi
	movl	$2, %r9d
	movl	$1, %r8d
	shrq	$2, %rsi
	call	_Z32__device_stub__Z7PLShiftPfiiiiiyPfiiiiiy
	popq	%r8
	.cfi_def_cfa_offset 280
	popq	%r9
	.cfi_def_cfa_offset 272
.L12:
	pushq	%rax
	.cfi_def_cfa_offset 280
	movl	$1024, %r9d
	movl	$4012, %r8d
	movq	%rbp, %rdi
	pushq	$2
	.cfi_def_cfa_offset 288
	movq	32(%rsp), %rcx
	movl	$4012, %esi
	xorl	%ebx, %ebx
	movq	24(%rsp), %rdx
	leaq	.LC1(%rip), %r13
	call	cudaMemcpy2D@PLT
	popq	%rdx
	.cfi_def_cfa_offset 280
	popq	%rcx
	.cfi_def_cfa_offset 272
.L15:
	movss	0(%rbp,%rbx,4), %xmm0
	movss	(%r12,%rbx,4), %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L17
	je	.L13
.L17:
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
.L13:
	incq	%rbx
	cmpq	$1027072, %rbx
	jne	.L15
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$232, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z7PLShiftPfiiiiiy"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7PLShiftPfiiiiiy(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// allocate pitch memory and cudaArray

#include <stdio.h>
#include <memory.h>
#include <hip/hip_runtime.h>


#define NX 1003
#define NY 1024


__global__ void PLShift(float* odata, int pitch, int width, int height, int shiftx, int shifty, hipTextureObject_t texRefPL ){
    int global_x_ = threadIdx.x + blockIdx.x*blockDim.x;
    int global_y_ = threadIdx.y + blockIdx.y*blockDim.y;

    /*
    if(threadIdx.x == 0 && blockIdx.x == 0){
        for(int i=0; i<NX; i++){
            for(int j=0;j<NY;j++){
                printf("%d ", tex2D<float>(texRefPL,
                    (i) / (float) width,
                    (j) / (float) height))
            }
            printf("\n");
        }
    }
    */


    //odata[global_y_*pitch + global_x_] = tex2D<float>(texRefPL,
    //                                 (global_x_) / (float) width,
    //                                 (global_y_) / (float) height);        //because using normalizedCoords and cudaAddressModeWrap(automaticaly loop), Line 78/80/81
    odata[global_y_*pitch + global_x_] = tex2D<float>(texRefPL,
                                    (global_x_ + shiftx)%width,
                                     (global_y_ + shifty)%height);
}


int main(){

    size_t sizeByte = NX*NY*sizeof(float);
    //host data declaration and initialization
    float* hdata = (float* )malloc(sizeByte);
    for(int i=0;i<NX*NY; i++){
        hdata[i] = i;
    }
    float* hdata_res = (float* )malloc(sizeByte);
    memset(hdata_res, 0, sizeByte);
    //gloden result
    float *gold = (float*) malloc(sizeByte);
    for (int j = 0; j < NY; ++j)
    {
        int jshift = (j + 2) % NY;

        for (int i = 0; i < NX; ++i)
        {
            int ishift = (i + 1) % NX;
            gold[j * NX + i] = hdata[jshift * NX + ishift];
        }
    }

    //cudaChannelDesc, similar to data type
     hipChannelFormatDesc channelDesc = hipCreateChannelDesc<float>();

    //using pitch linear memory
    float *ddata_pl;
    float *ddata_pl_res;
    size_t sizePL;

    hipMallocPitch((void**)&ddata_pl, &sizePL, NX*sizeof(float), NY);
    hipMallocPitch((void**)&ddata_pl_res, &sizePL, NX*sizeof(float), NY);

    printf("Pitch of ddata_pl is %d , while NX =%d\n", sizePL, NX);

    //memory copy: host -> device
    hipMemcpy2D(ddata_pl, sizePL, hdata, NX*sizeof(float),NX*sizeof(float), NY, hipMemcpyHostToDevice);      //no padding in host memory, so spitch = width

    //allocate texture memory
    //cudaResourceDesc  -->  cudaTextureDesc --> cudaTextureObject_t
    
    //cudaResourceDesc
    hipResourceDesc texRes;
    memset(&texRes,0,sizeof(hipResourceDesc));
    texRes.resType = hipResourceTypePitch2D;
    texRes.res.pitch2D.devPtr = ddata_pl;
    texRes.res.pitch2D.desc = channelDesc;
    texRes.res.pitch2D.width = NX;
    texRes.res.pitch2D.height = NY;
    texRes.res.pitch2D.pitchInBytes = sizePL;       //why not sizePL

    //cudaTextureDesc
    hipTextureDesc         texDescr;
    memset(&texDescr,0,sizeof(hipTextureDesc));
    texDescr.normalizedCoords = false;
    texDescr.filterMode       = hipFilterModePoint;
    texDescr.addressMode[0] = hipAddressModeWrap;
    texDescr.addressMode[1] = hipAddressModeWrap;
    texDescr.readMode = hipReadModeElementType;

    //create cudaTextureObject
    hipTextureObject_t         texRefPL;
    hipCreateTextureObject(&texRefPL, &texRes, &texDescr, NULL);


    //start running kernel
    hipMemset2D(ddata_pl_res, sizePL, 0, NX*sizeof(float), NY);
    dim3 mygrid(32, 32, 1);
    dim3 myblock(32, 32, 1);
    PLShift<<<mygrid, myblock>>>(ddata_pl_res, sizePL/sizeof(float), NX, NY, 1, 2, texRefPL);

    hipMemcpy2D(hdata_res, NX*sizeof(float), ddata_pl_res, sizePL, NX*sizeof(float), NY, hipMemcpyDeviceToHost);

    for(int i=0;i<NX*NY;i++){
        if(hdata_res[i] != gold[i]){
            printf("Error at %d, GPU(%lf) != CPU(%lf)\n",i, hdata_res[i], gold[i]);
            //return 0;
        }
    }
}

	.text
	.file	"simplePitchLinearTexture.hip"
	.globl	_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture # -- Begin function _Z22__device_stub__PLShiftPfiiiiiP13__hip_texture
	.type	_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture,@function
_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture: # @_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7PLShiftPfiiiiiP13__hip_texture, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture, .Lfunc_end0-_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4108288, %edi                  # imm = 0x3EB000
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	cmpq	$1027072, %rax                  # imm = 0xFAC00
	jne	.LBB1_1
# %bb.2:
	movl	$1, %edi
	movl	$4108288, %esi                  # imm = 0x3EB000
	callq	calloc@PLT
	movq	%rax, %rbx
	movl	$4108288, %edi                  # imm = 0x3EB000
	callq	malloc
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%r14, %rcx
	xorl	%edx, %edx
.LBB1_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	leal	2(%rdx), %esi
	andl	$1023, %esi                     # imm = 0x3FF
	imulq	$1003, %rsi, %rsi               # imm = 0x3EB
	movl	$1, %edi
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	$1003, %rdi                     # imm = 0x3EB
	movl	%edi, %r8d
	cmovel	%eax, %r8d
	addl	%esi, %r8d
	movss	(%r15,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, -4(%rcx,%rdi,4)
	incq	%rdi
	cmpq	$1004, %rdi                     # imm = 0x3EC
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	incq	%rdx
	addq	$4012, %rcx                     # imm = 0xFAC
	cmpq	$1024, %rdx                     # imm = 0x400
	jne	.LBB1_3
# %bb.6:
	leaq	44(%rsp), %r13
	movq	%r13, %rdi
	movl	$32, %esi
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	movl	$2, %r9d
	callq	hipCreateChannelDesc
	leaq	32(%rsp), %rbp
	leaq	16(%rsp), %r12
	movl	$4012, %edx                     # imm = 0xFAC
	movl	$1024, %ecx                     # imm = 0x400
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	hipMallocPitch
	leaq	8(%rsp), %rdi
	movl	$4012, %edx                     # imm = 0xFAC
	movl	$1024, %ecx                     # imm = 0x400
	movq	%r12, %rsi
	callq	hipMallocPitch
	movq	(%r12), %rsi
	movl	$.L.str, %edi
	movl	$1003, %edx                     # imm = 0x3EB
	xorl	%eax, %eax
	callq	printf
	movq	(%rbp), %rdi
	movq	(%r12), %rsi
	movl	$1, (%rsp)
	movl	$4012, %ecx                     # imm = 0xFAC
	movl	$4012, %r8d                     # imm = 0xFAC
	movl	$1024, %r9d                     # imm = 0x400
	movq	%r15, %rdx
	callq	hipMemcpy2D
	xorps	%xmm0, %xmm0
	leaq	128(%rsp), %rsi
	movaps	%xmm0, (%rsi)
	movq	$0, 32(%rsi)
	movl	$3, (%rsi)
	movq	(%rbp), %rax
	movq	%rax, 8(%rsi)
	movups	(%r13), %xmm1
	movaps	%xmm1, 16(%rsi)
	movl	16(%r13), %eax
	movl	%eax, 32(%rsi)
	movq	$1003, 40(%rsi)                 # imm = 0x3EB
	movq	$1024, 48(%rsi)                 # imm = 0x400
	movq	(%r12), %rax
	movq	%rax, 56(%rsi)
	leaq	64(%rsp), %rdx
	movaps	%xmm0, 48(%rdx)
	movaps	%xmm0, 32(%rdx)
	movaps	%xmm0, 16(%rdx)
	movaps	%xmm0, (%rdx)
	leaq	24(%rsp), %rdi
	xorl	%ecx, %ecx
	callq	hipCreateTextureObject
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movq	(%r12), %rsi
	movl	$4012, %ecx                     # imm = 0xFAC
	movl	$1024, %r8d                     # imm = 0x400
	xorl	%edx, %edx
	callq	hipMemset2D
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	shrq	$2, %rsi
	movq	24(%rsp), %rax
	movq	%rax, (%rsp)
                                        # kill: def $esi killed $esi killed $rsi
	movl	$1003, %edx                     # imm = 0x3EB
	movl	$1024, %ecx                     # imm = 0x400
	movl	$1, %r8d
	movl	$2, %r9d
	callq	_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture
.LBB1_8:
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rcx
	movl	$2, (%rsp)
	movl	$4012, %esi                     # imm = 0xFAC
	movl	$4012, %r8d                     # imm = 0xFAC
	movl	$1024, %r9d                     # imm = 0x400
	movq	%rbx, %rdi
	callq	hipMemcpy2D
	xorl	%r15d, %r15d
.LBB1_9:                                # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%r14,%r15,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jne	.LBB1_10
	jnp	.LBB1_11
.LBB1_10:                               #   in Loop: Header=BB1_9 Depth=1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movb	$2, %al
	callq	printf
.LBB1_11:                               #   in Loop: Header=BB1_9 Depth=1
	incq	%r15
	cmpq	$1027072, %r15                  # imm = 0xFAC00
	jne	.LBB1_9
# %bb.12:
	xorl	%eax, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7PLShiftPfiiiiiP13__hip_texture, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7PLShiftPfiiiiiP13__hip_texture,@object # @_Z7PLShiftPfiiiiiP13__hip_texture
	.section	.rodata,"a",@progbits
	.globl	_Z7PLShiftPfiiiiiP13__hip_texture
	.p2align	3, 0x0
_Z7PLShiftPfiiiiiP13__hip_texture:
	.quad	_Z22__device_stub__PLShiftPfiiiiiP13__hip_texture
	.size	_Z7PLShiftPfiiiiiP13__hip_texture, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Pitch of ddata_pl is %d , while NX =%d\n"
	.size	.L.str, 40

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error at %d, GPU(%lf) != CPU(%lf)\n"
	.size	.L.str.1, 35

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7PLShiftPfiiiiiP13__hip_texture"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__PLShiftPfiiiiiP13__hip_texture
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7PLShiftPfiiiiiP13__hip_texture
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7PLShiftPfiiiiiP13__hip_texture ; -- Begin function _Z7PLShiftPfiiiiiP13__hip_texture
	.globl	_Z7PLShiftPfiiiiiP13__hip_texture
	.p2align	8
	.type	_Z7PLShiftPfiiiiiP13__hip_texture,@function
_Z7PLShiftPfiiiiiP13__hip_texture:      ; @_Z7PLShiftPfiiiiiP13__hip_texture
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s8, s[0:1], 0x34
	s_load_b32 s9, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s6, s2
	s_xor_b32 s6, s3, s2
	s_ashr_i32 s2, s5, 31
	v_cvt_f32_u32_e32 v1, s6
	s_add_i32 s3, s5, s2
	s_sub_i32 s10, 0, s6
	s_xor_b32 s5, s3, s2
	s_lshr_b32 s2, s8, 16
	v_rcp_iflag_f32_e32 v4, v1
	v_bfe_u32 v1, v0, 10, 10
	v_cvt_f32_u32_e32 v5, s5
	v_and_b32_e32 v0, 0x3ff, v0
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	v_rcp_iflag_f32_e32 v3, v5
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v4
	s_load_b64 s[0:1], s[0:1], 0x0
	v_add_nc_u32_e32 v5, s9, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v1, v1
	v_mul_f32_e32 v7, 0x4f7ffffe, v3
	v_mul_lo_u32 v6, s10, v1
	v_mad_u64_u32 v[3:4], null, s14, s8, v[0:1]
	v_ashrrev_i32_e32 v0, 31, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v4, v7
	s_sub_i32 s8, 0, s5
	v_add_nc_u32_e32 v5, v5, v0
	v_mul_hi_u32 v6, v1, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v8, s8, v4
	v_add_nc_u32_e32 v7, s7, v3
	s_waitcnt lgkmcnt(0)
	s_load_b128 s[16:19], s[2:3], 0x30
	v_xor_b32_e32 v5, v5, v0
	s_clause 0x1
	s_load_b256 s[8:15], s[2:3], 0x0
	s_load_b32 s3, s[2:3], 0x28
	v_add_nc_u32_e32 v1, v1, v6
	v_ashrrev_i32_e32 v6, 31, v7
	v_mul_hi_u32 v8, v4, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v1, v5, v1
	v_add_nc_u32_e32 v7, v7, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v8
	v_xor_b32_e32 v7, v7, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, s6
	s_waitcnt lgkmcnt(0)
	s_bitcmp0_b32 s18, 20
	v_mul_hi_u32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v5, v1
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s6, v1
	v_cmp_le_u32_e32 vcc_lo, s6, v1
	v_cndmask_b32_e32 v1, v1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v7, v4
	v_subrev_nc_u32_e32 v5, s6, v1
	v_cmp_le_u32_e32 vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v7, s5, v4
	v_cndmask_b32_e32 v1, v1, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v1, v1, v0
	v_cndmask_b32_e32 v4, v4, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v0, v1, v0
	v_subrev_nc_u32_e32 v5, s5, v4
	v_cmp_le_u32_e32 vcc_lo, s5, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_i32_e32 v0, v0
	v_cndmask_b32_e32 v1, v4, v5, vcc_lo
	s_cselect_b32 vcc_lo, -1, 0
	s_bitcmp0_b32 s16, 15
	v_cvt_f32_u32_e32 v5, s3
	s_cselect_b32 s2, -1, 0
	v_xor_b32_e32 v1, v1, v6
	s_bfe_u32 s5, s10, 0xe000e
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	s_add_i32 s5, s5, 1
	v_cndmask_b32_e64 v5, 1.0, v5, s2
	v_cvt_f32_u32_e32 v4, s5
	v_sub_nc_u32_e32 v1, v1, v6
	v_rcp_f32_e32 v7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 1.0, v4, s2
	v_cvt_f32_i32_e32 v6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v1, v4
	v_dual_mul_f32 v4, v4, v0 :: v_dual_mul_f32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_floor_f32_e32 v4, v4
	v_floor_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v1, v1, v4 :: v_dual_mul_f32 v4, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v0, v1 :: v_dual_cndmask_b32 v0, v6, v4
	image_sample_lz v4, v[0:1], s[8:15], s[16:19] dmask:0x1 dim:SQ_RSRC_IMG_2D
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7PLShiftPfiiiiiP13__hip_texture
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7PLShiftPfiiiiiP13__hip_texture, .Lfunc_end0-_Z7PLShiftPfiiiiiP13__hip_texture
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 636
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7PLShiftPfiiiiiP13__hip_texture
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z7PLShiftPfiiiiiP13__hip_texture.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
