/* CUDA Library for Skeleton 2D Electrostatic GPU-MPI PIC Code */
/* written by Viktor K. Decyk, UCLA */

#include <stdlib.h>
#include <stdio.h>
#include "cuda.h"

extern int nblock_size;
extern int maxgsx;

static cudaError_t crc;

extern "C" void gpu_deallocate(void *g_d, int *irc);

extern "C" void gpu_iallocate(int **g_i, int nsize, int *irc);

/*--------------------------------------------------------------------*/
__device__ void liscan2(int *isdata, int nths) {
/* performs local prefix reduction of integer data shared by threads */
/* using binary tree method. */
/* local data */
   int l, mb, kxs, lb, kb;
   l = threadIdx.x;
   mb = l;
   kxs = 1;
   while (kxs < nths) {
      lb = kxs*mb;
      kb = 2*lb + kxs - 1;
      lb += l + kxs;
      if (lb < nths) {
         isdata[lb] += isdata[kb];
      }
      __syncthreads();
      mb >>= 1;
      kxs <<= 1;
   }
   return;
}

/*--------------------------------------------------------------------*/
__device__ void lsum2(float *sdata, int n) {
/* finds local sum of nths data items shared by threads */
/* using binary tree method. input is modified. */
/* local data */
   int l, k;
   float s;
   l = threadIdx.x;
   k = blockDim.x >> 1;
   s = 0.0f;
   if (l < n) s = sdata[l];
   while (k > 0) {
      if (l < k) {
         if ((l+k) < n) {
            s += sdata[l+k];
            sdata[l] = s;
         }
      }
      __syncthreads();
      k >>= 1;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppgppush2l(float ppart[], float fxy[], int kpic[],
                              int noff, int nyp, float qbm, float dt,
                              float *ek, int nx, int ny, int mx, int my,
                              int idimp, int nppmx, int nxv, int nypmx,
                              int mx1, int mxyp1, int ipbc) {
/* for 2d code, this subroutine updates particle co-ordinates and
   velocities using leap-frog scheme in time and first-order linear
   interpolation in space, with various boundary conditions
   threaded version using guard cells, for distributed data
   data read in tiles
   particles stored segmented array
   42 flops/particle, 12 loads, 4 stores
   input: all except ihole, output: ppart, ek
   equations used are:
   vx(t+dt/2) = vx(t-dt/2) + (q/m)*fx(x(t),y(t))*dt,
   vy(t+dt/2) = vy(t-dt/2) + (q/m)*fy(x(t),y(t))*dt,
   where q/m is charge/mass, and
   x(t+dt) = x(t) + vx(t+dt/2)*dt, y(t+dt) = y(t) + vy(t+dt/2)*dt
   fx(x(t),y(t)) and fy(x(t),y(t)) are approximated by interpolation from
   the nearest grid points:
   fx(x,y) = (1-dy)*((1-dx)*fx(n,m)+dx*fx(n+1,m)) + dy*((1-dx)*fx(n,m+1)
      + dx*fx(n+1,m+1))
   fy(x,y) = (1-dy)*((1-dx)*fy(n,m)+dx*fy(n+1,m)) + dy*((1-dx)*fy(n,m+1)
      + dx*fy(n+1,m+1))
   where n,m = leftmost grid points and dx = x-n, dy = y-m
   ppart[m][0][n] = position x of particle n in partition in tile m
   ppart[m][1][n] = position y of particle n in partition in tile m
   ppart[m][2][n] = velocity vx of particle n in partition in tile m
   ppart[m][3][n] = velocity vy of particle n in partition in tile m
   fxy[k][j][0] = x component of force/charge at grid (j,kk)
   fxy[k][j][1] = y component of force/charge at grid (j,kk)
   in other words, fxy are the convolutions of the electric field
   over the particle shape, where kk = k + noff
   kpic = number of particles per tile
   noff = lowermost global gridpoint in particle partition.
   nyp = number of primary (complete) gridpoints in particle partition
   qbm = particle charge/mass ratio
   dt = time interval between successive calculations
   kinetic energy/mass at time t is also calculated, using
   ek = .125*sum((vx(t+dt/2)+vx(t-dt/2))**2+(vy(t+dt/2)+vy(t-dt/2))**2)
   nx/ny = system length in x/y direction
   mx/my = number of grids in sorting cell in x/y
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   nxv = first dimension of field array, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells.
   mx1 = (system length in x direction - 1)/mx + 1
   mxyp1 = mx1*myp1, where myp1=(partition length in y direction-1)/my+1
   ipbc = particle boundary condition = (0,1,2,3) =
   (none,2d periodic,2d reflecting,mixed reflecting/periodic)
local data                                                            */
   int noffp, moffp, npoff, nppp, mxv;
   int mnoff, i, j, k, ii, nn, mm;
   float qtm, edgelx, edgely, edgerx, edgery, dxp, dyp, amx, amy;
   float x, y, dx, dy, vx, vy;
/* The sizes of the shared memory arrays are as follows: */
/* float sfxy[2*(mx+1)*(my+1)], sek[blockDim.x];         */
/* to conserve memory, sek overlaps with sfxy            */
/* and the name sfxy is used instead of sek              */
   extern __shared__ float sfxy[];
   double sum1;
   qtm = qbm*dt;
   sum1 = 0.0;
/* set boundary values */
   edgelx = 0.0f;
   edgely = 1.0f;
   edgerx = (float) (nx);
   edgery = (float) (ny-1);
   if ((ipbc==2) || (ipbc==3)) {
      edgelx = 1.0f;
      edgerx = (float) (nx-1);
   }
   mxv = mx + 1;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* loop over tiles */
   if (k < mxyp1) {
      noffp = k/mx1;
      moffp = my*noffp;
      noffp = mx*(k - mx1*noffp);
      nppp = kpic[k];
      npoff = idimp*nppmx*k;
      mnoff = moffp + noff;
/* load local fields from global array */
      nn = (mx < nx-noffp ? mx : nx-noffp) + 1;
      mm = (my < nyp-moffp ? my : nyp-moffp) + 1;
      ii = threadIdx.x;
      while (ii < mxv*(my+1)) {
         j = ii/mxv;
         i = ii - mxv*j;
         if ((i < nn) && (j < mm)) {
            sfxy[2*ii] = fxy[2*(i+noffp+nxv*(j+moffp))];
            sfxy[1+2*ii] = fxy[1+2*(i+noffp+nxv*(j+moffp))];
         }
         ii += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* loop over particles in tile */
      j = threadIdx.x;
      while (j < nppp) {
/* find interpolation weights */
         x = ppart[j+npoff];
         nn = x;
         y = ppart[j+npoff+nppmx];
         mm = y;
         dxp = x - (float) nn;
         dyp = y - (float) mm;
         nn = 2*(nn - noffp) + 2*mxv*(mm - mnoff);
         amx = 1.0f - dxp;
         amy = 1.0f - dyp;
/* find acceleration */
         dx = amx*sfxy[nn];
         dy = amx*sfxy[1+nn];
         dx = amy*(dxp*sfxy[2+nn] + dx);
         dy = amy*(dxp*sfxy[3+nn] + dy);
         nn += 2*mxv;
         vx = amx*sfxy[nn];
         vy = amx*sfxy[1+nn];
         dx += dyp*(dxp*sfxy[2+nn] + vx);
         dy += dyp*(dxp*sfxy[3+nn] + vy);
/* new velocity */
         vx = ppart[j+npoff+nppmx*2];
         vy = ppart[j+npoff+nppmx*3];
         dx = vx + qtm*dx;
         dy = vy + qtm*dy;
/* average kinetic energy */
         vx += dx;
         vy += dy;
         sum1 += (double) (vx*vx + vy*vy);
         ppart[j+npoff+nppmx*2] = dx;
         ppart[j+npoff+nppmx*3] = dy;
/* new position */
         dx = x + dx*dt;
         dy = y + dy*dt;
/* reflecting boundary conditions */
         if (ipbc==2) {
            if ((dx < edgelx) || (dx >= edgerx)) {
               dx = ppart[j+npoff];
               ppart[j+npoff+nppmx*2] = -ppart[j+npoff+nppmx*2];
            }
            if ((dy < edgely) || (dy >= edgery)) {
               dy = ppart[j+npoff+nppmx];
               ppart[j+npoff+nppmx*3] = -ppart[j+npoff+nppmx*3];
            }
         }
/* mixed reflecting/periodic boundary conditions */
         else if (ipbc==3) {
            if ((dx < edgelx) || (dx >= edgerx)) {
               dx = ppart[j+npoff];
               ppart[j+npoff+nppmx*2] = -ppart[j+npoff+nppmx*2];
            }
         }
/* set new position */
         ppart[j+npoff] = dx;
         ppart[j+npoff+nppmx] = dy;
         j += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* add kinetic energies in tile */
      sfxy[threadIdx.x] = (float) sum1;
/* synchronize threads */
      __syncthreads();
      lsum2(sfxy,blockDim.x);
/* normalize kinetic energy of tile */
      if (threadIdx.x==0) {
         ek[k] = 0.125f*sfxy[0];
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpu2ppgppost2l(float ppart[], float q[], int kpic[],
                               int noff, float qm, int idimp, int nppmx,
                               int mx, int my, int nxv, int nypmx, 
                               int mx1, int mxyp1) {
/* for 2d code, this subroutine calculates particle charge density
   using first-order linear interpolation, periodic boundaries
   threaded version using guard cells, for distributed data
   data deposited in tiles
   particles stored segmented array
   17 flops/particle, 6 loads, 4 stores
   input: all, output: q
   charge density is approximated by values at the nearest grid points
   q(n,m)=qm*(1.-dx)*(1.-dy)
   q(n+1,m)=qm*dx*(1.-dy)
   q(n,m+1)=qm*(1.-dx)*dy
   q(n+1,m+1)=qm*dx*dy
   where n,m = leftmost grid points and dx = x-n, dy = y-m
   ppart[m][n][0] = position x of particle n in partition in tile m
   ppart[m][n][1] = position y of particle n in partition in tile m
   q[k][j] = charge density at grid point (j,kk),
   where kk = k + noff
   kpic = number of particles per tile
   noff = lowermost global gridpoint in particle partition.
   qm = charge on particle, in units of e
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   mx/my = number of grids in sorting cell in x/y
   nxv = first dimension of charge array, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells.
   mx1 = (system length in x direction - 1)/mx + 1
   mxyp1 = mx1*myp1, where myp1=(partition length in y direction-1)/my+1
local data                                                            */
   int noffp, moffp, npoff, nppp, mxv;
   int mnoff, i, j, k, ii, nn, np, mm, mp;
   float dxp, dyp, amx, amy;
/* The size of the shared memory array is as follows: */
/* float sq[(mx+1)*(my+1)]                            */
   extern __shared__ float sq[];
   mxv = mx + 1;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* loop over tiles */
   if (k < mxyp1) {
      noffp = k/mx1;
      moffp = my*noffp;
      noffp = mx*(k - mx1*noffp);
      nppp = kpic[k];
      npoff = idimp*nppmx*k;
      mnoff = moffp + noff;
/* zero out local accumulator */
      i = threadIdx.x;
      while (i < mxv*(my+1)) {
         sq[i] = 0.0f;
         i += blockDim.x;
      }
/* synchronize threads */
       __syncthreads();
/* loop over particles in tile */
      j = threadIdx.x;
      while (j < nppp) {
/* find interpolation weights */
         dxp = ppart[j+npoff];
         nn = dxp;
         dyp = ppart[j+npoff+nppmx];
         mm = dyp;
         dxp = qm*(dxp - (float) nn);
         dyp = dyp - (float) mm;
         nn = nn - noffp;
         mm = mxv*(mm - mnoff);
         amx = qm - dxp;
         mp = mm + mxv;
         amy = 1.0f - dyp;
         np = nn + 1;
/* deposit charge within tile to local accumulator */
/* original deposit charge, has data hazard on GPU */
/*       sq[np+mp] += dxp*dyp; */
/*       sq[nn+mp] += amx*dyp; */
/*       sq[np+mm] += dxp*amy; */
/*       sq[nn+mm] += amx*amy; */
/* for devices with compute capability 2.x */
         atomicAdd(&sq[np+mp],dxp*dyp);
         atomicAdd(&sq[nn+mp],amx*dyp);
         atomicAdd(&sq[np+mm],dxp*amy);
         atomicAdd(&sq[nn+mm],amx*amy);
         j += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* deposit charge to global array */
      nn = mxv < nxv-noffp ? mxv : nxv-noffp;
      mm = my+1 < nypmx-moffp ? my+1 : nypmx-moffp;
      ii = threadIdx.x;
      while (ii < mxv*(my+1)) {
         j = ii/mxv;
         i = ii - mxv*j;
         if ((i < nn) && (j < mm)) {
/* original deposit charge, has data hazard on GPU */
/*          q[i+noffp+nxv*(j+moffp)] += sq[ii]; */
/* for devices with compute capability 2.x */
            atomicAdd(&q[i+noffp+nxv*(j+moffp)],sq[ii]);
         }
         ii += blockDim.x;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppcaguard2xl(float2 qc[], float2 scs[], float q[],
                                int nyp, int nx, int nxe, int nypmx,
                                int nxvh, int kypd) {
/* copy and accumulate extended periodic scalar field q in x direction
   into complex output fields qc, scs
   linear interpolation, for distributed data
   scs[j] = data to send to another processor
   nyp = number of primary (complete) gridpoints in particle partition
   nx = system length in x direction
   nxe = first dimension of input field array q, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells
   nxvh = first dimension of output field array qc, must be >= nx/2+1
   kypd = second dimension of output field array qc, must be >= nyp */
/* local data */
   int j, k, nxh;
   float at1;
   float2 a;
   nxh = nx/2;
   k = blockIdx.x;
/* copy interior points */
   if (k < nyp) {
      j = threadIdx.x;
      while (j < nxh) {
         at1 = 0.0f;
         if (j==0) {
            at1 = q[nx+nxe*k];
         }
         a.x = q[2*j+nxe*k] + at1;
         a.y = q[2*j+1+nxe*k];
         qc[j+nxvh*k] = a;
         j += blockDim.x;
      }
   }
/* copy exterior points */
   if (k==0) {
      j = threadIdx.x;
      while (j < nxh) {
         at1 = 0.0f;
         if (j==0) {
            at1 = q[nx+nxe*nyp];
         }
         a.x = q[2*j+nxe*nyp] + at1;
         a.y = q[2*j+1+nxe*nyp];
         scs[j] = a;
         j += blockDim.x;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppcaguard2yl(float2 fc[], float2 scr[], int nx,
                                int nxvh, int kypd) {
/* this subroutine adds data from guard cells from remote processors
   fc[k][j] = complex data for grid j,k in particle partition.
   output: fc
   scr[j] = complex input array for arriving data
   nx = system length in x direction
   nxvh = first dimension of fc, must be >= nx/2+1
   kypd = maximum size of field partition, including guard cells.
   linear interpolation, for distributed data
local data */
   int j, nxh;
   float2 a, b;
   nxh = nx/2;
   j = threadIdx.x+blockDim.x*blockIdx.x;
/* add up the guard cells from remote processors */
   if (j < nxh) {
      a = fc[j];
      b = scr[j];
      a.x += b.x;
      a.y += b.y;
      fc[j] = a;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppccguard2xl(float2 fxyc[], float2 scs[],
                                float fxy[], int nyp, int nx, int nxe,
                                int nypmx, int nxvh, int kypd) {
/* copy and replicate complex input 2d vector field fxyc in x direction
   into extended periodic fields fxy, scs
   linear interpolation, for distributed data
   scs[2][j] = data to send to another processor
   nyp = number of primary (complete) gridpoints in particle partition
   nx = system length in x direction
   nxe = second dimension of input field array fxy, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells
   nxvh = first dimension of input field array fxyc, must be >= nx/2+1
   kypd = third dimension of input field array fxyc, must be >= nyp+1 */
/* local data */
   int j, k, nxh;
   float2 a, b;
   nxh = nx/2;
   k = blockIdx.x;
/* copy interior points */
   if (k < nyp) {
      j = threadIdx.x;
      while (j < nxh) {
         a = fxyc[j+nxvh*2*k];
         b = fxyc[j+nxvh*(1+2*k)];
         fxy[2*(2*j+nxe*k)] = a.x;
         fxy[1+2*(2*j+nxe*k)] = b.x;
         fxy[2*(2*j+1+nxe*k)] = a.y;
         fxy[1+2*(2*j+1+nxe*k)] = b.y;
         j += blockDim.x;
      }
   }
/* copy edges of extended field */
   if (blockIdx.x==0) {
      k = threadIdx.x;
      while (k < nyp) {
         a = fxyc[nxvh*2*k];
         b = fxyc[nxvh*(1+2*k)];
         fxy[2*(nx+nxe*k)] = a.x;
         fxy[1+2*(nx+nxe*k)] = b.x;
         k += blockDim.x;
      }
/* copy exterior points */
      j = threadIdx.x;
      while (j < nxh) {
         scs[j] = fxyc[j];
         scs[j+nxvh] = fxyc[j+nxvh];
         j += blockDim.x;
      }
/* copy edges of extended field */
      if (threadIdx.x==0) {
         a = fxyc[0];
         b = fxyc[nxvh];
         a.y = 0.0f;
         b.y = 0.0f;
         scs[nxh] = a;
         scs[nxh+nxvh] = b;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppccguard2yl(float fxy[], float2 scr[], int nyp,
                                int nx, int nxe, int nxvh, int nypmx) {
/* this subroutine copies data to guard cells from remote processors
   fxy[k][j] = real data for grid j,k in particle partition.
   the grid is non-uniform and includes one extra guard cell.
   output: fxy
   scr[2][j] = complex input array for arriving data
   nyp = number of primary gridpoints in field partition
   it is assumed the nyp > 0.
   nx = system length in x direction
   nxe = second dimension of input field array fxy, must be >= nx+1
   nxvh = first dimension of scr, must be >= nx/2+1
   nypmx = maximum size of field partition, including guard cell.
   linear interpolation, for distributed data
local data */
   int j, nxh;
   float2 a, b;
   nxh = nx/2;
   j = threadIdx.x+blockDim.x*blockIdx.x;
/* copy to guard cells */
   if (j < nxh) {
      a = scr[j];
      b = scr[j+nxvh];
      fxy[2*(2*j+nxe*nyp)] = a.x;
      fxy[1+2*(2*j+nxe*nyp)] = b.x;
      fxy[2*(2*j+1+nxe*nyp)] = a.y;
      fxy[1+2*(2*j+1+nxe*nyp)] = b.y;
   }
   if (j==0) {
      a = scr[nxh];
      b = scr[nxh+nxvh];
      fxy[2*(nx+nxe*nyp)] = a.x;
      fxy[1+2*(nx+nxe*nyp)] = b.x;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppfnd2l(float ppart[], int kpic[], int ncl[],
                            int ihole[], int noff, int nyp, int idimp,
                            int nppmx, int nx, int ny, int mx, int my,
                            int mx1, int myp1, int ntmax, int *irc) {
/* this subroutine performs first step of a particle sort by x,y grid
   in tiles of mx, my, where one finds the particles leaving tile and
   stores their number, location, and destination in ncl and ihole.
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except ncl, ihole, irc
   output: ncl, ihole, irc
   ppart[k][0][n] = position x of particle n in tile k
   ppart[k][1][n] = position y of particle n in tile k 
   kpic[k] = number of particles in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ihole[k][:][0] = location of hole in array left by departing particle
   ihole[k][:][1] = destination of particle leaving hole
   ihole[k][0][0] = ih, number of holes left (error, if negative)
   noff = lowermost global gridpoint in particle partition.
   nyp = number of primary (complete) gridpoints in particle partition
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   nx/ny = system length in x/y direction
   mx/my = number of grids in sorting cell in x/y
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   ntmax = size of hole array for particles leaving tiles
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int mxyp1, noffp, moffp, nppp, j, k, ih, ist, nn, mm, nths;
   float anx, any, edgelx, edgely, edgerx, edgery, dx, dy;
/* The sizes of the shared memory arrays are as follows: */
/* int sncl[8], sih[blockDim.x], nh[1];                  */
   int *sncl, *sih, *nh;
   extern __shared__ int shm[];
   sncl = (int *)&shm[0];
   sih = (int *)&shm[8];
   nh = (int *)&shm[8+blockDim.x];
   mxyp1 = mx1*myp1;
   anx = (float) nx;
   any = (float) ny;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* find and count particles leaving tiles and determine destination */
/* update ppart, ihole, ncl */
/* loop over tiles */
   if (k < mxyp1) {
      noffp = k/mx1;
      moffp = my*noffp;
      noffp = mx*(k - mx1*noffp);
      nppp = kpic[k];
      nn = nx - noffp;
      nn = mx < nn ? mx : nn;
      mm = nyp - moffp;
      mm = my < mm ? my : mm;
      edgelx = noffp;
      edgerx = noffp + nn;
      edgely = noff + moffp;
      edgery = noff + moffp + mm;
/* clear counters */
      j = threadIdx.x;
      while (j < 8) {
         sncl[j] = 0;
         j += blockDim.x;
      }
      if (threadIdx.x==0) {
         nh[0] = 0;
      }
/* synchronize threads */
      __syncthreads();
/* loop over particles in tile */
      mm = (nppp - 1)/(int) blockDim.x + 1;
      noffp = 0;
      for (nn = 0; nn < mm; nn++) {
         j = threadIdx.x + blockDim.x*nn;
         sih[threadIdx.x] = 0;
         if (j < nppp) {
            dx = ppart[j+nppmx*(idimp*k)];
            dy = ppart[j+nppmx*(1+idimp*k)];
/* find particles going out of bounds */
            ist = 0;
/* count how many particles are going in each direction in ncl   */
/* save their address and destination in ihole                   */
/* use periodic boundary conditions and check for roundoff error */
/* ist = direction particle is going                             */
            if (dx >= edgerx) {
               if (dx >= anx)
                  ppart[j+nppmx*(idimp*k)] = dx - anx;
               ist = 2;
            }
            else if (dx < edgelx) {
               if (dx < 0.0f) {
                  dx += anx;
                  if (dx < anx)
                     ist = 1;
                  else
                     dx = 0.0f;
                  ppart[j+nppmx*(idimp*k)] = dx;
               }
               else {
                  ist = 1;
               }
            }
            if (dy >= edgery) {
               if (dy >= any)
                  ppart[j+nppmx*(1+idimp*k)] = dy - any;
               ist += 6;
            }
            else if (dy < edgely) {
               if (dy < 0.0f) {
                  dy += any;
                  if (dy < any)
                     ist += 3;
                  else
                     dy = 0.0f;
                  ppart[j+nppmx*(1+idimp*k)] = dy;
               }
               else {
                  ist += 3;
               }
            }
/* using prefix scan for ih to keep holes ordered */
            if (ist > 0) {
               atomicAdd(&sncl[ist-1],1);
               sih[threadIdx.x] = 1;
            }
         }
/* synchronize threads */
         __syncthreads();
         nths = nppp - blockDim.x*nn;
         if (nths > blockDim.x)
            nths = blockDim.x;
/* perform local prefix reduction */
         liscan2(sih,nths);
         if (j < nppp) {
            ih = sih[threadIdx.x];
            moffp = 0;
            if (threadIdx.x > 0)
               moffp = sih[threadIdx.x-1];
/* this thread has a hole present */
            if (ih > moffp) {
               ih += noffp;
               if (ih <= ntmax) {
                  ihole[2*(ih+(ntmax+1)*k)] = j + 1;
                  ihole[1+2*(ih+(ntmax+1)*k)] = ist;
               }
               else {
                  nh[0] = 1;
               }
            }
         }
/* update number of holes in this iteration */
         if (nths > 0)
            noffp += sih[nths-1];
/* synchronize threads */
         __syncthreads();
      }
/* write out counters */
      j = threadIdx.x;
      while (j < 8) {
         ncl[j+8*k] = sncl[j];
         j += blockDim.x;
      }
/* set error and end of file flag */
      if (threadIdx.x==0) {
/* ihole overflow */
         ih  = noffp;
         if (nh[0] > 0) {
            *irc = ih;
            ih = -ih;
         }
         ihole[2*(ntmax+1)*k] = ih;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppmov2l(float ppart[], float ppbuff[], int ncl[],
                            int ihole[], int idimp, int nppmx, int mx1,
                            int myp1, int npbmx, int ntmax, int *irc) {
/* this subroutine performs second step of a particle sort by x,y grid
   in tiles of mx, my, where prefix scan of ncl is performed and
   departing particles are buffered in ppbuff in direction order.
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except ppbuff, irc
   output: ppbuff, ncl, irc
   ppart[k][i][n] = i co-ordinate of particle n in tile k 
   ppbuff[k][i][n] = i co-ordinate of particle n in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ihole[k][:][0] = location of hole in array left by departing particle
   ihole[k][:][1] = direction destination of particle leaving hole
   all for tile k
   ihole[k][0][0] = ih, number of holes left (error, if negative)
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   npbmx = size of buffer array ppbuff
   ntmax = size of hole array for particles leaving tiles
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int mxyp1, i, j, k, ii, nh, ist, j1, ierr;
/* The sizes of the shared memory arrays are as follows: */
/* int sncl[8], ip[1];                                   */
/* blockDim.x should be >= 8                             */
   int *sncl, *ip;
   extern __shared__ int shm[];
   sncl = (int *)&shm[0];
   ip = (int *)&shm[8];
   mxyp1 = mx1*myp1;
   ierr = 0;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
   j = threadIdx.x;
/* buffer particles that are leaving tile: update ppbuff, ncl */
/* loop over tiles */
   if (k < mxyp1) {
/* find address offset for ordered ppbuff array */
      if (j < 8) {
         ist = ncl[j+8*k];
         sncl[j] = ist;
      }
      if (threadIdx.x==0)
         ip[0] = 0;
/* synchronize threads */
      __syncthreads();
/* perform local prefix reduction */
      liscan2(sncl,8);
      if (j < 8)
         sncl[j] -= ist;
/* synchronize threads */
      __syncthreads();
      nh = ihole[2*(ntmax+1)*k];
/* loop over particles leaving tile */
      while (j < nh) {
/* buffer particles that are leaving tile, in direction order */
         j1 = ihole[2*(j+1+(ntmax+1)*k)] - 1;
         ist = ihole[1+2*(j+1+(ntmax+1)*k)];
         ii = atomicAdd(&sncl[ist-1],1);
         if (ii < npbmx) {
            for (i = 0; i < idimp; i++) {
               ppbuff[ii+npbmx*(i+idimp*k)]
               = ppart[j1+nppmx*(i+idimp*k)];
            }
         }
         else {
            ip[0] = 1;
         }
         j += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* write out counters */
      j = threadIdx.x;
      if (j < 8) {
         ncl[j+8*k] = sncl[j];
      }
/* set error */
      if (threadIdx.x==0) {
         if (ip[0] > 0)
            ierr = ierr > sncl[7] ? ierr : sncl[7];
      }
   }
/* ppbuff overflow */
   if (ierr > 0)
      *irc = ierr;
   return;
}

/*--------------------------------------------------------------------*/
__global__ void nciscan2(int ncl[], int ncll[], int nclr[], int nscr[], 
                         int mx1, int myp1) {
/* calculate number number offsets for particles leaving processor
   by performing prefix scan (running sum) for each block.  the last
   value of each block is written to nscr to add to each block later.
   ncl[k][i] = number of particles going to destination i, tile k
   ncll = number offset being sent to lower processor
   nclr = number offset being sent to upper processor
   nscr = scratch integer array, of size 2*((mx1-1)/blockDim.x+1)
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
local data                                                            */
   int l, koff, ii, jj, kk, nths;
/* The size of the shared memory array are as follows: */
/* int isdata[2*blockDim.x];                           */
   int *isdata;
   extern __shared__ int shm[];
   isdata = (int *)&shm[0];
   l = threadIdx.x;
   koff = blockDim.x*blockIdx.x;
   kk = mx1*(myp1 - 1) + koff;
   nths = mx1 - koff;
   if (nths > blockDim.x)
      nths = blockDim.x;
   if ((l+koff) < mx1) {
      ii = ncl[4+8*(l+koff)] - ncl[1+8*(l+koff)];
      isdata[l] = ii;
      jj = ncl[7+8*(l+kk)] - ncl[4+8*(l+kk)];
      isdata[l+blockDim.x] = jj;
   }
/* synchronize threads */
   __syncthreads();
/* perform local prefix reductions */
   liscan2(isdata,nths);
   liscan2(&isdata[blockDim.x],nths);
   if ((l+koff) < mx1) {
      ncll[3*(l+koff)] = ii;
      ncll[3*(l+koff)+1] = isdata[l] - ii;
      nclr[3*(l+koff)] = jj;
      nclr[3*(l+koff)+1] = isdata[l+blockDim.x] - jj;
   }
   if (l==0) {
      ii = 0;
      jj = 0;
      if (nths > 0) {
         ii = isdata[nths-1];
         jj = isdata[nths+blockDim.x-1];
      }
      nscr[blockIdx.x] = ii;
      nscr[blockIdx.x+gridDim.x] = jj;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppbuf2l(float ppbuff[], float sbufl[],
                            float sbufr[], int ncl[], int ncll[],
                            int nclr[], int nscr[], int idimp, int mx1,
                            int myp1, int npbmx, int nbmax, int *irc) {
/* this subroutine performs third step of a particle sort by x,y grid
   in tiles of mx, my, where particles leaving the processor are
   buffered in sbufl and sbufr, and particle number offsets are stored
   in ncll and nclr.
   gpupppbuf2l and nciscan2 should use the same blocksize.
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except sbufl, sbufr, ncll, nclr, irc
   output: sbufl, sbufr, ncll, nclr, irc
   ppbuff[k][i][n] = i co-ordinate of particle n in tile k
   sbufl = buffer for particles being sent to lower processor
   sbufr = buffer for particles being sent to upper processor
   kpic[k] = number of particles in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ncll = number offset being sent to lower processor
   nclr = number offset being sent to upper processor
   nscr = scratch integer array, of size 2*((mx1-1)/blockDim.x+1)
   idimp = size of phase space = 4
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   npbmx = size of buffer array ppbuff
   nbmax =  size of buffers for passing particles between processors
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int i, j, k, ii, jj, nl, nr, nn, mm, nbl, kk, ll, im;
   k = blockIdx.x;
/* buffer particles and their number leaving the node: */
/* update sbufl, sbufr, ncll, nclr */
   nbl = (mx1 - 1)/blockDim.x + 1;
   nl = 0;
   nr = 0;
   nn = 0;
   mm = 0;
   kk = mx1*(myp1 - 1);
/* loop over row of tiles */
   if (k < mx1) {
      j = k/blockDim.x + 1;
/* find how many particles must be buffered */
      for (i = 1; i < nbl; i++) {
         nl += nscr[i-1];
         nr += nscr[i+nbl-1];
/* save offsets */
         if (i==(j-1)) {
            nn = nl;
            mm = nr;
         }
      }
      nl += nscr[nbl-1];
      nr += nscr[2*nbl-1];
      ii = ncll[3*k];
      nn += ncll[3*k+1];
      im = nclr[3*k];
      mm += nclr[3*k+1];
/* synchronize threads */
      __syncthreads();
      ll = ncl[1+8*k];
      jj = nl - nn;
      jj = ii < jj ? ii : jj;
      j = threadIdx.x;
      while (j < jj) {
         for (i = 0; i < idimp; i++) {
            sbufl[j+nn+nl*i]
            = ppbuff[j+ll+npbmx*(i+idimp*k)];

         }
         j += blockDim.x;
      }
      ll = nn - ll;
      if (threadIdx.x < 3) {
         ncll[threadIdx.x+3*k] = ncl[threadIdx.x+2+8*k] + ll;
      }
      nn += ii;
      ii = im;
      ll = ncl[4+8*(k+kk)];
      jj = nr - mm;
      jj = ii < jj ? ii : jj;
      j = threadIdx.x;
      while (j < jj) {
         for (i = 0; i < idimp; i++) {
            sbufr[j+mm+nr*i]
            = ppbuff[j+ll+npbmx*(i+idimp*(k+kk))];
         }
         j += blockDim.x;
      }
      ll = mm - ll;
      if (threadIdx.x < 3) {
         nclr[threadIdx.x+3*k] = ncl[threadIdx.x+5+8*(k+kk)] + ll;
      }
      mm += ii;
   }
/* sbufl or sbufr overflow */
   ii = nn > mm ? nn : mm;
   if (ii > nbmax)
      *irc = ii;
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppord2l(float ppart[], float ppbuff[],
                            float rbufl[], float rbufr[], int kpic[],
                            int ncl[], int ihole[], int mcll[],
                            int mclr[], int idimp, int nppmx, int mx1,
                            int myp1, int npbmx, int ntmax, int nbmax,
                            int *irc) {
/* this subroutine performs third step of a particle sort by x,y grid
   in tiles of mx, my, where incoming particles from other tiles are
   copied into ppart from ppbuff, rbufl, and rbufr
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except irc
   output: ppart, kpic, irc
   ppart[k][i][n] = i co-ordinate of particle n in tile k 
   ppbuff[k][i][n] = i co-ordinate of particle n in tile k
   rbufl = buffer for particles being received from lower processor
   rbufr = buffer for particles being received from upper processor
   kpic[k] = number of particles in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ihole[k][:][0] = location of hole in array left by departing particle
   ihole[k][:][1] = direction destination of particle leaving hole
   all for tile k
   ihole[k][0][0] = ih, number of holes left (error, if negative)
   mcll = number offset being received from lower processor
   mclr = number offset being received from upper processor
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   npbmx = size of buffer array ppbuff
   ntmax = size of hole array for particles leaving tiles
   nbmax =  size of buffers for passing particles between processors
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int mxyp1, nppp, ncoff, noff, moff, i, j, k, ii, jj, kx, ky, ni, nh;
   int nn, mm, ll, ip, j1, j2, kxl, kxr, kk, kl, kr, nr, mr;
   int nths;
/* The sizes of the shared memory arrays are as follows: */
/* int ks[8], sip[8], sj[blockDim.x], sj1[1], ist[1];    */
   int *ks, *sip, *sj, *sj1, *ist;
   extern __shared__ int shm[];
   ks = (int *)&shm[0];
   sip = (int *)&shm[8];
   sj = (int *)&shm[16];
   sj1 = (int *)&shm[16+blockDim.x];
   ist = (int *)&shm[17+blockDim.x];
   mxyp1 = mx1*myp1;
   noff = 0;
   moff = 0;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* copy incoming particles from buffer into ppart: update ppart, kpic */
/* loop over tiles */
   if (k < mxyp1) {
      nppp = kpic[k];
      ky = k/mx1;
/* loop over tiles in y */
      kk = ky*mx1;
/* find tile above */
      kl = (ky - 1)*mx1;
/* find tile below */
      kr = (ky + 1)*mx1;
/* loop over tiles in x, assume periodic boundary conditions */
      kx = k - ky*mx1;
      kxl = kx - 1;
      if (kxl < 0)
         kxl += mx1;
      kxr = kx + 1;
      if (kxr >= mx1)
         kxr -= mx1;
/* find tile number for different directions */
      if (threadIdx.x==0) {
         ks[0] = kxr + kk;
         ks[1] = kxl + kk;
         ks[2] = kx + kr;
         ks[3] = kxr + kr;
         ks[4] = kxl + kr;
         ks[5] = kx + kl;
         ks[6] = kxr + kl;
         ks[7] = kxl + kl;
         sj1[0] = 0;
         ist[0] = 0;
      }
/* synchronize threads */
      __syncthreads();
/* find number of incoming particles */
      kk = 0;
      if (ky==0) {
         nr = mcll[3*mx1-1];
         if (kx > 0)
            noff = mcll[3*kx-1];
      }
      if (ky==(myp1-1)) {
         mr = mclr[3*mx1-1];
         if (kx > 0)
            moff = mclr[3*kx-1];
      }
      ncoff = 0;
      ip = 0;
      ii = threadIdx.x;
      if (ii < 8) {
         kk = ks[ii];
/* ip = number of particles coming from direction ii */
         if (kk < 0) {
            if (ii > 5)
               noff = mcll[ii-6+3*(kk+mx1)];
            ip = mcll[ii-5+3*(kk+mx1)] - noff;
            kk = noff;
         }
         else if (kk >= mxyp1) {
            if (ii > 2)
               moff = mclr[ii-3+3*(kk-mxyp1)];
            ip = mclr[ii-2+3*(kk-mxyp1)] - moff;
            kk = moff;
         }
         else {
            if (ii > 0)
               ncoff = ncl[ii-1+8*kk];
            ip = ncl[ii+8*kk] - ncoff;
            kk = ncoff + idimp*npbmx*kk;
         }
         sip[ii] = ip;
      }
/* synchronize threads */
      __syncthreads();
/* perform local prefix reduction */
      liscan2(sip,8);
      ni = sip[7];
/* loop over directions */
      nh = ihole[2*(ntmax+1)*k];
      j1 = 0;
      mm = (ni - 1)/(int) blockDim.x + 1;
      for (nn = 0; nn < mm; nn++) {
         j = threadIdx.x + blockDim.x*nn;
         sj[threadIdx.x] = 0;
         if (threadIdx.x==0)
            sj[0] = sj1[0];
/* synchronize threads */
         __syncthreads();
/* calculate offset for reading from particle buffer */
         if (ii < 8) {
/* mark next location where direction ii changes */
            jj = sip[ii] - blockDim.x*nn;
            if ((jj >= 0) && (jj < blockDim.x)) {
               if (ip > 0)
                  sj[jj] -= kk + ip;
            }
         }
/* synchronize threads */
         __syncthreads();
/* calculate offset for reading from particle buffer */
         if (ii < 8) {
/* mark location where direction ii starts */
            jj -= ip;
            if ((jj >= 0) && (jj < blockDim.x)) {
               if (ip > 0)
                  sj[jj] += kk;
            }
         }
         nths = ni - blockDim.x*nn;
         if (nths > blockDim.x)
            nths = blockDim.x;
/* synchronize threads */
         __syncthreads();
/* perform local prefix reduction */
         liscan2(sj,nths);
/* save last value for next time */
         if (threadIdx.x==0) {
            jj = 0;
            if (nths > 0)
               jj = sj[nths-1];
            sj1[0] = jj;
         }
         if (j < ni) {
/* insert incoming particles into holes */
            if (j < nh) {
               j1 = ihole[2*(j+1+(ntmax+1)*k)] - 1;
            }
/* place overflow at end of array */
            else {
               j1 = nppp + (j - nh);
            }
            if (j1 < nppmx) {
               jj = sj[threadIdx.x];
               if ((ky==0) && (j>=sip[4]) && (j<sip[7])) {
                  for (i = 0; i < idimp; i++) {
                     ppart[j1+nppmx*(i+idimp*k)]
                     = rbufl[j+jj+nr*i];
                  }
               }
               else if ((ky==(myp1-1)) && (j>=sip[1]) && (j<sip[4])) {
                  for (i = 0; i < idimp; i++) {
                     ppart[j1+nppmx*(i+idimp*k)]
                     = rbufr[j+jj+mr*i];
                  }
               }
               else {
                  for (i = 0; i < idimp; i++) {
                     ppart[j1+nppmx*(i+idimp*k)]
                     = ppbuff[j+jj+npbmx*i];
                  }
               }
            }
            else {
               ist[0] = 1;
            }
         }
/* synchronize threads */
         __syncthreads();
      }
/* update particle number if all holes have been filled */
      jj = ni - nh;
      if (jj > 0)
         nppp += jj;
/* fill up remaining holes in particle array with particles from end */
      ip = nh - ni;
      if (ip > 0) {
         mm = (ip - 1)/(int) blockDim.x + 1;
         kk = 0;
         ll = 0;
/* loop over holes */
         for (nn = 0; nn < mm; nn++) {
            j = threadIdx.x + blockDim.x*nn;
/* j1 = locations of particles to fill holes, in decreasing order */
            j1 = 0;
            if (j < ip) {
               j1 = nppp - j - 1;
            }
/* j2 = locations of holes at the end, in decreasing order */
            j2 = 0;
            jj = nh - ll - threadIdx.x;
            if (jj > 0) {
               j2 = ihole[2*(jj+(ntmax+1)*k)] - 1;
            }
/* holes with locations greater than nppp-ip do not need to be filled */
/* identify such holes */
            sj[threadIdx.x] = 1;
/* synchronize threads */
            __syncthreads();
/* omit particles at end that are holes */
            ii = nppp - (j2 + blockDim.x*nn) - 1;
            if ((ii >= 0) && (ii < blockDim.x))
               sj[ii] = 0;
            nths = ip - blockDim.x*nn;
            if (nths > blockDim.x)
               nths = blockDim.x;
/* synchronize threads */
            __syncthreads();
/* perform local prefix reduction */
            liscan2(sj,nths);
/* ii = number particles at end to be moved */
            ii = 0;
            if (nths > 0)
               ii = sj[nths-1];
/* identify which particles at end to be moved */
            if (ii < nths) {
               ncoff = 0;
               if (j < ip) {
                  if (threadIdx.x > 0)
                    ncoff = sj[threadIdx.x-1];
                  jj = sj[threadIdx.x];
               }
/* synchronize threads */
               __syncthreads();
               if (j < ip) {
                  if (jj > ncoff) {
                     sj[jj-1] = j1;
                  }
               }
/* synchronize threads */
               __syncthreads();
            }
/* j2 = locations of holes to be filled in increasing order */
            j2 = 0;
            if (j < ip) {
               j1 = nppp - j - 1;
               jj = threadIdx.x + ni + kk + 1;
               if (jj <= nh)
                  j2 = ihole[2*(jj+(ntmax+1)*k)] - 1;
            }
/* move particles from end into remaining holes */
            if (j < (ii+blockDim.x*nn)) {
               if (ii < nths)
                  j1 = sj[threadIdx.x];
               for (i = 0; i < idimp; i++) {
                  ppart[j2+nppmx*(i+idimp*k)]
                  = ppart[j1+nppmx*(i+idimp*k)];
               }
            }
/* accumulate number of holes filled */
            kk += ii;
/* accumulate number of holes skipped over */
            ii = nths - ii;
            ll += ii;
         }
/* update number of particles */
         nppp -= ip;
      }
/* set error and update particle */
      if (threadIdx.x==0) {
/* ppart overflow */
         if (ist[0] > 0)
            *irc = nppp;
         kpic[k] = nppp;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppois22t(float2 qt[], float2 fxyt[], float2 ffct[],
                            float *we, int nx, int ny, int kstrt,
                            int nyv, int kxp1, int nyhd) {
/* this subroutine solves 2d poisson's equation in fourier space for
   force/charge (or convolution of electric field over particle shape)
   with periodic boundary conditions, for distributed data.
   vector length is second dimension.
   input: qt,ffct,nx,ny,nyv,kxp1,nyhd, output: fxyt,we
   approximate flop count is: 33*nxc*nyc + 15*(nxc + nyc)
   where nxc = (nx/2-1)/nvp, nyc = ny/2 - 1, and nvp = number of procs
   the equation used is:
   fx[ky][kx] = -sqrt(-1)*kx*g[ky][kx]*s[ky][kx]*q[ky][kx],
   fy[ky][kx] = -sqrt(-1)*ky*g[ky][kx]*s[ky][kx]*q[ky][kx],
   where kx = 2pi*j/nx, ky = 2pi*k/ny, and j,k = fourier mode numbers,
   g[ky][kx] = (affp/(kx**2+ky**2))*s[ky][kx],
   s[ky][kx] = exp(-((kx*ax)**2+(ky*ay)**2)/2), except for
   fx(kx=pi) = fy(kx=pi) = fx(ky=pi) = fy(ky=pi) = 0, and
   fx(kx=0,ky=0) = fy(kx=0,ky=0) = 0.
   qt[j][k] = complex charge density for fourier mode (jj,k)
   fxyt[j][0][k] = x component of complex force/charge,
   fxyt[j][1][k] = y component of complex force/charge,
   for fourier mode (jj,k), where jj = j + kxp1*(kstrt - 1)
   kxp1 = number of data values per block for unpacked field data
   kstrt = starting data block number
   aimag(ffct[j][k]) = finite-size particle shape factor s
   real(ffct[j][k])) = potential green's function g
   for fourier mode (jj,k), where jj = j + kxp1*(kstrt - 1)
   electric field energy is also calculated, using
   we = nx*ny*sum((affp/(kx**2+ky**2))*|q[ky][kx]*s[ky][kx]|**2)
   where affp = nx*ny/np, where np=number of particles
   nx/ny = system length in x/y direction
   nyv = first dimension of field arrays, must be >= ny
   nyhd = first dimension of form factor array, must be >= nyh
local data                                                 */
   int nxh, nyh, ks, joff, kxps, j, jj, jk, k, j0, j1, k1, jk2;
   float dnx, dny, dkx, at1, at2, at3, at4;
   float2 zero, zt1, zt2, zt3;
/* The size of the shared memory array is as follows: */
/* float ss[blockDim.x];                              */
   extern __shared__ float ss[];
   double wp;
   nxh = nx/2;
   nyh = 1 > ny/2 ? 1 : ny/2;
   ks = kstrt - 1;
   joff = kxp1*ks;
   j1 = nxh + 1;
   kxps = j1 - joff;
   kxps = 0 > kxps ? 0 : kxps;
   kxps = kxp1 < kxps ? kxp1 : kxps;
   dnx = 6.28318530717959f/(float) nx;
   dny = 6.28318530717959f/(float) ny;
   zero.x = 0.0f;
   zero.y = 0.0f;
/* calculate force/charge and sum field energy */
   wp = 0.0;
   if (kstrt <= j1) {
/* mode numbers 0 < kx < nx/2 and 0 < ky < ny/2 */
/*    for (j = 0; j < kxps; j++) { */
      j = blockIdx.x;
      j0 = j + joff;
      dkx = dnx*(float) j0;
      jj = nyhd*j;
      jk = nyv*j;
      jk2 = 2*jk;
      if ((j0 > 0) && (j0 < nxh)) {
/*       for (k = 1; k < nyh; k++) { */
         k = threadIdx.x;
         while (k < nyh) {
            if (k > 0) {
               k1 = ny - k;
               zt1 = ffct[k+jj];
               at1 = zt1.x*zt1.y;
               at2 = at1*dkx;
               at3 = at1*dny*(float) k;
               zt1 = qt[k+jk];
               at4 = zt1.x;
               zt1.x = zt1.y;
               zt1.y = -at4;
               zt2 = qt[k1+jk];
               at4 = zt2.x;
               zt2.x = zt2.y;
               zt2.y = -at4;
               zt3.x = at2*zt1.x;
               zt3.y = at2*zt1.y;
               fxyt[k+jk2] = zt3;
               zt3.x = at2*zt2.x;
               zt3.y = at2*zt2.y;
               fxyt[k1+jk2] = zt3;
               zt3.x = at3*zt1.x;
               zt3.y = at3*zt1.y;
               fxyt[k+nyv+jk2] = zt3;
               zt3.x = -at3*zt2.x;
               zt3.y = -at3*zt2.y;
               fxyt[k1+nyv+jk2] = zt3;
               wp += (double) (at1*(zt1.x*zt1.x + zt1.y*zt1.y
                   + zt2.x*zt2.x + zt2.y*zt2.y));
            }
            k += blockDim.x;
         }
      }
/* mode numbers ky = 0, ny/2 */
      if (blockIdx.x==0) {
         k1 = nyh;
/*       for (j = 1; j < kxps; j++) { */
         j = threadIdx.x;
         while (j < kxps) {
            j0 = j + joff;
            dkx = dnx*(float) j0;
            jj = nyhd*j;
            jk = nyv*j;
            jk2 = 2*jk;
            if ((j0 > 0) && (j0 < nxh)) {
               zt1 = ffct[jj];
               at1 = zt1.x*zt1.y;
               at2 = dkx*at1;
               zt1 = qt[jk];
               at4 = zt1.x;
               zt3.x = at2*zt1.y;
               zt3.y = -at2*at4;
               fxyt[jk2] = zt3;
               fxyt[k1+jk2] = zero;
               fxyt[nyv+jk2] = zero;
               fxyt[k1+nyv+jk2] = zero;
               wp += (double) (at1*(zt1.x*zt1.x + zt1.y*zt1.y));
            }
            j += blockDim.x;
         }
/* mode numbers kx = 0 */
         if (ks==0) {
/*          for (k = 1; k < nyh; k++) { */
            k = threadIdx.x;
            while (k < nyh) {
               if (k > 0) {
                  k1 = ny - k;
                  zt1 = ffct[k];
                  at1 = zt1.x*zt1.y;
                  at3 = at1*dny*(float) k;
                  zt1 = qt[k];
                  at4 = zt1.x;
                  zt3.x = at3*zt1.y;
                  zt3.y = -at3*at4;
                  fxyt[k] = zero;
                  fxyt[k1] = zero;
                  fxyt[k+nyv] = zt3;
                  zt3.y = -zt3.y;
                  fxyt[k1+nyv] = zt3;
                  wp += (double) (at1*(zt1.x*zt1.x + zt1.y*zt1.y));
               }
               k += blockDim.x;
            }
            if (threadIdx.x==0) {
               k1 = nyh;
               fxyt[0] = zero;
               fxyt[k1] = zero;
               fxyt[nyv] = zero;
               fxyt[k1+nyv] = zero;
            }
         }
/* mode numbers kx = nx/2 */
         if (ks==(nxh/kxp1)) {
            jk = 2*nyv*(kxps-1);
/*          for (k = 0; k < ny; k++) { */
            k = threadIdx.x;
            while (k < ny) {
               fxyt[k+jk] = zero;
               fxyt[k+nyv+jk] = zero;
               k += blockDim.x;
            }
         }
      }
   }
   j = blockIdx.x;
   if (j < kxps) {
/* sum potential energies for each x co-ordinate */
      ss[threadIdx.x] = (float) wp;
/* synchronize threads */
      __syncthreads();
      lsum2(ss,blockDim.x);
/* normalize potential energy for each x co-ordinate */
      if (threadIdx.x==0)
         we[j] = ss[0]*((float) nx)*((float) ny);
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpufft2rcxs(float2 f[], int isign, int mixup[],
                            float2 sct[], int indx, int indy, int nyi,
                            int nyp, int nxhd, int nyd, int nxhyd,
                            int nxyhd, int nsize) {
/* this subroutine performs the x part of a two dimensional real to
   complex fast fourier transform and its inverse, for a subset of y,
   using complex arithmetic.
   for isign = (-1,1), input: all, output: f
   for isign = -1, approximate flop count: N*(5*log2(N) + 19/2)
   for isign = 1,  approximate flop count: N*(5*log2(N) + 15/2)
   where N = (nx/2)*ny
   indx/indy = exponent which determines length in x/y direction,
   where nx=2**indx, ny=2**indy
   if isign = -1, an inverse fourier transform in x is performed
   f[m][n] = (1/nx*ny)*sum(f[k][j]*exp(-sqrt(-1)*2pi*n*j/nx))
   if isign = 1, a forward fourier transform in x is performed
   f[k][j] = sum(f[m][n]*exp(sqrt(-1)*2pi*n*j/nx))
   mixup = array of bit reversed addresses
   sct = sine/cosine table
   nyi = initial y index used
   nyp = number of y indices used
   nxhd = first dimension of f >= nx/2+1
   nyd = second dimension of f >= ny
   nxhyd = maximum of (nx/2,ny)
   nxyhd = maximum of (nx,ny)/2
   nsize = amount of scratch complex memory used
   fourier coefficients are stored as follows:
   f[k][j].x, f[k][j].y = real, imaginary part of mode j,k, where
   0 <= j < nx/2+1 and 0 <= k < ny
   written by viktor k. decyk, ucla
local data                                                            */
   int indx1, indx1y, nx, nxh, nxhh, ny, nxy, nxhy, nyt;
   int nrx, i, j, k, l, j1, j2, k1, k2, ns, ns2, km, kmr, jj, kk;
   int n, nn, in, nt, nh;
   float ani, at1, at2;
   float2 t1, t2, t3;
/* The size of the shared memory array is as follows: */
/* float2 s[nsize];                                   */
   extern __shared__ float2 s[];
   indx1 = indx - 1;
   indx1y = indx1 > indy ? indx1 : indy;
   nx = 1L<<indx;
   nxh = nx/2;
   nxhh = nx/4;
   ny = 1L<<indy;
   nxy = nx > ny ? nx : ny;
   nxhy = 1L<<indx1y;
   nyt = nyi + nyp - 1;
/* calculate extent of shared memory usage: */
/* nn = size of shared memory in x          */
   nn = nxh;
   in = 0;
   while (nn > nsize) {
      nn = nn/2;
      in += 1;
   }
/* nt = number of iterations in x           */
   nt = 1L<<in;
   in = indx1 - in;
   nh = nn/2;
/* inverse fourier transform */
   if (isign < 0) {
/* bit-reverse array elements in x */
      nrx = nxhy/nxh;
/* for (k = nyi-1; k < nyt; k++) { */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 0; j < nxh; j++) { */
         j = threadIdx.x;
         while (j < nxh) {
            j1 = (mixup[j] - 1)/nrx;
            if (j < j1) {
               t1 = f[j1+jj];
               f[j1+jj] = f[j+jj];
               f[j+jj] = t1;
            }
            j += blockDim.x;
         }
/* synchronize threads */
         __syncthreads();
      }
/* copy data to local memory */
      nrx = nxy/nxh;
/*    for (i = nyi-1; i < nyt; i++) { */
      i = blockIdx.x + nyi - 1;
      if (i < nyt) {
         jj = nxhd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = f[kk+nn*n+jj];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in x */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nxhh/ns;
               kmr = km*nrx;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
               ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               f[kk+nn*n+jj] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in x */
         ns = 1L<<in;
         for (l = in; l < indx1; l++) {
            ns2 = ns + ns;
            km = nxhh/ns;
            kmr = km*nrx;
/*          for (kk = 0; kk < nxhh; kk++) { */
            kk = threadIdx.x;
            while (kk < nxhh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t2 = f[j2+jj];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t2 = f[j1+jj];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               f[j2+jj] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               f[j1+jj] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
/* unscramble coefficients and normalize */
      kmr = nxy/nx;
      ani = 0.5f/(((float) nx)*((float) ny));
/* for (k = nyi-1; k < nyt; k++) */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 1; j < nxhh; j++) { */
         j = threadIdx.x;
         while (j < nxhh) {
            if (j > 0) {
               t3 = sct[kmr*j];
               at1 = t3.y;
               at2 = -t3.x;
               t2 = f[nxh-j+jj];
               t2.y = -t2.y;
               t3 = f[j+jj];
               t1.x = t3.x + t2.x;
               t1.y = t3.y + t2.y;
               t3.x -= t2.x;
               t3.y -= t2.y;
               t2.x = t3.x*at1 - t3.y*at2;
               t2.y = t3.x*at2 + t3.y*at1;
               t3.x = ani*(t1.x + t2.x);
               t3.y = ani*(t1.y + t2.y);
               f[j+jj] = t3;
               t3.x = ani*(t1.x - t2.x);
               t3.y = ani*(t2.y - t1.y);
               f[nxh-j+jj] = t3;
            }
            j += blockDim.x;
         }
         if (threadIdx.x==0) {
            ani = 2.0f*ani;
            t3 = f[nxhh+jj];
            t3.x = ani*t3.x;
            t3.y = -ani*t3.y;
            f[nxhh+jj] = t3;
            t3 = f[jj];
            at1 = t3.x;
            at2 = t3.y;
            t3.x = ani*(at1 - at2);
            t3.y = 0.0f;
            f[nxh+jj] = t3;
            t3.x = ani*(at1 + at2);
            f[jj] = t3;
         }
/* synchronize threads */
         __syncthreads();
      }
   }
/* forward fourier transform */
   if (isign > 0) {
/* scramble coefficients */
      kmr = nxy/nx;
/*    for (k = nyi-1; k < nyt; k++) { */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 1; j < nxhh; j++) { */
         j = threadIdx.x;
         while (j < nxhh) {
            if (j > 0) {
               t3 = sct[kmr*j];
               at1 = t3.y;
               at2 = t3.x;
               t2 = f[nxh-j+jj];
               t2.y = -t2.y;
               t3 = f[j+jj];
               t1.x = t3.x + t2.x;
               t1.y = t3.y + t2.y;
               t3.x -= t2.x;
               t3.y -= t2.y;
               t2.x = t3.x*at1 - t3.y*at2;
               t2.y = t3.x*at2 + t3.y*at1;
               t3.x = t1.x + t2.x;
               t3.y = t1.y + t2.y;
               f[j+jj] = t3;
               t3.x = t1.x - t2.x;
               t3.y = t2.y - t1.y;
               f[nxh-j+jj] = t3;
            }
            j += blockDim.x;
         }
         if (threadIdx.x==0) {
            t3 = f[nxhh+jj];
            t3.x = 2.0f*t3.x;
            t3.y = -2.0f*t3.y;
            f[nxhh+jj] = t3;
            t3 = f[jj];
            at1 = t3.x;
            t3 = f[nxh+jj];
            at2 = t3.x;
            t3.x = at1 + at2;
            t3.y = at1 - at2;
            f[jj] = t3;
         }
/* synchronize threads */
         __syncthreads();
      }
/* bit-reverse array elements in x */
      nrx = nxhy/nxh;
/* for (k = nyi-1; k < nyt; k++) { */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 0; j < nxh; j++) { */
         j = threadIdx.x;
         while (j < nxh) {
            j1 = (mixup[j] - 1)/nrx;
            if (j < j1) {
               t1 = f[j1+jj];
               f[j1+jj] = f[j+jj];
               f[j+jj] = t1;
            }
            j += blockDim.x;
         }
/* synchronize threads */
         __syncthreads();
      }
/* copy data to local memory */
      nrx = nxy/nxh;
/*    for (i = nyi-1; i < nyt; i++) { */
      i = blockIdx.x + nyi - 1;
      if (i < nyt) {
         jj = nxhd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = f[kk+nn*n+jj];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in x */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nxhh/ns;
               kmr = km*nrx;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t1.y = -t1.y;
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
               ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               f[kk+nn*n+jj] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in x */
         ns = 1L<<in;
         for (l = in; l < indx1; l++) {
            ns2 = ns + ns;
            km = nxhh/ns;
            kmr = km*nrx;
/*          for (kk = 0; kk < nxhh; kk++) { */
            kk = threadIdx.x;
            while (kk < nxhh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t1.y = -t1.y;
               t2 = f[j2+jj];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t2 = f[j1+jj];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               f[j2+jj] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               f[j1+jj] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpufft2rcys(float2 g[], int isign, int mixup[],
                            float2 sct[], int indx, int indy, int nxi,
                            int nxp, int nxhd, int nyd, int nxhyd,
                            int nxyhd, int nsize) {
/* this subroutine performs the y part of a two dimensional real to
   complex fast fourier transform and its inverse, for a subset of x,
   using complex arithmetic, with data not packed
   for isign = (-1,1), input: all, output: g
   for isign = -1, approximate flop count: N*(5*log2(N) + 19/2)
   for isign = 1,  approximate flop count: N*(5*log2(N) + 15/2)
   where N = (nx/2)*ny
   indx/indy = exponent which determines length in x/y direction,
   where nx=2**indx, ny=2**indy
   if isign = -1, an inverse fourier transform in y is performed
   g[n][m] = sum(g[j][k]*exp(-sqrt(-1)*2pi*m*k/ny))
   if isign = 1, a forward fourier transform in y is performed
   g[j][k] = sum(g[n][m]*exp(sqrt(-1)*2pi*m*k/ny))
   mixup = array of bit reversed addresses
   sct = sine/cosine table
   nxi = initial x index used
   nxp = number of x indices used
   nxhd = second dimension of g >= nx/2+1
   nyd = first dimension of g >= ny
   nxhyd = maximum of (nx/2,ny)
   nxyhd = maximum of (nx,ny)/2
   nsize = amount of scratch complex memory used
   fourier coefficients are stored as follows:
   g[j][k] = real, imaginary part of mode j,k, where
   0 <= j < nx/2+1 and 0 <= k < ny
   written by viktor k. decyk, ucla
local data                                                            */
   int indx1, indx1y, nx, ny, nyh, nxy, nxhy, nxt;
   int nry, i, j, k, l, j1, j2, k1, k2, ns, ns2, km, kmr, koff, kk;
   int n, nn, in, nt, nh;
   float at1, at2;
   float2 t1, t2, t3;
/* The size of the shared memory array is as follows: */
/* float2 s[nsize];                                   */
   extern __shared__ float2 s[];
   indx1 = indx - 1;
   indx1y = indx1 > indy ? indx1 : indy;
   nx = 1L<<indx;
   ny = 1L<<indy;
   nyh = ny/2;
   nxy = nx > ny ? nx : ny;
   nxhy = 1L<<indx1y;
   nxt = nxi + nxp - 1;
/* calculate extent of shared memory usage: */
/* nn = size of shared memory in y          */
   nn = ny;
   in = 0;
   while (nn > nsize) {
      nn = nn/2;
      in += 1;
   }
/* nt = number of iterations in y           */
   nt = 1L<<in;
   in = indy - in;
   nh = nn/2;
/* bit-reverse array elements in y */
   nry = nxhy/ny;
/* for (j = nxi-1; j < nxt; j++) { */
   j = blockIdx.x + nxi - 1;
   if (j < nxt) {
      kk = nyd*j;
/*    for (k = 0; k < ny; k++) { */
      k = threadIdx.x;
      while (k < ny) {
         k1 = (mixup[k] - 1)/nry;
         if (k < k1) {
            t1 = g[k1+kk];
            g[k1+kk] = g[k+kk];
            g[k+kk] = t1;
         }
         k += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
   }
   nry = nxy/ny;
/* inverse fourier transform in y */
   if (isign < 0) {
/* copy data to local memory */
/*    for (i = nxi-1; i < nxt; i++) { */
      i = blockIdx.x + nxi - 1;
      if (i < nxt) {
         koff = nyd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = g[kk+nn*n+koff];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in y */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nyh/ns;
               kmr = km*nry;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
               ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               g[kk+nn*n+koff] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in y */
         ns = 1L<<in;
         for (l = in; l < indy; l++) {
            ns2 = ns + ns;
            km = nyh/ns;
            kmr = km*nry;
/*          for (kk = 0; kk < nyh; kk++) { */
            kk = threadIdx.x;
            while (kk < nyh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t2 = g[j2+koff];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               t2 = g[j1+koff];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               g[j2+koff] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               g[j1+koff] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
   }
/* forward fourier transform in y */
   if (isign > 0) {
/* copy data to local memory */
/*    for (i = nxi-1; i < nxt; i++) { */
      i = blockIdx.x + nxi - 1;
      if (i < nxt) {
         koff = nyd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = g[kk+nn*n+koff];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in y */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nyh/ns;
               kmr = km*nry;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t1.y = -t1.y;
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
                ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               g[kk+nn*n+koff] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in y */
         ns = 1L<<in;
         for (l = in; l < indy; l++) {
            ns2 = ns + ns;
            km = nyh/ns;
            kmr = km*nry;
/*          for (kk = 0; kk < nyh; kk++) { */
            kk = threadIdx.x;
            while (kk < nyh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t1.y = -t1.y;
               t2 = g[j2+koff];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               t2 = g[j1+koff];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               g[j2+koff] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               g[j1+koff] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposes(float2 f[], float2 sm[], int nx, int kxp,
                             int kyps, int kstrt, int nvp, int kxyp,
                             int nxv, int kypd) {
/* extract data to send */
/* local data */
   int ks, j, k, n, nn, id, joff, ld;
   ks = kstrt - 1;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.y;
   if (n < nvp) {
      id = n - ks;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*ks;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not send local data */
      if (id != ks) {
         joff = kxp*id;
         ld = nx - joff;
         ld = 0 > ld ? 0 : ld;
         ld = kxp < ld ? kxp : ld;
/*       for (k = 0; k < kyps; k++) { */
         k = blockIdx.x;
         if (k < kyps) {
/*          for (j = 0; j < ld; j++) { */
            j = threadIdx.x;
            while (j < ld) {
               sm[j+ld*k+kxyp*n] = f[j+joff+nxv*k];
               j += blockDim.x;
            }
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposer(float2 g[], float2 tm[], int ny, int kyp,
                             int kxps, int kstrt, int nvp, int kxyp,
                             int nyv, int kxpd) {
/* transpose data received */
/* local data */
   int kt, mxv, j, k, n, nn, id, koff, ld, js, ks, jj, kk;
/* The size of the shared memory array is as follows: */
/* float2 s2[(mx + 1)*mx];                            */
   extern __shared__ float2 s2[];
   kt = kstrt - 1;
   mxv = blockDim.x + 1;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.z;
   if (n < nvp) {
      id = n - kt;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*kt;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not transpose local data */
      if (id != kt) {
         koff = kyp*id;
         ld = ny - koff;
         ld = 0 > ld ? 0 : ld;
         ld = kyp < ld ? kyp : ld;
         js = threadIdx.x;
         ks = threadIdx.y;
         jj = blockDim.x*blockIdx.x;
         kk = blockDim.y*blockIdx.y;
         j = js + jj;
         k = ks + kk;
         if ((j < kxps) && (k < ld)) {
            s2[js+mxv*ks] = tm[j+kxps*k+kxyp*n];
         }
/* synchronize threads */
         __syncthreads();
         j = ks + jj;
         k = js + kk;
         if ((j < kxps) && (k < ld)) {
            g[k+koff+nyv*j] = s2[ks+mxv*js];
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposesn(float2 fn[], float2 sm[], int nx, int kxp,
                              int kyps, int kstrt, int nvp, int ndim,
                              int kxyp, int nxv, int kypd) {
/* extract vector data to send */
/* local data */
   int ks, i, j, k, n, nn, id, joff, ld, nnxv, nkxyp;
   ks = kstrt - 1;
   nnxv = ndim*nxv;
   nkxyp = ndim*kxyp;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.y;
   if (n < nvp) {
      id = n - ks;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*ks;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not send local data */
      if (id != ks) {
         joff = kxp*id;
         ld = nx - joff;
         ld = 0 > ld ? 0 : ld;
         ld = kxp < ld ? kxp : ld;
/*       for (k = 0; k < kyps; k++) { */
         k = blockIdx.x;
         if (k < kyps) {
/*          for (j = 0; j < ld; j++) { */
            j = threadIdx.x;
            while (j < ld) {
               for (i = 0; i < ndim; i++) {
                  sm[j+ld*(i+ndim*k)+nkxyp*n] = fn[j+joff+nxv*i+nnxv*k];
               }
               j += blockDim.x;
            }
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposern(float2 gn[], float2 tm[], int ny, int kyp,
                              int kxps, int kstrt, int nvp, int ndim,
                              int kxyp, int nyv, int kxpd) {
/* transpose vector data received */
/* local data */
   int kt, mxv, i, j, k, n, nn, id, koff, ld, js, ks, jj, kk;
   int nnyv, nkxyp;
/* The size of the shared memory array is as follows: */
/* float2 s2n[ndim*(mx + 1)*mx];                      */
   extern __shared__ float2 s2n[];
   kt = kstrt - 1;
   mxv = blockDim.x + 1;
   nnyv = ndim*nyv;
   nkxyp = ndim*kxyp;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.z;
   if (n < nvp) {
      id = n - kt;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*kt;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not transpose local data */
      if (id != kt) {
         koff = kyp*id;
         ld = ny - koff;
         ld = 0 > ld ? 0 : ld;
         ld = kyp < ld ? kyp : ld;
         js = threadIdx.x;
         ks = threadIdx.y;
         jj = blockDim.x*blockIdx.x;
         kk = blockDim.y*blockIdx.y;
         j = js + jj;
         k = ks + kk;
         if ((j < kxps) && (k < ld)) {
            for (i = 0; i < ndim; i++) {
               s2n[js+mxv*(i+ndim*ks)] = tm[j+kxps*(i+ndim*k)+nkxyp*n];
            }
         }
/* synchronize threads */
         __syncthreads();
         j = ks + jj;
         k = js + kk;
         if ((j < kxps) && (k < ld)) {
            for (i = 0; i < ndim; i++) {
               gn[k+koff+nyv*i+nnyv*j] = s2n[ks+mxv*(i+ndim*js)];
            }
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppltpose(float2 f[], float2 g[], int nx, int ny,
                            int kxp, int kyp, int kstrt, int nxv,
                            int nyv) {
/* transpose local data */
/* local data */
   int mxv, j, k, ks, kxps, kyps, joff, koff, js, jj, kk;
/* The size of the shared memory array is as follows: */
/* float2 s2[(mx + 1)*mx];                            */
   extern __shared__ float2 s2[];
   mxv = blockDim.x + 1;
   ks = kstrt - 1;
   joff = kxp*ks;
   koff = kyp*ks;
   kxps = nx - joff;
   kxps = 0 > kxps ? 0 : kxps;
   kxps = kxp < kxps ? kxp : kxps;
   kyps = ny - koff;
   kyps = 0 > kyps ? 0 : kyps;
   kyps = kyp < kyps ? kyp : kyps;
   js = threadIdx.x;
   ks = threadIdx.y;
   jj = blockDim.x*blockIdx.x;
   kk = blockDim.y*blockIdx.y;
   j = js + jj;
   k = ks + kk;
   if ((j < kxps) && (k < kyps)) {
      s2[js+mxv*ks] = f[j+joff+nxv*k];
   }
/* synchronize threads */
   __syncthreads();
   j = ks + jj;
   k = js + kk;
   if ((j < kxps) && (k < kyps)) {
      g[k+koff+nyv*j] = s2[ks+mxv*js];
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppltposen(float2 fn[], float2 gn[], int nx, int ny,
                             int kxp, int kyp, int kstrt, int ndim,
                             int nxv, int nyv) {
/* transpose local vector data */
/* local data */
   int mxv, i, j, k, ks, kxps, kyps, joff, koff, js, jj, kk;
   int nnxv, nnyv;
/* The size of the shared memory array is as follows: */
/* float2 s2n[ndim*(mx + 1)*mx];                      */
   extern __shared__ float2 s2n[];
   mxv = blockDim.x + 1;
   ks = kstrt - 1;
   nnxv = ndim*nxv;
   nnyv = ndim*nyv;
   joff = kxp*ks;
   koff = kyp*ks;
   kxps = nx - joff;
   kxps = 0 > kxps ? 0 : kxps;
   kxps = kxp < kxps ? kxp : kxps;
   kyps = ny - koff;
   kyps = 0 > kyps ? 0 : kyps;
   kyps = kyp < kyps ? kyp : kyps;
   js = threadIdx.x;
   ks = threadIdx.y;
   jj = blockDim.x*blockIdx.x;
   kk = blockDim.y*blockIdx.y;
   j = js + jj;
   k = ks + kk;
   if ((j < kxps) && (k < kyps)) {
      for (i = 0; i < ndim; i++) {
         s2n[js+mxv*(i+ndim*ks)] = fn[j+joff+nxv*i+nnxv*k];
      }
   }
/* synchronize threads */
   __syncthreads();
   j = ks + jj;
   k = js + kk;
   if ((j < kxps) && (k < kyps)) {
      for (i = 0; i < ndim; i++) {
         gn[k+koff+nyv*i+nnyv*j] = s2n[ks+mxv*(i+ndim*js)];
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpusum1(float a[], float *sa, int nx) {
/* 1d serial sum reduction */
/* nx = length of data     */
/* sa = sum(a)             */
/* local data */
   int j, js, jb, mx, joff, mxm;
   float t;
/* The size of the shared memory array is as follows: */
/* ss[blockDim.x];                                    */
   extern __shared__ float ss[];
   mx = blockDim.x;
   js = threadIdx.x;
   jb = blockIdx.x;
   joff = mx*jb;
   j = js + joff;
/* copy global data to shared memory */
   if (j < nx) ss[js] = a[j];
/* synchronize to make sure each thread in block has the data */
   __syncthreads();
   if (js==0) {
      mxm = nx - joff;
      if (mxm > mx) mxm = mx;
/* perform serial local sum reduction: result in t */
      t = 0.0f;
      for (j = 0; j < mxm; j++) {
         t += ss[j];
      }
/* accumulate results to global memory for each block */
/* for devices with compute capability 2.x            */
      atomicAdd(&sa[0],t);
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpusum2(float a[], float d[], int nx) {
/* segmented 1d sum reductions, each of length mx = blockDim.x */
/* nx = length of data                                         */
/* forall (j = 1:nbx); d(j) = sum(a(1+mx*(j-1):min(nx,mx*j)))  */
/* local data */
   int j, js, jb, mx, joff, mxm;
/* The size of the shared memory array is as follows: */
/* ss[blockDim.x];                                    */
   extern __shared__ float ss[];
   mx = blockDim.x;
   js = threadIdx.x;
   jb = blockIdx.x;
   joff = mx*jb;
   j = js + joff;
/* copy global data to shared memory */
   if (j < nx) ss[js] = a[j];
/* synchronize to make sure each thread in block has the data */
   __syncthreads();
   mxm = nx - joff;
   if (mxm > mx) mxm = mx;
/* perform parallel local sum reduction: result in ss[0] */
   lsum2(ss,mxm);
/* write out result to global memory for each block */
   if (js==0) d[jb] = ss[0];
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppgppush2l(float *ppart, float *fxy, int *kpic,
                               int noff, int nyp, float qbm, float dt,
                               float *ek, int nx, int ny, int mx,
                               int my, int idimp, int nppmx, int nxv,
                               int nypmx, int mx1, int mxyp1,
                               int ipbc) {
/* Push Interface for C */
   int n, m, ns;
   dim3 dimBlock(nblock_size);
   n = mxyp1;
   m = (n - 1)/maxgsx + 1;
   n = n < maxgsx ? n : maxgsx;
   dim3 dimGrid(n,m);
   ns = 2*(mx + 1)*(my + 1)*sizeof(float);
   n = nblock_size*sizeof(float);
   ns = ns > n ? ns : n;
   crc = cudaGetLastError();
   gpuppgppush2l<<<dimGrid,dimBlock,ns>>>(ppart,fxy,kpic,noff,nyp,qbm,
                                          dt,ek,nx,ny,mx,my,idimp,nppmx,
                                          nxv,nypmx,mx1,mxyp1,ipbc);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppgppush2l error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpu2ppgppost2l(float *ppart, float *q, int *kpic,
                                int noff, float qm, int idimp,
                                int nppmx, int mx, int my, int nxv,
                                int nypmx, int mx1, int mxyp1) {
/* Deposit Interface for C */
   int n, m, ns;
   dim3 dimBlock(nblock_size);
   n = mxyp1;
   m = (n - 1)/maxgsx + 1;
   n = n < maxgsx ? n : maxgsx;
   dim3 dimGrid(n,m);
   ns = (mx + 1)*(my + 1)*sizeof(float);
   crc = cudaGetLastError();
   gpu2ppgppost2l<<<dimGrid,dimBlock,ns>>>(ppart,q,kpic,noff,qm,idimp,
                                           nppmx,mx,my,nxv,nypmx,mx1,
                                           mxyp1);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpu2ppgppost2l error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2xl(float2 *qc, float2 *scs, float *q,
                                 int nyp, int nx, int nxe, int nypmx,
                                 int nxvh, int kypd) {
/* Guard Cell Interface for C */
   dim3 dimBlock(nblock_size);
   dim3 dimGrid(nyp);
   crc = cudaGetLastError();
   gpuppcaguard2xl<<<dimGrid,dimBlock>>>(qc,scs,q,nyp,nx,nxe,nypmx,nxvh,
                                         kypd);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppcaguard2xl error=%d:%s\n",crc,
             cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2yl(float2 *qc, float2 *scr, int nx,
                                 int nxvh, int kypd) {
/* Guard Cell Interface for C */
   int nxh;
   nxh = nx/2;
   dim3 dimBlock(nblock_size);
   dim3 dimGrid((nxh - 1)/nblock_size+1);
   crc = cudaGetLastError();
   gpuppcaguard2yl<<<dimGrid,dimBlock>>>(qc,scr,nx,nxvh,kypd);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppcaguard2yl error=%d:%s\n",crc,
             cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2xl(float2 *fxyc, float2 *scs, float *fxy,
                                 int nyp, int nx, int nxe, int nypmx,
                                 int nxvh, int kypd) {
/* Guard Cell Interface for C */
   dim3 dimBlock(nblock_size);
   dim3 dimGrid(nyp);
   crc = cudaGetLastError();
   gpuppccguard2xl<<<dimGrid,dimBlock>>>(fxyc,scs,fxy,nyp,nx,nxe,nypmx,
                                         nxvh,kypd);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppccguard2xl error=%d:%s\n",crc,
             cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2yl(float *fxy, float2 *scr, int nyp,
                                 int nx, int nxe, int nxvh, int nypmx) {
/* Guard Cell Interface for C */
   int nxh;
   nxh = nx/2;
   dim3 dimBlock(nblock_size);
   dim3 dimGrid((nxh - 1)/nblock_size+1);
   crc = cudaGetLastError();
   gpuppccguard2yl<<<dimGrid,dimBlock>>>(fxy,scr,nyp,nx,nxe,nxvh,nypmx);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppccguard2yl error=%d:%s\n",crc,
             cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2la(float *ppart, float *ppbuff, float *sbufl,
                              float *sbufr, int *kpic, int *ncl,
                              int *ihole, int *ncll, int *nclr,
                              int noff, int nyp, int idimp, int nppmx,
                              int nx, int ny, int mx, int my, int mx1,
                              int myp1, int npbmx, int ntmax, int nbmax,
                              int *irc) {
/* Sort Interface for C */
   int mxyp1, n, m, ns, nbl, ierr;
   static int *g_block = NULL;
   static int lg_block = 0;
   dim3 dimBlock(nblock_size);
   mxyp1 = mx1*myp1;
   m = (mxyp1 - 1)/maxgsx + 1;
   n = mxyp1 < maxgsx ? mxyp1 : maxgsx;
   dim3 dimGrid(n,m);
/* find which particles are leaving tile */
   ns = (nblock_size+9)*sizeof(int);
   crc = cudaGetLastError();
   gpupppfnd2l<<<dimGrid,dimBlock,ns>>>(ppart,kpic,ncl,ihole,noff,nyp,
                                        idimp,nppmx,nx,ny,mx,my,mx1,
                                        myp1,ntmax,irc);
/* cudaThreadSynchronize(); */
   crc = cudaGetLastError();
   if (crc) {
      printf("gpupppfnd2l error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
/* buffer particles that are leaving tile and sum ncl */
   ns = 9*sizeof(int);
   crc = cudaGetLastError();
   gpupppmov2l<<<dimGrid,dimBlock,ns>>>(ppart,ppbuff,ncl,ihole,idimp,
                                        nppmx,mx1,myp1,npbmx,ntmax,irc);
/* cudaThreadSynchronize(); */
   crc = cudaGetLastError();
   if (crc) {
      printf("gpupppmov2l error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
/* find address offsets */
   nbl = (mx1 - 1)/nblock_size + 1;
   dim3 dimGrids(nbl);
/* allocate scratch memory needed by prefix scan */
   ierr = 0;
   if (lg_block < nbl) {
      if (lg_block > 0) 
         gpu_deallocate((void *)g_block,&ierr);
      lg_block = 0;
      gpu_iallocate(&g_block,2*nbl,&ierr);
      if (ierr != 0) {
         printf("GPU g_block allocate error!\n");
         exit(1);
      }
      lg_block = nbl;
   }
   ns = 2*nblock_size*sizeof(int);
   crc = cudaGetLastError();
   nciscan2<<<dimGrids,dimBlock,ns>>>(ncl,ncll,nclr,g_block,mx1,myp1);
/* cudaThreadSynchronize(); */
   crc = cudaGetLastError();
   if (crc) {
      printf("nciscan2 error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
/* copy particles and offsets leaving processor */
/* gpupppbuf2l and nciscan2 should use the same blocksize */
   dim3 dimGridg(mx1);
   crc = cudaGetLastError();
   gpupppbuf2l<<<dimGridg,dimBlock>>>(ppbuff,sbufl,sbufr,ncl,ncll,nclr,
                                      g_block,idimp,mx1,myp1,npbmx,
                                      nbmax,irc);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpupppbuf2l error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2lb(float *ppart, float *ppbuff, float *rbufl,
                              float *rbufr, int *kpic, int *ncl,
                              int *ihole, int *mcll, int *mclr,
                              int idimp, int nppmx, int mx1, int myp1,
                              int npbmx, int ntmax, int nbmax,
                              int *irc) {
/* Sort Interface for C */
   int mxyp1, n, m, ns;
   dim3 dimBlock(nblock_size);
   mxyp1 = mx1*myp1;
   m = (mxyp1 - 1)/maxgsx + 1;
   n = mxyp1 < maxgsx ? mxyp1 : maxgsx;
   dim3 dimGrid(n,m);
/* copy incoming particles from ppbuff, rbufl, and rbufr into ppart */
/* and update kpic */
   ns = (nblock_size+18)*sizeof(int);
   crc = cudaGetLastError();
   gpupppord2l<<<dimGrid,dimBlock,ns>>>(ppart,ppbuff,rbufl,rbufr,kpic,
                                        ncl,ihole,mcll,mclr,idimp,nppmx,
                                        mx1,myp1,npbmx,ntmax,nbmax,irc);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpupppord2l error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C"  void cgpuppois22t(float2 *qt, float2 *fxyt, float2 *ffct,
                              float *we, int nx, int ny, int kstrt,
                              int nyv, int kxp1, int nyhd) {
/* Poisson Solver Interface for C */
   int nxh1, ks, kxpp, ns;
   dim3 dimBlock(nblock_size);
   nxh1 = nx/2 + 1;
   ks = kstrt - 1;
   kxpp = nxh1 - kxp1*ks;
   kxpp = 0 > kxpp ? 0 : kxpp;
   kxpp = kxp1 < kxpp ? kxp1 : kxpp;
   if (kxpp <= 0)
      return;
   dim3 dimGrid(kxpp);
   ns = nblock_size*sizeof(float);
   crc = cudaGetLastError();
   gpuppois22t<<<dimGrid,dimBlock,ns>>>(qt,fxyt,ffct,we,nx,ny,kstrt,nyv,
                                        kxp1,nyhd);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppois22t error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsx(float2 *f, float2 *bsm, int isign,
                                int *mixup, float2 *sct, int indx,
                                int indy, int kstrt, int nvp, int kxp1,
                                int kyp, int nxhd, int kypd, int nxhyd,
                                int nxyhd) {
/* wrapper function for parallel real to complex fft in x, */
/* without packed data                                     */
/* nxhd must be >= nx/2 + 1                                */
/* local data */
   int nxh, nxh1, ny, ks, kypp, kxyp, nsize, ns;
   static int kypi = 1, mx = 16;
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kypp = ny - kyp*ks;
   kypp = 0 > kypp ? 0 : kypp;
   kypp = kyp < kypp ? kyp : kypp;
   if (kypp <= 0)
      return;
   kxyp = kxp1*kyp;
   dim3 dimGridy(kypp);
   dim3 dimGrids(kypp,nvp);
   dim3 dimGridty((kyp-1)/mx+1,(kxp1-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
/* perform x fft */
      if (kstrt <= ny) {
         crc = cudaGetLastError();
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(f,isign,mixup,sct,indx,
                                               indy,kypi,kypp,nxhd,kypd,
                                               nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = cudaGetLastError();
      gpuppmtposes<<<dimGrids,dimBlock>>>(f,bsm,nxh1,kxp1,kypp,kstrt,
                                          nvp,kxyp,nxhd,kypd);
      cudaThreadSynchronize();
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposes error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
      ns = (mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = cudaGetLastError();
      gpuppmtposer<<<dimGridty,dimBlockt,ns>>>(f,bsm,nxh1,kxp1,kypp,
                                               kstrt,nvp,kxyp,nxhd,
                                               kypd);
/*    cudaThreadSynchronize(); */
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposer error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
/* perform x fft */
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= ny) {
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(f,isign,mixup,sct,indx,
                                               indy,kypi,kypp,nxhd,kypd,
                                               nxhyd,nxyhd,nsize);
         cudaThreadSynchronize();
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsy(float2 *g, float2 *brm, int isign,
                                int *mixup, float2 *sct, int indx,
                                int indy, int kstrt, int nvp, int kxp1,
                                int kyp, int nyd, int nxhyd,
                                int nxyhd) {
/* wrapper function for parallel real to complex fft in y, */
/* without packed data                                     */
/* nyd must be >= ny                                       */
/* local data */
   int nxh, nxh1, ny, ks, kxpp, kxyp, nsize, ns;
   static int kxpi = 1, mx = 16;
/* double dtime; */
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kxpp = nxh1 - kxp1*ks;
   kxpp = 0 > kxpp ? 0 : kxpp;
   kxpp = kxp1 < kxpp ? kxp1 : kxpp;
   if (kxpp <= 0)
      return;
   kxyp = kxp1*kyp;
   dim3 dimGridx(kxpp);
   dim3 dimGrids(kxpp,nvp);
   dim3 dimGridtx((kxp1-1)/mx+1,(kyp-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      ns = (mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = cudaGetLastError();
      gpuppmtposer<<<dimGridtx,dimBlockt,ns>>>(g,brm,ny,kyp,kxpp,kstrt,
                                               nvp,kxyp,nyd,kxp1);
/*    cudaThreadSynchronize(); */
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposer error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
/* perform y fft */
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= nxh1) {
         crc = cudaGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(g,isign,mixup,sct,indx,
                                               indy,kxpi,kxpp,kxp1,nyd,
                                               nxhyd,nxyhd,nsize);
         cudaThreadSynchronize();
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
/* perform y fft */
      if (kstrt <= nxh1) {
         crc = cudaGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(g,isign,mixup,sct,indx,
                                               indy,kxpi,kxpp,kxp1,nyd,
                                               nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = cudaGetLastError();
      gpuppmtposes<<<dimGrids,dimBlock>>>(g,brm,ny,kyp,kxpp,kstrt,
                                          nvp,kxyp,nyd,kxp1);
      cudaThreadSynchronize();
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposes error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }


   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsxn(float2 *fn, float2 *bsm, int isign,
                                 int *mixup, float2 *sct, int indx,
                                 int indy, int ndim, int kstrt, int nvp,
                                 int kxp1, int kyp, int nxhd, int kypd,
                                 int nxhyd, int nxyhd) {
/* wrapper function for multiple parallel real to complex ffts in x, */
/* without packed data                                               */
/* ndim = vector dimension                                           */
/* nxhd must be >= nx/2 + 1                                          */
/* local data */
   int nxh, nxh1, ny, ks, kypp, kxyp, nkypd, nkypp, nsize, ns;
   static int kypi = 1, mx = 16;
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kypp = ny - kyp*ks;
   kypp = 0 > kypp ? 0 : kypp;
   kypp = kyp < kypp ? kyp : kypp;
   if (kypp <= 0)
      return;
   kxyp = kxp1*kyp;
   nkypd = ndim*kypd;
   nkypp = ndim*kypp;
   dim3 dimGridy(nkypp);
   dim3 dimGrids(kypp,nvp);
   dim3 dimGridty((kyp-1)/mx+1,(kxp1-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
/* perform x fft */
      if (kstrt <= ny) {
         crc = cudaGetLastError();
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(fn,isign,mixup,sct,indx,
                                               indy,kypi,nkypp,nxhd,
                                               nkypd,nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = cudaGetLastError();
      gpuppmtposesn<<<dimGrids,dimBlock>>>(fn,bsm,nxh1,kxp1,kypp,kstrt,
                                           nvp,ndim,kxyp,nxhd,kypd);
      cudaThreadSynchronize();
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposesn error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
      ns = ndim*(mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = cudaGetLastError();
      gpuppmtposern<<<dimGridty,dimBlockt,ns>>>(fn,bsm,nxh1,kxp1,kypp,
                                                kstrt,nvp,ndim,kxyp,
                                                nxhd,kypd);
/*    cudaThreadSynchronize(); */
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposern error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
/* perform x fft */
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= ny) {
         crc = cudaGetLastError();
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(fn,isign,mixup,sct,indx,
                                               indy,kypi,nkypp,nxhd,
                                               nkypd,nxhyd,nxyhd,nsize);
         cudaThreadSynchronize();
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsyn(float2 *gn, float2 *brm, int isign,
                                 int *mixup, float2 *sct, int indx,
                                 int indy, int ndim, int kstrt, int nvp,
                                 int kxp1, int kyp, int nyd, int nxhyd,
                                 int nxyhd) {
/* wrapper function for multiple parallel real to complex ffts in y, */
/* without packed data                                               */
/* ndim = vector dimension                                           */
/* nyd must be >= ny                                                 */
/* local data */
   int nxh, nxh1, ny, ks, kxpp, kxyp, nkxp1, nkxpp, nsize, ns;
   static int kxpi = 1, mx = 16;
/* double dtime; */
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kxpp = nxh1 - kxp1*ks;
   kxpp = 0 > kxpp ? 0 : kxpp;
   kxpp = kxp1 < kxpp ? kxp1 : kxpp;
   if (kxpp <= 0)
      return;
   kxyp = kxp1*kyp;
   nkxp1 = ndim*kxp1;
   nkxpp = ndim*kxpp;
   dim3 dimGridx(nkxpp);
   dim3 dimGrids(kxpp,nvp);
   dim3 dimGridtx((kxp1-1)/mx+1,(kyp-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      ns = ndim*(mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = cudaGetLastError();
      gpuppmtposern<<<dimGridtx,dimBlockt,ns>>>(gn,brm,ny,kyp,kxpp,
                                                kstrt,nvp,ndim,kxyp,nyd,
                                                kxp1);
/*    cudaThreadSynchronize(); */
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposern error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
/* perform y fft */
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= nxh1) {
         crc = cudaGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(gn,isign,mixup,sct,indx,
                                               indy,kxpi,nkxpp,nkxp1,
                                               nyd,nxhyd,nxyhd,nsize);
         cudaThreadSynchronize();
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
/* perform y fft */
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= nxh1) {
         crc = cudaGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(gn,isign,mixup,sct,indx,
                                               indy,kxpi,nkxpp,nkxp1,
                                               nyd,nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = cudaGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,cudaGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = cudaGetLastError();
      gpuppmtposesn<<<dimGrids,dimBlock>>>(gn,brm,ny,kyp,kxpp,kstrt,
                                           nvp,ndim,kxyp,nyd,kxp1);
      cudaThreadSynchronize();
      crc = cudaGetLastError();
      if (crc) {
         printf("gpuppmtposesn error=%d:%s\n",crc,
                cudaGetErrorString(crc));
         exit(1);
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltpose(float2 *f, float2 *g, int nx, int ny,
                             int kxp, int kyp, int kstrt, int nxv,
                             int nyv) {
/* local complex transpose using blocking algorithm with gaps */
/* input = f, output = g                                      */
/* local data */
   int ns;
   static int mx = 16;
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   dim3 dimGridtx((kxp-1)/mx+1,(kyp-1)/mx+1);
   ns = (mx+1)*mx*sizeof(float2);
/* local transpose f to g */
   crc = cudaGetLastError();
   gpuppltpose<<<dimGridtx,dimBlockt,ns>>>(f,g,nx,ny,kxp,kyp,kstrt,nxv,
                                           nyv);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppltpose error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltposen(float2 *fn, float2 *gn, int nx, int ny,
                              int kxp, int kyp, int kstrt, int ndim,
                              int nxv, int nyv) {
/* local complex vector transpose */
/* input = fn, output = gn        */
/* local data */
   int ns;
   static int mx = 16;
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   dim3 dimGridtx((kxp-1)/mx+1,(kyp-1)/mx+1);
   ns = ndim*(mx+1)*mx*sizeof(float2);
/* local transpose f to g */
   crc = cudaGetLastError();
   gpuppltposen<<<dimGridtx,dimBlockt,ns>>>(fn,gn,nx,ny,kxp,kyp,kstrt,
                                            ndim,nxv,nyv);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpuppltposen error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpusum2(float *a, float *sa, int nx) {
/* segmented 1d parallel sum reduction of input array a, of length nx */
/* first reduce individual blocks in parallel, writing result to scr  */
/* then reduce scr serially, result is written to sa                  */
/* local data */
   int nbx, nbs, ns;
   void *gptr;
   static int len = 0;
   static float *scr = NULL;
   nbx = (nx - 1)/nblock_size + 1;
   dim3 dimBlock(nblock_size);
   dim3 dimGrid(nbx);
   nbs = (nbx - 1)/nblock_size + 1;
   dim3 dimGrid1(nbs);
/* create scratch array */
   if (len < nbx) {
      if (len > 0)
         crc = cudaFree((void *)scr);
      crc = cudaMalloc(&gptr,sizeof(float)*nbx);
      if (crc) {
         printf("cudaMalloc cgpusum2 float Error=%d:%s,l=%d\n",crc,
                 cudaGetErrorString(crc),nbx);
         exit(1);
      }
      scr = (float *)gptr;
      len = nbx;
   }
/* reduce individual blocks in parallel */
   ns = nblock_size*sizeof(float);
   crc = cudaGetLastError();
   gpusum2<<<dimGrid,dimBlock,ns>>>(a,scr,nx);
/* cudaThreadSynchronize(); */
   crc = cudaGetLastError();
   if (crc) {
      printf("gpusum2 error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
/* 1d serial reduction */
   crc = cudaGetLastError();
   gpusum1<<<dimGrid1,dimBlock,ns>>>(scr,sa,nbx);
   cudaThreadSynchronize();
   crc = cudaGetLastError();
   if (crc) {
      printf("gpusum1 error=%d:%s\n",crc,cudaGetErrorString(crc));
      exit(1);
   }
   return;
}

/* Interfaces to Fortran */

/*--------------------------------------------------------------------*/
extern "C" void cgpuppgppush2l_(unsigned long *gp_ppart,
                                unsigned long *gp_fxy,
                                unsigned long *gp_kpic,
                                int *noff, int *nyp, float *qbm,
                                float *dt, unsigned long *gp_ek,
                                int *nx, int *ny, int *mx, int *my,
                                int *idimp, int *nppmx, int *nxv,
                                int *nypmx, int *mx1, int *mxyp1,
                                int *ipbc) {
   float *ppart, *fxy, *ek;
   int *kpic;
   ppart = (float *)*gp_ppart;
   fxy = (float *)*gp_fxy;
   kpic = (int *)*gp_kpic;
   ek = (float *)*gp_ek;
   cgpuppgppush2l(ppart,fxy,kpic,*noff,*nyp,*qbm,*dt,ek,*nx,*ny,*mx,*my,
                  *idimp,*nppmx,*nxv,*nypmx,*mx1,*mxyp1,*ipbc);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpu2ppgppost2l_(unsigned long *gp_ppart,
                                 unsigned long *gp_q,
                                 unsigned long *gp_kpic,
                                 int *noff, float *qm, int *idimp,
                                 int *nppmx, int *mx, int *my, int *nxv,
                                 int *nypmx, int *mx1, int *mxyp1) {
   float *ppart, *q;
   int *kpic;
   ppart = (float *)*gp_ppart;
   q = (float *)*gp_q;
   kpic = (int *)*gp_kpic;
   cgpu2ppgppost2l(ppart,q,kpic,*noff,*qm,*idimp,*nppmx,*mx,*my,*nxv,
                   *nypmx,*mx1,*mxyp1);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2xl_(unsigned long *gp_qc,
                                  unsigned long *gp_scs,
                                  unsigned long *gp_q, int *nyp,
                                  int *nx, int *nxe, int *nypmx,
                                  int *nxvh, int *kypd) {
   float2 *qc, *scs;
   float *q;
   qc = (float2 *)*gp_qc;
   scs = (float2 *)*gp_scs;
   q = (float *)*gp_q;
   cgpuppcaguard2xl(qc,scs,q,*nyp,*nx,*nxe,*nypmx,*nxvh,*kypd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2yl_(unsigned long *gp_fc,
                                 unsigned long *gp_scr, int *nx,
                                 int *nxvh, int *kypd) {
   float2 *fc, *scr;
   fc = (float2 *)*gp_fc;
   scr = (float2 *)*gp_scr;
   cgpuppcaguard2yl(fc,scr,*nx,*nxvh,*kypd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2xl_(unsigned long *gp_fxyc,
                                  unsigned long *gp_scs,
                                  unsigned long *gp_fxy, int *nyp,
                                  int *nx, int *nxe, int *nypmx,
                                  int *nxvh, int *kypd) {
   float2 *fxyc, *scs;
   float *fxy;
   fxyc = (float2 *)*gp_fxyc;
   scs = (float2 *)*gp_scs;
   fxy = (float *)*gp_fxy;
   cgpuppccguard2xl(fxyc,scs,fxy,*nyp,*nx,*nxe,*nypmx,*nxvh,*kypd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2yl_(unsigned long *gp_fxy,
                                  unsigned long *gp_scr, int *nyp,
                                  int *nx, int *nxe, int *nxvh,
                                  int *nypmx) {
   float *fxy;
   float2 *scr;
   fxy = (float *)*gp_fxy;
   scr = (float2 *)*gp_scr;
   cgpuppccguard2yl(fxy,scr,*nyp,*nx,*nxe,*nxvh,*nypmx);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2la_(unsigned long *gp_ppart,
                               unsigned long *gp_ppbuff,
                               unsigned long *gp_sbufl,
                               unsigned long *gp_sbufr,
                               unsigned long *gp_kpic,
                               unsigned long *gp_ncl,
                               unsigned long *gp_ihole,
                               unsigned long *gp_ncll,
                               unsigned long *gp_nclr,
                               int *noff, int *nyp, int *idimp,
                               int *nppmx, int *nx, int *ny, int *mx,
                               int *my, int *mx1, int *myp1, int *npbmx,
                               int *ntmax, int *nbmax,
                               unsigned long *gp_irc) {
   float *ppart, *ppbuff, *sbufl, *sbufr;
   int *kpic, *ncl, *ihole, *ncll, *nclr, *irc;
   ppart = (float *)*gp_ppart;
   ppbuff = (float *)*gp_ppbuff;
   sbufl = (float *)*gp_sbufl;
   sbufr = (float *)*gp_sbufr;
   kpic = (int *)*gp_kpic;
   ncl = (int *)*gp_ncl;
   ihole = (int *)*gp_ihole;
   ncll = (int *)*gp_ncll;
   nclr = (int *)*gp_nclr;
   irc = (int *)*gp_irc;
   cgpupppord2la(ppart,ppbuff,sbufl,sbufr,kpic,ncl,ihole,ncll,nclr,
                 *noff,*nyp,*idimp,*nppmx,*nx,*ny,*mx,*my,*mx1,*myp1,
                 *npbmx,*ntmax,*nbmax,irc);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2lb_(unsigned long *gp_ppart,
                               unsigned long *gp_ppbuff,
                               unsigned long *gp_rbufl,
                               unsigned long *gp_rbufr,
                               unsigned long *gp_kpic,
                               unsigned long *gp_ncl,
                               unsigned long *gp_ihole,
                               unsigned long *gp_mcll,
                               unsigned long *gp_mclr,
                               int *idimp, int *nppmx, int *mx1,
                               int *myp1, int *npbmx, int *ntmax,
                               int *nbmax, unsigned long *gp_irc) {
   float *ppart, *ppbuff, *rbufl, *rbufr;
   int *kpic, *ncl, *ihole, *mcll, *mclr, *irc;
   ppart = (float *)*gp_ppart;
   ppbuff = (float *)*gp_ppbuff;
   rbufl = (float *)*gp_rbufl;
   rbufr = (float *)*gp_rbufr;
   kpic = (int *)*gp_kpic;
   ncl = (int *)*gp_ncl;
   ihole = (int *)*gp_ihole;
   mcll = (int *)*gp_mcll;
   mclr = (int *)*gp_mclr;
   irc = (int *)*gp_irc;
   cgpupppord2lb(ppart,ppbuff,rbufl,rbufr,kpic,ncl,ihole,mcll,mclr,
                 *idimp,*nppmx,*mx1,*myp1,*npbmx,*ntmax,*nbmax,irc);
   return;
}

/*--------------------------------------------------------------------*/
extern "C"  void cgpuppois22t_(unsigned long *gp_qt, 
                               unsigned long *gp_fxyt,
                               unsigned long *gp_ffct,
                               unsigned long *gp_we, int *nx, int *ny,
                               int *kstrt, int *nyv, int *kxp1,
                               int *nyhd) {
   float2 *qt, *fxyt, *ffct;
   float *we;
   qt = (float2 *)*gp_qt;
   fxyt = (float2 *)*gp_fxyt;
   ffct = (float2 *)*gp_ffct;
   we = (float *)*gp_we;
   cgpuppois22t(qt,fxyt,ffct,we,*nx,*ny,*kstrt,*nyv,*kxp1,*nyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsx_(unsigned long *gp_f,
                                 unsigned long *gp_bsm, int *isign,
                                 unsigned long *gp_mixup,
                                 unsigned long *gp_sct, int *indx,
                                 int *indy, int *kstrt, int *nvp,
                                 int *kxp1, int *kyp, int *nxhd,
                                 int *kypd, int *nxhyd, int *nxyhd) {
   float2 *f, *bsm, *sct;
   int *mixup;
   f = (float2 *)*gp_f;
   bsm = (float2 *)*gp_bsm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsx(f,bsm,*isign,mixup,sct,*indx,*indy,*kstrt,*nvp,*kxp1,
                   *kyp,*nxhd,*kypd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsy_(unsigned long *gp_g,
                                 unsigned long *gp_brm, int *isign,
                                 unsigned long *gp_mixup,
                                 unsigned long *gp_sct, int *indx,
                                 int *indy, int *kstrt, int *nvp,
                                 int *kxp1, int *kyp, int *nyd,
                                 int *nxhyd, int *nxyhd) {
   float2 *g, *brm, *sct;
   int *mixup;
   g = (float2 *)*gp_g;
   brm = (float2 *)*gp_brm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsy(g,brm,*isign,mixup,sct,*indx,*indy,*kstrt,*nvp,*kxp1,
                   *kyp,*nyd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsxn_(unsigned long *gp_fn,
                                  unsigned long *gp_bsm, int *isign,
                                  unsigned long *gp_mixup,
                                  unsigned long *gp_sct, int *indx,
                                  int *indy, int *ndim, int *kstrt,
                                  int *nvp, int *kxp1, int *kyp,
                                  int *nxhd, int *kypd, int *nxhyd,
                                  int *nxyhd) {
   float2 *fn, *bsm, *sct;
   int *mixup;
   fn = (float2 *)*gp_fn;
   bsm = (float2 *)*gp_bsm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsxn(fn,bsm,*isign,mixup,sct,*indx,*indy,*ndim,*kstrt,
                    *nvp,*kxp1,*kyp,*nxhd,*kypd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsyn_(unsigned long *gp_gn,
                                  unsigned long *gp_brm, int *isign,
                                  unsigned long *gp_mixup,
                                  unsigned long *gp_sct, int *indx,
                                  int *indy, int *ndim, int *kstrt,
                                  int *nvp, int *kxp1, int *kyp,
                                  int *nyd, int *nxhyd, int *nxyhd) {
   float2 *gn, *brm, *sct;
   int *mixup;
   gn = (float2 *)*gp_gn;
   brm = (float2 *)*gp_brm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsyn(gn,brm,*isign,mixup,sct,*indx,*indy,*ndim,*kstrt,
                    *nvp,*kxp1,*kyp,*nyd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltpose_(unsigned long *gp_f, unsigned long *gp_g,
                              int *nx, int *ny, int *kxp, int *kyp,
                              int *kstrt, int *nxv, int *nyv) {
   float2 *f, *g;
   f = (float2 *)*gp_f;
   g = (float2 *)*gp_g;
   cgpuppltpose(f,g,*nx,*ny,*kxp,*kyp,*kstrt,*nxv,*nyv);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltposen_(unsigned long *gp_fn,
                               unsigned long *gp_gn, int *nx, int *ny,
                               int *kxp, int *kyp, int *kstrt, int *ndim,
                               int *nxv, int *nyv) {
   float2 *fn, *gn;
   fn = (float2 *)*gp_fn;
   gn = (float2 *)*gp_gn;
   cgpuppltposen(fn,gn,*nx,*ny,*kxp,*kyp,*kstrt,*ndim,*nxv,*nyv);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpusum2_(unsigned long *gp_a, unsigned long *gp_sa,
                          int *nx) {
   float *a, *sa;
   a = (float *)*gp_a;
   sa = (float *)*gp_sa;
   cgpusum2(a,sa,*nx);
   return;
}

	.file	"tmpxft_0021b3bd_00000000-6_gpuppush2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2063:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2248:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2248:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.globl	_Z7liscan2Pii
	.type	_Z7liscan2Pii, @function
_Z7liscan2Pii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z7liscan2Pii, .-_Z7liscan2Pii
	.globl	_Z5lsum2Pfi
	.type	_Z5lsum2Pfi, @function
_Z5lsum2Pfi:
.LFB2247:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z7liscan2Pii
	.cfi_endproc
.LFE2247:
	.size	_Z5lsum2Pfi, .-_Z5lsum2Pfi
	.globl	_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii
	.type	_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii, @function
_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii:
.LFB2085:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movq	%r9, (%rsp)
	movss	%xmm0, 12(%rsp)
	movss	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movq	%rsp, %rax
	movq	%rax, 152(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	64(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 288
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L7:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2085:
	.size	_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii, .-_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii
	.globl	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.type	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, @function
_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii:
.LFB2086:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii
	.cfi_endproc
.LFE2086:
	.size	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, .-_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"gpuppgppush2l error=%d:%s\n"
	.text
	.globl	cgpuppgppush2l
	.type	cgpuppgppush2l, @function
cgpuppgppush2l:
.LFB2029:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	216(%rsp), %ebp
	movq	%rsi, 16(%rsp)
	movl	maxgsx(%rip), %esi
	movq	%rax, 60(%rsp)
	movl	%ebp, %eax
	movq	%rdx, 24(%rsp)
	movl	160(%rsp), %r14d
	cmpl	%ebp, %esi
	movl	168(%rsp), %r15d
	movl	%ecx, 36(%rsp)
	cmovle	%esi, %eax
	leal	1(%r14), %ebx
	movl	nblock_size(%rip), %ecx
	movss	%xmm0, 44(%rsp)
	movss	%xmm1, 40(%rsp)
	movl	%eax, 68(%rsp)
	leal	-1(%rbp), %eax
	cltd
	movl	%ecx, 56(%rsp)
	sall	$2, %ecx
	idivl	%esi
	movq	%rdi, 8(%rsp)
	movl	$1, 76(%rsp)
	incl	%eax
	movl	%eax, 72(%rsp)
	leal	1(%r15), %eax
	imull	%eax, %ebx
	sall	$3, %ebx
	cmpl	%ecx, %ebx
	cmovl	%ecx, %ebx
	call	cudaGetLastError@PLT
	movl	64(%rsp), %ecx
	movl	76(%rsp), %esi
	xorl	%r9d, %r9d
	movq	56(%rsp), %rdx
	movq	68(%rsp), %rdi
	movslq	%ebx, %r8
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	movss	40(%rsp), %xmm1
	movss	44(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L14
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	232(%rsp), %eax
	movq	%r13, %r9
	movl	%r12d, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 160
	pushq	%rbp
	.cfi_def_cfa_offset 168
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 176
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	pushq	%r15
	.cfi_def_cfa_offset 216
	pushq	%r14
	.cfi_def_cfa_offset 224
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 232
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	movl	132(%rsp), %ecx
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z54__device_stub__Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiiiPfS_PiiiffS_iiiiiiiiiii
	addq	$96, %rsp
	.cfi_def_cfa_offset 144
.L14:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L13
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L13:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	cgpuppgppush2l, .-cgpuppgppush2l
	.globl	cgpuppgppush2l_
	.type	cgpuppgppush2l_, @function
cgpuppgppush2l_:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	152(%rsp), %r15
	movq	136(%rsp), %r14
	movq	64(%rsp), %rbx
	movl	(%r15), %r15d
	movq	56(%rsp), %rax
	movq	128(%rsp), %r13
	movq	88(%rsp), %r10
	movq	%rdi, -24(%rsp)
	movq	96(%rsp), %r11
	movq	72(%rsp), %rdi
	movq	%r9, -16(%rsp)
	movq	112(%rsp), %rbp
	movq	80(%rsp), %r9
	movq	%rbx, -32(%rsp)
	movl	%r15d, 136(%rsp)
	movq	144(%rsp), %r15
	movq	104(%rsp), %rbx
	movq	120(%rsp), %r12
	movl	(%r15), %r15d
	movl	%r15d, 128(%rsp)
	movl	(%r14), %r14d
	movl	%r14d, 120(%rsp)
	movl	0(%r13), %r13d
	movl	%r13d, 112(%rsp)
	movl	(%r12), %r12d
	movl	%r12d, 104(%rsp)
	movl	0(%rbp), %ebp
	movl	%ebp, 96(%rsp)
	movl	(%rbx), %ebx
	movl	%ebx, 88(%rsp)
	movl	(%r11), %r11d
	movl	%r11d, 80(%rsp)
	movl	(%r10), %r10d
	movl	%r10d, 72(%rsp)
	movl	(%r9), %r9d
	movl	%r9d, 64(%rsp)
	movl	(%rdi), %edi
	movl	%edi, 56(%rsp)
	movss	(%rax), %xmm1
	movq	-16(%rsp), %rax
	movq	-32(%rsp), %rdi
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movss	(%rax), %xmm0
	movq	-24(%rsp), %rax
	movq	(%rdi), %r9
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rax), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	cgpuppgppush2l
	.cfi_endproc
.LFE2045:
	.size	cgpuppgppush2l_, .-cgpuppgppush2l_
	.globl	_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii
	.type	_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii, @function
_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii:
.LFB2087:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L19:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2087:
	.size	_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii, .-_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii
	.globl	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.type	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii, @function
_Z14gpu2ppgppost2lPfS_Piifiiiiiiii:
.LFB2088:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii
	.cfi_endproc
.LFE2088:
	.size	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii, .-_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.section	.rodata.str1.1
.LC1:
	.string	"gpu2ppgppost2l error=%d:%s\n"
	.text
	.globl	cgpu2ppgppost2l
	.type	cgpu2ppgppost2l, @function
cgpu2ppgppost2l:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r9d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movl	nblock_size(%rip), %eax
	movl	maxgsx(%rip), %ecx
	movl	168(%rsp), %ebx
	movq	%rdx, 16(%rsp)
	movl	%eax, 40(%rsp)
	movl	128(%rsp), %r14d
	movabsq	$4294967297, %rax
	cmpl	%ebx, %ecx
	movq	%rax, 44(%rsp)
	movl	%ebx, %eax
	movl	136(%rsp), %r15d
	cmovle	%ecx, %eax
	movss	%xmm0, 28(%rsp)
	movq	%rdi, (%rsp)
	movl	%eax, 52(%rsp)
	leal	-1(%rbx), %eax
	cltd
	movq	%rsi, 8(%rsp)
	idivl	%ecx
	movl	$1, 60(%rsp)
	incl	%eax
	movl	%eax, 56(%rsp)
	call	cudaGetLastError@PLT
	leal	1(%r14), %r8d
	movl	48(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	40(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	leal	1(%r15), %eax
	imull	%eax, %r8d
	movl	60(%rsp), %esi
	sall	$2, %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	movss	28(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L25
	pushq	%rbx
	.cfi_def_cfa_offset 136
	movl	168(%rsp), %eax
	movl	%r13d, %r9d
	movl	%r12d, %r8d
	movl	%ebp, %ecx
	pushq	%rax
	.cfi_def_cfa_offset 144
	movl	168(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	168(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 160
	pushq	%r15
	.cfi_def_cfa_offset 168
	pushq	%r14
	.cfi_def_cfa_offset 176
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z48__device_stub__Z14gpu2ppgppost2lPfS_PiifiiiiiiiiPfS_Piifiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 128
.L25:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L24:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	cgpu2ppgppost2l, .-cgpu2ppgppost2l
	.globl	cgpu2ppgppost2l_
	.type	cgpu2ppgppost2l_, @function
cgpu2ppgppost2l_:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%r8, %rax
	movq	%r9, %r8
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movss	(%rax), %xmm0
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	88(%rsp), %r13
	movq	80(%rsp), %r12
	movq	72(%rsp), %rbp
	movl	0(%r13), %r13d
	movq	64(%rsp), %rbx
	movq	56(%rsp), %r11
	movq	48(%rsp), %r10
	movl	%r13d, 80(%rsp)
	movl	(%r12), %r12d
	movq	40(%rsp), %r9
	movl	%r12d, 72(%rsp)
	movl	0(%rbp), %ebp
	movl	%ebp, 64(%rsp)
	movl	(%rbx), %ebx
	movl	%ebx, 56(%rsp)
	movl	(%r11), %r11d
	movl	%r11d, 48(%rsp)
	movl	(%r10), %r10d
	movl	%r10d, 40(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cgpu2ppgppost2l
	.cfi_endproc
.LFE2046:
	.size	cgpu2ppgppost2l_, .-cgpu2ppgppost2l_
	.globl	_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	.type	_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii, @function
_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii:
.LFB2089:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L30:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2089:
	.size	_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii, .-_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	.globl	_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii
	.type	_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii, @function
_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii:
.LFB2090:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	.cfi_endproc
.LFE2090:
	.size	_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii, .-_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii
	.section	.rodata.str1.1
.LC2:
	.string	"gpuppcaguard2xl error=%d:%s\n"
	.text
	.globl	cgpuppcaguard2xl
	.type	cgpuppcaguard2xl, @function
cgpuppcaguard2xl:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	nblock_size(%rip), %eax
	movl	%ecx, 20(%rsp)
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaGetLastError@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	120(%rsp), %eax
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	movl	%ebx, %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 112
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	call	_Z52__device_stub__Z15gpuppcaguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L36:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L35
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L35:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	cgpuppcaguard2xl, .-cgpuppcaguard2xl
	.globl	cgpuppcaguard2xl_
	.type	cgpuppcaguard2xl_, @function
cgpuppcaguard2xl_:
.LFB2047:
	.cfi_startproc
	endbr64
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppcaguard2xl
	.cfi_endproc
.LFE2047:
	.size	cgpuppcaguard2xl_, .-cgpuppcaguard2xl_
	.globl	_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii
	.type	_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii, @function
_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii:
.LFB2091:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15gpuppcaguard2ylP6float2S0_iii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L40:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2091:
	.size	_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii, .-_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii
	.globl	_Z15gpuppcaguard2ylP6float2S0_iii
	.type	_Z15gpuppcaguard2ylP6float2S0_iii, @function
_Z15gpuppcaguard2ylP6float2S0_iii:
.LFB2092:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii
	.cfi_endproc
.LFE2092:
	.size	_Z15gpuppcaguard2ylP6float2S0_iii, .-_Z15gpuppcaguard2ylP6float2S0_iii
	.section	.rodata.str1.1
.LC3:
	.string	"gpuppcaguard2yl error=%d:%s\n"
	.text
	.globl	cgpuppcaguard2yl
	.type	cgpuppcaguard2yl, @function
cgpuppcaguard2yl:
.LFB2032:
	.cfi_startproc
	endbr64
	movl	%edx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%ecx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	movabsq	$4294967297, %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	cltd
	idivl	%edi
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movl	nblock_size(%rip), %ecx
	movq	%rsi, 12(%rsp)
	movl	%ecx, 8(%rsp)
	movq	%rsi, 24(%rsp)
	decl	%eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 20(%rsp)
	call	cudaGetLastError@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z47__device_stub__Z15gpuppcaguard2ylP6float2S0_iiiP6float2S0_iii
.L46:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L45
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L45:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	cgpuppcaguard2yl, .-cgpuppcaguard2yl
	.globl	cgpuppcaguard2yl_
	.type	cgpuppcaguard2yl_, @function
cgpuppcaguard2yl_:
.LFB2048:
	.cfi_startproc
	endbr64
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppcaguard2yl
	.cfi_endproc
.LFE2048:
	.size	cgpuppcaguard2yl_, .-cgpuppcaguard2yl_
	.globl	_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	.type	_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii, @function
_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii:
.LFB2093:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15gpuppccguard2xlP6float2S0_Pfiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L50:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2093:
	.size	_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii, .-_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	.globl	_Z15gpuppccguard2xlP6float2S0_Pfiiiiii
	.type	_Z15gpuppccguard2xlP6float2S0_Pfiiiiii, @function
_Z15gpuppccguard2xlP6float2S0_Pfiiiiii:
.LFB2094:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	.cfi_endproc
.LFE2094:
	.size	_Z15gpuppccguard2xlP6float2S0_Pfiiiiii, .-_Z15gpuppccguard2xlP6float2S0_Pfiiiiii
	.section	.rodata.str1.1
.LC4:
	.string	"gpuppccguard2xl error=%d:%s\n"
	.text
	.globl	cgpuppccguard2xl
	.type	cgpuppccguard2xl, @function
cgpuppccguard2xl:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	nblock_size(%rip), %eax
	movl	%ecx, 20(%rsp)
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaGetLastError@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	120(%rsp), %eax
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	movl	%ebx, %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 112
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	call	_Z52__device_stub__Z15gpuppccguard2xlP6float2S0_PfiiiiiiP6float2S0_Pfiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L56:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L55
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L55:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	cgpuppccguard2xl, .-cgpuppccguard2xl
	.globl	cgpuppccguard2xl_
	.type	cgpuppccguard2xl_, @function
cgpuppccguard2xl_:
.LFB2049:
	.cfi_startproc
	endbr64
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppccguard2xl
	.cfi_endproc
.LFE2049:
	.size	cgpuppccguard2xl_, .-cgpuppccguard2xl_
	.globl	_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii
	.type	_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii, @function
_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii:
.LFB2095:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15gpuppccguard2ylPfP6float2iiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L60:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2095:
	.size	_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii, .-_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii
	.globl	_Z15gpuppccguard2ylPfP6float2iiiii
	.type	_Z15gpuppccguard2ylPfP6float2iiiii, @function
_Z15gpuppccguard2ylPfP6float2iiiii:
.LFB2096:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii
	.cfi_endproc
.LFE2096:
	.size	_Z15gpuppccguard2ylPfP6float2iiiii, .-_Z15gpuppccguard2ylPfP6float2iiiii
	.section	.rodata.str1.1
.LC5:
	.string	"gpuppccguard2yl error=%d:%s\n"
	.text
	.globl	cgpuppccguard2yl
	.type	cgpuppccguard2yl, @function
cgpuppccguard2yl:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	movabsq	$4294967297, %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	movl	%ebx, %eax
	cltd
	idivl	%edi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	nblock_size(%rip), %ecx
	movq	%rsi, 12(%rsp)
	movl	%ecx, 8(%rsp)
	movq	%rsi, 24(%rsp)
	decl	%eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 20(%rsp)
	call	cudaGetLastError@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	104(%rsp), %eax
	movl	%ebx, %ecx
	movl	%r13d, %edx
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	movq	%r12, %rsi
	movq	%rbp, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 112
	call	_Z48__device_stub__Z15gpuppccguard2ylPfP6float2iiiiiPfP6float2iiiii
	popq	%rdx
	.cfi_def_cfa_offset 104
	popq	%rcx
	.cfi_def_cfa_offset 96
.L66:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L65
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L65:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	cgpuppccguard2yl, .-cgpuppccguard2yl
	.globl	cgpuppccguard2yl_
	.type	cgpuppccguard2yl_, @function
cgpuppccguard2yl_:
.LFB2050:
	.cfi_startproc
	endbr64
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppccguard2yl
	.cfi_endproc
.LFE2050:
	.size	cgpuppccguard2yl_, .-cgpuppccguard2yl_
	.globl	_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_
	.type	_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_, @function
_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_:
.LFB2097:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	312(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	296(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	304(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	%rsp, %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	pushq	56(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 256
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L70:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2097:
	.size	_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_, .-_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_
	.globl	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.type	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, @function
_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_:
.LFB2098:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_
	.cfi_endproc
.LFE2098:
	.size	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, .-_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.globl	_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_
	.type	_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_, @function
_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_:
.LFB2099:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	240(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L75:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2099:
	.size	_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_, .-_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_
	.globl	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.type	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_, @function
_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_:
.LFB2100:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_
	.cfi_endproc
.LFE2100:
	.size	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_, .-_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.globl	_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii
	.type	_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii, @function
_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii:
.LFB2101:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8nciscan2PiS_S_S_ii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L80:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L82
	call	__stack_chk_fail@PLT
.L82:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2101:
	.size	_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii, .-_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii
	.globl	_Z8nciscan2PiS_S_S_ii
	.type	_Z8nciscan2PiS_S_S_ii, @function
_Z8nciscan2PiS_S_S_ii:
.LFB2102:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii
	.cfi_endproc
.LFE2102:
	.size	_Z8nciscan2PiS_S_S_ii, .-_Z8nciscan2PiS_S_S_ii
	.globl	_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_
	.type	_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_, @function
_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_:
.LFB2103:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	288(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 112(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	%rsp, %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	128(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L85:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2103:
	.size	_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_, .-_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_
	.globl	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.type	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, @function
_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_:
.LFB2104:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_
	.cfi_endproc
.LFE2104:
	.size	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, .-_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.section	.rodata.str1.1
.LC6:
	.string	"gpupppfnd2l error=%d:%s\n"
.LC7:
	.string	"gpupppmov2l error=%d:%s\n"
.LC8:
	.string	"GPU g_block allocate error!\n"
.LC9:
	.string	"nciscan2 error=%d:%s\n"
.LC10:
	.string	"gpupppbuf2l error=%d:%s\n"
	.text
	.globl	cgpupppord2la
	.type	cgpupppord2la, @function
cgpupppord2la:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r8, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movl	nblock_size(%rip), %r13d
	movq	192(%rsp), %rax
	movq	%rdi, 16(%rsp)
	movq	%rsi, 24(%rsp)
	movl	280(%rsp), %ebx
	movq	%rax, 32(%rsp)
	movq	200(%rsp), %rax
	movq	%r9, 8(%rsp)
	movl	288(%rsp), %ebp
	movq	%rdx, 48(%rsp)
	movq	208(%rsp), %r14
	movq	%rcx, 56(%rsp)
	movq	320(%rsp), %r12
	movq	%rax, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movl	%r13d, 72(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 76(%rsp)
	movl	%ebx, %eax
	movl	maxgsx(%rip), %ecx
	imull	%ebp, %eax
	movl	$1, 92(%rsp)
	cmpl	%eax, %ecx
	movl	%eax, %edx
	cmovle	%ecx, %edx
	decl	%eax
	movl	%edx, 84(%rsp)
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 88(%rsp)
	call	cudaGetLastError@PLT
	movl	80(%rsp), %ecx
	movl	92(%rsp), %esi
	xorl	%r9d, %r9d
	movq	72(%rsp), %rdx
	leal	36(,%r13,4), %r8d
	movq	84(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	pushq	%r12
	.cfi_def_cfa_offset 200
	movl	312(%rsp), %eax
	movq	%r15, %rsi
	pushq	%rax
	.cfi_def_cfa_offset 208
	pushq	%rbp
	.cfi_def_cfa_offset 216
	pushq	%rbx
	.cfi_def_cfa_offset 224
	movl	304(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 232
	movl	304(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	movl	304(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 248
	movl	304(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 256
	movl	304(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 264
	movl	304(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 272
	movl	304(%rsp), %r9d
	movl	296(%rsp), %r8d
	movq	112(%rsp), %rcx
	movq	88(%rsp), %rdx
	movq	96(%rsp), %rdi
	call	_Z53__device_stub__Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_PfPiS0_S0_iiiiiiiiiiiS0_
	addq	$80, %rsp
	.cfi_def_cfa_offset 192
.L91:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L92
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L104
.L92:
	call	cudaGetLastError@PLT
	movl	80(%rsp), %ecx
	movl	92(%rsp), %esi
	xorl	%r9d, %r9d
	movq	72(%rsp), %rdx
	movq	84(%rsp), %rdi
	movl	$36, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	pushq	%rsi
	.cfi_def_cfa_offset 200
	pushq	%r12
	.cfi_def_cfa_offset 208
	movl	320(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	320(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%rbp
	.cfi_def_cfa_offset 232
	pushq	%rbx
	.cfi_def_cfa_offset 240
	movl	288(%rsp), %r9d
	movl	280(%rsp), %r8d
	movq	80(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z47__device_stub__Z11gpupppmov2lPfS_PiS0_iiiiiiS0_PfS_PiS0_iiiiiiS0_
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
.L93:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L94
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rcx
.L104:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L105:
	movl	$1, %edi
	call	exit@PLT
.L94:
	leal	-1(%rbx), %eax
	xorl	%ecx, %ecx
	cltd
	movl	%ecx, 68(%rsp)
	idivl	nblock_size(%rip)
	leal	1(%rax), %r15d
	movabsq	$4294967297, %rax
	movq	%rax, 100(%rsp)
	movl	_ZZ13cgpupppord2laE8lg_block(%rip), %eax
	movl	%r15d, 96(%rsp)
	cmpl	%r15d, %eax
	jge	.L95
	testl	%eax, %eax
	jle	.L96
	movq	_ZZ13cgpupppord2laE7g_block(%rip), %rdi
	leaq	68(%rsp), %rsi
	call	gpu_deallocate@PLT
.L96:
	xorl	%edx, %edx
	leal	(%r15,%r15), %esi
	leaq	_ZZ13cgpupppord2laE7g_block(%rip), %rdi
	movl	%edx, _ZZ13cgpupppord2laE8lg_block(%rip)
	leaq	68(%rsp), %rdx
	call	gpu_iallocate@PLT
	cmpl	$0, 68(%rsp)
	je	.L97
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L105
.L97:
	movl	%r15d, _ZZ13cgpupppord2laE8lg_block(%rip)
.L95:
	movl	nblock_size(%rip), %eax
	leal	0(,%rax,8), %r15d
	call	cudaGetLastError@PLT
	movl	80(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	72(%rsp), %rdx
	movq	96(%rsp), %rdi
	movslq	%r15d, %r8
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L98
	movq	_ZZ13cgpupppord2laE7g_block(%rip), %rcx
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	%r14, %rdx
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z35__device_stub__Z8nciscan2PiS_S_S_iiPiS_S_S_ii
.L98:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L99
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L104
.L99:
	movabsq	$4294967297, %rax
	movl	%ebx, 108(%rsp)
	movq	%rax, 112(%rsp)
	call	cudaGetLastError@PLT
	movl	80(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	72(%rsp), %rdx
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L100
	pushq	%rax
	.cfi_def_cfa_offset 200
	movq	%r14, %r9
	pushq	%r12
	.cfi_def_cfa_offset 208
	movl	328(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	320(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%rbp
	.cfi_def_cfa_offset 232
	pushq	%rbx
	.cfi_def_cfa_offset 240
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 248
	pushq	_ZZ13cgpupppord2laE7g_block(%rip)
	.cfi_def_cfa_offset 256
	movq	104(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z54__device_stub__Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_PfS_S_PiS0_S0_S0_iiiiiS0_
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L100:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L90
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L104
.L90:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L102
	call	__stack_chk_fail@PLT
.L102:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	cgpupppord2la, .-cgpupppord2la
	.globl	cgpupppord2la_
	.type	cgpupppord2la_, @function
cgpupppord2la_:
.LFB2051:
	.cfi_startproc
	endbr64
	movq	136(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 136(%rsp)
	movq	128(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 128(%rsp)
	movq	120(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 120(%rsp)
	movq	112(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 112(%rsp)
	movq	104(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 104(%rsp)
	movq	96(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 96(%rsp)
	movq	88(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 88(%rsp)
	movq	80(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%rsp)
	movq	72(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rsp)
	movq	64(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rsp)
	movq	56(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	48(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rsp)
	movq	40(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rsp)
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 24(%rsp)
	movq	16(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rsp)
	movq	8(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 8(%rsp)
	movq	(%r9), %r9
	movq	(%r8), %r8
	movq	(%rcx), %rcx
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpupppord2la
	.cfi_endproc
.LFE2051:
	.size	cgpupppord2la_, .-cgpupppord2la_
	.globl	_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.type	_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, @function
_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_:
.LFB2105:
	.cfi_startproc
	endbr64
	subq	$280, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	296(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	304(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	368(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	312(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	320(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	336(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	344(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	352(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	360(%rsp), %rax
	movq	%rax, 248(%rsp)
	movq	%rsp, %rax
	movq	%rax, 256(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L107
	pushq	96(%rsp)
	.cfi_def_cfa_offset 296
	leaq	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 304
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	144(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 296
	popq	%rdx
	.cfi_def_cfa_offset 288
.L107:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L109
	call	__stack_chk_fail@PLT
.L109:
	addq	$280, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2105:
	.size	_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, .-_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.globl	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.type	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, @function
_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_:
.LFB2106:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.cfi_endproc
.LFE2106:
	.size	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, .-_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.section	.rodata.str1.1
.LC11:
	.string	"gpupppord2l error=%d:%s\n"
	.text
	.globl	cgpupppord2lb
	.type	cgpupppord2lb, @function
cgpupppord2lb:
.LFB2036:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movl	maxgsx(%rip), %ecx
	movl	nblock_size(%rip), %ebx
	movl	168(%rsp), %r14d
	movl	176(%rsp), %r15d
	movq	%rax, 44(%rsp)
	movq	%rdx, 24(%rsp)
	movl	%r14d, %eax
	movq	%rdi, 8(%rsp)
	imull	%r15d, %eax
	movq	%rsi, 16(%rsp)
	movl	%ebx, 40(%rsp)
	movl	$1, 60(%rsp)
	cmpl	%eax, %ecx
	movl	%eax, %edx
	cmovle	%ecx, %edx
	decl	%eax
	movl	%edx, 52(%rsp)
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 56(%rsp)
	call	cudaGetLastError@PLT
	movl	48(%rsp), %ecx
	movl	60(%rsp), %esi
	xorl	%r9d, %r9d
	movq	40(%rsp), %rdx
	leal	72(,%rbx,4), %r8d
	movq	52(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L113
	pushq	%rax
	.cfi_def_cfa_offset 136
	movq	%r13, %r9
	movq	%r12, %r8
	movq	%rbp, %rcx
	pushq	216(%rsp)
	.cfi_def_cfa_offset 144
	movl	216(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 152
	movl	216(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 160
	movl	216(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 168
	pushq	%r15
	.cfi_def_cfa_offset 176
	pushq	%r14
	.cfi_def_cfa_offset 184
	movl	216(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movl	216(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	pushq	216(%rsp)
	.cfi_def_cfa_offset 208
	pushq	216(%rsp)
	.cfi_def_cfa_offset 216
	pushq	216(%rsp)
	.cfi_def_cfa_offset 224
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	104(%rsp), %rdi
	call	_Z61__device_stub__Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_PfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	addq	$96, %rsp
	.cfi_def_cfa_offset 128
.L113:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L112
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L112:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	cgpupppord2lb, .-cgpupppord2lb
	.globl	cgpupppord2lb_
	.type	cgpupppord2lb_, @function
cgpupppord2lb_:
.LFB2052:
	.cfi_startproc
	endbr64
	movq	88(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 88(%rsp)
	movq	80(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%rsp)
	movq	72(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rsp)
	movq	64(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rsp)
	movq	56(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	48(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rsp)
	movq	40(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rsp)
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 24(%rsp)
	movq	16(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 16(%rsp)
	movq	8(%rsp), %rax
	movq	(%rax), %rax
	movq	%rax, 8(%rsp)
	movq	(%r9), %r9
	movq	(%r8), %r8
	movq	(%rcx), %rcx
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpupppord2lb
	.cfi_endproc
.LFE2052:
	.size	cgpupppord2lb_, .-cgpupppord2lb_
	.globl	_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii
	.type	_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii, @function
_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii:
.LFB2107:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L117
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11gpuppois22tP6float2S0_S0_Pfiiiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L117:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L119
	call	__stack_chk_fail@PLT
.L119:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2107:
	.size	_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii, .-_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii
	.globl	_Z11gpuppois22tP6float2S0_S0_Pfiiiiii
	.type	_Z11gpuppois22tP6float2S0_S0_Pfiiiiii, @function
_Z11gpuppois22tP6float2S0_S0_Pfiiiiii:
.LFB2108:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii
	.cfi_endproc
.LFE2108:
	.size	_Z11gpuppois22tP6float2S0_S0_Pfiiiiii, .-_Z11gpuppois22tP6float2S0_S0_Pfiiiiii
	.section	.rodata.str1.1
.LC12:
	.string	"gpuppois22t error=%d:%s\n"
	.text
	.globl	cgpuppois22t
	.type	cgpuppois22t, @function
cgpuppois22t:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	movabsq	$4294967297, %rcx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	cltd
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movl	nblock_size(%rip), %ebp
	movq	%rsi, 24(%rsp)
	movl	$2, %esi
	movl	128(%rsp), %r15d
	idivl	%esi
	movl	144(%rsp), %ebx
	movq	%rdi, 16(%rsp)
	movl	%r8d, 12(%rsp)
	movl	%ebp, 40(%rsp)
	movq	%rcx, 44(%rsp)
	leal	-1(%r15), %edx
	imull	%ebx, %edx
	incl	%eax
	subl	%edx, %eax
	movl	$0, %edx
	cmovs	%edx, %eax
	cmpl	%ebx, %eax
	cmovg	%ebx, %eax
	testl	%eax, %eax
	jle	.L122
	movq	%rcx, 56(%rsp)
	movl	%r9d, %r14d
	movl	%eax, 52(%rsp)
	call	cudaGetLastError@PLT
	movl	48(%rsp), %ecx
	movl	60(%rsp), %esi
	xorl	%r9d, %r9d
	movq	40(%rsp), %rdx
	leal	0(,%rbp,4), %r8d
	movq	52(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L124
	movl	152(%rsp), %eax
	movl	%r14d, %r9d
	movq	%r13, %rcx
	movq	%r12, %rdx
	pushq	%rax
	.cfi_def_cfa_offset 136
	pushq	%rbx
	.cfi_def_cfa_offset 144
	movl	152(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 152
	pushq	%r15
	.cfi_def_cfa_offset 160
	movl	44(%rsp), %r8d
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z51__device_stub__Z11gpuppois22tP6float2S0_S0_PfiiiiiiP6float2S0_S0_Pfiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 128
.L124:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L122
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L122:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	cgpuppois22t, .-cgpuppois22t
	.globl	cgpuppois22t_
	.type	cgpuppois22t_, @function
cgpuppois22t_:
.LFB2053:
	.cfi_startproc
	endbr64
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movq	(%rcx), %rcx
	movq	(%rdx), %rdx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppois22t
	.cfi_endproc
.LFE2053:
	.size	cgpuppois22t_, .-cgpuppois22t_
	.globl	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	.type	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii, @function
_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii:
.LFB2109:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L131
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L131:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L133
	call	__stack_chk_fail@PLT
.L133:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2109:
	.size	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii, .-_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	.globl	_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii
	.type	_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii, @function
_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii:
.LFB2110:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	.cfi_endproc
.LFE2110:
	.size	_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii, .-_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii
	.globl	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	.type	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii, @function
_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii:
.LFB2111:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 32(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L136
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 240
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L136:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L138
	call	__stack_chk_fail@PLT
.L138:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2111:
	.size	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii, .-_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	.globl	_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii
	.type	_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii, @function
_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii:
.LFB2112:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	.cfi_endproc
.LFE2112:
	.size	_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii, .-_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii
	.globl	_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.type	_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii, @function
_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii:
.LFB2113:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L141
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z12gpuppmtposesP6float2S0_iiiiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L141:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L143
	call	__stack_chk_fail@PLT
.L143:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2113:
	.size	_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii, .-_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.globl	_Z12gpuppmtposesP6float2S0_iiiiiiii
	.type	_Z12gpuppmtposesP6float2S0_iiiiiiii, @function
_Z12gpuppmtposesP6float2S0_iiiiiiii:
.LFB2114:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.cfi_endproc
.LFE2114:
	.size	_Z12gpuppmtposesP6float2S0_iiiiiiii, .-_Z12gpuppmtposesP6float2S0_iiiiiiii
	.globl	_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.type	_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii, @function
_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii:
.LFB2115:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L146
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z12gpuppmtposerP6float2S0_iiiiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L146:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L148
	call	__stack_chk_fail@PLT
.L148:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2115:
	.size	_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii, .-_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.globl	_Z12gpuppmtposerP6float2S0_iiiiiiii
	.type	_Z12gpuppmtposerP6float2S0_iiiiiiii, @function
_Z12gpuppmtposerP6float2S0_iiiiiiii:
.LFB2116:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.cfi_endproc
.LFE2116:
	.size	_Z12gpuppmtposerP6float2S0_iiiiiiii, .-_Z12gpuppmtposerP6float2S0_iiiiiiii
	.section	.rodata.str1.1
.LC13:
	.string	"gpufft2rcxs error=%d:%s\n"
.LC14:
	.string	"gpuppmtposes error=%d:%s\n"
.LC15:
	.string	"gpuppmtposer error=%d:%s\n"
	.text
	.globl	cgpuwppfft2rcsx
	.type	cgpuwppfft2rcsx, @function
cgpuwppfft2rcsx:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$1, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movabsq	$68719476752, %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rcx, 48(%rsp)
	movb	192(%rsp), %cl
	movq	%rbx, 80(%rsp)
	movq	%rbp, %rbx
	movl	224(%rsp), %eax
	salq	%cl, %rbx
	movl	%edx, 20(%rsp)
	movl	nblock_size(%rip), %edx
	movq	%rbx, 24(%rsp)
	movl	200(%rsp), %ebx
	movl	%edx, 68(%rsp)
	movl	208(%rsp), %r14d
	leal	-1(%rbx), %edx
	movq	%rsi, 40(%rsp)
	movabsq	$4294967297, %rsi
	movl	232(%rsp), %r12d
	imull	%eax, %edx
	movq	%rdi, 8(%rsp)
	movl	240(%rsp), %r13d
	movq	%r8, 56(%rsp)
	movl	%r9d, 32(%rsp)
	movq	%rsi, 72(%rsp)
	movl	$1, 88(%rsp)
	movl	24(%rsp), %ebx
	subl	%edx, %ebx
	movl	$0, %edx
	cmovs	%edx, %ebx
	cmpl	%eax, %ebx
	cmovg	%eax, %ebx
	testl	%ebx, %ebx
	jle	.L151
	leal	-1(%r9), %ecx
	movl	216(%rsp), %r15d
	movl	%ebx, 92(%rsp)
	salq	%cl, %rbp
	movl	$16, %ecx
	movq	%rsi, 96(%rsp)
	imull	%eax, %r15d
	leal	1(%rbp), %edx
	decl	%eax
	movl	%ebx, 104(%rsp)
	movl	%edx, 36(%rsp)
	cltd
	idivl	%ecx
	movl	%r14d, 108(%rsp)
	movl	$1, 112(%rsp)
	movl	%r14d, 124(%rsp)
	incl	%eax
	movl	%eax, 116(%rsp)
	movl	216(%rsp), %eax
	decl	%eax
	cltd
	idivl	%ecx
	incl	%eax
	cmpl	$0, 20(%rsp)
	movl	%eax, 120(%rsp)
	jns	.L153
	movl	24(%rsp), %eax
	cmpl	200(%rsp), %eax
	jl	.L154
	movl	$1024, %eax
	cmpl	%eax, %ebp
	cmovg	%eax, %ebp
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	leal	0(,%rbp,8), %r8d
	movq	92(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L155
	pushq	%rdx
	.cfi_def_cfa_offset 200
	pushq	%rbp
	.cfi_def_cfa_offset 208
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%r13
	.cfi_def_cfa_offset 232
	pushq	%r12
	.cfi_def_cfa_offset 240
	pushq	%rbx
	.cfi_def_cfa_offset 248
	pushq	$1
	.cfi_def_cfa_offset 256
	movl	256(%rsp), %r9d
	movl	96(%rsp), %r8d
	movq	120(%rsp), %rcx
	movq	112(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L155:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L176
.L154:
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	112(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	104(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L156
	pushq	%r13
	.cfi_def_cfa_offset 200
	movl	%ebx, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 208
	pushq	%r15
	.cfi_def_cfa_offset 216
	pushq	%r14
	.cfi_def_cfa_offset 224
	movl	232(%rsp), %r9d
	movl	248(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 192
.L156:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L151
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rcx
.L175:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L153:
	je	.L151
	call	cudaGetLastError@PLT
	movl	88(%rsp), %ecx
	movl	124(%rsp), %esi
	xorl	%r9d, %r9d
	movq	80(%rsp), %rdx
	movq	116(%rsp), %rdi
	movl	$2176, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L158
	pushq	%r13
	.cfi_def_cfa_offset 200
	movl	%ebx, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 208
	pushq	%r15
	.cfi_def_cfa_offset 216
	pushq	%r14
	.cfi_def_cfa_offset 224
	movl	232(%rsp), %r9d
	movl	248(%rsp), %ecx
	movl	68(%rsp), %edx
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 192
.L158:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L159
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L175
.L159:
	movl	24(%rsp), %eax
	cmpl	200(%rsp), %eax
	jl	.L151
	movl	$1024, %eax
	movl	76(%rsp), %ecx
	movq	68(%rsp), %rdx
	cmpl	%eax, %ebp
	movq	92(%rsp), %rdi
	movl	100(%rsp), %esi
	cmovg	%eax, %ebp
	xorl	%r9d, %r9d
	leal	0(,%rbp,8), %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L160
	pushq	%rax
	.cfi_def_cfa_offset 200
	pushq	%rbp
	.cfi_def_cfa_offset 208
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%r13
	.cfi_def_cfa_offset 232
	pushq	%r12
	.cfi_def_cfa_offset 240
	pushq	%rbx
	.cfi_def_cfa_offset 248
	pushq	$1
	.cfi_def_cfa_offset 256
	movl	256(%rsp), %r9d
	movl	96(%rsp), %r8d
	movq	120(%rsp), %rcx
	movq	112(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L160:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L151
.L176:
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L175
.L151:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	cgpuwppfft2rcsx, .-cgpuwppfft2rcsx
	.globl	cgpuwppfft2rcsx_
	.type	cgpuwppfft2rcsx_, @function
cgpuwppfft2rcsx_:
.LFB2054:
	.cfi_startproc
	endbr64
	movq	72(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rsp)
	movq	64(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rsp)
	movq	56(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	48(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rsp)
	movq	40(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rsp)
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movq	(%r8), %r8
	movq	(%rcx), %rcx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuwppfft2rcsx
	.cfi_endproc
.LFE2054:
	.size	cgpuwppfft2rcsx_, .-cgpuwppfft2rcsx_
	.section	.rodata.str1.1
.LC16:
	.string	"gpufft2rcys error=%d:%s\n"
	.text
	.globl	cgpuwppfft2rcsy
	.type	cgpuwppfft2rcsy, @function
cgpuwppfft2rcsy:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$1, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movl	nblock_size(%rip), %eax
	movq	%rcx, 32(%rsp)
	leal	-1(%r9), %ecx
	movl	200(%rsp), %ebp
	movl	%eax, 52(%rsp)
	movl	192(%rsp), %r13d
	movabsq	$68719476752, %rax
	movq	%rax, 64(%rsp)
	movq	%r12, %rax
	movl	216(%rsp), %r14d
	salq	%cl, %rax
	movl	%edx, 12(%rsp)
	movabsq	$4294967297, %rdx
	incl	%eax
	movq	%rdi, (%rsp)
	movl	%eax, 8(%rsp)
	movl	184(%rsp), %eax
	movl	8(%rsp), %ebx
	movq	%rsi, 24(%rsp)
	decl	%eax
	movq	%r8, 40(%rsp)
	imull	%ebp, %eax
	movl	%r9d, 16(%rsp)
	movq	%rdx, 56(%rsp)
	movl	$1, 72(%rsp)
	subl	%eax, %ebx
	movl	$0, %eax
	cmovs	%eax, %ebx
	cmpl	%ebp, %ebx
	cmovg	%ebp, %ebx
	testl	%ebx, %ebx
	jle	.L178
	movb	176(%rsp), %cl
	leal	-1(%rbp), %eax
	movl	%ebx, 76(%rsp)
	movq	%rdx, 80(%rsp)
	cltd
	movl	208(%rsp), %r15d
	salq	%cl, %r12
	movl	$16, %ecx
	movl	%ebx, 88(%rsp)
	idivl	%ecx
	movl	%r12d, 20(%rsp)
	movl	%r13d, 92(%rsp)
	movl	$1, 96(%rsp)
	movl	%r13d, 108(%rsp)
	imull	%ebp, %r15d
	incl	%eax
	movl	%eax, 100(%rsp)
	movl	208(%rsp), %eax
	decl	%eax
	cltd
	idivl	%ecx
	incl	%eax
	cmpl	$0, 12(%rsp)
	movl	%eax, 104(%rsp)
	jns	.L180
	call	cudaGetLastError@PLT
	movl	72(%rsp), %ecx
	movl	108(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	100(%rsp), %rdi
	movl	$2176, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L181
	pushq	%rbp
	.cfi_def_cfa_offset 184
	movl	%ebx, %r8d
	pushq	%r14
	.cfi_def_cfa_offset 192
	pushq	%r15
	.cfi_def_cfa_offset 200
	pushq	%r13
	.cfi_def_cfa_offset 208
	movl	216(%rsp), %r9d
	movl	240(%rsp), %ecx
	movl	52(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z49__device_stub__Z12gpuppmtposerP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
.L181:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L182
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L202
.L182:
	movl	8(%rsp), %eax
	cmpl	184(%rsp), %eax
	jl	.L178
	movl	$1024, %eax
	cmpl	%eax, %r12d
	cmovg	%eax, %r12d
	call	cudaGetLastError@PLT
	movl	60(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	52(%rsp), %rdx
	leal	0(,%r12,8), %r8d
	movq	76(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	pushq	%rdx
	.cfi_def_cfa_offset 184
	pushq	%r12
	.cfi_def_cfa_offset 192
	movl	248(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	248(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	pushq	%r14
	.cfi_def_cfa_offset 216
	pushq	%rbp
	.cfi_def_cfa_offset 224
	pushq	%rbx
	.cfi_def_cfa_offset 232
	pushq	$1
	.cfi_def_cfa_offset 240
	movl	240(%rsp), %r9d
	movl	80(%rsp), %r8d
	movq	104(%rsp), %rcx
	movq	96(%rsp), %rdx
	movl	76(%rsp), %esi
	movq	64(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 176
.L184:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L178
.L203:
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC16(%rip), %rsi
	movq	%rax, %rcx
.L202:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L180:
	je	.L178
	movl	8(%rsp), %eax
	cmpl	184(%rsp), %eax
	jl	.L185
	movl	$1024, %eax
	cmpl	%eax, %r12d
	cmovg	%eax, %r12d
	call	cudaGetLastError@PLT
	movl	60(%rsp), %ecx
	movl	84(%rsp), %esi
	xorl	%r9d, %r9d
	movq	52(%rsp), %rdx
	leal	0(,%r12,8), %r8d
	movq	76(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L186
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	%r12
	.cfi_def_cfa_offset 192
	movl	248(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	248(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	pushq	%r14
	.cfi_def_cfa_offset 216
	pushq	%rbp
	.cfi_def_cfa_offset 224
	pushq	%rbx
	.cfi_def_cfa_offset 232
	pushq	$1
	.cfi_def_cfa_offset 240
	movl	240(%rsp), %r9d
	movl	80(%rsp), %r8d
	movq	104(%rsp), %rcx
	movq	96(%rsp), %rdx
	movl	76(%rsp), %esi
	movq	64(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 176
.L186:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L203
.L185:
	call	cudaGetLastError@PLT
	movl	60(%rsp), %ecx
	movl	96(%rsp), %esi
	xorl	%r9d, %r9d
	movq	52(%rsp), %rdx
	movq	88(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L187
	pushq	%rbp
	.cfi_def_cfa_offset 184
	movl	%ebx, %r8d
	pushq	%r14
	.cfi_def_cfa_offset 192
	pushq	%r15
	.cfi_def_cfa_offset 200
	pushq	%r13
	.cfi_def_cfa_offset 208
	movl	216(%rsp), %r9d
	movl	240(%rsp), %ecx
	movl	52(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z49__device_stub__Z12gpuppmtposesP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
.L187:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L178
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L202
.L178:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	cgpuwppfft2rcsy, .-cgpuwppfft2rcsy
	.globl	cgpuwppfft2rcsy_
	.type	cgpuwppfft2rcsy_, @function
cgpuwppfft2rcsy_:
.LFB2055:
	.cfi_startproc
	endbr64
	movq	64(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rsp)
	movq	56(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	48(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rsp)
	movq	40(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rsp)
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movq	(%r8), %r8
	movq	(%rcx), %rcx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuwppfft2rcsy
	.cfi_endproc
.LFE2055:
	.size	cgpuwppfft2rcsy_, .-cgpuwppfft2rcsy_
	.globl	_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	.type	_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii, @function
_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii:
.LFB2117:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L205
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13gpuppmtposesnP6float2S0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L205:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L207
	call	__stack_chk_fail@PLT
.L207:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2117:
	.size	_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii, .-_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	.globl	_Z13gpuppmtposesnP6float2S0_iiiiiiiii
	.type	_Z13gpuppmtposesnP6float2S0_iiiiiiiii, @function
_Z13gpuppmtposesnP6float2S0_iiiiiiiii:
.LFB2118:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	.cfi_endproc
.LFE2118:
	.size	_Z13gpuppmtposesnP6float2S0_iiiiiiiii, .-_Z13gpuppmtposesnP6float2S0_iiiiiiiii
	.globl	_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	.type	_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii, @function
_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii:
.LFB2119:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L210
	pushq	48(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13gpuppmtposernP6float2S0_iiiiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 208
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L210:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L212
	call	__stack_chk_fail@PLT
.L212:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2119:
	.size	_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii, .-_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	.globl	_Z13gpuppmtposernP6float2S0_iiiiiiiii
	.type	_Z13gpuppmtposernP6float2S0_iiiiiiiii, @function
_Z13gpuppmtposernP6float2S0_iiiiiiiii:
.LFB2120:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	.cfi_endproc
.LFE2120:
	.size	_Z13gpuppmtposernP6float2S0_iiiiiiiii, .-_Z13gpuppmtposernP6float2S0_iiiiiiiii
	.section	.rodata.str1.1
.LC17:
	.string	"gpuppmtposesn error=%d:%s\n"
.LC18:
	.string	"gpuppmtposern error=%d:%s\n"
	.text
	.globl	cgpuwppfft2rcsxn
	.type	cgpuwppfft2rcsxn, @function
cgpuwppfft2rcsxn:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movabsq	$68719476752, %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movl	%edx, 20(%rsp)
	movl	nblock_size(%rip), %edx
	movq	%rcx, 48(%rsp)
	movb	192(%rsp), %cl
	movq	%rbx, 80(%rsp)
	movl	$1, %ebx
	movl	232(%rsp), %eax
	movl	%edx, 68(%rsp)
	movq	%rbx, %rdx
	movl	200(%rsp), %r12d
	salq	%cl, %rdx
	movq	%rsi, 40(%rsp)
	movabsq	$4294967297, %rsi
	movq	%rdx, 24(%rsp)
	movl	208(%rsp), %edx
	movl	24(%rsp), %ebp
	movq	%rdi, 8(%rsp)
	decl	%edx
	movq	%r8, 56(%rsp)
	imull	%eax, %edx
	movl	%r9d, 32(%rsp)
	movq	%rsi, 72(%rsp)
	movl	$1, 88(%rsp)
	subl	%edx, %ebp
	movl	$0, %edx
	cmovs	%edx, %ebp
	cmpl	%eax, %ebp
	cmovg	%eax, %ebp
	testl	%ebp, %ebp
	jle	.L215
	leal	-1(%r9), %ecx
	movl	%r12d, %r14d
	movl	224(%rsp), %r15d
	movl	248(%rsp), %r13d
	salq	%cl, %rbx
	movl	$16, %ecx
	movq	%rsi, 96(%rsp)
	movl	216(%rsp), %esi
	imull	%eax, %r15d
	leal	1(%rbx), %edx
	decl	%eax
	movl	%ebp, 104(%rsp)
	movl	%edx, 36(%rsp)
	cltd
	imull	%ebp, %r14d
	idivl	%ecx
	movl	%esi, 108(%rsp)
	movl	$1, 112(%rsp)
	movl	%r14d, 92(%rsp)
	movl	%esi, 124(%rsp)
	imull	%r12d, %r13d
	incl	%eax
	movl	%eax, 116(%rsp)
	movl	224(%rsp), %eax
	decl	%eax
	cltd
	idivl	%ecx
	incl	%eax
	cmpl	$0, 20(%rsp)
	movl	%eax, 120(%rsp)
	jns	.L217
	movl	24(%rsp), %eax
	cmpl	208(%rsp), %eax
	jl	.L218
	movl	$1024, %eax
	cmpl	%eax, %ebx
	cmovg	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	leal	0(,%rbx,8), %r8d
	movq	92(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L219
	pushq	%rsi
	.cfi_def_cfa_offset 200
	pushq	%rbx
	.cfi_def_cfa_offset 208
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%r13
	.cfi_def_cfa_offset 232
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	pushq	%r14
	.cfi_def_cfa_offset 248
	pushq	$1
	.cfi_def_cfa_offset 256
	movl	256(%rsp), %r9d
	movl	96(%rsp), %r8d
	movq	120(%rsp), %rcx
	movq	112(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L219:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L240
.L218:
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	112(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	104(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L220
	pushq	%rcx
	.cfi_def_cfa_offset 200
	movl	256(%rsp), %eax
	movl	%ebp, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	pushq	%r15
	.cfi_def_cfa_offset 224
	pushq	%r12
	.cfi_def_cfa_offset 232
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	movl	256(%rsp), %r9d
	movl	272(%rsp), %ecx
	movl	84(%rsp), %edx
	movq	88(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
.L220:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L215
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rcx
.L239:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L217:
	je	.L215
	call	cudaGetLastError@PLT
	movl	88(%rsp), %ecx
	movl	124(%rsp), %esi
	xorl	%r9d, %r9d
	movq	80(%rsp), %rdx
	imull	$272, %r12d, %r8d
	movq	116(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	sall	$3, %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L222
	pushq	%rdx
	.cfi_def_cfa_offset 200
	movl	256(%rsp), %eax
	movl	%ebp, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	pushq	%r15
	.cfi_def_cfa_offset 224
	pushq	%r12
	.cfi_def_cfa_offset 232
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	movl	256(%rsp), %r9d
	movl	272(%rsp), %ecx
	movl	84(%rsp), %edx
	movq	88(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
.L222:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L223
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC18(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L239
.L223:
	movl	24(%rsp), %eax
	cmpl	208(%rsp), %eax
	jl	.L215
	movl	$1024, %eax
	cmpl	%eax, %ebx
	cmovg	%eax, %ebx
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	leal	0(,%rbx,8), %r8d
	movq	92(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L224
	pushq	%rax
	.cfi_def_cfa_offset 200
	pushq	%rbx
	.cfi_def_cfa_offset 208
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%r13
	.cfi_def_cfa_offset 232
	movl	280(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	pushq	%r14
	.cfi_def_cfa_offset 248
	pushq	$1
	.cfi_def_cfa_offset 256
	movl	256(%rsp), %r9d
	movl	96(%rsp), %r8d
	movq	120(%rsp), %rcx
	movq	112(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcxsP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L224:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L215
.L240:
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L239
.L215:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	cgpuwppfft2rcsxn, .-cgpuwppfft2rcsxn
	.globl	cgpuwppfft2rcsxn_
	.type	cgpuwppfft2rcsxn_, @function
cgpuwppfft2rcsxn_:
.LFB2056:
	.cfi_startproc
	endbr64
	movq	80(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 80(%rsp)
	movq	72(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rsp)
	movq	64(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rsp)
	movq	56(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	48(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rsp)
	movq	40(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rsp)
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movq	(%r8), %r8
	movq	(%rcx), %rcx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuwppfft2rcsxn
	.cfi_endproc
.LFE2056:
	.size	cgpuwppfft2rcsxn_, .-cgpuwppfft2rcsxn_
	.globl	cgpuwppfft2rcsyn
	.type	cgpuwppfft2rcsyn, @function
cgpuwppfft2rcsyn:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$1, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movl	nblock_size(%rip), %eax
	movq	%rcx, 48(%rsp)
	leal	-1(%r9), %ecx
	movl	224(%rsp), %ebp
	movl	%eax, 68(%rsp)
	movl	200(%rsp), %r14d
	movabsq	$68719476752, %rax
	movq	%rax, 80(%rsp)
	movq	%r12, %rax
	movl	216(%rsp), %r13d
	salq	%cl, %rax
	movl	%edx, 20(%rsp)
	movabsq	$4294967297, %rdx
	incl	%eax
	movq	%rdi, 8(%rsp)
	movl	%eax, 16(%rsp)
	movl	208(%rsp), %eax
	movl	16(%rsp), %ebx
	movq	%rsi, 40(%rsp)
	decl	%eax
	movq	%r8, 56(%rsp)
	imull	%ebp, %eax
	movl	%r9d, 24(%rsp)
	movq	%rdx, 72(%rsp)
	movl	$1, 88(%rsp)
	subl	%eax, %ebx
	movl	$0, %eax
	cmovs	%eax, %ebx
	cmpl	%ebp, %ebx
	cmovg	%ebp, %ebx
	testl	%ebx, %ebx
	jle	.L242
	movl	232(%rsp), %eax
	movb	192(%rsp), %cl
	movq	%rdx, 96(%rsp)
	movl	%r14d, %r15d
	imull	%ebx, %r15d
	movl	%ebx, 104(%rsp)
	imull	%ebp, %eax
	salq	%cl, %r12
	movl	$16, %ecx
	movl	%r13d, 108(%rsp)
	movl	%r12d, 28(%rsp)
	movl	%r15d, 92(%rsp)
	movl	%eax, 32(%rsp)
	movl	%ebp, %eax
	imull	%r14d, %eax
	movl	$1, 112(%rsp)
	movl	%r13d, 124(%rsp)
	movl	%eax, 36(%rsp)
	leal	-1(%rbp), %eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 116(%rsp)
	movl	232(%rsp), %eax
	decl	%eax
	cltd
	idivl	%ecx
	incl	%eax
	cmpl	$0, 20(%rsp)
	movl	%eax, 120(%rsp)
	jns	.L244
	call	cudaGetLastError@PLT
	movl	88(%rsp), %ecx
	movl	124(%rsp), %esi
	xorl	%r9d, %r9d
	movq	80(%rsp), %rdx
	imull	$272, %r14d, %r8d
	movq	116(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	sall	$3, %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L245
	pushq	%rsi
	.cfi_def_cfa_offset 200
	movl	%ebx, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 208
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	56(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%r14
	.cfi_def_cfa_offset 232
	pushq	%r13
	.cfi_def_cfa_offset 240
	movl	256(%rsp), %r9d
	movl	280(%rsp), %ecx
	movl	76(%rsp), %edx
	movq	88(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z51__device_stub__Z13gpuppmtposernP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
.L245:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L246
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC18(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L266
.L246:
	movl	16(%rsp), %eax
	cmpl	208(%rsp), %eax
	jl	.L242
	movl	$1024, %ebx
	cmpl	%ebx, %r12d
	cmovle	%r12d, %ebx
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	leal	0(,%rbx,8), %r8d
	movq	92(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L248
	pushq	%rcx
	.cfi_def_cfa_offset 200
	pushq	%rbx
	.cfi_def_cfa_offset 208
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 232
	movl	76(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	pushq	%r15
	.cfi_def_cfa_offset 248
	pushq	$1
	.cfi_def_cfa_offset 256
	movl	256(%rsp), %r9d
	movl	88(%rsp), %r8d
	movq	120(%rsp), %rcx
	movq	112(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L248:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L242
.L267:
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC16(%rip), %rsi
	movq	%rax, %rcx
.L266:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L244:
	je	.L242
	movl	16(%rsp), %eax
	cmpl	208(%rsp), %eax
	jl	.L249
	movl	$1024, %eax
	cmpl	%eax, %r12d
	cmovg	%eax, %r12d
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	leal	0(,%r12,8), %r8d
	movq	92(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L250
	pushq	%rdx
	.cfi_def_cfa_offset 200
	pushq	%r12
	.cfi_def_cfa_offset 208
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	movl	272(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 232
	movl	76(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	pushq	%r15
	.cfi_def_cfa_offset 248
	pushq	$1
	.cfi_def_cfa_offset 256
	movl	256(%rsp), %r9d
	movl	88(%rsp), %r8d
	movq	120(%rsp), %rcx
	movq	112(%rsp), %rdx
	movl	84(%rsp), %esi
	movq	72(%rsp), %rdi
	call	_Z52__device_stub__Z11gpufft2rcysP6float2iPiS0_iiiiiiiiiP6float2iPiS0_iiiiiiiii
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
.L250:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L267
.L249:
	call	cudaGetLastError@PLT
	movl	76(%rsp), %ecx
	movl	112(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	104(%rsp), %rdi
	xorl	%r8d, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L251
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	%ebx, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 208
	movl	256(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	56(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	pushq	%r14
	.cfi_def_cfa_offset 232
	pushq	%r13
	.cfi_def_cfa_offset 240
	movl	256(%rsp), %r9d
	movl	280(%rsp), %ecx
	movl	76(%rsp), %edx
	movq	88(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z51__device_stub__Z13gpuppmtposesnP6float2S0_iiiiiiiiiP6float2S0_iiiiiiiii
	addq	$48, %rsp
	.cfi_def_cfa_offset 192
.L251:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L242
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L266
.L242:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	cgpuwppfft2rcsyn, .-cgpuwppfft2rcsyn
	.globl	cgpuwppfft2rcsyn_
	.type	cgpuwppfft2rcsyn_, @function
cgpuwppfft2rcsyn_:
.LFB2057:
	.cfi_startproc
	endbr64
	movq	72(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 72(%rsp)
	movq	64(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 64(%rsp)
	movq	56(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 56(%rsp)
	movq	48(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 48(%rsp)
	movq	40(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 40(%rsp)
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movq	(%r8), %r8
	movq	(%rcx), %rcx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuwppfft2rcsyn
	.cfi_endproc
.LFE2057:
	.size	cgpuwppfft2rcsyn_, .-cgpuwppfft2rcsyn_
	.globl	_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii
	.type	_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii, @function
_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii:
.LFB2121:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movq	%rsp, %rax
	movq	%rax, 120(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L269
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z11gpuppltposeP6float2S0_iiiiiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L269:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L271
	call	__stack_chk_fail@PLT
.L271:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2121:
	.size	_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii, .-_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii
	.globl	_Z11gpuppltposeP6float2S0_iiiiiii
	.type	_Z11gpuppltposeP6float2S0_iiiiiii, @function
_Z11gpuppltposeP6float2S0_iiiiiii:
.LFB2122:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii
	.cfi_endproc
.LFE2122:
	.size	_Z11gpuppltposeP6float2S0_iiiiiii, .-_Z11gpuppltposeP6float2S0_iiiiiii
	.section	.rodata.str1.1
.LC19:
	.string	"gpuppltpose error=%d:%s\n"
	.text
	.globl	cgpuppltpose
	.type	cgpuppltpose, @function
cgpuppltpose:
.LFB2042:
	.cfi_startproc
	endbr64
	movabsq	$68719476752, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	movl	$16, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rax, 8(%rsp)
	leal	-1(%r8), %eax
	cltd
	movl	$1, 16(%rsp)
	idivl	%ecx
	movl	$1, 28(%rsp)
	incl	%eax
	movl	%eax, 20(%rsp)
	leal	-1(%r9), %eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 24(%rsp)
	call	cudaGetLastError@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	movl	$2176, %r8d
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L275
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	120(%rsp), %eax
	movl	%r15d, %r9d
	movl	%r14d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 112
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	call	_Z47__device_stub__Z11gpuppltposeP6float2S0_iiiiiiiP6float2S0_iiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L275:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L274
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC19(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L274:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	cgpuppltpose, .-cgpuppltpose
	.globl	cgpuppltpose_
	.type	cgpuppltpose_, @function
cgpuppltpose_:
.LFB2058:
	.cfi_startproc
	endbr64
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppltpose
	.cfi_endproc
.LFE2058:
	.size	cgpuppltpose_, .-cgpuppltpose_
	.globl	_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.type	_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii, @function
_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii:
.LFB2123:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movl	%r9d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	184(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	200(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L279
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z12gpuppltposenP6float2S0_iiiiiiii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L279:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L281
	call	__stack_chk_fail@PLT
.L281:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2123:
	.size	_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii, .-_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.globl	_Z12gpuppltposenP6float2S0_iiiiiiii
	.type	_Z12gpuppltposenP6float2S0_iiiiiiii, @function
_Z12gpuppltposenP6float2S0_iiiiiiii:
.LFB2124:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	.cfi_endproc
.LFE2124:
	.size	_Z12gpuppltposenP6float2S0_iiiiiiii, .-_Z12gpuppltposenP6float2S0_iiiiiiii
	.section	.rodata.str1.1
.LC20:
	.string	"gpuppltposen error=%d:%s\n"
	.text
	.globl	cgpuppltposen
	.type	cgpuppltposen, @function
cgpuppltposen:
.LFB2043:
	.cfi_startproc
	endbr64
	movabsq	$68719476752, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	movl	$16, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rax, 8(%rsp)
	leal	-1(%r8), %eax
	cltd
	movl	$1, 16(%rsp)
	idivl	%ecx
	movl	$1, 28(%rsp)
	incl	%eax
	movl	%eax, 20(%rsp)
	leal	-1(%r9), %eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, 24(%rsp)
	call	cudaGetLastError@PLT
	movl	16(%rsp), %ecx
	movl	28(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %rdx
	movq	20(%rsp), %rdi
	movl	%eax, _ZL3crc(%rip)
	imull	$272, 104(%rsp), %r8d
	sall	$3, %r8d
	movslq	%r8d, %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L285
	movl	120(%rsp), %eax
	movl	%r14d, %r9d
	movl	%r15d, %r8d
	movl	%r13d, %ecx
	movl	%r12d, %edx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 112
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 128
	call	_Z49__device_stub__Z12gpuppltposenP6float2S0_iiiiiiiiP6float2S0_iiiiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 96
.L285:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L284
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	$2, %edi
	leaq	.LC20(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L284:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	cgpuppltposen, .-cgpuppltposen
	.globl	cgpuppltposen_
	.type	cgpuppltposen_, @function
cgpuppltposen_:
.LFB2059:
	.cfi_startproc
	endbr64
	movq	32(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 32(%rsp)
	movq	24(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rsp)
	movq	16(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 16(%rsp)
	movq	8(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 8(%rsp)
	movl	(%r9), %r9d
	movl	(%r8), %r8d
	movl	(%rcx), %ecx
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpuppltposen
	.cfi_endproc
.LFE2059:
	.size	cgpuppltposen_, .-cgpuppltposen_
	.globl	_Z29__device_stub__Z7gpusum1PfS_iPfS_i
	.type	_Z29__device_stub__Z7gpusum1PfS_iPfS_i, @function
_Z29__device_stub__Z7gpusum1PfS_iPfS_i:
.LFB2125:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L289
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7gpusum1PfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L289:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L291
	call	__stack_chk_fail@PLT
.L291:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2125:
	.size	_Z29__device_stub__Z7gpusum1PfS_iPfS_i, .-_Z29__device_stub__Z7gpusum1PfS_iPfS_i
	.globl	_Z7gpusum1PfS_i
	.type	_Z7gpusum1PfS_i, @function
_Z7gpusum1PfS_i:
.LFB2126:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7gpusum1PfS_iPfS_i
	.cfi_endproc
.LFE2126:
	.size	_Z7gpusum1PfS_i, .-_Z7gpusum1PfS_i
	.globl	_Z29__device_stub__Z7gpusum2PfS_iPfS_i
	.type	_Z29__device_stub__Z7gpusum2PfS_iPfS_i, @function
_Z29__device_stub__Z7gpusum2PfS_iPfS_i:
.LFB2127:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L294
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7gpusum2PfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L294:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L296
	call	__stack_chk_fail@PLT
.L296:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2127:
	.size	_Z29__device_stub__Z7gpusum2PfS_iPfS_i, .-_Z29__device_stub__Z7gpusum2PfS_iPfS_i
	.globl	_Z7gpusum2PfS_i
	.type	_Z7gpusum2PfS_i, @function
_Z7gpusum2PfS_i:
.LFB2128:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7gpusum2PfS_iPfS_i
	.cfi_endproc
.LFE2128:
	.size	_Z7gpusum2PfS_i, .-_Z7gpusum2PfS_i
	.section	.rodata.str1.1
.LC21:
	.string	"cudaMalloc cgpusum2 float Error=%d:%s,l=%d\n"
.LC22:
	.string	"gpusum2 error=%d:%s\n"
.LC23:
	.string	"gpusum1 error=%d:%s\n"
	.text
	.globl	cgpusum2
	.type	cgpusum2, @function
cgpusum2:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	movabsq	$4294967297, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movl	nblock_size(%rip), %ecx
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leal	-1(%rdx), %eax
	movq	%rsi, 24(%rsp)
	cltd
	movl	%ecx, 20(%rsp)
	idivl	%ecx
	movq	%rsi, 36(%rsp)
	movq	%rsi, 48(%rsp)
	cltd
	leal	1(%rax), %r13d
	idivl	%ecx
	movl	%r13d, 32(%rsp)
	incl	%eax
	movl	%eax, 44(%rsp)
	movl	_ZZ8cgpusum2E3len(%rip), %eax
	cmpl	%r13d, %eax
	jge	.L300
	testl	%eax, %eax
	jle	.L301
	movq	_ZZ8cgpusum2E3scr(%rip), %rdi
	call	cudaFree@PLT
	movl	%eax, _ZL3crc(%rip)
.L301:
	movslq	%r13d, %rsi
	leaq	8(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L302
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	movl	%r13d, %r8d
	leaq	.LC21(%rip), %rsi
	movq	%rax, %rcx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L309
.L302:
	movq	8(%rsp), %rax
	movl	%r13d, _ZZ8cgpusum2E3len(%rip)
	movq	%rax, _ZZ8cgpusum2E3scr(%rip)
.L300:
	movl	nblock_size(%rip), %eax
	leal	0(,%rax,4), %r14d
	call	cudaGetLastError@PLT
	movslq	%r14d, %r14
	movl	28(%rsp), %ecx
	movl	40(%rsp), %esi
	movq	20(%rsp), %rdx
	movq	32(%rsp), %rdi
	xorl	%r9d, %r9d
	movq	%r14, %r8
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L303
	movq	_ZZ8cgpusum2E3scr(%rip), %rsi
	movl	%ebx, %edx
	movq	%r12, %rdi
	call	_Z29__device_stub__Z7gpusum2PfS_iPfS_i
.L303:
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L304
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC22(%rip), %rsi
	movq	%rax, %rcx
.L310:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L309:
	movl	$1, %edi
	call	exit@PLT
.L304:
	call	cudaGetLastError@PLT
	movl	28(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	20(%rsp), %rdx
	movq	44(%rsp), %rdi
	movq	%r14, %r8
	movl	%eax, _ZL3crc(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L305
	movq	_ZZ8cgpusum2E3scr(%rip), %rdi
	movl	%r13d, %edx
	movq	%rbp, %rsi
	call	_Z29__device_stub__Z7gpusum1PfS_iPfS_i
.L305:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, _ZL3crc(%rip)
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L299
	call	cudaGetErrorString@PLT
	movl	_ZL3crc(%rip), %edx
	leaq	.LC23(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L310
.L299:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L307
	call	__stack_chk_fail@PLT
.L307:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	cgpusum2, .-cgpusum2
	.globl	cgpusum2_
	.type	cgpusum2_, @function
cgpusum2_:
.LFB2060:
	.cfi_startproc
	endbr64
	movl	(%rdx), %edx
	movq	(%rsi), %rsi
	movq	(%rdi), %rdi
	jmp	cgpusum2
	.cfi_endproc
.LFE2060:
	.size	cgpusum2_, .-cgpusum2_
	.section	.rodata.str1.1
.LC24:
	.string	"_Z7gpusum2PfS_i"
.LC25:
	.string	"_Z7gpusum1PfS_i"
.LC26:
	.string	"_Z12gpuppltposenP6float2S0_iiiiiiii"
.LC27:
	.string	"_Z11gpuppltposeP6float2S0_iiiiiii"
.LC28:
	.string	"_Z13gpuppmtposernP6float2S0_iiiiiiiii"
.LC29:
	.string	"_Z13gpuppmtposesnP6float2S0_iiiiiiiii"
.LC30:
	.string	"_Z12gpuppmtposerP6float2S0_iiiiiiii"
.LC31:
	.string	"_Z12gpuppmtposesP6float2S0_iiiiiiii"
.LC32:
	.string	"_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii"
.LC33:
	.string	"_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii"
.LC34:
	.string	"_Z11gpuppois22tP6float2S0_S0_Pfiiiiii"
.LC35:
	.string	"_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_"
.LC36:
	.string	"_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_"
.LC37:
	.string	"_Z8nciscan2PiS_S_S_ii"
.LC38:
	.string	"_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_"
.LC39:
	.string	"_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_"
.LC40:
	.string	"_Z15gpuppccguard2ylPfP6float2iiiii"
.LC41:
	.string	"_Z15gpuppccguard2xlP6float2S0_Pfiiiiii"
.LC42:
	.string	"_Z15gpuppcaguard2ylP6float2S0_iii"
.LC43:
	.string	"_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii"
.LC44:
	.string	"_Z14gpu2ppgppost2lPfS_Piifiiiiiiii"
.LC45:
	.string	"_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2130:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7gpusum2PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7gpusum1PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12gpuppltposenP6float2S0_iiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpuppltposeP6float2S0_iiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13gpuppmtposernP6float2S0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13gpuppmtposesnP6float2S0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12gpuppmtposerP6float2S0_iiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12gpuppmtposesP6float2S0_iiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z11gpufft2rcysP6float2iPiS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpufft2rcxsP6float2iPiS0_iiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC34(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpuppois22tP6float2S0_S0_Pfiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC35(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC36(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC37(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8nciscan2PiS_S_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC38(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC39(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC40(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z15gpuppccguard2ylPfP6float2iiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC41(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15gpuppccguard2xlP6float2S0_Pfiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC42(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15gpuppcaguard2ylP6float2S0_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC43(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15gpuppcaguard2xlP6float2S0_Pfiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC44(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC45(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2130:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZZ8cgpusum2E3scr
	.comm	_ZZ8cgpusum2E3scr,8,8
	.local	_ZZ8cgpusum2E3len
	.comm	_ZZ8cgpusum2E3len,4,4
	.local	_ZZ13cgpupppord2laE8lg_block
	.comm	_ZZ13cgpupppord2laE8lg_block,4,4
	.local	_ZZ13cgpupppord2laE7g_block
	.comm	_ZZ13cgpupppord2laE7g_block,8,8
	.local	_ZL3crc
	.comm	_ZL3crc,4,4
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/* CUDA Library for Skeleton 2D Electrostatic GPU-MPI PIC Code */
/* written by Viktor K. Decyk, UCLA */

#include <stdlib.h>
#include <stdio.h>
#include "hip/hip_runtime.h"

extern int nblock_size;
extern int maxgsx;

static hipError_t crc;

extern "C" void gpu_deallocate(void *g_d, int *irc);

extern "C" void gpu_iallocate(int **g_i, int nsize, int *irc);

/*--------------------------------------------------------------------*/
__device__ void liscan2(int *isdata, int nths) {
/* performs local prefix reduction of integer data shared by threads */
/* using binary tree method. */
/* local data */
   int l, mb, kxs, lb, kb;
   l = threadIdx.x;
   mb = l;
   kxs = 1;
   while (kxs < nths) {
      lb = kxs*mb;
      kb = 2*lb + kxs - 1;
      lb += l + kxs;
      if (lb < nths) {
         isdata[lb] += isdata[kb];
      }
      __syncthreads();
      mb >>= 1;
      kxs <<= 1;
   }
   return;
}

/*--------------------------------------------------------------------*/
__device__ void lsum2(float *sdata, int n) {
/* finds local sum of nths data items shared by threads */
/* using binary tree method. input is modified. */
/* local data */
   int l, k;
   float s;
   l = threadIdx.x;
   k = blockDim.x >> 1;
   s = 0.0f;
   if (l < n) s = sdata[l];
   while (k > 0) {
      if (l < k) {
         if ((l+k) < n) {
            s += sdata[l+k];
            sdata[l] = s;
         }
      }
      __syncthreads();
      k >>= 1;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppgppush2l(float ppart[], float fxy[], int kpic[],
                              int noff, int nyp, float qbm, float dt,
                              float *ek, int nx, int ny, int mx, int my,
                              int idimp, int nppmx, int nxv, int nypmx,
                              int mx1, int mxyp1, int ipbc) {
/* for 2d code, this subroutine updates particle co-ordinates and
   velocities using leap-frog scheme in time and first-order linear
   interpolation in space, with various boundary conditions
   threaded version using guard cells, for distributed data
   data read in tiles
   particles stored segmented array
   42 flops/particle, 12 loads, 4 stores
   input: all except ihole, output: ppart, ek
   equations used are:
   vx(t+dt/2) = vx(t-dt/2) + (q/m)*fx(x(t),y(t))*dt,
   vy(t+dt/2) = vy(t-dt/2) + (q/m)*fy(x(t),y(t))*dt,
   where q/m is charge/mass, and
   x(t+dt) = x(t) + vx(t+dt/2)*dt, y(t+dt) = y(t) + vy(t+dt/2)*dt
   fx(x(t),y(t)) and fy(x(t),y(t)) are approximated by interpolation from
   the nearest grid points:
   fx(x,y) = (1-dy)*((1-dx)*fx(n,m)+dx*fx(n+1,m)) + dy*((1-dx)*fx(n,m+1)
      + dx*fx(n+1,m+1))
   fy(x,y) = (1-dy)*((1-dx)*fy(n,m)+dx*fy(n+1,m)) + dy*((1-dx)*fy(n,m+1)
      + dx*fy(n+1,m+1))
   where n,m = leftmost grid points and dx = x-n, dy = y-m
   ppart[m][0][n] = position x of particle n in partition in tile m
   ppart[m][1][n] = position y of particle n in partition in tile m
   ppart[m][2][n] = velocity vx of particle n in partition in tile m
   ppart[m][3][n] = velocity vy of particle n in partition in tile m
   fxy[k][j][0] = x component of force/charge at grid (j,kk)
   fxy[k][j][1] = y component of force/charge at grid (j,kk)
   in other words, fxy are the convolutions of the electric field
   over the particle shape, where kk = k + noff
   kpic = number of particles per tile
   noff = lowermost global gridpoint in particle partition.
   nyp = number of primary (complete) gridpoints in particle partition
   qbm = particle charge/mass ratio
   dt = time interval between successive calculations
   kinetic energy/mass at time t is also calculated, using
   ek = .125*sum((vx(t+dt/2)+vx(t-dt/2))**2+(vy(t+dt/2)+vy(t-dt/2))**2)
   nx/ny = system length in x/y direction
   mx/my = number of grids in sorting cell in x/y
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   nxv = first dimension of field array, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells.
   mx1 = (system length in x direction - 1)/mx + 1
   mxyp1 = mx1*myp1, where myp1=(partition length in y direction-1)/my+1
   ipbc = particle boundary condition = (0,1,2,3) =
   (none,2d periodic,2d reflecting,mixed reflecting/periodic)
local data                                                            */
   int noffp, moffp, npoff, nppp, mxv;
   int mnoff, i, j, k, ii, nn, mm;
   float qtm, edgelx, edgely, edgerx, edgery, dxp, dyp, amx, amy;
   float x, y, dx, dy, vx, vy;
/* The sizes of the shared memory arrays are as follows: */
/* float sfxy[2*(mx+1)*(my+1)], sek[blockDim.x];         */
/* to conserve memory, sek overlaps with sfxy            */
/* and the name sfxy is used instead of sek              */
   extern __shared__ float sfxy[];
   double sum1;
   qtm = qbm*dt;
   sum1 = 0.0;
/* set boundary values */
   edgelx = 0.0f;
   edgely = 1.0f;
   edgerx = (float) (nx);
   edgery = (float) (ny-1);
   if ((ipbc==2) || (ipbc==3)) {
      edgelx = 1.0f;
      edgerx = (float) (nx-1);
   }
   mxv = mx + 1;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* loop over tiles */
   if (k < mxyp1) {
      noffp = k/mx1;
      moffp = my*noffp;
      noffp = mx*(k - mx1*noffp);
      nppp = kpic[k];
      npoff = idimp*nppmx*k;
      mnoff = moffp + noff;
/* load local fields from global array */
      nn = (mx < nx-noffp ? mx : nx-noffp) + 1;
      mm = (my < nyp-moffp ? my : nyp-moffp) + 1;
      ii = threadIdx.x;
      while (ii < mxv*(my+1)) {
         j = ii/mxv;
         i = ii - mxv*j;
         if ((i < nn) && (j < mm)) {
            sfxy[2*ii] = fxy[2*(i+noffp+nxv*(j+moffp))];
            sfxy[1+2*ii] = fxy[1+2*(i+noffp+nxv*(j+moffp))];
         }
         ii += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* loop over particles in tile */
      j = threadIdx.x;
      while (j < nppp) {
/* find interpolation weights */
         x = ppart[j+npoff];
         nn = x;
         y = ppart[j+npoff+nppmx];
         mm = y;
         dxp = x - (float) nn;
         dyp = y - (float) mm;
         nn = 2*(nn - noffp) + 2*mxv*(mm - mnoff);
         amx = 1.0f - dxp;
         amy = 1.0f - dyp;
/* find acceleration */
         dx = amx*sfxy[nn];
         dy = amx*sfxy[1+nn];
         dx = amy*(dxp*sfxy[2+nn] + dx);
         dy = amy*(dxp*sfxy[3+nn] + dy);
         nn += 2*mxv;
         vx = amx*sfxy[nn];
         vy = amx*sfxy[1+nn];
         dx += dyp*(dxp*sfxy[2+nn] + vx);
         dy += dyp*(dxp*sfxy[3+nn] + vy);
/* new velocity */
         vx = ppart[j+npoff+nppmx*2];
         vy = ppart[j+npoff+nppmx*3];
         dx = vx + qtm*dx;
         dy = vy + qtm*dy;
/* average kinetic energy */
         vx += dx;
         vy += dy;
         sum1 += (double) (vx*vx + vy*vy);
         ppart[j+npoff+nppmx*2] = dx;
         ppart[j+npoff+nppmx*3] = dy;
/* new position */
         dx = x + dx*dt;
         dy = y + dy*dt;
/* reflecting boundary conditions */
         if (ipbc==2) {
            if ((dx < edgelx) || (dx >= edgerx)) {
               dx = ppart[j+npoff];
               ppart[j+npoff+nppmx*2] = -ppart[j+npoff+nppmx*2];
            }
            if ((dy < edgely) || (dy >= edgery)) {
               dy = ppart[j+npoff+nppmx];
               ppart[j+npoff+nppmx*3] = -ppart[j+npoff+nppmx*3];
            }
         }
/* mixed reflecting/periodic boundary conditions */
         else if (ipbc==3) {
            if ((dx < edgelx) || (dx >= edgerx)) {
               dx = ppart[j+npoff];
               ppart[j+npoff+nppmx*2] = -ppart[j+npoff+nppmx*2];
            }
         }
/* set new position */
         ppart[j+npoff] = dx;
         ppart[j+npoff+nppmx] = dy;
         j += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* add kinetic energies in tile */
      sfxy[threadIdx.x] = (float) sum1;
/* synchronize threads */
      __syncthreads();
      lsum2(sfxy,blockDim.x);
/* normalize kinetic energy of tile */
      if (threadIdx.x==0) {
         ek[k] = 0.125f*sfxy[0];
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpu2ppgppost2l(float ppart[], float q[], int kpic[],
                               int noff, float qm, int idimp, int nppmx,
                               int mx, int my, int nxv, int nypmx, 
                               int mx1, int mxyp1) {
/* for 2d code, this subroutine calculates particle charge density
   using first-order linear interpolation, periodic boundaries
   threaded version using guard cells, for distributed data
   data deposited in tiles
   particles stored segmented array
   17 flops/particle, 6 loads, 4 stores
   input: all, output: q
   charge density is approximated by values at the nearest grid points
   q(n,m)=qm*(1.-dx)*(1.-dy)
   q(n+1,m)=qm*dx*(1.-dy)
   q(n,m+1)=qm*(1.-dx)*dy
   q(n+1,m+1)=qm*dx*dy
   where n,m = leftmost grid points and dx = x-n, dy = y-m
   ppart[m][n][0] = position x of particle n in partition in tile m
   ppart[m][n][1] = position y of particle n in partition in tile m
   q[k][j] = charge density at grid point (j,kk),
   where kk = k + noff
   kpic = number of particles per tile
   noff = lowermost global gridpoint in particle partition.
   qm = charge on particle, in units of e
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   mx/my = number of grids in sorting cell in x/y
   nxv = first dimension of charge array, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells.
   mx1 = (system length in x direction - 1)/mx + 1
   mxyp1 = mx1*myp1, where myp1=(partition length in y direction-1)/my+1
local data                                                            */
   int noffp, moffp, npoff, nppp, mxv;
   int mnoff, i, j, k, ii, nn, np, mm, mp;
   float dxp, dyp, amx, amy;
/* The size of the shared memory array is as follows: */
/* float sq[(mx+1)*(my+1)]                            */
   extern __shared__ float sq[];
   mxv = mx + 1;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* loop over tiles */
   if (k < mxyp1) {
      noffp = k/mx1;
      moffp = my*noffp;
      noffp = mx*(k - mx1*noffp);
      nppp = kpic[k];
      npoff = idimp*nppmx*k;
      mnoff = moffp + noff;
/* zero out local accumulator */
      i = threadIdx.x;
      while (i < mxv*(my+1)) {
         sq[i] = 0.0f;
         i += blockDim.x;
      }
/* synchronize threads */
       __syncthreads();
/* loop over particles in tile */
      j = threadIdx.x;
      while (j < nppp) {
/* find interpolation weights */
         dxp = ppart[j+npoff];
         nn = dxp;
         dyp = ppart[j+npoff+nppmx];
         mm = dyp;
         dxp = qm*(dxp - (float) nn);
         dyp = dyp - (float) mm;
         nn = nn - noffp;
         mm = mxv*(mm - mnoff);
         amx = qm - dxp;
         mp = mm + mxv;
         amy = 1.0f - dyp;
         np = nn + 1;
/* deposit charge within tile to local accumulator */
/* original deposit charge, has data hazard on GPU */
/*       sq[np+mp] += dxp*dyp; */
/*       sq[nn+mp] += amx*dyp; */
/*       sq[np+mm] += dxp*amy; */
/*       sq[nn+mm] += amx*amy; */
/* for devices with compute capability 2.x */
         atomicAdd(&sq[np+mp],dxp*dyp);
         atomicAdd(&sq[nn+mp],amx*dyp);
         atomicAdd(&sq[np+mm],dxp*amy);
         atomicAdd(&sq[nn+mm],amx*amy);
         j += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* deposit charge to global array */
      nn = mxv < nxv-noffp ? mxv : nxv-noffp;
      mm = my+1 < nypmx-moffp ? my+1 : nypmx-moffp;
      ii = threadIdx.x;
      while (ii < mxv*(my+1)) {
         j = ii/mxv;
         i = ii - mxv*j;
         if ((i < nn) && (j < mm)) {
/* original deposit charge, has data hazard on GPU */
/*          q[i+noffp+nxv*(j+moffp)] += sq[ii]; */
/* for devices with compute capability 2.x */
            atomicAdd(&q[i+noffp+nxv*(j+moffp)],sq[ii]);
         }
         ii += blockDim.x;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppcaguard2xl(float2 qc[], float2 scs[], float q[],
                                int nyp, int nx, int nxe, int nypmx,
                                int nxvh, int kypd) {
/* copy and accumulate extended periodic scalar field q in x direction
   into complex output fields qc, scs
   linear interpolation, for distributed data
   scs[j] = data to send to another processor
   nyp = number of primary (complete) gridpoints in particle partition
   nx = system length in x direction
   nxe = first dimension of input field array q, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells
   nxvh = first dimension of output field array qc, must be >= nx/2+1
   kypd = second dimension of output field array qc, must be >= nyp */
/* local data */
   int j, k, nxh;
   float at1;
   float2 a;
   nxh = nx/2;
   k = blockIdx.x;
/* copy interior points */
   if (k < nyp) {
      j = threadIdx.x;
      while (j < nxh) {
         at1 = 0.0f;
         if (j==0) {
            at1 = q[nx+nxe*k];
         }
         a.x = q[2*j+nxe*k] + at1;
         a.y = q[2*j+1+nxe*k];
         qc[j+nxvh*k] = a;
         j += blockDim.x;
      }
   }
/* copy exterior points */
   if (k==0) {
      j = threadIdx.x;
      while (j < nxh) {
         at1 = 0.0f;
         if (j==0) {
            at1 = q[nx+nxe*nyp];
         }
         a.x = q[2*j+nxe*nyp] + at1;
         a.y = q[2*j+1+nxe*nyp];
         scs[j] = a;
         j += blockDim.x;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppcaguard2yl(float2 fc[], float2 scr[], int nx,
                                int nxvh, int kypd) {
/* this subroutine adds data from guard cells from remote processors
   fc[k][j] = complex data for grid j,k in particle partition.
   output: fc
   scr[j] = complex input array for arriving data
   nx = system length in x direction
   nxvh = first dimension of fc, must be >= nx/2+1
   kypd = maximum size of field partition, including guard cells.
   linear interpolation, for distributed data
local data */
   int j, nxh;
   float2 a, b;
   nxh = nx/2;
   j = threadIdx.x+blockDim.x*blockIdx.x;
/* add up the guard cells from remote processors */
   if (j < nxh) {
      a = fc[j];
      b = scr[j];
      a.x += b.x;
      a.y += b.y;
      fc[j] = a;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppccguard2xl(float2 fxyc[], float2 scs[],
                                float fxy[], int nyp, int nx, int nxe,
                                int nypmx, int nxvh, int kypd) {
/* copy and replicate complex input 2d vector field fxyc in x direction
   into extended periodic fields fxy, scs
   linear interpolation, for distributed data
   scs[2][j] = data to send to another processor
   nyp = number of primary (complete) gridpoints in particle partition
   nx = system length in x direction
   nxe = second dimension of input field array fxy, must be >= nx+1
   nypmx = maximum size of particle partition, including guard cells
   nxvh = first dimension of input field array fxyc, must be >= nx/2+1
   kypd = third dimension of input field array fxyc, must be >= nyp+1 */
/* local data */
   int j, k, nxh;
   float2 a, b;
   nxh = nx/2;
   k = blockIdx.x;
/* copy interior points */
   if (k < nyp) {
      j = threadIdx.x;
      while (j < nxh) {
         a = fxyc[j+nxvh*2*k];
         b = fxyc[j+nxvh*(1+2*k)];
         fxy[2*(2*j+nxe*k)] = a.x;
         fxy[1+2*(2*j+nxe*k)] = b.x;
         fxy[2*(2*j+1+nxe*k)] = a.y;
         fxy[1+2*(2*j+1+nxe*k)] = b.y;
         j += blockDim.x;
      }
   }
/* copy edges of extended field */
   if (blockIdx.x==0) {
      k = threadIdx.x;
      while (k < nyp) {
         a = fxyc[nxvh*2*k];
         b = fxyc[nxvh*(1+2*k)];
         fxy[2*(nx+nxe*k)] = a.x;
         fxy[1+2*(nx+nxe*k)] = b.x;
         k += blockDim.x;
      }
/* copy exterior points */
      j = threadIdx.x;
      while (j < nxh) {
         scs[j] = fxyc[j];
         scs[j+nxvh] = fxyc[j+nxvh];
         j += blockDim.x;
      }
/* copy edges of extended field */
      if (threadIdx.x==0) {
         a = fxyc[0];
         b = fxyc[nxvh];
         a.y = 0.0f;
         b.y = 0.0f;
         scs[nxh] = a;
         scs[nxh+nxvh] = b;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppccguard2yl(float fxy[], float2 scr[], int nyp,
                                int nx, int nxe, int nxvh, int nypmx) {
/* this subroutine copies data to guard cells from remote processors
   fxy[k][j] = real data for grid j,k in particle partition.
   the grid is non-uniform and includes one extra guard cell.
   output: fxy
   scr[2][j] = complex input array for arriving data
   nyp = number of primary gridpoints in field partition
   it is assumed the nyp > 0.
   nx = system length in x direction
   nxe = second dimension of input field array fxy, must be >= nx+1
   nxvh = first dimension of scr, must be >= nx/2+1
   nypmx = maximum size of field partition, including guard cell.
   linear interpolation, for distributed data
local data */
   int j, nxh;
   float2 a, b;
   nxh = nx/2;
   j = threadIdx.x+blockDim.x*blockIdx.x;
/* copy to guard cells */
   if (j < nxh) {
      a = scr[j];
      b = scr[j+nxvh];
      fxy[2*(2*j+nxe*nyp)] = a.x;
      fxy[1+2*(2*j+nxe*nyp)] = b.x;
      fxy[2*(2*j+1+nxe*nyp)] = a.y;
      fxy[1+2*(2*j+1+nxe*nyp)] = b.y;
   }
   if (j==0) {
      a = scr[nxh];
      b = scr[nxh+nxvh];
      fxy[2*(nx+nxe*nyp)] = a.x;
      fxy[1+2*(nx+nxe*nyp)] = b.x;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppfnd2l(float ppart[], int kpic[], int ncl[],
                            int ihole[], int noff, int nyp, int idimp,
                            int nppmx, int nx, int ny, int mx, int my,
                            int mx1, int myp1, int ntmax, int *irc) {
/* this subroutine performs first step of a particle sort by x,y grid
   in tiles of mx, my, where one finds the particles leaving tile and
   stores their number, location, and destination in ncl and ihole.
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except ncl, ihole, irc
   output: ncl, ihole, irc
   ppart[k][0][n] = position x of particle n in tile k
   ppart[k][1][n] = position y of particle n in tile k 
   kpic[k] = number of particles in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ihole[k][:][0] = location of hole in array left by departing particle
   ihole[k][:][1] = destination of particle leaving hole
   ihole[k][0][0] = ih, number of holes left (error, if negative)
   noff = lowermost global gridpoint in particle partition.
   nyp = number of primary (complete) gridpoints in particle partition
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   nx/ny = system length in x/y direction
   mx/my = number of grids in sorting cell in x/y
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   ntmax = size of hole array for particles leaving tiles
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int mxyp1, noffp, moffp, nppp, j, k, ih, ist, nn, mm, nths;
   float anx, any, edgelx, edgely, edgerx, edgery, dx, dy;
/* The sizes of the shared memory arrays are as follows: */
/* int sncl[8], sih[blockDim.x], nh[1];                  */
   int *sncl, *sih, *nh;
   extern __shared__ int shm[];
   sncl = (int *)&shm[0];
   sih = (int *)&shm[8];
   nh = (int *)&shm[8+blockDim.x];
   mxyp1 = mx1*myp1;
   anx = (float) nx;
   any = (float) ny;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* find and count particles leaving tiles and determine destination */
/* update ppart, ihole, ncl */
/* loop over tiles */
   if (k < mxyp1) {
      noffp = k/mx1;
      moffp = my*noffp;
      noffp = mx*(k - mx1*noffp);
      nppp = kpic[k];
      nn = nx - noffp;
      nn = mx < nn ? mx : nn;
      mm = nyp - moffp;
      mm = my < mm ? my : mm;
      edgelx = noffp;
      edgerx = noffp + nn;
      edgely = noff + moffp;
      edgery = noff + moffp + mm;
/* clear counters */
      j = threadIdx.x;
      while (j < 8) {
         sncl[j] = 0;
         j += blockDim.x;
      }
      if (threadIdx.x==0) {
         nh[0] = 0;
      }
/* synchronize threads */
      __syncthreads();
/* loop over particles in tile */
      mm = (nppp - 1)/(int) blockDim.x + 1;
      noffp = 0;
      for (nn = 0; nn < mm; nn++) {
         j = threadIdx.x + blockDim.x*nn;
         sih[threadIdx.x] = 0;
         if (j < nppp) {
            dx = ppart[j+nppmx*(idimp*k)];
            dy = ppart[j+nppmx*(1+idimp*k)];
/* find particles going out of bounds */
            ist = 0;
/* count how many particles are going in each direction in ncl   */
/* save their address and destination in ihole                   */
/* use periodic boundary conditions and check for roundoff error */
/* ist = direction particle is going                             */
            if (dx >= edgerx) {
               if (dx >= anx)
                  ppart[j+nppmx*(idimp*k)] = dx - anx;
               ist = 2;
            }
            else if (dx < edgelx) {
               if (dx < 0.0f) {
                  dx += anx;
                  if (dx < anx)
                     ist = 1;
                  else
                     dx = 0.0f;
                  ppart[j+nppmx*(idimp*k)] = dx;
               }
               else {
                  ist = 1;
               }
            }
            if (dy >= edgery) {
               if (dy >= any)
                  ppart[j+nppmx*(1+idimp*k)] = dy - any;
               ist += 6;
            }
            else if (dy < edgely) {
               if (dy < 0.0f) {
                  dy += any;
                  if (dy < any)
                     ist += 3;
                  else
                     dy = 0.0f;
                  ppart[j+nppmx*(1+idimp*k)] = dy;
               }
               else {
                  ist += 3;
               }
            }
/* using prefix scan for ih to keep holes ordered */
            if (ist > 0) {
               atomicAdd(&sncl[ist-1],1);
               sih[threadIdx.x] = 1;
            }
         }
/* synchronize threads */
         __syncthreads();
         nths = nppp - blockDim.x*nn;
         if (nths > blockDim.x)
            nths = blockDim.x;
/* perform local prefix reduction */
         liscan2(sih,nths);
         if (j < nppp) {
            ih = sih[threadIdx.x];
            moffp = 0;
            if (threadIdx.x > 0)
               moffp = sih[threadIdx.x-1];
/* this thread has a hole present */
            if (ih > moffp) {
               ih += noffp;
               if (ih <= ntmax) {
                  ihole[2*(ih+(ntmax+1)*k)] = j + 1;
                  ihole[1+2*(ih+(ntmax+1)*k)] = ist;
               }
               else {
                  nh[0] = 1;
               }
            }
         }
/* update number of holes in this iteration */
         if (nths > 0)
            noffp += sih[nths-1];
/* synchronize threads */
         __syncthreads();
      }
/* write out counters */
      j = threadIdx.x;
      while (j < 8) {
         ncl[j+8*k] = sncl[j];
         j += blockDim.x;
      }
/* set error and end of file flag */
      if (threadIdx.x==0) {
/* ihole overflow */
         ih  = noffp;
         if (nh[0] > 0) {
            *irc = ih;
            ih = -ih;
         }
         ihole[2*(ntmax+1)*k] = ih;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppmov2l(float ppart[], float ppbuff[], int ncl[],
                            int ihole[], int idimp, int nppmx, int mx1,
                            int myp1, int npbmx, int ntmax, int *irc) {
/* this subroutine performs second step of a particle sort by x,y grid
   in tiles of mx, my, where prefix scan of ncl is performed and
   departing particles are buffered in ppbuff in direction order.
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except ppbuff, irc
   output: ppbuff, ncl, irc
   ppart[k][i][n] = i co-ordinate of particle n in tile k 
   ppbuff[k][i][n] = i co-ordinate of particle n in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ihole[k][:][0] = location of hole in array left by departing particle
   ihole[k][:][1] = direction destination of particle leaving hole
   all for tile k
   ihole[k][0][0] = ih, number of holes left (error, if negative)
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   npbmx = size of buffer array ppbuff
   ntmax = size of hole array for particles leaving tiles
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int mxyp1, i, j, k, ii, nh, ist, j1, ierr;
/* The sizes of the shared memory arrays are as follows: */
/* int sncl[8], ip[1];                                   */
/* blockDim.x should be >= 8                             */
   int *sncl, *ip;
   extern __shared__ int shm[];
   sncl = (int *)&shm[0];
   ip = (int *)&shm[8];
   mxyp1 = mx1*myp1;
   ierr = 0;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
   j = threadIdx.x;
/* buffer particles that are leaving tile: update ppbuff, ncl */
/* loop over tiles */
   if (k < mxyp1) {
/* find address offset for ordered ppbuff array */
      if (j < 8) {
         ist = ncl[j+8*k];
         sncl[j] = ist;
      }
      if (threadIdx.x==0)
         ip[0] = 0;
/* synchronize threads */
      __syncthreads();
/* perform local prefix reduction */
      liscan2(sncl,8);
      if (j < 8)
         sncl[j] -= ist;
/* synchronize threads */
      __syncthreads();
      nh = ihole[2*(ntmax+1)*k];
/* loop over particles leaving tile */
      while (j < nh) {
/* buffer particles that are leaving tile, in direction order */
         j1 = ihole[2*(j+1+(ntmax+1)*k)] - 1;
         ist = ihole[1+2*(j+1+(ntmax+1)*k)];
         ii = atomicAdd(&sncl[ist-1],1);
         if (ii < npbmx) {
            for (i = 0; i < idimp; i++) {
               ppbuff[ii+npbmx*(i+idimp*k)]
               = ppart[j1+nppmx*(i+idimp*k)];
            }
         }
         else {
            ip[0] = 1;
         }
         j += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
/* write out counters */
      j = threadIdx.x;
      if (j < 8) {
         ncl[j+8*k] = sncl[j];
      }
/* set error */
      if (threadIdx.x==0) {
         if (ip[0] > 0)
            ierr = ierr > sncl[7] ? ierr : sncl[7];
      }
   }
/* ppbuff overflow */
   if (ierr > 0)
      *irc = ierr;
   return;
}

/*--------------------------------------------------------------------*/
__global__ void nciscan2(int ncl[], int ncll[], int nclr[], int nscr[], 
                         int mx1, int myp1) {
/* calculate number number offsets for particles leaving processor
   by performing prefix scan (running sum) for each block.  the last
   value of each block is written to nscr to add to each block later.
   ncl[k][i] = number of particles going to destination i, tile k
   ncll = number offset being sent to lower processor
   nclr = number offset being sent to upper processor
   nscr = scratch integer array, of size 2*((mx1-1)/blockDim.x+1)
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
local data                                                            */
   int l, koff, ii, jj, kk, nths;
/* The size of the shared memory array are as follows: */
/* int isdata[2*blockDim.x];                           */
   int *isdata;
   extern __shared__ int shm[];
   isdata = (int *)&shm[0];
   l = threadIdx.x;
   koff = blockDim.x*blockIdx.x;
   kk = mx1*(myp1 - 1) + koff;
   nths = mx1 - koff;
   if (nths > blockDim.x)
      nths = blockDim.x;
   if ((l+koff) < mx1) {
      ii = ncl[4+8*(l+koff)] - ncl[1+8*(l+koff)];
      isdata[l] = ii;
      jj = ncl[7+8*(l+kk)] - ncl[4+8*(l+kk)];
      isdata[l+blockDim.x] = jj;
   }
/* synchronize threads */
   __syncthreads();
/* perform local prefix reductions */
   liscan2(isdata,nths);
   liscan2(&isdata[blockDim.x],nths);
   if ((l+koff) < mx1) {
      ncll[3*(l+koff)] = ii;
      ncll[3*(l+koff)+1] = isdata[l] - ii;
      nclr[3*(l+koff)] = jj;
      nclr[3*(l+koff)+1] = isdata[l+blockDim.x] - jj;
   }
   if (l==0) {
      ii = 0;
      jj = 0;
      if (nths > 0) {
         ii = isdata[nths-1];
         jj = isdata[nths+blockDim.x-1];
      }
      nscr[blockIdx.x] = ii;
      nscr[blockIdx.x+gridDim.x] = jj;
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppbuf2l(float ppbuff[], float sbufl[],
                            float sbufr[], int ncl[], int ncll[],
                            int nclr[], int nscr[], int idimp, int mx1,
                            int myp1, int npbmx, int nbmax, int *irc) {
/* this subroutine performs third step of a particle sort by x,y grid
   in tiles of mx, my, where particles leaving the processor are
   buffered in sbufl and sbufr, and particle number offsets are stored
   in ncll and nclr.
   gpupppbuf2l and nciscan2 should use the same blocksize.
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except sbufl, sbufr, ncll, nclr, irc
   output: sbufl, sbufr, ncll, nclr, irc
   ppbuff[k][i][n] = i co-ordinate of particle n in tile k
   sbufl = buffer for particles being sent to lower processor
   sbufr = buffer for particles being sent to upper processor
   kpic[k] = number of particles in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ncll = number offset being sent to lower processor
   nclr = number offset being sent to upper processor
   nscr = scratch integer array, of size 2*((mx1-1)/blockDim.x+1)
   idimp = size of phase space = 4
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   npbmx = size of buffer array ppbuff
   nbmax =  size of buffers for passing particles between processors
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int i, j, k, ii, jj, nl, nr, nn, mm, nbl, kk, ll, im;
   k = blockIdx.x;
/* buffer particles and their number leaving the node: */
/* update sbufl, sbufr, ncll, nclr */
   nbl = (mx1 - 1)/blockDim.x + 1;
   nl = 0;
   nr = 0;
   nn = 0;
   mm = 0;
   kk = mx1*(myp1 - 1);
/* loop over row of tiles */
   if (k < mx1) {
      j = k/blockDim.x + 1;
/* find how many particles must be buffered */
      for (i = 1; i < nbl; i++) {
         nl += nscr[i-1];
         nr += nscr[i+nbl-1];
/* save offsets */
         if (i==(j-1)) {
            nn = nl;
            mm = nr;
         }
      }
      nl += nscr[nbl-1];
      nr += nscr[2*nbl-1];
      ii = ncll[3*k];
      nn += ncll[3*k+1];
      im = nclr[3*k];
      mm += nclr[3*k+1];
/* synchronize threads */
      __syncthreads();
      ll = ncl[1+8*k];
      jj = nl - nn;
      jj = ii < jj ? ii : jj;
      j = threadIdx.x;
      while (j < jj) {
         for (i = 0; i < idimp; i++) {
            sbufl[j+nn+nl*i]
            = ppbuff[j+ll+npbmx*(i+idimp*k)];

         }
         j += blockDim.x;
      }
      ll = nn - ll;
      if (threadIdx.x < 3) {
         ncll[threadIdx.x+3*k] = ncl[threadIdx.x+2+8*k] + ll;
      }
      nn += ii;
      ii = im;
      ll = ncl[4+8*(k+kk)];
      jj = nr - mm;
      jj = ii < jj ? ii : jj;
      j = threadIdx.x;
      while (j < jj) {
         for (i = 0; i < idimp; i++) {
            sbufr[j+mm+nr*i]
            = ppbuff[j+ll+npbmx*(i+idimp*(k+kk))];
         }
         j += blockDim.x;
      }
      ll = mm - ll;
      if (threadIdx.x < 3) {
         nclr[threadIdx.x+3*k] = ncl[threadIdx.x+5+8*(k+kk)] + ll;
      }
      mm += ii;
   }
/* sbufl or sbufr overflow */
   ii = nn > mm ? nn : mm;
   if (ii > nbmax)
      *irc = ii;
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpupppord2l(float ppart[], float ppbuff[],
                            float rbufl[], float rbufr[], int kpic[],
                            int ncl[], int ihole[], int mcll[],
                            int mclr[], int idimp, int nppmx, int mx1,
                            int myp1, int npbmx, int ntmax, int nbmax,
                            int *irc) {
/* this subroutine performs third step of a particle sort by x,y grid
   in tiles of mx, my, where incoming particles from other tiles are
   copied into ppart from ppbuff, rbufl, and rbufr
   linear interpolation, with periodic boundary conditions
   for distributed data, with 1d domain decomposition in y.
   tiles are assumed to be arranged in 2D linear memory
   input: all except irc
   output: ppart, kpic, irc
   ppart[k][i][n] = i co-ordinate of particle n in tile k 
   ppbuff[k][i][n] = i co-ordinate of particle n in tile k
   rbufl = buffer for particles being received from lower processor
   rbufr = buffer for particles being received from upper processor
   kpic[k] = number of particles in tile k
   ncl[k][i] = number of particles going to destination i, tile k
   ihole[k][:][0] = location of hole in array left by departing particle
   ihole[k][:][1] = direction destination of particle leaving hole
   all for tile k
   ihole[k][0][0] = ih, number of holes left (error, if negative)
   mcll = number offset being received from lower processor
   mclr = number offset being received from upper processor
   idimp = size of phase space = 4
   nppmx = maximum number of particles in tile
   mx1 = (system length in x direction - 1)/mx + 1
   myp1 = (partition length in y direction - 1)/my + 1
   npbmx = size of buffer array ppbuff
   ntmax = size of hole array for particles leaving tiles
   nbmax =  size of buffers for passing particles between processors
   irc = maximum overflow, returned only if error occurs, when irc > 0
local data                                                            */
   int mxyp1, nppp, ncoff, noff, moff, i, j, k, ii, jj, kx, ky, ni, nh;
   int nn, mm, ll, ip, j1, j2, kxl, kxr, kk, kl, kr, nr, mr;
   int nths;
/* The sizes of the shared memory arrays are as follows: */
/* int ks[8], sip[8], sj[blockDim.x], sj1[1], ist[1];    */
   int *ks, *sip, *sj, *sj1, *ist;
   extern __shared__ int shm[];
   ks = (int *)&shm[0];
   sip = (int *)&shm[8];
   sj = (int *)&shm[16];
   sj1 = (int *)&shm[16+blockDim.x];
   ist = (int *)&shm[17+blockDim.x];
   mxyp1 = mx1*myp1;
   noff = 0;
   moff = 0;
/* k = tile number */
   k = blockIdx.x + gridDim.x*blockIdx.y;
/* copy incoming particles from buffer into ppart: update ppart, kpic */
/* loop over tiles */
   if (k < mxyp1) {
      nppp = kpic[k];
      ky = k/mx1;
/* loop over tiles in y */
      kk = ky*mx1;
/* find tile above */
      kl = (ky - 1)*mx1;
/* find tile below */
      kr = (ky + 1)*mx1;
/* loop over tiles in x, assume periodic boundary conditions */
      kx = k - ky*mx1;
      kxl = kx - 1;
      if (kxl < 0)
         kxl += mx1;
      kxr = kx + 1;
      if (kxr >= mx1)
         kxr -= mx1;
/* find tile number for different directions */
      if (threadIdx.x==0) {
         ks[0] = kxr + kk;
         ks[1] = kxl + kk;
         ks[2] = kx + kr;
         ks[3] = kxr + kr;
         ks[4] = kxl + kr;
         ks[5] = kx + kl;
         ks[6] = kxr + kl;
         ks[7] = kxl + kl;
         sj1[0] = 0;
         ist[0] = 0;
      }
/* synchronize threads */
      __syncthreads();
/* find number of incoming particles */
      kk = 0;
      if (ky==0) {
         nr = mcll[3*mx1-1];
         if (kx > 0)
            noff = mcll[3*kx-1];
      }
      if (ky==(myp1-1)) {
         mr = mclr[3*mx1-1];
         if (kx > 0)
            moff = mclr[3*kx-1];
      }
      ncoff = 0;
      ip = 0;
      ii = threadIdx.x;
      if (ii < 8) {
         kk = ks[ii];
/* ip = number of particles coming from direction ii */
         if (kk < 0) {
            if (ii > 5)
               noff = mcll[ii-6+3*(kk+mx1)];
            ip = mcll[ii-5+3*(kk+mx1)] - noff;
            kk = noff;
         }
         else if (kk >= mxyp1) {
            if (ii > 2)
               moff = mclr[ii-3+3*(kk-mxyp1)];
            ip = mclr[ii-2+3*(kk-mxyp1)] - moff;
            kk = moff;
         }
         else {
            if (ii > 0)
               ncoff = ncl[ii-1+8*kk];
            ip = ncl[ii+8*kk] - ncoff;
            kk = ncoff + idimp*npbmx*kk;
         }
         sip[ii] = ip;
      }
/* synchronize threads */
      __syncthreads();
/* perform local prefix reduction */
      liscan2(sip,8);
      ni = sip[7];
/* loop over directions */
      nh = ihole[2*(ntmax+1)*k];
      j1 = 0;
      mm = (ni - 1)/(int) blockDim.x + 1;
      for (nn = 0; nn < mm; nn++) {
         j = threadIdx.x + blockDim.x*nn;
         sj[threadIdx.x] = 0;
         if (threadIdx.x==0)
            sj[0] = sj1[0];
/* synchronize threads */
         __syncthreads();
/* calculate offset for reading from particle buffer */
         if (ii < 8) {
/* mark next location where direction ii changes */
            jj = sip[ii] - blockDim.x*nn;
            if ((jj >= 0) && (jj < blockDim.x)) {
               if (ip > 0)
                  sj[jj] -= kk + ip;
            }
         }
/* synchronize threads */
         __syncthreads();
/* calculate offset for reading from particle buffer */
         if (ii < 8) {
/* mark location where direction ii starts */
            jj -= ip;
            if ((jj >= 0) && (jj < blockDim.x)) {
               if (ip > 0)
                  sj[jj] += kk;
            }
         }
         nths = ni - blockDim.x*nn;
         if (nths > blockDim.x)
            nths = blockDim.x;
/* synchronize threads */
         __syncthreads();
/* perform local prefix reduction */
         liscan2(sj,nths);
/* save last value for next time */
         if (threadIdx.x==0) {
            jj = 0;
            if (nths > 0)
               jj = sj[nths-1];
            sj1[0] = jj;
         }
         if (j < ni) {
/* insert incoming particles into holes */
            if (j < nh) {
               j1 = ihole[2*(j+1+(ntmax+1)*k)] - 1;
            }
/* place overflow at end of array */
            else {
               j1 = nppp + (j - nh);
            }
            if (j1 < nppmx) {
               jj = sj[threadIdx.x];
               if ((ky==0) && (j>=sip[4]) && (j<sip[7])) {
                  for (i = 0; i < idimp; i++) {
                     ppart[j1+nppmx*(i+idimp*k)]
                     = rbufl[j+jj+nr*i];
                  }
               }
               else if ((ky==(myp1-1)) && (j>=sip[1]) && (j<sip[4])) {
                  for (i = 0; i < idimp; i++) {
                     ppart[j1+nppmx*(i+idimp*k)]
                     = rbufr[j+jj+mr*i];
                  }
               }
               else {
                  for (i = 0; i < idimp; i++) {
                     ppart[j1+nppmx*(i+idimp*k)]
                     = ppbuff[j+jj+npbmx*i];
                  }
               }
            }
            else {
               ist[0] = 1;
            }
         }
/* synchronize threads */
         __syncthreads();
      }
/* update particle number if all holes have been filled */
      jj = ni - nh;
      if (jj > 0)
         nppp += jj;
/* fill up remaining holes in particle array with particles from end */
      ip = nh - ni;
      if (ip > 0) {
         mm = (ip - 1)/(int) blockDim.x + 1;
         kk = 0;
         ll = 0;
/* loop over holes */
         for (nn = 0; nn < mm; nn++) {
            j = threadIdx.x + blockDim.x*nn;
/* j1 = locations of particles to fill holes, in decreasing order */
            j1 = 0;
            if (j < ip) {
               j1 = nppp - j - 1;
            }
/* j2 = locations of holes at the end, in decreasing order */
            j2 = 0;
            jj = nh - ll - threadIdx.x;
            if (jj > 0) {
               j2 = ihole[2*(jj+(ntmax+1)*k)] - 1;
            }
/* holes with locations greater than nppp-ip do not need to be filled */
/* identify such holes */
            sj[threadIdx.x] = 1;
/* synchronize threads */
            __syncthreads();
/* omit particles at end that are holes */
            ii = nppp - (j2 + blockDim.x*nn) - 1;
            if ((ii >= 0) && (ii < blockDim.x))
               sj[ii] = 0;
            nths = ip - blockDim.x*nn;
            if (nths > blockDim.x)
               nths = blockDim.x;
/* synchronize threads */
            __syncthreads();
/* perform local prefix reduction */
            liscan2(sj,nths);
/* ii = number particles at end to be moved */
            ii = 0;
            if (nths > 0)
               ii = sj[nths-1];
/* identify which particles at end to be moved */
            if (ii < nths) {
               ncoff = 0;
               if (j < ip) {
                  if (threadIdx.x > 0)
                    ncoff = sj[threadIdx.x-1];
                  jj = sj[threadIdx.x];
               }
/* synchronize threads */
               __syncthreads();
               if (j < ip) {
                  if (jj > ncoff) {
                     sj[jj-1] = j1;
                  }
               }
/* synchronize threads */
               __syncthreads();
            }
/* j2 = locations of holes to be filled in increasing order */
            j2 = 0;
            if (j < ip) {
               j1 = nppp - j - 1;
               jj = threadIdx.x + ni + kk + 1;
               if (jj <= nh)
                  j2 = ihole[2*(jj+(ntmax+1)*k)] - 1;
            }
/* move particles from end into remaining holes */
            if (j < (ii+blockDim.x*nn)) {
               if (ii < nths)
                  j1 = sj[threadIdx.x];
               for (i = 0; i < idimp; i++) {
                  ppart[j2+nppmx*(i+idimp*k)]
                  = ppart[j1+nppmx*(i+idimp*k)];
               }
            }
/* accumulate number of holes filled */
            kk += ii;
/* accumulate number of holes skipped over */
            ii = nths - ii;
            ll += ii;
         }
/* update number of particles */
         nppp -= ip;
      }
/* set error and update particle */
      if (threadIdx.x==0) {
/* ppart overflow */
         if (ist[0] > 0)
            *irc = nppp;
         kpic[k] = nppp;
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppois22t(float2 qt[], float2 fxyt[], float2 ffct[],
                            float *we, int nx, int ny, int kstrt,
                            int nyv, int kxp1, int nyhd) {
/* this subroutine solves 2d poisson's equation in fourier space for
   force/charge (or convolution of electric field over particle shape)
   with periodic boundary conditions, for distributed data.
   vector length is second dimension.
   input: qt,ffct,nx,ny,nyv,kxp1,nyhd, output: fxyt,we
   approximate flop count is: 33*nxc*nyc + 15*(nxc + nyc)
   where nxc = (nx/2-1)/nvp, nyc = ny/2 - 1, and nvp = number of procs
   the equation used is:
   fx[ky][kx] = -sqrt(-1)*kx*g[ky][kx]*s[ky][kx]*q[ky][kx],
   fy[ky][kx] = -sqrt(-1)*ky*g[ky][kx]*s[ky][kx]*q[ky][kx],
   where kx = 2pi*j/nx, ky = 2pi*k/ny, and j,k = fourier mode numbers,
   g[ky][kx] = (affp/(kx**2+ky**2))*s[ky][kx],
   s[ky][kx] = exp(-((kx*ax)**2+(ky*ay)**2)/2), except for
   fx(kx=pi) = fy(kx=pi) = fx(ky=pi) = fy(ky=pi) = 0, and
   fx(kx=0,ky=0) = fy(kx=0,ky=0) = 0.
   qt[j][k] = complex charge density for fourier mode (jj,k)
   fxyt[j][0][k] = x component of complex force/charge,
   fxyt[j][1][k] = y component of complex force/charge,
   for fourier mode (jj,k), where jj = j + kxp1*(kstrt - 1)
   kxp1 = number of data values per block for unpacked field data
   kstrt = starting data block number
   aimag(ffct[j][k]) = finite-size particle shape factor s
   real(ffct[j][k])) = potential green's function g
   for fourier mode (jj,k), where jj = j + kxp1*(kstrt - 1)
   electric field energy is also calculated, using
   we = nx*ny*sum((affp/(kx**2+ky**2))*|q[ky][kx]*s[ky][kx]|**2)
   where affp = nx*ny/np, where np=number of particles
   nx/ny = system length in x/y direction
   nyv = first dimension of field arrays, must be >= ny
   nyhd = first dimension of form factor array, must be >= nyh
local data                                                 */
   int nxh, nyh, ks, joff, kxps, j, jj, jk, k, j0, j1, k1, jk2;
   float dnx, dny, dkx, at1, at2, at3, at4;
   float2 zero, zt1, zt2, zt3;
/* The size of the shared memory array is as follows: */
/* float ss[blockDim.x];                              */
   extern __shared__ float ss[];
   double wp;
   nxh = nx/2;
   nyh = 1 > ny/2 ? 1 : ny/2;
   ks = kstrt - 1;
   joff = kxp1*ks;
   j1 = nxh + 1;
   kxps = j1 - joff;
   kxps = 0 > kxps ? 0 : kxps;
   kxps = kxp1 < kxps ? kxp1 : kxps;
   dnx = 6.28318530717959f/(float) nx;
   dny = 6.28318530717959f/(float) ny;
   zero.x = 0.0f;
   zero.y = 0.0f;
/* calculate force/charge and sum field energy */
   wp = 0.0;
   if (kstrt <= j1) {
/* mode numbers 0 < kx < nx/2 and 0 < ky < ny/2 */
/*    for (j = 0; j < kxps; j++) { */
      j = blockIdx.x;
      j0 = j + joff;
      dkx = dnx*(float) j0;
      jj = nyhd*j;
      jk = nyv*j;
      jk2 = 2*jk;
      if ((j0 > 0) && (j0 < nxh)) {
/*       for (k = 1; k < nyh; k++) { */
         k = threadIdx.x;
         while (k < nyh) {
            if (k > 0) {
               k1 = ny - k;
               zt1 = ffct[k+jj];
               at1 = zt1.x*zt1.y;
               at2 = at1*dkx;
               at3 = at1*dny*(float) k;
               zt1 = qt[k+jk];
               at4 = zt1.x;
               zt1.x = zt1.y;
               zt1.y = -at4;
               zt2 = qt[k1+jk];
               at4 = zt2.x;
               zt2.x = zt2.y;
               zt2.y = -at4;
               zt3.x = at2*zt1.x;
               zt3.y = at2*zt1.y;
               fxyt[k+jk2] = zt3;
               zt3.x = at2*zt2.x;
               zt3.y = at2*zt2.y;
               fxyt[k1+jk2] = zt3;
               zt3.x = at3*zt1.x;
               zt3.y = at3*zt1.y;
               fxyt[k+nyv+jk2] = zt3;
               zt3.x = -at3*zt2.x;
               zt3.y = -at3*zt2.y;
               fxyt[k1+nyv+jk2] = zt3;
               wp += (double) (at1*(zt1.x*zt1.x + zt1.y*zt1.y
                   + zt2.x*zt2.x + zt2.y*zt2.y));
            }
            k += blockDim.x;
         }
      }
/* mode numbers ky = 0, ny/2 */
      if (blockIdx.x==0) {
         k1 = nyh;
/*       for (j = 1; j < kxps; j++) { */
         j = threadIdx.x;
         while (j < kxps) {
            j0 = j + joff;
            dkx = dnx*(float) j0;
            jj = nyhd*j;
            jk = nyv*j;
            jk2 = 2*jk;
            if ((j0 > 0) && (j0 < nxh)) {
               zt1 = ffct[jj];
               at1 = zt1.x*zt1.y;
               at2 = dkx*at1;
               zt1 = qt[jk];
               at4 = zt1.x;
               zt3.x = at2*zt1.y;
               zt3.y = -at2*at4;
               fxyt[jk2] = zt3;
               fxyt[k1+jk2] = zero;
               fxyt[nyv+jk2] = zero;
               fxyt[k1+nyv+jk2] = zero;
               wp += (double) (at1*(zt1.x*zt1.x + zt1.y*zt1.y));
            }
            j += blockDim.x;
         }
/* mode numbers kx = 0 */
         if (ks==0) {
/*          for (k = 1; k < nyh; k++) { */
            k = threadIdx.x;
            while (k < nyh) {
               if (k > 0) {
                  k1 = ny - k;
                  zt1 = ffct[k];
                  at1 = zt1.x*zt1.y;
                  at3 = at1*dny*(float) k;
                  zt1 = qt[k];
                  at4 = zt1.x;
                  zt3.x = at3*zt1.y;
                  zt3.y = -at3*at4;
                  fxyt[k] = zero;
                  fxyt[k1] = zero;
                  fxyt[k+nyv] = zt3;
                  zt3.y = -zt3.y;
                  fxyt[k1+nyv] = zt3;
                  wp += (double) (at1*(zt1.x*zt1.x + zt1.y*zt1.y));
               }
               k += blockDim.x;
            }
            if (threadIdx.x==0) {
               k1 = nyh;
               fxyt[0] = zero;
               fxyt[k1] = zero;
               fxyt[nyv] = zero;
               fxyt[k1+nyv] = zero;
            }
         }
/* mode numbers kx = nx/2 */
         if (ks==(nxh/kxp1)) {
            jk = 2*nyv*(kxps-1);
/*          for (k = 0; k < ny; k++) { */
            k = threadIdx.x;
            while (k < ny) {
               fxyt[k+jk] = zero;
               fxyt[k+nyv+jk] = zero;
               k += blockDim.x;
            }
         }
      }
   }
   j = blockIdx.x;
   if (j < kxps) {
/* sum potential energies for each x co-ordinate */
      ss[threadIdx.x] = (float) wp;
/* synchronize threads */
      __syncthreads();
      lsum2(ss,blockDim.x);
/* normalize potential energy for each x co-ordinate */
      if (threadIdx.x==0)
         we[j] = ss[0]*((float) nx)*((float) ny);
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpufft2rcxs(float2 f[], int isign, int mixup[],
                            float2 sct[], int indx, int indy, int nyi,
                            int nyp, int nxhd, int nyd, int nxhyd,
                            int nxyhd, int nsize) {
/* this subroutine performs the x part of a two dimensional real to
   complex fast fourier transform and its inverse, for a subset of y,
   using complex arithmetic.
   for isign = (-1,1), input: all, output: f
   for isign = -1, approximate flop count: N*(5*log2(N) + 19/2)
   for isign = 1,  approximate flop count: N*(5*log2(N) + 15/2)
   where N = (nx/2)*ny
   indx/indy = exponent which determines length in x/y direction,
   where nx=2**indx, ny=2**indy
   if isign = -1, an inverse fourier transform in x is performed
   f[m][n] = (1/nx*ny)*sum(f[k][j]*exp(-sqrt(-1)*2pi*n*j/nx))
   if isign = 1, a forward fourier transform in x is performed
   f[k][j] = sum(f[m][n]*exp(sqrt(-1)*2pi*n*j/nx))
   mixup = array of bit reversed addresses
   sct = sine/cosine table
   nyi = initial y index used
   nyp = number of y indices used
   nxhd = first dimension of f >= nx/2+1
   nyd = second dimension of f >= ny
   nxhyd = maximum of (nx/2,ny)
   nxyhd = maximum of (nx,ny)/2
   nsize = amount of scratch complex memory used
   fourier coefficients are stored as follows:
   f[k][j].x, f[k][j].y = real, imaginary part of mode j,k, where
   0 <= j < nx/2+1 and 0 <= k < ny
   written by viktor k. decyk, ucla
local data                                                            */
   int indx1, indx1y, nx, nxh, nxhh, ny, nxy, nxhy, nyt;
   int nrx, i, j, k, l, j1, j2, k1, k2, ns, ns2, km, kmr, jj, kk;
   int n, nn, in, nt, nh;
   float ani, at1, at2;
   float2 t1, t2, t3;
/* The size of the shared memory array is as follows: */
/* float2 s[nsize];                                   */
   extern __shared__ float2 s[];
   indx1 = indx - 1;
   indx1y = indx1 > indy ? indx1 : indy;
   nx = 1L<<indx;
   nxh = nx/2;
   nxhh = nx/4;
   ny = 1L<<indy;
   nxy = nx > ny ? nx : ny;
   nxhy = 1L<<indx1y;
   nyt = nyi + nyp - 1;
/* calculate extent of shared memory usage: */
/* nn = size of shared memory in x          */
   nn = nxh;
   in = 0;
   while (nn > nsize) {
      nn = nn/2;
      in += 1;
   }
/* nt = number of iterations in x           */
   nt = 1L<<in;
   in = indx1 - in;
   nh = nn/2;
/* inverse fourier transform */
   if (isign < 0) {
/* bit-reverse array elements in x */
      nrx = nxhy/nxh;
/* for (k = nyi-1; k < nyt; k++) { */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 0; j < nxh; j++) { */
         j = threadIdx.x;
         while (j < nxh) {
            j1 = (mixup[j] - 1)/nrx;
            if (j < j1) {
               t1 = f[j1+jj];
               f[j1+jj] = f[j+jj];
               f[j+jj] = t1;
            }
            j += blockDim.x;
         }
/* synchronize threads */
         __syncthreads();
      }
/* copy data to local memory */
      nrx = nxy/nxh;
/*    for (i = nyi-1; i < nyt; i++) { */
      i = blockIdx.x + nyi - 1;
      if (i < nyt) {
         jj = nxhd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = f[kk+nn*n+jj];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in x */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nxhh/ns;
               kmr = km*nrx;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
               ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               f[kk+nn*n+jj] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in x */
         ns = 1L<<in;
         for (l = in; l < indx1; l++) {
            ns2 = ns + ns;
            km = nxhh/ns;
            kmr = km*nrx;
/*          for (kk = 0; kk < nxhh; kk++) { */
            kk = threadIdx.x;
            while (kk < nxhh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t2 = f[j2+jj];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t2 = f[j1+jj];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               f[j2+jj] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               f[j1+jj] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
/* unscramble coefficients and normalize */
      kmr = nxy/nx;
      ani = 0.5f/(((float) nx)*((float) ny));
/* for (k = nyi-1; k < nyt; k++) */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 1; j < nxhh; j++) { */
         j = threadIdx.x;
         while (j < nxhh) {
            if (j > 0) {
               t3 = sct[kmr*j];
               at1 = t3.y;
               at2 = -t3.x;
               t2 = f[nxh-j+jj];
               t2.y = -t2.y;
               t3 = f[j+jj];
               t1.x = t3.x + t2.x;
               t1.y = t3.y + t2.y;
               t3.x -= t2.x;
               t3.y -= t2.y;
               t2.x = t3.x*at1 - t3.y*at2;
               t2.y = t3.x*at2 + t3.y*at1;
               t3.x = ani*(t1.x + t2.x);
               t3.y = ani*(t1.y + t2.y);
               f[j+jj] = t3;
               t3.x = ani*(t1.x - t2.x);
               t3.y = ani*(t2.y - t1.y);
               f[nxh-j+jj] = t3;
            }
            j += blockDim.x;
         }
         if (threadIdx.x==0) {
            ani = 2.0f*ani;
            t3 = f[nxhh+jj];
            t3.x = ani*t3.x;
            t3.y = -ani*t3.y;
            f[nxhh+jj] = t3;
            t3 = f[jj];
            at1 = t3.x;
            at2 = t3.y;
            t3.x = ani*(at1 - at2);
            t3.y = 0.0f;
            f[nxh+jj] = t3;
            t3.x = ani*(at1 + at2);
            f[jj] = t3;
         }
/* synchronize threads */
         __syncthreads();
      }
   }
/* forward fourier transform */
   if (isign > 0) {
/* scramble coefficients */
      kmr = nxy/nx;
/*    for (k = nyi-1; k < nyt; k++) { */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 1; j < nxhh; j++) { */
         j = threadIdx.x;
         while (j < nxhh) {
            if (j > 0) {
               t3 = sct[kmr*j];
               at1 = t3.y;
               at2 = t3.x;
               t2 = f[nxh-j+jj];
               t2.y = -t2.y;
               t3 = f[j+jj];
               t1.x = t3.x + t2.x;
               t1.y = t3.y + t2.y;
               t3.x -= t2.x;
               t3.y -= t2.y;
               t2.x = t3.x*at1 - t3.y*at2;
               t2.y = t3.x*at2 + t3.y*at1;
               t3.x = t1.x + t2.x;
               t3.y = t1.y + t2.y;
               f[j+jj] = t3;
               t3.x = t1.x - t2.x;
               t3.y = t2.y - t1.y;
               f[nxh-j+jj] = t3;
            }
            j += blockDim.x;
         }
         if (threadIdx.x==0) {
            t3 = f[nxhh+jj];
            t3.x = 2.0f*t3.x;
            t3.y = -2.0f*t3.y;
            f[nxhh+jj] = t3;
            t3 = f[jj];
            at1 = t3.x;
            t3 = f[nxh+jj];
            at2 = t3.x;
            t3.x = at1 + at2;
            t3.y = at1 - at2;
            f[jj] = t3;
         }
/* synchronize threads */
         __syncthreads();
      }
/* bit-reverse array elements in x */
      nrx = nxhy/nxh;
/* for (k = nyi-1; k < nyt; k++) { */
      k = blockIdx.x + nyi - 1;
      if (k < nyt) {
         jj = nxhd*k;
/*       for (j = 0; j < nxh; j++) { */
         j = threadIdx.x;
         while (j < nxh) {
            j1 = (mixup[j] - 1)/nrx;
            if (j < j1) {
               t1 = f[j1+jj];
               f[j1+jj] = f[j+jj];
               f[j+jj] = t1;
            }
            j += blockDim.x;
         }
/* synchronize threads */
         __syncthreads();
      }
/* copy data to local memory */
      nrx = nxy/nxh;
/*    for (i = nyi-1; i < nyt; i++) { */
      i = blockIdx.x + nyi - 1;
      if (i < nyt) {
         jj = nxhd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = f[kk+nn*n+jj];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in x */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nxhh/ns;
               kmr = km*nrx;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t1.y = -t1.y;
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
               ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               f[kk+nn*n+jj] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in x */
         ns = 1L<<in;
         for (l = in; l < indx1; l++) {
            ns2 = ns + ns;
            km = nxhh/ns;
            kmr = km*nrx;
/*          for (kk = 0; kk < nxhh; kk++) { */
            kk = threadIdx.x;
            while (kk < nxhh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t1.y = -t1.y;
               t2 = f[j2+jj];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t2 = f[j1+jj];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               f[j2+jj] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               f[j1+jj] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpufft2rcys(float2 g[], int isign, int mixup[],
                            float2 sct[], int indx, int indy, int nxi,
                            int nxp, int nxhd, int nyd, int nxhyd,
                            int nxyhd, int nsize) {
/* this subroutine performs the y part of a two dimensional real to
   complex fast fourier transform and its inverse, for a subset of x,
   using complex arithmetic, with data not packed
   for isign = (-1,1), input: all, output: g
   for isign = -1, approximate flop count: N*(5*log2(N) + 19/2)
   for isign = 1,  approximate flop count: N*(5*log2(N) + 15/2)
   where N = (nx/2)*ny
   indx/indy = exponent which determines length in x/y direction,
   where nx=2**indx, ny=2**indy
   if isign = -1, an inverse fourier transform in y is performed
   g[n][m] = sum(g[j][k]*exp(-sqrt(-1)*2pi*m*k/ny))
   if isign = 1, a forward fourier transform in y is performed
   g[j][k] = sum(g[n][m]*exp(sqrt(-1)*2pi*m*k/ny))
   mixup = array of bit reversed addresses
   sct = sine/cosine table
   nxi = initial x index used
   nxp = number of x indices used
   nxhd = second dimension of g >= nx/2+1
   nyd = first dimension of g >= ny
   nxhyd = maximum of (nx/2,ny)
   nxyhd = maximum of (nx,ny)/2
   nsize = amount of scratch complex memory used
   fourier coefficients are stored as follows:
   g[j][k] = real, imaginary part of mode j,k, where
   0 <= j < nx/2+1 and 0 <= k < ny
   written by viktor k. decyk, ucla
local data                                                            */
   int indx1, indx1y, nx, ny, nyh, nxy, nxhy, nxt;
   int nry, i, j, k, l, j1, j2, k1, k2, ns, ns2, km, kmr, koff, kk;
   int n, nn, in, nt, nh;
   float at1, at2;
   float2 t1, t2, t3;
/* The size of the shared memory array is as follows: */
/* float2 s[nsize];                                   */
   extern __shared__ float2 s[];
   indx1 = indx - 1;
   indx1y = indx1 > indy ? indx1 : indy;
   nx = 1L<<indx;
   ny = 1L<<indy;
   nyh = ny/2;
   nxy = nx > ny ? nx : ny;
   nxhy = 1L<<indx1y;
   nxt = nxi + nxp - 1;
/* calculate extent of shared memory usage: */
/* nn = size of shared memory in y          */
   nn = ny;
   in = 0;
   while (nn > nsize) {
      nn = nn/2;
      in += 1;
   }
/* nt = number of iterations in y           */
   nt = 1L<<in;
   in = indy - in;
   nh = nn/2;
/* bit-reverse array elements in y */
   nry = nxhy/ny;
/* for (j = nxi-1; j < nxt; j++) { */
   j = blockIdx.x + nxi - 1;
   if (j < nxt) {
      kk = nyd*j;
/*    for (k = 0; k < ny; k++) { */
      k = threadIdx.x;
      while (k < ny) {
         k1 = (mixup[k] - 1)/nry;
         if (k < k1) {
            t1 = g[k1+kk];
            g[k1+kk] = g[k+kk];
            g[k+kk] = t1;
         }
         k += blockDim.x;
      }
/* synchronize threads */
      __syncthreads();
   }
   nry = nxy/ny;
/* inverse fourier transform in y */
   if (isign < 0) {
/* copy data to local memory */
/*    for (i = nxi-1; i < nxt; i++) { */
      i = blockIdx.x + nxi - 1;
      if (i < nxt) {
         koff = nyd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = g[kk+nn*n+koff];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in y */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nyh/ns;
               kmr = km*nry;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
               ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               g[kk+nn*n+koff] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in y */
         ns = 1L<<in;
         for (l = in; l < indy; l++) {
            ns2 = ns + ns;
            km = nyh/ns;
            kmr = km*nry;
/*          for (kk = 0; kk < nyh; kk++) { */
            kk = threadIdx.x;
            while (kk < nyh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t2 = g[j2+koff];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               t2 = g[j1+koff];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               g[j2+koff] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               g[j1+koff] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
   }
/* forward fourier transform in y */
   if (isign > 0) {
/* copy data to local memory */
/*    for (i = nxi-1; i < nxt; i++) { */
      i = blockIdx.x + nxi - 1;
      if (i < nxt) {
         koff = nyd*i;
         for (n = 0; n < nt; n++) {
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               s[kk] = g[kk+nn*n+koff];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
/* transform using local data in y */
            ns = 1;
            for (l = 0; l < in; l++) {
               ns2 = ns + ns;
               km = nyh/ns;
               kmr = km*nry;
/*             for (kk = 0; kk < nh; kk++) { */
               kk = threadIdx.x;
               while (kk < nh) {
                  k = kk/ns;
                  j = kk - ns*k;
                  k1 = ns2*k;
                  k2 = k1 + ns;
                  j1 = j + k1;
                  j2 = j + k2;
                  t1 = sct[kmr*j];
                  t1.y = -t1.y;
                  t2 = s[j2];
                  at1 = t1.x*t2.x - t1.y*t2.y;
                  at2 = t1.x*t2.y + t1.y*t2.x;
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  t2 = s[j1];
                  t3.x = t2.x - at1;
                  t3.y = t2.y - at2;
                  s[j2] = t3;
                  t3.x = t2.x + at1;
                  t3.y = t2.y + at2;
                  s[j1] = t3;
                  kk += blockDim.x;
               }
                ns = ns2;
/* synchronize threads */
               __syncthreads();
            }
/* copy data to global memory */
/*          for (kk = 0; kk < nn; kk++) { */
            kk = threadIdx.x;
            while (kk < nn) {
               g[kk+nn*n+koff] = s[kk];
               kk += blockDim.x;
            }
/* synchronize threads */
            __syncthreads();
         }
/* transform using global data in y */
         ns = 1L<<in;
         for (l = in; l < indy; l++) {
            ns2 = ns + ns;
            km = nyh/ns;
            kmr = km*nry;
/*          for (kk = 0; kk < nyh; kk++) { */
            kk = threadIdx.x;
            while (kk < nyh) {
               k = kk/ns;
               j = kk - ns*k;
               k1 = ns2*k;
               k2 = k1 + ns;
               j1 = j + k1;
               j2 = j + k2;
               t1 = sct[kmr*j];
               t1.y = -t1.y;
               t2 = g[j2+koff];
               at1 = t1.x*t2.x - t1.y*t2.y;
               at2 = t1.x*t2.y + t1.y*t2.x;
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               t2 = g[j1+koff];
               t3.x = t2.x - at1;
               t3.y = t2.y - at2;
               g[j2+koff] = t3;
               t3.x = t2.x + at1;
               t3.y = t2.y + at2;
               g[j1+koff] = t3;
               kk += blockDim.x;
            }
            ns = ns2;
/* synchronize threads */
            __syncthreads();
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposes(float2 f[], float2 sm[], int nx, int kxp,
                             int kyps, int kstrt, int nvp, int kxyp,
                             int nxv, int kypd) {
/* extract data to send */
/* local data */
   int ks, j, k, n, nn, id, joff, ld;
   ks = kstrt - 1;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.y;
   if (n < nvp) {
      id = n - ks;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*ks;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not send local data */
      if (id != ks) {
         joff = kxp*id;
         ld = nx - joff;
         ld = 0 > ld ? 0 : ld;
         ld = kxp < ld ? kxp : ld;
/*       for (k = 0; k < kyps; k++) { */
         k = blockIdx.x;
         if (k < kyps) {
/*          for (j = 0; j < ld; j++) { */
            j = threadIdx.x;
            while (j < ld) {
               sm[j+ld*k+kxyp*n] = f[j+joff+nxv*k];
               j += blockDim.x;
            }
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposer(float2 g[], float2 tm[], int ny, int kyp,
                             int kxps, int kstrt, int nvp, int kxyp,
                             int nyv, int kxpd) {
/* transpose data received */
/* local data */
   int kt, mxv, j, k, n, nn, id, koff, ld, js, ks, jj, kk;
/* The size of the shared memory array is as follows: */
/* float2 s2[(mx + 1)*mx];                            */
   extern __shared__ float2 s2[];
   kt = kstrt - 1;
   mxv = blockDim.x + 1;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.z;
   if (n < nvp) {
      id = n - kt;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*kt;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not transpose local data */
      if (id != kt) {
         koff = kyp*id;
         ld = ny - koff;
         ld = 0 > ld ? 0 : ld;
         ld = kyp < ld ? kyp : ld;
         js = threadIdx.x;
         ks = threadIdx.y;
         jj = blockDim.x*blockIdx.x;
         kk = blockDim.y*blockIdx.y;
         j = js + jj;
         k = ks + kk;
         if ((j < kxps) && (k < ld)) {
            s2[js+mxv*ks] = tm[j+kxps*k+kxyp*n];
         }
/* synchronize threads */
         __syncthreads();
         j = ks + jj;
         k = js + kk;
         if ((j < kxps) && (k < ld)) {
            g[k+koff+nyv*j] = s2[ks+mxv*js];
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposesn(float2 fn[], float2 sm[], int nx, int kxp,
                              int kyps, int kstrt, int nvp, int ndim,
                              int kxyp, int nxv, int kypd) {
/* extract vector data to send */
/* local data */
   int ks, i, j, k, n, nn, id, joff, ld, nnxv, nkxyp;
   ks = kstrt - 1;
   nnxv = ndim*nxv;
   nkxyp = ndim*kxyp;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.y;
   if (n < nvp) {
      id = n - ks;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*ks;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not send local data */
      if (id != ks) {
         joff = kxp*id;
         ld = nx - joff;
         ld = 0 > ld ? 0 : ld;
         ld = kxp < ld ? kxp : ld;
/*       for (k = 0; k < kyps; k++) { */
         k = blockIdx.x;
         if (k < kyps) {
/*          for (j = 0; j < ld; j++) { */
            j = threadIdx.x;
            while (j < ld) {
               for (i = 0; i < ndim; i++) {
                  sm[j+ld*(i+ndim*k)+nkxyp*n] = fn[j+joff+nxv*i+nnxv*k];
               }
               j += blockDim.x;
            }
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppmtposern(float2 gn[], float2 tm[], int ny, int kyp,
                              int kxps, int kstrt, int nvp, int ndim,
                              int kxyp, int nyv, int kxpd) {
/* transpose vector data received */
/* local data */
   int kt, mxv, i, j, k, n, nn, id, koff, ld, js, ks, jj, kk;
   int nnyv, nkxyp;
/* The size of the shared memory array is as follows: */
/* float2 s2n[ndim*(mx + 1)*mx];                      */
   extern __shared__ float2 s2n[];
   kt = kstrt - 1;
   mxv = blockDim.x + 1;
   nnyv = ndim*nyv;
   nkxyp = ndim*kxyp;
/* for (n = 0; n < nvp; n++) { */
   n = blockIdx.z;
   if (n < nvp) {
      id = n - kt;
      if (id < 0)
         id += nvp;
/* find which node sends to itself */
      nn = 2*kt;
      if (nn >= nvp)
         nn -= nvp;
/* adjust counter */
      if (n > nn)
         n -= 1;
/* do not transpose local data */
      if (id != kt) {
         koff = kyp*id;
         ld = ny - koff;
         ld = 0 > ld ? 0 : ld;
         ld = kyp < ld ? kyp : ld;
         js = threadIdx.x;
         ks = threadIdx.y;
         jj = blockDim.x*blockIdx.x;
         kk = blockDim.y*blockIdx.y;
         j = js + jj;
         k = ks + kk;
         if ((j < kxps) && (k < ld)) {
            for (i = 0; i < ndim; i++) {
               s2n[js+mxv*(i+ndim*ks)] = tm[j+kxps*(i+ndim*k)+nkxyp*n];
            }
         }
/* synchronize threads */
         __syncthreads();
         j = ks + jj;
         k = js + kk;
         if ((j < kxps) && (k < ld)) {
            for (i = 0; i < ndim; i++) {
               gn[k+koff+nyv*i+nnyv*j] = s2n[ks+mxv*(i+ndim*js)];
            }
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppltpose(float2 f[], float2 g[], int nx, int ny,
                            int kxp, int kyp, int kstrt, int nxv,
                            int nyv) {
/* transpose local data */
/* local data */
   int mxv, j, k, ks, kxps, kyps, joff, koff, js, jj, kk;
/* The size of the shared memory array is as follows: */
/* float2 s2[(mx + 1)*mx];                            */
   extern __shared__ float2 s2[];
   mxv = blockDim.x + 1;
   ks = kstrt - 1;
   joff = kxp*ks;
   koff = kyp*ks;
   kxps = nx - joff;
   kxps = 0 > kxps ? 0 : kxps;
   kxps = kxp < kxps ? kxp : kxps;
   kyps = ny - koff;
   kyps = 0 > kyps ? 0 : kyps;
   kyps = kyp < kyps ? kyp : kyps;
   js = threadIdx.x;
   ks = threadIdx.y;
   jj = blockDim.x*blockIdx.x;
   kk = blockDim.y*blockIdx.y;
   j = js + jj;
   k = ks + kk;
   if ((j < kxps) && (k < kyps)) {
      s2[js+mxv*ks] = f[j+joff+nxv*k];
   }
/* synchronize threads */
   __syncthreads();
   j = ks + jj;
   k = js + kk;
   if ((j < kxps) && (k < kyps)) {
      g[k+koff+nyv*j] = s2[ks+mxv*js];
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpuppltposen(float2 fn[], float2 gn[], int nx, int ny,
                             int kxp, int kyp, int kstrt, int ndim,
                             int nxv, int nyv) {
/* transpose local vector data */
/* local data */
   int mxv, i, j, k, ks, kxps, kyps, joff, koff, js, jj, kk;
   int nnxv, nnyv;
/* The size of the shared memory array is as follows: */
/* float2 s2n[ndim*(mx + 1)*mx];                      */
   extern __shared__ float2 s2n[];
   mxv = blockDim.x + 1;
   ks = kstrt - 1;
   nnxv = ndim*nxv;
   nnyv = ndim*nyv;
   joff = kxp*ks;
   koff = kyp*ks;
   kxps = nx - joff;
   kxps = 0 > kxps ? 0 : kxps;
   kxps = kxp < kxps ? kxp : kxps;
   kyps = ny - koff;
   kyps = 0 > kyps ? 0 : kyps;
   kyps = kyp < kyps ? kyp : kyps;
   js = threadIdx.x;
   ks = threadIdx.y;
   jj = blockDim.x*blockIdx.x;
   kk = blockDim.y*blockIdx.y;
   j = js + jj;
   k = ks + kk;
   if ((j < kxps) && (k < kyps)) {
      for (i = 0; i < ndim; i++) {
         s2n[js+mxv*(i+ndim*ks)] = fn[j+joff+nxv*i+nnxv*k];
      }
   }
/* synchronize threads */
   __syncthreads();
   j = ks + jj;
   k = js + kk;
   if ((j < kxps) && (k < kyps)) {
      for (i = 0; i < ndim; i++) {
         gn[k+koff+nyv*i+nnyv*j] = s2n[ks+mxv*(i+ndim*js)];
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpusum1(float a[], float *sa, int nx) {
/* 1d serial sum reduction */
/* nx = length of data     */
/* sa = sum(a)             */
/* local data */
   int j, js, jb, mx, joff, mxm;
   float t;
/* The size of the shared memory array is as follows: */
/* ss[blockDim.x];                                    */
   extern __shared__ float ss[];
   mx = blockDim.x;
   js = threadIdx.x;
   jb = blockIdx.x;
   joff = mx*jb;
   j = js + joff;
/* copy global data to shared memory */
   if (j < nx) ss[js] = a[j];
/* synchronize to make sure each thread in block has the data */
   __syncthreads();
   if (js==0) {
      mxm = nx - joff;
      if (mxm > mx) mxm = mx;
/* perform serial local sum reduction: result in t */
      t = 0.0f;
      for (j = 0; j < mxm; j++) {
         t += ss[j];
      }
/* accumulate results to global memory for each block */
/* for devices with compute capability 2.x            */
      atomicAdd(&sa[0],t);
   }
   return;
}

/*--------------------------------------------------------------------*/
__global__ void gpusum2(float a[], float d[], int nx) {
/* segmented 1d sum reductions, each of length mx = blockDim.x */
/* nx = length of data                                         */
/* forall (j = 1:nbx); d(j) = sum(a(1+mx*(j-1):min(nx,mx*j)))  */
/* local data */
   int j, js, jb, mx, joff, mxm;
/* The size of the shared memory array is as follows: */
/* ss[blockDim.x];                                    */
   extern __shared__ float ss[];
   mx = blockDim.x;
   js = threadIdx.x;
   jb = blockIdx.x;
   joff = mx*jb;
   j = js + joff;
/* copy global data to shared memory */
   if (j < nx) ss[js] = a[j];
/* synchronize to make sure each thread in block has the data */
   __syncthreads();
   mxm = nx - joff;
   if (mxm > mx) mxm = mx;
/* perform parallel local sum reduction: result in ss[0] */
   lsum2(ss,mxm);
/* write out result to global memory for each block */
   if (js==0) d[jb] = ss[0];
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppgppush2l(float *ppart, float *fxy, int *kpic,
                               int noff, int nyp, float qbm, float dt,
                               float *ek, int nx, int ny, int mx,
                               int my, int idimp, int nppmx, int nxv,
                               int nypmx, int mx1, int mxyp1,
                               int ipbc) {
/* Push Interface for C */
   int n, m, ns;
   dim3 dimBlock(nblock_size);
   n = mxyp1;
   m = (n - 1)/maxgsx + 1;
   n = n < maxgsx ? n : maxgsx;
   dim3 dimGrid(n,m);
   ns = 2*(mx + 1)*(my + 1)*sizeof(float);
   n = nblock_size*sizeof(float);
   ns = ns > n ? ns : n;
   crc = hipGetLastError();
   gpuppgppush2l<<<dimGrid,dimBlock,ns>>>(ppart,fxy,kpic,noff,nyp,qbm,
                                          dt,ek,nx,ny,mx,my,idimp,nppmx,
                                          nxv,nypmx,mx1,mxyp1,ipbc);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppgppush2l error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpu2ppgppost2l(float *ppart, float *q, int *kpic,
                                int noff, float qm, int idimp,
                                int nppmx, int mx, int my, int nxv,
                                int nypmx, int mx1, int mxyp1) {
/* Deposit Interface for C */
   int n, m, ns;
   dim3 dimBlock(nblock_size);
   n = mxyp1;
   m = (n - 1)/maxgsx + 1;
   n = n < maxgsx ? n : maxgsx;
   dim3 dimGrid(n,m);
   ns = (mx + 1)*(my + 1)*sizeof(float);
   crc = hipGetLastError();
   gpu2ppgppost2l<<<dimGrid,dimBlock,ns>>>(ppart,q,kpic,noff,qm,idimp,
                                           nppmx,mx,my,nxv,nypmx,mx1,
                                           mxyp1);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpu2ppgppost2l error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2xl(float2 *qc, float2 *scs, float *q,
                                 int nyp, int nx, int nxe, int nypmx,
                                 int nxvh, int kypd) {
/* Guard Cell Interface for C */
   dim3 dimBlock(nblock_size);
   dim3 dimGrid(nyp);
   crc = hipGetLastError();
   gpuppcaguard2xl<<<dimGrid,dimBlock>>>(qc,scs,q,nyp,nx,nxe,nypmx,nxvh,
                                         kypd);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppcaguard2xl error=%d:%s\n",crc,
             hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2yl(float2 *qc, float2 *scr, int nx,
                                 int nxvh, int kypd) {
/* Guard Cell Interface for C */
   int nxh;
   nxh = nx/2;
   dim3 dimBlock(nblock_size);
   dim3 dimGrid((nxh - 1)/nblock_size+1);
   crc = hipGetLastError();
   gpuppcaguard2yl<<<dimGrid,dimBlock>>>(qc,scr,nx,nxvh,kypd);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppcaguard2yl error=%d:%s\n",crc,
             hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2xl(float2 *fxyc, float2 *scs, float *fxy,
                                 int nyp, int nx, int nxe, int nypmx,
                                 int nxvh, int kypd) {
/* Guard Cell Interface for C */
   dim3 dimBlock(nblock_size);
   dim3 dimGrid(nyp);
   crc = hipGetLastError();
   gpuppccguard2xl<<<dimGrid,dimBlock>>>(fxyc,scs,fxy,nyp,nx,nxe,nypmx,
                                         nxvh,kypd);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppccguard2xl error=%d:%s\n",crc,
             hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2yl(float *fxy, float2 *scr, int nyp,
                                 int nx, int nxe, int nxvh, int nypmx) {
/* Guard Cell Interface for C */
   int nxh;
   nxh = nx/2;
   dim3 dimBlock(nblock_size);
   dim3 dimGrid((nxh - 1)/nblock_size+1);
   crc = hipGetLastError();
   gpuppccguard2yl<<<dimGrid,dimBlock>>>(fxy,scr,nyp,nx,nxe,nxvh,nypmx);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppccguard2yl error=%d:%s\n",crc,
             hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2la(float *ppart, float *ppbuff, float *sbufl,
                              float *sbufr, int *kpic, int *ncl,
                              int *ihole, int *ncll, int *nclr,
                              int noff, int nyp, int idimp, int nppmx,
                              int nx, int ny, int mx, int my, int mx1,
                              int myp1, int npbmx, int ntmax, int nbmax,
                              int *irc) {
/* Sort Interface for C */
   int mxyp1, n, m, ns, nbl, ierr;
   static int *g_block = NULL;
   static int lg_block = 0;
   dim3 dimBlock(nblock_size);
   mxyp1 = mx1*myp1;
   m = (mxyp1 - 1)/maxgsx + 1;
   n = mxyp1 < maxgsx ? mxyp1 : maxgsx;
   dim3 dimGrid(n,m);
/* find which particles are leaving tile */
   ns = (nblock_size+9)*sizeof(int);
   crc = hipGetLastError();
   gpupppfnd2l<<<dimGrid,dimBlock,ns>>>(ppart,kpic,ncl,ihole,noff,nyp,
                                        idimp,nppmx,nx,ny,mx,my,mx1,
                                        myp1,ntmax,irc);
/* cudaThreadSynchronize(); */
   crc = hipGetLastError();
   if (crc) {
      printf("gpupppfnd2l error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
/* buffer particles that are leaving tile and sum ncl */
   ns = 9*sizeof(int);
   crc = hipGetLastError();
   gpupppmov2l<<<dimGrid,dimBlock,ns>>>(ppart,ppbuff,ncl,ihole,idimp,
                                        nppmx,mx1,myp1,npbmx,ntmax,irc);
/* cudaThreadSynchronize(); */
   crc = hipGetLastError();
   if (crc) {
      printf("gpupppmov2l error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
/* find address offsets */
   nbl = (mx1 - 1)/nblock_size + 1;
   dim3 dimGrids(nbl);
/* allocate scratch memory needed by prefix scan */
   ierr = 0;
   if (lg_block < nbl) {
      if (lg_block > 0) 
         gpu_deallocate((void *)g_block,&ierr);
      lg_block = 0;
      gpu_iallocate(&g_block,2*nbl,&ierr);
      if (ierr != 0) {
         printf("GPU g_block allocate error!\n");
         exit(1);
      }
      lg_block = nbl;
   }
   ns = 2*nblock_size*sizeof(int);
   crc = hipGetLastError();
   nciscan2<<<dimGrids,dimBlock,ns>>>(ncl,ncll,nclr,g_block,mx1,myp1);
/* cudaThreadSynchronize(); */
   crc = hipGetLastError();
   if (crc) {
      printf("nciscan2 error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
/* copy particles and offsets leaving processor */
/* gpupppbuf2l and nciscan2 should use the same blocksize */
   dim3 dimGridg(mx1);
   crc = hipGetLastError();
   gpupppbuf2l<<<dimGridg,dimBlock>>>(ppbuff,sbufl,sbufr,ncl,ncll,nclr,
                                      g_block,idimp,mx1,myp1,npbmx,
                                      nbmax,irc);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpupppbuf2l error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2lb(float *ppart, float *ppbuff, float *rbufl,
                              float *rbufr, int *kpic, int *ncl,
                              int *ihole, int *mcll, int *mclr,
                              int idimp, int nppmx, int mx1, int myp1,
                              int npbmx, int ntmax, int nbmax,
                              int *irc) {
/* Sort Interface for C */
   int mxyp1, n, m, ns;
   dim3 dimBlock(nblock_size);
   mxyp1 = mx1*myp1;
   m = (mxyp1 - 1)/maxgsx + 1;
   n = mxyp1 < maxgsx ? mxyp1 : maxgsx;
   dim3 dimGrid(n,m);
/* copy incoming particles from ppbuff, rbufl, and rbufr into ppart */
/* and update kpic */
   ns = (nblock_size+18)*sizeof(int);
   crc = hipGetLastError();
   gpupppord2l<<<dimGrid,dimBlock,ns>>>(ppart,ppbuff,rbufl,rbufr,kpic,
                                        ncl,ihole,mcll,mclr,idimp,nppmx,
                                        mx1,myp1,npbmx,ntmax,nbmax,irc);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpupppord2l error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C"  void cgpuppois22t(float2 *qt, float2 *fxyt, float2 *ffct,
                              float *we, int nx, int ny, int kstrt,
                              int nyv, int kxp1, int nyhd) {
/* Poisson Solver Interface for C */
   int nxh1, ks, kxpp, ns;
   dim3 dimBlock(nblock_size);
   nxh1 = nx/2 + 1;
   ks = kstrt - 1;
   kxpp = nxh1 - kxp1*ks;
   kxpp = 0 > kxpp ? 0 : kxpp;
   kxpp = kxp1 < kxpp ? kxp1 : kxpp;
   if (kxpp <= 0)
      return;
   dim3 dimGrid(kxpp);
   ns = nblock_size*sizeof(float);
   crc = hipGetLastError();
   gpuppois22t<<<dimGrid,dimBlock,ns>>>(qt,fxyt,ffct,we,nx,ny,kstrt,nyv,
                                        kxp1,nyhd);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppois22t error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsx(float2 *f, float2 *bsm, int isign,
                                int *mixup, float2 *sct, int indx,
                                int indy, int kstrt, int nvp, int kxp1,
                                int kyp, int nxhd, int kypd, int nxhyd,
                                int nxyhd) {
/* wrapper function for parallel real to complex fft in x, */
/* without packed data                                     */
/* nxhd must be >= nx/2 + 1                                */
/* local data */
   int nxh, nxh1, ny, ks, kypp, kxyp, nsize, ns;
   static int kypi = 1, mx = 16;
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kypp = ny - kyp*ks;
   kypp = 0 > kypp ? 0 : kypp;
   kypp = kyp < kypp ? kyp : kypp;
   if (kypp <= 0)
      return;
   kxyp = kxp1*kyp;
   dim3 dimGridy(kypp);
   dim3 dimGrids(kypp,nvp);
   dim3 dimGridty((kyp-1)/mx+1,(kxp1-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
/* perform x fft */
      if (kstrt <= ny) {
         crc = hipGetLastError();
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(f,isign,mixup,sct,indx,
                                               indy,kypi,kypp,nxhd,kypd,
                                               nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = hipGetLastError();
      gpuppmtposes<<<dimGrids,dimBlock>>>(f,bsm,nxh1,kxp1,kypp,kstrt,
                                          nvp,kxyp,nxhd,kypd);
      hipDeviceSynchronize();
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposes error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
      ns = (mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = hipGetLastError();
      gpuppmtposer<<<dimGridty,dimBlockt,ns>>>(f,bsm,nxh1,kxp1,kypp,
                                               kstrt,nvp,kxyp,nxhd,
                                               kypd);
/*    cudaThreadSynchronize(); */
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposer error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
/* perform x fft */
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= ny) {
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(f,isign,mixup,sct,indx,
                                               indy,kypi,kypp,nxhd,kypd,
                                               nxhyd,nxyhd,nsize);
         hipDeviceSynchronize();
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsy(float2 *g, float2 *brm, int isign,
                                int *mixup, float2 *sct, int indx,
                                int indy, int kstrt, int nvp, int kxp1,
                                int kyp, int nyd, int nxhyd,
                                int nxyhd) {
/* wrapper function for parallel real to complex fft in y, */
/* without packed data                                     */
/* nyd must be >= ny                                       */
/* local data */
   int nxh, nxh1, ny, ks, kxpp, kxyp, nsize, ns;
   static int kxpi = 1, mx = 16;
/* double dtime; */
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kxpp = nxh1 - kxp1*ks;
   kxpp = 0 > kxpp ? 0 : kxpp;
   kxpp = kxp1 < kxpp ? kxp1 : kxpp;
   if (kxpp <= 0)
      return;
   kxyp = kxp1*kyp;
   dim3 dimGridx(kxpp);
   dim3 dimGrids(kxpp,nvp);
   dim3 dimGridtx((kxp1-1)/mx+1,(kyp-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      ns = (mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = hipGetLastError();
      gpuppmtposer<<<dimGridtx,dimBlockt,ns>>>(g,brm,ny,kyp,kxpp,kstrt,
                                               nvp,kxyp,nyd,kxp1);
/*    cudaThreadSynchronize(); */
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposer error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
/* perform y fft */
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= nxh1) {
         crc = hipGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(g,isign,mixup,sct,indx,
                                               indy,kxpi,kxpp,kxp1,nyd,
                                               nxhyd,nxyhd,nsize);
         hipDeviceSynchronize();
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
/* perform y fft */
      if (kstrt <= nxh1) {
         crc = hipGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(g,isign,mixup,sct,indx,
                                               indy,kxpi,kxpp,kxp1,nyd,
                                               nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = hipGetLastError();
      gpuppmtposes<<<dimGrids,dimBlock>>>(g,brm,ny,kyp,kxpp,kstrt,
                                          nvp,kxyp,nyd,kxp1);
      hipDeviceSynchronize();
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposes error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }


   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsxn(float2 *fn, float2 *bsm, int isign,
                                 int *mixup, float2 *sct, int indx,
                                 int indy, int ndim, int kstrt, int nvp,
                                 int kxp1, int kyp, int nxhd, int kypd,
                                 int nxhyd, int nxyhd) {
/* wrapper function for multiple parallel real to complex ffts in x, */
/* without packed data                                               */
/* ndim = vector dimension                                           */
/* nxhd must be >= nx/2 + 1                                          */
/* local data */
   int nxh, nxh1, ny, ks, kypp, kxyp, nkypd, nkypp, nsize, ns;
   static int kypi = 1, mx = 16;
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kypp = ny - kyp*ks;
   kypp = 0 > kypp ? 0 : kypp;
   kypp = kyp < kypp ? kyp : kypp;
   if (kypp <= 0)
      return;
   kxyp = kxp1*kyp;
   nkypd = ndim*kypd;
   nkypp = ndim*kypp;
   dim3 dimGridy(nkypp);
   dim3 dimGrids(kypp,nvp);
   dim3 dimGridty((kyp-1)/mx+1,(kxp1-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
/* perform x fft */
      if (kstrt <= ny) {
         crc = hipGetLastError();
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(fn,isign,mixup,sct,indx,
                                               indy,kypi,nkypp,nxhd,
                                               nkypd,nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = hipGetLastError();
      gpuppmtposesn<<<dimGrids,dimBlock>>>(fn,bsm,nxh1,kxp1,kypp,kstrt,
                                           nvp,ndim,kxyp,nxhd,kypd);
      hipDeviceSynchronize();
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposesn error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
      ns = ndim*(mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = hipGetLastError();
      gpuppmtposern<<<dimGridty,dimBlockt,ns>>>(fn,bsm,nxh1,kxp1,kypp,
                                                kstrt,nvp,ndim,kxyp,
                                                nxhd,kypd);
/*    cudaThreadSynchronize(); */
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposern error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
/* perform x fft */
      nsize = nxh < 1024 ? nxh : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= ny) {
         crc = hipGetLastError();
         gpufft2rcxs<<<dimGridy,dimBlock,ns>>>(fn,isign,mixup,sct,indx,
                                               indy,kypi,nkypp,nxhd,
                                               nkypd,nxhyd,nxyhd,nsize);
         hipDeviceSynchronize();
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcxs error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsyn(float2 *gn, float2 *brm, int isign,
                                 int *mixup, float2 *sct, int indx,
                                 int indy, int ndim, int kstrt, int nvp,
                                 int kxp1, int kyp, int nyd, int nxhyd,
                                 int nxyhd) {
/* wrapper function for multiple parallel real to complex ffts in y, */
/* without packed data                                               */
/* ndim = vector dimension                                           */
/* nyd must be >= ny                                                 */
/* local data */
   int nxh, nxh1, ny, ks, kxpp, kxyp, nkxp1, nkxpp, nsize, ns;
   static int kxpi = 1, mx = 16;
/* double dtime; */
   dim3 dimBlock(nblock_size);
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   nxh = 1L<<(indx - 1);
   nxh1 = nxh + 1;
   ny = 1L<<indy;
   ks = kstrt - 1;
   kxpp = nxh1 - kxp1*ks;
   kxpp = 0 > kxpp ? 0 : kxpp;
   kxpp = kxp1 < kxpp ? kxp1 : kxpp;
   if (kxpp <= 0)
      return;
   kxyp = kxp1*kyp;
   nkxp1 = ndim*kxp1;
   nkxpp = ndim*kxpp;
   dim3 dimGridx(nkxpp);
   dim3 dimGrids(kxpp,nvp);
   dim3 dimGridtx((kxp1-1)/mx+1,(kyp-1)/mx+1,nvp);
/* inverse fourier transform */
   if (isign < 0) {
      ns = ndim*(mx+1)*mx*sizeof(float2);
/* transpose data received */
      crc = hipGetLastError();
      gpuppmtposern<<<dimGridtx,dimBlockt,ns>>>(gn,brm,ny,kyp,kxpp,
                                                kstrt,nvp,ndim,kxyp,nyd,
                                                kxp1);
/*    cudaThreadSynchronize(); */
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposern error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
/* perform y fft */
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= nxh1) {
         crc = hipGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(gn,isign,mixup,sct,indx,
                                               indy,kxpi,nkxpp,nkxp1,
                                               nyd,nxhyd,nxyhd,nsize);
         hipDeviceSynchronize();
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
   }
/* forward fourier transform */
   else if (isign > 0) {
/* perform y fft */
      nsize = ny < 1024 ? ny : 1024;
      ns = nsize*sizeof(float2);
      if (kstrt <= nxh1) {
         crc = hipGetLastError();
         gpufft2rcys<<<dimGridx,dimBlock,ns>>>(gn,isign,mixup,sct,indx,
                                               indy,kxpi,nkxpp,nkxp1,
                                               nyd,nxhyd,nxyhd,nsize);
/*       cudaThreadSynchronize(); */
         crc = hipGetLastError();
         if (crc) {
            printf("gpufft2rcys error=%d:%s\n",
                   crc,hipGetErrorString(crc));
            exit(1);
         }
      }
/* extract data to send */
      crc = hipGetLastError();
      gpuppmtposesn<<<dimGrids,dimBlock>>>(gn,brm,ny,kyp,kxpp,kstrt,
                                           nvp,ndim,kxyp,nyd,kxp1);
      hipDeviceSynchronize();
      crc = hipGetLastError();
      if (crc) {
         printf("gpuppmtposesn error=%d:%s\n",crc,
                hipGetErrorString(crc));
         exit(1);
      }
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltpose(float2 *f, float2 *g, int nx, int ny,
                             int kxp, int kyp, int kstrt, int nxv,
                             int nyv) {
/* local complex transpose using blocking algorithm with gaps */
/* input = f, output = g                                      */
/* local data */
   int ns;
   static int mx = 16;
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   dim3 dimGridtx((kxp-1)/mx+1,(kyp-1)/mx+1);
   ns = (mx+1)*mx*sizeof(float2);
/* local transpose f to g */
   crc = hipGetLastError();
   gpuppltpose<<<dimGridtx,dimBlockt,ns>>>(f,g,nx,ny,kxp,kyp,kstrt,nxv,
                                           nyv);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppltpose error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltposen(float2 *fn, float2 *gn, int nx, int ny,
                              int kxp, int kyp, int kstrt, int ndim,
                              int nxv, int nyv) {
/* local complex vector transpose */
/* input = fn, output = gn        */
/* local data */
   int ns;
   static int mx = 16;
   dim3 dimBlockt(mx,mx);
/* calculate range of indices */
   dim3 dimGridtx((kxp-1)/mx+1,(kyp-1)/mx+1);
   ns = ndim*(mx+1)*mx*sizeof(float2);
/* local transpose f to g */
   crc = hipGetLastError();
   gpuppltposen<<<dimGridtx,dimBlockt,ns>>>(fn,gn,nx,ny,kxp,kyp,kstrt,
                                            ndim,nxv,nyv);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpuppltposen error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpusum2(float *a, float *sa, int nx) {
/* segmented 1d parallel sum reduction of input array a, of length nx */
/* first reduce individual blocks in parallel, writing result to scr  */
/* then reduce scr serially, result is written to sa                  */
/* local data */
   int nbx, nbs, ns;
   void *gptr;
   static int len = 0;
   static float *scr = NULL;
   nbx = (nx - 1)/nblock_size + 1;
   dim3 dimBlock(nblock_size);
   dim3 dimGrid(nbx);
   nbs = (nbx - 1)/nblock_size + 1;
   dim3 dimGrid1(nbs);
/* create scratch array */
   if (len < nbx) {
      if (len > 0)
         crc = hipFree((void *)scr);
      crc = hipMalloc(&gptr,sizeof(float)*nbx);
      if (crc) {
         printf("hipMalloc cgpusum2 float Error=%d:%s,l=%d\n",crc,
                 hipGetErrorString(crc),nbx);
         exit(1);
      }
      scr = (float *)gptr;
      len = nbx;
   }
/* reduce individual blocks in parallel */
   ns = nblock_size*sizeof(float);
   crc = hipGetLastError();
   gpusum2<<<dimGrid,dimBlock,ns>>>(a,scr,nx);
/* cudaThreadSynchronize(); */
   crc = hipGetLastError();
   if (crc) {
      printf("gpusum2 error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
/* 1d serial reduction */
   crc = hipGetLastError();
   gpusum1<<<dimGrid1,dimBlock,ns>>>(scr,sa,nbx);
   hipDeviceSynchronize();
   crc = hipGetLastError();
   if (crc) {
      printf("gpusum1 error=%d:%s\n",crc,hipGetErrorString(crc));
      exit(1);
   }
   return;
}

/* Interfaces to Fortran */

/*--------------------------------------------------------------------*/
extern "C" void cgpuppgppush2l_(unsigned long *gp_ppart,
                                unsigned long *gp_fxy,
                                unsigned long *gp_kpic,
                                int *noff, int *nyp, float *qbm,
                                float *dt, unsigned long *gp_ek,
                                int *nx, int *ny, int *mx, int *my,
                                int *idimp, int *nppmx, int *nxv,
                                int *nypmx, int *mx1, int *mxyp1,
                                int *ipbc) {
   float *ppart, *fxy, *ek;
   int *kpic;
   ppart = (float *)*gp_ppart;
   fxy = (float *)*gp_fxy;
   kpic = (int *)*gp_kpic;
   ek = (float *)*gp_ek;
   cgpuppgppush2l(ppart,fxy,kpic,*noff,*nyp,*qbm,*dt,ek,*nx,*ny,*mx,*my,
                  *idimp,*nppmx,*nxv,*nypmx,*mx1,*mxyp1,*ipbc);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpu2ppgppost2l_(unsigned long *gp_ppart,
                                 unsigned long *gp_q,
                                 unsigned long *gp_kpic,
                                 int *noff, float *qm, int *idimp,
                                 int *nppmx, int *mx, int *my, int *nxv,
                                 int *nypmx, int *mx1, int *mxyp1) {
   float *ppart, *q;
   int *kpic;
   ppart = (float *)*gp_ppart;
   q = (float *)*gp_q;
   kpic = (int *)*gp_kpic;
   cgpu2ppgppost2l(ppart,q,kpic,*noff,*qm,*idimp,*nppmx,*mx,*my,*nxv,
                   *nypmx,*mx1,*mxyp1);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2xl_(unsigned long *gp_qc,
                                  unsigned long *gp_scs,
                                  unsigned long *gp_q, int *nyp,
                                  int *nx, int *nxe, int *nypmx,
                                  int *nxvh, int *kypd) {
   float2 *qc, *scs;
   float *q;
   qc = (float2 *)*gp_qc;
   scs = (float2 *)*gp_scs;
   q = (float *)*gp_q;
   cgpuppcaguard2xl(qc,scs,q,*nyp,*nx,*nxe,*nypmx,*nxvh,*kypd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppcaguard2yl_(unsigned long *gp_fc,
                                 unsigned long *gp_scr, int *nx,
                                 int *nxvh, int *kypd) {
   float2 *fc, *scr;
   fc = (float2 *)*gp_fc;
   scr = (float2 *)*gp_scr;
   cgpuppcaguard2yl(fc,scr,*nx,*nxvh,*kypd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2xl_(unsigned long *gp_fxyc,
                                  unsigned long *gp_scs,
                                  unsigned long *gp_fxy, int *nyp,
                                  int *nx, int *nxe, int *nypmx,
                                  int *nxvh, int *kypd) {
   float2 *fxyc, *scs;
   float *fxy;
   fxyc = (float2 *)*gp_fxyc;
   scs = (float2 *)*gp_scs;
   fxy = (float *)*gp_fxy;
   cgpuppccguard2xl(fxyc,scs,fxy,*nyp,*nx,*nxe,*nypmx,*nxvh,*kypd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppccguard2yl_(unsigned long *gp_fxy,
                                  unsigned long *gp_scr, int *nyp,
                                  int *nx, int *nxe, int *nxvh,
                                  int *nypmx) {
   float *fxy;
   float2 *scr;
   fxy = (float *)*gp_fxy;
   scr = (float2 *)*gp_scr;
   cgpuppccguard2yl(fxy,scr,*nyp,*nx,*nxe,*nxvh,*nypmx);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2la_(unsigned long *gp_ppart,
                               unsigned long *gp_ppbuff,
                               unsigned long *gp_sbufl,
                               unsigned long *gp_sbufr,
                               unsigned long *gp_kpic,
                               unsigned long *gp_ncl,
                               unsigned long *gp_ihole,
                               unsigned long *gp_ncll,
                               unsigned long *gp_nclr,
                               int *noff, int *nyp, int *idimp,
                               int *nppmx, int *nx, int *ny, int *mx,
                               int *my, int *mx1, int *myp1, int *npbmx,
                               int *ntmax, int *nbmax,
                               unsigned long *gp_irc) {
   float *ppart, *ppbuff, *sbufl, *sbufr;
   int *kpic, *ncl, *ihole, *ncll, *nclr, *irc;
   ppart = (float *)*gp_ppart;
   ppbuff = (float *)*gp_ppbuff;
   sbufl = (float *)*gp_sbufl;
   sbufr = (float *)*gp_sbufr;
   kpic = (int *)*gp_kpic;
   ncl = (int *)*gp_ncl;
   ihole = (int *)*gp_ihole;
   ncll = (int *)*gp_ncll;
   nclr = (int *)*gp_nclr;
   irc = (int *)*gp_irc;
   cgpupppord2la(ppart,ppbuff,sbufl,sbufr,kpic,ncl,ihole,ncll,nclr,
                 *noff,*nyp,*idimp,*nppmx,*nx,*ny,*mx,*my,*mx1,*myp1,
                 *npbmx,*ntmax,*nbmax,irc);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpupppord2lb_(unsigned long *gp_ppart,
                               unsigned long *gp_ppbuff,
                               unsigned long *gp_rbufl,
                               unsigned long *gp_rbufr,
                               unsigned long *gp_kpic,
                               unsigned long *gp_ncl,
                               unsigned long *gp_ihole,
                               unsigned long *gp_mcll,
                               unsigned long *gp_mclr,
                               int *idimp, int *nppmx, int *mx1,
                               int *myp1, int *npbmx, int *ntmax,
                               int *nbmax, unsigned long *gp_irc) {
   float *ppart, *ppbuff, *rbufl, *rbufr;
   int *kpic, *ncl, *ihole, *mcll, *mclr, *irc;
   ppart = (float *)*gp_ppart;
   ppbuff = (float *)*gp_ppbuff;
   rbufl = (float *)*gp_rbufl;
   rbufr = (float *)*gp_rbufr;
   kpic = (int *)*gp_kpic;
   ncl = (int *)*gp_ncl;
   ihole = (int *)*gp_ihole;
   mcll = (int *)*gp_mcll;
   mclr = (int *)*gp_mclr;
   irc = (int *)*gp_irc;
   cgpupppord2lb(ppart,ppbuff,rbufl,rbufr,kpic,ncl,ihole,mcll,mclr,
                 *idimp,*nppmx,*mx1,*myp1,*npbmx,*ntmax,*nbmax,irc);
   return;
}

/*--------------------------------------------------------------------*/
extern "C"  void cgpuppois22t_(unsigned long *gp_qt, 
                               unsigned long *gp_fxyt,
                               unsigned long *gp_ffct,
                               unsigned long *gp_we, int *nx, int *ny,
                               int *kstrt, int *nyv, int *kxp1,
                               int *nyhd) {
   float2 *qt, *fxyt, *ffct;
   float *we;
   qt = (float2 *)*gp_qt;
   fxyt = (float2 *)*gp_fxyt;
   ffct = (float2 *)*gp_ffct;
   we = (float *)*gp_we;
   cgpuppois22t(qt,fxyt,ffct,we,*nx,*ny,*kstrt,*nyv,*kxp1,*nyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsx_(unsigned long *gp_f,
                                 unsigned long *gp_bsm, int *isign,
                                 unsigned long *gp_mixup,
                                 unsigned long *gp_sct, int *indx,
                                 int *indy, int *kstrt, int *nvp,
                                 int *kxp1, int *kyp, int *nxhd,
                                 int *kypd, int *nxhyd, int *nxyhd) {
   float2 *f, *bsm, *sct;
   int *mixup;
   f = (float2 *)*gp_f;
   bsm = (float2 *)*gp_bsm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsx(f,bsm,*isign,mixup,sct,*indx,*indy,*kstrt,*nvp,*kxp1,
                   *kyp,*nxhd,*kypd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsy_(unsigned long *gp_g,
                                 unsigned long *gp_brm, int *isign,
                                 unsigned long *gp_mixup,
                                 unsigned long *gp_sct, int *indx,
                                 int *indy, int *kstrt, int *nvp,
                                 int *kxp1, int *kyp, int *nyd,
                                 int *nxhyd, int *nxyhd) {
   float2 *g, *brm, *sct;
   int *mixup;
   g = (float2 *)*gp_g;
   brm = (float2 *)*gp_brm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsy(g,brm,*isign,mixup,sct,*indx,*indy,*kstrt,*nvp,*kxp1,
                   *kyp,*nyd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsxn_(unsigned long *gp_fn,
                                  unsigned long *gp_bsm, int *isign,
                                  unsigned long *gp_mixup,
                                  unsigned long *gp_sct, int *indx,
                                  int *indy, int *ndim, int *kstrt,
                                  int *nvp, int *kxp1, int *kyp,
                                  int *nxhd, int *kypd, int *nxhyd,
                                  int *nxyhd) {
   float2 *fn, *bsm, *sct;
   int *mixup;
   fn = (float2 *)*gp_fn;
   bsm = (float2 *)*gp_bsm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsxn(fn,bsm,*isign,mixup,sct,*indx,*indy,*ndim,*kstrt,
                    *nvp,*kxp1,*kyp,*nxhd,*kypd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuwppfft2rcsyn_(unsigned long *gp_gn,
                                  unsigned long *gp_brm, int *isign,
                                  unsigned long *gp_mixup,
                                  unsigned long *gp_sct, int *indx,
                                  int *indy, int *ndim, int *kstrt,
                                  int *nvp, int *kxp1, int *kyp,
                                  int *nyd, int *nxhyd, int *nxyhd) {
   float2 *gn, *brm, *sct;
   int *mixup;
   gn = (float2 *)*gp_gn;
   brm = (float2 *)*gp_brm;
   mixup = (int *)*gp_mixup;
   sct = (float2 *)*gp_sct;
   cgpuwppfft2rcsyn(gn,brm,*isign,mixup,sct,*indx,*indy,*ndim,*kstrt,
                    *nvp,*kxp1,*kyp,*nyd,*nxhyd,*nxyhd);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltpose_(unsigned long *gp_f, unsigned long *gp_g,
                              int *nx, int *ny, int *kxp, int *kyp,
                              int *kstrt, int *nxv, int *nyv) {
   float2 *f, *g;
   f = (float2 *)*gp_f;
   g = (float2 *)*gp_g;
   cgpuppltpose(f,g,*nx,*ny,*kxp,*kyp,*kstrt,*nxv,*nyv);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpuppltposen_(unsigned long *gp_fn,
                               unsigned long *gp_gn, int *nx, int *ny,
                               int *kxp, int *kyp, int *kstrt, int *ndim,
                               int *nxv, int *nyv) {
   float2 *fn, *gn;
   fn = (float2 *)*gp_fn;
   gn = (float2 *)*gp_gn;
   cgpuppltposen(fn,gn,*nx,*ny,*kxp,*kyp,*kstrt,*ndim,*nxv,*nyv);
   return;
}

/*--------------------------------------------------------------------*/
extern "C" void cgpusum2_(unsigned long *gp_a, unsigned long *gp_sa,
                          int *nx) {
   float *a, *sa;
   a = (float *)*gp_a;
   sa = (float *)*gp_sa;
   cgpusum2(a,sa,*nx);
   return;
}

	.text
	.file	"gpuppush2.hip"
	.globl	_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii # -- Begin function _Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.type	_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii,@function
_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii: # @_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$256, %rsp                      # imm = 0x100
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	8(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	4(%rsp), %r8
	movss	%xmm0, (%r8)
	movq	%rsp, %r10
	movss	%xmm1, (%r10)
	leaq	32(%rsp), %r11
	movq	%r9, (%r11)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r10, 48(%rbx)
	movq	%r11, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 136(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 144(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$272, %rsp                      # imm = 0x110
	.cfi_adjust_cfa_offset -272
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, .Lfunc_end0-_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii # -- Begin function _Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii
	.type	_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii,@function
_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii: # @_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	12(%rsp), %r10
	movl	%r8d, (%r10)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r10, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14gpu2ppgppost2lPfS_Piifiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii, .Lfunc_end1-_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii # -- Begin function _Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.type	_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii,@function
_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii: # @_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, .Lfunc_end2-_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii # -- Begin function _Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.type	_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii,@function
_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii: # @_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii, .Lfunc_end3-_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii # -- Begin function _Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.type	_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii,@function
_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii: # @_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, .Lfunc_end4-_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii # -- Begin function _Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.type	_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii,@function
_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii: # @_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii, .Lfunc_end5-_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_ # -- Begin function _Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.type	_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_,@function
_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_: # @_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$224, %rsp
	.cfi_def_cfa_offset 272
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$240, %rsp
	.cfi_adjust_cfa_offset -240
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, .Lfunc_end6-_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_ # -- Begin function _Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_
	.type	_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_,@function
_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_: # @_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_, .Lfunc_end7-_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__nciscan2PiS_S_S_ii # -- Begin function _Z23__device_stub__nciscan2PiS_S_S_ii
	.type	_Z23__device_stub__nciscan2PiS_S_S_ii,@function
_Z23__device_stub__nciscan2PiS_S_S_ii:  # @_Z23__device_stub__nciscan2PiS_S_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8nciscan2PiS_S_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z23__device_stub__nciscan2PiS_S_S_ii, .Lfunc_end8-_Z23__device_stub__nciscan2PiS_S_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_ # -- Begin function _Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.type	_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_,@function
_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_: # @_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, .Lfunc_end9-_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_ # -- Begin function _Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.type	_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_,@function
_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_: # @_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	344(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, .Lfunc_end10-_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii # -- Begin function _Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.type	_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii,@function
_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii: # @_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii, .Lfunc_end11-_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii # -- Begin function _Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.type	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii,@function
_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii: # @_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, .Lfunc_end12-_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii # -- Begin function _Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.type	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii,@function
_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii: # @_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, .Lfunc_end13-_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii # -- Begin function _Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.type	_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii,@function
_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii: # @_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii, .Lfunc_end14-_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii # -- Begin function _Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.type	_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii,@function
_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii: # @_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii, .Lfunc_end15-_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii # -- Begin function _Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.type	_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii,@function
_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii: # @_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii, .Lfunc_end16-_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii # -- Begin function _Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.type	_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii,@function
_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii: # @_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii, .Lfunc_end17-_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii # -- Begin function _Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.type	_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii,@function
_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii: # @_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii, .Lfunc_end18-_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii # -- Begin function _Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.type	_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii,@function
_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii: # @_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii, .Lfunc_end19-_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__gpusum1PfS_i # -- Begin function _Z22__device_stub__gpusum1PfS_i
	.type	_Z22__device_stub__gpusum1PfS_i,@function
_Z22__device_stub__gpusum1PfS_i:        # @_Z22__device_stub__gpusum1PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7gpusum1PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z22__device_stub__gpusum1PfS_i, .Lfunc_end20-_Z22__device_stub__gpusum1PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__gpusum2PfS_i # -- Begin function _Z22__device_stub__gpusum2PfS_i
	.type	_Z22__device_stub__gpusum2PfS_i,@function
_Z22__device_stub__gpusum2PfS_i:        # @_Z22__device_stub__gpusum2PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7gpusum2PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z22__device_stub__gpusum2PfS_i, .Lfunc_end21-_Z22__device_stub__gpusum2PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppgppush2l                  # -- Begin function cgpuppgppush2l
	.type	cgpuppgppush2l,@function
cgpuppgppush2l:                         # @cgpuppgppush2l
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movss	%xmm1, 20(%rsp)                 # 4-byte Spill
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
	movl	%r8d, 12(%rsp)                  # 4-byte Spill
	movl	%ecx, 8(%rsp)                   # 4-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	168(%rsp), %r14d
	movl	120(%rsp), %r8d
	movl	112(%rsp), %edi
	movl	nblock_size(%rip), %ebx
	leal	(,%rbx,4), %ecx
	btsq	$32, %rbx
	leal	-1(%r14), %eax
	movl	maxgsx(%rip), %esi
	cltd
	idivl	%esi
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %ebp
	cmpl	%r14d, %esi
	cmovgel	%r14d, %esi
	shlq	$32, %rbp
	orq	%rsi, %rbp
	leal	2(,%rdi,2), %eax
	leal	4(,%r8,4), %r15d
	imull	%eax, %r15d
	cmpl	%ecx, %r15d
	cmovlel	%ecx, %r15d
	callq	hipGetLastError
	movslq	%r15d, %r8
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_2
# %bb.1:
	movl	176(%rsp), %ebx
	movl	160(%rsp), %r15d
	movl	152(%rsp), %ebp
	movl	144(%rsp), %eax
	movl	136(%rsp), %r10d
	movl	128(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	16(%rsp), %ecx                  # 4-byte Reload
	movl	20(%rsp), %r8d                  # 4-byte Reload
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	28(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movq	40(%rsp), %r9                   # 8-byte Reload
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
.LBB22_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB22_4
# %bb.3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB22_4:
	.cfi_def_cfa_offset 96
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end22:
	.size	cgpuppgppush2l, .Lfunc_end22-cgpuppgppush2l
	.cfi_endproc
                                        # -- End function
	.globl	cgpu2ppgppost2l                 # -- Begin function cgpu2ppgppost2l
	.type	cgpu2ppgppost2l,@function
cgpu2ppgppost2l:                        # @cgpu2ppgppost2l
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	%r8d, 8(%rsp)                   # 4-byte Spill
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movl	%ecx, (%rsp)                    # 4-byte Spill
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	120(%rsp), %r14d
	movl	88(%rsp), %edi
	movl	80(%rsp), %esi
	movl	nblock_size(%rip), %ebx
	btsq	$32, %rbx
	leal	-1(%r14), %eax
	movl	maxgsx(%rip), %ecx
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %ebp
	cmpl	%r14d, %ecx
	cmovgel	%r14d, %ecx
	shlq	$32, %rbp
	orq	%rcx, %rbp
	leal	1(%rdi), %eax
	leal	4(,%rsi,4), %r15d
	imull	%eax, %r15d
	callq	hipGetLastError
	movslq	%r15d, %r8
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_2
# %bb.1:
	movl	112(%rsp), %eax
	movl	104(%rsp), %r10d
	movl	96(%rsp), %r11d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	(%rsp), %ecx                    # 4-byte Reload
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movl	8(%rsp), %r8d                   # 4-byte Reload
	movl	12(%rsp), %r9d                  # 4-byte Reload
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB23_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB23_4
# %bb.3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB23_4:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end23:
	.size	cgpu2ppgppost2l, .Lfunc_end23-cgpu2ppgppost2l
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppcaguard2xl                # -- Begin function cgpuppcaguard2xl
	.type	cgpuppcaguard2xl,@function
cgpuppcaguard2xl:                       # @cgpuppcaguard2xl
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, (%rsp)                    # 4-byte Spill
	movl	%ecx, %r14d
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	nblock_size(%rip), %ebx
	btsq	$32, %rbx
	movl	%ecx, %ebp
	btsq	$32, %rbp
	callq	hipGetLastError
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB24_2
# %bb.1:
	movl	80(%rsp), %eax
	movl	72(%rsp), %r10d
	movl	64(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	%r14d, %ecx
	movl	8(%rsp), %r8d                   # 4-byte Reload
	movl	12(%rsp), %r9d                  # 4-byte Reload
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB24_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB24_4
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB24_4:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end24:
	.size	cgpuppcaguard2xl, .Lfunc_end24-cgpuppcaguard2xl
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppcaguard2yl                # -- Begin function cgpuppcaguard2yl
	.type	cgpuppcaguard2yl,@function
cgpuppcaguard2yl:                       # @cgpuppcaguard2yl
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, 4(%rsp)                   # 4-byte Spill
	movl	%ecx, %ebp
	movl	%edx, %r14d
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	%edx, %eax
	shrl	$31, %eax
	addl	%edx, %eax
	sarl	%eax
	movl	nblock_size(%rip), %r13d
	decl	%eax
	cltd
	idivl	%r13d
                                        # kill: def $eax killed $eax def $rax
	btsq	$32, %r13
	leal	1(%rax), %ebx
	btsq	$32, %rbx
	callq	hipGetLastError
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB25_2
# %bb.1:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movl	%r14d, %edx
	movl	%ebp, %ecx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	callq	_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
.LBB25_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB25_4
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB25_4:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end25:
	.size	cgpuppcaguard2yl, .Lfunc_end25-cgpuppcaguard2yl
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppccguard2xl                # -- Begin function cgpuppccguard2xl
	.type	cgpuppccguard2xl,@function
cgpuppccguard2xl:                       # @cgpuppccguard2xl
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 4(%rsp)                   # 4-byte Spill
	movl	%r8d, (%rsp)                    # 4-byte Spill
	movl	%ecx, %r14d
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	nblock_size(%rip), %ebx
	btsq	$32, %rbx
	movl	%ecx, %ebp
	btsq	$32, %rbp
	callq	hipGetLastError
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB26_2
# %bb.1:
	movl	80(%rsp), %eax
	movl	72(%rsp), %r10d
	movl	64(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	%r14d, %ecx
	movl	8(%rsp), %r8d                   # 4-byte Reload
	movl	12(%rsp), %r9d                  # 4-byte Reload
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB26_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB26_4
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB26_4:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end26:
	.size	cgpuppccguard2xl, .Lfunc_end26-cgpuppccguard2xl
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppccguard2yl                # -- Begin function cgpuppccguard2yl
	.type	cgpuppccguard2yl,@function
cgpuppccguard2yl:                       # @cgpuppccguard2yl
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 20(%rsp)                  # 4-byte Spill
	movl	%r8d, 16(%rsp)                  # 4-byte Spill
	movl	%ecx, %r14d
	movl	%edx, %r15d
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	movl	nblock_size(%rip), %ebx
	decl	%eax
	cltd
	idivl	%ebx
                                        # kill: def $eax killed $eax def $rax
	btsq	$32, %rbx
	leal	1(%rax), %ebp
	btsq	$32, %rbp
	callq	hipGetLastError
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB27_2
# %bb.1:
	movl	80(%rsp), %eax
	movl	%eax, (%rsp)
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	%r14d, %ecx
	movl	16(%rsp), %r8d                  # 4-byte Reload
	movl	20(%rsp), %r9d                  # 4-byte Reload
	callq	_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
.LBB27_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB27_4
# %bb.3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB27_4:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end27:
	.size	cgpuppccguard2yl, .Lfunc_end27-cgpuppccguard2yl
	.cfi_endproc
                                        # -- End function
	.globl	cgpupppord2la                   # -- Begin function cgpupppord2la
	.type	cgpupppord2la,@function
cgpupppord2la:                          # @cgpupppord2la
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 8(%rsp)                    # 8-byte Spill
	movq	%r8, %rbp
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	192(%rsp), %ecx
	movl	184(%rsp), %r15d
	movl	nblock_size(%rip), %r12d
	leal	36(,%r12,4), %ebx
	btsq	$32, %r12
                                        # kill: def $ecx killed $ecx killed $rcx def $rcx
	imull	%r15d, %ecx
	leal	-1(%rcx), %eax
	cltd
	movl	maxgsx(%rip), %esi
	idivl	%esi
	movl	%eax, %r14d
	incl	%r14d
	cmpl	%esi, %ecx
	cmovgel	%esi, %ecx
	shlq	$32, %r14
	orq	%rcx, %r14
	callq	hipGetLastError
	movslq	%ebx, %r8
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_2
# %bb.1:
	movl	176(%rsp), %r10d
	movl	168(%rsp), %r11d
	movl	160(%rsp), %ebx
	movl	152(%rsp), %eax
	movl	128(%rsp), %r9d
	movl	120(%rsp), %r8d
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	96(%rsp), %rcx
	pushq	224(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	216(%rsp), %ebp
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %ebp
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
.LBB28_2:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB28_18
# %bb.3:
	movl	200(%rsp), %ebx
	callq	hipGetLastError
	movl	$36, %r8d
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_5
# %bb.4:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	104(%rsp), %rcx
	movl	144(%rsp), %r8d
                                        # kill: def $r8d killed $r8d killed $r8
	movl	152(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	232(%rsp)
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB28_5:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB28_19
# %bb.6:
	leal	-1(%r15), %eax
	movl	nblock_size(%rip), %ebx
	cltd
	idivl	%ebx
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %ebp
	movl	$0, 4(%rsp)
	movl	_ZZ13cgpupppord2laE8lg_block(%rip), %ecx
	cmpl	%eax, %ecx
	jg	.LBB28_11
# %bb.7:
	testl	%ecx, %ecx
	jle	.LBB28_9
# %bb.8:
	movq	_ZZ13cgpupppord2laE7g_block(%rip), %rdi
	leaq	4(%rsp), %rsi
	callq	gpu_deallocate
.LBB28_9:
	movl	$0, _ZZ13cgpupppord2laE8lg_block(%rip)
	leal	(,%rbp,2), %esi
	leaq	4(%rsp), %r14
	movl	$_ZZ13cgpupppord2laE7g_block, %edi
	movq	%r14, %rdx
	callq	gpu_iallocate
	cmpl	$0, (%r14)
	jne	.LBB28_24
# %bb.10:
	movl	%ebp, _ZZ13cgpupppord2laE8lg_block(%rip)
	movl	nblock_size(%rip), %ebx
.LBB28_11:
	movq	%r15, %r14
	movq	104(%rsp), %r13
	movabsq	$4294967296, %r15               # imm = 0x100000000
	orq	%r15, %rbp
	shll	$3, %ebx
	callq	hipGetLastError
	movslq	%ebx, %r8
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_13
# %bb.12:
	movq	_ZZ13cgpupppord2laE7g_block(%rip), %rcx
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	%r13, %rsi
	movq	112(%rsp), %rdx
	movl	%r14d, %r8d
	movl	192(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	callq	_Z23__device_stub__nciscan2PiS_S_S_ii
.LBB28_13:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB28_20
# %bb.14:
	movl	%r14d, %ebp
	orq	%r15, %rbp
	callq	hipGetLastError
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_16
# %bb.15:
	movl	216(%rsp), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%r13, %r8
	movq	120(%rsp), %r9
	pushq	232(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	_ZZ13cgpupppord2laE7g_block(%rip)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB28_16:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB28_22
# %bb.17:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB28_18:
	.cfi_def_cfa_offset 96
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
	jmp	.LBB28_21
.LBB28_19:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %edi
	jmp	.LBB28_21
.LBB28_20:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %edi
.LBB28_21:
	movl	%ebp, %esi
	jmp	.LBB28_23
.LBB28_22:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %edi
	movl	%ebx, %esi
.LBB28_23:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
.LBB28_25:
	movl	$1, %edi
	callq	exit
.LBB28_24:
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB28_25
.Lfunc_end28:
	.size	cgpupppord2la, .Lfunc_end28-cgpupppord2la
	.cfi_endproc
                                        # -- End function
	.globl	cgpupppord2lb                   # -- Begin function cgpupppord2lb
	.type	cgpupppord2lb,@function
cgpupppord2lb:                          # @cgpupppord2lb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movl	128(%rsp), %r14d
	movl	120(%rsp), %eax
	movl	nblock_size(%rip), %ebx
	leal	72(,%rbx,4), %r15d
	btsq	$32, %rbx
                                        # kill: def $r14d killed $r14d killed $r14 def $r14
	imull	%eax, %r14d
	leal	-1(%r14), %eax
	movl	maxgsx(%rip), %ecx
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	incl	%eax
	cmpl	%ecx, %r14d
	cmovgel	%ecx, %r14d
	shlq	$32, %rax
	orq	%rax, %r14
	callq	hipGetLastError
	movslq	%r15d, %r8
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB29_2
# %bb.1:
	movl	152(%rsp), %eax
	movl	144(%rsp), %r10d
	movl	136(%rsp), %r11d
	movl	112(%rsp), %ebx
	movl	104(%rsp), %r14d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movq	8(%rsp), %rcx                   # 8-byte Reload
	movq	16(%rsp), %r8                   # 8-byte Reload
	movq	24(%rsp), %r9                   # 8-byte Reload
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	movl	168(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	168(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	168(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
.LBB29_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB29_4
# %bb.3:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB29_4:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end29:
	.size	cgpupppord2lb, .Lfunc_end29-cgpupppord2lb
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppois22t                    # -- Begin function cgpuppois22t
	.type	cgpuppois22t,@function
cgpuppois22t:                           # @cgpuppois22t
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebp
	movq	%rdi, %r13
	movl	112(%rsp), %r15d
	movl	96(%rsp), %edi
	movl	%r8d, %eax
	shrl	$31, %eax
	addl	%r8d, %eax
	sarl	%eax
	movl	$1, %r8d
	subl	%edi, %r8d
	imull	%r15d, %r8d
	leal	(%rax,%r8), %edi
	incl	%edi
	xorl	%eax, %eax
	testl	%edi, %edi
	cmovgl	%edi, %eax
	cmpl	%r15d, %eax
	cmovgel	%r15d, %eax
	testl	%eax, %eax
	jle	.LBB30_4
# %bb.1:
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movl	%r9d, 12(%rsp)                  # 4-byte Spill
	movl	nblock_size(%rip), %ebx
	leal	(,%rbx,4), %r12d
	btsq	$32, %rbx
	movl	%eax, %r14d
	btsq	$32, %r14
	callq	hipGetLastError
	movslq	%r12d, %r8
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB30_3
# %bb.2:
	movl	120(%rsp), %eax
	movl	104(%rsp), %r10d
	movq	%r13, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movl	%ebp, %r8d
	movl	12(%rsp), %r9d                  # 4-byte Reload
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	movl	120(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB30_3:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB30_5
.LBB30_4:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB30_5:
	.cfi_def_cfa_offset 96
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end30:
	.size	cgpuppois22t, .Lfunc_end30-cgpuppois22t
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsx                 # -- Begin function cgpuwppfft2rcsx
	.type	cgpuwppfft2rcsx,@function
cgpuwppfft2rcsx:                        # @cgpuwppfft2rcsx
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%rcx, %r11
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movl	160(%rsp), %eax
	movl	136(%rsp), %r10d
	movl	128(%rsp), %edx
	leal	-1(%r9), %ecx
	movl	$1, %r12d
	movl	$1, %r13d
                                        # kill: def $cl killed $cl killed $ecx
	shlq	%cl, %r13
	movl	%edx, %ecx
	shlq	%cl, %r12
	leal	-1(%r10), %ecx
	imull	%eax, %ecx
	movl	%r12d, %edx
	subl	%ecx, %edx
	xorl	%ebx, %ebx
	testl	%edx, %edx
	cmovgl	%edx, %ebx
	cmpl	%eax, %ebx
	cmovgel	%eax, %ebx
	testl	%ebx, %ebx
	jle	.LBB31_23
# %bb.1:
	movl	152(%rsp), %r15d
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movl	nblock_size(%rip), %ecx
	btsq	$32, %rcx
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	movl	%eax, %edx
	imull	%r15d, %edx
	movl	%ebx, %r14d
	orq	%r14, %rbp
	leal	-1(%rax), %ecx
	addl	$14, %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$4, %eax
	incl	%eax
	leal	-1(%r15), %ecx
	addl	$14, %r15d
	testl	%ecx, %ecx
	cmovnsl	%ecx, %r15d
	movl	144(%rsp), %ecx
	sarl	$4, %r15d
	incl	%r15d
	shlq	$32, %r15
	orq	%rax, %r15
	leal	1(%r13), %eax
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	js	.LBB31_2
# %bb.13:
	je	.LBB31_23
# %bb.14:
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%r11, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%r8, 24(%rsp)                   # 8-byte Spill
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movq	%rcx, %r14
	callq	hipGetLastError
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$2176, %r8d                     # imm = 0x880
	movq	%r15, %rdi
	movl	%r14d, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB31_16
# %bb.15:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	8(%rsp), %edx                   # 4-byte Reload
	movl	152(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%ebx, %r8d
	movl	136(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB31_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB31_17
# %bb.18:
	movl	$1024, %r14d                    # imm = 0x400
	cmpl	%r14d, %r13d
	cmovll	%r13d, %r14d
	movl	136(%rsp), %eax
	cmpl	%eax, %r12d
	jl	.LBB31_23
# %bb.19:
	leal	(,%r14,8), %eax
	movslq	%eax, %r8
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB31_21
# %bb.20:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	20(%rsp), %esi                  # 4-byte Reload
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	40(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	136(%rsp), %r9d
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB31_21:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB31_23
# %bb.22:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %edi
	jmp	.LBB31_11
.LBB31_2:
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	$1024, %r15d                    # imm = 0x400
	cmpl	%r15d, %r13d
	cmovll	%r13d, %r15d
	cmpl	%r10d, %r12d
	jl	.LBB31_7
# %bb.3:
	movq	%r11, %r13
	movq	%r8, 24(%rsp)                   # 8-byte Spill
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	leal	(,%r15,8), %r12d
	callq	hipGetLastError
	movslq	%r12d, %r8
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB31_5
# %bb.4:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	20(%rsp), %esi                  # 4-byte Reload
	movq	%r13, %rdx
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	40(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	136(%rsp), %r9d
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB31_5:
	callq	hipGetLastError
	testl	%eax, %eax
	movl	144(%rsp), %ecx
	jne	.LBB31_6
.LBB31_7:
	movq	%rcx, %r15
	shlq	$32, %r15
	orq	%r14, %r15
	movq	%rcx, %r14
	callq	hipGetLastError
	movq	%r15, %rdi
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB31_9
# %bb.8:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	8(%rsp), %edx                   # 4-byte Reload
	movl	152(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%ebx, %r8d
	movl	136(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB31_9:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB31_10
.LBB31_23:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB31_17:
	.cfi_def_cfa_offset 128
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %edi
	movl	%r15d, %esi
	jmp	.LBB31_12
.LBB31_10:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.14, %edi
.LBB31_11:
	movl	%ebx, %esi
	jmp	.LBB31_12
.LBB31_6:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %edi
	movl	%ebp, %esi
.LBB31_12:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end31:
	.size	cgpuwppfft2rcsx, .Lfunc_end31-cgpuwppfft2rcsx
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsy                 # -- Begin function cgpuwppfft2rcsy
	.type	cgpuwppfft2rcsy,@function
cgpuwppfft2rcsy:                        # @cgpuwppfft2rcsy
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%rcx, %r10
	movl	152(%rsp), %r15d
	movl	136(%rsp), %r11d
	movl	128(%rsp), %eax
	leal	-1(%r9), %ecx
	movl	$1, %r12d
	movl	$1, %r13d
                                        # kill: def $cl killed $cl killed $ecx
	shlq	%cl, %r13
	incl	%r13d
	movl	%eax, %ecx
	shlq	%cl, %r12
	leal	-1(%r11), %eax
	imull	%r15d, %eax
	movl	%r13d, %ecx
	subl	%eax, %ecx
	xorl	%r14d, %r14d
	testl	%ecx, %ecx
	cmovgl	%ecx, %r14d
	cmpl	%r15d, %r14d
	cmovgel	%r15d, %r14d
	testl	%r14d, %r14d
	jle	.LBB32_22
# %bb.1:
	movl	160(%rsp), %ecx
	movl	144(%rsp), %ebp
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movl	nblock_size(%rip), %eax
	btsq	$32, %rax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
                                        # kill: def $ecx killed $ecx killed $rcx def $rcx
	imull	%r15d, %ecx
	movl	%r14d, %eax
	orq	%rax, %rbx
	shlq	$32, %rbp
	orq	%rax, %rbp
	testl	%edx, %edx
	js	.LBB32_2
# %bb.13:
	je	.LBB32_22
# %bb.14:
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	$1024, %r15d                    # imm = 0x400
	cmpl	%r15d, %r12d
	cmovll	%r12d, %r15d
	cmpl	%r11d, %r13d
	jl	.LBB32_18
# %bb.15:
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movq	%r10, 24(%rsp)                  # 8-byte Spill
	movq	%r8, 32(%rsp)                   # 8-byte Spill
	movq	%r9, 40(%rsp)                   # 8-byte Spill
	leal	(,%r15,8), %r13d
	callq	hipGetLastError
	movslq	%r13d, %r8
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB32_17
# %bb.16:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	20(%rsp), %esi                  # 4-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movq	48(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	136(%rsp), %r9d
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	movl	200(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	200(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	200(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	192(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB32_17:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB32_10
.LBB32_18:
	callq	hipGetLastError
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB32_20
# %bb.19:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movl	%r12d, %edx
	movl	160(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r14d, %r8d
	movl	136(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movl	152(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	168(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB32_20:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB32_22
# %bb.21:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.14, %edi
	jmp	.LBB32_11
.LBB32_2:
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movq	%r10, 24(%rsp)                  # 8-byte Spill
	movq	%r8, 32(%rsp)                   # 8-byte Spill
	movq	%r9, 40(%rsp)                   # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	leal	-1(%r15), %eax
	leal	14(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	incl	%ecx
	movl	160(%rsp), %eax
	movq	%rax, %rdx
	decl	%eax
	leal	14(%rdx), %ebp
	testl	%eax, %eax
	cmovnsl	%eax, %ebp
	sarl	$4, %ebp
	incl	%ebp
	shlq	$32, %rbp
	orq	%rcx, %rbp
	callq	hipGetLastError
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$2176, %r8d                     # imm = 0x880
	movq	%rbp, %rdi
	movl	144(%rsp), %ebp
	movl	%ebp, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB32_4
# %bb.3:
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movl	%r12d, %edx
	movl	160(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r14d, %r8d
	movl	136(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	movl	176(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB32_4:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB32_5
# %bb.6:
	movl	$1024, %ebp                     # imm = 0x400
	cmpl	%ebp, %r12d
	cmovll	%r12d, %ebp
	movl	136(%rsp), %eax
	cmpl	%eax, %r13d
	jl	.LBB32_22
# %bb.7:
	movq	%r15, %r12
	leal	(,%rbp,8), %r15d
	callq	hipGetLastError
	movslq	%r15d, %r8
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB32_9
# %bb.8:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	20(%rsp), %esi                  # 4-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movq	48(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	136(%rsp), %r9d
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	movl	200(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	200(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	200(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB32_9:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB32_10
.LBB32_22:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB32_10:
	.cfi_def_cfa_offset 128
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %edi
.LBB32_11:
	movl	%ebx, %esi
	jmp	.LBB32_12
.LBB32_5:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %edi
	movl	%ebp, %esi
.LBB32_12:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end32:
	.size	cgpuwppfft2rcsy, .Lfunc_end32-cgpuwppfft2rcsy
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsxn                # -- Begin function cgpuwppfft2rcsxn
	.type	cgpuwppfft2rcsxn,@function
cgpuwppfft2rcsxn:                       # @cgpuwppfft2rcsxn
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%rcx, %rbx
	movl	184(%rsp), %eax
	movl	160(%rsp), %r10d
	movl	144(%rsp), %r11d
	leal	-1(%r9), %ecx
	movl	$1, %r15d
	movl	$1, %r12d
                                        # kill: def $cl killed $cl killed $ecx
	shlq	%cl, %r12
	movl	%r11d, %ecx
	shlq	%cl, %r15
	leal	-1(%r10), %ecx
	imull	%eax, %ecx
	movl	%r15d, %r11d
	subl	%ecx, %r11d
	xorl	%r13d, %r13d
	testl	%r11d, %r11d
	cmovgl	%r11d, %r13d
	cmpl	%eax, %r13d
	cmovgel	%eax, %r13d
	testl	%r13d, %r13d
	jle	.LBB33_22
# %bb.1:
	movq	%rbx, %r10
	movl	200(%rsp), %r14d
	movl	176(%rsp), %ebp
	movl	152(%rsp), %r11d
	movabsq	$4294967296, %rbx               # imm = 0x100000000
	movl	nblock_size(%rip), %ecx
	btsq	$32, %rcx
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	movl	%eax, %ecx
	imull	%ebp, %ecx
	movq	%rcx, 80(%rsp)                  # 8-byte Spill
	movl	%r14d, %ecx
	imull	%r11d, %ecx
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movl	%r13d, %ecx
	imull	%r11d, %ecx
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	orq	%rcx, %rbx
	leal	-1(%rax), %ecx
	addl	$14, %eax
	testl	%ecx, %ecx
	cmovnsl	%ecx, %eax
	sarl	$4, %eax
	incl	%eax
	leal	-1(%rbp), %ecx
	leal	14(%rbp), %r14d
	testl	%ecx, %ecx
	cmovnsl	%ecx, %r14d
	sarl	$4, %r14d
	incl	%r14d
	shlq	$32, %r14
	orq	%rax, %r14
	leal	1(%r12), %eax
	testl	%edx, %edx
	js	.LBB33_2
# %bb.13:
	je	.LBB33_22
# %bb.14:
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movl	%edx, 52(%rsp)                  # 4-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%r10, 8(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	imull	$2176, %r11d, %ebp              # imm = 0x880
	callq	hipGetLastError
	movslq	%ebp, %r8
	movq	56(%rsp), %rbp                  # 8-byte Reload
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r14, %rdi
	movl	168(%rsp), %r14d
	movl	%r14d, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_16
# %bb.15:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%rbp, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	12(%rsp), %edx                  # 4-byte Reload
	movl	184(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r13d, %r8d
	movl	168(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB33_16:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB33_17
# %bb.18:
	movl	$1024, %r14d                    # imm = 0x400
	cmpl	%r14d, %r12d
	cmovll	%r12d, %r14d
	movl	160(%rsp), %eax
	cmpl	%eax, %r15d
	jl	.LBB33_22
# %bb.19:
	leal	(,%r14,8), %ebp
	callq	hipGetLastError
	movslq	%ebp, %r8
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_21
# %bb.20:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	60(%rsp), %esi                  # 4-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	152(%rsp), %r9d
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB33_21:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB33_22
	jmp	.LBB33_6
.LBB33_2:
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movl	$1024, %r14d                    # imm = 0x400
	cmpl	%r14d, %r12d
	cmovll	%r12d, %r14d
	movl	160(%rsp), %eax
	cmpl	%eax, %r15d
	movq	%rdi, %rbp
	jl	.LBB33_9
# %bb.3:
	movl	%edx, %r12d
	movq	%r10, 8(%rsp)                   # 8-byte Spill
	movq	%r8, 16(%rsp)                   # 8-byte Spill
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	leal	(,%r14,8), %r15d
	callq	hipGetLastError
	movslq	%r15d, %r8
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_5
# %bb.4:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%rbp, %rdi
	movl	%r12d, %esi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	152(%rsp), %r9d
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	232(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	120(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB33_5:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB33_6
.LBB33_9:
	movl	%r13d, %eax
	movl	168(%rsp), %r14d
	movq	%r14, %rbx
	shlq	$32, %rbx
	orq	%rax, %rbx
	callq	hipGetLastError
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB33_11
# %bb.10:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%rbp, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	12(%rsp), %edx                  # 4-byte Reload
	movl	184(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r13d, %r8d
	movl	168(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB33_11:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB33_12
.LBB33_22:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB33_17:
	.cfi_def_cfa_offset 144
	movl	%eax, %r14d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.18, %edi
	movl	%r14d, %esi
	jmp	.LBB33_8
.LBB33_6:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %edi
	jmp	.LBB33_7
.LBB33_12:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.17, %edi
.LBB33_7:
	movl	%ebx, %esi
.LBB33_8:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end33:
	.size	cgpuwppfft2rcsxn, .Lfunc_end33-cgpuwppfft2rcsxn
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsyn                # -- Begin function cgpuwppfft2rcsyn
	.type	cgpuwppfft2rcsyn,@function
cgpuwppfft2rcsyn:                       # @cgpuwppfft2rcsyn
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r13d
	movq	%rcx, %r9
	movl	176(%rsp), %r11d
	movl	160(%rsp), %r10d
	movl	144(%rsp), %eax
	leal	-1(%r13), %ecx
	movl	$1, %r15d
	movl	$1, %ebp
                                        # kill: def $cl killed $cl killed $ecx
	shlq	%cl, %rbp
	incl	%ebp
	movl	%eax, %ecx
	shlq	%cl, %r15
	leal	-1(%r10), %eax
	imull	%r11d, %eax
	movl	%ebp, %ecx
	subl	%eax, %ecx
	xorl	%r14d, %r14d
	testl	%ecx, %ecx
	cmovgl	%ecx, %r14d
	cmpl	%r11d, %r14d
	cmovgel	%r11d, %r14d
	testl	%r14d, %r14d
	jle	.LBB34_23
# %bb.1:
	movl	184(%rsp), %ecx
	movl	168(%rsp), %ebx
	movl	152(%rsp), %r12d
	movabsq	$4294967296, %r10               # imm = 0x100000000
	movl	nblock_size(%rip), %eax
	btsq	$32, %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
                                        # kill: def $ecx killed $ecx killed $rcx def $rcx
	imull	%r11d, %ecx
	movl	%r11d, %eax
	imull	%r12d, %eax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	%r14d, %eax
	shlq	$32, %rbx
	orq	%rax, %rbx
	movl	%r14d, %eax
	imull	%r12d, %eax
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	orq	%rax, %r10
	movq	%r10, 80(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	js	.LBB34_2
# %bb.13:
	movl	160(%rsp), %eax
	je	.LBB34_23
# %bb.14:
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	$1024, %r12d                    # imm = 0x400
	cmpl	%r12d, %r15d
	cmovll	%r15d, %r12d
	cmpl	%eax, %ebp
	jl	.LBB34_19
# %bb.15:
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 32(%rsp)                   # 8-byte Spill
	leal	(,%r12,8), %ebp
	callq	hipGetLastError
	movslq	%ebp, %r8
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_17
# %bb.16:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movl	20(%rsp), %esi                  # 4-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movl	%r13d, %r8d
	movl	152(%rsp), %r9d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB34_17:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB34_18
.LBB34_19:
	callq	hipGetLastError
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_21
# %bb.20:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	192(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r14d, %r8d
	movl	168(%rsp), %r9d
                                        # kill: def $r9d killed $r9d killed $r9
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB34_21:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB34_23
# %bb.22:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.17, %edi
	jmp	.LBB34_6
.LBB34_2:
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movq	%r9, 24(%rsp)                   # 8-byte Spill
	movq	%r8, 32(%rsp)                   # 8-byte Spill
	movq	%r13, 16(%rsp)                  # 8-byte Spill
	leal	-1(%r11), %eax
	leal	14(%r11), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	incl	%ecx
	movl	184(%rsp), %eax
	movq	%rax, %rdx
	decl	%eax
	leal	14(%rdx), %ebx
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	sarl	$4, %ebx
	incl	%ebx
	shlq	$32, %rbx
	orq	%rcx, %rbx
	movq	%rdi, %r13
	imull	$2176, %r12d, %r12d             # imm = 0x880
	callq	hipGetLastError
	movslq	%r12d, %r8
	movq	%r13, %r12
	movl	160(%rsp), %r13d
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbx, %rdi
	movl	168(%rsp), %ebx
	movl	%ebx, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_4
# %bb.3:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	192(%rsp), %ecx
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%r14d, %r8d
	movl	%r13d, %r9d
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	208(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	64(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movl	184(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
.LBB34_4:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB34_5
# %bb.8:
	movl	$1024, %ebx                     # imm = 0x400
	cmpl	%ebx, %r15d
	cmovll	%r15d, %ebx
	cmpl	%r13d, %ebp
	movq	16(%rsp), %r14                  # 8-byte Reload
	jl	.LBB34_23
# %bb.9:
	leal	(,%rbx,8), %ebp
	callq	hipGetLastError
	movslq	%ebp, %r8
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	56(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB34_11
# %bb.10:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r12, %rdi
	movl	20(%rsp), %esi                  # 4-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	40(%rsp), %rcx                  # 8-byte Reload
	movl	%r14d, %r8d
	movl	152(%rsp), %r9d
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	movl	224(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB34_11:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB34_12
.LBB34_23:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB34_5:
	.cfi_def_cfa_offset 144
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.18, %edi
	jmp	.LBB34_6
.LBB34_18:
	movl	%eax, %r13d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %edi
	movl	%r13d, %esi
	jmp	.LBB34_7
.LBB34_12:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %edi
.LBB34_6:
	movl	%ebx, %esi
.LBB34_7:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end34:
	.size	cgpuwppfft2rcsyn, .Lfunc_end34-cgpuwppfft2rcsyn
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppltpose                    # -- Begin function cgpuppltpose
	.type	cgpuppltpose,@function
cgpuppltpose:                           # @cgpuppltpose
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %r14d
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movl	%edx, %r15d
	movq	%rsi, %r12
	leal	-1(%r14), %eax
	leal	14(%r14), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	movq	%rdi, %r13
	sarl	$4, %ecx
	incl	%ecx
	leal	-1(%rbx), %eax
	leal	14(%rbx), %ebp
	testl	%eax, %eax
	cmovnsl	%eax, %ebp
	sarl	$4, %ebp
	incl	%ebp
	shlq	$32, %rbp
	orq	%rcx, %rbp
	callq	hipGetLastError
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$2176, %r8d                     # imm = 0x880
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB35_2
# %bb.1:
	movl	80(%rsp), %eax
	movl	72(%rsp), %r10d
	movl	64(%rsp), %r11d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	movl	%r14d, %r8d
	movl	%ebx, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB35_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB35_4
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB35_4:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.19, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end35:
	.size	cgpuppltpose, .Lfunc_end35-cgpuppltpose
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppltposen                   # -- Begin function cgpuppltposen
	.type	cgpuppltposen,@function
cgpuppltposen:                          # @cgpuppltposen
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %r14d
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	movl	%edx, (%rsp)                    # 4-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %r13
	movl	72(%rsp), %edx
	leal	-1(%r14), %eax
	leal	14(%r14), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	incl	%ecx
	leal	-1(%rbx), %eax
	leal	14(%rbx), %ebp
	testl	%eax, %eax
	cmovnsl	%eax, %ebp
	sarl	$4, %ebp
	incl	%ebp
	shlq	$32, %rbp
	orq	%rcx, %rbp
	imull	$2176, %edx, %r15d              # imm = 0x880
	callq	hipGetLastError
	movslq	%r15d, %r8
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB36_2
# %bb.1:
	movl	88(%rsp), %eax
	movl	80(%rsp), %r10d
	movl	64(%rsp), %r11d
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	(%rsp), %edx                    # 4-byte Reload
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movl	%r14d, %r8d
	movl	%ebx, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	movl	88(%rsp), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB36_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB36_4
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB36_4:
	.cfi_def_cfa_offset 64
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end36:
	.size	cgpuppltposen, .Lfunc_end36-cgpuppltposen
	.cfi_endproc
                                        # -- End function
	.globl	cgpusum2                        # -- Begin function cgpusum2
	.type	cgpusum2,@function
cgpusum2:                               # @cgpusum2
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %rbx
	leal	-1(%rbp), %eax
	movl	nblock_size(%rip), %r15d
	cltd
	idivl	%r15d
	movl	%eax, %ecx
	leal	1(%rcx), %esi
	cltd
	idivl	%r15d
	movl	%eax, %r12d
	movl	_ZZ8cgpusum2E3len(%rip), %eax
	movl	%r15d, %r14d
	cmpl	%ecx, %eax
	jg	.LBB37_5
# %bb.1:
	testl	%eax, %eax
	jle	.LBB37_3
# %bb.2:
	movq	_ZZ8cgpusum2E3scr(%rip), %rdi
	movq	%rsi, %r14
	callq	hipFree
	movq	%r14, %rsi
.LBB37_3:
	movq	%rsi, %r13
	leaq	(,%rsi,4), %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB37_16
# %bb.4:
	movq	16(%rsp), %rax
	movq	%rax, _ZZ8cgpusum2E3scr(%rip)
	movl	%r13d, _ZZ8cgpusum2E3len(%rip)
	movl	nblock_size(%rip), %r14d
	movq	%r13, %rsi
.LBB37_5:
	movq	%rbp, %r13
	movq	%rbx, %rbp
	btsq	$32, %r15
	movq	%rsi, (%rsp)                    # 8-byte Spill
	movq	%rsi, %rbx
	btsq	$32, %rbx
	shll	$2, %r14d
	callq	hipGetLastError
	movslq	%r14d, %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r14, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB37_7
# %bb.6:
	movq	_ZZ8cgpusum2E3scr(%rip), %rsi
	movq	%rbp, %rdi
	movl	%r13d, %edx
	callq	_Z22__device_stub__gpusum2PfS_i
.LBB37_7:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB37_12
# %bb.8:
	incl	%r12d
	btsq	$32, %r12
	callq	hipGetLastError
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%r14, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB37_10
# %bb.9:
	movq	_ZZ8cgpusum2E3scr(%rip), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	(%rsp), %rdx                    # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z22__device_stub__gpusum1PfS_i
.LBB37_10:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB37_13
# %bb.11:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB37_12:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %edi
	movl	%ebp, %esi
	jmp	.LBB37_14
.LBB37_13:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %edi
	movl	%ebx, %esi
.LBB37_14:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB37_15
.LBB37_16:
	movl	%eax, %r14d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.21, %edi
	movl	%r14d, %esi
	movq	%rax, %rdx
	movl	%r13d, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB37_15:
	movl	$1, %edi
	callq	exit
.Lfunc_end37:
	.size	cgpusum2, .Lfunc_end37-cgpusum2
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppgppush2l_                 # -- Begin function cgpuppgppush2l_
	.type	cgpuppgppush2l_,@function
cgpuppgppush2l_:                        # @cgpuppgppush2l_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	160(%rsp), %r15
	movq	152(%rsp), %r12
	movq	144(%rsp), %rbp
	movq	136(%rsp), %r13
	movq	128(%rsp), %r14
	movq	120(%rsp), %rbx
	movq	112(%rsp), %r11
	movq	104(%rsp), %r10
	movq	96(%rsp), %rax
	movss	(%r9), %xmm0                    # xmm0 = mem[0],zero,zero,zero
	movq	80(%rsp), %r9
	movss	(%r9), %xmm1                    # xmm1 = mem[0],zero,zero,zero
	movq	88(%rsp), %r9
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movq	(%r9), %r9
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	movl	(%rax), %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	(%r10), %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	(%r11), %r11d
	movl	(%rbx), %ebx
	movl	(%r14), %r14d
	movl	(%r13), %r13d
	movl	(%rbp), %ebp
	movl	(%r12), %r12d
	movl	(%r15), %r15d
	movq	168(%rsp), %rax
	movl	(%rax), %eax
	movq	176(%rsp), %r10
	movl	(%r10), %r10d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	cgpuppgppush2l
	addq	$120, %rsp
	.cfi_adjust_cfa_offset -120
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end38:
	.size	cgpuppgppush2l_, .Lfunc_end38-cgpuppgppush2l_
	.cfi_endproc
                                        # -- End function
	.globl	cgpu2ppgppost2l_                # -- Begin function cgpu2ppgppost2l_
	.type	cgpu2ppgppost2l_,@function
cgpu2ppgppost2l_:                       # @cgpu2ppgppost2l_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	96(%rsp), %rax
	movq	88(%rsp), %r10
	movq	80(%rsp), %r11
	movq	72(%rsp), %rbx
	movq	64(%rsp), %r14
	movq	56(%rsp), %r15
	movq	48(%rsp), %r12
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movl	(%rcx), %ecx
	movss	(%r8), %xmm0                    # xmm0 = mem[0],zero,zero,zero
	movl	(%r9), %r8d
	movl	(%r12), %r9d
	movl	(%r15), %r15d
	movl	(%r14), %r14d
	movl	(%rbx), %ebx
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	callq	cgpu2ppgppost2l
	addq	$56, %rsp
	.cfi_adjust_cfa_offset -56
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end39:
	.size	cgpu2ppgppost2l_, .Lfunc_end39-cgpu2ppgppost2l_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppcaguard2xl_               # -- Begin function cgpuppcaguard2xl_
	.type	cgpuppcaguard2xl_,@function
cgpuppcaguard2xl_:                      # @cgpuppcaguard2xl_
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	32(%rsp), %rax
	movq	24(%rsp), %r10
	movq	16(%rsp), %r11
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	cgpuppcaguard2xl
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end40:
	.size	cgpuppcaguard2xl_, .Lfunc_end40-cgpuppcaguard2xl_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppcaguard2yl_               # -- Begin function cgpuppcaguard2yl_
	.type	cgpuppcaguard2yl_,@function
cgpuppcaguard2yl_:                      # @cgpuppcaguard2yl_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movl	(%rdx), %edx
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	jmp	cgpuppcaguard2yl                # TAILCALL
.Lfunc_end41:
	.size	cgpuppcaguard2yl_, .Lfunc_end41-cgpuppcaguard2yl_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppccguard2xl_               # -- Begin function cgpuppccguard2xl_
	.type	cgpuppccguard2xl_,@function
cgpuppccguard2xl_:                      # @cgpuppccguard2xl_
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	32(%rsp), %rax
	movq	24(%rsp), %r10
	movq	16(%rsp), %r11
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	cgpuppccguard2xl
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end42:
	.size	cgpuppccguard2xl_, .Lfunc_end42-cgpuppccguard2xl_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppccguard2yl_               # -- Begin function cgpuppccguard2yl_
	.type	cgpuppccguard2yl_,@function
cgpuppccguard2yl_:                      # @cgpuppccguard2yl_
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	16(%rsp), %rax
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movl	(%rdx), %edx
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%rax), %eax
	movl	%eax, (%rsp)
	callq	cgpuppccguard2yl
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end43:
	.size	cgpuppccguard2yl_, .Lfunc_end43-cgpuppccguard2yl_
	.cfi_endproc
                                        # -- End function
	.globl	cgpupppord2la_                  # -- Begin function cgpupppord2la_
	.type	cgpupppord2la_,@function
cgpupppord2la_:                         # @cgpupppord2la_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	184(%rsp), %rax
	movq	176(%rsp), %r10
	movq	168(%rsp), %r11
	movq	160(%rsp), %rbp
	movq	152(%rsp), %r13
	movq	144(%rsp), %rbx
	movq	136(%rsp), %r14
	movq	128(%rsp), %r15
	movq	120(%rsp), %r12
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movq	(%rcx), %rcx
	movq	(%r8), %r8
	movq	(%r9), %r9
	movl	(%r12), %r12d
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movl	(%r15), %r15d
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movl	(%r14), %r14d
	movq	%r14, 16(%rsp)                  # 8-byte Spill
	movl	(%rbx), %ebx
	movq	%rbx, 8(%rsp)                   # 8-byte Spill
	movl	(%r13), %ebx
	movq	%rbx, (%rsp)                    # 8-byte Spill
	movl	(%rbp), %ebp
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	movq	192(%rsp), %r12
	movl	(%r12), %r12d
	movq	200(%rsp), %r15
	movl	(%r15), %r15d
	movq	208(%rsp), %r14
	movl	(%r14), %r14d
	movq	216(%rsp), %rbx
	movl	(%rbx), %ebx
	movq	224(%rsp), %r13
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	movq	232(%rsp), %rax
	pushq	(%rax)
	.cfi_adjust_cfa_offset 8
	movq	232(%rsp), %rax
	pushq	(%rax)
	.cfi_adjust_cfa_offset 8
	movq	232(%rsp), %rax
	pushq	(%rax)
	.cfi_adjust_cfa_offset 8
	callq	cgpupppord2la
	addq	$184, %rsp
	.cfi_adjust_cfa_offset -184
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end44:
	.size	cgpupppord2la_, .Lfunc_end44-cgpupppord2la_
	.cfi_endproc
                                        # -- End function
	.globl	cgpupppord2lb_                  # -- Begin function cgpupppord2lb_
	.type	cgpupppord2lb_,@function
cgpupppord2lb_:                         # @cgpupppord2lb_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	136(%rsp), %rax
	movq	128(%rsp), %rbx
	movq	120(%rsp), %r15
	movq	112(%rsp), %r12
	movq	104(%rsp), %r13
	movq	96(%rsp), %r14
	movq	88(%rsp), %r10
	movq	144(%rsp), %rbp
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movq	(%rcx), %rcx
	movq	(%r8), %r8
	movq	(%r9), %r9
	movl	(%r10), %r11d
	movl	(%r14), %r14d
	movl	(%r13), %r13d
	movl	(%r12), %r12d
	movl	(%r15), %r15d
	movl	(%rbx), %r10d
	movl	(%rax), %eax
	movq	72(%rsp), %rbx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	(%rbp)
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	movq	152(%rsp), %rax
	pushq	(%rax)
	.cfi_adjust_cfa_offset 8
	pushq	(%rbx)
	.cfi_adjust_cfa_offset 8
	movq	152(%rsp), %rax
	pushq	(%rax)
	.cfi_adjust_cfa_offset 8
	callq	cgpupppord2lb
	addq	$104, %rsp
	.cfi_adjust_cfa_offset -104
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end45:
	.size	cgpupppord2lb_, .Lfunc_end45-cgpupppord2lb_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppois22t_                   # -- Begin function cgpuppois22t_
	.type	cgpuppois22t_,@function
cgpuppois22t_:                          # @cgpuppois22t_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	40(%rsp), %rax
	movq	32(%rsp), %r10
	movq	24(%rsp), %r11
	movq	16(%rsp), %rbx
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rdx), %rdx
	movq	(%rcx), %rcx
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%rbx), %ebx
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	cgpuppois22t
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end46:
	.size	cgpuppois22t_, .Lfunc_end46-cgpuppois22t_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsx_                # -- Begin function cgpuwppfft2rcsx_
	.type	cgpuwppfft2rcsx_,@function
cgpuwppfft2rcsx_:                       # @cgpuwppfft2rcsx_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	128(%rsp), %rbx
	movq	120(%rsp), %r14
	movq	112(%rsp), %r15
	movq	104(%rsp), %r12
	movq	96(%rsp), %r13
	movq	88(%rsp), %rbp
	movq	80(%rsp), %r11
	movq	72(%rsp), %r10
	movq	64(%rsp), %rax
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rcx), %rcx
	movq	(%r8), %r8
	movl	(%rdx), %edx
	movl	(%r9), %r9d
	movl	(%rax), %eax
	movl	(%r10), %r10d
	movl	(%r11), %r11d
	movl	(%rbp), %ebp
	movl	(%r13), %r13d
	movl	(%r12), %r12d
	movl	(%r15), %r15d
	movl	(%r14), %r14d
	movl	(%rbx), %ebx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	cgpuwppfft2rcsx
	addq	$88, %rsp
	.cfi_adjust_cfa_offset -88
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end47:
	.size	cgpuwppfft2rcsx_, .Lfunc_end47-cgpuwppfft2rcsx_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsy_                # -- Begin function cgpuwppfft2rcsy_
	.type	cgpuwppfft2rcsy_,@function
cgpuwppfft2rcsy_:                       # @cgpuwppfft2rcsy_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	104(%rsp), %r11
	movq	96(%rsp), %rbx
	movq	88(%rsp), %r14
	movq	80(%rsp), %r15
	movq	72(%rsp), %r12
	movq	64(%rsp), %r13
	movq	56(%rsp), %r10
	movq	48(%rsp), %rax
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rcx), %rcx
	movq	(%r8), %r8
	movl	(%rdx), %edx
	movl	(%r9), %r9d
	movl	(%rax), %eax
	movl	(%r10), %r10d
	movl	(%r13), %r13d
	movl	(%r12), %r12d
	movl	(%r15), %r15d
	movl	(%r14), %r14d
	movl	(%rbx), %ebx
	movl	(%r11), %r11d
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	cgpuwppfft2rcsy
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end48:
	.size	cgpuwppfft2rcsy_, .Lfunc_end48-cgpuwppfft2rcsy_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsxn_               # -- Begin function cgpuwppfft2rcsxn_
	.type	cgpuwppfft2rcsxn_,@function
cgpuwppfft2rcsxn_:                      # @cgpuwppfft2rcsxn_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	128(%rsp), %r14
	movq	120(%rsp), %r15
	movq	112(%rsp), %r12
	movq	104(%rsp), %r13
	movq	96(%rsp), %rbp
	movq	88(%rsp), %rbx
	movq	80(%rsp), %r11
	movq	72(%rsp), %r10
	movq	64(%rsp), %rax
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rcx), %rcx
	movq	(%r8), %r8
	movl	(%rdx), %edx
	movl	(%r9), %r9d
	movl	(%rax), %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	(%r10), %r10d
	movl	(%r11), %r11d
	movl	(%rbx), %ebx
	movl	(%rbp), %ebp
	movl	(%r13), %r13d
	movl	(%r12), %r12d
	movl	(%r15), %r15d
	movl	(%r14), %r14d
	movq	136(%rsp), %rax
	movl	(%rax), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	72(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	cgpuwppfft2rcsxn
	addq	$88, %rsp
	.cfi_adjust_cfa_offset -88
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end49:
	.size	cgpuwppfft2rcsxn_, .Lfunc_end49-cgpuwppfft2rcsxn_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuwppfft2rcsyn_               # -- Begin function cgpuwppfft2rcsyn_
	.type	cgpuwppfft2rcsyn_,@function
cgpuwppfft2rcsyn_:                      # @cgpuwppfft2rcsyn_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	128(%rsp), %rbx
	movq	120(%rsp), %r14
	movq	112(%rsp), %r15
	movq	104(%rsp), %r12
	movq	96(%rsp), %r13
	movq	88(%rsp), %rbp
	movq	80(%rsp), %r11
	movq	72(%rsp), %r10
	movq	64(%rsp), %rax
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movq	(%rcx), %rcx
	movq	(%r8), %r8
	movl	(%rdx), %edx
	movl	(%r9), %r9d
	movl	(%rax), %eax
	movl	(%r10), %r10d
	movl	(%r11), %r11d
	movl	(%rbp), %ebp
	movl	(%r13), %r13d
	movl	(%r12), %r12d
	movl	(%r15), %r15d
	movl	(%r14), %r14d
	movl	(%rbx), %ebx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%r13
	.cfi_adjust_cfa_offset 8
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	cgpuwppfft2rcsyn
	addq	$88, %rsp
	.cfi_adjust_cfa_offset -88
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end50:
	.size	cgpuwppfft2rcsyn_, .Lfunc_end50-cgpuwppfft2rcsyn_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppltpose_                   # -- Begin function cgpuppltpose_
	.type	cgpuppltpose_,@function
cgpuppltpose_:                          # @cgpuppltpose_
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	32(%rsp), %rax
	movq	24(%rsp), %r10
	movq	16(%rsp), %r11
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movl	(%rdx), %edx
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	cgpuppltpose
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end51:
	.size	cgpuppltpose_, .Lfunc_end51-cgpuppltpose_
	.cfi_endproc
                                        # -- End function
	.globl	cgpuppltposen_                  # -- Begin function cgpuppltposen_
	.type	cgpuppltposen_,@function
cgpuppltposen_:                         # @cgpuppltposen_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	40(%rsp), %rax
	movq	32(%rsp), %r10
	movq	24(%rsp), %r11
	movq	16(%rsp), %rbx
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movl	(%rdx), %edx
	movl	(%rcx), %ecx
	movl	(%r8), %r8d
	movl	(%r9), %r9d
	movl	(%rbx), %ebx
	movl	(%r11), %r11d
	movl	(%r10), %r10d
	movl	(%rax), %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	callq	cgpuppltposen
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end52:
	.size	cgpuppltposen_, .Lfunc_end52-cgpuppltposen_
	.cfi_endproc
                                        # -- End function
	.globl	cgpusum2_                       # -- Begin function cgpusum2_
	.type	cgpusum2_,@function
cgpusum2_:                              # @cgpusum2_
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rdi
	movq	(%rsi), %rsi
	movl	(%rdx), %edx
	jmp	cgpusum2                        # TAILCALL
.Lfunc_end53:
	.size	cgpusum2_, .Lfunc_end53-cgpusum2_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB54_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB54_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14gpu2ppgppost2lPfS_Piifiiiiiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8nciscan2PiS_S_S_ii, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii, %esi
	movl	$.L__unnamed_17, %edx
	movl	$.L__unnamed_17, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii, %esi
	movl	$.L__unnamed_18, %edx
	movl	$.L__unnamed_18, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii, %esi
	movl	$.L__unnamed_19, %edx
	movl	$.L__unnamed_19, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii, %esi
	movl	$.L__unnamed_20, %edx
	movl	$.L__unnamed_20, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7gpusum1PfS_i, %esi
	movl	$.L__unnamed_21, %edx
	movl	$.L__unnamed_21, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7gpusum2PfS_i, %esi
	movl	$.L__unnamed_22, %edx
	movl	$.L__unnamed_22, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end54:
	.size	__hip_module_ctor, .Lfunc_end54-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB55_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB55_2:
	retq
.Lfunc_end55:
	.size	__hip_module_dtor, .Lfunc_end55-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii,@object # @_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.p2align	3, 0x0
_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii:
	.quad	_Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.size	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, 8

	.type	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii,@object # @_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.globl	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.p2align	3, 0x0
_Z14gpu2ppgppost2lPfS_Piifiiiiiiii:
	.quad	_Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii
	.size	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii, 8

	.type	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii,@object # @_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.globl	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.p2align	3, 0x0
_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii:
	.quad	_Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.size	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, 8

	.type	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii,@object # @_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.globl	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.p2align	3, 0x0
_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii:
	.quad	_Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.size	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii, 8

	.type	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii,@object # @_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.globl	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.p2align	3, 0x0
_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii:
	.quad	_Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.size	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, 8

	.type	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii,@object # @_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.globl	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.p2align	3, 0x0
_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii:
	.quad	_Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.size	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii, 8

	.type	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_,@object # @_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.globl	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.p2align	3, 0x0
_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_:
	.quad	_Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.size	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, 8

	.type	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_,@object # @_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.globl	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.p2align	3, 0x0
_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_:
	.quad	_Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_
	.size	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_, 8

	.type	_Z8nciscan2PiS_S_S_ii,@object   # @_Z8nciscan2PiS_S_S_ii
	.globl	_Z8nciscan2PiS_S_S_ii
	.p2align	3, 0x0
_Z8nciscan2PiS_S_S_ii:
	.quad	_Z23__device_stub__nciscan2PiS_S_S_ii
	.size	_Z8nciscan2PiS_S_S_ii, 8

	.type	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_,@object # @_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.globl	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.p2align	3, 0x0
_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_:
	.quad	_Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.size	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, 8

	.type	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_,@object # @_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.globl	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.p2align	3, 0x0
_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_:
	.quad	_Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.size	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, 8

	.type	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii,@object # @_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.globl	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.p2align	3, 0x0
_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii:
	.quad	_Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.size	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii, 8

	.type	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii,@object # @_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.globl	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.p2align	3, 0x0
_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii:
	.quad	_Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.size	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, 8

	.type	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii,@object # @_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.globl	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.p2align	3, 0x0
_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii:
	.quad	_Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.size	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, 8

	.type	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii,@object # @_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.globl	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.p2align	3, 0x0
_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii:
	.quad	_Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.size	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii, 8

	.type	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii,@object # @_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.globl	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.p2align	3, 0x0
_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii:
	.quad	_Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.size	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii, 8

	.type	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii,@object # @_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.globl	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.p2align	3, 0x0
_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii:
	.quad	_Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.size	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii, 8

	.type	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii,@object # @_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.globl	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.p2align	3, 0x0
_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii:
	.quad	_Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.size	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii, 8

	.type	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii,@object # @_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.globl	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.p2align	3, 0x0
_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii:
	.quad	_Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.size	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii, 8

	.type	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii,@object # @_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.globl	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.p2align	3, 0x0
_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii:
	.quad	_Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.size	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii, 8

	.type	_Z7gpusum1PfS_i,@object         # @_Z7gpusum1PfS_i
	.globl	_Z7gpusum1PfS_i
	.p2align	3, 0x0
_Z7gpusum1PfS_i:
	.quad	_Z22__device_stub__gpusum1PfS_i
	.size	_Z7gpusum1PfS_i, 8

	.type	_Z7gpusum2PfS_i,@object         # @_Z7gpusum2PfS_i
	.globl	_Z7gpusum2PfS_i
	.p2align	3, 0x0
_Z7gpusum2PfS_i:
	.quad	_Z22__device_stub__gpusum2PfS_i
	.size	_Z7gpusum2PfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"gpuppgppush2l error=%d:%s\n"
	.size	.L.str, 27

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"gpu2ppgppost2l error=%d:%s\n"
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"gpuppcaguard2xl error=%d:%s\n"
	.size	.L.str.2, 29

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"gpuppcaguard2yl error=%d:%s\n"
	.size	.L.str.3, 29

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"gpuppccguard2xl error=%d:%s\n"
	.size	.L.str.4, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"gpuppccguard2yl error=%d:%s\n"
	.size	.L.str.5, 29

	.type	_ZZ13cgpupppord2laE7g_block,@object # @_ZZ13cgpupppord2laE7g_block
	.local	_ZZ13cgpupppord2laE7g_block
	.comm	_ZZ13cgpupppord2laE7g_block,8,8
	.type	_ZZ13cgpupppord2laE8lg_block,@object # @_ZZ13cgpupppord2laE8lg_block
	.local	_ZZ13cgpupppord2laE8lg_block
	.comm	_ZZ13cgpupppord2laE8lg_block,4,4
	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"gpupppfnd2l error=%d:%s\n"
	.size	.L.str.6, 25

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"gpupppmov2l error=%d:%s\n"
	.size	.L.str.7, 25

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"nciscan2 error=%d:%s\n"
	.size	.L.str.9, 22

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"gpupppbuf2l error=%d:%s\n"
	.size	.L.str.10, 25

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"gpupppord2l error=%d:%s\n"
	.size	.L.str.11, 25

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"gpuppois22t error=%d:%s\n"
	.size	.L.str.12, 25

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"gpufft2rcxs error=%d:%s\n"
	.size	.L.str.13, 25

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"gpuppmtposes error=%d:%s\n"
	.size	.L.str.14, 26

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"gpuppmtposer error=%d:%s\n"
	.size	.L.str.15, 26

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"gpufft2rcys error=%d:%s\n"
	.size	.L.str.16, 25

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"gpuppmtposesn error=%d:%s\n"
	.size	.L.str.17, 27

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"gpuppmtposern error=%d:%s\n"
	.size	.L.str.18, 27

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"gpuppltpose error=%d:%s\n"
	.size	.L.str.19, 25

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"gpuppltposen error=%d:%s\n"
	.size	.L.str.20, 26

	.type	_ZZ8cgpusum2E3len,@object       # @_ZZ8cgpusum2E3len
	.local	_ZZ8cgpusum2E3len
	.comm	_ZZ8cgpusum2E3len,4,4
	.type	_ZZ8cgpusum2E3scr,@object       # @_ZZ8cgpusum2E3scr
	.local	_ZZ8cgpusum2E3scr
	.comm	_ZZ8cgpusum2E3scr,8,8
	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"hipMalloc cgpusum2 float Error=%d:%s,l=%d\n"
	.size	.L.str.21, 43

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"gpusum2 error=%d:%s\n"
	.size	.L.str.22, 21

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"gpusum1 error=%d:%s\n"
	.size	.L.str.23, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii"
	.size	.L__unnamed_1, 41

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14gpu2ppgppost2lPfS_Piifiiiiiiii"
	.size	.L__unnamed_2, 35

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii"
	.size	.L__unnamed_3, 56

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii"
	.size	.L__unnamed_4, 51

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii"
	.size	.L__unnamed_5, 56

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii"
	.size	.L__unnamed_6, 52

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_"
	.size	.L__unnamed_7, 40

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_"
	.size	.L__unnamed_8, 34

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z8nciscan2PiS_S_S_ii"
	.size	.L__unnamed_9, 22

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_"
	.size	.L__unnamed_10, 41

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_"
	.size	.L__unnamed_11, 48

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii"
	.size	.L__unnamed_12, 55

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii"
	.size	.L__unnamed_13, 56

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii"
	.size	.L__unnamed_14, 56

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii"
	.size	.L__unnamed_15, 53

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii"
	.size	.L__unnamed_16, 53

	.type	.L__unnamed_17,@object          # @16
.L__unnamed_17:
	.asciz	"_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii"
	.size	.L__unnamed_17, 55

	.type	.L__unnamed_18,@object          # @17
.L__unnamed_18:
	.asciz	"_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii"
	.size	.L__unnamed_18, 55

	.type	.L__unnamed_19,@object          # @18
.L__unnamed_19:
	.asciz	"_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii"
	.size	.L__unnamed_19, 51

	.type	.L__unnamed_20,@object          # @19
.L__unnamed_20:
	.asciz	"_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii"
	.size	.L__unnamed_20, 53

	.type	.L__unnamed_21,@object          # @20
.L__unnamed_21:
	.asciz	"_Z7gpusum1PfS_i"
	.size	.L__unnamed_21, 16

	.type	.L__unnamed_22,@object          # @21
.L__unnamed_22:
	.asciz	"_Z7gpusum2PfS_i"
	.size	.L__unnamed_22, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"GPU g_block allocate error!"
	.size	.Lstr, 28

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.addrsig_sym _Z29__device_stub__gpu2ppgppost2lPfS_Piifiiiiiiii
	.addrsig_sym _Z30__device_stub__gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.addrsig_sym _Z30__device_stub__gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.addrsig_sym _Z30__device_stub__gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.addrsig_sym _Z30__device_stub__gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.addrsig_sym _Z26__device_stub__gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.addrsig_sym _Z26__device_stub__gpupppmov2lPfS_PiS0_iiiiiiS0_
	.addrsig_sym _Z23__device_stub__nciscan2PiS_S_S_ii
	.addrsig_sym _Z26__device_stub__gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.addrsig_sym _Z26__device_stub__gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.addrsig_sym _Z26__device_stub__gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.addrsig_sym _Z26__device_stub__gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.addrsig_sym _Z26__device_stub__gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.addrsig_sym _Z27__device_stub__gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.addrsig_sym _Z27__device_stub__gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.addrsig_sym _Z28__device_stub__gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.addrsig_sym _Z28__device_stub__gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.addrsig_sym _Z26__device_stub__gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.addrsig_sym _Z27__device_stub__gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.addrsig_sym _Z22__device_stub__gpusum1PfS_i
	.addrsig_sym _Z22__device_stub__gpusum2PfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.addrsig_sym _Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.addrsig_sym _Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.addrsig_sym _Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.addrsig_sym _Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.addrsig_sym _Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.addrsig_sym _Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.addrsig_sym _Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.addrsig_sym _Z8nciscan2PiS_S_S_ii
	.addrsig_sym _Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.addrsig_sym _Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.addrsig_sym _Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.addrsig_sym _Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.addrsig_sym _Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.addrsig_sym _Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.addrsig_sym _Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.addrsig_sym _Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.addrsig_sym _Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.addrsig_sym _Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.addrsig_sym _Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.addrsig_sym _Z7gpusum1PfS_i
	.addrsig_sym _Z7gpusum2PfS_i
	.addrsig_sym _ZZ13cgpupppord2laE7g_block
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii ; -- Begin function _Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.globl	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
	.p2align	8
	.type	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii,@function
_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii: ; @_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x60
	s_load_b128 s[16:19], s[0:1], 0x50
	s_add_u32 s24, s0, 0x60
	s_addc_u32 s25, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s26, s2, s14
	s_cmp_ge_i32 s26, s17
	s_cbranch_scc1 .LBB0_40
; %bb.1:
	s_ashr_i32 s12, s16, 31
	s_load_b256 s[4:11], s[0:1], 0x30
	s_add_i32 s2, s16, s12
	s_ashr_i32 s27, s26, 31
	s_xor_b32 s13, s2, s12
	s_waitcnt lgkmcnt(0)
	s_add_i32 s11, s26, s27
	v_cvt_f32_u32_e32 v1, s13
	s_sub_i32 s3, 0, s13
	s_xor_b32 s11, s11, s27
	s_xor_b32 s12, s27, s12
	s_mov_b32 s29, 0
	v_rcp_iflag_f32_e32 v1, v1
	s_add_i32 s19, s6, 1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s3, s3, s2
	s_mul_hi_u32 s3, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s14, s2, s3
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mul_hi_u32 s14, s11, s14
	s_mul_i32 s15, s14, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s11, s11, s15
	s_add_i32 s15, s14, 1
	s_sub_i32 s17, s11, s13
	s_cmp_ge_u32 s11, s13
	s_cselect_b32 s14, s15, s14
	s_cselect_b32 s11, s17, s11
	s_add_i32 s15, s14, 1
	s_cmp_ge_u32 s11, s13
	s_cselect_b32 s11, s15, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s11, s11, s12
	s_sub_i32 s11, s11, s12
	s_load_b128 s[12:15], s[0:1], 0x0
	s_mul_i32 s20, s11, s16
	s_lshl_b64 s[16:17], s[26:27], 2
	s_sub_i32 s30, s26, s20
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s2, s16
	s_addc_u32 s3, s3, s17
	s_load_b128 s[20:23], s[0:1], 0x18
	s_load_b32 s3, s[2:3], 0x0
	s_add_i32 s28, s7, 1
	s_mul_i32 s27, s11, s7
	s_mul_i32 s28, s28, s19
	s_mul_i32 s11, s30, s6
	s_mov_b32 s30, exec_lo
	v_cmpx_gt_i32_e64 s28, v0
	s_cbranch_execz .LBB0_6
; %bb.2:                                ; %.lr.ph
	s_ashr_i32 s31, s19, 31
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s21, s21, s27
	s_add_i32 s2, s19, s31
	s_min_i32 s7, s21, s7
	s_xor_b32 s33, s2, s31
	s_load_b32 s2, s[24:25], 0xc
	v_cvt_f32_u32_e32 v1, s33
	s_sub_i32 s34, 0, s33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s21, s2, 0xffff
	v_cvt_u32_f32_e32 v2, v1
	s_lshl_b32 s35, s21, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v1, s34, v2
	s_sub_i32 s34, s4, s11
	s_min_i32 s6, s34, s6
	s_sub_i32 s34, 0, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v2, v1
	v_lshl_add_u32 v1, v0, 3, 0
	v_dual_mov_b32 v3, v0 :: v_dual_add_nc_u32 v2, v2, v3
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_add_nc_u32_e32 v5, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v5, v5, v4
	v_xor_b32_e32 v4, s31, v4
	v_mul_hi_u32 v6, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v6, s33
	v_sub_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v7, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v8, s33, v5
	v_cmp_le_u32_e32 vcc_lo, s33, v5
	v_dual_cndmask_b32 v6, v6, v7 :: v_dual_cndmask_b32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v6
	v_cmp_le_u32_e32 vcc_lo, s33, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v6, v7, vcc_lo
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v4
	v_mul_lo_u32 v4, s34, v5
	v_cmp_ge_i32_e64 s2, s7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v3, v4
	v_cmp_ge_i32_e32 vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s36, vcc_lo, s2
	s_and_saveexec_b32 s2, s36
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v5, s27, v5
	v_add3_u32 v4, s11, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s10
	v_add_lshl_u32 v4, v4, v5, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s14, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s15, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v1, v4, v5 offset1:1
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v3, s21, v3
	v_add_nc_u32_e32 v1, s35, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s28, v3
	s_or_b32 s29, vcc_lo, s29
	s_and_not1_b32 exec_lo, exec_lo, s29
	s_cbranch_execnz .LBB0_3
.LBB0_6:                                ; %Flow316
	s_or_b32 exec_lo, exec_lo, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr7
	v_cmpx_le_i32_e64 s3, v0
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB0_8
; %bb.7:                                ; %._crit_edge.._crit_edge244_crit_edge
	s_load_b32 s2, s[24:25], 0xc
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
.LBB0_8:                                ; %Flow313
	s_or_saveexec_b32 s6, s6
	v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v4, s2
	v_mov_b32_e32 v1, s7
	s_xor_b32 exec_lo, exec_lo, s6
	s_cbranch_execz .LBB0_29
; %bb.9:                                ; %.lr.ph243
	s_load_b32 s7, s[24:25], 0xc
	s_and_b32 s10, s18, -2
	s_add_i32 s5, s5, -1
	s_cmp_eq_u32 s10, 2
	s_mul_i32 s2, s8, s26
	s_cselect_b32 s14, -1, 0
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, v0
	s_cmp_lg_u32 s14, 0
	v_mul_f32_e64 v11, s22, s23
	s_subb_u32 s4, s4, 0
	v_mov_b32_e32 v2, 0
	v_cvt_f32_i32_e32 v12, s5
	v_cvt_f32_i32_e32 v13, s4
	s_mov_b32 s24, s9
	s_mul_i32 s10, s2, s9
	s_ashr_i32 s25, s9, 31
	s_add_i32 s5, s2, 2
	s_add_i32 s2, s2, 3
	s_mov_b32 s8, 0
	s_lshl_b32 s14, s19, 1
	s_add_i32 s15, s27, s20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s19, s7, 0xffff
	s_mul_i32 s20, s9, s5
	s_mul_i32 s9, s9, s2
	s_lshl_b64 s[4:5], s[24:25], 2
.LBB0_10:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s10, v14
	s_cmp_lt_i32 s18, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s12, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s13, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v15, v[5:6], off
	global_load_b32 v16, v[3:4], off
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v27, v15
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v28, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v19, s15, v27
	v_subrev_nc_u32_e32 v20, s11, v28
	v_cvt_f32_i32_e32 v28, v28
	v_cvt_f32_i32_e32 v27, v27
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v19, v19, s14
	v_dual_sub_f32 v28, v16, v28 :: v_dual_add_nc_u32 v7, s20, v14
	v_add_nc_u32_e32 v9, s9, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v29, 1.0, v28
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshl_add_u32 v19, v20, 1, v19
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshl_add_u32 v23, v19, 2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s12, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	s_clause 0x1
	global_load_b32 v17, v[7:8], off
	global_load_b32 v18, v[9:10], off
	v_lshl_add_u32 v25, s14, 2, v23
	ds_load_2addr_b32 v[19:20], v25 offset0:2 offset1:3
	ds_load_2addr_b32 v[21:22], v23 offset1:1
	ds_load_2addr_b32 v[23:24], v23 offset0:2 offset1:3
	ds_load_2addr_b32 v[25:26], v25 offset1:1
	s_waitcnt lgkmcnt(3)
	v_mul_f32_e32 v20, v28, v20
	v_mul_f32_e32 v19, v28, v19
	s_waitcnt lgkmcnt(1)
	v_dual_mul_f32 v24, v28, v24 :: v_dual_sub_f32 v27, v15, v27
	v_mul_f32_e32 v21, v21, v29
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v19, v29, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v25, 1.0, v27
	v_fmac_f32_e32 v21, v28, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v19, v27, v19
	v_fmac_f32_e32 v19, v25, v21
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v19, v11, v19, v17
	v_fmac_f32_e32 v16, s23, v19
	v_fmac_f32_e32 v20, v29, v26
	v_fmac_f32_e32 v24, v22, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v20, v27, v20
	v_fmac_f32_e32 v20, v25, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f32 v20, v11, v20, v18
	s_clause 0x1
	global_store_b32 v[7:8], v19, off
	global_store_b32 v[9:10], v20, off
	v_fmac_f32_e32 v15, s23, v20
	s_cbranch_scc1 .LBB0_15
; %bb.11:                               ; %LeafBlock302
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_cmp_eq_u32 s18, 3
	s_mov_b32 s22, 0
	s_cbranch_scc0 .LBB0_16
; %bb.12:                               ;   in Loop: Header=BB0_10 Depth=1
	v_cmp_gt_f32_e32 vcc_lo, 1.0, v16
	v_cmp_ge_f32_e64 s2, v16, v13
	s_mov_b32 s21, 0
                                        ; implicit-def: $vgpr21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s24, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s24
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_10 Depth=1
	global_load_b32 v21, v[3:4], off
	s_mov_b32 s21, exec_lo
.LBB0_14:                               ; %Flow309
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_branch .LBB0_17
.LBB0_15:                               ;   in Loop: Header=BB0_10 Depth=1
	s_mov_b32 s22, -1
.LBB0_16:                               ; %Flow307
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_mov_b32 s21, 0
                                        ; implicit-def: $vgpr21
.LBB0_17:                               ; %Flow307
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_and_b32 vcc_lo, exec_lo, s22
	s_cbranch_vccz .LBB0_25
; %bb.18:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_cmp_eq_u32 s18, 2
	s_cbranch_scc0 .LBB0_24
; %bb.19:                               ;   in Loop: Header=BB0_10 Depth=1
	v_cmp_gt_f32_e32 vcc_lo, 1.0, v16
	v_cmp_ge_f32_e64 s2, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s22, vcc_lo, s2
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_10 Depth=1
	s_clause 0x1
	global_load_b32 v21, v[7:8], off
	global_load_b32 v16, v[3:4], off
	s_waitcnt vmcnt(1)
	v_xor_b32_e32 v21, 0x80000000, v21
	global_store_b32 v[7:8], v21, off
.LBB0_21:                               ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_gt_f32_e32 vcc_lo, 1.0, v15
	v_cmp_ge_f32_e64 s2, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s22, vcc_lo, s2
	s_and_saveexec_b32 s2, s22
	s_cbranch_execz .LBB0_23
; %bb.22:                               ;   in Loop: Header=BB0_10 Depth=1
	global_load_b32 v15, v[5:6], off
	s_or_b32 s21, s21, exec_lo
.LBB0_23:                               ; %Flow312
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v7, v9
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v21, v16 :: v_dual_mov_b32 v8, v10
	s_branch .LBB0_25
.LBB0_24:                               ;   in Loop: Header=BB0_10 Depth=1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr7_vgpr8
.LBB0_25:                               ; %Flow310
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB0_27
; %bb.26:                               ; %.sink.split
                                        ;   in Loop: Header=BB0_10 Depth=1
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v16, v21
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v9, 0x80000000, v9
	global_store_b32 v[7:8], v9, off
.LBB0_27:                               ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_dual_add_f32 v7, v18, v20 :: v_dual_add_f32 v8, v17, v19
	s_clause 0x1
	global_store_b32 v[3:4], v16, off
	global_store_b32 v[5:6], v15, off
	v_dual_mul_f32 v7, v7, v7 :: v_dual_add_nc_u32 v14, s19, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s3, v14
	v_fmac_f32_e32 v7, v8, v8
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[7:8], v7
	v_add_f64 v[1:2], v[1:2], v[7:8]
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_10
; %bb.28:                               ; %._crit_edge244.loopexit
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v5, v[1:2]
	v_dual_mov_b32 v4, s7 :: v_dual_mov_b32 v1, s19
.LBB0_29:                               ; %Flow314
	s_or_b32 exec_lo, exec_lo, s6
	v_lshl_add_u32 v2, v0, 2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_store_b32 v2, v5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e64 v0, v1
	s_cbranch_execz .LBB0_31
; %bb.30:
	ds_load_b32 v3, v2
.LBB0_31:
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_u16_e32 1, v4
	s_cbranch_execz .LBB0_38
; %bb.32:                               ; %.lr.ph.i
	v_lshrrev_b16 v4, 1, v4
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v4, 0xffff, v4
.LBB0_33:                               ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v0, v4
	s_cbranch_execz .LBB0_37
; %bb.34:                               ;   in Loop: Header=BB0_33 Depth=1
	v_add_nc_u32_e32 v5, v4, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v5, v1
	s_cbranch_execz .LBB0_36
; %bb.35:                               ;   in Loop: Header=BB0_33 Depth=1
	v_lshl_add_u32 v5, v4, 2, v2
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v3, v3, v5
	ds_store_b32 v2, v3
.LBB0_36:                               ; %Flow304
                                        ;   in Loop: Header=BB0_33 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_37:                               ;   in Loop: Header=BB0_33 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_lshrrev_b32_e32 v5, 1, v4
	v_cmp_gt_u32_e32 vcc_lo, 2, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_mov_b32_e32 v4, v5
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_33
.LBB0_38:                               ; %Flow306
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_40
; %bb.39:
	v_mov_b32_e32 v0, 0
	s_load_b64 s[0:1], s[0:1], 0x28
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s16
	s_addc_u32 s1, s1, s17
	v_mul_f32_e32 v1, 0x3e000000, v1
	global_store_b32 v0, v1, s[0:1]
.LBB0_40:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 352
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 37
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii, .Lfunc_end0-_Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2060
; NumSgprs: 39
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 39
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii ; -- Begin function _Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.globl	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
	.p2align	8
	.type	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii,@function
_Z14gpu2ppgppost2lPfS_Piifiiiiiiii:     ; @_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x40
	s_load_b64 s[18:19], s[0:1], 0x38
	s_add_u32 s2, s0, 64
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s3, s15
	s_addc_u32 s3, s1, 0
	s_add_i32 s16, s4, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s16, s19
	s_cbranch_scc1 .LBB1_13
; %bb.1:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x18
	s_load_b64 s[12:13], s[0:1], 0x10
	s_ashr_i32 s17, s16, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[16:17], 2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s19, s8, 1
	s_add_u32 s20, s12, s14
	s_addc_u32 s21, s13, s15
	s_load_b128 s[12:15], s[0:1], 0x0
	s_load_b32 s21, s[20:21], 0x0
	s_add_i32 s20, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s20, s19
	v_cmp_gt_i32_e32 vcc_lo, s1, v0
	s_and_saveexec_b32 s22, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.2:                                ; %.lr.ph
	s_load_b32 s0, s[2:3], 0xc
	v_lshl_add_u32 v1, v0, 2, 0
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v0
	s_mov_b32 s24, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s23, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s25, s23, 2
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, s23, v3
	ds_store_b32 v1, v2
	v_add_nc_u32_e32 v1, s25, v1
	v_cmp_le_i32_e64 s0, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s24, s0, s24
	s_and_not1_b32 exec_lo, exec_lo, s24
	s_cbranch_execnz .LBB1_3
.LBB1_4:                                ; %Flow169
	s_or_b32 exec_lo, exec_lo, s22
	s_ashr_i32 s0, s18, 31
	s_add_i32 s25, s16, s17
	s_add_i32 s22, s18, s0
	s_xor_b32 s25, s25, s17
	s_xor_b32 s22, s22, s0
	s_xor_b32 s0, s17, s0
	v_cvt_f32_u32_e32 v1, s22
	s_sub_i32 s24, 0, s22
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s23, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s24, s24, s23
	s_mul_hi_u32 s24, s23, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s23, s23, s24
	s_mul_hi_u32 s23, s25, s23
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s24, s23, s22
	s_sub_i32 s17, s25, s24
	s_add_i32 s24, s23, 1
	s_sub_i32 s25, s17, s22
	s_cmp_ge_u32 s17, s22
	s_cselect_b32 s23, s24, s23
	s_cselect_b32 s17, s25, s17
	s_add_i32 s24, s23, 1
	s_cmp_ge_u32 s17, s22
	s_mov_b32 s22, 0
	s_cselect_b32 s17, s24, s23
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s17, s17, s0
	s_sub_i32 s17, s17, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s18, s17, s18
	s_mul_i32 s9, s17, s9
	s_sub_i32 s18, s16, s18
	s_mul_i32 s17, s18, s8
	s_mov_b32 s18, exec_lo
	v_cmpx_gt_i32_e64 s21, v0
	s_cbranch_execz .LBB1_7
; %bb.5:                                ; %.lr.ph118
	s_load_b32 s0, s[2:3], 0xc
	v_mov_b32_e32 v1, v0
	s_mul_i32 s6, s7, s6
	s_ashr_i32 s25, s7, 31
	s_mov_b32 s24, s7
	s_add_i32 s4, s9, s4
	s_mul_i32 s16, s6, s16
	s_lshl_b64 s[6:7], s[24:25], 2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s23, s0, 0xffff
.LBB1_6:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v2, s16, v1
	v_add_nc_u32_e32 v1, s23, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s12, v2
	v_add_co_ci_u32_e64 v3, s0, s13, v3, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, s0, v2, s6
	v_add_co_ci_u32_e64 v5, s0, s7, v3, s0
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v5, v[4:5], off
	v_cmp_le_i32_e64 s0, s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_or_b32 s22, s0, s22
	s_waitcnt vmcnt(1)
	v_cvt_i32_f32_e32 v2, v6
	s_waitcnt vmcnt(0)
	v_cvt_i32_f32_e32 v3, v5
	v_cvt_f32_i32_e32 v7, v2
	v_subrev_nc_u32_e32 v2, s17, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v8, s4, v3
	v_cvt_f32_i32_e32 v9, v3
	v_mad_u64_u32 v[3:4], null, v8, s19, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v2, v6, v7 :: v_dual_sub_f32 v5, v5, v9
	v_dual_mul_f32 v4, s5, v2 :: v_dual_sub_f32 v7, 1.0, v5
	v_fma_f32 v2, -v2, s5, s5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v6, s8, v3
	v_lshl_add_u32 v3, v3, 2, 0
	v_mul_f32_e32 v8, v4, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v4, v4, v7 :: v_dual_mul_f32 v5, v5, v2
	v_lshl_add_u32 v6, v6, 2, 0
	v_mul_f32_e32 v2, v2, v7
	ds_add_f32 v6, v8 offset:8
	ds_add_f32 v6, v5 offset:4
	ds_add_f32 v3, v4 offset:4
	ds_add_f32 v3, v2
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB1_6
.LBB1_7:                                ; %Flow167
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_13
; %bb.8:                                ; %.lr.ph122
	s_ashr_i32 s4, s19, 31
	s_mov_b32 s7, 0
	s_add_i32 s0, s19, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s0, s4
	s_load_b32 s0, s[2:3], 0xc
	v_cvt_f32_u32_e32 v1, s5
	s_sub_i32 s2, 0, s5
	s_sub_i32 s3, s11, s9
	s_min_i32 s3, s20, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s0, 0xffff
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, s2, v1
	s_sub_i32 s2, s10, s17
	s_min_i32 s2, s19, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_add_nc_u32_e32 v5, v1, v2
.LBB1_9:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_11 Depth 2
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v0, v1
	v_xor_b32_e32 v2, v2, v1
	v_xor_b32_e32 v1, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v2, v5
	v_mul_lo_u32 v4, v3, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v2, v4
	v_add_nc_u32_e32 v4, 1, v3
	v_subrev_nc_u32_e32 v6, s5, v2
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v3, v4 :: v_dual_cndmask_b32 v2, v2, v6
	v_add_nc_u32_e32 v4, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_cndmask_b32_e32 v2, v3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v1
	v_sub_nc_u32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v1, s19
	v_cmp_gt_i32_e64 s0, s3, v1
	v_sub_nc_u32_e32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_b32 s8, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s8
	s_cbranch_execz .LBB1_12
; %bb.10:                               ;   in Loop: Header=BB1_9 Depth=1
	v_add_nc_u32_e32 v1, s9, v1
	v_lshl_add_u32 v3, v0, 2, 0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v1, s10
	ds_load_b32 v6, v3
	v_add3_u32 v1, v2, s17, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s14, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s15, v2, vcc_lo
	global_load_b32 v4, v[1:2], off
.LBB1_11:                               ; %atomicrmw.start
                                        ;   Parent Loop BB1_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v3, v4, v6
	global_atomic_cmpswap_b32 v3, v[1:2], v[3:4], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v3, v4
	v_mov_b32_e32 v4, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_11
.LBB1_12:                               ; %Flow163
                                        ;   in Loop: Header=BB1_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s1, v0
	s_or_b32 s7, vcc_lo, s7
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB1_9
.LBB1_13:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14gpu2ppgppost2lPfS_Piifiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14gpu2ppgppost2lPfS_Piifiiiiiiii, .Lfunc_end1-_Z14gpu2ppgppost2lPfS_Piifiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1184
; NumSgprs: 28
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii ; -- Begin function _Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.globl	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.p2align	8
	.type	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii,@function
_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii: ; @_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s9, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s9, s2
	s_ashr_i32 s11, s2, 1
	s_cmp_ge_i32 s15, s8
	s_cbranch_scc1 .LBB2_7
; %bb.1:
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s11, v0
	s_cbranch_execz .LBB2_6
; %bb.2:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s18, s[0:1], 0x28
	s_mul_i32 s14, s15, s10
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, v0
	s_add_i32 s16, s14, s9
	v_lshl_add_u32 v1, v0, 1, s14
	s_ashr_i32 s17, s16, 31
	s_mov_b32 s20, 0
	s_lshl_b64 s[16:17], s[16:17], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s16, s12, s16
	s_addc_u32 s17, s13, s17
	s_waitcnt lgkmcnt(0)
	s_and_b32 s14, s2, 0xffff
	s_mul_i32 s18, s15, s18
	s_lshl_b32 s19, s14, 1
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v5, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	global_load_b32 v5, v3, s[16:17]
.LBB2_5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_co_u32 v8, vcc_lo, s12, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	global_load_b32 v2, v[8:9], off
	v_add_nc_u32_e32 v6, 1, v1
	v_add_nc_u32_e32 v1, s19, v1
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s12, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	v_add_nc_u32_e32 v7, s18, v4
	v_add_nc_u32_e32 v4, s14, v4
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s11, v4
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_or_b32 s20, vcc_lo, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s2, s4, v7
	v_add_co_ci_u32_e64 v8, s2, s5, v8, s2
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v5, v5, v2
	s_waitcnt vmcnt(0)
	global_store_b64 v[7:8], v[5:6], off
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB2_3
.LBB2_6:                                ; %Flow83
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_7:                                ; %.loopexit53
	s_cmp_lg_u32 s15, 0
	s_cbranch_scc1 .LBB2_13
; %bb.8:
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s11, v0
	s_cbranch_execz .LBB2_13
; %bb.9:                                ; %.lr.ph56
	s_load_b32 s4, s[0:1], 0x3c
	v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v2, 3, v0
	s_mul_i32 s2, s10, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_add_i32 s0, s2, s9
	v_lshl_add_u32 v1, v0, 1, s2
	v_add_co_u32 v2, s2, v2, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v4, null, 0, s7, s2
	s_ashr_i32 s1, s0, 31
	v_add_co_u32 v3, vcc_lo, v2, 4
	s_lshl_b64 s[0:1], s[0:1], 2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_add_u32 s2, s12, s0
	s_addc_u32 s3, s13, s1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s4, 0xffff
	s_mov_b32 s4, 0
	s_lshl_b32 s5, s1, 1
	s_lshl_b32 s6, s1, 3
.LBB2_10:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v6, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_12
; %bb.11:                               ;   in Loop: Header=BB2_10 Depth=1
	global_load_b32 v6, v5, s[2:3]
.LBB2_12:                               ;   in Loop: Header=BB2_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v7, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v0, s1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v9, vcc_lo, s12, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	v_add_co_u32 v7, vcc_lo, s12, v7
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s11, v0
	s_clause 0x1
	global_load_b32 v2, v[9:10], off
	global_load_b32 v7, v[7:8], off
	s_or_b32 s4, vcc_lo, s4
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v6, v6, v2
	s_waitcnt vmcnt(0)
	global_store_b64 v[3:4], v[6:7], off offset:-4
	v_add_co_u32 v3, s0, v3, s6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB2_10
.LBB2_13:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, .Lfunc_end2-_Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 688
; NumSgprs: 23
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii ; -- Begin function _Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.globl	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
	.p2align	8
	.type	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii,@function
_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii: ; @_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_lshr_b32 s2, s3, 31
	s_add_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s2, s3, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v0, v4, v0 :: v_dual_add_f32 v1, v5, v1
	global_store_b64 v[2:3], v[0:1], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii, .Lfunc_end3-_Z15gpuppcaguard2ylP15HIP_vector_typeIfLj2EES1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii ; -- Begin function _Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.globl	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
	.p2align	8
	.type	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii,@function
_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii: ; @_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
; %bb.0:
	s_clause 0x3
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[16:17], s[0:1], 0x10
	s_load_b32 s14, s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s9, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s9, s2
	s_ashr_i32 s12, s2, 1
	s_cmp_ge_i32 s15, s8
	s_cbranch_scc1 .LBB4_5
; %bb.1:
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB4_4
; %bb.2:                                ; %.lr.ph
	s_lshl_b32 s2, s15, 1
	s_load_b32 s13, s[0:1], 0x3c
	v_mad_u64_u32 v[1:2], null, s2, s14, v[0:1]
	v_dual_mov_b32 v5, v0 :: v_dual_lshlrev_b32 v4, 2, v0
	s_mul_i32 s18, s15, s10
	s_or_b32 s2, s2, 1
	s_mov_b32 s20, 0
	s_mul_i32 s11, s14, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	v_lshl_add_u32 v1, s18, 1, v4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s13, 0xffff
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v3, vcc_lo
	s_lshl_b32 s18, s13, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_lshl_b32 s19, s13, 3
.LBB4_3:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v6, s11, v5
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[12:13], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v12, s2, s16, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v13, s2, s17, v13, s2
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b64 v[8:9], v[3:4], off offset:-4
	global_load_b64 v[6:7], v[6:7], off
	v_add_nc_u32_e32 v10, 2, v1
	v_add_nc_u32_e32 v5, s13, v5
	v_add_co_u32 v3, vcc_lo, v3, s19
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v14, v8 :: v_dual_add_nc_u32 v1, s18, v1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v15, v6
	v_ashrrev_i32_e32 v11, 31, v10
	v_cmp_le_i32_e32 vcc_lo, s12, v5
	v_mov_b32_e32 v6, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_or_b32 s20, vcc_lo, s20
	v_add_co_u32 v10, s2, s16, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s2, s17, v11, s2
	s_clause 0x1
	global_store_b64 v[12:13], v[14:15], off
	global_store_b64 v[10:11], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB4_3
.LBB4_4:                                ; %Flow146
	s_or_b32 exec_lo, exec_lo, s3
.LBB4_5:                                ; %.loopexit
	s_cmp_lg_u32 s15, 0
	s_cbranch_scc0 .LBB4_7
.LBB4_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
.LBB4_7:
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB4_10
; %bb.8:                                ; %.lr.ph99
	s_load_b32 s2, s[0:1], 0x3c
	v_mul_lo_u32 v1, v0, s14
	v_mul_lo_u32 v2, v0, s10
	s_mov_b32 s11, 0
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v4, v0 :: v_dual_lshlrev_b32 v3, 1, v1
	v_add_lshl_u32 v1, s9, v2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v5, s14, v3
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s2, 0xffff
	s_mul_i32 s2, s10, s9
	s_mul_i32 s13, s14, s9
	s_lshl_b32 s10, s2, 1
	s_lshl_b32 s13, s13, 1
.LBB4_9:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v6, s15, v3
	v_add_nc_u32_e32 v8, s15, v5
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v4, s9, v4
	s_add_i32 s15, s15, s13
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s8, v4
	s_clause 0x1
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[8:9], off
	v_lshlrev_b64 v[8:9], 2, v[1:2]
	v_add_nc_u32_e32 v1, s10, v1
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s2, s16, v8
	v_add_co_ci_u32_e64 v9, s2, s17, v9, s2
	s_waitcnt vmcnt(0)
	global_store_b64 v[8:9], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB4_9
.LBB4_10:                               ; %Flow143
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB4_13
; %bb.11:                               ; %.lr.ph101
	s_load_b32 s0, s[0:1], 0x3c
	s_ashr_i32 s15, s14, 31
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 3, v0
	s_lshl_b64 s[16:17], s[14:15], 3
	v_mov_b32_e32 v3, v0
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s8, s3, 3
	s_add_u32 s9, s4, s16
	s_addc_u32 s10, s5, s17
	s_add_u32 s11, s6, s16
	s_addc_u32 s13, s7, s17
.LBB4_12:                               ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v2, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_u32 v8, vcc_lo, s9, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s10, v2, vcc_lo
	v_add_nc_u32_e32 v3, s3, v3
	s_waitcnt vmcnt(0)
	global_store_b64 v[6:7], v[4:5], off
	global_load_b64 v[4:5], v[8:9], off
	v_add_co_u32 v6, vcc_lo, s11, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v2, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s12, v3
	v_add_co_u32 v1, s0, v1, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	global_store_b64 v[6:7], v[4:5], off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB4_12
.LBB4_13:                               ; %Flow141
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_6
; %bb.14:
	s_ashr_i32 s15, s14, 31
	v_mov_b32_e32 v1, 0
	s_lshl_b64 s[0:1], s[14:15], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s4, s0
	s_addc_u32 s3, s5, s1
	s_clause 0x1
	global_load_b32 v0, v1, s[4:5]
	global_load_b32 v2, v1, s[2:3]
	s_ashr_i32 s13, s12, 31
	v_mov_b32_e32 v3, v1
	s_lshl_b64 s[2:3], s[12:13], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(1)
	global_store_b64 v1, v[0:1], s[2:3]
	s_waitcnt vmcnt(0)
	global_store_b64 v1, v[2:3], s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii, .Lfunc_end4-_Z15gpuppccguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1044
; NumSgprs: 23
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii ; -- Begin function _Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.globl	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
	.p2align	8
	.type	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii,@function
_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii: ; @_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	s_mul_i32 s4, s6, s4
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_lshr_b32 s8, s5, 31
	s_mov_b32 s6, exec_lo
	s_add_i32 s8, s5, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s8, s8, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB5_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s11, s7, 31
	s_mov_b32 s10, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[10:11], s[10:11], 3
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_lshlrev_b32_e32 v0, 1, v1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v10, v2 :: v_dual_mov_b32 v11, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v6, v0, s4, 1
	v_mov_b32_e32 v4, v3
	v_add_nc_u32_e32 v8, 2, v6
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_clause 0x1
	global_store_b64 v[6:7], v[10:11], off
	global_store_b64 v[8:9], v[4:5], off
.LBB5_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB5_4
; %bb.3:
	s_ashr_i32 s9, s8, 31
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[8:9], s[8:9], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s2, s8
	s_addc_u32 s3, s3, s9
	s_ashr_i32 s9, s7, 31
	s_mov_b32 s8, s7
	s_lshl_b64 s[6:7], s[8:9], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s2, s6
	s_addc_u32 s7, s3, s7
	s_clause 0x1
	global_load_b32 v0, v2, s[2:3]
	global_load_b32 v1, v2, s[6:7]
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s4, 1
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_waitcnt vmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB5_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii, .Lfunc_end5-_Z15gpuppccguard2ylPfP15HIP_vector_typeIfLj2EEiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_ ; -- Begin function _Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.globl	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
	.p2align	8
	.type	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_,@function
_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_: ; @_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x58
	s_load_b128 s[4:7], s[0:1], 0x40
	s_add_u32 s2, s0, 0x58
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s7, s8, s15
	s_mul_i32 s5, s5, s4
	s_add_i32 s24, s7, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s24, s5
	s_cbranch_scc1 .LBB6_60
; %bb.1:
	s_load_b32 s5, s[2:3], 0xc
	s_load_b256 s[8:15], s[0:1], 0x0
	s_ashr_i32 s25, s24, 31
	v_lshl_add_u32 v5, v0, 2, 0
	s_lshl_b64 s[2:3], s[24:25], 2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s5, 0xffff
	s_add_u32 s2, s10, s2
	s_addc_u32 s3, s11, s3
	s_load_b256 s[16:23], s[0:1], 0x20
	s_load_b32 s26, s[2:3], 0x0
	v_cmp_gt_u32_e64 s2, 8, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB6_4
; %bb.2:                                ; %.lr.ph.preheader
	v_lshl_add_u32 v1, v0, 2, 0
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, v0
	s_mov_b32 s5, 0
	s_lshl_b32 s10, s7, 2
.LBB6_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s7, v3
	ds_store_b32 v1, v2
	v_add_nc_u32_e32 v1, s10, v1
	v_cmp_lt_u32_e32 vcc_lo, 7, v3
	s_or_b32 s5, vcc_lo, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB6_3
.LBB6_4:                                ; %Flow302
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_ne_u32_e64 s3, 0, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_lshl_b32 s11, s7, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s10, s11, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB6_6
; %bb.5:
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s10
	ds_store_b32 v2, v1 offset:32
.LBB6_6:
	s_or_b32 exec_lo, exec_lo, s5
	v_cvt_f32_u32_e32 v1, s7
	s_waitcnt lgkmcnt(0)
	s_add_i32 s27, s26, -1
	s_sub_i32 s28, 0, s7
	s_ashr_i32 s29, s27, 31
	v_rcp_iflag_f32_e32 v1, v1
	s_add_i32 s27, s27, s29
	s_barrier
	s_xor_b32 s27, s27, s29
	buffer_gl0_inv
	v_dual_mov_b32 v6, 0 :: v_dual_mul_f32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s28, s28, s5
	s_mul_hi_u32 s28, s5, s28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s5, s5, s28
	s_mul_hi_u32 s5, s27, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s28, s5, s7
	s_sub_i32 s27, s27, s28
	s_add_i32 s28, s5, 1
	s_sub_i32 s30, s27, s7
	s_cmp_ge_u32 s27, s7
	s_cselect_b32 s5, s28, s5
	s_cselect_b32 s27, s30, s27
	s_add_i32 s28, s5, 1
	s_cmp_ge_u32 s27, s7
	s_cselect_b32 s5, s28, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s5, s29
	s_sub_i32 s27, s5, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s27, 0
	s_cbranch_scc1 .LBB6_53
; %bb.7:                                ; %.lr.ph208
	s_ashr_i32 s5, s4, 31
	s_add_i32 s31, s24, s25
	s_add_i32 s28, s4, s5
	s_xor_b32 s31, s31, s25
	s_xor_b32 s29, s28, s5
	s_xor_b32 s5, s25, s5
	v_cvt_f32_u32_e32 v1, s29
	s_sub_i32 s30, 0, s29
	v_cvt_f32_i32_e32 v8, s21
	v_cvt_f32_i32_e32 v7, s20
	v_lshl_add_u32 v9, v0, 2, 0
	v_rcp_iflag_f32_e32 v1, v1
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v15, 1
	s_mul_i32 s18, s24, s18
                                        ; implicit-def: $vgpr2
	s_waitcnt_depctr 0xfff
	v_dual_mov_b32 v6, 0 :: v_dual_mul_f32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s28, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s30, s30, s28
	s_mul_hi_u32 s30, s28, s30
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s30, s28, s30
	s_mov_b32 s28, 0
	s_mul_hi_u32 s30, s31, s30
	s_mul_i32 s33, s30, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s25, s31, s33
	s_add_i32 s31, s30, 1
	s_sub_i32 s33, s25, s29
	s_cmp_ge_u32 s25, s29
	s_cselect_b32 s21, s31, s30
	s_cselect_b32 s25, s33, s25
	s_add_i32 s30, s21, 1
	s_cmp_ge_u32 s25, s29
	s_cselect_b32 s21, s30, s21
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s21, s21, s5
	s_sub_i32 s5, s21, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s4, s5, s4
	s_mul_i32 s5, s5, s23
	s_sub_i32 s4, s24, s4
	s_sub_i32 s17, s17, s5
	s_mul_i32 s4, s4, s22
	s_add_i32 s5, s5, s16
	s_min_i32 s16, s17, s23
	s_sub_i32 s17, s20, s4
	s_add_i32 s16, s16, s5
	s_min_i32 s17, s17, s22
	v_cvt_f32_i32_e32 v11, s5
	s_add_i32 s17, s17, s4
	v_cvt_f32_i32_e32 v12, s4
	v_cvt_f32_i32_e32 v13, s16
	v_cvt_f32_i32_e32 v14, s17
	s_add_i32 s4, s6, 1
	s_mul_i32 s16, s18, s19
	s_mul_i32 s17, s24, s4
.LBB6_8:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB6_38 Depth 2
	s_mul_i32 s18, s28, s7
	ds_store_b32 v9, v10 offset:32
	v_add_nc_u32_e32 v16, s18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s4, s26, v16
	s_and_saveexec_b32 s20, s4
	s_cbranch_execz .LBB6_36
; %bb.9:                                ;   in Loop: Header=BB6_8 Depth=1
	v_add_nc_u32_e32 v1, s16, v16
	s_mov_b32 s21, 0
                                        ; implicit-def: $sgpr23
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $sgpr25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s19, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[17:18], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s5, s8, v1
	v_add_co_ci_u32_e64 v4, s5, s9, v2, s5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s5, s8, v17
	v_add_co_ci_u32_e64 v2, s5, s9, v18, s5
	s_clause 0x1
	global_load_b32 v20, v[3:4], off
	global_load_b32 v17, v[1:2], off
	s_waitcnt vmcnt(1)
	v_cmp_ge_f32_e64 s5, v20, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s22, s5
	s_xor_b32 s22, exec_lo, s22
	s_cbranch_execz .LBB6_13
; %bb.10:                               ;   in Loop: Header=BB6_8 Depth=1
	v_cmp_ge_f32_e64 s5, v20, v7
                                        ; implicit-def: $sgpr23
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s25, s5
; %bb.11:                               ;   in Loop: Header=BB6_8 Depth=1
	v_sub_f32_e32 v19, v20, v7
	s_mov_b32 s21, exec_lo
	s_mov_b32 s23, 2
; %bb.12:                               ; %Flow293
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s25
	s_mov_b32 s25, 2
	s_and_b32 s21, s21, exec_lo
                                        ; implicit-def: $vgpr20
.LBB6_13:                               ; %Flow292
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_saveexec_b32 s22, s22
	v_dual_mov_b32 v21, s23 :: v_dual_mov_b32 v18, s25
	s_xor_b32 exec_lo, exec_lo, s22
	s_cbranch_execz .LBB6_19
; %bb.14:                               ;   in Loop: Header=BB6_8 Depth=1
	v_cmp_lt_f32_e64 s5, v20, v12
	v_mov_b32_e32 v18, 0
	s_mov_b32 s25, s21
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s23, s5
	s_cbranch_execz .LBB6_18
; %bb.15:                               ;   in Loop: Header=BB6_8 Depth=1
	v_cmp_gt_f32_e64 s5, 0, v20
	s_mov_b32 s25, s21
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr19
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s29, s5
; %bb.16:                               ;   in Loop: Header=BB6_8 Depth=1
	v_add_f32_e32 v18, v20, v7
	s_or_b32 s25, s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s5, v18, v7
	v_cndmask_b32_e64 v19, 0, v18, s5
	v_cndmask_b32_e64 v21, 0, 1, s5
; %bb.17:                               ; %Flow296
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
	v_mov_b32_e32 v18, 1
	s_and_not1_b32 s5, s21, exec_lo
	s_and_b32 s25, s25, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s25, s5, s25
.LBB6_18:                               ; %Flow295
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s5, s21, exec_lo
	s_and_b32 s21, s25, exec_lo
	s_or_b32 s21, s5, s21
.LBB6_19:                               ; %Flow294
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	s_and_saveexec_b32 s5, s21
	s_cbranch_execz .LBB6_21
; %bb.20:                               ; %.sink.split
                                        ;   in Loop: Header=BB6_8 Depth=1
	v_mov_b32_e32 v18, v21
	global_store_b32 v[3:4], v19, off
.LBB6_21:                               ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	v_cmp_ge_f32_e64 s5, v17, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s21, s5
	s_xor_b32 s21, exec_lo, s21
	s_cbranch_execz .LBB6_25
; %bb.22:                               ;   in Loop: Header=BB6_8 Depth=1
	v_cmp_ge_f32_e64 s5, v17, v8
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s22, s5
	s_cbranch_execz .LBB6_24
; %bb.23:                               ;   in Loop: Header=BB6_8 Depth=1
	v_sub_f32_e32 v3, v17, v8
	global_store_b32 v[1:2], v3, off
.LBB6_24:                               ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v18, 6, v18
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr1_vgpr2
.LBB6_25:                               ; %Flow289
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_and_not1_saveexec_b32 s21, s21
	s_cbranch_execz .LBB6_33
; %bb.26:                               ;   in Loop: Header=BB6_8 Depth=1
	v_cmp_lt_f32_e64 s5, v17, v11
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s22, s5
	s_cbranch_execz .LBB6_32
; %bb.27:                               ;   in Loop: Header=BB6_8 Depth=1
	v_cmp_ngt_f32_e64 s5, 0, v17
	v_add_nc_u32_e32 v3, 3, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s23, s5
	s_xor_b32 s5, exec_lo, s23
; %bb.28:                               ;   in Loop: Header=BB6_8 Depth=1
                                        ; implicit-def: $vgpr17
                                        ; implicit-def: $vgpr18
                                        ; implicit-def: $vgpr1_vgpr2
; %bb.29:                               ; %Flow285
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_saveexec_b32 s23, s5
	s_cbranch_execz .LBB6_31
; %bb.30:                               ;   in Loop: Header=BB6_8 Depth=1
	v_add_f32_e32 v4, v17, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s5, v4, v8
	v_cndmask_b32_e64 v3, v18, v3, s5
	v_cndmask_b32_e64 v4, 0, v4, s5
	global_store_b32 v[1:2], v4, off
.LBB6_31:                               ; %Flow286
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	v_mov_b32_e32 v18, v3
.LBB6_32:                               ; %Flow287
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s22
.LBB6_33:                               ;   in Loop: Header=BB6_8 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	v_cmp_ne_u32_e64 s5, 0, v18
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s21, s5
	s_cbranch_execz .LBB6_35
; %bb.34:                               ;   in Loop: Header=BB6_8 Depth=1
	v_dual_mov_b32 v2, v18 :: v_dual_lshlrev_b32 v1, 2, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v1, 0, v1, -4
	ds_add_u32 v1, v15
	ds_store_b32 v9, v15 offset:32
.LBB6_35:                               ; %Flow282
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB6_36:                               ; %Flow297
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
	s_sub_i32 s5, s26, s18
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_min_u32 s20, s5, s7
	s_barrier
	s_cmp_lt_u32 s20, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_41
; %bb.37:                               ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB6_8 Depth=1
	v_mov_b32_e32 v1, v0
	s_mov_b32 s21, 1
.LBB6_38:                               ; %.lr.ph.i
                                        ;   Parent Loop BB6_8 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v4, s21, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, s21, v0, v4
	v_cmp_gt_i32_e64 s5, s20, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s22, s5
	s_cbranch_execz .LBB6_40
; %bb.39:                               ;   in Loop: Header=BB6_38 Depth=2
	v_lshlrev_b32_e32 v4, 3, v4
	s_lshl_b32 s5, s21, 2
	v_lshl_add_u32 v3, v3, 2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v4, s5, 0, v4
	ds_load_b32 v4, v4 offset:28
	ds_load_b32 v17, v3 offset:32
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v17, v4
	ds_store_b32 v3, v4 offset:32
.LBB6_40:                               ;   in Loop: Header=BB6_38 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	v_lshrrev_b32_e32 v1, 1, v1
	s_lshl_b32 s21, s21, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s21, s20
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_38
.LBB6_41:                               ; %_Z7liscan2Pii.exit
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB6_49
; %bb.42:                               ;   in Loop: Header=BB6_8 Depth=1
	ds_load_b32 v1, v9 offset:32
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB6_44
; %bb.43:                               ;   in Loop: Header=BB6_8 Depth=1
	ds_load_b32 v3, v9 offset:28
.LBB6_44:                               ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s4, v1, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 exec_lo, exec_lo, s4
	s_cbranch_execz .LBB6_49
; %bb.45:                               ;   in Loop: Header=BB6_8 Depth=1
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s4, s6, v1
	s_and_saveexec_b32 s21, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s21, exec_lo, s21
	s_cbranch_execz .LBB6_47
; %bb.46:                               ;   in Loop: Header=BB6_8 Depth=1
	v_add_lshl_u32 v3, v1, s17, 1
	v_add_nc_u32_e32 v1, 1, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s4, s14, v3
	v_add_co_ci_u32_e64 v4, s4, s15, v4, s4
	global_store_b64 v[3:4], v[1:2], off
.LBB6_47:                               ; %Flow275
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_and_not1_saveexec_b32 s4, s21
	s_cbranch_execz .LBB6_49
; %bb.48:                               ;   in Loop: Header=BB6_8 Depth=1
	v_mov_b32_e32 v1, s10
	ds_store_b32 v1, v15 offset:32
.LBB6_49:                               ; %Flow278
                                        ;   in Loop: Header=BB6_8 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_eq_u32 s26, s18
	s_cbranch_scc1 .LBB6_51
; %bb.50:                               ;   in Loop: Header=BB6_8 Depth=1
	s_lshl_b32 s4, s20, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s4, 0
	v_mov_b32_e32 v1, s4
	ds_load_b32 v1, v1 offset:28
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v1, v6
.LBB6_51:                               ;   in Loop: Header=BB6_8 Depth=1
	s_add_i32 s4, s28, 1
	s_cmp_eq_u32 s28, s27
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB6_53
; %bb.52:                               ;   in Loop: Header=BB6_8 Depth=1
	s_mov_b32 s28, s4
	s_branch .LBB6_8
.LBB6_53:                               ; %.preheader
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB6_56
; %bb.54:                               ; %.lr.ph210
	v_lshl_add_u32 v1, s24, 3, v0
	s_mov_b32 s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s2, s12, v1
	v_add_co_ci_u32_e64 v2, s2, s13, v2, s2
.LBB6_55:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v3, v5
	v_add_nc_u32_e32 v0, s7, v0
	v_add_nc_u32_e32 v5, s11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e64 s2, 7, v0
	s_or_b32 s5, s2, s5
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[1:2], v3, off
	v_add_co_u32 v1, s3, v1, s11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, s3, 0, v2, s3
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB6_55
.LBB6_56:                               ; %Flow274
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB6_60
; %bb.57:
	v_mov_b32_e32 v0, s10
	ds_load_b32 v0, v0 offset:32
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v0
	s_cbranch_vccnz .LBB6_59
; %bb.58:
	s_load_b64 s[0:1], s[0:1], 0x50
	v_mov_b32_e32 v0, 0
	v_sub_nc_u32_e32 v1, 0, v6
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v6, s[0:1]
	v_mov_b32_e32 v6, v1
.LBB6_59:
	s_lshl_b32 s0, s6, 1
	v_mov_b32_e32 v0, 0
	s_add_i32 s0, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s24, s0
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s14, s0
	s_addc_u32 s1, s15, s1
	global_store_b32 v0, v6, s[0:1]
.LBB6_60:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_, .Lfunc_end6-_Z11gpupppfnd2lPfPiS0_S0_iiiiiiiiiiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2020
; NumSgprs: 36
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_ ; -- Begin function _Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.globl	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
	.p2align	8
	.type	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_,@function
_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_:      ; @_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x40
	s_load_b128 s[16:19], s[0:1], 0x20
	s_add_u32 s20, s0, 64
	v_mov_b32_e32 v1, 0
	s_addc_u32 s21, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s15
	s_mul_i32 s3, s19, s18
	s_add_i32 s14, s2, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s14, s3
	s_cbranch_scc1 .LBB7_26
; %bb.1:
	s_clause 0x1
	s_load_b64 s[12:13], s[0:1], 0x30
	s_load_b256 s[4:11], s[0:1], 0x0
	v_cmp_gt_u32_e64 s2, 8, v0
	v_lshl_add_u32 v5, v0, 2, 0
	v_lshl_or_b32 v1, s14, 3, v0
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_3)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB7_3
; %bb.2:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v2
.LBB7_3:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_eq_u32_e64 s3, 0, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s15, s3
	s_cbranch_execz .LBB7_5
; %bb.4:
	v_mov_b32_e32 v3, 0
	ds_store_b32 v3, v3 offset:32
.LBB7_5:
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v3, v0
	s_mov_b32 s15, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB7_6:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_mul_lo_u32 v6, s15, v3
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v4, s15, v0, v6
	v_cmpx_gt_i32_e32 8, v4
	s_cbranch_execz .LBB7_8
; %bb.7:                                ;   in Loop: Header=BB7_6 Depth=1
	v_lshlrev_b32_e32 v6, 3, v6
	s_lshl_b32 s19, s15, 2
	v_lshl_add_u32 v4, v4, 2, 0
	s_add_i32 s19, s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v6, s19, v6, -4
	ds_load_b32 v6, v6
	ds_load_b32 v7, v4
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v4, v6
.LBB7_8:                                ;   in Loop: Header=BB7_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	v_lshrrev_b32_e32 v3, 1, v3
	s_lshl_b32 s15, s15, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s15, 8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB7_6
; %bb.9:                                ; %_Z7liscan2Pii.exit
	s_and_saveexec_b32 s15, s2
	s_cbranch_execz .LBB7_11
; %bb.10:
	ds_load_b32 v3, v5
	s_waitcnt lgkmcnt(0)
	v_sub_nc_u32_e32 v2, v3, v2
	ds_store_b32 v5, v2
.LBB7_11:
	s_or_b32 exec_lo, exec_lo, s15
	s_add_i32 s18, s13, 1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s18, s18, s14
	s_barrier
	s_lshl_b32 s22, s18, 1
	buffer_gl0_inv
	s_ashr_i32 s23, s22, 31
	s_mov_b32 s15, exec_lo
	s_lshl_b64 s[22:23], s[22:23], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s10, s22
	s_addc_u32 s23, s11, s23
	s_load_b32 s13, s[22:23], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s13, v0
	s_cbranch_execz .LBB7_20
; %bb.12:                               ; %.lr.ph81
	s_load_b32 s22, s[20:21], 0xc
	s_add_i32 s18, s18, 1
	s_cmp_gt_i32 s16, 0
	v_dual_mov_b32 v6, 1 :: v_dual_mov_b32 v7, 0
	s_mul_i32 s20, s12, s16
	s_mul_i32 s23, s17, s16
	s_cselect_b32 s21, -1, 0
	s_mov_b32 s19, 0
	s_mul_i32 s20, s20, s14
	s_mul_i32 s14, s23, s14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s22, s22, 0xffff
	s_add_u32 s4, s4, -4
	s_addc_u32 s5, s5, -1
.LBB7_13:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB7_18 Depth 2
	v_add_lshl_u32 v2, s18, v0, 1
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v3, 2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v3, 0, v3, -4
	ds_add_rtn_u32 v3, v3, v6
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 s12, v3
	s_xor_b32 s23, exec_lo, s23
	s_cbranch_execz .LBB7_15
; %bb.14:                               ;   in Loop: Header=BB7_13 Depth=1
                                        ; implicit-def: $vgpr2_vgpr3
	ds_store_b32 v7, v6 offset:32
                                        ; implicit-def: $vgpr3
.LBB7_15:                               ; %Flow121
                                        ;   in Loop: Header=BB7_13 Depth=1
	s_and_not1_saveexec_b32 s23, s23
	s_cbranch_execz .LBB7_19
; %bb.16:                               ; %.preheader
                                        ;   in Loop: Header=BB7_13 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_cbranch_vccnz .LBB7_19
; %bb.17:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB7_13 Depth=1
	v_ashrrev_i32_e32 v8, 31, v2
	v_add_nc_u32_e32 v3, s20, v3
	s_mov_b32 s24, s14
	s_mov_b32 s25, s16
.LBB7_18:                               ; %.lr.ph
                                        ;   Parent Loop BB7_13 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ashr_i32 s26, s24, 31
	v_add_co_u32 v9, vcc_lo, v2, s24
	v_add_co_ci_u32_e32 v10, vcc_lo, s26, v8, vcc_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s25, s25, -1
	s_add_i32 s24, s24, s17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_cmp_eq_u32 s25, 0
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	global_load_b32 v11, v[9:10], off
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, s12, v3
	v_add_co_u32 v9, vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[9:10], v11, off
	s_cbranch_scc0 .LBB7_18
.LBB7_19:                               ; %.loopexit
                                        ;   in Loop: Header=BB7_13 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	v_add_nc_u32_e32 v0, s22, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s13, v0
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB7_13
.LBB7_20:                               ; %Flow123
	s_or_b32 exec_lo, exec_lo, s15
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB7_22
; %bb.21:
	ds_load_b32 v3, v5
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB7_22:
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v1, 0
	s_and_saveexec_b32 s2, s3
	s_cbranch_execz .LBB7_25
; %bb.23:
	v_mov_b32_e32 v1, 0
	ds_load_b32 v0, v1 offset:32
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v0
	s_cbranch_vccnz .LBB7_25
; %bb.24:
	v_mov_b32_e32 v0, 0
	ds_load_b32 v0, v0 offset:28
	s_waitcnt lgkmcnt(0)
	v_max_i32_e32 v1, 0, v0
.LBB7_25:                               ; %Flow118
	s_or_b32 exec_lo, exec_lo, s2
.LBB7_26:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 0, v1
	s_cbranch_execz .LBB7_28
; %bb.27:
	s_load_b64 s[0:1], s[0:1], 0x38
	v_mov_b32_e32 v0, 0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB7_28:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 27
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_, .Lfunc_end7-_Z11gpupppmov2lPfS_PiS0_iiiiiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1028
; NumSgprs: 29
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 29
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8nciscan2PiS_S_S_ii   ; -- Begin function _Z8nciscan2PiS_S_S_ii
	.globl	_Z8nciscan2PiS_S_S_ii
	.p2align	8
	.type	_Z8nciscan2PiS_S_S_ii,@function
_Z8nciscan2PiS_S_S_ii:                  ; @_Z8nciscan2PiS_S_S_ii
; %bb.0:
	s_mov_b32 s12, s15
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[14:15], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	v_lshl_add_u32 v4, v0, 2, 0
                                        ; implicit-def: $vgpr1
                                        ; implicit-def: $vgpr3
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s13, s12, s3
	v_add_nc_u32_e32 v2, s13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s14, v2
	s_and_saveexec_b32 s16, s2
	s_cbranch_execz .LBB8_2
; %bb.1:
	s_add_i32 s15, s15, -1
	v_lshlrev_b32_e32 v7, 3, v2
	s_mul_i32 s15, s15, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v5, v2, s15, 3
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_clause 0x3
	global_load_b32 v1, v[5:6], off offset:16
	global_load_b32 v3, v[7:8], off offset:16
	global_load_b32 v7, v[7:8], off offset:4
	global_load_b32 v5, v[5:6], off offset:28
	v_lshl_add_u32 v6, s3, 2, v4
	s_waitcnt vmcnt(1)
	v_sub_nc_u32_e32 v3, v3, v7
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v1, v5, v1
	ds_store_b32 v4, v3
	ds_store_b32 v6, v1
.LBB8_2:
	s_or_b32 exec_lo, exec_lo, s16
	s_load_b32 s0, s[0:1], 0x28
	s_sub_i32 s1, s14, s13
	s_mov_b32 s5, 1
	s_min_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_u32 s1, 1
	s_barrier
	s_cselect_b32 s4, -1, 0
	s_cmp_lt_u32 s1, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB8_7
; %bb.3:                                ; %.lr.ph.i.preheader
	v_mov_b32_e32 v5, v0
.LBB8_4:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, s5, v5
	s_mov_b32 s13, exec_lo
	v_add3_u32 v6, s5, v0, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s1, v6
	s_cbranch_execz .LBB8_6
; %bb.5:                                ;   in Loop: Header=BB8_4 Depth=1
	v_lshlrev_b32_e32 v7, 3, v7
	s_lshl_b32 s14, s5, 2
	v_lshl_add_u32 v6, v6, 2, 0
	s_add_i32 s14, s14, 0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v7, s14, v7, -4
	ds_load_b32 v7, v7
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v6, v7
.LBB8_6:                                ;   in Loop: Header=BB8_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_lshrrev_b32_e32 v5, 1, v5
	s_lshl_b32 s5, s5, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, s1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB8_4
.LBB8_7:                                ; %_Z7liscan2Pii.exit
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB8_12
; %bb.8:                                ; %.lr.ph.i79.preheader
	s_lshl_b32 s4, s3, 2
	v_mov_b32_e32 v5, v0
	s_add_i32 s4, s4, 0
	s_mov_b32 s13, 1
	s_add_i32 s5, s4, -4
.LBB8_9:                                ; %.lr.ph.i79
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, s13, v5
	s_mov_b32 s14, exec_lo
	v_add3_u32 v6, s13, v0, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s1, v6
	s_cbranch_execz .LBB8_11
; %bb.10:                               ;   in Loop: Header=BB8_9 Depth=1
	v_lshlrev_b32_e32 v7, 3, v7
	s_lshl_b32 s15, s13, 2
	v_lshl_add_u32 v6, v6, 2, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v7, s15, s5, v7
	ds_load_b32 v7, v7
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	ds_store_b32 v6, v7
.LBB8_11:                               ;   in Loop: Header=BB8_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_lshrrev_b32_e32 v5, 1, v5
	s_lshl_b32 s13, s13, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s13, s1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB8_9
.LBB8_12:                               ; %_Z7liscan2Pii.exit83
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB8_14
; %bb.13:
	v_lshl_add_u32 v5, s3, 2, v4
	ds_load_b32 v9, v4
	v_lshl_add_u32 v4, v2, 1, v2
	ds_load_b32 v2, v5
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	v_add_co_u32 v7, vcc_lo, s6, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s8, v5
	s_waitcnt lgkmcnt(1)
	v_sub_nc_u32_e32 v4, v9, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_sub_nc_u32_e32 v2, v2, v1
	global_store_b64 v[7:8], v[3:4], off
	global_store_b64 v[5:6], v[1:2], off
.LBB8_14:
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB8_18
; %bb.15:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v2, 0
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB8_17
; %bb.16:
	s_lshl_b32 s1, s1, 2
	s_lshl_b32 s2, s3, 2
	s_add_i32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s1, -4
	s_add_i32 s2, s1, s2
	v_mov_b32_e32 v1, s1
	v_mov_b32_e32 v3, s2
	ds_load_b32 v2, v1
	ds_load_b32 v1, v3
.LBB8_17:
	s_mov_b32 s13, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[12:13], 2
	s_add_u32 s2, s10, s2
	s_addc_u32 s3, s11, s3
	s_add_i32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[12:13], 2
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_waitcnt lgkmcnt(1)
	global_store_b32 v0, v2, s[2:3]
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB8_18:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8nciscan2PiS_S_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z8nciscan2PiS_S_S_ii, .Lfunc_end8-_Z8nciscan2PiS_S_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 888
; NumSgprs: 19
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_ ; -- Begin function _Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.globl	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
	.p2align	8
	.type	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_,@function
_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_: ; @_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[24:27], s[0:1], 0x38
	s_load_b32 s30, s[0:1], 0x48
	s_mov_b32 s2, 0
	s_mov_b32 s4, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s25
	s_cbranch_scc1 .LBB9_21
; %bb.1:
	s_load_b32 s2, s[0:1], 0x64
	s_add_i32 s3, s25, -1
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x20
	s_load_b256 s[16:23], s[0:1], 0x0
	s_mov_b32 s33, 0
	s_mov_b32 s35, 0
	s_mov_b32 s14, 0
	s_mov_b32 s13, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s31, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s31
	s_sub_i32 s2, 0, s31
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s28, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s2, s28
	s_mul_hi_u32 s2, s28, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s28, s28, s2
	s_mul_hi_u32 s2, s3, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s10, s2, s31
	s_add_i32 s11, s2, 1
	s_sub_i32 s10, s3, s10
	s_mov_b32 s3, 1
	s_sub_i32 s12, s10, s31
	s_cmp_ge_u32 s10, s31
	s_cselect_b32 s2, s11, s2
	s_cselect_b32 s10, s12, s10
	s_add_i32 s11, s2, 1
	s_cmp_ge_u32 s10, s31
	s_cselect_b32 s2, s11, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s12, s2, 1
	s_cmp_lt_i32 s12, 2
	s_cbranch_scc1 .LBB9_4
; %bb.2:                                ; %.lr.ph.preheader
	s_mul_hi_u32 s13, s15, s28
	s_mov_b32 s10, s8
	s_mul_i32 s14, s13, s31
	s_add_i32 s28, s13, 1
	s_sub_i32 s14, s15, s14
	s_mov_b32 s11, s9
	s_sub_i32 s29, s14, s31
	s_cmp_ge_u32 s14, s31
	s_cselect_b32 s13, s28, s13
	s_cselect_b32 s14, s29, s14
	s_add_i32 s28, s13, 1
	s_cmp_ge_u32 s14, s31
	s_mov_b32 s14, 0
	s_cselect_b32 s28, s28, s13
	s_mov_b32 s13, 0
.LBB9_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_load_b32 s29, s[10:11], 0x0
	s_add_i32 s36, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s37, s36, 31
	s_lshl_b64 s[36:37], s[36:37], 2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s13, s29, s13
	s_add_u32 s36, s8, s36
	s_addc_u32 s37, s9, s37
	s_load_b32 s29, s[36:37], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s14, s29, s14
	s_cmp_eq_u32 s28, s3
	s_cselect_b32 s35, s13, s35
	s_cselect_b32 s33, s14, s33
	s_add_i32 s3, s3, 1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lt_i32 s3, s12
	s_cbranch_scc1 .LBB9_3
.LBB9_4:                                ; %._crit_edge
	s_ashr_i32 s3, s2, 31
	s_mul_i32 s10, s15, 3
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	s_load_b32 s11, s[2:3], 0x0
	s_lshl_b32 s2, s12, 1
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[28:29], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s2, s11, s13
	s_add_u32 s3, s8, s28
	s_addc_u32 s8, s9, s29
	s_add_u32 s12, s3, -4
	s_addc_u32 s13, s8, -1
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[28:29], s[10:11], 2
	s_add_u32 s8, s4, s28
	s_addc_u32 s9, s5, s29
	s_load_b64 s[8:9], s[8:9], 0x0
	s_load_b32 s34, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s11, s9, s35
	s_add_u32 s12, s6, s28
	s_addc_u32 s13, s7, s29
	s_lshl_b32 s28, s15, 3
	s_load_b64 s[12:13], s[12:13], 0x0
	s_ashr_i32 s29, s28, 31
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[36:37], s[28:29], 2
	s_barrier
	s_add_u32 s36, s22, s36
	s_addc_u32 s37, s23, s37
	buffer_gl0_inv
	s_load_b32 s29, s[36:37], 0x4
	s_sub_i32 s3, s2, s11
	s_mov_b32 s37, exec_lo
	s_min_i32 s36, s8, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s36, v0
	s_cbranch_execz .LBB9_10
; %bb.5:                                ; %.preheader146.lr.ph
	s_mul_i32 s3, s15, s27
	s_cmp_gt_i32 s24, 0
	s_mul_i32 s3, s3, s24
	v_add3_u32 v1, s9, s35, v0
	s_waitcnt lgkmcnt(0)
	v_add3_u32 v6, s3, s29, v0
	v_mov_b32_e32 v7, v0
	s_cselect_b32 s9, -1, 0
	s_ashr_i32 s3, s2, 31
	s_mov_b32 s35, 0
	s_lshl_b64 s[2:3], s[2:3], 2
.LBB9_6:                                ; %.preheader146
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB9_8 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB9_9
; %bb.7:                                ; %.lr.ph156
                                        ;   in Loop: Header=BB9_6 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v4, v6
	s_mov_b32 s38, s24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s18, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s19, v3, vcc_lo
.LBB9_8:                                ;   Parent Loop BB9_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s38, s38, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s38, 0
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_add_nc_u32_e32 v4, s27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s16, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v9, vcc_lo
	global_load_b32 v5, v[8:9], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v5, off
	v_add_co_u32 v2, vcc_lo, v2, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_cbranch_scc1 .LBB9_8
.LBB9_9:                                ; %._crit_edge157
                                        ;   in Loop: Header=BB9_6 Depth=1
	v_add_nc_u32_e32 v7, s31, v7
	v_add_nc_u32_e32 v1, s31, v1
	v_add_nc_u32_e32 v6, s31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s36, v7
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB9_6
.LBB9_10:                               ; %Flow236
	s_or_b32 exec_lo, exec_lo, s37
	v_cmp_gt_u32_e64 s2, 3, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB9_12
; %bb.11:
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s10, v0
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s9, s11, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add3_u32 v1, v0, s28, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s22, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s23, v2, vcc_lo
	global_load_b32 v5, v[1:2], off
	v_add_co_u32 v1, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, s9, v5
	global_store_b32 v[1:2], v3, off
.LBB9_12:
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s3, s26, -1
	v_mov_b32_e32 v1, 0
	s_mul_i32 s3, s3, s25
	s_add_i32 s14, s34, s14
	s_add_i32 s15, s3, s15
	s_add_i32 s3, s13, s33
	s_lshl_b32 s4, s15, 3
	s_mov_b32 s9, exec_lo
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[18:19], s[4:5], 2
	s_add_u32 s18, s22, s18
	s_addc_u32 s19, s23, s19
	s_sub_i32 s5, s14, s3
	global_load_b32 v6, v1, s[18:19] offset:16
	s_min_i32 s5, s12, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s5, v0
	s_cbranch_execz .LBB9_18
; %bb.13:                               ; %.preheader.lr.ph
	s_mul_i32 s18, s27, s24
	s_cmp_gt_i32 s24, 0
	s_mul_i32 s18, s18, s15
	v_add3_u32 v1, s13, s33, v0
	s_waitcnt vmcnt(0)
	v_add3_u32 v7, s18, v6, v0
	v_mov_b32_e32 v8, v0
	s_cselect_b32 s13, -1, 0
	s_ashr_i32 s15, s14, 31
	s_mov_b32 s18, 0
	s_lshl_b64 s[14:15], s[14:15], 2
.LBB9_14:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB9_16 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB9_17
; %bb.15:                               ; %.lr.ph161
                                        ;   in Loop: Header=BB9_14 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v4, v7
	s_mov_b32 s19, s24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s20, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo
.LBB9_16:                               ;   Parent Loop BB9_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s19, 0
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	v_add_nc_u32_e32 v4, s27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s16, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v10, vcc_lo
	global_load_b32 v5, v[9:10], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v5, off
	v_add_co_u32 v2, vcc_lo, v2, s14
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	s_cbranch_scc1 .LBB9_16
.LBB9_17:                               ; %._crit_edge162
                                        ;   in Loop: Header=BB9_14 Depth=1
	v_add_nc_u32_e32 v8, s31, v8
	v_add_nc_u32_e32 v1, s31, v1
	v_add_nc_u32_e32 v7, s31, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v8
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB9_14
.LBB9_18:                               ; %Flow232
	s_or_b32 exec_lo, exec_lo, s9
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB9_20
; %bb.19:
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s10, v0
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v5, s3, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add3_u32 v1, v0, s4, 5
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v5, v2
	global_store_b32 v[0:1], v2, off
.LBB9_20:
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s4, s11, s8
	s_add_i32 s2, s3, s12
.LBB9_21:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_max_i32 s2, s4, s2
	s_cmp_le_i32 s2, s30
	s_cbranch_scc1 .LBB9_23
; %bb.22:
	s_load_b64 s[0:1], s[0:1], 0x50
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB9_23:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 39
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_, .Lfunc_end9-_Z11gpupppbuf2lPfS_S_PiS0_S0_S0_iiiiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1388
; NumSgprs: 41
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 41
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_ ; -- Begin function _Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.globl	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
	.p2align	8
	.type	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_,@function
_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_: ; @_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x70
	s_load_b128 s[24:27], s[0:1], 0x48
	s_add_u32 s2, s0, 0x70
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s15
	s_mul_i32 s40, s27, s26
	s_add_i32 s6, s4, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s6, s40
	s_cbranch_scc1 .LBB10_130
; %bb.1:
	s_load_b32 s2, s[2:3], 0xc
	s_load_b512 s[8:23], s[0:1], 0x0
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_and_b32 s34, s2, 0xffff
	s_lshl_b64 s[2:3], s[6:7], 2
	s_lshl_b32 s4, s34, 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s33, s4, 0
	s_add_u32 s16, s16, s2
	s_addc_u32 s17, s17, s3
	s_ashr_i32 s2, s26, 31
	s_add_i32 s28, s6, s7
	s_add_i32 s3, s26, s2
	s_xor_b32 s30, s28, s7
	s_xor_b32 s3, s3, s2
	s_load_b64 s[28:29], s[0:1], 0x58
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s5, 0, s3
	s_xor_b32 s2, s7, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s4, v1
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s5, s4, s5
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s4, s30, s4
	s_mul_i32 s5, s4, s3
	s_add_i32 s7, s4, 1
	s_sub_i32 s5, s30, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s30, s5, s3
	s_cmp_ge_u32 s5, s3
	s_cselect_b32 s4, s7, s4
	s_cselect_b32 s5, s30, s5
	s_add_i32 s7, s4, 1
	s_cmp_ge_u32 s5, s3
	s_mov_b32 s5, 0
	s_cselect_b32 s3, s7, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	s_sub_i32 s37, s3, s2
	v_cmp_ne_u32_e64 s3, 0, v0
	v_cmp_eq_u32_e64 s2, 0, v0
	s_mul_i32 s30, s37, s26
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_sub_i32 s4, s6, s30
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB10_3
; %bb.2:
	s_add_i32 s31, s4, 1
	v_mov_b32_e32 v10, s33
	s_cmp_ge_i32 s31, s26
	s_cselect_b32 s35, s26, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s31, s31, s35
	s_cmp_lt_i32 s4, 1
	s_cselect_b32 s35, s26, 0
	s_add_i32 s36, s30, s26
	s_add_i32 s35, s4, s35
	s_lshl_b32 s38, s26, 1
	s_add_i32 s35, s35, -1
	s_add_i32 s39, s31, s30
	s_add_i32 s30, s35, s30
	s_sub_i32 s38, s36, s38
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s39
	s_add_i32 s39, s4, s36
	s_add_i32 s41, s31, s36
	v_dual_mov_b32 v3, s30 :: v_dual_mov_b32 v4, s39
	s_add_i32 s30, s35, s36
	s_add_i32 s36, s4, s38
	v_dual_mov_b32 v5, s41 :: v_dual_mov_b32 v6, s30
	s_add_i32 s30, s31, s38
	s_add_i32 s31, s35, s38
	v_dual_mov_b32 v7, s36 :: v_dual_mov_b32 v8, s30
	v_mov_b32_e32 v9, s31
	ds_store_2addr_b32 v1, v2, v3 offset1:1
	ds_store_2addr_b32 v1, v4, v5 offset0:2 offset1:3
	ds_store_2addr_b32 v1, v6, v7 offset0:4 offset1:5
	ds_store_2addr_b32 v1, v8, v9 offset0:6 offset1:7
	ds_store_2addr_b32 v10, v1, v1 offset0:16 offset1:17
.LBB10_3:
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_eq_u32 s37, 0
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s7, -1, 0
	s_cmp_lg_u32 s37, 0
	s_barrier
	s_cselect_b32 s35, -1, 0
	buffer_gl0_inv
	s_and_b32 vcc_lo, exec_lo, s35
                                        ; implicit-def: $sgpr36
	s_cbranch_vccnz .LBB10_7
; %bb.4:
	s_mul_i32 s30, s26, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s31, s30, 31
	s_lshl_b64 s[30:31], s[30:31], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s5, s22, s30
	s_addc_u32 s31, s23, s31
	s_add_u32 s30, s5, -4
	s_addc_u32 s31, s31, -1
	s_cmp_lt_i32 s4, 1
	s_load_b32 s36, s[30:31], 0x0
	s_cbranch_scc1 .LBB10_6
; %bb.5:
	s_mul_i32 s30, s4, 3
	s_mov_b32 s31, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[30:31], s[30:31], 2
	s_add_u32 s5, s22, s30
	s_addc_u32 s31, s23, s31
	s_add_u32 s30, s5, -4
	s_addc_u32 s31, s31, -1
	s_load_b32 s5, s[30:31], 0x0
	s_branch .LBB10_7
.LBB10_6:
	s_mov_b32 s5, 0
.LBB10_7:
	s_load_b64 s[30:31], s[0:1], 0x40
	s_add_i32 s38, s27, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s37, s38
	s_cselect_b32 s27, -1, 0
	s_cmp_lg_u32 s37, s38
	s_cselect_b32 s37, -1, 0
	s_and_b32 vcc_lo, exec_lo, s37
	s_cbranch_vccnz .LBB10_10
; %bb.8:
	s_mul_i32 s38, s26, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s39, s38, 31
	s_lshl_b64 s[38:39], s[38:39], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s38, s30, s38
	s_addc_u32 s39, s31, s39
	s_add_u32 s38, s38, -4
	s_addc_u32 s39, s39, -1
	s_cmp_lt_i32 s4, 1
	s_load_b32 s38, s[38:39], 0x0
	s_cbranch_scc1 .LBB10_11
; %bb.9:
	s_mul_i32 s42, s4, 3
	s_mov_b32 s43, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[42:43], s[42:43], 2
	s_add_u32 s4, s30, s42
	s_addc_u32 s39, s31, s43
	s_add_u32 s42, s4, -4
	s_addc_u32 s43, s39, -1
	s_load_b32 s43, s[42:43], 0x0
	s_branch .LBB10_12
.LBB10_10:
	s_mov_b32 s43, 0
                                        ; implicit-def: $sgpr38
	s_branch .LBB10_12
.LBB10_11:
	s_mov_b32 s43, 0
.LBB10_12:
	s_load_b32 s39, s[16:17], 0x0
	v_cmp_gt_u32_e64 s4, 8, v0
	v_mov_b32_e32 v1, 0
	v_lshl_add_u32 v6, v0, 2, 0
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_4)
	s_and_saveexec_b32 s41, s4
	s_cbranch_execz .LBB10_34
; %bb.13:
	ds_load_b32 v4, v6
	s_mov_b32 s42, exec_lo
                                        ; implicit-def: $vgpr1
                                        ; implicit-def: $vgpr7
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e32 -1, v4
	s_xor_b32 s42, exec_lo, s42
	s_cbranch_execz .LBB10_27
; %bb.14:
	s_mov_b32 s44, exec_lo
                                        ; implicit-def: $vgpr1
                                        ; implicit-def: $vgpr7
	v_cmpx_le_i32_e64 s40, v4
	s_xor_b32 s44, exec_lo, s44
	s_cbranch_execz .LBB10_20
; %bb.15:
	v_subrev_nc_u32_e32 v1, s40, v4
	s_mov_b32 s40, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, v1, 1, v1
	v_cmpx_gt_u32_e32 3, v0
	s_xor_b32 s40, exec_lo, s40
; %bb.16:                               ; %._crit_edge476
	v_lshl_add_u32 v2, v1, 1, v1
; %bb.17:                               ; %Flow623
	s_or_saveexec_b32 s40, s40
	v_mov_b32_e32 v1, s43
	s_xor_b32 exec_lo, exec_lo, s40
	s_cbranch_execz .LBB10_19
; %bb.18:
	v_ashrrev_i32_e32 v1, 31, v2
	v_add_co_u32 v3, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v1, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s30, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v4, vcc_lo
	global_load_b32 v1, v[3:4], off offset:-12
.LBB10_19:
	s_or_b32 exec_lo, exec_lo, s40
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v2, vcc_lo, v0, v2
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s30, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s31, v3, vcc_lo
	global_load_b32 v2, v[2:3], off offset:-8
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v2, v1
.LBB10_20:                              ; %Flow625
	s_and_not1_saveexec_b32 s30, s44
	s_cbranch_execz .LBB10_26
; %bb.21:
	v_lshlrev_b32_e32 v1, 3, v4
                                        ; implicit-def: $vgpr3
	s_and_saveexec_b32 s31, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s31, exec_lo, s31
	s_cbranch_execz .LBB10_23
; %bb.22:
	v_lshlrev_b32_e32 v1, 3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v1
	v_add_co_u32 v2, vcc_lo, v0, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s18, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s19, v3, vcc_lo
	global_load_b32 v3, v[2:3], off offset:-4
.LBB10_23:                              ; %Flow624
	s_and_not1_saveexec_b32 s31, s31
	s_cbranch_execz .LBB10_25
; %bb.24:                               ; %._crit_edge477
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v3, 0
.LBB10_25:
	s_or_b32 exec_lo, exec_lo, s31
	v_or_b32_e32 v1, v1, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s18, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s19, v2, vcc_lo
	s_mul_i32 s18, s28, s24
	global_load_b32 v5, v[1:2], off
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[1:2], null, s18, v4, v[3:4]
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v5, v3
.LBB10_26:                              ; %Flow626
	s_or_b32 exec_lo, exec_lo, s30
                                        ; implicit-def: $vgpr4
.LBB10_27:                              ; %Flow630
	s_and_not1_saveexec_b32 s18, s42
	s_cbranch_execz .LBB10_33
; %bb.28:
	v_add_nc_u32_e32 v1, s26, v4
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, v1, 1, v1
	v_cmpx_gt_u32_e32 6, v0
	s_xor_b32 s19, exec_lo, s19
; %bb.29:                               ; %._crit_edge478
	v_lshl_add_u32 v2, v1, 1, v1
; %bb.30:                               ; %Flow628
	s_or_saveexec_b32 s19, s19
	v_mov_b32_e32 v1, s5
	s_xor_b32 exec_lo, exec_lo, s19
	s_cbranch_execz .LBB10_32
; %bb.31:
	v_ashrrev_i32_e32 v1, 31, v2
	v_add_co_u32 v3, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v1, vcc_lo
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s22, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s23, v4, vcc_lo
	global_load_b32 v1, v[3:4], off offset:-24
.LBB10_32:
	s_or_b32 exec_lo, exec_lo, s19
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v2, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b32 v2, v[2:3], off offset:-20
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v7, v2, v1
.LBB10_33:                              ; %Flow631
	s_or_b32 exec_lo, exec_lo, s18
	ds_store_b32 v6, v7 offset:32
.LBB10_34:                              ; %Flow632
	s_or_b32 exec_lo, exec_lo, s41
	v_mov_b32_e32 v2, v0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s5, 1
	s_barrier
	buffer_gl0_inv
.LBB10_35:                              ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_mul_lo_u32 v4, s5, v2
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, s5, v0, v4
	v_cmpx_gt_i32_e32 8, v3
	s_cbranch_execz .LBB10_37
; %bb.36:                               ;   in Loop: Header=BB10_35 Depth=1
	v_lshlrev_b32_e32 v4, 3, v4
	s_lshl_b32 s19, s5, 2
	v_lshl_add_u32 v3, v3, 2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v4, s19, 0, v4
	ds_load_b32 v4, v4 offset:28
	ds_load_b32 v5, v3 offset:32
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	ds_store_b32 v3, v4 offset:32
.LBB10_37:                              ;   in Loop: Header=BB10_35 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	v_lshrrev_b32_e32 v2, 1, v2
	s_lshl_b32 s5, s5, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 8
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB10_35
; %bb.38:                               ; %_Z7liscan2Pii.exit
	v_mov_b32_e32 v8, 0
	v_cvt_f32_u32_e32 v2, s34
	s_add_i32 s18, s29, 1
	s_mul_i32 s42, s25, s24
	s_mul_i32 s18, s18, s6
	ds_load_b32 v3, v8 offset:60
	v_rcp_iflag_f32_e32 v2, v2
	s_lshl_b32 s22, s18, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s23, s22, 31
	s_lshl_b64 s[30:31], s[22:23], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_u32 s30, s20, s30
	s_addc_u32 s31, s21, s31
	s_sub_i32 s19, 0, s34
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	v_cvt_u32_f32_e32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s23, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s26, v2
	s_add_i32 s5, s23, -1
	s_delay_alu instid0(VALU_DEP_1)
	s_mul_i32 s19, s19, s26
	s_ashr_i32 s22, s5, 31
	s_mul_hi_u32 s19, s26, s19
	s_add_i32 s5, s5, s22
	s_add_i32 s26, s26, s19
	s_xor_b32 s5, s5, s22
	s_load_b32 s19, s[30:31], 0x0
	s_mul_hi_u32 s29, s5, s26
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s40, s29, s34
	s_add_i32 s30, s29, 1
	s_sub_i32 s5, s5, s40
	s_sub_i32 s31, s5, s34
	s_cmp_ge_u32 s5, s34
	s_cselect_b32 s29, s30, s29
	s_cselect_b32 s5, s31, s5
	s_add_i32 s30, s29, 1
	s_cmp_ge_u32 s5, s34
	s_cselect_b32 s5, s30, s29
	s_mov_b32 s30, 0
	s_xor_b32 s5, s5, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s29, s5, s22
	s_mul_i32 s22, s42, s6
	s_cmp_lt_i32 s29, 0
	s_cbranch_scc1 .LBB10_94
; %bb.39:                               ; %.lr.ph455
	v_cmp_lt_i32_e64 s5, 0, v7
	v_dual_mov_b32 v10, 1 :: v_dual_add_nc_u32 v9, v1, v7
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s31, s39, s19
	s_add_i32 s40, s18, 1
	v_mov_b32_e32 v11, v0
	s_cmp_gt_i32 s24, 0
	s_mul_i32 s42, s42, s6
	s_cselect_b32 s41, -1, 0
                                        ; implicit-def: $vgpr12
.LBB10_40:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB10_52 Depth 2
                                        ;     Child Loop BB10_72 Depth 2
                                        ;     Child Loop BB10_82 Depth 2
                                        ;     Child Loop BB10_89 Depth 2
	ds_store_b32 v6, v8 offset:64
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB10_42
; %bb.41:                               ;   in Loop: Header=BB10_40 Depth=1
	v_mov_b32_e32 v2, s33
	ds_load_b32 v2, v2 offset:64
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v8, v2 offset:64
.LBB10_42:                              ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_mul_i32 s43, s30, s34
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s44, s4
	s_cbranch_execz .LBB10_46
; %bb.43:                               ;   in Loop: Header=BB10_40 Depth=1
	ds_load_b32 v2, v6 offset:32
	s_waitcnt lgkmcnt(0)
	v_subrev_nc_u32_e32 v12, s43, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v12
	v_cmp_gt_u32_e64 s6, s34, v12
	s_and_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s45, s6, s5
	s_and_saveexec_b32 s6, s45
	s_cbranch_execz .LBB10_45
; %bb.44:                               ;   in Loop: Header=BB10_40 Depth=1
	v_lshl_add_u32 v2, v12, 2, 0
	ds_load_b32 v3, v2 offset:64
	s_waitcnt lgkmcnt(0)
	v_sub_nc_u32_e32 v3, v3, v9
	ds_store_b32 v2, v3 offset:64
.LBB10_45:                              ; %Flow618
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB10_46:                              ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s44
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s44, s4
	s_cbranch_execz .LBB10_50
; %bb.47:                               ;   in Loop: Header=BB10_40 Depth=1
	v_sub_nc_u32_e32 v12, v12, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s34, v12
	v_cmp_lt_i32_e64 s6, -1, v12
	s_and_b32 s45, s5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s45, s6, s45
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s6, s45
	s_cbranch_execz .LBB10_49
; %bb.48:                               ;   in Loop: Header=BB10_40 Depth=1
	v_lshl_add_u32 v2, v12, 2, 0
	ds_load_b32 v3, v2 offset:64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v3, v1
	ds_store_b32 v2, v3 offset:64
.LBB10_49:                              ; %Flow617
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB10_50:                              ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s44
	s_sub_i32 s6, s23, s43
	s_waitcnt lgkmcnt(0)
	s_min_u32 s6, s6, s34
	s_barrier
	s_cmp_lt_u32 s6, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB10_55
; %bb.51:                               ; %.lr.ph.i425.preheader
                                        ;   in Loop: Header=BB10_40 Depth=1
	v_mov_b32_e32 v2, v0
	s_mov_b32 s44, 1
.LBB10_52:                              ; %.lr.ph.i425
                                        ;   Parent Loop BB10_40 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v4, s44, v2
	s_mov_b32 s45, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, s44, v0, v4
	v_cmpx_gt_i32_e64 s6, v3
	s_cbranch_execz .LBB10_54
; %bb.53:                               ;   in Loop: Header=BB10_52 Depth=2
	v_lshlrev_b32_e32 v4, 3, v4
	s_lshl_b32 s46, s44, 2
	v_lshl_add_u32 v3, v3, 2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v4, s46, 0, v4
	ds_load_b32 v4, v4 offset:60
	ds_load_b32 v5, v3 offset:64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	ds_store_b32 v3, v4 offset:64
.LBB10_54:                              ;   in Loop: Header=BB10_52 Depth=2
	s_or_b32 exec_lo, exec_lo, s45
	v_lshrrev_b32_e32 v2, 1, v2
	s_lshl_b32 s44, s44, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s44, s6
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB10_52
.LBB10_55:                              ; %_Z7liscan2Pii.exit429
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_and_saveexec_b32 s44, s2
	s_cbranch_execz .LBB10_59
; %bb.56:                               ;   in Loop: Header=BB10_40 Depth=1
	v_mov_b32_e32 v12, 0
	s_cmp_eq_u32 s23, s43
	s_cbranch_scc1 .LBB10_58
; %bb.57:                               ;   in Loop: Header=BB10_40 Depth=1
	s_lshl_b32 s6, s6, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s6, 0
	v_mov_b32_e32 v2, s6
	ds_load_b32 v12, v2 offset:60
.LBB10_58:                              ;   in Loop: Header=BB10_40 Depth=1
	v_mov_b32_e32 v2, s33
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v2, v12 offset:64
.LBB10_59:                              ; %Flow613
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s44
	v_add_nc_u32_e32 v14, s43, v0
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s23, v14
	s_cbranch_execz .LBB10_93
; %bb.60:                               ;   in Loop: Header=BB10_40 Depth=1
	s_mov_b32 s43, exec_lo
                                        ; implicit-def: $vgpr13
	v_cmpx_le_i32_e64 s19, v14
	s_xor_b32 s43, exec_lo, s43
; %bb.61:                               ;   in Loop: Header=BB10_40 Depth=1
	v_add_nc_u32_e32 v13, s31, v14
; %bb.62:                               ; %Flow611
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_and_not1_saveexec_b32 s43, s43
	s_cbranch_execz .LBB10_64
; %bb.63:                               ;   in Loop: Header=BB10_40 Depth=1
	v_add_lshl_u32 v2, s40, v14, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s20, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s21, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v13, -1, v2
.LBB10_64:                              ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s43, exec_lo
	v_cmpx_le_i32_e64 s25, v13
	s_xor_b32 s43, exec_lo, s43
	s_cbranch_execz .LBB10_66
; %bb.65:                               ;   in Loop: Header=BB10_40 Depth=1
	v_mov_b32_e32 v2, s33
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr13
	ds_store_b32 v2, v10 offset:68
.LBB10_66:                              ; %Flow608
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_and_not1_saveexec_b32 s43, s43
	s_cbranch_execz .LBB10_92
; %bb.67:                               ;   in Loop: Header=BB10_40 Depth=1
	ds_load_b32 v12, v6 offset:64
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_mov_b32 s45, s35
	s_cbranch_vccnz .LBB10_76
; %bb.68:                               ;   in Loop: Header=BB10_40 Depth=1
	ds_load_b32 v2, v8 offset:48
	s_mov_b32 s44, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s45, v14, v2
	v_cmpx_ge_i32_e64 v14, v2
	s_cbranch_execz .LBB10_75
; %bb.69:                               ;   in Loop: Header=BB10_40 Depth=1
	ds_load_b32 v2, v8 offset:60
	s_mov_b32 s47, -1
	s_mov_b32 s46, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v14, v2
	s_cbranch_execz .LBB10_74
; %bb.70:                               ; %.preheader445
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB10_73
; %bb.71:                               ; %.lr.ph
                                        ;   in Loop: Header=BB10_40 Depth=1
	v_add_nc_u32_e32 v2, s42, v13
	v_add_nc_u32_e32 v4, v12, v11
	s_mov_b32 s47, s24
.LBB10_72:                              ;   Parent Loop BB10_40 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s47, s47, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s47, 0
	v_lshlrev_b64 v[15:16], 2, v[4:5]
	v_add_nc_u32_e32 v4, s36, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v15, vcc_lo, s12, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s13, v16, vcc_lo
	global_load_b32 v5, v[15:16], off
	v_lshlrev_b64 v[15:16], 2, v[2:3]
	v_add_nc_u32_e32 v2, s25, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v15, vcc_lo, s8, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v16, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[15:16], v5, off
	s_cbranch_scc0 .LBB10_72
.LBB10_73:                              ; %Flow601
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_xor_b32 s47, exec_lo, -1
.LBB10_74:                              ; %Flow605
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s46
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s45, s45, exec_lo
	s_and_b32 s46, s47, exec_lo
	s_or_b32 s45, s45, s46
.LBB10_75:                              ; %Flow604
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s44
.LBB10_76:                              ; %Flow603
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s44, s45
	s_cbranch_execz .LBB10_91
; %bb.77:                               ;   in Loop: Header=BB10_40 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s27
	s_mov_b32 s45, s37
	s_cbranch_vccnz .LBB10_86
; %bb.78:                               ;   in Loop: Header=BB10_40 Depth=1
	ds_load_b32 v2, v8 offset:36
	s_mov_b32 s46, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e64 s45, v14, v2
	v_cmpx_ge_i32_e64 v14, v2
	s_cbranch_execz .LBB10_85
; %bb.79:                               ;   in Loop: Header=BB10_40 Depth=1
	ds_load_b32 v2, v8 offset:48
	s_mov_b32 s48, -1
	s_mov_b32 s47, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_lt_i32_e64 v14, v2
	s_cbranch_execz .LBB10_84
; %bb.80:                               ; %.preheader
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB10_83
; %bb.81:                               ; %.lr.ph449
                                        ;   in Loop: Header=BB10_40 Depth=1
	v_add_nc_u32_e32 v2, s42, v13
	v_add_nc_u32_e32 v4, v12, v11
	s_mov_b32 s48, s24
.LBB10_82:                              ;   Parent Loop BB10_40 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s48, s48, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s48, 0
	v_lshlrev_b64 v[14:15], 2, v[4:5]
	v_add_nc_u32_e32 v4, s38, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s14, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s15, v15, vcc_lo
	global_load_b32 v5, v[14:15], off
	v_lshlrev_b64 v[14:15], 2, v[2:3]
	v_add_nc_u32_e32 v2, s25, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[14:15], v5, off
	s_cbranch_scc0 .LBB10_82
.LBB10_83:                              ; %Flow594
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_xor_b32 s48, exec_lo, -1
.LBB10_84:                              ; %Flow598
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s47
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s45, s45, exec_lo
	s_and_b32 s47, s48, exec_lo
	s_or_b32 s45, s45, s47
.LBB10_85:                              ; %Flow597
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s46
.LBB10_86:                              ; %Flow596
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s46, s45
	s_cbranch_execz .LBB10_90
; %bb.87:                               ;   in Loop: Header=BB10_40 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s41
	s_cbranch_vccnz .LBB10_90
; %bb.88:                               ; %.lr.ph451
                                        ;   in Loop: Header=BB10_40 Depth=1
	v_add_nc_u32_e32 v2, s42, v13
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v12, v11
	s_mov_b32 s45, s24
.LBB10_89:                              ;   Parent Loop BB10_40 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s45, s45, -1
	s_cmp_eq_u32 s45, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	v_add_nc_u32_e32 v4, s28, v4
	v_add_co_u32 v13, vcc_lo, s10, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	global_load_b32 v5, v[13:14], off
	v_lshlrev_b64 v[13:14], 2, v[2:3]
	v_add_nc_u32_e32 v2, s25, v2
	v_add_co_u32 v13, vcc_lo, s8, v13
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, s9, v14, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[13:14], v5, off
	s_cbranch_scc0 .LBB10_89
.LBB10_90:                              ; %Flow599
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_or_b32 exec_lo, exec_lo, s46
.LBB10_91:                              ; %Flow606
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s44
.LBB10_92:                              ; %Flow609
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s43
.LBB10_93:                              ; %Flow612
                                        ;   in Loop: Header=BB10_40 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_add_nc_u32_e32 v11, s34, v11
	s_add_i32 s6, s30, 1
	s_cmp_lg_u32 s30, s29
	s_mov_b32 s30, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB10_40
.LBB10_94:                              ; %._crit_edge
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s4, s23, s19
	s_sub_i32 s6, s19, s23
	s_max_i32 s4, s4, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s5, s4, s39
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB10_126
; %bb.95:                               ; %.lr.ph466
	s_add_i32 s4, s6, -1
	v_add3_u32 v1, v0, s23, 1
	s_mul_hi_u32 s7, s4, s26
	v_dual_mov_b32 v2, 1 :: v_dual_mov_b32 v3, 0
	s_mul_i32 s10, s7, s34
	s_mov_b32 s12, 0
	s_sub_i32 s4, s4, s10
	s_add_i32 s10, s7, 1
	s_sub_i32 s11, s4, s34
	s_cmp_ge_u32 s4, s34
	s_mov_b32 s13, 0
	s_cselect_b32 s7, s10, s7
	s_cselect_b32 s4, s11, s4
	s_add_i32 s10, s7, 1
	s_cmp_ge_u32 s4, s34
	s_mov_b32 s11, 0
	s_cselect_b32 s7, s10, s7
	s_cmp_gt_i32 s24, 0
	s_cselect_b32 s10, -1, 0
.LBB10_96:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB10_102 Depth 2
                                        ;     Child Loop BB10_123 Depth 2
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v4, s12, v0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, s19, v4
	v_cmpx_lt_i32_e32 0, v4
	s_cbranch_execz .LBB10_98
; %bb.97:                               ;   in Loop: Header=BB10_96 Depth=1
	v_add_lshl_u32 v7, v4, s18, 1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s20, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s21, v8, vcc_lo
	global_load_b32 v5, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, -1, v5
.LBB10_98:                              ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_mul_i32 s15, s13, s34
	ds_store_b32 v6, v2 offset:64
	v_add_nc_u32_e32 v5, s15, v5
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_xad_u32 v5, v5, -1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v5
	v_cmp_gt_u32_e64 s4, s34, v5
	s_and_b32 s14, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s14
	s_cbranch_execz .LBB10_100
; %bb.99:                               ;   in Loop: Header=BB10_96 Depth=1
	v_lshl_add_u32 v5, v5, 2, 0
	ds_store_b32 v5, v3 offset:64
.LBB10_100:                             ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_sub_i32 s4, s6, s15
	s_waitcnt lgkmcnt(0)
	s_min_u32 s14, s4, s34
	s_barrier
	s_cmp_lt_u32 s14, 2
	buffer_gl0_inv
	s_cbranch_scc1 .LBB10_105
; %bb.101:                              ; %.lr.ph.i430.preheader
                                        ;   in Loop: Header=BB10_96 Depth=1
	v_mov_b32_e32 v5, v0
	s_mov_b32 s4, 1
.LBB10_102:                             ; %.lr.ph.i430
                                        ;   Parent Loop BB10_96 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v8, s4, v5
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v7, s4, v0, v8
	v_cmpx_gt_i32_e64 s14, v7
	s_cbranch_execz .LBB10_104
; %bb.103:                              ;   in Loop: Header=BB10_102 Depth=2
	v_lshlrev_b32_e32 v8, 3, v8
	s_lshl_b32 s26, s4, 2
	v_lshl_add_u32 v7, v7, 2, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v8, s26, 0, v8
	ds_load_b32 v8, v8 offset:60
	ds_load_b32 v9, v7 offset:64
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v8, v9, v8
	ds_store_b32 v7, v8 offset:64
.LBB10_104:                             ;   in Loop: Header=BB10_102 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	v_lshrrev_b32_e32 v5, 1, v5
	s_lshl_b32 s4, s4, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, s14
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB10_102
.LBB10_105:                             ; %_Z7liscan2Pii.exit434
                                        ;   in Loop: Header=BB10_96 Depth=1
	s_cmp_eq_u32 s6, s15
	s_mov_b32 s23, 0
	s_cbranch_scc1 .LBB10_107
; %bb.106:                              ;   in Loop: Header=BB10_96 Depth=1
	s_lshl_b32 s4, s14, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s4, 0
	v_mov_b32_e32 v5, s4
	ds_load_b32 v5, v5 offset:60
	s_waitcnt lgkmcnt(0)
	v_readfirstlane_b32 s23, v5
.LBB10_107:                             ;   in Loop: Header=BB10_96 Depth=1
	v_add_nc_u32_e32 v5, s15, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_lt_i32 s23, s14
	s_cselect_b32 s26, -1, 0
	s_cmp_ge_i32 s23, s14
	v_cmp_gt_i32_e32 vcc_lo, s6, v5
	v_xad_u32 v7, v5, -1, s5
	s_cbranch_scc1 .LBB10_115
; %bb.108:                              ;   in Loop: Header=BB10_96 Depth=1
	v_mov_b32_e32 v8, 0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB10_112
; %bb.109:                              ;   in Loop: Header=BB10_96 Depth=1
	v_mov_b32_e32 v8, 0
	s_and_saveexec_b32 s27, s3
	s_cbranch_execz .LBB10_111
; %bb.110:                              ;   in Loop: Header=BB10_96 Depth=1
	ds_load_b32 v8, v6 offset:60
.LBB10_111:                             ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	ds_load_b32 v4, v6 offset:64
.LBB10_112:                             ; %Flow585
                                        ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e64 s4, v4, v8
	s_barrier
	buffer_gl0_inv
	s_and_b32 s27, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s27
	s_cbranch_execz .LBB10_114
; %bb.113:                              ;   in Loop: Header=BB10_96 Depth=1
	v_cndmask_b32_e32 v8, 0, v7, vcc_lo
	v_lshl_add_u32 v4, v4, 2, 0
	ds_store_b32 v4, v8 offset:60
.LBB10_114:                             ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB10_115:                             ;   in Loop: Header=BB10_96 Depth=1
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB10_119
; %bb.116:                              ;   in Loop: Header=BB10_96 Depth=1
	v_add_nc_u32_e32 v8, s11, v1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s27, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_ge_i32_e64 s19, v8
	s_cbranch_execz .LBB10_118
; %bb.117:                              ;   in Loop: Header=BB10_96 Depth=1
	v_add_lshl_u32 v8, v8, s18, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s20, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v9, vcc_lo
	global_load_b32 v4, v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, -1, v4
.LBB10_118:                             ; %Flow583
                                        ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_mov_b32_e32 v8, v7
.LBB10_119:                             ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s4, s23, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_u32_e32 vcc_lo, s4, v5
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB10_124
; %bb.120:                              ;   in Loop: Header=BB10_96 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s26
	s_cbranch_vccnz .LBB10_122
; %bb.121:                              ;   in Loop: Header=BB10_96 Depth=1
	ds_load_b32 v8, v6 offset:64
.LBB10_122:                             ;   in Loop: Header=BB10_96 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_mov_b32 s15, s22
	s_mov_b32 s26, s24
	s_cbranch_vccnz .LBB10_124
.LBB10_123:                             ; %.lr.ph458
                                        ;   Parent Loop BB10_96 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v9, s15, v8
	s_add_i32 s26, s26, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s8, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v10, vcc_lo
	global_load_b32 v5, v[9:10], off
	v_add_nc_u32_e32 v9, s15, v4
	s_add_i32 s15, s15, s25
	s_cmp_lg_u32 s26, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s8, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v10, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[9:10], v5, off
	s_cbranch_scc1 .LBB10_123
.LBB10_124:                             ; %Flow582
                                        ;   in Loop: Header=BB10_96 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s14, s14, s12
	s_add_i32 s4, s13, 1
	s_add_i32 s11, s23, s11
	s_sub_i32 s12, s14, s23
	s_cmp_lt_i32 s13, s7
	s_mov_b32 s13, s4
	s_cbranch_scc1 .LBB10_96
; %bb.125:                              ; %._crit_edge467
	s_sub_i32 s5, s5, s6
.LBB10_126:
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB10_130
; %bb.127:
	v_mov_b32_e32 v0, s33
	ds_load_b32 v0, v0 offset:68
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 1, v0
	s_cbranch_vccnz .LBB10_129
; %bb.128:
	s_load_b64 s[0:1], s[0:1], 0x68
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s5
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB10_129:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s5
	global_store_b32 v0, v1, s[16:17]
.LBB10_130:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 368
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 49
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_, .Lfunc_end10-_Z11gpupppord2lPfS_S_S_PiS0_S0_S0_S0_iiiiiiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4256
; NumSgprs: 51
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 51
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii ; -- Begin function _Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.globl	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
	.p2align	8
	.type	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii,@function
_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii: ; @_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
; %bb.0:
	s_mov_b32 s20, s15
	s_clause 0x2
	s_load_b128 s[12:15], s[0:1], 0x20
	s_load_b64 s[16:17], s[0:1], 0x30
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s12, 31
	s_add_i32 s26, s14, -1
	s_add_i32 s2, s12, s2
	s_mul_i32 s3, s26, s16
	s_ashr_i32 s27, s2, 1
	v_cvt_f32_i32_e32 v7, s12
	s_add_i32 s2, s27, 1
	v_cvt_f32_i32_e32 v8, s13
	s_sub_i32 s18, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_max_i32 s12, s18, 0
	s_min_i32 s12, s12, s16
	s_cmp_lt_i32 s2, s14
	s_cbranch_scc1 .LBB11_31
; %bb.1:
	v_div_scale_f32 v1, null, v7, v7, 0x40c90fdb
	v_div_scale_f32 v2, null, v8, v8, 0x40c90fdb
	v_div_scale_f32 v9, vcc_lo, 0x40c90fdb, v7, 0x40c90fdb
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v3, v1
	v_rcp_f32_e32 v4, v2
	s_lshr_b32 s14, s13, 1
	s_cmp_gt_i32 s13, 1
	s_cselect_b32 s18, s14, 1
	s_add_i32 s14, s3, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s14, 1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v1, v3, 1.0
	v_fma_f32 v6, -v2, v4, 1.0
	s_cselect_b32 s19, -1, 0
	s_cmp_ge_i32 s14, s27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v3, v5, v3 :: v_dual_fmac_f32 v4, v6, v4
	v_div_scale_f32 v5, s2, 0x40c90fdb, v8, 0x40c90fdb
	v_mul_f32_e32 v6, v9, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v5, v4
	v_fma_f32 v11, -v1, v6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v2, v10, v5
	v_fmac_f32_e32 v6, v11, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v12, v4
	v_fma_f32 v1, -v1, v6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v2, -v2, v10, v5
	v_div_fmas_f32 v3, v1, v3, v6
	s_mov_b32 vcc_lo, s2
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fmas_f32 v4, v2, v4, v10
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	v_div_fixup_f32 v10, v3, v7, 0x40c90fdb
	s_or_b32 s2, s19, s2
	v_div_fixup_f32 v9, v4, v8, 0x40c90fdb
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB11_9
; %bb.2:
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s18, v0
	s_cbranch_execz .LBB11_8
; %bb.3:                                ; %.lr.ph
	s_load_b32 s23, s[0:1], 0x44
	v_cvt_f32_i32_e32 v5, s14
	s_lshl_b32 s22, s20, 1
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, v0
	v_sub_nc_u32_e32 v3, s13, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, 0 :: v_dual_mul_f32 v5, v10, v5
	s_mul_i32 s19, s20, s15
	s_or_b32 s22, s22, 1
	s_mul_i32 s14, s20, s17
	s_lshl_b32 s21, s19, 1
	s_mul_i32 s22, s15, s22
	s_waitcnt lgkmcnt(0)
	s_and_b32 s24, s23, 0xffff
	s_mov_b32 s23, 0
.LBB11_4:                               ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s25, exec_lo
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB11_6
; %bb.5:                                ;   in Loop: Header=BB11_4 Depth=1
	v_add_nc_u32_e32 v11, s19, v4
	v_cvt_f32_i32_e32 v20, v4
	v_add_nc_u32_e32 v21, s22, v4
	v_add_nc_u32_e32 v17, s21, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v12, 31, v11
	v_ashrrev_i32_e32 v22, 31, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v18, 31, v17
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[21:22], 3, v[21:22]
	v_lshlrev_b64 v[17:18], 3, v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v6, v12, v12 :: v_dual_add_nc_u32 v13, s19, v3
	v_add_nc_u32_e32 v15, s14, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v14, 31, v13
	v_fmac_f32_e32 v6, v11, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v16, 31, v15
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	v_add_co_u32 v13, vcc_lo, s4, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	v_add_co_u32 v15, vcc_lo, s8, v15
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v16, vcc_lo, s9, v16, vcc_lo
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[15:16], v[15:16], off
	v_add_co_u32 v17, vcc_lo, s6, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s7, v18, vcc_lo
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v6, v14, v14 :: v_dual_mul_f32 v19, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, v13, v13
	v_mul_f32_e32 v24, v5, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v6, v19, v6
	v_mul_f32_e32 v25, v24, v14
	v_mul_f32_e64 v26, v24, -v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_f64_f32_e32 v[15:16], v6
	v_mul_f32_e32 v6, v9, v19
	v_add_nc_u32_e32 v19, s21, v3
	v_add_f64 v[1:2], v[1:2], v[15:16]
	v_mul_f32_e32 v15, v24, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v6, v6, v20 :: v_dual_add_nc_u32 v23, s22, v3
	v_ashrrev_i32_e32 v20, 31, v19
	v_mul_f32_e64 v16, v24, -v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v27, v12, v6
	v_ashrrev_i32_e32 v24, 31, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[19:20], 3, v[19:20]
	v_mul_f32_e64 v28, v6, -v11
	v_lshlrev_b64 v[11:12], 3, v[23:24]
	v_mul_f32_e32 v24, v6, v13
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v19, vcc_lo, s6, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s7, v20, vcc_lo
	v_add_co_u32 v21, vcc_lo, s6, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, s7, v22, vcc_lo
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_mul_f32_e64 v23, v14, -v6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	s_clause 0x3
	global_store_b64 v[17:18], v[15:16], off
	global_store_b64 v[19:20], v[25:26], off
	global_store_b64 v[21:22], v[27:28], off
	global_store_b64 v[11:12], v[23:24], off
.LBB11_6:                               ;   in Loop: Header=BB11_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s25
	v_add_nc_u32_e32 v4, s24, v4
	v_subrev_nc_u32_e32 v3, s24, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s18, v4
	s_or_b32 s23, vcc_lo, s23
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB11_4
; %bb.7:                                ; %Flow407
	s_or_b32 exec_lo, exec_lo, s23
.LBB11_8:                               ; %Flow408
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB11_9:                               ; %.loopexit296
	s_cmp_lg_u32 s20, 0
	s_cbranch_scc1 .LBB11_31
; %bb.10:
	s_mov_b32 s14, exec_lo
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB11_16
; %bb.11:                               ; %.lr.ph301
	s_load_b32 s2, s[0:1], 0x44
	v_mul_lo_u32 v3, v0, s15
	s_mov_b32 s20, 0
	v_mov_b32_e32 v11, v0
	v_mul_lo_u32 v5, v0, s17
	s_mov_b32 s19, s20
	s_ashr_i32 s23, s15, 31
	s_lshl_b64 s[24:25], s[18:19], 3
	s_mov_b32 s22, s15
	v_lshlrev_b32_e32 v12, 1, v3
	s_mov_b32 s28, 0
	s_lshl_b64 s[22:23], s[22:23], 3
	s_mov_b32 s31, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add3_u32 v13, s18, s15, v12
	s_waitcnt lgkmcnt(0)
	s_and_b32 s19, s2, 0xffff
	s_mul_i32 s29, s15, s19
	s_mul_i32 s17, s17, s19
	s_lshl_b32 s30, s29, 1
.LBB11_12:                              ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v14, s3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v14
	v_cmp_gt_i32_e64 s2, s27, v14
	s_and_b32 s21, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s21
	s_cbranch_execz .LBB11_14
; %bb.13:                               ;   in Loop: Header=BB11_12 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_mov_b32 s21, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v24, s21 :: v_dual_add_nc_u32 v19, s31, v12
	v_lshlrev_b64 v[15:16], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[17:18], 3, v[5:6]
	v_mov_b32_e32 v23, s20
	v_ashrrev_i32_e32 v20, 31, v19
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s4, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	v_add_co_u32 v17, vcc_lo, s8, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s9, v18, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	global_load_b64 v[17:18], v[17:18], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v4, v16, v16
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v17, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v15, v15
	v_mul_f32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[17:18], v4
	v_cvt_f32_i32_e32 v4, v14
	v_mul_f32_e32 v4, v10, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v4, v6
	v_mul_f32_e32 v14, v4, v16
	v_add_nc_u32_e32 v16, s31, v13
	v_mul_f32_e64 v15, v15, -v4
	v_add_f64 v[1:2], v[1:2], v[17:18]
	v_lshlrev_b64 v[17:18], 3, v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v19, vcc_lo, s6, v17
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_co_ci_u32_e32 v20, vcc_lo, s7, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v19, s24
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v22, vcc_lo, s25, v20, vcc_lo
	v_add_co_u32 v25, vcc_lo, v19, s22
	v_add_co_ci_u32_e32 v26, vcc_lo, s23, v20, vcc_lo
	v_add_co_u32 v16, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s7, v17, vcc_lo
	s_clause 0x3
	global_store_b64 v[19:20], v[14:15], off
	global_store_b64 v[21:22], v[23:24], off
	global_store_b64 v[25:26], v[23:24], off
	global_store_b64 v[16:17], v[23:24], off
.LBB11_14:                              ;   in Loop: Header=BB11_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v11, s19, v11
	v_add_nc_u32_e32 v3, s29, v3
	v_add_nc_u32_e32 v5, s17, v5
	s_add_i32 s31, s31, s30
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s12, v11
	s_or_b32 s28, vcc_lo, s28
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB11_12
; %bb.15:                               ; %Flow403
	s_or_b32 exec_lo, exec_lo, s28
.LBB11_16:                              ; %Flow404
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	s_cmp_lg_u32 s26, 0
	s_cbranch_scc1 .LBB11_26
; %bb.17:                               ; %.preheader
	s_mov_b32 s14, exec_lo
	v_cmpx_gt_u32_e64 s18, v0
	s_cbranch_execz .LBB11_23
; %bb.18:                               ; %.lr.ph305
	s_load_b32 s3, s[0:1], 0x44
	s_ashr_i32 s25, s15, 31
	v_dual_mov_b32 v11, v0 :: v_dual_lshlrev_b32 v10, 3, v0
	s_mov_b32 s20, s13
	s_mov_b32 s24, s15
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s17, s3, 0xffff
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_ashr_i32 s21, s13, 31
	s_lshl_b32 s19, s17, 3
	s_lshl_b64 s[22:23], s[20:21], 3
	s_add_u32 s20, s6, 4
	v_sub_co_u32 v3, s3, s22, v10
	s_addc_u32 s21, s7, 0
	v_sub_co_ci_u32_e64 v4, null, s23, 0, s3
	s_sub_u32 s22, 0, s19
	s_subb_u32 s23, 0, 0
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_add_i32 s3, s15, s13
	v_add_co_u32 v3, vcc_lo, s20, v3
	s_lshl_b64 s[24:25], s[24:25], 3
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v4, vcc_lo
	v_sub_nc_u32_e32 v5, s3, v0
	s_add_u32 s24, s6, s24
	s_addc_u32 s28, s7, s25
	s_mov_b32 s25, 0
.LBB11_19:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s29, exec_lo
	v_cmpx_ne_u32_e32 0, v11
	s_cbranch_execz .LBB11_21
; %bb.20:                               ;   in Loop: Header=BB11_19 Depth=1
	v_add_co_u32 v12, s3, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, null, s5, 0, s3
	v_add_co_u32 v14, s3, s8, v10
	v_add_co_ci_u32_e64 v15, null, s9, 0, s3
	global_load_b64 v[12:13], v[12:13], off offset:-4
	global_load_b64 v[14:15], v[14:15], off offset:-4
	s_mov_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v18, s3 :: v_dual_mov_b32 v17, s2
	v_add_co_u32 v19, s3, s24, v10
	v_add_co_ci_u32_e64 v20, null, s28, 0, s3
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v6, v13, v13
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v16, v14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v12, v12
	v_mul_f32_e32 v6, v16, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[14:15], v6
	v_mul_f32_e32 v6, v9, v16
	v_cvt_f32_i32_e32 v16, v11
	v_mul_f32_e32 v6, v6, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v13, v6
	v_add_f64 v[1:2], v[1:2], v[14:15]
	v_mul_f32_e64 v14, v12, -v6
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v15, s30, s20, v10
	v_add_co_ci_u32_e64 v16, null, s21, 0, s30
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[21:22], 3, v[5:6]
	global_store_b64 v[15:16], v[17:18], off offset:-4
	global_store_b64 v[3:4], v[17:18], off offset:-4
	global_store_b64 v[19:20], v[13:14], off
	v_xor_b32_e32 v14, 0x80000000, v14
	v_add_co_u32 v15, vcc_lo, s6, v21
	v_add_co_ci_u32_e32 v16, vcc_lo, s7, v22, vcc_lo
	global_store_b64 v[15:16], v[13:14], off
.LBB11_21:                              ;   in Loop: Header=BB11_19 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
	v_add_nc_u32_e32 v11, s17, v11
	s_add_u32 s8, s8, s19
	v_add_co_u32 v3, vcc_lo, v3, s22
	s_addc_u32 s9, s9, 0
	v_add_co_ci_u32_e32 v4, vcc_lo, s23, v4, vcc_lo
	s_add_u32 s4, s4, s19
	s_addc_u32 s5, s5, 0
	v_cmp_le_u32_e32 vcc_lo, s18, v11
	s_add_u32 s24, s24, s19
	v_subrev_nc_u32_e32 v5, s17, v5
	s_addc_u32 s28, s28, 0
	s_add_u32 s20, s20, s19
	s_addc_u32 s21, s21, 0
	s_or_b32 s25, vcc_lo, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB11_19
; %bb.22:                               ; %Flow399
	s_or_b32 exec_lo, exec_lo, s25
.LBB11_23:                              ; %Flow400
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	s_mov_b32 s2, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB11_25
; %bb.24:
	s_mov_b32 s19, s2
	s_mov_b32 s3, s2
	s_lshl_b64 s[8:9], s[18:19], 3
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s3
	v_mov_b32_e32 v3, s2
	s_add_u32 s2, s6, s8
	s_addc_u32 s3, s7, s9
	s_ashr_i32 s9, s15, 31
	s_mov_b32 s8, s15
	global_store_b64 v5, v[3:4], s[6:7]
	s_lshl_b64 s[8:9], s[8:9], 3
	global_store_b64 v5, v[3:4], s[2:3]
	s_add_u32 s18, s6, s8
	s_addc_u32 s19, s7, s9
	s_add_u32 s2, s2, s8
	s_addc_u32 s3, s3, s9
	s_clause 0x1
	global_store_b64 v5, v[3:4], s[18:19]
	global_store_b64 v5, v[3:4], s[2:3]
.LBB11_25:                              ; %Flow397
	s_or_b32 exec_lo, exec_lo, s4
.LBB11_26:
	s_ashr_i32 s2, s16, 31
	s_ashr_i32 s8, s27, 31
	s_add_i32 s3, s16, s2
	s_add_i32 s27, s27, s8
	s_xor_b32 s3, s3, s2
	s_xor_b32 s9, s27, s8
	v_cvt_f32_u32_e32 v3, s3
	s_sub_i32 s5, 0, s3
	s_xor_b32 s2, s8, s2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s4, v3
	s_mul_i32 s5, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s5, s4, s5
	s_add_i32 s4, s4, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s4, s9, s4
	s_mul_i32 s5, s4, s3
	s_add_i32 s8, s4, 1
	s_sub_i32 s5, s9, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s9, s5, s3
	s_cmp_ge_u32 s5, s3
	s_cselect_b32 s4, s8, s4
	s_cselect_b32 s5, s9, s5
	s_add_i32 s8, s4, 1
	s_cmp_ge_u32 s5, s3
	s_cselect_b32 s3, s8, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	s_sub_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s26, s2
	s_cbranch_scc1 .LBB11_31
; %bb.27:
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s13, v0
	s_cbranch_execz .LBB11_30
; %bb.28:                               ; %.lr.ph310
	s_load_b32 s2, s[0:1], 0x44
	s_add_i32 s5, s12, -1
	s_lshl_b32 s8, s12, 1
	v_mov_b32_e32 v3, v0
	s_mul_i32 s5, s15, s5
	s_add_i32 s9, s8, -1
	s_mov_b32 s4, 0
	s_lshl_b32 s8, s5, 1
	s_mul_i32 s9, s15, s9
	s_mov_b32 s15, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s14, s2, 0xffff
.LBB11_29:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s5, s4
	v_add_nc_u32_e32 v4, s8, v3
	v_dual_mov_b32 v12, s5 :: v_dual_add_nc_u32 v9, s9, v3
	v_mov_b32_e32 v11, s4
	v_add_nc_u32_e32 v3, s14, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s13, v3
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	s_or_b32 s15, vcc_lo, s15
	v_add_co_u32 v4, s2, s6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, s2, s7, v5, s2
	v_add_co_u32 v9, s2, s6, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s7, v10, s2
	s_clause 0x1
	global_store_b64 v[4:5], v[11:12], off
	global_store_b64 v[9:10], v[11:12], off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB11_29
.LBB11_30:                              ; %Flow395
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_31:                              ; %.loopexit
	s_cmp_ge_i32 s20, s12
	s_cbranch_scc1 .LBB11_43
; %bb.32:
	v_cvt_f32_f64_e32 v2, v[1:2]
	v_lshl_add_u32 v1, v0, 2, 0
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_load_b32 s0, s[0:1], 0x44
	v_mov_b32_e32 v2, 0
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB11_34
; %bb.33:
	ds_load_b32 v2, v1
.LBB11_34:
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_lt_u32 s0, 2
	s_cbranch_scc1 .LBB11_41
; %bb.35:                               ; %.lr.ph.i
	s_lshr_b32 s1, s0, 1
.LBB11_36:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB11_40
; %bb.37:                               ;   in Loop: Header=BB11_36 Depth=1
	v_add_nc_u32_e32 v3, s1, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s0, v3
	s_cbranch_execz .LBB11_39
; %bb.38:                               ;   in Loop: Header=BB11_36 Depth=1
	v_lshl_add_u32 v3, s1, 2, v1
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB11_39:                              ; %Flow388
                                        ;   in Loop: Header=BB11_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB11_40:                              ;   in Loop: Header=BB11_36 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_lshr_b32 s2, s1, 1
	s_cmp_gt_u32 s1, 1
	s_mov_b32 s1, s2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB11_36
.LBB11_41:                              ; %_Z5lsum2Pfi.exit
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB11_43
; %bb.42:
	v_mov_b32_e32 v0, 0
	s_ashr_i32 s21, s20, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[20:21], 2
	s_add_u32 s0, s10, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s11, s1
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v1, v1, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v8
	global_store_b32 v0, v1, s[0:1]
.LBB11_43:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 29
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii, .Lfunc_end11-_Z11gpuppois22tP15HIP_vector_typeIfLj2EES1_S1_Pfiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2752
; NumSgprs: 34
; NumVgprs: 29
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 29
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii ; -- Begin function _Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.globl	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.p2align	8
	.type	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii,@function
_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii: ; @_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x20
	s_load_b32 s2, s[0:1], 0x40
	s_load_b32 s28, s[0:1], 0x30
	s_mov_b32 s26, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[20:21], 1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s3, s20, 31
	s_add_i32 s3, s20, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s16, s3, 1
	s_cmp_le_i32 s16, s2
	s_mov_b32 s27, s16
	s_cbranch_scc1 .LBB12_3
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s27, s16
.LBB12_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s3, s27, 31
	s_add_i32 s26, s26, 1
	s_add_i32 s3, s27, s3
	s_ashr_i32 s27, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_i32 s27, s2
	s_cbranch_scc1 .LBB12_2
.LBB12_3:                               ; %._crit_edge
	s_clause 0x2
	s_load_b32 s30, s[0:1], 0x8
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x10
	s_ashr_i32 s29, s20, 31
	s_add_i32 s14, s4, -1
	s_lshr_b32 s2, s29, 30
	s_max_i32 s3, s14, s5
	s_add_i32 s2, s20, s2
	s_add_i32 s33, s6, -1
	s_ashr_i32 s21, s2, 2
	s_lshr_b32 s2, s27, 31
	s_lshl_b64 s[22:23], 1, s5
	s_add_i32 s2, s27, s2
	s_lshl_b64 s[18:19], 1, s3
	s_add_i32 s23, s33, s7
	s_lshl_b64 s[6:7], 1, s26
	s_max_i32 s31, s20, s22
	s_sub_i32 s7, s14, s26
	s_ashr_i32 s19, s2, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s30, -1
	s_cbranch_scc1 .LBB12_42
; %bb.4:
	s_ashr_i32 s17, s16, 31
	s_add_i32 s34, s33, s15
	s_add_i32 s2, s16, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s2, s17
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s2, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s4, v1
	s_mul_i32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s2, s4, s2
	s_add_i32 s4, s4, s2
	s_cmp_lt_i32 s34, s23
	s_cselect_b32 s5, -1, 0
	s_cmp_ge_i32 s34, s23
	s_cbranch_scc1 .LBB12_11
; %bb.5:
	s_mov_b32 s24, exec_lo
	v_cmpx_gt_i32_e64 s16, v0
	s_cbranch_execz .LBB12_10
; %bb.6:                                ; %.lr.ph684
	s_ashr_i32 s2, s18, 31
	s_mov_b32 s38, 0
	s_add_i32 s25, s18, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_xor_b32 s25, s25, s2
	s_xor_b32 s2, s2, s17
	s_mul_hi_u32 s35, s25, s4
	s_mul_i32 s36, s35, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s25, s25, s36
	s_add_i32 s36, s35, 1
	s_sub_i32 s37, s25, s3
	s_cmp_ge_u32 s25, s3
	s_cselect_b32 s35, s36, s35
	s_cselect_b32 s25, s37, s25
	s_add_i32 s36, s35, 1
	s_cmp_ge_u32 s25, s3
	s_load_b32 s37, s[0:1], 0x54
	s_cselect_b32 s25, s36, s35
	s_mul_i32 s36, s34, s28
	s_xor_b32 s25, s25, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s25, s2
	s_ashr_i32 s25, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s25
	s_xor_b32 s35, s2, s25
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s35
	s_sub_i32 s2, 0, s35
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s37, s37, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s39, s37, 2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, s2, v3
	v_mul_hi_u32 v4, v3, v1
	v_lshlrev_b32_e32 v1, 2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v1, s2, s8, v1
	v_add_co_ci_u32_e64 v2, null, s9, 0, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mov_b32 v4, v0 :: v_dual_add_nc_u32 v3, v3, v4
.LBB12_7:                               ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[1:2], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, -1, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v5, v5, v6
	v_xor_b32_e32 v6, s25, v6
	v_mul_hi_u32 v7, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v8, v7, s35
	v_sub_nc_u32_e32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v9, s35, v5
	v_cmp_le_u32_e32 vcc_lo, s35, v5
	v_dual_cndmask_b32 v5, v5, v9 :: v_dual_add_nc_u32 v8, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v7, v8, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s35, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, 1, v7
	v_cndmask_b32_e32 v5, v7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v6
	v_sub_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v4, v5
	s_cbranch_execz .LBB12_9
; %bb.8:                                ;   in Loop: Header=BB12_7 Depth=1
	v_add_nc_u32_e32 v6, s36, v4
	v_add_nc_u32_e32 v8, s36, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[6:7]
	v_lshlrev_b64 v[7:8], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	s_clause 0x1
	global_load_b64 v[9:10], v[5:6], off
	global_load_b64 v[11:12], v[7:8], off
	s_waitcnt vmcnt(1)
	global_store_b64 v[7:8], v[9:10], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[5:6], v[11:12], off
.LBB12_9:                               ;   in Loop: Header=BB12_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v4, s37, v4
	v_add_co_u32 v1, s2, v1, s39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s2, 0, v2, s2
	v_cmp_le_i32_e32 vcc_lo, s16, v4
	s_or_b32 s38, vcc_lo, s38
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s38
	s_cbranch_execnz .LBB12_7
.LBB12_10:                              ; %Flow921
	s_or_b32 exec_lo, exec_lo, s24
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB12_11:
	s_ashr_i32 s35, s31, 31
	v_cndmask_b32_e64 v4, 0, 1, s5
	s_add_i32 s2, s31, s35
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_xor_b32 s36, s2, s35
	s_cbranch_vccnz .LBB12_33
; %bb.12:
	s_mul_hi_u32 s2, s36, s4
	s_xor_b32 s5, s35, s17
	s_mul_i32 s4, s2, s3
	s_add_i32 s24, s2, 1
	s_sub_i32 s4, s36, s4
	s_mul_i32 s38, s34, s28
	s_sub_i32 s25, s4, s3
	s_cmp_ge_u32 s4, s3
	s_cselect_b32 s2, s24, s2
	s_cselect_b32 s4, s25, s4
	s_add_i32 s24, s2, 1
	s_cmp_ge_u32 s4, s3
	s_cselect_b32 s2, s24, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s5
	s_sub_i32 s37, s2, s5
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB12_27
; %bb.13:                               ; %.lr.ph703
	s_add_u32 s24, s0, 0x48
	s_addc_u32 s25, s1, 0
	s_cmp_gt_i32 s7, 0
	v_cmp_gt_i32_e64 s2, s27, v0
	s_cselect_b32 s5, -1, 0
	s_ashr_i32 s39, s21, 31
	v_cmp_gt_i32_e64 s3, s19, v0
	v_lshl_add_u32 v5, v0, 3, 0
	s_add_i32 s4, s21, s39
	s_mov_b32 s40, 0
	s_xor_b32 s41, s4, s39
	s_mov_b32 s42, s38
.LBB12_14:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB12_16 Depth 2
                                        ;     Child Loop BB12_19 Depth 2
                                        ;       Child Loop BB12_21 Depth 3
                                        ;     Child Loop BB12_25 Depth 2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB12_17
; %bb.15:                               ; %.lr.ph688
                                        ;   in Loop: Header=BB12_14 Depth=1
	s_load_b32 s43, s[24:25], 0xc
	v_dual_mov_b32 v1, v5 :: v_dual_mov_b32 v2, v0
	s_mov_b32 s45, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s43, s43, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s44, s43, 3
.LBB12_16:                              ;   Parent Loop BB12_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v6, s42, v2
	v_add_nc_u32_e32 v2, s43, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s27, v2
	global_load_b64 v[6:7], v[6:7], off
	s_or_b32 s45, vcc_lo, s45
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[6:7]
	v_add_nc_u32_e32 v1, s44, v1
	s_and_not1_b32 exec_lo, exec_lo, s45
	s_cbranch_execnz .LBB12_16
.LBB12_17:                              ; %Flow916
                                        ;   in Loop: Header=BB12_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB12_23
; %bb.18:                               ; %.lr.ph697.preheader
                                        ;   in Loop: Header=BB12_14 Depth=1
	s_mov_b32 s4, 0
	s_mov_b32 s43, 1
.LBB12_19:                              ; %.lr.ph697
                                        ;   Parent Loop BB12_14 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB12_21 Depth 3
	s_and_saveexec_b32 s44, s3
	s_cbranch_execz .LBB12_22
; %bb.20:                               ; %.lr.ph692
                                        ;   in Loop: Header=BB12_19 Depth=2
	s_ashr_i32 s45, s43, 31
	v_cvt_f32_u32_e32 v2, s43
	s_add_i32 s46, s43, s45
	v_mov_b32_e32 v8, v5
	s_xor_b32 s46, s46, s45
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s46
	s_sub_i32 s48, 0, s46
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s47, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s48, s48, s47
	s_mul_hi_u32 s48, s47, s48
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s47, s47, s48
	s_xor_b32 s48, s39, s45
	s_mul_hi_u32 s47, s41, s47
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_i32 s45, s47, s46
	s_add_i32 s49, s47, 1
	s_sub_i32 s45, s41, s45
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s50, s45, s46
	s_cmp_ge_u32 s45, s46
	s_cselect_b32 s47, s49, s47
	s_cselect_b32 s45, s50, s45
	s_add_i32 s49, s47, 1
	s_cmp_ge_u32 s45, s46
	s_load_b32 s50, s[24:25], 0xc
	s_cselect_b32 s49, s49, s47
	s_sub_i32 s45, 0, s43
	s_xor_b32 s49, s49, s48
	v_mul_lo_u32 v2, s45, v1
	s_sub_i32 s48, s49, s48
	s_mov_b32 s46, 0
	s_mul_i32 s48, s48, s37
	s_lshl_b32 s49, s43, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s47, s50, 0xffff
	v_add_nc_u32_e32 v3, v1, v2
	s_lshl_b32 s50, s47, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v6, s47, v3
	v_mul_lo_u32 v7, s47, v3
	v_mov_b32_e32 v3, v0
.LBB12_21:                              ;   Parent Loop BB12_14 Depth=1
                                        ;     Parent Loop BB12_19 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v11, s43, v2
	v_not_b32_e32 v12, v2
	v_add_nc_u32_e32 v13, 1, v2
	v_mad_u64_u32 v[9:10], null, s43, v12, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v10, v3, v11
	v_cmp_le_u32_e32 vcc_lo, s43, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v11, v2, v13, vcc_lo
	v_dual_cndmask_b32 v9, v10, v9 :: v_dual_add_nc_u32 v10, 1, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s43, v9
	v_cndmask_b32_e32 v13, v11, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[9:10], null, s45, v13, v[3:4]
	v_mul_lo_u32 v11, s49, v13
	v_mul_lo_u32 v9, s48, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v16, v11, s49, v8
	v_mad_u64_u32 v[11:12], null, v13, s43, v[3:4]
	v_add_nc_u32_e32 v8, s50, v8
	ds_load_b64 v[12:13], v16
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshl_add_u32 v17, v11, 3, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	ds_load_b64 v[14:15], v17
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, v7
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v6, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_mul_f32_e32 v11, v10, v13
	v_mul_f32_e32 v13, v9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, v9, v12, -v11
	v_fmac_f32_e32 v13, v10, v12
	v_add_nc_u32_e32 v3, s47, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v9, v14, v11 :: v_dual_add_f32 v12, v15, v13
	v_sub_f32_e32 v10, v15, v13
	v_cmp_le_i32_e32 vcc_lo, s19, v3
	v_add_f32_e32 v11, v14, v11
	ds_store_b64 v16, v[9:10]
	ds_store_b64 v17, v[11:12]
	s_or_b32 s46, vcc_lo, s46
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s46
	s_cbranch_execnz .LBB12_21
.LBB12_22:                              ; %Flow912
                                        ;   in Loop: Header=BB12_19 Depth=2
	s_or_b32 exec_lo, exec_lo, s44
	s_add_i32 s4, s4, 1
	s_lshl_b32 s43, s43, 1
	s_cmp_ge_i32 s4, s7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB12_19
.LBB12_23:                              ; %.preheader678
                                        ;   in Loop: Header=BB12_14 Depth=1
	s_and_saveexec_b32 s43, s2
	s_cbranch_execz .LBB12_26
; %bb.24:                               ; %.lr.ph699
                                        ;   in Loop: Header=BB12_14 Depth=1
	s_load_b32 s4, s[24:25], 0xc
	v_dual_mov_b32 v1, v5 :: v_dual_mov_b32 v2, v0
	s_mov_b32 s46, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s44, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s45, s44, 3
.LBB12_25:                              ;   Parent Loop BB12_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v6, s42, v2
	ds_load_b64 v[8:9], v1
	v_add_nc_u32_e32 v2, s44, v2
	v_add_nc_u32_e32 v1, s45, v1
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s27, v2
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_or_b32 s46, vcc_lo, s46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s4, s12, v6
	v_add_co_ci_u32_e64 v7, s4, s13, v7, s4
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[6:7], v[8:9], off
	s_and_not1_b32 exec_lo, exec_lo, s46
	s_cbranch_execnz .LBB12_25
.LBB12_26:                              ; %Flow910
                                        ;   in Loop: Header=BB12_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s43
	s_add_i32 s40, s40, 1
	s_add_i32 s42, s42, s27
	s_cmp_lg_u32 s40, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB12_14
.LBB12_27:                              ; %._crit_edge704
	s_cmp_lt_i32 s26, 1
	s_cbranch_scc1 .LBB12_33
; %bb.28:                               ; %.lr.ph712
	s_lshl_b64 s[4:5], 1, s7
	s_add_u32 s24, s0, 0x48
	s_addc_u32 s25, s1, 0
	s_ashr_i32 s5, s21, 31
	v_cmp_gt_i32_e32 vcc_lo, s21, v0
	s_add_i32 s2, s21, s5
	s_mov_b32 s40, s7
	s_xor_b32 s39, s2, s5
.LBB12_29:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB12_31 Depth 2
	s_and_saveexec_b32 s41, vcc_lo
	s_cbranch_execz .LBB12_32
; %bb.30:                               ; %.lr.ph707
                                        ;   in Loop: Header=BB12_29 Depth=1
	s_ashr_i32 s2, s4, 31
	v_cvt_f32_u32_e32 v2, s4
	s_add_i32 s3, s4, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s3, s3, s2
	s_xor_b32 s2, s5, s2
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s43, 0, s3
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s42, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s43, s43, s42
	s_mul_hi_u32 s43, s42, s43
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_i32 s42, s42, s43
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_hi_u32 s42, s39, s42
	s_mul_i32 s43, s42, s3
	s_add_i32 s44, s42, 1
	s_sub_i32 s43, s39, s43
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s45, s43, s3
	s_cmp_ge_u32 s43, s3
	s_cselect_b32 s42, s44, s42
	s_cselect_b32 s43, s45, s43
	s_add_i32 s44, s42, 1
	s_cmp_ge_u32 s43, s3
	s_load_b32 s43, s[24:25], 0xc
	s_cselect_b32 s3, s44, s42
	s_sub_i32 s42, 0, s4
	s_xor_b32 s3, s3, s2
	v_mul_lo_u32 v2, s42, v1
	s_sub_i32 s45, s3, s2
	s_mov_b32 s44, 0
	s_mul_i32 s45, s45, s37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_add_nc_u32_e32 v3, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s43, s43, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v5, s43, v3
	v_mul_lo_u32 v6, s43, v3
	v_mov_b32_e32 v3, v0
.LBB12_31:                              ;   Parent Loop BB12_29 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v9, s4, v2
	v_not_b32_e32 v10, v2
	v_add_nc_u32_e32 v11, 1, v2
	v_add_nc_u32_e32 v12, s38, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, s4, v10, v[3:4]
	v_sub_nc_u32_e32 v8, v3, v9
	v_cmp_le_u32_e64 s2, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, v2, v11, s2
	v_cndmask_b32_e64 v7, v8, v7, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, 1, v9
	v_cmp_le_u32_e64 s2, s4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, v9, v8, s2
	v_mad_u64_u32 v[7:8], null, s42, v9, v[3:4]
	v_mul_lo_u32 v11, v9, s4
	v_add_nc_u32_e32 v3, s43, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v10, s45, v7
	v_add3_u32 v8, v11, s4, v12
	v_add_nc_u32_e32 v12, v12, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v9, 31, v8
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[7:8], 3, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 3, v[10:11]
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, s2, s12, v7
	v_add_co_u32 v9, s3, s10, v9
	v_add_co_ci_u32_e64 v8, s2, s13, v8, s2
	v_add_co_ci_u32_e64 v10, s3, s11, v10, s3
	global_load_b64 v[14:15], v[7:8], off
	global_load_b64 v[9:10], v[9:10], off
	v_add_co_u32 v11, s2, s12, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s2, s13, v13, s2
	v_add_co_u32 v1, s2, v1, v6
	v_cmp_le_i32_e64 s3, s21, v3
	global_load_b64 v[16:17], v[11:12], off
	v_add_co_ci_u32_e64 v2, s2, v2, v5, s2
	s_or_b32 s44, s3, s44
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v13, v10, v15
	v_mul_f32_e32 v15, v9, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, v9, v14, -v13
	v_fmac_f32_e32 v15, v10, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_sub_f32 v9, v16, v13 :: v_dual_add_f32 v14, v17, v15
	v_dual_sub_f32 v10, v17, v15 :: v_dual_add_f32 v13, v16, v13
	s_clause 0x1
	global_store_b64 v[7:8], v[9:10], off
	global_store_b64 v[11:12], v[13:14], off
	s_and_not1_b32 exec_lo, exec_lo, s44
	s_cbranch_execnz .LBB12_31
.LBB12_32:                              ; %Flow906
                                        ;   in Loop: Header=BB12_29 Depth=1
	s_or_b32 exec_lo, exec_lo, s41
	s_add_i32 s40, s40, 1
	s_lshl_b32 s4, s4, 1
	s_cmp_lt_i32 s40, s14
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB12_29
.LBB12_33:                              ; %.loopexit677
	v_cmp_ne_u32_e32 vcc_lo, 1, v4
	s_cbranch_vccnz .LBB12_42
; %bb.34:
	v_cvt_f32_i32_e32 v1, s20
	v_cvt_f32_i32_e32 v2, s22
	s_mul_i32 s2, s34, s28
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v2
	v_div_scale_f32 v2, null, v1, v1, 0.5
	v_div_scale_f32 v5, vcc_lo, 0.5, v1, 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v4, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v5, v3
	v_fma_f32 v6, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v6, v3
	v_fma_f32 v2, -v2, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v4
	v_div_fixup_f32 v5, v2, v1, 0.5
	v_cmpx_gt_i32_e64 s21, v0
	s_cbranch_execz .LBB12_39
; %bb.35:                               ; %.lr.ph715
	s_add_i32 s4, s20, s29
	s_load_b32 s25, s[0:1], 0x54
	s_xor_b32 s4, s4, s29
	s_xor_b32 s24, s35, s29
	v_cvt_f32_u32_e32 v1, s4
	s_sub_i32 s22, 0, s4
	v_mov_b32_e32 v6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v1
	s_mul_i32 s22, s22, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s22, s5, s22
	s_add_i32 s5, s5, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s5, s36, s5
	s_mul_i32 s22, s5, s4
	s_add_i32 s34, s5, 1
	s_sub_i32 s22, s36, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s35, s22, s4
	s_cmp_ge_u32 s22, s4
	s_cselect_b32 s5, s34, s5
	s_cselect_b32 s22, s35, s22
	s_add_i32 s34, s5, 1
	s_cmp_ge_u32 s22, s4
	s_cselect_b32 s4, s34, s5
	s_mov_b32 s5, 0
	s_xor_b32 s4, s4, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s22, s4, s24
	s_add_i32 s4, s16, s2
	v_mul_lo_u32 v1, v0, s22
	v_sub_nc_u32_e32 v3, s4, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s25, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s22, s22, s4
.LBB12_36:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s24, exec_lo
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB12_38
; %bb.37:                               ;   in Loop: Header=BB12_36 Depth=1
	v_add_nc_u32_e32 v7, s2, v6
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[9:10], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[11:12], 3, v[1:2]
	v_lshlrev_b64 v[7:8], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s12, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	v_add_co_u32 v11, vcc_lo, s10, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
	s_clause 0x1
	global_load_b64 v[13:14], v[9:10], off
	global_load_b64 v[15:16], v[7:8], off
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v2, v14, v16
	v_dual_sub_f32 v4, v15, v13 :: v_dual_add_f32 v13, v13, v15
	v_sub_f32_e32 v14, v16, v14
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v17, v11, v2
	v_mul_f32_e32 v11, v11, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v2, v12, v2, -v11
	v_dual_fmac_f32 v17, v12, v4 :: v_dual_add_f32 v12, v14, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f32_e32 v4, v13, v17
	v_dual_sub_f32 v13, v13, v17 :: v_dual_sub_f32 v2, v2, v14
	v_mul_f32_e32 v12, v5, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v11, v5, v4
	v_mul_f32_e32 v13, v5, v13
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f32_e32 v14, v5, v2
	s_clause 0x1
	global_store_b64 v[7:8], v[11:12], off
	global_store_b64 v[9:10], v[13:14], off
.LBB12_38:                              ;   in Loop: Header=BB12_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v6, s4, v6
	v_subrev_nc_u32_e32 v3, s4, v3
	v_add_nc_u32_e32 v1, s22, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s21, v6
	s_or_b32 s5, vcc_lo, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB12_36
.LBB12_39:                              ; %Flow903
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB12_41
; %bb.40:
	s_add_i32 s24, s2, s21
	v_dual_mov_b32 v2, 0 :: v_dual_add_f32 v5, v5, v5
	s_ashr_i32 s25, s24, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[24:25], s[24:25], 3
	s_add_u32 s24, s12, s24
	s_addc_u32 s25, s13, s25
	s_ashr_i32 s3, s2, 31
	global_load_b64 v[3:4], v2, s[24:25]
	s_lshl_b64 s[2:3], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s12, s2
	s_addc_u32 s3, s13, s3
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v3, v5, v3
	v_mul_f32_e64 v4, v4, -v5
	global_store_b64 v2, v[3:4], s[24:25]
	global_load_b64 v[3:4], v2, s[2:3]
	s_lshl_b64 s[24:25], s[16:17], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	s_add_u32 s24, s2, s24
	s_addc_u32 s25, s3, s25
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v1, v3, v4
	v_add_f32_e32 v3, v3, v4
	v_mul_f32_e32 v1, v5, v1
	global_store_b64 v2, v[1:2], s[24:25]
	v_mul_f32_e32 v1, v5, v3
	global_store_b64 v2, v[1:2], s[2:3]
.LBB12_41:
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB12_42:
	s_cmp_lt_i32 s30, 1
	s_cbranch_scc1 .LBB12_81
; %bb.43:
	s_ashr_i32 s5, s31, 31
	s_add_i32 s4, s33, s15
	s_add_i32 s31, s31, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s15, s31, s5
	s_cmp_lt_i32 s4, s23
	s_cselect_b32 s22, -1, 0
	s_cmp_ge_i32 s4, s23
	s_cbranch_scc1 .LBB12_52
; %bb.44:
	s_mul_i32 s2, s4, s28
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s21, v0
	s_cbranch_execz .LBB12_49
; %bb.45:                               ; %.lr.ph719
	s_add_i32 s17, s20, s29
	s_load_b32 s25, s[0:1], 0x54
	s_xor_b32 s17, s17, s29
	s_xor_b32 s24, s5, s29
	v_cvt_f32_u32_e32 v1, s17
	s_sub_i32 s23, 0, s17
	v_mov_b32_e32 v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s20, v1
	s_mul_i32 s23, s23, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s23, s20, s23
	s_add_i32 s20, s20, s23
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s20, s15, s20
	s_mul_i32 s23, s20, s17
	s_add_i32 s29, s20, 1
	s_sub_i32 s23, s15, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s30, s23, s17
	s_cmp_ge_u32 s23, s17
	s_cselect_b32 s20, s29, s20
	s_cselect_b32 s23, s30, s23
	s_add_i32 s29, s20, 1
	s_cmp_ge_u32 s23, s17
	s_cselect_b32 s17, s29, s20
	s_mov_b32 s20, 0
	s_xor_b32 s17, s17, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s23, s17, s24
	s_add_i32 s17, s16, s2
	v_mul_lo_u32 v1, v0, s23
	v_sub_nc_u32_e32 v3, s17, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s17, s25, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s23, s23, s17
.LBB12_46:                              ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s24, exec_lo
	v_cmpx_ne_u32_e32 0, v5
	s_cbranch_execz .LBB12_48
; %bb.47:                               ;   in Loop: Header=BB12_46 Depth=1
	v_add_nc_u32_e32 v6, s2, v5
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[8:9], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[10:11], 3, v[1:2]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s12, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	v_add_co_u32 v10, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	s_clause 0x1
	global_load_b64 v[12:13], v[8:9], off
	global_load_b64 v[14:15], v[6:7], off
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(1)
	v_dual_add_f32 v2, v13, v15 :: v_dual_sub_f32 v13, v15, v13
	v_sub_f32_e32 v4, v14, v12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, v10, v2
	v_mul_f32_e32 v2, v11, v2
	v_fmac_f32_e32 v2, v10, v4
	v_add_f32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v14, v11, v4, -v16
	v_add_f32_e32 v11, v13, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_sub_f32 v13, v2, v13 :: v_dual_add_f32 v10, v12, v14
	v_sub_f32_e32 v12, v12, v14
	s_clause 0x1
	global_store_b64 v[6:7], v[10:11], off
	global_store_b64 v[8:9], v[12:13], off
.LBB12_48:                              ;   in Loop: Header=BB12_46 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v5, s17, v5
	v_subrev_nc_u32_e32 v3, s17, v3
	v_add_nc_u32_e32 v1, s23, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s21, v5
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB12_46
.LBB12_49:                              ; %Flow899
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s20, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB12_51
; %bb.50:
	s_add_i32 s24, s2, s21
	v_mov_b32_e32 v3, 0
	s_ashr_i32 s25, s24, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[24:25], s[24:25], 3
	s_add_u32 s24, s12, s24
	s_addc_u32 s25, s13, s25
	s_ashr_i32 s3, s2, 31
	global_load_b64 v[1:2], v3, s[24:25]
	s_lshl_b64 s[2:3], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s12, s2
	s_addc_u32 s3, s13, s3
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[30:31], s[16:17], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s30, s2, s30
	s_addc_u32 s31, s3, s31
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v2, -2.0, v2 :: v_dual_add_f32 v1, v1, v1
	global_store_b64 v3, v[1:2], s[24:25]
	s_clause 0x1
	global_load_b32 v2, v3, s[2:3]
	global_load_b32 v4, v3, s[30:31]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v2, v4
	v_sub_f32_e32 v2, v2, v4
	global_store_b64 v3, v[1:2], s[2:3]
.LBB12_51:
	s_or_b32 exec_lo, exec_lo, s20
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB12_52:
	s_ashr_i32 s17, s16, 31
	v_cndmask_b32_e64 v3, 0, 1, s22
	s_add_i32 s2, s16, s17
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_xor_b32 s3, s2, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s2, 0, s3
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s20, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s2, s20
	s_mul_hi_u32 s2, s20, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s20, s20, s2
	s_cbranch_vccnz .LBB12_59
; %bb.53:
	s_mov_b32 s22, exec_lo
	v_cmpx_gt_i32_e64 s16, v0
	s_cbranch_execz .LBB12_58
; %bb.54:                               ; %.lr.ph723
	s_ashr_i32 s2, s18, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s18, s18, s2
	s_xor_b32 s18, s18, s2
	s_xor_b32 s2, s2, s17
	s_mul_hi_u32 s23, s18, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s24, s23, s3
	s_sub_i32 s18, s18, s24
	s_add_i32 s24, s23, 1
	s_sub_i32 s25, s18, s3
	s_cmp_ge_u32 s18, s3
	s_cselect_b32 s23, s24, s23
	s_cselect_b32 s18, s25, s18
	s_add_i32 s24, s23, 1
	s_cmp_ge_u32 s18, s3
	s_load_b32 s25, s[0:1], 0x54
	s_cselect_b32 s18, s24, s23
	s_mul_i32 s24, s4, s28
	s_xor_b32 s18, s18, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s18, s2
	s_ashr_i32 s18, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s18
	s_xor_b32 s23, s2, s18
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s23
	s_sub_i32 s2, 0, s23
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v1
	v_mul_lo_u32 v1, s2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v4, v1
	v_lshlrev_b32_e32 v1, 2, v0
	v_add_co_u32 v1, s2, s8, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v2, null, s9, 0, s2
	v_add_nc_u32_e32 v4, v4, v5
	v_mov_b32_e32 v5, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s25, 0xffff
	s_mov_b32 s9, 0
	s_lshl_b32 s25, s8, 2
.LBB12_55:                              ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[1:2], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v6, -1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_nc_u32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v6, v6, v7
	v_xor_b32_e32 v7, s18, v7
	v_mul_hi_u32 v8, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v8, s23
	v_sub_nc_u32_e32 v6, v6, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v10, s23, v6
	v_cmp_le_u32_e32 vcc_lo, s23, v6
	v_dual_cndmask_b32 v6, v6, v10 :: v_dual_add_nc_u32 v9, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, v8, v9, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s23, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, 1, v8
	v_cndmask_b32_e32 v6, v8, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v6, v6, v7
	v_sub_nc_u32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v5, v6
	s_cbranch_execz .LBB12_57
; %bb.56:                               ;   in Loop: Header=BB12_55 Depth=1
	v_add_nc_u32_e32 v7, s24, v5
	v_add_nc_u32_e32 v9, s24, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 3, v[7:8]
	v_lshlrev_b64 v[8:9], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s12, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	s_clause 0x1
	global_load_b64 v[10:11], v[6:7], off
	global_load_b64 v[12:13], v[8:9], off
	s_waitcnt vmcnt(1)
	global_store_b64 v[8:9], v[10:11], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[6:7], v[12:13], off
.LBB12_57:                              ;   in Loop: Header=BB12_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v5, s8, v5
	v_add_co_u32 v1, s2, v1, s25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s2, 0, v2, s2
	v_cmp_le_i32_e32 vcc_lo, s16, v5
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB12_55
.LBB12_58:                              ; %Flow896
	s_or_b32 exec_lo, exec_lo, s22
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB12_59:
	v_cmp_ne_u32_e32 vcc_lo, 1, v3
	s_cbranch_vccnz .LBB12_81
; %bb.60:
	s_mul_hi_u32 s2, s15, s20
	s_xor_b32 s5, s5, s17
	s_mul_i32 s8, s2, s3
	s_add_i32 s9, s2, 1
	s_sub_i32 s8, s15, s8
	s_mul_i32 s16, s4, s28
	s_sub_i32 s15, s8, s3
	s_cmp_ge_u32 s8, s3
	s_cselect_b32 s2, s9, s2
	s_cselect_b32 s8, s15, s8
	s_add_i32 s9, s2, 1
	s_cmp_ge_u32 s8, s3
	s_cselect_b32 s2, s9, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s5
	s_sub_i32 s15, s2, s5
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB12_75
; %bb.61:                               ; %.lr.ph742
	s_add_u32 s8, s0, 0x48
	s_addc_u32 s9, s1, 0
	s_cmp_gt_i32 s7, 0
	v_cmp_gt_i32_e64 s2, s27, v0
	s_cselect_b32 s5, -1, 0
	s_ashr_i32 s17, s21, 31
	v_cmp_gt_i32_e64 s3, s19, v0
	v_lshl_add_u32 v4, v0, 3, 0
	s_add_i32 s4, s21, s17
	s_mov_b32 s18, 0
	s_xor_b32 s20, s4, s17
	s_mov_b32 s22, s16
.LBB12_62:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB12_64 Depth 2
                                        ;     Child Loop BB12_67 Depth 2
                                        ;       Child Loop BB12_69 Depth 3
                                        ;     Child Loop BB12_73 Depth 2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB12_65
; %bb.63:                               ; %.lr.ph727
                                        ;   in Loop: Header=BB12_62 Depth=1
	s_load_b32 s23, s[8:9], 0xc
	v_mov_b32_e32 v1, v4
	v_mov_b32_e32 v2, v0
	s_mov_b32 s25, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s23, s23, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s24, s23, 3
.LBB12_64:                              ;   Parent Loop BB12_62 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v5, s22, v2
	v_add_nc_u32_e32 v2, s23, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s27, v2
	global_load_b64 v[5:6], v[5:6], off
	s_or_b32 s25, vcc_lo, s25
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[5:6]
	v_add_nc_u32_e32 v1, s24, v1
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB12_64
.LBB12_65:                              ; %Flow891
                                        ;   in Loop: Header=BB12_62 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB12_71
; %bb.66:                               ; %.lr.ph736.preheader
                                        ;   in Loop: Header=BB12_62 Depth=1
	s_mov_b32 s4, 0
	s_mov_b32 s23, 1
.LBB12_67:                              ; %.lr.ph736
                                        ;   Parent Loop BB12_62 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB12_69 Depth 3
	s_and_saveexec_b32 s24, s3
	s_cbranch_execz .LBB12_70
; %bb.68:                               ; %.lr.ph731
                                        ;   in Loop: Header=BB12_67 Depth=2
	s_ashr_i32 s25, s23, 31
	v_cvt_f32_u32_e32 v2, s23
	s_add_i32 s28, s23, s25
	v_mov_b32_e32 v7, v4
	s_xor_b32 s28, s28, s25
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s28
	s_sub_i32 s30, 0, s28
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s29, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s30, s30, s29
	s_mul_hi_u32 s30, s29, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s29, s29, s30
	s_xor_b32 s30, s17, s25
	s_mul_hi_u32 s29, s20, s29
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_i32 s25, s29, s28
	s_add_i32 s31, s29, 1
	s_sub_i32 s25, s20, s25
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s33, s25, s28
	s_cmp_ge_u32 s25, s28
	s_cselect_b32 s29, s31, s29
	s_cselect_b32 s25, s33, s25
	s_add_i32 s31, s29, 1
	s_cmp_ge_u32 s25, s28
	s_load_b32 s33, s[8:9], 0xc
	s_cselect_b32 s31, s31, s29
	s_sub_i32 s25, 0, s23
	s_xor_b32 s31, s31, s30
	v_mul_lo_u32 v2, s25, v1
	s_sub_i32 s30, s31, s30
	s_mov_b32 s28, 0
	s_mul_i32 s30, s30, s15
	s_lshl_b32 s31, s23, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s29, s33, 0xffff
	v_add_nc_u32_e32 v3, v1, v2
	s_lshl_b32 s33, s29, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v5, s29, v3
	v_mul_lo_u32 v6, s29, v3
	v_mov_b32_e32 v3, v0
.LBB12_69:                              ;   Parent Loop BB12_62 Depth=1
                                        ;     Parent Loop BB12_67 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, s23, v2
	v_not_b32_e32 v11, v2
	v_add_nc_u32_e32 v12, 1, v2
	v_mad_u64_u32 v[8:9], null, s23, v11, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v3, v10
	v_cmp_le_u32_e32 vcc_lo, s23, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v2, v12, vcc_lo
	v_dual_cndmask_b32 v8, v9, v8 :: v_dual_add_nc_u32 v9, 1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s23, v8
	v_cndmask_b32_e32 v12, v10, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, s31, v12
	v_add3_u32 v15, v10, s31, v7
	v_add_nc_u32_e32 v7, s33, v7
	v_mad_u64_u32 v[8:9], null, s25, v12, v[3:4]
	v_mad_u64_u32 v[10:11], null, v12, s23, v[3:4]
	ds_load_b64 v[11:12], v15
	v_add_nc_u32_e32 v3, s29, v3
	v_mul_lo_u32 v8, s30, v8
	v_lshl_add_u32 v16, v10, 3, 0
	ds_load_b64 v[13:14], v16
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v5, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	v_cmp_le_i32_e32 vcc_lo, s19, v3
	s_or_b32 s28, vcc_lo, s28
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_mul_f32_e32 v10, v9, v12
	v_mul_f32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v8, v11
	v_fma_f32 v11, v8, v12, -v9
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_sub_f32 v8, v13, v10 :: v_dual_sub_f32 v9, v14, v11
	v_dual_add_f32 v11, v14, v11 :: v_dual_add_f32 v10, v13, v10
	ds_store_b64 v15, v[8:9]
	ds_store_b64 v16, v[10:11]
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB12_69
.LBB12_70:                              ; %Flow887
                                        ;   in Loop: Header=BB12_67 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
	s_add_i32 s4, s4, 1
	s_lshl_b32 s23, s23, 1
	s_cmp_ge_i32 s4, s7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB12_67
.LBB12_71:                              ; %.preheader
                                        ;   in Loop: Header=BB12_62 Depth=1
	s_and_saveexec_b32 s23, s2
	s_cbranch_execz .LBB12_74
; %bb.72:                               ; %.lr.ph738
                                        ;   in Loop: Header=BB12_62 Depth=1
	s_load_b32 s4, s[8:9], 0xc
	v_mov_b32_e32 v1, v4
	v_mov_b32_e32 v2, v0
	s_mov_b32 s28, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s24, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s25, s24, 3
.LBB12_73:                              ;   Parent Loop BB12_62 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v5, s22, v2
	ds_load_b64 v[7:8], v1
	v_add_nc_u32_e32 v2, s24, v2
	v_add_nc_u32_e32 v1, s25, v1
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s27, v2
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_or_b32 s28, vcc_lo, s28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s4, s12, v5
	v_add_co_ci_u32_e64 v6, s4, s13, v6, s4
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[5:6], v[7:8], off
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB12_73
.LBB12_74:                              ; %Flow885
                                        ;   in Loop: Header=BB12_62 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	s_add_i32 s18, s18, 1
	s_add_i32 s22, s22, s27
	s_cmp_lg_u32 s18, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB12_62
.LBB12_75:                              ; %._crit_edge743
	s_cmp_lt_i32 s26, 1
	s_cbranch_scc1 .LBB12_81
; %bb.76:                               ; %.lr.ph751
	s_lshl_b64 s[2:3], 1, s7
	s_add_u32 s4, s0, 0x48
	s_addc_u32 s5, s1, 0
	s_ashr_i32 s3, s21, 31
	v_cmp_gt_i32_e32 vcc_lo, s21, v0
	s_add_i32 s0, s21, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, s0, s3
.LBB12_77:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB12_79 Depth 2
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB12_80
; %bb.78:                               ; %.lr.ph746
                                        ;   in Loop: Header=BB12_77 Depth=1
	s_ashr_i32 s0, s2, 31
	v_cvt_f32_u32_e32 v2, s2
	s_add_i32 s1, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s1, s1, s0
	s_xor_b32 s0, s3, s0
	v_cvt_f32_u32_e32 v1, s1
	s_sub_i32 s17, 0, s1
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s9, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s17, s17, s9
	s_mul_hi_u32 s17, s9, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s9, s17
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_hi_u32 s9, s6, s9
	s_mul_i32 s17, s9, s1
	s_add_i32 s18, s9, 1
	s_sub_i32 s17, s6, s17
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s19, s17, s1
	s_cmp_ge_u32 s17, s1
	s_cselect_b32 s9, s18, s9
	s_cselect_b32 s17, s19, s17
	s_add_i32 s18, s9, 1
	s_cmp_ge_u32 s17, s1
	s_load_b32 s17, s[4:5], 0xc
	s_cselect_b32 s1, s18, s9
	s_sub_i32 s9, 0, s2
	s_xor_b32 s1, s1, s0
	v_mul_lo_u32 v2, s9, v1
	s_sub_i32 s19, s1, s0
	s_mov_b32 s18, 0
	s_mul_i32 s19, s19, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_add_nc_u32_e32 v3, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s17, s17, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v4, s17, v3
	v_mul_lo_u32 v5, s17, v3
	v_mov_b32_e32 v3, v0
.LBB12_79:                              ;   Parent Loop BB12_77 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, s2, v2
	v_not_b32_e32 v9, v2
	v_add_nc_u32_e32 v10, 1, v2
	v_add_nc_u32_e32 v11, s16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s2, v9, v[3:4]
	v_sub_nc_u32_e32 v7, v3, v8
	v_cmp_le_u32_e64 s0, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v2, v10, s0
	v_cndmask_b32_e64 v6, v7, v6, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v8
	v_cmp_le_u32_e64 s0, s2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v7, s0
	v_mad_u64_u32 v[6:7], null, s9, v8, v[3:4]
	v_mul_lo_u32 v10, v8, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, s19, v6
	v_add3_u32 v7, v10, s2, v11
	v_add_nc_u32_e32 v11, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[6:7], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 3, v[9:10]
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, s0, s12, v6
	v_add_co_u32 v8, s1, s10, v8
	v_add_co_ci_u32_e64 v7, s0, s13, v7, s0
	v_add_co_ci_u32_e64 v9, s1, s11, v9, s1
	global_load_b64 v[13:14], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v10, s0, s12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s13, v12, s0
	v_add_co_u32 v1, s0, v1, v5
	v_add_co_ci_u32_e64 v2, s0, v2, v4, s0
	global_load_b64 v[15:16], v[10:11], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v12, v9, v14
	v_mul_f32_e32 v9, v9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v12, v8, v13 :: v_dual_add_nc_u32 v3, s17, v3
	v_fma_f32 v13, v8, v14, -v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v15, v12
	v_cmp_le_i32_e64 s1, s21, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_sub_f32 v9, v16, v13 :: v_dual_add_f32 v12, v15, v12
	v_add_f32_e32 v13, v16, v13
	s_clause 0x1
	global_store_b64 v[6:7], v[8:9], off
	global_store_b64 v[10:11], v[12:13], off
	s_or_b32 s18, s1, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB12_79
.LBB12_80:                              ; %Flow881
                                        ;   in Loop: Header=BB12_77 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s7, s7, 1
	s_lshl_b32 s2, s2, 1
	s_cmp_lt_i32 s7, s14
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB12_77
.LBB12_81:                              ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 51
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, .Lfunc_end12-_Z11gpufft2rcxsP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6544
; NumSgprs: 53
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 53
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii ; -- Begin function _Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.globl	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
	.p2align	8
	.type	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii,@function
_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii: ; @_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x20
	s_load_b32 s8, s[0:1], 0x40
	s_mov_b32 s18, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[2:3], 1, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s3, s2, 31
	s_mov_b32 s20, s2
	s_add_i32 s3, s2, s3
	s_ashr_i32 s16, s3, 1
	s_cmp_le_i32 s2, s8
	s_cbranch_scc1 .LBB13_3
.LBB13_1:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s9, s20, 31
	s_mov_b32 s3, s20
	s_add_i32 s9, s20, s9
	s_add_i32 s18, s18, 1
	s_ashr_i32 s20, s9, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_i32 s20, s8
	s_cbranch_scc1 .LBB13_1
; %bb.2:                                ; %._crit_edge.loopexit
	s_ashr_i32 s8, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s8, s8, 30
	s_add_i32 s3, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s21, s3, 2
	s_branch .LBB13_4
.LBB13_3:
	s_mov_b32 s21, s16
.LBB13_4:                               ; %._crit_edge
	s_ashr_i32 s14, s2, 31
	s_clause 0x2
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b32 s22, s[0:1], 0x34
	s_add_i32 s3, s2, s14
	s_add_i32 s23, s6, -1
	s_xor_b32 s3, s3, s14
	s_add_i32 s6, s23, s7
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s19, 0, s3
	s_add_i32 s23, s23, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s17, v1
	s_mul_i32 s19, s19, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s17, s19
	s_add_i32 s15, s17, s7
	s_cmp_ge_i32 s23, s6
	s_cselect_b32 s24, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s24
	s_cbranch_vccnz .LBB13_11
; %bb.5:
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB13_10
; %bb.6:                                ; %.lr.ph434
	s_add_i32 s7, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_max_i32 s7, s7, s5
	s_lshl_b64 s[26:27], 1, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s7, s26, 31
	s_add_i32 s17, s26, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_xor_b32 s17, s17, s7
	s_xor_b32 s7, s7, s14
	s_mul_hi_u32 s19, s17, s15
	s_mul_i32 s25, s19, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s17, s17, s25
	s_add_i32 s25, s19, 1
	s_sub_i32 s26, s17, s3
	s_cmp_ge_u32 s17, s3
	s_cselect_b32 s19, s25, s19
	s_cselect_b32 s17, s26, s17
	s_add_i32 s25, s19, 1
	s_cmp_ge_u32 s17, s3
	s_mov_b32 s26, 0
	s_cselect_b32 s17, s25, s19
	s_load_b32 s25, s[0:1], 0x54
	s_xor_b32 s17, s17, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s17, s17, s7
	s_ashr_i32 s7, s17, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s17, s17, s7
	s_xor_b32 s17, s17, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s17
	s_sub_i32 s19, 0, s17
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s25, s25, 0xffff
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_mul_lo_u32 v2, s19, v1
	s_mul_i32 s19, s23, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_add_nc_u32_e32 v3, v1, v2
	v_mov_b32_e32 v1, v0
.LBB13_7:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s27, exec_lo
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, -1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v2
	v_add_nc_u32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v2, v4
	v_xor_b32_e32 v4, s7, v4
	v_mul_hi_u32 v5, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v5, s17
	v_sub_nc_u32_e32 v2, v2, v6
	v_add_nc_u32_e32 v6, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s17, v2
	v_cmp_le_u32_e32 vcc_lo, s17, v2
	v_dual_cndmask_b32 v5, v5, v6 :: v_dual_cndmask_b32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, 1, v5
	v_cmp_le_u32_e32 vcc_lo, s17, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v5, v6, vcc_lo
	v_xor_b32_e32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v4
	v_cmpx_lt_i32_e64 v1, v2
	s_cbranch_execz .LBB13_9
; %bb.8:                                ;   in Loop: Header=BB13_7 Depth=1
	v_add_nc_u32_e32 v4, s19, v1
	v_add_nc_u32_e32 v6, s19, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s12, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[8:9], v[4:5], off
	global_load_b64 v[10:11], v[6:7], off
	s_waitcnt vmcnt(1)
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[4:5], v[10:11], off
.LBB13_9:                               ;   in Loop: Header=BB13_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_add_nc_u32_e32 v1, s25, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s26, vcc_lo, s26
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB13_7
.LBB13_10:                              ; %Flow614
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB13_11:
	s_lshl_b64 s[6:7], 1, s4
	s_sub_i32 s17, s5, s18
	s_max_i32 s2, s6, s2
	s_lshl_b64 s[6:7], 1, s18
	s_ashr_i32 s4, s2, 31
	s_load_b32 s7, s[0:1], 0x8
	s_add_i32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s4
	s_xor_b32 s4, s4, s14
	s_waitcnt lgkmcnt(0)
	s_mul_hi_u32 s8, s2, s15
	s_mul_i32 s9, s8, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s2, s2, s9
	s_add_i32 s9, s8, 1
	s_sub_i32 s14, s2, s3
	s_cmp_ge_u32 s2, s3
	s_cselect_b32 s8, s9, s8
	s_cselect_b32 s2, s14, s2
	s_add_i32 s9, s8, 1
	s_cmp_ge_u32 s2, s3
	s_cselect_b32 s2, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s4
	s_sub_i32 s19, s2, s4
	s_cmp_gt_i32 s7, -1
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s24
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB13_33
; %bb.12:
	s_cmp_lt_i32 s6, 1
	s_mul_i32 s25, s23, s22
	s_cbranch_scc1 .LBB13_27
; %bb.13:                               ; %.lr.ph453
	s_add_u32 s8, s0, 0x48
	s_addc_u32 s9, s1, 0
	s_cmp_gt_i32 s17, 0
	v_cmp_gt_i32_e64 s2, s20, v0
	s_cselect_b32 s14, -1, 0
	s_ashr_i32 s15, s16, 31
	v_cmp_gt_i32_e64 s3, s21, v0
	v_lshl_add_u32 v4, v0, 3, 0
	s_add_i32 s4, s16, s15
	s_mov_b32 s26, 0
	s_xor_b32 s27, s4, s15
	s_mov_b32 s28, s25
.LBB13_14:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB13_16 Depth 2
                                        ;     Child Loop BB13_19 Depth 2
                                        ;       Child Loop BB13_21 Depth 3
                                        ;     Child Loop BB13_25 Depth 2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB13_17
; %bb.15:                               ; %.lr.ph438
                                        ;   in Loop: Header=BB13_14 Depth=1
	s_load_b32 s29, s[8:9], 0xc
	v_mov_b32_e32 v1, v4
	v_mov_b32_e32 v2, v0
	s_mov_b32 s31, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s29, s29, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s30, s29, 3
.LBB13_16:                              ;   Parent Loop BB13_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v5, s28, v2
	v_add_nc_u32_e32 v2, s29, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s20, v2
	global_load_b64 v[5:6], v[5:6], off
	s_or_b32 s31, vcc_lo, s31
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[5:6]
	v_add_nc_u32_e32 v1, s30, v1
	s_and_not1_b32 exec_lo, exec_lo, s31
	s_cbranch_execnz .LBB13_16
.LBB13_17:                              ; %Flow609
                                        ;   in Loop: Header=BB13_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB13_23
; %bb.18:                               ; %.lr.ph447.preheader
                                        ;   in Loop: Header=BB13_14 Depth=1
	s_mov_b32 s4, 0
	s_mov_b32 s29, 1
.LBB13_19:                              ; %.lr.ph447
                                        ;   Parent Loop BB13_14 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB13_21 Depth 3
	s_and_saveexec_b32 s30, s3
	s_cbranch_execz .LBB13_22
; %bb.20:                               ; %.lr.ph442
                                        ;   in Loop: Header=BB13_19 Depth=2
	s_ashr_i32 s31, s29, 31
	v_cvt_f32_u32_e32 v2, s29
	s_add_i32 s33, s29, s31
	v_mov_b32_e32 v7, v4
	s_xor_b32 s33, s33, s31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s33
	s_sub_i32 s35, 0, s33
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s34, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s35, s35, s34
	s_mul_hi_u32 s35, s34, s35
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s34, s34, s35
	s_xor_b32 s35, s15, s31
	s_mul_hi_u32 s34, s27, s34
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_i32 s31, s34, s33
	s_add_i32 s36, s34, 1
	s_sub_i32 s31, s27, s31
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s37, s31, s33
	s_cmp_ge_u32 s31, s33
	s_cselect_b32 s34, s36, s34
	s_cselect_b32 s31, s37, s31
	s_add_i32 s36, s34, 1
	s_cmp_ge_u32 s31, s33
	s_load_b32 s37, s[8:9], 0xc
	s_cselect_b32 s36, s36, s34
	s_sub_i32 s31, 0, s29
	s_xor_b32 s36, s36, s35
	v_mul_lo_u32 v2, s31, v1
	s_sub_i32 s35, s36, s35
	s_mov_b32 s33, 0
	s_mul_i32 s35, s35, s19
	s_lshl_b32 s36, s29, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s34, s37, 0xffff
	v_add_nc_u32_e32 v3, v1, v2
	s_lshl_b32 s37, s34, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v5, s34, v3
	v_mul_lo_u32 v6, s34, v3
	v_mov_b32_e32 v3, v0
.LBB13_21:                              ;   Parent Loop BB13_14 Depth=1
                                        ;     Parent Loop BB13_19 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, s29, v2
	v_not_b32_e32 v11, v2
	v_add_nc_u32_e32 v12, 1, v2
	v_mad_u64_u32 v[8:9], null, s29, v11, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v3, v10
	v_cmp_le_u32_e32 vcc_lo, s29, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v2, v12, vcc_lo
	v_dual_cndmask_b32 v8, v9, v8 :: v_dual_add_nc_u32 v9, 1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s29, v8
	v_cndmask_b32_e32 v12, v10, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, s36, v12
	v_add3_u32 v15, v10, s36, v7
	v_add_nc_u32_e32 v7, s37, v7
	v_mad_u64_u32 v[8:9], null, s31, v12, v[3:4]
	v_mad_u64_u32 v[10:11], null, v12, s29, v[3:4]
	ds_load_b64 v[11:12], v15
	v_add_nc_u32_e32 v3, s34, v3
	v_mul_lo_u32 v8, s35, v8
	v_lshl_add_u32 v16, v10, 3, 0
	ds_load_b64 v[13:14], v16
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v5, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	v_cmp_le_i32_e32 vcc_lo, s21, v3
	s_or_b32 s33, vcc_lo, s33
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_mul_f32_e32 v10, v9, v12
	v_mul_f32_e32 v12, v8, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, v8, v11, -v10
	v_fmac_f32_e32 v12, v9, v11
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_sub_f32 v8, v13, v10 :: v_dual_sub_f32 v9, v14, v12
	v_dual_add_f32 v10, v13, v10 :: v_dual_add_f32 v11, v14, v12
	ds_store_b64 v15, v[8:9]
	ds_store_b64 v16, v[10:11]
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB13_21
.LBB13_22:                              ; %Flow605
                                        ;   in Loop: Header=BB13_19 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_add_i32 s4, s4, 1
	s_lshl_b32 s29, s29, 1
	s_cmp_ge_i32 s4, s17
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB13_19
.LBB13_23:                              ; %.preheader428
                                        ;   in Loop: Header=BB13_14 Depth=1
	s_and_saveexec_b32 s29, s2
	s_cbranch_execz .LBB13_26
; %bb.24:                               ; %.lr.ph449
                                        ;   in Loop: Header=BB13_14 Depth=1
	s_load_b32 s4, s[8:9], 0xc
	v_mov_b32_e32 v1, v4
	v_mov_b32_e32 v2, v0
	s_mov_b32 s33, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s30, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s31, s30, 3
.LBB13_25:                              ;   Parent Loop BB13_14 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v5, s28, v2
	ds_load_b64 v[7:8], v1
	v_add_nc_u32_e32 v2, s30, v2
	v_add_nc_u32_e32 v1, s31, v1
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s20, v2
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_or_b32 s33, vcc_lo, s33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s4, s12, v5
	v_add_co_ci_u32_e64 v6, s4, s13, v6, s4
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[5:6], v[7:8], off
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB13_25
.LBB13_26:                              ; %Flow603
                                        ;   in Loop: Header=BB13_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
	s_add_i32 s26, s26, 1
	s_add_i32 s28, s28, s20
	s_cmp_lg_u32 s26, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB13_14
.LBB13_27:                              ; %._crit_edge454
	s_cmp_lt_i32 s18, 1
	s_cbranch_scc1 .LBB13_33
; %bb.28:                               ; %.lr.ph462
	s_lshl_b64 s[8:9], 1, s17
	s_add_u32 s14, s0, 0x48
	s_addc_u32 s15, s1, 0
	s_ashr_i32 s4, s16, 31
	v_cmp_gt_i32_e32 vcc_lo, s16, v0
	s_add_i32 s2, s16, s4
	s_mov_b32 s26, s17
	s_xor_b32 s9, s2, s4
.LBB13_29:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB13_31 Depth 2
	s_and_saveexec_b32 s27, vcc_lo
	s_cbranch_execz .LBB13_32
; %bb.30:                               ; %.lr.ph457
                                        ;   in Loop: Header=BB13_29 Depth=1
	s_ashr_i32 s2, s8, 31
	v_cvt_f32_u32_e32 v2, s8
	s_add_i32 s3, s8, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s3, s3, s2
	s_xor_b32 s2, s4, s2
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s29, 0, s3
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s28, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s29, s29, s28
	s_mul_hi_u32 s29, s28, s29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_i32 s28, s28, s29
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_hi_u32 s28, s9, s28
	s_mul_i32 s29, s28, s3
	s_add_i32 s30, s28, 1
	s_sub_i32 s29, s9, s29
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s31, s29, s3
	s_cmp_ge_u32 s29, s3
	s_cselect_b32 s28, s30, s28
	s_cselect_b32 s29, s31, s29
	s_add_i32 s30, s28, 1
	s_cmp_ge_u32 s29, s3
	s_load_b32 s29, s[14:15], 0xc
	s_cselect_b32 s3, s30, s28
	s_sub_i32 s28, 0, s8
	s_xor_b32 s3, s3, s2
	v_mul_lo_u32 v2, s28, v1
	s_sub_i32 s31, s3, s2
	s_mov_b32 s30, 0
	s_mul_i32 s31, s31, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_add_nc_u32_e32 v3, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s29, s29, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v4, s29, v3
	v_mul_lo_u32 v5, s29, v3
	v_mov_b32_e32 v3, v0
.LBB13_31:                              ;   Parent Loop BB13_29 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, s8, v2
	v_not_b32_e32 v9, v2
	v_add_nc_u32_e32 v10, 1, v2
	v_add_nc_u32_e32 v11, s25, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s8, v9, v[3:4]
	v_sub_nc_u32_e32 v7, v3, v8
	v_cmp_le_u32_e64 s2, s8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v2, v10, s2
	v_cndmask_b32_e64 v6, v7, v6, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v8
	v_cmp_le_u32_e64 s2, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v7, s2
	v_mad_u64_u32 v[6:7], null, s28, v8, v[3:4]
	v_mul_lo_u32 v10, v8, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, s31, v6
	v_add3_u32 v7, v10, s8, v11
	v_add_nc_u32_e32 v11, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[6:7], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 3, v[9:10]
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, s2, s12, v6
	v_add_co_u32 v8, s3, s10, v8
	v_add_co_ci_u32_e64 v7, s2, s13, v7, s2
	v_add_co_ci_u32_e64 v9, s3, s11, v9, s3
	global_load_b64 v[13:14], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v10, s2, s12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s2, s13, v12, s2
	v_add_co_u32 v1, s2, v1, v5
	v_add_co_ci_u32_e64 v2, s2, v2, v4, s2
	global_load_b64 v[15:16], v[10:11], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v12, v9, v14
	v_mul_f32_e32 v14, v8, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, v8, v13, -v12
	v_dual_fmac_f32 v14, v9, v13 :: v_dual_add_nc_u32 v3, s29, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v8, v15, v12 :: v_dual_sub_f32 v9, v16, v14
	v_add_f32_e32 v12, v15, v12
	v_cmp_le_i32_e64 s3, s16, v3
	v_add_f32_e32 v13, v16, v14
	s_clause 0x1
	global_store_b64 v[6:7], v[8:9], off
	global_store_b64 v[10:11], v[12:13], off
	s_or_b32 s30, s3, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB13_31
.LBB13_32:                              ; %Flow599
                                        ;   in Loop: Header=BB13_29 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	s_add_i32 s26, s26, 1
	s_lshl_b32 s8, s8, 1
	s_cmp_lt_i32 s26, s5
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB13_29
.LBB13_33:                              ; %.loopexit427
	s_cmp_lt_i32 s7, 1
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s24
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB13_55
; %bb.34:
	s_cmp_lt_i32 s6, 1
	s_mul_i32 s14, s23, s22
	s_cbranch_scc1 .LBB13_49
; %bb.35:                               ; %.lr.ph480
	s_add_u32 s8, s0, 0x48
	s_addc_u32 s9, s1, 0
	s_cmp_gt_i32 s17, 0
	v_cmp_gt_i32_e64 s2, s20, v0
	s_cselect_b32 s7, -1, 0
	s_ashr_i32 s15, s16, 31
	v_cmp_gt_i32_e64 s3, s21, v0
	v_lshl_add_u32 v4, v0, 3, 0
	s_add_i32 s4, s16, s15
	s_mov_b32 s22, 0
	s_xor_b32 s23, s4, s15
	s_mov_b32 s24, s14
.LBB13_36:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB13_38 Depth 2
                                        ;     Child Loop BB13_41 Depth 2
                                        ;       Child Loop BB13_43 Depth 3
                                        ;     Child Loop BB13_47 Depth 2
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB13_39
; %bb.37:                               ; %.lr.ph465
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_load_b32 s25, s[8:9], 0xc
	v_mov_b32_e32 v1, v4
	v_mov_b32_e32 v2, v0
	s_mov_b32 s27, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s25, s25, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s26, s25, 3
.LBB13_38:                              ;   Parent Loop BB13_36 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v5, s24, v2
	v_add_nc_u32_e32 v2, s25, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s20, v2
	global_load_b64 v[5:6], v[5:6], off
	s_or_b32 s27, vcc_lo, s27
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[5:6]
	v_add_nc_u32_e32 v1, s26, v1
	s_and_not1_b32 exec_lo, exec_lo, s27
	s_cbranch_execnz .LBB13_38
.LBB13_39:                              ; %Flow594
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB13_45
; %bb.40:                               ; %.lr.ph474.preheader
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_mov_b32 s4, 0
	s_mov_b32 s25, 1
.LBB13_41:                              ; %.lr.ph474
                                        ;   Parent Loop BB13_36 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB13_43 Depth 3
	s_and_saveexec_b32 s26, s3
	s_cbranch_execz .LBB13_44
; %bb.42:                               ; %.lr.ph469
                                        ;   in Loop: Header=BB13_41 Depth=2
	s_ashr_i32 s27, s25, 31
	v_cvt_f32_u32_e32 v2, s25
	s_add_i32 s28, s25, s27
	v_mov_b32_e32 v7, v4
	s_xor_b32 s28, s28, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s28
	s_sub_i32 s30, 0, s28
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s29, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s30, s30, s29
	s_mul_hi_u32 s30, s29, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s29, s29, s30
	s_xor_b32 s30, s15, s27
	s_mul_hi_u32 s29, s23, s29
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_i32 s27, s29, s28
	s_add_i32 s31, s29, 1
	s_sub_i32 s27, s23, s27
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s33, s27, s28
	s_cmp_ge_u32 s27, s28
	s_cselect_b32 s29, s31, s29
	s_cselect_b32 s27, s33, s27
	s_add_i32 s31, s29, 1
	s_cmp_ge_u32 s27, s28
	s_load_b32 s33, s[8:9], 0xc
	s_cselect_b32 s31, s31, s29
	s_sub_i32 s27, 0, s25
	s_xor_b32 s31, s31, s30
	v_mul_lo_u32 v2, s27, v1
	s_sub_i32 s30, s31, s30
	s_mov_b32 s28, 0
	s_mul_i32 s30, s30, s19
	s_lshl_b32 s31, s25, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s29, s33, 0xffff
	v_add_nc_u32_e32 v3, v1, v2
	s_lshl_b32 s33, s29, 3
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v5, s29, v3
	v_mul_lo_u32 v6, s29, v3
	v_mov_b32_e32 v3, v0
.LBB13_43:                              ;   Parent Loop BB13_36 Depth=1
                                        ;     Parent Loop BB13_41 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, s25, v2
	v_not_b32_e32 v11, v2
	v_add_nc_u32_e32 v12, 1, v2
	v_mad_u64_u32 v[8:9], null, s25, v11, v[3:4]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v9, v3, v10
	v_cmp_le_u32_e32 vcc_lo, s25, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v2, v12, vcc_lo
	v_dual_cndmask_b32 v8, v9, v8 :: v_dual_add_nc_u32 v9, 1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s25, v8
	v_cndmask_b32_e32 v12, v10, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, s31, v12
	v_add3_u32 v15, v10, s31, v7
	v_add_nc_u32_e32 v7, s33, v7
	v_mad_u64_u32 v[8:9], null, s27, v12, v[3:4]
	v_mad_u64_u32 v[10:11], null, v12, s25, v[3:4]
	ds_load_b64 v[11:12], v15
	v_add_nc_u32_e32 v3, s29, v3
	v_mul_lo_u32 v8, s30, v8
	v_lshl_add_u32 v16, v10, 3, 0
	ds_load_b64 v[13:14], v16
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v1, vcc_lo, v1, v6
	v_add_co_ci_u32_e32 v2, vcc_lo, v2, v5, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	v_cmp_le_i32_e32 vcc_lo, s21, v3
	s_or_b32 s28, vcc_lo, s28
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_mul_f32_e32 v10, v9, v12
	v_mul_f32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v8, v11
	v_fma_f32 v11, v8, v12, -v9
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_sub_f32 v8, v13, v10 :: v_dual_sub_f32 v9, v14, v11
	v_dual_add_f32 v11, v14, v11 :: v_dual_add_f32 v10, v13, v10
	ds_store_b64 v15, v[8:9]
	ds_store_b64 v16, v[10:11]
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB13_43
.LBB13_44:                              ; %Flow590
                                        ;   in Loop: Header=BB13_41 Depth=2
	s_or_b32 exec_lo, exec_lo, s26
	s_add_i32 s4, s4, 1
	s_lshl_b32 s25, s25, 1
	s_cmp_ge_i32 s4, s17
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB13_41
.LBB13_45:                              ; %.preheader
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_and_saveexec_b32 s25, s2
	s_cbranch_execz .LBB13_48
; %bb.46:                               ; %.lr.ph476
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_load_b32 s4, s[8:9], 0xc
	v_mov_b32_e32 v1, v4
	v_mov_b32_e32 v2, v0
	s_mov_b32 s28, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s26, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s27, s26, 3
.LBB13_47:                              ;   Parent Loop BB13_36 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v5, s24, v2
	ds_load_b64 v[7:8], v1
	v_add_nc_u32_e32 v2, s26, v2
	v_add_nc_u32_e32 v1, s27, v1
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_i32_e32 vcc_lo, s20, v2
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_or_b32 s28, vcc_lo, s28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v5, s4, s12, v5
	v_add_co_ci_u32_e64 v6, s4, s13, v6, s4
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[5:6], v[7:8], off
	s_and_not1_b32 exec_lo, exec_lo, s28
	s_cbranch_execnz .LBB13_47
.LBB13_48:                              ; %Flow588
                                        ;   in Loop: Header=BB13_36 Depth=1
	s_or_b32 exec_lo, exec_lo, s25
	s_add_i32 s22, s22, 1
	s_add_i32 s24, s24, s20
	s_cmp_lg_u32 s22, s6
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB13_36
.LBB13_49:                              ; %._crit_edge481
	s_cmp_lt_i32 s18, 1
	s_cbranch_scc1 .LBB13_55
; %bb.50:                               ; %.lr.ph489
	s_lshl_b64 s[2:3], 1, s17
	s_add_u32 s6, s0, 0x48
	s_addc_u32 s7, s1, 0
	s_ashr_i32 s3, s16, 31
	v_cmp_gt_i32_e32 vcc_lo, s16, v0
	s_add_i32 s0, s16, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, s0, s3
.LBB13_51:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB13_53 Depth 2
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB13_54
; %bb.52:                               ; %.lr.ph484
                                        ;   in Loop: Header=BB13_51 Depth=1
	s_ashr_i32 s0, s2, 31
	v_cvt_f32_u32_e32 v2, s2
	s_add_i32 s1, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s1, s1, s0
	s_xor_b32 s0, s3, s0
	v_cvt_f32_u32_e32 v1, s1
	s_sub_i32 s15, 0, s1
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s9, v1
	v_rcp_iflag_f32_e32 v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s9
	s_mul_hi_u32 s15, s9, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s9, s15
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_mul_hi_u32 s9, s4, s9
	s_mul_i32 s15, s9, s1
	s_add_i32 s18, s9, 1
	s_sub_i32 s15, s4, s15
	v_cvt_u32_f32_e32 v1, v1
	s_sub_i32 s20, s15, s1
	s_cmp_ge_u32 s15, s1
	s_cselect_b32 s9, s18, s9
	s_cselect_b32 s15, s20, s15
	s_add_i32 s18, s9, 1
	s_cmp_ge_u32 s15, s1
	s_load_b32 s15, s[6:7], 0xc
	s_cselect_b32 s1, s18, s9
	s_sub_i32 s9, 0, s2
	s_xor_b32 s1, s1, s0
	v_mul_lo_u32 v2, s9, v1
	s_sub_i32 s20, s1, s0
	s_mov_b32 s18, 0
	s_mul_i32 s20, s20, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v1, v2
	v_add_nc_u32_e32 v3, v1, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s15, s15, 0xffff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v0, v3, 0
	v_mul_hi_u32 v4, s15, v3
	v_mul_lo_u32 v5, s15, v3
	v_mov_b32_e32 v3, v0
.LBB13_53:                              ;   Parent Loop BB13_51 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, s2, v2
	v_not_b32_e32 v9, v2
	v_add_nc_u32_e32 v10, 1, v2
	v_add_nc_u32_e32 v11, s14, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s2, v9, v[3:4]
	v_sub_nc_u32_e32 v7, v3, v8
	v_cmp_le_u32_e64 s0, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v8, v2, v10, s0
	v_cndmask_b32_e64 v6, v7, v6, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 1, v8
	v_cmp_le_u32_e64 s0, s2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, v8, v7, s0
	v_mad_u64_u32 v[6:7], null, s9, v8, v[3:4]
	v_mul_lo_u32 v10, v8, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, s20, v6
	v_add3_u32 v7, v10, s2, v11
	v_add_nc_u32_e32 v11, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v8, 31, v7
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[6:7], 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 3, v[9:10]
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, s0, s12, v6
	v_add_co_u32 v8, s1, s10, v8
	v_add_co_ci_u32_e64 v7, s0, s13, v7, s0
	v_add_co_ci_u32_e64 v9, s1, s11, v9, s1
	global_load_b64 v[13:14], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v10, s0, s12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s13, v12, s0
	v_add_co_u32 v1, s0, v1, v5
	v_add_co_ci_u32_e64 v2, s0, v2, v4, s0
	global_load_b64 v[15:16], v[10:11], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v12, v9, v14
	v_mul_f32_e32 v9, v9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v12, v8, v13 :: v_dual_add_nc_u32 v3, s15, v3
	v_fma_f32 v13, v8, v14, -v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v15, v12
	v_cmp_le_i32_e64 s1, s16, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_sub_f32 v9, v16, v13 :: v_dual_add_f32 v12, v15, v12
	v_add_f32_e32 v13, v16, v13
	s_clause 0x1
	global_store_b64 v[6:7], v[8:9], off
	global_store_b64 v[10:11], v[12:13], off
	s_or_b32 s18, s1, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB13_53
.LBB13_54:                              ; %Flow584
                                        ;   in Loop: Header=BB13_51 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s17, s17, 1
	s_lshl_b32 s2, s2, 1
	s_cmp_lt_i32 s17, s5
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB13_51
.LBB13_55:                              ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 38
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii, .Lfunc_end13-_Z11gpufft2rcysP15HIP_vector_typeIfLj2EEiPiS1_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4376
; NumSgprs: 40
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 40
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii ; -- Begin function _Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.globl	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.p2align	8
	.type	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii,@function
_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii: ; @_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s4
	s_cbranch_scc1 .LBB14_6
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_add_i32 s11, s11, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s15, s11
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, s3, s4
	s_add_i32 s7, s7, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, s11
	s_cbranch_scc1 .LBB14_6
; %bb.2:
	s_cmp_ge_i32 s14, s10
	s_cbranch_scc1 .LBB14_6
; %bb.3:
	s_mul_i32 s7, s7, s9
	s_mov_b32 s3, 0
	s_sub_i32 s2, s8, s7
	s_mov_b32 s8, exec_lo
	s_max_i32 s2, s2, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_min_i32 s2, s2, s9
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB14_6
; %bb.4:                                ; %.lr.ph
	s_load_b32 s12, s[0:1], 0x3c
	s_lshl_b32 s13, s11, 1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_cmp_ge_i32 s13, s4
	s_mul_i32 s1, s2, s14
	s_cselect_b32 s0, s4, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s0, s13, s0
	s_cmp_gt_i32 s15, s0
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 0
	s_subb_u32 s0, s15, 0
	s_mul_i32 s0, s0, s5
	s_mul_i32 s5, s14, s6
	s_add_i32 s1, s1, s0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s12, 0xffff
	s_add_i32 s5, s5, s7
.LBB14_5:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v1, s5, v0
	v_add_nc_u32_e32 v3, s1, v0
	v_add_nc_u32_e32 v0, s4, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v1, vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s2, v0
	v_add_co_u32 v3, s0, s10, v3
	global_load_b64 v[1:2], v[1:2], off
	v_add_co_ci_u32_e64 v4, s0, s11, v4, s0
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0)
	global_store_b64 v[3:4], v[1:2], off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB14_5
.LBB14_6:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii, .Lfunc_end14-_Z12gpuppmtposesP15HIP_vector_typeIfLj2EES1_iiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii ; -- Begin function _Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.globl	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.p2align	8
	.type	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii,@function
_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii: ; @_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
; %bb.0:
	s_load_b128 s[8:11], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s8
	s_cbranch_scc1 .LBB15_6
; %bb.1:
	s_load_b128 s[16:19], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_add_i32 s11, s19, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s15, s11
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s8
	s_add_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s11
	s_cbranch_scc1 .LBB15_6
; %bb.2:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_mul_i32 s1, s2, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s0, s16, s1
	s_max_i32 s0, s0, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s3, 0xffff
	s_lshr_b32 s3, s3, 16
	s_mul_i32 s13, s13, s2
	s_mul_i32 s14, s14, s3
	v_add_nc_u32_e32 v2, s13, v1
	v_add_nc_u32_e32 v3, s14, v0
	s_min_i32 s3, s0, s17
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s18, v2
	v_cmp_gt_i32_e64 s0, s3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s12, vcc_lo, s0
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB15_4
; %bb.3:
	s_lshl_b32 s11, s11, 1
	v_mul_lo_u32 v3, v3, s18
	s_cmp_ge_i32 s11, s8
	v_mad_u32_u24 v4, s2, v0, v1
	s_cselect_b32 s8, s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_sub_i32 s8, s11, s8
	v_lshl_add_u32 v4, v4, 3, 0
	s_cmp_gt_i32 s15, s8
	s_cselect_b32 s8, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s8, 0
	s_subb_u32 s8, s15, 0
	s_mul_i32 s8, s8, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v2, s8, v3
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[2:3]
.LBB15_4:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v3, s13, v0
	v_add_nc_u32_e32 v2, s14, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_i32_e32 vcc_lo, s18, v3
	v_cmp_gt_i32_e64 s0, s3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB15_6
; %bb.5:
	v_mul_lo_u32 v3, v3, s10
	v_mad_u32_u24 v0, s2, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v1, v0, 3, 0
	v_add3_u32 v0, v3, s1, v2
	ds_load_b64 v[2:3], v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB15_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end15:
	.size	_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii, .Lfunc_end15-_Z12gpuppmtposerP15HIP_vector_typeIfLj2EES1_iiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 484
; NumSgprs: 22
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii ; -- Begin function _Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.globl	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.p2align	8
	.type	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii,@function
_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii: ; @_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s8
	s_cbranch_scc1 .LBB16_8
; %bb.1:
	s_add_i32 s2, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s3, s15, s2
	s_ashr_i32 s7, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, s7, s8
	s_add_i32 s7, s7, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s7, s2
	s_cbranch_scc1 .LBB16_8
; %bb.2:
	s_cmp_ge_i32 s14, s6
	s_cbranch_scc1 .LBB16_8
; %bb.3:
	s_mul_i32 s7, s7, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s3, s4, s7
	s_max_i32 s3, s3, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_min_i32 s4, s3, s5
	s_mov_b32 s5, 0
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_i32_e64 s4, v0
	s_cbranch_execz .LBB16_8
; %bb.4:                                ; %.preheader.lr.ph
	s_lshl_b32 s2, s2, 1
	s_mul_i32 s12, s14, s4
	s_cmp_ge_i32 s2, s8
	s_mul_i32 s13, s14, s11
	s_cselect_b32 s3, s8, 0
	s_load_b32 s8, s[0:1], 0x44
	s_sub_i32 s2, s2, s3
	s_mul_i32 s13, s13, s9
	s_cmp_gt_i32 s15, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	s_cselect_b32 s6, -1, 0
	v_add3_u32 v6, s7, s13, v0
	s_cmp_lg_u32 s6, 0
	s_subb_u32 s6, s15, 0
	s_cmp_gt_i32 s9, 0
	s_mul_i32 s10, s10, s6
	s_cselect_b32 s6, -1, 0
	s_add_i32 s12, s12, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s9, s12, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s8, 0xffff
.LBB16_5:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB16_6 Depth 2
	v_mov_b32_e32 v2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v1
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_mov_b32 s8, s9
	s_cbranch_vccnz .LBB16_7
.LBB16_6:                               ;   Parent Loop BB16_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s8, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s8, 0
	v_lshlrev_b64 v[7:8], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[9:10], 3, v[4:5]
	v_add_nc_u32_e32 v4, s4, v4
	v_add_nc_u32_e32 v2, s11, v2
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[9:10], v[7:8], off
	s_cbranch_scc1 .LBB16_6
.LBB16_7:                               ; %._crit_edge
                                        ;   in Loop: Header=BB16_5 Depth=1
	v_add_nc_u32_e32 v0, s7, v0
	v_add_nc_u32_e32 v1, s7, v1
	v_add_nc_u32_e32 v6, s7, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s4, v0
	s_or_b32 s5, vcc_lo, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB16_5
.LBB16_8:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end16:
	.size	_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii, .Lfunc_end16-_Z13gpuppmtposesnP15HIP_vector_typeIfLj2EES1_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii ; -- Begin function _Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.globl	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
	.p2align	8
	.type	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii,@function
_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii: ; @_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s8
	s_cbranch_scc1 .LBB17_8
; %bb.1:
	s_add_i32 s7, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s2, s15, s7
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s8
	s_add_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s7
	s_cbranch_scc1 .LBB17_8
; %bb.2:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x44
	s_load_b128 s[16:19], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_mul_i32 s1, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s0, s4, s1
	s_max_i32 s0, s0, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_min_i32 s4, s0, s5
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s3, 0xffff
	s_lshr_b32 s3, s3, 16
	s_mul_i32 s13, s13, s2
	s_mul_i32 s14, s14, s3
	v_add_nc_u32_e32 v3, s13, v1
	v_add_nc_u32_e32 v2, s14, v0
	s_add_i32 s3, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v3
	v_cmp_gt_i32_e64 s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_cmp_gt_i32 s9, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 s12, s0, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s12
	s_cbranch_execz .LBB17_5
; %bb.3:                                ; %.lr.ph
	s_lshl_b32 s7, s7, 1
	v_mul_lo_u32 v3, v0, s9
	s_cmp_ge_i32 s7, s8
	s_cselect_b32 s8, s8, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s7, s7, s8
	s_cmp_gt_i32 s15, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v5, v3, s3
	s_cselect_b32 s7, -1, 0
	s_cmp_lg_u32 s7, 0
	s_subb_u32 s7, s15, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_mul_i32 s8, s10, s7
	s_lshl_b32 s7, s2, 3
	v_mad_u64_u32 v[3:4], null, s6, v2, s[8:9]
	v_lshlrev_b32_e32 v2, 3, v5
	v_lshlrev_b32_e32 v4, 3, v1
	s_add_i32 s7, s7, 8
	s_mov_b32 s8, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add3_u32 v4, v2, v4, 0
	v_mul_lo_u32 v3, s9, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v2, v1, v3, s13
.LBB17_4:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s8, s8, -1
	s_cmp_lg_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[2:3]
	v_add_nc_u32_e32 v2, s6, v2
	v_add_co_u32 v5, vcc_lo, s18, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s19, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[5:6]
	v_add_nc_u32_e32 v4, s7, v4
	s_cbranch_scc1 .LBB17_4
.LBB17_5:                               ; %Flow150
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, s13, v0
	v_add_nc_u32_e32 v3, s14, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_i32_e32 vcc_lo, s6, v2
	v_cmp_gt_i32_e64 s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB17_8
; %bb.6:                                ; %.lr.ph104
	v_mul_lo_u32 v3, v1, s9
	s_mul_i32 s0, s11, s9
	v_lshlrev_b32_e32 v0, 3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v5, v3, s3
	v_mad_u64_u32 v[3:4], null, s0, v2, v[1:2]
	s_lshl_b32 s0, s2, 3
	s_add_i32 s0, s0, 8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 3, v5
	v_add3_u32 v2, v1, v0, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v0, s14, s1, v3
.LBB17_7:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b64 v[3:4], v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, s0, v2
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s9, 0
	v_lshlrev_b64 v[5:6], 3, v[0:1]
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s16, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[5:6], v[3:4], off
	s_cbranch_scc1 .LBB17_7
.LBB17_8:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end17:
	.size	_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii, .Lfunc_end17-_Z13gpuppmtposernP15HIP_vector_typeIfLj2EES1_iiiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 624
; NumSgprs: 22
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii ; -- Begin function _Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.globl	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
	.p2align	8
	.type	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii,@function
_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii: ; @_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s2, 16
	s_add_i32 s1, s16, -1
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s12, s1, s10
	s_mul_i32 s1, s1, s11
	s_mul_i32 s14, s14, s2
	s_mul_i32 s15, s15, s0
	s_sub_i32 s0, s8, s12
	s_sub_i32 s3, s9, s1
	v_add_nc_u32_e32 v2, s14, v1
	v_add_nc_u32_e32 v3, s15, v0
	s_max_i32 s0, s0, 0
	s_max_i32 s8, s3, 0
	s_min_i32 s3, s0, s10
	s_min_i32 s8, s8, s11
	v_cmp_gt_i32_e32 vcc_lo, s3, v2
	v_cmp_gt_i32_e64 s0, s8, v3
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, vcc_lo, s0
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB18_2
; %bb.1:
	v_mul_lo_u32 v3, v3, s17
	v_mad_u32_u24 v4, s2, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v4, v4, 3, 0
	v_add3_u32 v2, v2, s12, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[2:3]
.LBB18_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v3, s14, v0
	v_add_nc_u32_e32 v2, s15, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_i32_e32 vcc_lo, s3, v3
	v_cmp_gt_i32_e64 s0, s8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB18_4
; %bb.3:
	v_mul_lo_u32 v3, v3, s18
	v_mad_u32_u24 v0, s2, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v1, v0, 3, 0
	v_add3_u32 v0, v2, s1, v3
	ds_load_b64 v[2:3], v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB18_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end18:
	.size	_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii, .Lfunc_end18-_Z11gpuppltposeP15HIP_vector_typeIfLj2EES1_iiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 388
; NumSgprs: 22
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii ; -- Begin function _Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.globl	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
	.p2align	8
	.type	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii,@function
_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii: ; @_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b128 s[16:19], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s2, 16
	s_add_i32 s3, s8, -1
	s_and_b32 s1, s2, 0xffff
	s_mul_i32 s8, s3, s6
	s_mul_i32 s2, s3, s7
	s_mul_i32 s14, s14, s1
	s_mul_i32 s15, s15, s0
	s_sub_i32 s0, s4, s8
	s_sub_i32 s3, s5, s2
	v_add_nc_u32_e32 v3, s14, v1
	v_add_nc_u32_e32 v2, s15, v0
	s_max_i32 s0, s0, 0
	s_max_i32 s3, s3, 0
	s_min_i32 s4, s0, s6
	s_min_i32 s5, s3, s7
	v_cmp_gt_i32_e32 vcc_lo, s4, v3
	v_cmp_gt_i32_e64 s0, s5, v2
	s_add_i32 s3, s1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_cmp_gt_i32 s9, 0
	s_cselect_b32 s6, -1, 0
	s_and_b32 s7, s0, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s7
	s_cbranch_execz .LBB19_3
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v3, v0, s9
	s_mul_i32 s7, s10, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v5, v3, s3
	v_mad_u64_u32 v[3:4], null, s7, v2, v[1:2]
	v_lshlrev_b32_e32 v2, 3, v1
	s_lshl_b32 s7, s1, 3
	s_add_i32 s7, s7, 8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 3, v5
	v_add3_u32 v4, v4, v2, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v2, s14, s8, v3
	s_mov_b32 s8, s9
.LBB19_2:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_add_i32 s8, s8, -1
	s_cmp_lg_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 3, v[2:3]
	v_add_nc_u32_e32 v2, s10, v2
	v_add_co_u32 v5, vcc_lo, s16, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[5:6]
	v_add_nc_u32_e32 v4, s7, v4
	s_cbranch_scc1 .LBB19_2
.LBB19_3:                               ; %Flow135
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, s14, v0
	v_add_nc_u32_e32 v3, s15, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_i32_e32 vcc_lo, s4, v2
	v_cmp_gt_i32_e64 s0, s5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB19_6
; %bb.4:                                ; %.lr.ph87
	v_mul_lo_u32 v3, v1, s9
	s_mul_i32 s0, s11, s9
	v_lshlrev_b32_e32 v0, 3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v5, v3, s3
	v_mad_u64_u32 v[3:4], null, s0, v2, v[1:2]
	s_lshl_b32 s0, s1, 3
	s_add_i32 s0, s0, 8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 3, v5
	v_add3_u32 v2, v1, v0, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v0, s15, s2, v3
.LBB19_5:                               ; =>This Inner Loop Header: Depth=1
	ds_load_b64 v[3:4], v2
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v2, s0, v2
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s9, 0
	v_lshlrev_b64 v[5:6], 3, v[0:1]
	v_add_nc_u32_e32 v0, s11, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s18, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s19, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b64 v[5:6], v[3:4], off
	s_cbranch_scc1 .LBB19_5
.LBB19_6:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end19:
	.size	_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii, .Lfunc_end19-_Z12gpuppltposenP15HIP_vector_typeIfLj2EES1_iiiiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 532
; NumSgprs: 22
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7gpusum1PfS_i         ; -- Begin function _Z7gpusum1PfS_i
	.globl	_Z7gpusum1PfS_i
	.p2align	8
	.type	_Z7gpusum1PfS_i,@function
_Z7gpusum1PfS_i:                        ; @_Z7gpusum1PfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s5
	v_add_nc_u32_e32 v1, s15, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB20_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
.LBB20_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB20_9
; %bb.3:
	s_sub_i32 s0, s4, s15
	v_mov_b32_e32 v0, 0
	s_min_i32 s0, s0, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s0, 1
	s_cbranch_scc1 .LBB20_6
; %bb.4:                                ; %.lr.ph.preheader
	s_mov_b32 s1, 0
.LBB20_5:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v1, s1
	s_add_i32 s0, s0, -1
	s_add_i32 s1, s1, 4
	s_cmp_lg_u32 s0, 0
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, v0, v1
	s_cbranch_scc1 .LBB20_5
.LBB20_6:                               ; %._crit_edge
	s_mov_b32 s1, exec_lo
	s_mov_b32 s0, 0
	v_mbcnt_lo_u32_b32 v1, s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v1
	s_and_b32 s4, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB20_9
; %bb.7:
	s_load_b32 s4, s[2:3], 0x0
	s_bcnt1_i32_b32 s1, s1
	v_mov_b32_e32 v3, 0
	v_cvt_f32_ubyte0_e32 v1, s1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v2, v0, v1 :: v_dual_mov_b32 v1, s4
.LBB20_8:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB20_8
.LBB20_9:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7gpusum1PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end20:
	.size	_Z7gpusum1PfS_i, .Lfunc_end20-_Z7gpusum1PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 352
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7gpusum2PfS_i         ; -- Begin function _Z7gpusum2PfS_i
	.globl	_Z7gpusum2PfS_i
	.p2align	8
	.type	_Z7gpusum2PfS_i,@function
_Z7gpusum2PfS_i:                        ; @_Z7gpusum2PfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b32 s6, s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v3, v0, 2, 0
	s_mov_b32 s4, s15
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s15, s5
	v_add_nc_u32_e32 v1, s7, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s6, v1
	s_cbranch_execz .LBB21_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v1
.LBB21_2:
	s_or_b32 exec_lo, exec_lo, s8
	v_mov_b32_e32 v1, 0
	s_sub_i32 s0, s6, s7
	s_mov_b32 s1, exec_lo
	s_min_i32 s0, s0, s5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s0, v0
	s_cbranch_execz .LBB21_4
; %bb.3:
	ds_load_b32 v1, v3
.LBB21_4:
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB21_11
; %bb.5:                                ; %.lr.ph.i
	s_lshr_b32 s1, s5, 1
.LBB21_6:                               ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s1, v0
	s_cbranch_execz .LBB21_10
; %bb.7:                                ;   in Loop: Header=BB21_6 Depth=1
	v_add_nc_u32_e32 v2, s1, v0
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s0, v2
	s_cbranch_execz .LBB21_9
; %bb.8:                                ;   in Loop: Header=BB21_6 Depth=1
	v_lshl_add_u32 v2, s1, 2, v3
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v3, v1
.LBB21_9:                               ; %Flow
                                        ;   in Loop: Header=BB21_6 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB21_10:                              ;   in Loop: Header=BB21_6 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_lshr_b32 s5, s1, 1
	s_cmp_gt_u32 s1, 1
	s_mov_b32 s1, s5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB21_6
.LBB21_11:                              ; %_Z5lsum2Pfi.exit
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB21_13
; %bb.12:
	v_mov_b32_e32 v0, 0
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	s_waitcnt lgkmcnt(0)
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB21_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7gpusum2PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end21:
	.size	_Z7gpusum2PfS_i, .Lfunc_end21-_Z7gpusum2PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 396
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym sq
	.addrsig_sym shm
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         52
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     by_value
      - .offset:         76
        .size:           4
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .offset:         84
        .size:           4
        .value_kind:     by_value
      - .offset:         88
        .size:           4
        .value_kind:     by_value
      - .offset:         96
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         100
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         104
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         108
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         110
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         112
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         114
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         116
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         118
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         144
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         152
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         160
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         216
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 352
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     39
    .sgpr_spill_count: 0
    .symbol:         _Z13gpuppgppush2lPfS_PiiiffS_iiiiiiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
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        .size:           4
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        .size:           4
        .value_kind:     by_value
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        .size:           4
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        .size:           4
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        .size:           4
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        .size:           4
        .value_kind:     by_value
      - .offset:         60
        .size:           4
        .value_kind:     by_value
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         184
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14gpu2ppgppost2lPfS_Piifiiiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z14gpu2ppgppost2lPfS_Piifiiiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
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        .size:           8
        .value_kind:     global_buffer
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        .size:           4
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        .size:           4
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        .size:           4
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        .size:           4
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        .size:           4
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        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
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        .size:           2
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      - .offset:         66
        .size:           2
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      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
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        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     23
    .sgpr_spill_count: 0
    .symbol:         _Z15gpuppcaguard2xlP15HIP_vector_typeIfLj2EES1_Pfiiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
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        .value_kind:     global_buffer
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amdhsa.version:
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...

	.end_amdgpu_metadata
