#include <stdio.h>
#include <chrono>
#include <algorithm>
#include <cuda.h>
#include <iostream>

__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
                              float *matData, float *vec, int dim) {
  //@@ insert spmv kernel for csr format
}

__global__ void spmvJDSKernel(float *out, int *matColStart, int *matCols,
                              int *matRowPerm, int *matRows,
                              float *matData, float *vec, int dim) {
  //@@ insert spmv kernel for jds format
}

static void spmvCSR(float *out, int *matCols, int *matRows, float *matData,
                    float *vec, int dim) {
  //@@ invoke spmv kernel for csr format
}

static void spmvJDS(float *out, int *matColStart, int *matCols,
                    int *matRowPerm, int *matRows, float *matData,
                    float *vec, int dim) {
  //@@ invoke spmv kernel for jds format
}

static void sort(int *data, int *key, int start, int end) {
  if ((end - start + 1) > 1) {
    int left = start, right = end;
    int pivot = key[right];
    while (left <= right) {
      while (key[left] > pivot) {
        left = left + 1;
      }
      while (key[right] < pivot) {
        right = right - 1;
      }
      if (left <= right) {
        int tmp     = key[left];
        key[left]   = key[right];
        key[right]  = tmp;
        tmp         = data[left];
        data[left]  = data[right];
        data[right] = tmp;
        left        = left + 1;
        right       = right - 1;
      }
    }
    sort(data, key, start, right);
    sort(data, key, left, end);
  }
}

void CSRToJDS(int dim, int *csrRowPtr, int *csrColIdx,
                       float *csrData, int **jdsRowPerm, int **jdsRowNNZ,
                       int **jdsColStartIdx, int **jdsColIdx,
                       float **jdsData) {
  // Row Permutation Vector
  *jdsRowPerm = (int *)malloc(sizeof(int) * dim);
  for (int rowIdx = 0; rowIdx < dim; ++rowIdx) {
    (*jdsRowPerm)[rowIdx] = rowIdx;
  }

  // Number of non-zeros per row
  *jdsRowNNZ = (int *)malloc(sizeof(int) * dim);
  for (int rowIdx = 0; rowIdx < dim; ++rowIdx) {
    (*jdsRowNNZ)[rowIdx] = csrRowPtr[rowIdx + 1] - csrRowPtr[rowIdx];
  }

  // Sort rows by number of non-zeros
  sort(*jdsRowPerm, *jdsRowNNZ, 0, dim - 1);

  // Starting point of each compressed column
  int maxRowNNZ = (*jdsRowNNZ)[0]; // Largest number of non-zeros per row
  printf("jdsRowNNZ = %d\n", maxRowNNZ);
  *jdsColStartIdx      = (int *)malloc(sizeof(int) * maxRowNNZ);
  (*jdsColStartIdx)[0] = 0; // First column starts at 0
  for (int col = 0; col < maxRowNNZ - 1; ++col) {
    // Count the number of rows with entries in this column
    int count = 0;
    for (int idx = 0; idx < dim; ++idx) {
      if ((*jdsRowNNZ)[idx] > col) {
        ++count;
      }
    }
    (*jdsColStartIdx)[col + 1] = (*jdsColStartIdx)[col] + count;
  }

  // Sort the column indexes and data
  const int NNZ = csrRowPtr[dim];
  printf("NNZ = %d\n", NNZ);
  *jdsColIdx = (int *)malloc(sizeof(int) * NNZ);
  printf("dim = %d\n", dim);
  *jdsData = (float *)malloc(sizeof(float) * NNZ);
  for (int idx = 0; idx < dim; ++idx) { // For every row
    int row    = (*jdsRowPerm)[idx];
    int rowNNZ = (*jdsRowNNZ)[idx];
    for (int nnzIdx = 0; nnzIdx < rowNNZ; ++nnzIdx) {
      int jdsPos           = (*jdsColStartIdx)[nnzIdx] + idx;
      int csrPos           = csrRowPtr[row] + nnzIdx;
      (*jdsColIdx)[jdsPos] = csrColIdx[csrPos];
      (*jdsData)[jdsPos]   = csrData[csrPos];
    }
  }
}

int main(int argc, char **argv) {
  bool usingJDSQ;
  int *hostCSRCols;
  int *hostCSRRows;
  float *hostCSRData;
  int *hostJDSColStart;
  int *hostJDSCols;
  int *hostJDSRowPerm;
  int *hostJDSRows;
  float *hostJDSData;
  float *hostVector;
  float *hostOutput;
  int *deviceCSRCols;
  int *deviceCSRRows;
  float *deviceCSRData;
  int *deviceJDSColStart;
  int *deviceJDSCols;
  int *deviceJDSRowPerm;
  int *deviceJDSRows;
  float *deviceJDSData;
  float *deviceVector;
  float *deviceOutput;
  int dim, ncols, nrows, ndata;
  int maxRowNNZ;


  printf("Dataset Folder %s\n",argv[1]);
  printf("Importing data and creating memory on host\n");
  char filename[80];
  sprintf(filename,"%smode.flag",argv[1]);
  printf("%s\n",filename);
  FILE *fmode = fopen(filename,"r");
  fscanf(fmode,"%d/n",&usingJDSQ);
  fclose(fmode);
  sprintf(filename,"%scol.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fcol = fopen(filename,"r");
  fscanf(fcol,"%d\n",&ncols);
  hostCSRCols = new int[ncols];
  for(int n = 0; n < ncols; n++)
    fscanf(fcol,"%d\n",hostCSRCols+n);
  fclose(fcol);
  sprintf(filename,"%srow.raw",argv[1]);
  printf("%s\n",filename);
  FILE *frow = fopen(filename,"r");
  fscanf(frow,"%d\n",&nrows);
  hostCSRRows = new int[nrows];
  for(int n = 0; n < nrows; n++)
    fscanf(frow,"%d\n",hostCSRRows+n);
  fclose(frow);
  sprintf(filename,"%sdata.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fdata = fopen(filename,"r");
  fscanf(fdata,"%d\n",&ndata);
  hostCSRData = new float[ndata];
  for(int n = 0; n < ndata; n++)
    fscanf(fdata,"%e\n",hostCSRData+n);
  fclose(fdata);
  sprintf(filename,"%svec.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fvec = fopen(filename,"r");
  fscanf(fvec,"%d\n",&dim);
  hostVector = new float[dim];
  for(int n = 0; n < dim; n++)
    fscanf(fvec,"%e\n",hostVector+n);
  fclose(fvec);
  if(usingJDSQ)
    printf("JDS Multiplication\n");
  else
    printf("CSR Multiplication\n");
  printf("#Columns: %d, #Rows: %d, #Data: %d, Dim: %d\n",ncols,nrows,ndata,dim);

  /*printf("hostCSRRows\n");
  for(int n = 0; n < nrows; n++)
    printf("%d\n",hostCSRRows[n]);
  printf("hostCSRCols\n");
  for(int n = 0; n < ncols; n++)
    printf("%d\n",hostCSRCols[n]);
  printf("hostVector\n");
  for(int n = 0; n < dim; n++)
    printf("%e\n",hostVector[n]);

  float *mat = new float[dim*dim];
  for(int n = 0; n < dim*dim; n++)
    mat[n] = 0;
  for(int m = 0; m < dim; m++)
    for(int n = hostCSRRows[m]; n < hostCSRRows[m+1]; n++)
      mat[m*dim+hostCSRCols[n]] = hostCSRData[n];
  printf("\n");
  for(int m = 0; m < dim; m++){
    for(int n = 0; n < dim; n++)
      printf("%.0f ",mat[m*dim+n]);
    printf("\n");
  }*/

  hostOutput = (float *)malloc(sizeof(float) * dim);

  if (usingJDSQ) {
    CSRToJDS(dim, hostCSRRows, hostCSRCols, hostCSRData, &hostJDSRowPerm,
             &hostJDSRows, &hostJDSColStart, &hostJDSCols, &hostJDSData);
    maxRowNNZ = hostJDSRows[0];
  }

  printf("Allocating GPU memory.\n");
  if (usingJDSQ) {
    cudaMalloc((void **)&deviceJDSColStart, sizeof(int) * maxRowNNZ);
    cudaMalloc((void **)&deviceJDSCols, sizeof(int) * ndata);
    cudaMalloc((void **)&deviceJDSRowPerm, sizeof(int) * dim);
    cudaMalloc((void **)&deviceJDSRows, sizeof(int) * dim);
    cudaMalloc((void **)&deviceJDSData, sizeof(float) * ndata);
  } else {
    cudaMalloc((void **)&deviceCSRCols, sizeof(int) * ncols);
    cudaMalloc((void **)&deviceCSRRows, sizeof(int) * nrows);
    cudaMalloc((void **)&deviceCSRData, sizeof(float) * ndata);
  }
  cudaMalloc((void **)&deviceVector, sizeof(float) * dim);
  cudaMalloc((void **)&deviceOutput, sizeof(float) * dim);

  printf("Copying input memory to the GPU.\n");
  if (usingJDSQ) {
    cudaMemcpy(deviceJDSColStart, hostJDSColStart, sizeof(int) * maxRowNNZ,
               cudaMemcpyHostToDevice);
    cudaMemcpy(deviceJDSCols, hostJDSCols, sizeof(int) * ndata,
               cudaMemcpyHostToDevice);
    cudaMemcpy(deviceJDSRowPerm, hostJDSRowPerm, sizeof(int) * dim,
               cudaMemcpyHostToDevice);
    cudaMemcpy(deviceJDSRows, hostJDSRows, sizeof(int) * dim,
               cudaMemcpyHostToDevice);
    cudaMemcpy(deviceJDSData, hostJDSData, sizeof(float) * ndata,
               cudaMemcpyHostToDevice);
  } else {
    cudaMemcpy(deviceCSRCols, hostCSRCols, sizeof(int) * ncols,
               cudaMemcpyHostToDevice);
    cudaMemcpy(deviceCSRRows, hostCSRRows, sizeof(int) * nrows,
               cudaMemcpyHostToDevice);
    cudaMemcpy(deviceCSRData, hostCSRData, sizeof(float) * ndata,
               cudaMemcpyHostToDevice);
  }
  cudaMemcpy(deviceVector, hostVector, sizeof(float) * dim,
             cudaMemcpyHostToDevice);

  typedef std::chrono::high_resolution_clock Clock;
  typedef std::chrono::duration<double> Duration;
  printf("Performing CUDA computation\n");
  auto start = Clock::now();
  if (usingJDSQ) {
    spmvJDS(deviceOutput, deviceJDSColStart, deviceJDSCols,
            deviceJDSRowPerm, deviceJDSRows, deviceJDSData, deviceVector,
            dim);
  } else {
    spmvCSR(deviceOutput, deviceCSRCols, deviceCSRRows, deviceCSRData,
            deviceVector, dim);
  }
  cudaDeviceSynchronize();
  Duration elapsed = Clock::now() - start;
  std::cout << elapsed.count() << " seconds\n";

  printf("Copying output memory to the CPU\n");
  cudaMemcpy(hostOutput, deviceOutput, sizeof(float) * dim,
             cudaMemcpyDeviceToHost);

  printf("Freeing GPU Memory\n");
  cudaFree(deviceCSRCols);
  cudaFree(deviceCSRRows);
  cudaFree(deviceCSRData);
  cudaFree(deviceVector);
  cudaFree(deviceOutput);
  if (usingJDSQ) {
    cudaFree(deviceJDSColStart);
    cudaFree(deviceJDSCols);
    cudaFree(deviceJDSRowPerm);
    cudaFree(deviceJDSRows);
    cudaFree(deviceJDSData);
  }

  sprintf(filename,"%soutput.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fout = fopen(filename,"r");
  fscanf(fout,"%d\n",&dim);
  printf("dim: %d\n",dim);
  float *hostOut = new float[dim];
  for(int n = 0; n < dim; n++)
    fscanf(fout,"%e\n",&hostOut[n]);
  fclose(fout);

  bool res = true;
  for(int n = 0; n < dim; n++)
    if(hostOutput[n] != hostOut[n]){
      printf("%e %e does not match at row %d!\n",hostOutput[n],hostOut[n],n);
      res = false;
    }
  if(res)
    printf("Result is correct!\n");
  else
    printf("some elements do not match\n");

  free(hostCSRCols);
  free(hostCSRRows);
  free(hostCSRData);
  free(hostVector);
  free(hostOutput);
  if (usingJDSQ) {
    free(hostJDSColStart);
    free(hostJDSCols);
    free(hostJDSRowPerm);
    free(hostJDSRows);
    free(hostJDSData);
  }

  return 0;
}

	.file	"tmpxft_002a771a_00000000-6_template.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL4sortPiS_ii, @function
_ZL4sortPiS_ii:
.LFB3990:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movslq	%ecx, %rax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	(%rsi,%rax,4), %r14
	movq	%rax, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
.L8:
	cmpl	%edx, %r13d
	jle	.L1
	movl	(%r14), %edi
	movl	%r13d, %ecx
	movl	%edx, %ebx
.L3:
	cmpl	%ecx, %ebx
	jg	.L7
	movslq	%ebx, %rbx
.L4:
	movq	%rbx, %rsi
	leaq	1(%rbx), %rbx
	movl	-4(%rbp,%rbx,4), %r8d
	cmpl	%edi, %r8d
	jg	.L4
	movslq	%ecx, %rcx
.L5:
	movq	%rcx, %rax
	decq	%rcx
	movl	4(%rbp,%rcx,4), %r9d
	cmpl	%edi, %r9d
	jl	.L5
	movl	%esi, %ebx
	movl	%eax, %ecx
	cmpl	%eax, %esi
	jg	.L7
	movl	%r9d, 0(%rbp,%rsi,4)
	leaq	(%r12,%rax,4), %rcx
	leal	1(%rsi), %ebx
	movl	%r8d, 0(%rbp,%rax,4)
	leaq	(%r12,%rsi,4), %r8
	movl	(%rcx), %r10d
	movl	(%r8), %r9d
	movl	%r10d, (%r8)
	movl	%r9d, (%rcx)
	leal	-1(%rax), %ecx
	jmp	.L3
.L7:
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_ZL4sortPiS_ii
	movl	%ebx, %edx
	jmp	.L8
.L1:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3990:
	.size	_ZL4sortPiS_ii, .-_ZL4sortPiS_ii
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3997:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3997:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"jdsRowNNZ = %d\n"
.LC1:
	.string	"NNZ = %d\n"
.LC2:
	.string	"dim = %d\n"
	.text
	.globl	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	.type	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_, @function
_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_:
.LFB3991:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%edi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	0(,%r15,4), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r14, %rdi
	movq	%r9, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r15, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdx, (%rsp)
	movq	%rcx, 8(%rsp)
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rax, (%r12)
.L15:
	cmpl	%edx, %ebx
	jle	.L29
	movl	%edx, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L15
.L29:
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%rax, 0(%r13)
	movq	%rax, %r11
	xorl	%eax, %eax
.L17:
	cmpl	%eax, %ebx
	jle	.L30
	movl	4(%rbp,%rax,4), %edx
	subl	0(%rbp,%rax,4), %edx
	movl	%edx, (%r11,%rax,4)
	incq	%rax
	jmp	.L17
.L30:
	movq	(%r12), %rdi
	leal	-1(%rbx), %ecx
	movq	%r11, %rsi
	xorl	%edx, %edx
	call	_ZL4sortPiS_ii
	movl	(%r11), %r14d
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	movl	%r14d, %edx
	call	__printf_chk@PLT
	movslq	%r14d, %rdi
	decl	%r14d
	salq	$2, %rdi
	call	malloc@PLT
	movq	80(%rsp), %rcx
	xorl	%edx, %edx
	movl	%edx, (%rax)
	xorl	%edx, %edx
	movq	%rax, (%rcx)
.L19:
	movl	%edx, %edi
	cmpl	%edx, %r14d
	jle	.L31
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.L22:
	cmpl	%esi, %ebx
	jle	.L32
	movq	0(%r13), %r8
	cmpl	%edi, (%r8,%rsi,4)
	jle	.L20
	incl	%ecx
.L20:
	incq	%rsi
	jmp	.L22
.L32:
	addl	(%rax,%rdx,4), %ecx
	movl	%ecx, 4(%rax,%rdx,4)
	incq	%rdx
	jmp	.L19
.L31:
	movslq	0(%rbp,%r15,4), %r14
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%r14d, %edx
	salq	$2, %r14
	call	__printf_chk@PLT
	movq	%r14, %rdi
	call	malloc@PLT
	movq	88(%rsp), %rcx
	movl	%ebx, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%rax, (%rcx)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%rax, %rcx
	movq	96(%rsp), %rax
	movq	%rcx, (%rax)
	xorl	%eax, %eax
.L23:
	movl	%eax, %r8d
	cmpl	%eax, %ebx
	jle	.L33
	movq	0(%r13), %rdx
	movl	(%rdx,%rax,4), %r9d
	movq	(%r12), %rdx
	movslq	(%rdx,%rax,4), %rdx
	leaq	0(%rbp,%rdx,4), %r10
	xorl	%edx, %edx
.L24:
	cmpl	%edx, %r9d
	jle	.L34
	movq	80(%rsp), %rsi
	movl	(%r10), %edi
	movq	88(%rsp), %r11
	movq	(%rsi), %rsi
	addl	%edx, %edi
	movslq	%edi, %rdi
	movq	(%r11), %r11
	movl	(%rsi,%rdx,4), %r15d
	incq	%rdx
	addl	%r8d, %r15d
	movslq	%r15d, %rsi
	movq	(%rsp), %r15
	movl	(%r15,%rdi,4), %r14d
	movq	8(%rsp), %r15
	movss	(%r15,%rdi,4), %xmm0
	movl	%r14d, (%r11,%rsi,4)
	movss	%xmm0, (%rcx,%rsi,4)
	jmp	.L24
.L34:
	incq	%rax
	jmp	.L23
.L33:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3991:
	.size	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_, .-_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	.section	.rodata.str1.1
.LC3:
	.string	"Dataset Folder %s\n"
.LC4:
	.string	"Importing data and creating memory on host\n"
.LC5:
	.string	"%smode.flag"
.LC6:
	.string	"%s\n"
.LC7:
	.string	"r"
.LC8:
	.string	"%d/n"
.LC9:
	.string	"%scol.raw"
.LC10:
	.string	"%d\n"
.LC11:
	.string	"%srow.raw"
.LC12:
	.string	"%sdata.raw"
.LC13:
	.string	"%e\n"
.LC14:
	.string	"%svec.raw"
.LC15:
	.string	"JDS Multiplication\n"
.LC16:
	.string	"CSR Multiplication\n"
.LC17:
	.string	"#Columns: %d, #Rows: %d, #Data: %d, Dim: %d\n"
.LC18:
	.string	"Allocating GPU memory.\n"
.LC19:
	.string	"Copying input memory to the GPU.\n"
.LC20:
	.string	"Performing CUDA computation\n"
.LC22:
	.string	" seconds\n"
.LC23:
	.string	"Copying output memory to the CPU\n"
.LC24:
	.string	"Freeing GPU Memory\n"
.LC25:
	.string	"%soutput.raw"
.LC26:
	.string	"dim: %d\n"
.LC27:
	.string	"%e %e does not match at row %d!\n"
.LC28:
	.string	"Result is correct!\n"
.LC29:
	.string	"some elements do not match\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3992:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$280, %rsp
	.cfi_def_cfa_offset 336
	movq	8(%rsi), %rdx
	leaq	.LC3(%rip), %rsi
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rbx), %r8
	movl	$80, %edx
	leaq	184(%rsp), %rax
	leaq	.LC5(%rip), %rcx
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	movl	$2, %esi
	xorl	%eax, %eax
	call	__sprintf_chk@PLT
	movq	(%rsp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	leaq	47(%rsp), %rdx
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	%rbp, %rdi
	call	fclose@PLT
	movq	8(%rbx), %r8
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rcx
	movl	$80, %edx
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	(%rsp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	leaq	52(%rsp), %rdx
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r14
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	52(%rsp), %rdi
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jb	.L36
	salq	$2, %rdi
	xorl	%r15d, %r15d
	call	_Znam@PLT
	movq	%rax, %rbp
	movq	%rax, %r13
	jmp	.L37
.L36:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L70
	call	__cxa_throw_bad_array_new_length@PLT
.L37:
	cmpl	%r15d, 52(%rsp)
	jle	.L71
	movq	%r13, %rdx
	leaq	.LC10(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	incl	%r15d
	addq	$4, %r13
	jmp	.L37
.L71:
	movq	%r14, %rdi
	call	fclose@PLT
	movq	8(%rbx), %r8
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	leaq	.LC11(%rip), %rcx
	movl	$80, %edx
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	(%rsp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	leaq	56(%rsp), %rdx
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %r14
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	56(%rsp), %rdi
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jb	.L36
	salq	$2, %rdi
	xorl	%r15d, %r15d
	call	_Znam@PLT
	movq	%rax, 8(%rsp)
	movq	%rax, %r13
.L40:
	cmpl	%r15d, 56(%rsp)
	jle	.L72
	movq	%r13, %rdx
	leaq	.LC10(%rip), %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	incl	%r15d
	addq	$4, %r13
	jmp	.L40
.L72:
	movq	%r14, %rdi
	call	fclose@PLT
	movq	8(%rbx), %r8
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rcx
	movl	$80, %edx
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	(%rsp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	leaq	60(%rsp), %rdx
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	60(%rsp), %rdi
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jb	.L36
	salq	$2, %rdi
	xorl	%r13d, %r13d
	leaq	.LC13(%rip), %r15
	call	_Znam@PLT
	movq	%rax, 16(%rsp)
	movq	%rax, %r14
.L42:
	cmpl	%r13d, 60(%rsp)
	jle	.L73
	movq	24(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	xorl	%eax, %eax
	incl	%r13d
	addq	$4, %r14
	call	__isoc23_fscanf@PLT
	jmp	.L42
.L73:
	movq	24(%rsp), %rdi
	call	fclose@PLT
	movq	8(%rbx), %r8
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rcx
	movl	$80, %edx
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	(%rsp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	leaq	48(%rsp), %rdx
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	48(%rsp), %rdi
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jb	.L36
	salq	$2, %rdi
	xorl	%r13d, %r13d
	call	_Znam@PLT
	movq	%rax, %r14
	movq	%rax, %r15
.L44:
	cmpl	%r13d, 48(%rsp)
	jle	.L74
	movq	24(%rsp), %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	incl	%r13d
	leaq	.LC13(%rip), %rsi
	addq	$4, %r15
	call	__isoc23_fscanf@PLT
	jmp	.L44
.L74:
	movq	24(%rsp), %rdi
	call	fclose@PLT
	cmpb	$0, 47(%rsp)
	leaq	.LC15(%rip), %rsi
	jne	.L66
	leaq	.LC16(%rip), %rsi
.L66:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	48(%rsp), %r9d
	movl	56(%rsp), %ecx
	xorl	%eax, %eax
	movl	60(%rsp), %r8d
	movl	52(%rsp), %edx
	movl	$2, %edi
	leaq	.LC17(%rip), %rsi
	call	__printf_chk@PLT
	movslq	48(%rsp), %rdi
	movq	%rdi, %r15
	salq	$2, %rdi
	call	malloc@PLT
	cmpb	$0, 47(%rsp)
	movq	%rax, %r13
	je	.L48
	pushq	%rax
	.cfi_def_cfa_offset 344
	movq	%rbp, %rdx
	movl	%r15d, %edi
	leaq	104(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 352
	leaq	88(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 360
	leaq	88(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 368
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rsi
	leaq	120(%rsp), %r9
	leaq	112(%rsp), %r8
	call	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	movq	120(%rsp), %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 336
	movl	(%rax), %r12d
.L48:
	xorl	%eax, %eax
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpb	$0, 47(%rsp)
	je	.L49
	movslq	%r12d, %rsi
	leaq	128(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	60(%rsp), %rsi
	leaq	136(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	48(%rsp), %rsi
	leaq	144(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	48(%rsp), %rsi
	leaq	152(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	60(%rsp), %rsi
	leaq	160(%rsp), %rdi
	salq	$2, %rsi
	jmp	.L67
.L49:
	movslq	52(%rsp), %rsi
	leaq	104(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	56(%rsp), %rsi
	leaq	112(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	60(%rsp), %rsi
	leaq	120(%rsp), %rdi
	salq	$2, %rsi
.L67:
	call	cudaMalloc@PLT
	movslq	48(%rsp), %rsi
	leaq	168(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	48(%rsp), %rsi
	leaq	176(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC19(%rip), %rsi
	call	__printf_chk@PLT
	cmpb	$0, 47(%rsp)
	je	.L51
	movq	64(%rsp), %rsi
	movq	128(%rsp), %rdi
	movslq	%r12d, %rdx
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	60(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	48(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	48(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$1, %ecx
	movq	152(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	60(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$1, %ecx
	movq	160(%rsp), %rdi
	salq	$2, %rdx
	jmp	.L68
.L51:
	movslq	52(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	56(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	60(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	120(%rsp), %rdi
	salq	$2, %rdx
.L68:
	call	cudaMemcpy@PLT
	movslq	48(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	movq	168(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, %r12
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	_ZSt4cout(%rip), %rdi
	subq	%r12, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC21(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movl	$9, %edx
	leaq	.LC22(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	48(%rsp), %rdx
	movl	$2, %ecx
	movq	%r13, %rdi
	movq	176(%rsp), %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movq	176(%rsp), %rdi
	call	cudaFree@PLT
	cmpb	$0, 47(%rsp)
	je	.L53
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
.L53:
	movq	8(%rbx), %r8
	movq	(%rsp), %rdi
	movl	$80, %edx
	xorl	%eax, %eax
	leaq	.LC25(%rip), %rcx
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	(%rsp), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	leaq	.LC7(%rip), %rsi
	call	fopen@PLT
	leaq	48(%rsp), %rdx
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	48(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC26(%rip), %rsi
	call	__printf_chk@PLT
	movslq	48(%rsp), %rdi
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jb	.L36
	salq	$2, %rdi
	xorl	%ebx, %ebx
	call	_Znam@PLT
	movq	%rax, %r12
	movq	%rax, %r15
.L54:
	cmpl	%ebx, 48(%rsp)
	jle	.L75
	movq	(%rsp), %rdi
	movq	%r15, %rdx
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	incl	%ebx
	addq	$4, %r15
	call	__isoc23_fscanf@PLT
	jmp	.L54
.L75:
	movq	(%rsp), %rdi
	xorl	%r15d, %r15d
	leaq	.LC27(%rip), %rbx
	call	fclose@PLT
	movb	$1, %al
.L56:
	cmpl	%r15d, 48(%rsp)
	jle	.L76
	movss	0(%r13,%r15,4), %xmm0
	movss	(%r12,%r15,4), %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L64
	je	.L57
.L64:
	movl	%r15d, %edx
	movq	%rbx, %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L57:
	incq	%r15
	jmp	.L56
.L76:
	leaq	.LC28(%rip), %rsi
	testb	%al, %al
	jne	.L69
	leaq	.LC29(%rip), %rsi
.L69:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	cmpb	$0, 47(%rsp)
	je	.L62
	movq	64(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	free@PLT
	movq	88(%rsp), %rdi
	call	free@PLT
	movq	96(%rsp), %rdi
	call	free@PLT
.L62:
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L63
.L70:
	call	__stack_chk_fail@PLT
.L63:
	addq	$280, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3992:
	.size	main, .-main
	.text
	.globl	_Z43__device_stub__Z13spmvCSRKernelPfPiS0_S_S_iPfPiS0_S_S_i
	.type	_Z43__device_stub__Z13spmvCSRKernelPfPiS0_S_S_iPfPiS0_S_S_i, @function
_Z43__device_stub__Z13spmvCSRKernelPfPiS0_S_S_iPfPiS0_S_S_i:
.LFB4019:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13spmvCSRKernelPfPiS0_S_S_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L77:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4019:
	.size	_Z43__device_stub__Z13spmvCSRKernelPfPiS0_S_S_iPfPiS0_S_S_i, .-_Z43__device_stub__Z13spmvCSRKernelPfPiS0_S_S_iPfPiS0_S_S_i
	.globl	_Z13spmvCSRKernelPfPiS0_S_S_i
	.type	_Z13spmvCSRKernelPfPiS0_S_S_i, @function
_Z13spmvCSRKernelPfPiS0_S_S_i:
.LFB4020:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z13spmvCSRKernelPfPiS0_S_S_iPfPiS0_S_S_i
	.cfi_endproc
.LFE4020:
	.size	_Z13spmvCSRKernelPfPiS0_S_S_i, .-_Z13spmvCSRKernelPfPiS0_S_S_i
	.globl	_Z49__device_stub__Z13spmvJDSKernelPfPiS0_S0_S0_S_S_iPfPiS0_S0_S0_S_S_i
	.type	_Z49__device_stub__Z13spmvJDSKernelPfPiS0_S0_S0_S_S_iPfPiS0_S0_S0_S_S_i, @function
_Z49__device_stub__Z13spmvJDSKernelPfPiS0_S0_S0_S_S_iPfPiS0_S0_S0_S_S_i:
.LFB4021:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	232(%rsp), %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L82:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L84
	call	__stack_chk_fail@PLT
.L84:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4021:
	.size	_Z49__device_stub__Z13spmvJDSKernelPfPiS0_S0_S0_S_S_iPfPiS0_S0_S0_S_S_i, .-_Z49__device_stub__Z13spmvJDSKernelPfPiS0_S0_S0_S_S_iPfPiS0_S0_S0_S_S_i
	.globl	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.type	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i, @function
_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i:
.LFB4022:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z13spmvJDSKernelPfPiS0_S0_S0_S_S_iPfPiS0_S0_S0_S_S_i
	.cfi_endproc
.LFE4022:
	.size	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i, .-_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.section	.rodata.str1.1
.LC30:
	.string	"_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i"
.LC31:
	.string	"_Z13spmvCSRKernelPfPiS0_S_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4024:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC30(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13spmvCSRKernelPfPiS0_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4024:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC21:
	.long	0
	.long	1104006501
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <chrono>
#include <algorithm>
#include <hip/hip_runtime.h>
#include <iostream>

__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
                              float *matData, float *vec, int dim) {
  //@@ insert spmv kernel for csr format
}

__global__ void spmvJDSKernel(float *out, int *matColStart, int *matCols,
                              int *matRowPerm, int *matRows,
                              float *matData, float *vec, int dim) {
  //@@ insert spmv kernel for jds format
}

static void spmvCSR(float *out, int *matCols, int *matRows, float *matData,
                    float *vec, int dim) {
  //@@ invoke spmv kernel for csr format
}

static void spmvJDS(float *out, int *matColStart, int *matCols,
                    int *matRowPerm, int *matRows, float *matData,
                    float *vec, int dim) {
  //@@ invoke spmv kernel for jds format
}

static void sort(int *data, int *key, int start, int end) {
  if ((end - start + 1) > 1) {
    int left = start, right = end;
    int pivot = key[right];
    while (left <= right) {
      while (key[left] > pivot) {
        left = left + 1;
      }
      while (key[right] < pivot) {
        right = right - 1;
      }
      if (left <= right) {
        int tmp     = key[left];
        key[left]   = key[right];
        key[right]  = tmp;
        tmp         = data[left];
        data[left]  = data[right];
        data[right] = tmp;
        left        = left + 1;
        right       = right - 1;
      }
    }
    sort(data, key, start, right);
    sort(data, key, left, end);
  }
}

void CSRToJDS(int dim, int *csrRowPtr, int *csrColIdx,
                       float *csrData, int **jdsRowPerm, int **jdsRowNNZ,
                       int **jdsColStartIdx, int **jdsColIdx,
                       float **jdsData) {
  // Row Permutation Vector
  *jdsRowPerm = (int *)malloc(sizeof(int) * dim);
  for (int rowIdx = 0; rowIdx < dim; ++rowIdx) {
    (*jdsRowPerm)[rowIdx] = rowIdx;
  }

  // Number of non-zeros per row
  *jdsRowNNZ = (int *)malloc(sizeof(int) * dim);
  for (int rowIdx = 0; rowIdx < dim; ++rowIdx) {
    (*jdsRowNNZ)[rowIdx] = csrRowPtr[rowIdx + 1] - csrRowPtr[rowIdx];
  }

  // Sort rows by number of non-zeros
  sort(*jdsRowPerm, *jdsRowNNZ, 0, dim - 1);

  // Starting point of each compressed column
  int maxRowNNZ = (*jdsRowNNZ)[0]; // Largest number of non-zeros per row
  printf("jdsRowNNZ = %d\n", maxRowNNZ);
  *jdsColStartIdx      = (int *)malloc(sizeof(int) * maxRowNNZ);
  (*jdsColStartIdx)[0] = 0; // First column starts at 0
  for (int col = 0; col < maxRowNNZ - 1; ++col) {
    // Count the number of rows with entries in this column
    int count = 0;
    for (int idx = 0; idx < dim; ++idx) {
      if ((*jdsRowNNZ)[idx] > col) {
        ++count;
      }
    }
    (*jdsColStartIdx)[col + 1] = (*jdsColStartIdx)[col] + count;
  }

  // Sort the column indexes and data
  const int NNZ = csrRowPtr[dim];
  printf("NNZ = %d\n", NNZ);
  *jdsColIdx = (int *)malloc(sizeof(int) * NNZ);
  printf("dim = %d\n", dim);
  *jdsData = (float *)malloc(sizeof(float) * NNZ);
  for (int idx = 0; idx < dim; ++idx) { // For every row
    int row    = (*jdsRowPerm)[idx];
    int rowNNZ = (*jdsRowNNZ)[idx];
    for (int nnzIdx = 0; nnzIdx < rowNNZ; ++nnzIdx) {
      int jdsPos           = (*jdsColStartIdx)[nnzIdx] + idx;
      int csrPos           = csrRowPtr[row] + nnzIdx;
      (*jdsColIdx)[jdsPos] = csrColIdx[csrPos];
      (*jdsData)[jdsPos]   = csrData[csrPos];
    }
  }
}

int main(int argc, char **argv) {
  bool usingJDSQ;
  int *hostCSRCols;
  int *hostCSRRows;
  float *hostCSRData;
  int *hostJDSColStart;
  int *hostJDSCols;
  int *hostJDSRowPerm;
  int *hostJDSRows;
  float *hostJDSData;
  float *hostVector;
  float *hostOutput;
  int *deviceCSRCols;
  int *deviceCSRRows;
  float *deviceCSRData;
  int *deviceJDSColStart;
  int *deviceJDSCols;
  int *deviceJDSRowPerm;
  int *deviceJDSRows;
  float *deviceJDSData;
  float *deviceVector;
  float *deviceOutput;
  int dim, ncols, nrows, ndata;
  int maxRowNNZ;


  printf("Dataset Folder %s\n",argv[1]);
  printf("Importing data and creating memory on host\n");
  char filename[80];
  sprintf(filename,"%smode.flag",argv[1]);
  printf("%s\n",filename);
  FILE *fmode = fopen(filename,"r");
  fscanf(fmode,"%d/n",&usingJDSQ);
  fclose(fmode);
  sprintf(filename,"%scol.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fcol = fopen(filename,"r");
  fscanf(fcol,"%d\n",&ncols);
  hostCSRCols = new int[ncols];
  for(int n = 0; n < ncols; n++)
    fscanf(fcol,"%d\n",hostCSRCols+n);
  fclose(fcol);
  sprintf(filename,"%srow.raw",argv[1]);
  printf("%s\n",filename);
  FILE *frow = fopen(filename,"r");
  fscanf(frow,"%d\n",&nrows);
  hostCSRRows = new int[nrows];
  for(int n = 0; n < nrows; n++)
    fscanf(frow,"%d\n",hostCSRRows+n);
  fclose(frow);
  sprintf(filename,"%sdata.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fdata = fopen(filename,"r");
  fscanf(fdata,"%d\n",&ndata);
  hostCSRData = new float[ndata];
  for(int n = 0; n < ndata; n++)
    fscanf(fdata,"%e\n",hostCSRData+n);
  fclose(fdata);
  sprintf(filename,"%svec.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fvec = fopen(filename,"r");
  fscanf(fvec,"%d\n",&dim);
  hostVector = new float[dim];
  for(int n = 0; n < dim; n++)
    fscanf(fvec,"%e\n",hostVector+n);
  fclose(fvec);
  if(usingJDSQ)
    printf("JDS Multiplication\n");
  else
    printf("CSR Multiplication\n");
  printf("#Columns: %d, #Rows: %d, #Data: %d, Dim: %d\n",ncols,nrows,ndata,dim);

  /*printf("hostCSRRows\n");
  for(int n = 0; n < nrows; n++)
    printf("%d\n",hostCSRRows[n]);
  printf("hostCSRCols\n");
  for(int n = 0; n < ncols; n++)
    printf("%d\n",hostCSRCols[n]);
  printf("hostVector\n");
  for(int n = 0; n < dim; n++)
    printf("%e\n",hostVector[n]);

  float *mat = new float[dim*dim];
  for(int n = 0; n < dim*dim; n++)
    mat[n] = 0;
  for(int m = 0; m < dim; m++)
    for(int n = hostCSRRows[m]; n < hostCSRRows[m+1]; n++)
      mat[m*dim+hostCSRCols[n]] = hostCSRData[n];
  printf("\n");
  for(int m = 0; m < dim; m++){
    for(int n = 0; n < dim; n++)
      printf("%.0f ",mat[m*dim+n]);
    printf("\n");
  }*/

  hostOutput = (float *)malloc(sizeof(float) * dim);

  if (usingJDSQ) {
    CSRToJDS(dim, hostCSRRows, hostCSRCols, hostCSRData, &hostJDSRowPerm,
             &hostJDSRows, &hostJDSColStart, &hostJDSCols, &hostJDSData);
    maxRowNNZ = hostJDSRows[0];
  }

  printf("Allocating GPU memory.\n");
  if (usingJDSQ) {
    hipMalloc((void **)&deviceJDSColStart, sizeof(int) * maxRowNNZ);
    hipMalloc((void **)&deviceJDSCols, sizeof(int) * ndata);
    hipMalloc((void **)&deviceJDSRowPerm, sizeof(int) * dim);
    hipMalloc((void **)&deviceJDSRows, sizeof(int) * dim);
    hipMalloc((void **)&deviceJDSData, sizeof(float) * ndata);
  } else {
    hipMalloc((void **)&deviceCSRCols, sizeof(int) * ncols);
    hipMalloc((void **)&deviceCSRRows, sizeof(int) * nrows);
    hipMalloc((void **)&deviceCSRData, sizeof(float) * ndata);
  }
  hipMalloc((void **)&deviceVector, sizeof(float) * dim);
  hipMalloc((void **)&deviceOutput, sizeof(float) * dim);

  printf("Copying input memory to the GPU.\n");
  if (usingJDSQ) {
    hipMemcpy(deviceJDSColStart, hostJDSColStart, sizeof(int) * maxRowNNZ,
               hipMemcpyHostToDevice);
    hipMemcpy(deviceJDSCols, hostJDSCols, sizeof(int) * ndata,
               hipMemcpyHostToDevice);
    hipMemcpy(deviceJDSRowPerm, hostJDSRowPerm, sizeof(int) * dim,
               hipMemcpyHostToDevice);
    hipMemcpy(deviceJDSRows, hostJDSRows, sizeof(int) * dim,
               hipMemcpyHostToDevice);
    hipMemcpy(deviceJDSData, hostJDSData, sizeof(float) * ndata,
               hipMemcpyHostToDevice);
  } else {
    hipMemcpy(deviceCSRCols, hostCSRCols, sizeof(int) * ncols,
               hipMemcpyHostToDevice);
    hipMemcpy(deviceCSRRows, hostCSRRows, sizeof(int) * nrows,
               hipMemcpyHostToDevice);
    hipMemcpy(deviceCSRData, hostCSRData, sizeof(float) * ndata,
               hipMemcpyHostToDevice);
  }
  hipMemcpy(deviceVector, hostVector, sizeof(float) * dim,
             hipMemcpyHostToDevice);

  typedef std::chrono::high_resolution_clock Clock;
  typedef std::chrono::duration<double> Duration;
  printf("Performing CUDA computation\n");
  auto start = Clock::now();
  if (usingJDSQ) {
    spmvJDS(deviceOutput, deviceJDSColStart, deviceJDSCols,
            deviceJDSRowPerm, deviceJDSRows, deviceJDSData, deviceVector,
            dim);
  } else {
    spmvCSR(deviceOutput, deviceCSRCols, deviceCSRRows, deviceCSRData,
            deviceVector, dim);
  }
  hipDeviceSynchronize();
  Duration elapsed = Clock::now() - start;
  std::cout << elapsed.count() << " seconds\n";

  printf("Copying output memory to the CPU\n");
  hipMemcpy(hostOutput, deviceOutput, sizeof(float) * dim,
             hipMemcpyDeviceToHost);

  printf("Freeing GPU Memory\n");
  hipFree(deviceCSRCols);
  hipFree(deviceCSRRows);
  hipFree(deviceCSRData);
  hipFree(deviceVector);
  hipFree(deviceOutput);
  if (usingJDSQ) {
    hipFree(deviceJDSColStart);
    hipFree(deviceJDSCols);
    hipFree(deviceJDSRowPerm);
    hipFree(deviceJDSRows);
    hipFree(deviceJDSData);
  }

  sprintf(filename,"%soutput.raw",argv[1]);
  printf("%s\n",filename);
  FILE *fout = fopen(filename,"r");
  fscanf(fout,"%d\n",&dim);
  printf("dim: %d\n",dim);
  float *hostOut = new float[dim];
  for(int n = 0; n < dim; n++)
    fscanf(fout,"%e\n",&hostOut[n]);
  fclose(fout);

  bool res = true;
  for(int n = 0; n < dim; n++)
    if(hostOutput[n] != hostOut[n]){
      printf("%e %e does not match at row %d!\n",hostOutput[n],hostOut[n],n);
      res = false;
    }
  if(res)
    printf("Result is correct!\n");
  else
    printf("some elements do not match\n");

  free(hostCSRCols);
  free(hostCSRRows);
  free(hostCSRData);
  free(hostVector);
  free(hostOutput);
  if (usingJDSQ) {
    free(hostJDSColStart);
    free(hostJDSCols);
    free(hostJDSRowPerm);
    free(hostJDSRows);
    free(hostJDSData);
  }

  return 0;
}

	.text
	.file	"template.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i # -- Begin function _Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i
	.type	_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i,@function
_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i: # @_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13spmvCSRKernelPfPiS0_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i, .Lfunc_end0-_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i # -- Begin function _Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.type	_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i,@function
_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i: # @_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i, .Lfunc_end1-_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_ # -- Begin function _Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	.type	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_,@function
_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_:     # @_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, (%rsp)                     # 8-byte Spill
	movq	%r8, %r12
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movl	%edi, %ebp
	movslq	%edi, %r13
	leaq	(,%r13,4), %rdi
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rbp, 8(%rsp)                   # 8-byte Spill
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	movq	%rax, (%r12)
	movl	%ebp, %r12d
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	testl	%r13d, %r13d
	jle	.LBB2_1
# %bb.9:                                # %.lr.ph.preheader
	movq	16(%rsp), %rdi                  # 8-byte Reload
	xorl	%ecx, %ecx
.LBB2_10:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rax,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB2_10
# %bb.6:                                # %._crit_edge
	callq	malloc
	movq	(%rsp), %r8                     # 8-byte Reload
	movq	%rax, (%r8)
	movq	8(%rsp), %r9                    # 8-byte Reload
	testl	%r9d, %r9d
	jle	.LBB2_2
# %bb.7:                                # %.lr.ph83.preheader
	movl	(%r15), %ecx
	xorl	%edx, %edx
.LBB2_8:                                # %.lr.ph83
                                        # =>This Inner Loop Header: Depth=1
	movl	4(%r15,%rdx,4), %esi
	movl	%esi, %edi
	subl	%ecx, %edi
	movl	%edi, (%rax,%rdx,4)
	leaq	1(%rdx), %rdi
	movl	%esi, %ecx
	movq	%rdi, %rdx
	cmpq	%rdi, %r12
	jne	.LBB2_8
	jmp	.LBB2_2
.LBB2_1:                                # %._crit_edge.thread
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	malloc
	movq	8(%rsp), %r9                    # 8-byte Reload
	movq	(%rsp), %rcx                    # 8-byte Reload
	movq	%rax, (%rcx)
.LBB2_2:                                # %._crit_edge84
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	(%rcx), %rdi
	leal	-1(%r9), %ecx
	xorl	%r13d, %r13d
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZL4sortPiS_ii
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rax
	movslq	(%rax), %rbp
	movl	$.L.str, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	leaq	(,%rbp,4), %rdi
	callq	malloc
	movq	8(%rsp), %r11                   # 8-byte Reload
	movq	96(%rsp), %rcx
	movq	%rax, (%rcx)
	movl	$0, (%rax)
	cmpq	$2, %rbp
	jl	.LBB2_11
# %bb.3:                                # %.preheader.lr.ph
	leal	-1(%rbp), %ecx
	xorl	%edx, %edx
.LBB2_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_19 Depth 2
	testl	%r11d, %r11d
	jle	.LBB2_5
# %bb.18:                               # %.lr.ph87
                                        #   in Loop: Header=BB2_4 Depth=1
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	(%rsi), %rdi
	xorl	%r8d, %r8d
	xorl	%esi, %esi
.LBB2_19:                               #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%rdi,%r8,4), %r9
	xorl	%r10d, %r10d
	cmpq	%r9, %rdx
	setl	%r10b
	addl	%r10d, %esi
	incq	%r8
	cmpq	%r8, %r12
	jne	.LBB2_19
	jmp	.LBB2_20
.LBB2_5:                                #   in Loop: Header=BB2_4 Depth=1
	xorl	%esi, %esi
.LBB2_20:                               # %._crit_edge88
                                        #   in Loop: Header=BB2_4 Depth=1
	addl	%esi, %r13d
	movl	%r13d, 4(%rax,%rdx,4)
	incq	%rdx
	cmpq	%rcx, %rdx
	jne	.LBB2_4
.LBB2_11:                               # %._crit_edge90
	movq	32(%rsp), %rax                  # 8-byte Reload
	movslq	(%r15,%rax,4), %r13
	movl	$.L.str.1, %edi
	movl	%r13d, %esi
	xorl	%eax, %eax
	movq	%r11, %rbp
	callq	printf
	shlq	$2, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	104(%rsp), %rcx
	movq	%rax, (%rcx)
	movl	$.L.str.2, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%r13, %rdi
	callq	malloc
	movq	112(%rsp), %rcx
	movq	%rax, (%rcx)
	testl	%ebp, %ebp
	jle	.LBB2_17
# %bb.12:                               # %.lr.ph97
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movq	(%rcx), %rcx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movq	(%rsp), %rcx                    # 8-byte Reload
	movq	(%rcx), %rcx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	xorl	%esi, %esi
.LBB2_13:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_15 Depth 2
	movq	(%rsp), %rcx                    # 8-byte Reload
	movl	(%rcx,%rsi,4), %edi
	testl	%edi, %edi
	jle	.LBB2_16
# %bb.14:                               # %.lr.ph93
                                        #   in Loop: Header=BB2_13 Depth=1
	movq	8(%rsp), %rcx                   # 8-byte Reload
	movslq	(%rcx,%rsi,4), %r8
	movq	96(%rsp), %rcx
	movq	(%rcx), %r9
	movq	104(%rsp), %rcx
	movq	(%rcx), %r10
	movslq	%esi, %r11
	xorl	%r13d, %r13d
.LBB2_15:                               #   Parent Loop BB2_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%r9,%r13,4), %rbp
	addq	%r11, %rbp
	movslq	(%r15,%r8,4), %rcx
	addq	%r13, %rcx
	movl	(%r14,%rcx,4), %edx
	movl	%edx, (%r10,%rbp,4)
	movss	(%rbx,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rax,%rbp,4)
	incq	%r13
	cmpq	%r13, %rdi
	jne	.LBB2_15
.LBB2_16:                               # %._crit_edge94
                                        #   in Loop: Header=BB2_13 Depth=1
	incq	%rsi
	cmpq	%r12, %rsi
	jne	.LBB2_13
.LBB2_17:                               # %._crit_edge98
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_, .Lfunc_end2-_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	.cfi_endproc
                                        # -- End function
	.type	_ZL4sortPiS_ii,@function        # -- Begin function _ZL4sortPiS_ii
_ZL4sortPiS_ii:                         # @_ZL4sortPiS_ii
	.cfi_startproc
# %bb.0:
	cmpl	%edx, %ecx
	jle	.LBB3_12
# %bb.1:                                # %.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movslq	%ecx, %r12
	movl	%edx, %ebp
.LBB3_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
                                        #       Child Loop BB3_4 Depth 3
                                        #       Child Loop BB3_6 Depth 3
	movl	(%r14,%r12,4), %eax
	movl	%ebx, %ecx
.LBB3_3:                                # %.preheader53
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_4 Depth 3
                                        #       Child Loop BB3_6 Depth 3
	movslq	%ebp, %rsi
	decq	%rsi
	movl	%ebp, %edi
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	4(%r14,%rsi,4), %r8d
	incq	%rsi
	incl	%edi
	cmpl	%eax, %r8d
	jg	.LBB3_4
# %bb.5:                                # %.preheader
                                        #   in Loop: Header=BB3_3 Depth=2
	leal	-1(%rdi), %ebp
	movslq	%ecx, %r9
	incq	%r9
	movl	%ecx, %r10d
.LBB3_6:                                #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	-4(%r14,%r9,4), %r11d
	decq	%r9
	decl	%r10d
	cmpl	%eax, %r11d
	jl	.LBB3_6
# %bb.7:                                #   in Loop: Header=BB3_3 Depth=2
	leal	1(%r10), %ecx
	cmpl	%ecx, %ebp
	jg	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_3 Depth=2
	movl	%r11d, (%r14,%rsi,4)
	movl	%r8d, (%r14,%r9,4)
	movl	(%r15,%rsi,4), %ecx
	movl	(%r15,%r9,4), %r8d
	movl	%r8d, (%r15,%rsi,4)
	movl	%ecx, (%r15,%r9,4)
	movl	%r10d, %ecx
	movl	%edi, %ebp
.LBB3_9:                                #   in Loop: Header=BB3_3 Depth=2
	cmpl	%ecx, %ebp
	jle	.LBB3_3
# %bb.10:                               # %tailrecurse
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_ZL4sortPiS_ii
	movl	%ebp, %edx
	cmpl	%ebx, %ebp
	jl	.LBB3_2
# %bb.11:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB3_12:                               # %tailrecurse._crit_edge
	retq
.Lfunc_end3:
	.size	_ZL4sortPiS_ii, .Lfunc_end3-_ZL4sortPiS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$264, %rsp                      # imm = 0x108
	.cfi_def_cfa_offset 320
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	8(%rsi), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	8(%r14), %rdx
	leaq	176(%rsp), %rbx
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	callq	puts@PLT
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %r15
	leaq	7(%rsp), %rdx
	movl	$.L.str.8, %esi
	movq	%rax, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movq	%r15, %rdi
	callq	fclose
	movq	8(%r14), %rdx
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	callq	puts@PLT
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	leaq	20(%rsp), %r15
	movl	$.L.str.10, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r15), %r15
	leaq	(,%r15,4), %rdi
	testq	%r15, %r15
	movq	$-1, %r12
	cmovsq	%r12, %rdi
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	testq	%r15, %r15
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movq	40(%rsp), %r15                  # 8-byte Reload
	xorl	%r13d, %r13d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.10, %esi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r13
	movslq	20(%rsp), %rax
	addq	$4, %r15
	cmpq	%rax, %r13
	jl	.LBB4_2
.LBB4_3:                                # %._crit_edge
	movq	%rbx, %rdi
	callq	fclose
	movq	8(%r14), %rdx
	leaq	176(%rsp), %rbx
	movl	$.L.str.11, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	callq	puts@PLT
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	leaq	16(%rsp), %r15
	movl	$.L.str.10, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r15), %r15
	leaq	(,%r15,4), %rdi
	testq	%r15, %r15
	cmovsq	%r12, %rdi
	callq	_Znam
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	testq	%r15, %r15
	jle	.LBB4_6
# %bb.4:                                # %.lr.ph107.preheader
	movq	32(%rsp), %r15                  # 8-byte Reload
	xorl	%r12d, %r12d
.LBB4_5:                                # %.lr.ph107
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.10, %esi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r12
	movslq	16(%rsp), %rax
	addq	$4, %r15
	cmpq	%rax, %r12
	jl	.LBB4_5
.LBB4_6:                                # %._crit_edge108
	movq	%rbx, %rdi
	callq	fclose
	movq	8(%r14), %rdx
	leaq	176(%rsp), %rbx
	movl	$.L.str.12, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	callq	puts@PLT
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r15
	movl	$.L.str.10, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r15), %r15
	leaq	(,%r15,4), %rdi
	testq	%r15, %r15
	movq	$-1, %r12
	cmovsq	%r12, %rdi
	callq	_Znam
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testq	%r15, %r15
	jle	.LBB4_9
# %bb.7:                                # %.lr.ph111.preheader
	movq	24(%rsp), %r15                  # 8-byte Reload
	xorl	%r13d, %r13d
.LBB4_8:                                # %.lr.ph111
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r13
	movslq	12(%rsp), %rax
	addq	$4, %r15
	cmpq	%rax, %r13
	jl	.LBB4_8
.LBB4_9:                                # %._crit_edge112
	movq	%rbx, %rdi
	callq	fclose
	movq	8(%r14), %rdx
	leaq	176(%rsp), %rbx
	movl	$.L.str.14, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	callq	puts@PLT
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %r15
	leaq	8(%rsp), %rbx
	movl	$.L.str.10, %esi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%rbx), %rbp
	leaq	(,%rbp,4), %rdi
	testq	%rbp, %rbp
	cmovsq	%r12, %rdi
	callq	_Znam
	movq	%rax, %r13
	testq	%rbp, %rbp
	jle	.LBB4_12
# %bb.10:                               # %.lr.ph115.preheader
	movq	%r13, %r12
	xorl	%ebp, %ebp
.LBB4_11:                               # %.lr.ph115
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.13, %esi
	movq	%r15, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%rbp
	movslq	8(%rsp), %rax
	addq	$4, %r12
	cmpq	%rax, %rbp
	jl	.LBB4_11
.LBB4_12:                               # %._crit_edge116
	movq	%r15, %rdi
	callq	fclose
	cmpb	$0, 7(%rsp)
	movl	$.Lstr.1, %eax
	movl	$.Lstr.2, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movl	20(%rsp), %esi
	movl	16(%rsp), %edx
	movl	12(%rsp), %ecx
	movl	8(%rsp), %r8d
	xorl	%r15d, %r15d
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	8(%rsp), %r12
	leaq	(,%r12,4), %rdi
	callq	malloc
	movq	%rax, %rbp
	cmpb	$0, 7(%rsp)
	je	.LBB4_13
# %bb.14:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	leaq	144(%rsp), %rax
	leaq	160(%rsp), %r10
	leaq	168(%rsp), %r11
	leaq	152(%rsp), %r8
	leaq	176(%rsp), %r15
	movl	%r12d, %edi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movq	%r15, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	callq	_Z8CSRToJDSiPiS_PfPS_S1_S1_S1_PS0_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	(%r15), %rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movslq	(%rax), %r15
	shlq	$2, %r15
	jmp	.LBB4_15
.LBB4_13:
                                        # implicit-def: $rax
                                        # kill: killed $rax
.LBB4_15:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	cmpb	$0, 7(%rsp)
	je	.LBB4_17
# %bb.16:
	leaq	104(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	leaq	96(%rsp), %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
	leaq	88(%rsp), %rdi
	callq	hipMalloc
	leaq	72(%rsp), %r12
	leaq	80(%rsp), %rdi
	jmp	.LBB4_18
.LBB4_17:
	movslq	20(%rsp), %rsi
	shlq	$2, %rsi
	leaq	128(%rsp), %rdi
	callq	hipMalloc
	leaq	112(%rsp), %r12
	leaq	120(%rsp), %rdi
	leaq	16(%rsp), %rbx
.LBB4_18:
	movslq	(%rbx), %rsi
	shlq	$2, %rsi
	callq	hipMalloc
	movslq	12(%rsp), %rsi
	shlq	$2, %rsi
	movq	%r12, %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	movslq	8(%rsp), %rsi
	shlq	$2, %rsi
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	cmpb	$0, 7(%rsp)
	je	.LBB4_20
# %bb.19:
	movq	104(%rsp), %rdi
	movq	160(%rsp), %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	96(%rsp), %rdi
	movq	152(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi
	movq	144(%rsp), %rsi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rdi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	movq	136(%rsp), %rsi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	jmp	.LBB4_21
.LBB4_20:
	movq	128(%rsp), %rdi
	movslq	20(%rsp), %rdx
	shlq	$2, %rdx
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	120(%rsp), %rdi
	movslq	16(%rsp), %rdx
	shlq	$2, %rdx
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	112(%rsp), %rdi
	movslq	12(%rsp), %rdx
	shlq	$2, %rdx
	movq	24(%rsp), %rsi                  # 8-byte Reload
.LBB4_21:
	movl	$1, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.21, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movq	56(%rsp), %rsi
	movslq	8(%rsp), %rdx
	shlq	$2, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movq	128(%rsp), %rdi
	callq	hipFree
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	cmpb	$0, 7(%rsp)
	je	.LBB4_23
# %bb.22:
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
.LBB4_23:
	movq	8(%r14), %rdx
	leaq	176(%rsp), %rbx
	movl	$.L.str.24, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	callq	puts@PLT
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %r14
	leaq	8(%rsp), %rbx
	movl	$.L.str.10, %esi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%rbx), %esi
	movl	$.L.str.25, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	(%rbx), %r15
	leaq	(,%r15,4), %rax
	testq	%r15, %r15
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	movq	%rax, %rbx
	testq	%r15, %r15
	jle	.LBB4_26
# %bb.24:                               # %.lr.ph119.preheader
	movq	%rbx, %r15
	xorl	%r12d, %r12d
.LBB4_25:                               # %.lr.ph119
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incq	%r12
	movslq	8(%rsp), %rax
	addq	$4, %r15
	cmpq	%rax, %r12
	jl	.LBB4_25
.LBB4_26:                               # %._crit_edge120
	movq	%r14, %rdi
	callq	fclose
	movl	8(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB4_27
# %bb.28:                               # %.lr.ph124.preheader
	movb	$1, %cl
	xorl	%r14d, %r14d
.LBB4_29:                               # %.lr.ph124
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbp,%r14,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	(%rbx,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jne	.LBB4_30
	jnp	.LBB4_31
.LBB4_30:                               #   in Loop: Header=BB4_29 Depth=1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.26, %edi
	movl	%r14d, %esi
	movb	$2, %al
	callq	printf
	xorl	%ecx, %ecx
	movl	8(%rsp), %eax
.LBB4_31:                               #   in Loop: Header=BB4_29 Depth=1
	incq	%r14
	movslq	%eax, %rdx
	cmpq	%rdx, %r14
	jl	.LBB4_29
# %bb.32:                               # %._crit_edge125
	testb	$1, %cl
	movl	$.Lstr.8, %eax
	movl	$.Lstr.9, %edi
	cmoveq	%rax, %rdi
	jmp	.LBB4_33
.LBB4_27:
	movl	$.Lstr.9, %edi
.LBB4_33:                               # %._crit_edge125.thread
	callq	puts@PLT
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	cmpb	$0, 7(%rsp)
	je	.LBB4_35
# %bb.34:
	movq	160(%rsp), %rdi
	callq	free
	movq	152(%rsp), %rdi
	callq	free
	movq	144(%rsp), %rdi
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	136(%rsp), %rdi
	callq	free
.LBB4_35:
	xorl	%eax, %eax
	addq	$264, %rsp                      # imm = 0x108
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13spmvCSRKernelPfPiS0_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13spmvCSRKernelPfPiS0_S_S_i,@object # @_Z13spmvCSRKernelPfPiS0_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z13spmvCSRKernelPfPiS0_S_S_i
	.p2align	3, 0x0
_Z13spmvCSRKernelPfPiS0_S_S_i:
	.quad	_Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i
	.size	_Z13spmvCSRKernelPfPiS0_S_S_i, 8

	.type	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i,@object # @_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.globl	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.p2align	3, 0x0
_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i:
	.quad	_Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.size	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"jdsRowNNZ = %d\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"NNZ = %d\n"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"dim = %d\n"
	.size	.L.str.2, 10

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Dataset Folder %s\n"
	.size	.L.str.3, 19

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%smode.flag"
	.size	.L.str.5, 12

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"r"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d/n"
	.size	.L.str.8, 5

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%scol.raw"
	.size	.L.str.9, 10

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%d\n"
	.size	.L.str.10, 4

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%srow.raw"
	.size	.L.str.11, 10

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%sdata.raw"
	.size	.L.str.12, 11

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"%e\n"
	.size	.L.str.13, 4

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"%svec.raw"
	.size	.L.str.14, 10

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"#Columns: %d, #Rows: %d, #Data: %d, Dim: %d\n"
	.size	.L.str.17, 45

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	" seconds\n"
	.size	.L.str.21, 10

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"%soutput.raw"
	.size	.L.str.24, 13

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"dim: %d\n"
	.size	.L.str.25, 9

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"%e %e does not match at row %d!\n"
	.size	.L.str.26, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13spmvCSRKernelPfPiS0_S_S_i"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Importing data and creating memory on host"
	.size	.Lstr, 43

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"CSR Multiplication"
	.size	.Lstr.1, 19

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"JDS Multiplication"
	.size	.Lstr.2, 19

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Allocating GPU memory."
	.size	.Lstr.3, 23

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Copying input memory to the GPU."
	.size	.Lstr.4, 33

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Performing CUDA computation"
	.size	.Lstr.5, 28

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Copying output memory to the CPU"
	.size	.Lstr.6, 33

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Freeing GPU Memory"
	.size	.Lstr.7, 19

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"some elements do not match"
	.size	.Lstr.8, 27

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"Result is correct!"
	.size	.Lstr.9, 19

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i
	.addrsig_sym _Z28__device_stub__spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13spmvCSRKernelPfPiS0_S_S_i
	.addrsig_sym _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13spmvCSRKernelPfPiS0_S_S_i ; -- Begin function _Z13spmvCSRKernelPfPiS0_S_S_i
	.globl	_Z13spmvCSRKernelPfPiS0_S_S_i
	.p2align	8
	.type	_Z13spmvCSRKernelPfPiS0_S_S_i,@function
_Z13spmvCSRKernelPfPiS0_S_S_i:          ; @_Z13spmvCSRKernelPfPiS0_S_S_i
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13spmvCSRKernelPfPiS0_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13spmvCSRKernelPfPiS0_S_S_i, .Lfunc_end0-_Z13spmvCSRKernelPfPiS0_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i ; -- Begin function _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.globl	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
	.p2align	8
	.type	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i,@function
_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i:    ; @_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 60
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i, .Lfunc_end1-_Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13spmvCSRKernelPfPiS0_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z13spmvCSRKernelPfPiS0_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 60
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
