//=============================================================================================
// Name        		: thread2d.cu
// Author      		: Jose Refojo
// Version     		:	29-06-2012
// Creation date	:	18-06-2010
// Copyright		: Copyright belongs to Trinity Centre for High Performance Computing
// Description		: This program will initialize a number of arrays,
//			  then it will grab data from each thread (such as thread position inside the block and block),
//			  save it, send it back into the main memory, and print it
//=============================================================================================


#include "stdio.h"

__global__ void scanTheadInformationGPU(int *threadXIdsGPU,int *threadYIdsGPU,int *blockXIdsGPU,int *blockYIdsGPU,int N,int M) {
	int idx=blockIdx.x*blockDim.x+threadIdx.x;
	int idy=blockIdx.y*blockDim.y+threadIdx.y;

	if ( idx < N ) {
	    if ( idy < M ) {
		threadXIdsGPU[idx+idy*N]=threadIdx.x;
		threadYIdsGPU[idx+idy*N]=threadIdx.y;
		blockXIdsGPU[idx+idy*N]=blockIdx.x;
		blockYIdsGPU[idx+idy*N]=blockIdx.y;
	    }
	}
}


int main() {
	// pointers to host memory matrices
	int **threadXIds, **threadYIds;
	int *threadXIds1d = NULL;
	int *threadYIds1d = NULL;
	int **blockXIds, **blockYIds;
	int *blockXIds1d = NULL;
	int *blockYIds1d = NULL;

	// pointers to device memory matrices
	int *threadXIdsGPU, *threadYIdsGPU;
	int *blockXIdsGPU, *blockYIdsGPU;
	// N and M are the total size that we want, N is number of rows and M is number of columns
	int N=3,M=3;
	int i,j;

	// Allocate arrays threadIds and blockIds on host
	// threadIds
	// threadXIds is the pointer to all the array malloced in one dimension
	threadXIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	threadYIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	// thread*Ids will be just pointers to the one dimension array
	threadXIds = (int**) malloc((N)*sizeof(int*));
	threadYIds = (int**) malloc((N)*sizeof(int*));
	for (i=0;i<N;i++) {
		threadXIds[i]=(&(threadXIds1d[i*M]));
		threadYIds[i]=(&(threadYIds1d[i*M]));
	}
	// blockIds
	// blockIds is the pointer to all the array malloced in one dimension
	blockXIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	blockYIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	// block*Ids will be just pointers to the one dimension array
	blockXIds = (int**) malloc((N)*sizeof(int*));
	blockYIds = (int**) malloc((N)*sizeof(int*));
	for (i=0;i<N;i++) {
		blockXIds[i]=(&(blockXIds1d[i*M]));
		blockYIds[i]=(&(blockYIds1d[i*M]));
	}


	// Allocate arrays threadIdsGPU and blockIdsGPU on device
	cudaMalloc ((void **) &threadXIdsGPU, sizeof(int)*N*M);
	cudaMalloc ((void **) &threadYIdsGPU, sizeof(int)*N*M);
	cudaMalloc ((void **) &blockXIdsGPU, sizeof(int)*N*M);
	cudaMalloc ((void **) &blockYIdsGPU, sizeof(int)*N*M);
/*
	// Copy data from host memory to device memory (not needed)
	cudaMemcpy(threadXIdsGPU, threadXIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
	cudaMemcpy(threadYIdsGPU, threadYIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
	cudaMemcpy(blockXIdsGPU, blockXIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
	cudaMemcpy(blockYIdsGPU, blockYIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
*/

	// Compute the execution configuration
	int block_size=2;

	dim3 dimBlock(block_size,block_size);
	dim3 dimGrid ( (N/dimBlock.x) + (!(N%dimBlock.x)?0:1),(M/dimBlock.y) + (!(M%dimBlock.y)?0:1) );

	// Scan information from the threads
	scanTheadInformationGPU<<<dimGrid,dimBlock>>>(threadXIdsGPU,threadYIdsGPU,blockXIdsGPU,blockYIdsGPU,N,M);

	// Copy data from device memory to host memory
	cudaMemcpy(threadXIds1d, threadXIdsGPU, sizeof(int)*N*M, cudaMemcpyDeviceToHost);
	cudaMemcpy(threadYIds1d, threadYIdsGPU, sizeof(int)*N*M, cudaMemcpyDeviceToHost);
	cudaMemcpy(blockXIds1d, blockXIdsGPU, sizeof(int)*N*M, cudaMemcpyDeviceToHost);
	cudaMemcpy(blockYIds1d, blockYIdsGPU, sizeof(int)*N*M, cudaMemcpyDeviceToHost);

	// Print all the data about the threads
	printf(" dimGrid = %d %d\n",dimGrid.x,dimGrid.y);
	for (i=0; i<N; i++) {
		for (j=0; j<M; j++) {
			printf(" threadIds[%d][%d]= %d , %d\n",i,j,threadXIds[i][j],threadYIds[i][j]);
		}
	}
	for (i=0; i<N; i++) {
		for (j=0; j<M; j++) {
			printf(" blockIds[%d][%d]= %d , %d\n",i,j,blockXIds[i][j],blockYIds[i][j]);
		}
	}

	// Free the memory
	free(threadXIds);
	free(threadXIds1d);
	free(threadYIds);
	free(threadYIds1d);

	free(blockXIds); 
	free(blockXIds1d); 
	free(blockYIds); 
	free(blockYIds1d); 

	cudaFree(threadXIdsGPU);
	cudaFree(threadYIdsGPU);
	cudaFree(blockXIdsGPU);
	cudaFree(blockYIdsGPU);
}

	.file	"tmpxft_0037c947_00000000-6_thread2d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii
	.type	_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii, @function
_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z23scanTheadInformationGPUPiS_S_S_ii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii, .-_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii
	.globl	_Z23scanTheadInformationGPUPiS_S_S_ii
	.type	_Z23scanTheadInformationGPUPiS_S_S_ii, @function
_Z23scanTheadInformationGPUPiS_S_S_ii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii
	.cfi_endproc
.LFE2053:
	.size	_Z23scanTheadInformationGPUPiS_S_S_ii, .-_Z23scanTheadInformationGPUPiS_S_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" dimGrid = %d %d\n"
.LC1:
	.string	" threadIds[%d][%d]= %d , %d\n"
.LC2:
	.string	" blockIds[%d][%d]= %d , %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$36, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$36, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$24, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$24, %edi
	movq	%rax, %r15
	call	malloc@PLT
	movq	%r14, (%r15)
	movl	$36, %edi
	movq	%r12, (%rax)
	movq	%rax, %r13
	leaq	12(%r14), %rax
	movq	%rax, 8(%r15)
	leaq	12(%r12), %rax
	movq	%rax, 8(%r13)
	leaq	24(%r14), %rax
	movq	%rax, 16(%r15)
	leaq	24(%r12), %rax
	movq	%rax, 16(%r13)
	call	malloc@PLT
	movl	$36, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$24, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movl	$24, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	48(%rsp), %rdi
	movl	$36, %esi
	movq	%rax, %rbx
	movq	8(%rsp), %rax
	movq	%rax, 0(%rbp)
	movq	16(%rsp), %rax
	movq	%rax, (%rbx)
	movq	8(%rsp), %rax
	addq	$12, %rax
	movq	%rax, 8(%rbp)
	movq	16(%rsp), %rax
	addq	$12, %rax
	movq	%rax, 8(%rbx)
	movq	8(%rsp), %rax
	addq	$24, %rax
	movq	%rax, 16(%rbp)
	movq	16(%rsp), %rax
	addq	$24, %rax
	movq	%rax, 16(%rbx)
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$8589934594, %rdi
	movl	$1, %esi
	movl	$1, 100(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 92(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movl	$3, %r9d
	movl	$3, %r8d
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z51__device_stub__Z23scanTheadInformationGPUPiS_S_S_iiPiS_S_S_ii
.L9:
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$36, %edx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$36, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$36, %edx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$36, %edx
	call	cudaMemcpy@PLT
	movl	$2, %ecx
	movl	$2, %edx
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%r11d, %r11d
.L10:
	movl	%r11d, 28(%rsp)
	xorl	%r10d, %r10d
.L11:
	movq	0(%r13,%r11,8), %rdx
	movq	(%r15,%r11,8), %rax
	movl	%r10d, %ecx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movq	%r11, 40(%rsp)
	movl	(%rdx,%r10,4), %r9d
	movl	(%rax,%r10,4), %r8d
	xorl	%eax, %eax
	movq	%r10, 32(%rsp)
	movl	28(%rsp), %edx
	call	__printf_chk@PLT
	movq	32(%rsp), %r10
	movq	40(%rsp), %r11
	incq	%r10
	cmpq	$3, %r10
	jne	.L11
	incq	%r11
	cmpq	$3, %r11
	jne	.L10
	xorl	%r11d, %r11d
.L12:
	movl	%r11d, 28(%rsp)
	xorl	%r10d, %r10d
.L13:
	movq	(%rbx,%r11,8), %rdx
	movq	0(%rbp,%r11,8), %rax
	movl	%r10d, %ecx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%r11, 40(%rsp)
	movl	(%rdx,%r10,4), %r9d
	movl	(%rax,%r10,4), %r8d
	xorl	%eax, %eax
	movq	%r10, 32(%rsp)
	movl	28(%rsp), %edx
	call	__printf_chk@PLT
	movq	32(%rsp), %r10
	movq	40(%rsp), %r11
	incq	%r10
	cmpq	$3, %r10
	jne	.L13
	incq	%r11
	cmpq	$3, %r11
	jne	.L12
	movq	%r15, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z23scanTheadInformationGPUPiS_S_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z23scanTheadInformationGPUPiS_S_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//=============================================================================================
// Name        		: thread2d.cu
// Author      		: Jose Refojo
// Version     		:	29-06-2012
// Creation date	:	18-06-2010
// Copyright		: Copyright belongs to Trinity Centre for High Performance Computing
// Description		: This program will initialize a number of arrays,
//			  then it will grab data from each thread (such as thread position inside the block and block),
//			  save it, send it back into the main memory, and print it
//=============================================================================================



#include <hip/hip_runtime.h>
#include "stdio.h"

__global__ void scanTheadInformationGPU(int *threadXIdsGPU,int *threadYIdsGPU,int *blockXIdsGPU,int *blockYIdsGPU,int N,int M) {
	int idx=blockIdx.x*blockDim.x+threadIdx.x;
	int idy=blockIdx.y*blockDim.y+threadIdx.y;

	if ( idx < N ) {
	    if ( idy < M ) {
		threadXIdsGPU[idx+idy*N]=threadIdx.x;
		threadYIdsGPU[idx+idy*N]=threadIdx.y;
		blockXIdsGPU[idx+idy*N]=blockIdx.x;
		blockYIdsGPU[idx+idy*N]=blockIdx.y;
	    }
	}
}


int main() {
	// pointers to host memory matrices
	int **threadXIds, **threadYIds;
	int *threadXIds1d = NULL;
	int *threadYIds1d = NULL;
	int **blockXIds, **blockYIds;
	int *blockXIds1d = NULL;
	int *blockYIds1d = NULL;

	// pointers to device memory matrices
	int *threadXIdsGPU, *threadYIdsGPU;
	int *blockXIdsGPU, *blockYIdsGPU;
	// N and M are the total size that we want, N is number of rows and M is number of columns
	int N=3,M=3;
	int i,j;

	// Allocate arrays threadIds and blockIds on host
	// threadIds
	// threadXIds is the pointer to all the array malloced in one dimension
	threadXIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	threadYIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	// thread*Ids will be just pointers to the one dimension array
	threadXIds = (int**) malloc((N)*sizeof(int*));
	threadYIds = (int**) malloc((N)*sizeof(int*));
	for (i=0;i<N;i++) {
		threadXIds[i]=(&(threadXIds1d[i*M]));
		threadYIds[i]=(&(threadYIds1d[i*M]));
	}
	// blockIds
	// blockIds is the pointer to all the array malloced in one dimension
	blockXIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	blockYIds1d = (int*) malloc( (N)*(M)*sizeof(int) );
	// block*Ids will be just pointers to the one dimension array
	blockXIds = (int**) malloc((N)*sizeof(int*));
	blockYIds = (int**) malloc((N)*sizeof(int*));
	for (i=0;i<N;i++) {
		blockXIds[i]=(&(blockXIds1d[i*M]));
		blockYIds[i]=(&(blockYIds1d[i*M]));
	}


	// Allocate arrays threadIdsGPU and blockIdsGPU on device
	hipMalloc ((void **) &threadXIdsGPU, sizeof(int)*N*M);
	hipMalloc ((void **) &threadYIdsGPU, sizeof(int)*N*M);
	hipMalloc ((void **) &blockXIdsGPU, sizeof(int)*N*M);
	hipMalloc ((void **) &blockYIdsGPU, sizeof(int)*N*M);
/*
	// Copy data from host memory to device memory (not needed)
	cudaMemcpy(threadXIdsGPU, threadXIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
	cudaMemcpy(threadYIdsGPU, threadYIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
	cudaMemcpy(blockXIdsGPU, blockXIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
	cudaMemcpy(blockYIdsGPU, blockYIds1d, sizeof(int)*N*M, cudaMemcpyHostToDevice);
*/

	// Compute the execution configuration
	int block_size=2;

	dim3 dimBlock(block_size,block_size);
	dim3 dimGrid ( (N/dimBlock.x) + (!(N%dimBlock.x)?0:1),(M/dimBlock.y) + (!(M%dimBlock.y)?0:1) );

	// Scan information from the threads
	scanTheadInformationGPU<<<dimGrid,dimBlock>>>(threadXIdsGPU,threadYIdsGPU,blockXIdsGPU,blockYIdsGPU,N,M);

	// Copy data from device memory to host memory
	hipMemcpy(threadXIds1d, threadXIdsGPU, sizeof(int)*N*M, hipMemcpyDeviceToHost);
	hipMemcpy(threadYIds1d, threadYIdsGPU, sizeof(int)*N*M, hipMemcpyDeviceToHost);
	hipMemcpy(blockXIds1d, blockXIdsGPU, sizeof(int)*N*M, hipMemcpyDeviceToHost);
	hipMemcpy(blockYIds1d, blockYIdsGPU, sizeof(int)*N*M, hipMemcpyDeviceToHost);

	// Print all the data about the threads
	printf(" dimGrid = %d %d\n",dimGrid.x,dimGrid.y);
	for (i=0; i<N; i++) {
		for (j=0; j<M; j++) {
			printf(" threadIds[%d][%d]= %d , %d\n",i,j,threadXIds[i][j],threadYIds[i][j]);
		}
	}
	for (i=0; i<N; i++) {
		for (j=0; j<M; j++) {
			printf(" blockIds[%d][%d]= %d , %d\n",i,j,blockXIds[i][j],blockYIds[i][j]);
		}
	}

	// Free the memory
	free(threadXIds);
	free(threadXIds1d);
	free(threadYIds);
	free(threadYIds1d);

	free(blockXIds); 
	free(blockXIds1d); 
	free(blockYIds); 
	free(blockYIds1d); 

	hipFree(threadXIdsGPU);
	hipFree(threadYIdsGPU);
	hipFree(blockXIdsGPU);
	hipFree(blockYIdsGPU);
}

	.text
	.file	"thread2d.hip"
	.globl	_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii # -- Begin function _Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii
	.type	_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii,@function
_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii: # @_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23scanTheadInformationGPUPiS_S_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii, .Lfunc_end0-_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$36, %edi
	callq	malloc
	movq	%rax, %r12
	movl	$36, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$24, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$24, %edi
	callq	malloc
	xorl	%esi, %esi
	movq	%r12, %rcx
	movq	%r15, %rdx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	%rcx, (%rbx,%rsi,8)
	movq	%rdx, (%rax,%rsi,8)
	incq	%rsi
	addq	$12, %rdx
	addq	$12, %rcx
	cmpq	$3, %rsi
	jne	.LBB1_1
# %bb.2:
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	$36, %edi
	callq	malloc
	movq	%rax, %rbp
	movl	$36, %edi
	callq	malloc
	movq	%rax, %r13
	movl	$24, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$24, %edi
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
	movq	%rbp, %rcx
	movq	%r13, %rdx
.LBB1_3:                                # =>This Inner Loop Header: Depth=1
	movq	%rcx, (%r14,%rax,8)
	movq	%rdx, (%rbx,%rax,8)
	incq	%rax
	addq	$12, %rdx
	addq	$12, %rcx
	cmpq	$3, %rax
	jne	.LBB1_3
# %bb.4:
	leaq	32(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$36, %esi
	callq	hipMalloc
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$3, %r8d
	movl	$3, %r9d
	callq	_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii
.LBB1_6:
	movq	32(%rsp), %rsi
	movl	$36, %edx
	movq	%r12, 72(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$36, %edx
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movl	$36, %edx
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movl	$36, %edx
	movq	%r13, 64(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str, %edi
	movl	$2, %esi
	movl	$2, %edx
	xorl	%eax, %eax
	callq	printf
	xorl	%r13d, %r13d
.LBB1_7:                                # %.preheader117
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
	movq	40(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r13,8), %r15
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r13,8), %r12
	xorl	%ebp, %ebp
.LBB1_8:                                #   Parent Loop BB1_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rbp,4), %ecx
	movl	(%r12,%rbp,4), %r8d
	movl	$.L.str.1, %edi
	movl	%r13d, %esi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	incq	%rbp
	cmpq	$3, %rbp
	jne	.LBB1_8
# %bb.9:                                #   in Loop: Header=BB1_7 Depth=1
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB1_7
# %bb.10:                               # %.preheader.preheader
	xorl	%r13d, %r13d
.LBB1_11:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	movq	(%r14,%r13,8), %r15
	movq	(%rbx,%r13,8), %r12
	xorl	%ebp, %ebp
.LBB1_12:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rbp,4), %ecx
	movl	(%r12,%rbp,4), %r8d
	movl	$.L.str.2, %edi
	movl	%r13d, %esi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	incq	%rbp
	cmpq	$3, %rbp
	jne	.LBB1_12
# %bb.13:                               #   in Loop: Header=BB1_11 Depth=1
	incq	%r13
	cmpq	$3, %r13
	jne	.LBB1_11
# %bb.14:
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23scanTheadInformationGPUPiS_S_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z23scanTheadInformationGPUPiS_S_S_ii,@object # @_Z23scanTheadInformationGPUPiS_S_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z23scanTheadInformationGPUPiS_S_S_ii
	.p2align	3, 0x0
_Z23scanTheadInformationGPUPiS_S_S_ii:
	.quad	_Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii
	.size	_Z23scanTheadInformationGPUPiS_S_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" dimGrid = %d %d\n"
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" threadIds[%d][%d]= %d , %d\n"
	.size	.L.str.1, 29

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" blockIds[%d][%d]= %d , %d\n"
	.size	.L.str.2, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z23scanTheadInformationGPUPiS_S_S_ii"
	.size	.L__unnamed_1, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__scanTheadInformationGPUPiS_S_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z23scanTheadInformationGPUPiS_S_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23scanTheadInformationGPUPiS_S_S_ii ; -- Begin function _Z23scanTheadInformationGPUPiS_S_S_ii
	.globl	_Z23scanTheadInformationGPUPiS_S_S_ii
	.p2align	8
	.type	_Z23scanTheadInformationGPUPiS_S_S_ii,@function
_Z23scanTheadInformationGPUPiS_S_S_ii:  ; @_Z23scanTheadInformationGPUPiS_S_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[16:23], s[0:1], 0x0
	v_mad_u64_u32 v[4:5], null, v3, s4, v[2:3]
	v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s17, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s18, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s19, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s20, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_store_b32 v[4:5], v1, off
	global_store_b32 v[6:7], v0, off
	global_store_b32 v[8:9], v10, off
	global_store_b32 v[2:3], v11, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23scanTheadInformationGPUPiS_S_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23scanTheadInformationGPUPiS_S_S_ii, .Lfunc_end0-_Z23scanTheadInformationGPUPiS_S_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 26
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23scanTheadInformationGPUPiS_S_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z23scanTheadInformationGPUPiS_S_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
