extern "C" {
    const int BLOCKDIM = 32;
    const int sigma1 = 50;
    const int sigma2 = 50;

    __device__ const int FILTER_SIZE = 9;
    __device__ const int FILTER_HALFSIZE = FILTER_SIZE >> 1;

    __device__ int index_median(int x, int y, int width) 
    {
        return (y * width) + x;
    }

    __device__ int clamp_median(int value, int bound) 
    {
        if (value < 0) {
            return 0;
        }
        if (value < bound) {
            return value;
        }
        return bound - 1;
    }

    __device__ float exp_f(int i) { return exp((float) i); }


    __global__ void bilateral_filter_sm(unsigned char* input, unsigned char* output, int width, int height)
    {
        __shared__ float sharedPixels[BLOCKDIM + FILTER_SIZE][BLOCKDIM + FILTER_SIZE];

        const int x = blockIdx.x * blockDim.x + threadIdx.x;
        const int y = blockIdx.y * blockDim.y + threadIdx.y;

        int xBlockLimit_max = blockDim.x - FILTER_HALFSIZE - 1;
        int yBlockLimit_max = blockDim.y - FILTER_HALFSIZE - 1;
        int xBlockLimit_min = FILTER_HALFSIZE;
        int yBlockLimit_min = FILTER_HALFSIZE;

        if (threadIdx.x > xBlockLimit_max && threadIdx.y > yBlockLimit_max) {
            int i = index_median(clamp_median(x + FILTER_HALFSIZE,width), clamp_median(y + FILTER_HALFSIZE,height), width);
                float pixel = input[i];
            sharedPixels[threadIdx.x + 2*FILTER_HALFSIZE][threadIdx.y + 2*FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.x > xBlockLimit_max && threadIdx.y < yBlockLimit_min) {
            int i = index_median(clamp_median(x + FILTER_HALFSIZE,width), clamp_median(y - FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x + 2*FILTER_HALFSIZE][threadIdx.y] = pixel;
        }
        if (threadIdx.x < xBlockLimit_min && threadIdx.y > yBlockLimit_max) {
            int i = index_median(clamp_median(x - FILTER_HALFSIZE,width), clamp_median(y + FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x][threadIdx.y + 2*FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.x < xBlockLimit_min && threadIdx.y < yBlockLimit_min) {
            int i = index_median(clamp_median(x - FILTER_HALFSIZE,width), clamp_median(y - FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x][threadIdx.y] = pixel;
        }
        if (threadIdx.x < xBlockLimit_min) {
            int i = index_median(clamp_median(x - FILTER_HALFSIZE,width), clamp_median(y,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x][threadIdx.y + FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.x > xBlockLimit_max) {
            int i = index_median(clamp_median(x + FILTER_HALFSIZE,width), clamp_median(y,height), width);
            unsigned int pixel = input[i];
            sharedPixels[threadIdx.x + 2*FILTER_HALFSIZE][threadIdx.y + FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.y < yBlockLimit_min) {
            int i = index_median(clamp_median(x,width), clamp_median(y - FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x + FILTER_HALFSIZE][threadIdx.y] = pixel;
        }
        if (threadIdx.y > yBlockLimit_max) {
            int i = index_median(clamp_median(x,width), clamp_median(y + FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x + FILTER_HALFSIZE][threadIdx.y + 2*FILTER_HALFSIZE] = pixel;
        }
        int i = index_median(x, y, width);
        float pixel = input[i];
        sharedPixels[threadIdx.x + FILTER_HALFSIZE][threadIdx.y + FILTER_HALFSIZE] = pixel;

        __syncthreads();

        if((x<width) && (y<height))
        {
            float running_total = 0;
            float norm_factor = 0;
            const int offset = y * width + x;
            for (int xctr = 0; xctr < FILTER_SIZE; xctr++) 
            {
                for (int yctr = 0; yctr < FILTER_SIZE; yctr++) 
                {
                    float intensity_change = sharedPixels[threadIdx.x + xctr][threadIdx.y + yctr] - sharedPixels[threadIdx.x][threadIdx.y];
                    float w1 = exp_f(-((xctr-FILTER_HALFSIZE) * (xctr-FILTER_HALFSIZE) + 
                             (yctr-FILTER_HALFSIZE) * (yctr-FILTER_HALFSIZE)) / 
                            (2 * sigma1 * sigma1));
                    float w2 = exp_f(-(intensity_change * intensity_change) / (2 * sigma2 * sigma2));
                    running_total += sharedPixels[threadIdx.x + xctr][threadIdx.y + yctr] * w1 * w2;
                    norm_factor += w1 * w2;
                }
            }
            output[offset] = running_total / norm_factor;
        }
    }


    __global__ void bilateral_filter_2d(unsigned char* input, unsigned char* output, int width, int height)
    {
        const int x = blockIdx.x * blockDim.x + threadIdx.x;
        const int y = blockIdx.y * blockDim.y + threadIdx.y;

        if((x<width) && (y<height))
        {
            float running_total = 0;
            float norm_factor = 0;
            const int offset = y * width + x;
            for (int xctr = -FILTER_HALFSIZE; xctr <= FILTER_HALFSIZE; xctr++) 
            {
                for (int yctr = -FILTER_HALFSIZE; yctr <= FILTER_HALFSIZE; yctr++) 
                {
                    int y_iter = y + xctr;
                    int x_iter = x + yctr;
                    if (x_iter < 0) x_iter = -x_iter;
                    if (y_iter < 0) y_iter = -y_iter;
                    if (x_iter > width-1) x_iter = width-1-xctr;
                    if (y_iter > height-1) y_iter = height-1-yctr;
                    float intensity_change = input[y_iter * width + x_iter] - input[y * width + x];
                    float w1 = exp_f(-(xctr * xctr + yctr * yctr) / (2 * sigma1 * sigma1));
                    float w2 = exp_f(-(intensity_change * intensity_change) / (2 * sigma2 * sigma2));
                    running_total += input[y_iter * width + x_iter] * w1 * w2;
                    norm_factor += w1 * w2;
                }
            }
            output[offset] = running_total / norm_factor;
        }
    }


    __global__ void bilateral_filter_2d_unoptimized(unsigned char* input, unsigned char* output, int width, int height)
    {
        const int x = blockIdx.x * blockDim.x + threadIdx.x;
        const int y = blockIdx.y * blockDim.y + threadIdx.y;

        if((x<width) && (y<height))
        {
            float running_total = 0;
            float norm_factor = 0;
            const int offset = y * width + x;
            for (int xctr = -FILTER_HALFSIZE; xctr <= FILTER_HALFSIZE; xctr++) 
            {
                for (int yctr = -FILTER_HALFSIZE; yctr <= FILTER_HALFSIZE; yctr++) 
                {
                    int y_iter = y + xctr;
                    int x_iter = x + yctr;
                    if (0 <= x_iter && x_iter < width && 0 <= y_iter && y_iter < height) 
                    {
                        float intensity_change = input[y_iter * width + x_iter] - input[y * width + x];
                        float v1 = exp_f(-(xctr * xctr + yctr * yctr) / (2 * sigma1 * sigma1));
                        float v2 = exp_f(-(intensity_change * intensity_change) / (2 * sigma2 * sigma2));
                        running_total += input[y_iter * width + x_iter] * v1 * v2;
                        norm_factor += v1 * v2;
                    }
                }
            }
            output[offset] = running_total / norm_factor;
        }
    }

}
	.file	"tmpxft_00255633_00000000-6_23-bilateral.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2013:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2013:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	index_median
	.type	index_median, @function
index_median:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	index_median, .-index_median
	.globl	clamp_median
	.type	clamp_median, @function
clamp_median:
.LFB2009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2009:
	.size	clamp_median, .-clamp_median
	.globl	exp_f
	.type	exp_f, @function
exp_f:
.LFB2010:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2010:
	.size	exp_f, .-exp_f
	.globl	_Z43__device_stub__Z19bilateral_filter_smPhS_iiPhS_ii
	.type	_Z43__device_stub__Z19bilateral_filter_smPhS_iiPhS_ii, @function
_Z43__device_stub__Z19bilateral_filter_smPhS_iiPhS_ii:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	bilateral_filter_sm(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z43__device_stub__Z19bilateral_filter_smPhS_iiPhS_ii, .-_Z43__device_stub__Z19bilateral_filter_smPhS_iiPhS_ii
	.globl	bilateral_filter_sm
	.type	bilateral_filter_sm, @function
bilateral_filter_sm:
.LFB2036:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z19bilateral_filter_smPhS_iiPhS_ii
	.cfi_endproc
.LFE2036:
	.size	bilateral_filter_sm, .-bilateral_filter_sm
	.globl	_Z43__device_stub__Z19bilateral_filter_2dPhS_iiPhS_ii
	.type	_Z43__device_stub__Z19bilateral_filter_2dPhS_iiPhS_ii, @function
_Z43__device_stub__Z19bilateral_filter_2dPhS_iiPhS_ii:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	bilateral_filter_2d(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z43__device_stub__Z19bilateral_filter_2dPhS_iiPhS_ii, .-_Z43__device_stub__Z19bilateral_filter_2dPhS_iiPhS_ii
	.globl	bilateral_filter_2d
	.type	bilateral_filter_2d, @function
bilateral_filter_2d:
.LFB2038:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z19bilateral_filter_2dPhS_iiPhS_ii
	.cfi_endproc
.LFE2038:
	.size	bilateral_filter_2d, .-bilateral_filter_2d
	.globl	_Z55__device_stub__Z31bilateral_filter_2d_unoptimizedPhS_iiPhS_ii
	.type	_Z55__device_stub__Z31bilateral_filter_2d_unoptimizedPhS_iiPhS_ii, @function
_Z55__device_stub__Z31bilateral_filter_2d_unoptimizedPhS_iiPhS_ii:
.LFB2039:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	bilateral_filter_2d_unoptimized(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z55__device_stub__Z31bilateral_filter_2d_unoptimizedPhS_iiPhS_ii, .-_Z55__device_stub__Z31bilateral_filter_2d_unoptimizedPhS_iiPhS_ii
	.globl	bilateral_filter_2d_unoptimized
	.type	bilateral_filter_2d_unoptimized, @function
bilateral_filter_2d_unoptimized:
.LFB2040:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z31bilateral_filter_2d_unoptimizedPhS_iiPhS_ii
	.cfi_endproc
.LFE2040:
	.size	bilateral_filter_2d_unoptimized, .-bilateral_filter_2d_unoptimized
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"bilateral_filter_2d_unoptimized"
.LC1:
	.string	"bilateral_filter_2d"
.LC2:
	.string	"bilateral_filter_sm"
.LC3:
	.string	"FILTER_SIZE"
.LC4:
	.string	"FILTER_HALFSIZE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	bilateral_filter_2d_unoptimized(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	bilateral_filter_2d(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	bilateral_filter_sm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL11FILTER_SIZE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL15FILTER_HALFSIZE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.align 4
	.type	_ZL15FILTER_HALFSIZE, @object
	.size	_ZL15FILTER_HALFSIZE, 4
_ZL15FILTER_HALFSIZE:
	.long	4
	.align 4
	.type	_ZL11FILTER_SIZE, @object
	.size	_ZL11FILTER_SIZE, 4
_ZL11FILTER_SIZE:
	.long	9
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
extern "C" {
    const int BLOCKDIM = 32;
    const int sigma1 = 50;
    const int sigma2 = 50;

    __device__ const int FILTER_SIZE = 9;
    __device__ const int FILTER_HALFSIZE = FILTER_SIZE >> 1;

    __device__ int index_median(int x, int y, int width) 
    {
        return (y * width) + x;
    }

    __device__ int clamp_median(int value, int bound) 
    {
        if (value < 0) {
            return 0;
        }
        if (value < bound) {
            return value;
        }
        return bound - 1;
    }

    __device__ float exp_f(int i) { return exp((float) i); }


    __global__ void bilateral_filter_sm(unsigned char* input, unsigned char* output, int width, int height)
    {
        __shared__ float sharedPixels[BLOCKDIM + FILTER_SIZE][BLOCKDIM + FILTER_SIZE];

        const int x = blockIdx.x * blockDim.x + threadIdx.x;
        const int y = blockIdx.y * blockDim.y + threadIdx.y;

        int xBlockLimit_max = blockDim.x - FILTER_HALFSIZE - 1;
        int yBlockLimit_max = blockDim.y - FILTER_HALFSIZE - 1;
        int xBlockLimit_min = FILTER_HALFSIZE;
        int yBlockLimit_min = FILTER_HALFSIZE;

        if (threadIdx.x > xBlockLimit_max && threadIdx.y > yBlockLimit_max) {
            int i = index_median(clamp_median(x + FILTER_HALFSIZE,width), clamp_median(y + FILTER_HALFSIZE,height), width);
                float pixel = input[i];
            sharedPixels[threadIdx.x + 2*FILTER_HALFSIZE][threadIdx.y + 2*FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.x > xBlockLimit_max && threadIdx.y < yBlockLimit_min) {
            int i = index_median(clamp_median(x + FILTER_HALFSIZE,width), clamp_median(y - FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x + 2*FILTER_HALFSIZE][threadIdx.y] = pixel;
        }
        if (threadIdx.x < xBlockLimit_min && threadIdx.y > yBlockLimit_max) {
            int i = index_median(clamp_median(x - FILTER_HALFSIZE,width), clamp_median(y + FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x][threadIdx.y + 2*FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.x < xBlockLimit_min && threadIdx.y < yBlockLimit_min) {
            int i = index_median(clamp_median(x - FILTER_HALFSIZE,width), clamp_median(y - FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x][threadIdx.y] = pixel;
        }
        if (threadIdx.x < xBlockLimit_min) {
            int i = index_median(clamp_median(x - FILTER_HALFSIZE,width), clamp_median(y,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x][threadIdx.y + FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.x > xBlockLimit_max) {
            int i = index_median(clamp_median(x + FILTER_HALFSIZE,width), clamp_median(y,height), width);
            unsigned int pixel = input[i];
            sharedPixels[threadIdx.x + 2*FILTER_HALFSIZE][threadIdx.y + FILTER_HALFSIZE] = pixel;
        }
        if (threadIdx.y < yBlockLimit_min) {
            int i = index_median(clamp_median(x,width), clamp_median(y - FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x + FILTER_HALFSIZE][threadIdx.y] = pixel;
        }
        if (threadIdx.y > yBlockLimit_max) {
            int i = index_median(clamp_median(x,width), clamp_median(y + FILTER_HALFSIZE,height), width);
            float pixel = input[i];
            sharedPixels[threadIdx.x + FILTER_HALFSIZE][threadIdx.y + 2*FILTER_HALFSIZE] = pixel;
        }
        int i = index_median(x, y, width);
        float pixel = input[i];
        sharedPixels[threadIdx.x + FILTER_HALFSIZE][threadIdx.y + FILTER_HALFSIZE] = pixel;

        __syncthreads();

        if((x<width) && (y<height))
        {
            float running_total = 0;
            float norm_factor = 0;
            const int offset = y * width + x;
            for (int xctr = 0; xctr < FILTER_SIZE; xctr++) 
            {
                for (int yctr = 0; yctr < FILTER_SIZE; yctr++) 
                {
                    float intensity_change = sharedPixels[threadIdx.x + xctr][threadIdx.y + yctr] - sharedPixels[threadIdx.x][threadIdx.y];
                    float w1 = exp_f(-((xctr-FILTER_HALFSIZE) * (xctr-FILTER_HALFSIZE) + 
                             (yctr-FILTER_HALFSIZE) * (yctr-FILTER_HALFSIZE)) / 
                            (2 * sigma1 * sigma1));
                    float w2 = exp_f(-(intensity_change * intensity_change) / (2 * sigma2 * sigma2));
                    running_total += sharedPixels[threadIdx.x + xctr][threadIdx.y + yctr] * w1 * w2;
                    norm_factor += w1 * w2;
                }
            }
            output[offset] = running_total / norm_factor;
        }
    }


    __global__ void bilateral_filter_2d(unsigned char* input, unsigned char* output, int width, int height)
    {
        const int x = blockIdx.x * blockDim.x + threadIdx.x;
        const int y = blockIdx.y * blockDim.y + threadIdx.y;

        if((x<width) && (y<height))
        {
            float running_total = 0;
            float norm_factor = 0;
            const int offset = y * width + x;
            for (int xctr = -FILTER_HALFSIZE; xctr <= FILTER_HALFSIZE; xctr++) 
            {
                for (int yctr = -FILTER_HALFSIZE; yctr <= FILTER_HALFSIZE; yctr++) 
                {
                    int y_iter = y + xctr;
                    int x_iter = x + yctr;
                    if (x_iter < 0) x_iter = -x_iter;
                    if (y_iter < 0) y_iter = -y_iter;
                    if (x_iter > width-1) x_iter = width-1-xctr;
                    if (y_iter > height-1) y_iter = height-1-yctr;
                    float intensity_change = input[y_iter * width + x_iter] - input[y * width + x];
                    float w1 = exp_f(-(xctr * xctr + yctr * yctr) / (2 * sigma1 * sigma1));
                    float w2 = exp_f(-(intensity_change * intensity_change) / (2 * sigma2 * sigma2));
                    running_total += input[y_iter * width + x_iter] * w1 * w2;
                    norm_factor += w1 * w2;
                }
            }
            output[offset] = running_total / norm_factor;
        }
    }


    __global__ void bilateral_filter_2d_unoptimized(unsigned char* input, unsigned char* output, int width, int height)
    {
        const int x = blockIdx.x * blockDim.x + threadIdx.x;
        const int y = blockIdx.y * blockDim.y + threadIdx.y;

        if((x<width) && (y<height))
        {
            float running_total = 0;
            float norm_factor = 0;
            const int offset = y * width + x;
            for (int xctr = -FILTER_HALFSIZE; xctr <= FILTER_HALFSIZE; xctr++) 
            {
                for (int yctr = -FILTER_HALFSIZE; yctr <= FILTER_HALFSIZE; yctr++) 
                {
                    int y_iter = y + xctr;
                    int x_iter = x + yctr;
                    if (0 <= x_iter && x_iter < width && 0 <= y_iter && y_iter < height) 
                    {
                        float intensity_change = input[y_iter * width + x_iter] - input[y * width + x];
                        float v1 = exp_f(-(xctr * xctr + yctr * yctr) / (2 * sigma1 * sigma1));
                        float v2 = exp_f(-(intensity_change * intensity_change) / (2 * sigma2 * sigma2));
                        running_total += input[y_iter * width + x_iter] * v1 * v2;
                        norm_factor += v1 * v2;
                    }
                }
            }
            output[offset] = running_total / norm_factor;
        }
    }

}
	.text
	.file	"23-bilateral.hip"
	.globl	__device_stub__bilateral_filter_sm # -- Begin function __device_stub__bilateral_filter_sm
	.type	__device_stub__bilateral_filter_sm,@function
__device_stub__bilateral_filter_sm:     # @__device_stub__bilateral_filter_sm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$bilateral_filter_sm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__bilateral_filter_sm, .Lfunc_end0-__device_stub__bilateral_filter_sm
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__bilateral_filter_2d # -- Begin function __device_stub__bilateral_filter_2d
	.type	__device_stub__bilateral_filter_2d,@function
__device_stub__bilateral_filter_2d:     # @__device_stub__bilateral_filter_2d
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$bilateral_filter_2d, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__bilateral_filter_2d, .Lfunc_end1-__device_stub__bilateral_filter_2d
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__bilateral_filter_2d_unoptimized # -- Begin function __device_stub__bilateral_filter_2d_unoptimized
	.type	__device_stub__bilateral_filter_2d_unoptimized,@function
__device_stub__bilateral_filter_2d_unoptimized: # @__device_stub__bilateral_filter_2d_unoptimized
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$bilateral_filter_2d_unoptimized, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	__device_stub__bilateral_filter_2d_unoptimized, .Lfunc_end2-__device_stub__bilateral_filter_2d_unoptimized
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$bilateral_filter_sm, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$bilateral_filter_2d, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$bilateral_filter_2d_unoptimized, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	bilateral_filter_sm,@object     # @bilateral_filter_sm
	.section	.rodata,"a",@progbits
	.globl	bilateral_filter_sm
	.p2align	3, 0x0
bilateral_filter_sm:
	.quad	__device_stub__bilateral_filter_sm
	.size	bilateral_filter_sm, 8

	.type	bilateral_filter_2d,@object     # @bilateral_filter_2d
	.globl	bilateral_filter_2d
	.p2align	3, 0x0
bilateral_filter_2d:
	.quad	__device_stub__bilateral_filter_2d
	.size	bilateral_filter_2d, 8

	.type	bilateral_filter_2d_unoptimized,@object # @bilateral_filter_2d_unoptimized
	.globl	bilateral_filter_2d_unoptimized
	.p2align	3, 0x0
bilateral_filter_2d_unoptimized:
	.quad	__device_stub__bilateral_filter_2d_unoptimized
	.size	bilateral_filter_2d_unoptimized, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"bilateral_filter_sm"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"bilateral_filter_2d"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"bilateral_filter_2d_unoptimized"
	.size	.L__unnamed_3, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__bilateral_filter_sm
	.addrsig_sym __device_stub__bilateral_filter_2d
	.addrsig_sym __device_stub__bilateral_filter_2d_unoptimized
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym bilateral_filter_sm
	.addrsig_sym bilateral_filter_2d
	.addrsig_sym bilateral_filter_2d_unoptimized
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	bilateral_filter_sm     ; -- Begin function bilateral_filter_sm
	.globl	bilateral_filter_sm
	.p2align	8
	.type	bilateral_filter_sm,@function
bilateral_filter_sm:                    ; @bilateral_filter_sm
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v6, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s2, 0xffff
	s_lshr_b32 s0, s2, 16
	v_mad_u64_u32 v[2:3], null, s14, s1, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
	s_add_i32 s1, s1, -5
	s_add_i32 s2, s0, -5
	v_cmp_lt_u32_e64 s0, s1, v1
	v_cmp_ge_u32_e32 vcc_lo, s2, v0
	v_cmp_lt_u32_e64 s2, s2, v0
	v_add_nc_u32_e32 v7, 4, v2
	v_add_nc_u32_e32 v4, 4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s2
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_cmp_gt_i32_e64 s1, s8, v7
	s_add_i32 s10, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v5, s10, v7, s1
	v_cmp_gt_i32_e64 s1, s9, v4
	s_add_i32 s10, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v8, s10, v4, s1
	v_cmp_lt_i32_e64 s1, -5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0, v5, s1
	v_cmp_lt_i32_e64 s1, -5, v3
	v_cndmask_b32_e64 v10, 0, v8, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v10, s8, v[5:6]
	v_ashrrev_i32_e32 v5, 31, v8
	v_add_co_u32 v8, s1, s4, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s1, s5, v5, s1
	global_load_u8 v5, v[8:9], off
	v_mad_u32_u24 v8, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v5, v5
	ds_store_b32 v8, v5 offset:1344
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_gt_u32_e64 s1, 4, v0
	v_add_nc_u32_e32 v5, -4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s1, s0
	s_and_saveexec_b32 s10, s3
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_cmp_gt_i32_e64 s3, s8, v7
	s_add_i32 s11, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v8, s11, v7, s3
	v_cmp_gt_i32_e64 s3, s9, v5
	s_add_i32 s11, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v9, s11, v5, s3
	v_cmp_lt_i32_e64 s3, -5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0, v8, s3
	v_cmp_lt_i32_e64 s3, 3, v3
	v_cndmask_b32_e64 v11, 0, v9, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v11, s8, v[8:9]
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_co_u32 v8, s3, s4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s3, s5, v10, s3
	global_load_u8 v8, v[8:9], off
	v_mad_u32_u24 v9, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v8, v8
	ds_store_b32 v9, v8 offset:1312
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s10
	v_cmp_gt_u32_e64 s3, 4, v1
	v_add_nc_u32_e32 v8, -4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_and_saveexec_b32 s10, s2
	s_cbranch_execz .LBB0_6
; %bb.5:
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s8, v8
	s_add_i32 s11, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v9, s11, v8, s2
	v_cmp_gt_i32_e64 s2, s9, v4
	s_add_i32 s11, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v10, s11, v4, s2
	v_cmp_lt_i32_e64 s2, 3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 0, v9, s2
	v_cmp_lt_i32_e64 s2, -5, v3
	v_cndmask_b32_e64 v12, 0, v10, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v12, s8, v[9:10]
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v9, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s5, v11, s2
	global_load_u8 v9, v[9:10], off
	v_mad_u32_u24 v10, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v9, v9
	ds_store_b32 v10, v9 offset:32
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s10
	v_or_b32_e32 v9, v1, v0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 4, v9
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_cmp_gt_i32_e64 s2, s8, v8
	s_add_i32 s11, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v9, s11, v8, s2
	v_cmp_gt_i32_e64 s2, s9, v5
	s_add_i32 s11, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v10, s11, v5, s2
	v_cmp_lt_i32_e64 s2, 3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 0, v9, s2
	v_cmp_lt_i32_e64 s2, 3, v3
	v_cndmask_b32_e64 v12, 0, v10, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v12, s8, v[9:10]
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v9, s2, s4, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s2, s5, v11, s2
	global_load_u8 v9, v[9:10], off
	v_mad_u32_u24 v10, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v9, v9
	ds_store_b32 v10, v9
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s10, s3
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_cmp_gt_i32_e64 s2, s8, v8
	s_add_i32 s3, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v8, s3, v8, s2
	v_cmp_gt_i32_e64 s2, s9, v3
	s_add_i32 s3, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v9, s3, v3, s2
	v_cmp_lt_i32_e64 s2, 3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v8, 0, v8, s2
	v_cmp_lt_i32_e64 s2, -1, v3
	v_cndmask_b32_e64 v11, 0, v9, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v11, s8, v[8:9]
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_co_u32 v8, s2, s4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s5, v10, s2
	global_load_u8 v8, v[8:9], off
	v_mad_u32_u24 v9, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v8, v8
	ds_store_b32 v9, v8 offset:16
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s2, s0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_cmp_gt_i32_e64 s0, s8, v7
	s_add_i32 s3, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v7, s3, v7, s0
	v_cmp_gt_i32_e64 s0, s9, v3
	s_add_i32 s3, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v8, s3, v3, s0
	v_cmp_lt_i32_e64 s0, -5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0, v7, s0
	v_cmp_lt_i32_e64 s0, -1, v3
	v_cndmask_b32_e64 v10, 0, v8, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v10, s8, v[7:8]
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v7, s0, s4, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s5, v9, s0
	global_load_u8 v7, v[7:8], off
	v_mad_u32_u24 v8, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v7, v7
	ds_store_b32 v8, v7 offset:1328
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_cmp_gt_i32_e64 s0, s8, v2
	s_add_i32 s1, s8, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v7, s1, v2, s0
	v_cmp_gt_i32_e64 s0, s9, v5
	s_add_i32 s1, s9, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v8, s1, v5, s0
	v_cmp_lt_i32_e64 s0, -1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0, v7, s0
	v_cmp_lt_i32_e64 s0, 3, v3
	v_cndmask_b32_e64 v9, 0, v8, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v9, s8, v[5:6]
	v_ashrrev_i32_e32 v5, 31, v7
	v_add_co_u32 v7, s0, s4, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s5, v5, s0
	global_load_u8 v5, v[7:8], off
	v_mad_u32_u24 v7, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v5, v5
	ds_store_b32 v7, v5 offset:656
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v7, 4, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
; %bb.15:                               ; %._crit_edge
	v_add_nc_u32_e32 v7, 4, v1
                                        ; implicit-def: $vgpr4
; %bb.16:                               ; %Flow309
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_18
; %bb.17:
	v_cmp_gt_i32_e32 vcc_lo, s8, v2
	s_add_i32 s1, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e32 v5, s1, v2, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s9, v4
	s_add_i32 s1, s9, -1
	v_cndmask_b32_e32 v8, s1, v4, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e32 v4, 0, v5, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, -5, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, 0, v8, vcc_lo
	v_mad_u64_u32 v[8:9], null, v5, s8, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v8
	v_add_co_u32 v4, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_u8 v4, v[4:5], off
	v_mad_u32_u24 v5, 0xa4, v1, v6
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v4, v4
	ds_store_b32 v5, v4 offset:688
.LBB0_18:
	s_or_b32 exec_lo, exec_lo, s0
	v_mad_u64_u32 v[4:5], null, v3, s8, v[2:3]
	v_mul_lo_u32 v7, 0xa4, v7
	v_cmp_gt_i32_e64 s0, s9, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_co_u32 v8, vcc_lo, s4, v4
	v_lshl_add_u32 v0, v0, 2, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v5, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s8, v2
	global_load_u8 v8, v[8:9], off
	s_and_b32 s0, vcc_lo, s0
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v2, v8
	ds_store_b32 v0, v2 offset:16
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_24
; %bb.19:                               ; %.preheader158
	v_mad_u32_u24 v2, 0xa4, v1, v6
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s0, 0
	ds_load_b32 v3, v2
.LBB0_20:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_21 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v2
	s_add_i32 s2, s0, -4
	s_mov_b32 s1, -4
	s_mul_i32 s2, s2, s2
.LBB0_21:                               ;   Parent Loop BB0_20 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v7, v6
	s_mul_i32 s3, s1, s1
	v_add_nc_u32_e32 v6, 4, v6
	s_add_i32 s3, s3, s2
	s_add_i32 s1, s1, 1
	s_mul_hi_i32 s3, s3, 0x97247453
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s4, s3, 31
	s_ashr_i32 s3, s3, 11
	s_add_i32 s3, s3, s4
	s_cmp_eq_u32 s1, 5
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v8, v7, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v8, v8
	v_div_scale_f32 v9, null, 0xc59c4000, 0xc59c4000, v8
	v_div_scale_f32 v12, vcc_lo, v8, 0xc59c4000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v10
	v_fma_f32 v13, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v10
	v_fma_f32 v9, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v10, v11
	v_div_fixup_f32 v8, v9, 0xc59c4000, v8
	v_cvt_f32_i32_e32 v9, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f32_e32 v8, v8
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v8, v8
	v_mul_f32_e32 v13, 0x3fb8aa3b, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v15, v13
	v_mul_f32_e32 v10, 0x3fb8aa3b, v9
	v_fma_f32 v14, 0x3fb8aa3b, v8, -v13
	v_fma_f32 v11, 0x3fb8aa3b, v9, -v10
	v_rndne_f32_e32 v12, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v14, 0x32a5705f, v8 :: v_dual_fmac_f32 v11, 0x32a5705f, v9
	v_sub_f32_e32 v10, v10, v12
	v_cvt_i32_f32_e32 v12, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v11
	v_sub_f32_e32 v11, v13, v15
	v_add_f32_e32 v11, v11, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v10, v10
	v_exp_f32_e32 v11, v11
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v10, v12
	v_cvt_i32_f32_e32 v12, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, 0, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	v_ldexp_f32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, 0x7f800000, v10, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v8
	v_mul_f32_e32 v7, v9, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, 0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v8
	v_cndmask_b32_e32 v8, 0x7f800000, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, v7, v8
	v_fmac_f32_e32 v1, v9, v8
	s_cbranch_scc0 .LBB0_21
; %bb.22:                               ;   in Loop: Header=BB0_20 Depth=1
	v_add_nc_u32_e32 v2, 0xa4, v2
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 9
	s_cbranch_scc0 .LBB0_20
; %bb.23:
	v_div_scale_f32 v2, null, v1, v1, v0
	v_div_scale_f32 v7, vcc_lo, v0, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v7, v3
	v_fma_f32 v8, -v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v3
	v_fma_f32 v2, -v2, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v6
	v_div_fixup_f32 v0, v2, v1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v0
	v_add_co_u32 v0, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB0_24:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel bilateral_filter_sm
		.amdhsa_group_segment_fixed_size 6724
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	bilateral_filter_sm, .Lfunc_end0-bilateral_filter_sm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2236
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 6724 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	bilateral_filter_2d     ; -- Begin function bilateral_filter_2d
	.globl	bilateral_filter_2d
	.p2align	8
	.type	bilateral_filter_2d,@function
bilateral_filter_2d:                    ; @bilateral_filter_2d
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[5:6]
	v_cmp_gt_i32_e32 vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s9, v3
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_6
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, v3, s8, v[0:1]
	s_add_i32 s1, s9, 3
	s_mov_b32 s2, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	global_load_u8 v6, v[4:5], off
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	v_add_nc_u32_e32 v7, s2, v3
	s_not_b32 s3, s2
	s_mul_i32 s10, s2, s2
	s_add_i32 s3, s3, s8
	s_mov_b32 s11, s1
	v_sub_nc_u32_e32 v8, 0, v7
	s_mov_b32 s12, -4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v7, v7, v8
	v_cmp_gt_i32_e64 s0, s9, v7
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v8, s12, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v11, s11, v7, s0
	s_mul_i32 s13, s12, s12
	s_add_i32 s12, s12, 1
	s_add_i32 s13, s13, s10
	v_sub_nc_u32_e32 v9, 0, v8
	s_mul_hi_i32 s13, s13, 0x97247453
	s_add_i32 s11, s11, -1
	s_lshr_b32 s14, s13, 31
	s_ashr_i32 s13, s13, 11
	v_max_i32_e32 v8, v8, v9
	s_add_i32 s13, s13, s14
	s_cmp_eq_u32 s12, 5
	v_cvt_f32_i32_e32 v12, s13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s8, v8
	v_cndmask_b32_e32 v8, s3, v8, vcc_lo
	v_mad_u64_u32 v[9:10], null, v11, s8, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v9
	v_add_co_u32 v8, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v10, vcc_lo
	global_load_u8 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v9, v8, v6
	v_cvt_f32_ubyte0_e32 v8, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v9, v9
	v_mul_f32_e32 v9, v9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v10, null, 0xc59c4000, 0xc59c4000, v9
	v_div_scale_f32 v13, vcc_lo, v9, 0xc59c4000, v9
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v10, v11, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v14, v11
	v_mul_f32_e32 v14, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v10, v14, v13
	v_fmac_f32_e32 v14, v15, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v10, v14, v13
	v_div_fmas_f32 v10, v10, v11, v14
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v9, v10, 0xc59c4000, v9
	v_cvt_i32_f32_e32 v9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v9, v9
	v_mul_f32_e32 v14, 0x3fb8aa3b, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v15, 0x3fb8aa3b, v9, -v14
	v_rndne_f32_e32 v16, v14
	v_fmac_f32_e32 v15, 0x32a5705f, v9
	v_mul_f32_e32 v10, 0x3fb8aa3b, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v11, 0x3fb8aa3b, v12, -v10
	v_rndne_f32_e32 v13, v10
	v_dual_fmac_f32 v11, 0x32a5705f, v12 :: v_dual_sub_f32 v10, v10, v13
	v_cvt_i32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v11
	v_exp_f32_e32 v10, v10
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v10, v13
	v_sub_f32_e32 v11, v14, v16
	v_cvt_i32_f32_e32 v13, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v10, 0, v10 :: v_dual_add_f32 v11, v11, v15
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v12
	v_exp_f32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, 0x7f800000, v10, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v9
	v_mul_f32_e32 v8, v10, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v11, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v11, 0, v11, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v9
	v_cndmask_b32_e32 v9, 0x7f800000, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v4, v8, v9
	v_fmac_f32_e32 v5, v10, v9
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, 5
	s_cbranch_scc0 .LBB1_2
; %bb.5:
	v_div_scale_f32 v0, null, v5, v5, v4
	v_div_scale_f32 v7, vcc_lo, v4, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v0, v3, 1.0
	v_fmac_f32_e32 v3, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v7, v3
	v_fma_f32 v8, -v0, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v8, v3
	v_fma_f32 v0, -v0, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v0, v0, v3, v6
	v_div_fixup_f32 v0, v0, v5, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v3, v0
	v_add_co_u32 v0, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v2, vcc_lo
	global_store_b8 v[0:1], v3, off
.LBB1_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel bilateral_filter_2d
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	bilateral_filter_2d, .Lfunc_end1-bilateral_filter_2d
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 840
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	bilateral_filter_2d_unoptimized ; -- Begin function bilateral_filter_2d_unoptimized
	.globl	bilateral_filter_2d_unoptimized
	.p2align	8
	.type	bilateral_filter_2d_unoptimized,@function
bilateral_filter_2d_unoptimized:        ; @bilateral_filter_2d_unoptimized
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s9, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_10
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[0:1], null, v2, s8, v[4:5]
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v1, -4, v4
	v_add_nc_u32_e32 v5, -4, v2
	v_mov_b32_e32 v7, 0
	s_mov_b32 s2, -4
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v0
	v_mad_u64_u32 v[3:4], null, s8, v5, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v6, vcc_lo
.LBB2_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_3 Depth 2
	v_add_nc_u32_e32 v9, s2, v2
	s_mul_i32 s10, s2, s2
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e64 s0, -1, v9
	v_cmp_gt_i32_e64 s1, s9, v9
	v_add_nc_u32_e32 v9, s3, v3
.LBB2_3:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v10, s11, v1
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 -1, v10
	s_cbranch_execz .LBB2_7
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=2
	v_cmp_gt_i32_e32 vcc_lo, s8, v10
	s_and_b32 s13, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s14, s13, s1
	s_and_saveexec_b32 s13, s14
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_3 Depth=2
	v_add_nc_u32_e32 v10, s11, v9
	s_add_i32 s14, s11, -4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s14, s14, s14
	s_add_i32 s14, s14, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_mul_hi_i32 s14, s14, 0x97247453
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	s_lshr_b32 s15, s14, 31
	s_ashr_i32 s14, s14, 11
	s_clause 0x1
	global_load_u8 v10, v[10:11], off
	global_load_u8 v11, v[4:5], off
	s_add_i32 s14, s14, s15
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v11, v10, v11
	v_cvt_f32_ubyte0_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v11, v11
	v_mul_f32_e32 v11, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v12, null, 0xc59c4000, 0xc59c4000, v11
	v_div_scale_f32 v15, vcc_lo, v11, 0xc59c4000, v11
	v_rcp_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v14, -v12, v13, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v14, v13
	v_mul_f32_e32 v14, v15, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v12, v14, v15
	v_fmac_f32_e32 v14, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, -v12, v14, v15
	v_div_fmas_f32 v12, v12, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v11, v12, 0xc59c4000, v11
	v_cvt_f32_i32_e32 v12, s14
	v_cvt_i32_f32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v13, 0x3fb8aa3b, v12
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v12
	v_cvt_f32_i32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v14, 0x3fb8aa3b, v12, -v13
	v_rndne_f32_e32 v15, v13
	v_mul_f32_e32 v16, 0x3fb8aa3b, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v13, v13, v15
	v_cvt_i32_f32_e32 v15, v15
	v_fma_f32 v17, 0x3fb8aa3b, v11, -v16
	v_fmac_f32_e32 v14, 0x32a5705f, v12
	v_rndne_f32_e32 v18, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, 0x32a5705f, v11
	v_add_f32_e32 v13, v13, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v16, v18
	v_add_f32_e32 v14, v14, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v13, v13
	v_exp_f32_e32 v14, v14
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v13, v13, v15
	v_cvt_i32_f32_e32 v15, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v13, 0, v13, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v12
	v_ldexp_f32 v14, v14, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v12, 0x7f800000, v13, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v11
	v_cndmask_b32_e32 v13, 0, v14, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v10, v12, v10 :: v_dual_cndmask_b32 v11, 0x7f800000, v13
	v_fmac_f32_e32 v7, v10, v11
	v_fmac_f32_e32 v8, v12, v11
.LBB2_6:                                ; %Flow
                                        ;   in Loop: Header=BB2_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_7:                                ;   in Loop: Header=BB2_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s11, s11, 1
	s_cmp_eq_u32 s11, 9
	s_cbranch_scc0 .LBB2_3
; %bb.8:                                ;   in Loop: Header=BB2_2 Depth=1
	s_add_i32 s2, s2, 1
	s_add_i32 s3, s3, s8
	s_cmp_eq_u32 s2, 5
	s_cbranch_scc0 .LBB2_2
; %bb.9:
	v_div_scale_f32 v1, null, v8, v8, v7
	v_div_scale_f32 v4, vcc_lo, v7, v8, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v3, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v4, v2
	v_fma_f32 v5, -v1, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v5, v2
	v_fma_f32 v1, -v1, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v1, v1, v2, v3
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_div_fixup_f32 v1, v1, v8, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v2, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v6, vcc_lo
	global_store_b8 v[0:1], v2, off
.LBB2_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel bilateral_filter_2d_unoptimized
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	bilateral_filter_2d_unoptimized, .Lfunc_end2-bilateral_filter_2d_unoptimized
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 872
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 6724
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           bilateral_filter_sm
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         bilateral_filter_sm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           bilateral_filter_2d
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         bilateral_filter_2d.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           bilateral_filter_2d_unoptimized
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         bilateral_filter_2d_unoptimized.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
