#include <stdio.h>
#include <cuda_runtime.h>

#define num_threads 256
#define N (1<<20)
void fillArray(float* arr)
{
    //Seed rand()
    srand(42);
    for (int i = 0; i < N/2; i++)
    {
        arr[i] = rand() % 10;
    }
 ///Negatives
    for (int i = N/2; i < N; i++)
    {
        arr[i] = -1*(rand() % 10);
    }
}

void printArray(float* arr)
{
    for (int i = 0; i < N; i++)
        printf("%f ", arr[i]);
    printf("\n");
}

void seq_VecAdd(float* arr_in, float* ans)
{
    float total = 0;
    for (int i = 0; i < N; i++)
    {
        total += arr_in[i];
    }
    *ans = total;
}


__global__ void share_VecAdd(float* arr_in, float* arr_out)
{
    __shared__ float sVec[num_threads];
 
    unsigned int i = threadIdx.x + blockIdx.x*blockDim.x;
    
    //Loading shared memory
    if (i < N)
    {
    sVec[threadIdx.x] = arr_in[i];
    }
    __syncthreads();
    
    //reduction in shared mem
    for(unsigned int j = blockDim.x/2; j > 0; j >>= 1)
    {
        if (threadIdx.x < j)
        {
            sVec[threadIdx.x] += sVec[threadIdx.x + j];
        }
        __syncthreads();
    }
    if (threadIdx.x == 0)
    {
        atomicAdd(arr_out,sVec[threadIdx.x]);
    }
    
}

__global__ void glob_VecAdd(float* arr_in, float* arr_out)
{
    
    unsigned int i = threadIdx.x + blockIdx.x*blockDim.x;
 
    for(unsigned int j = blockDim.x/2; j > 0; j = j/2)
    {
        if (threadIdx.x < j)
        {
            arr_in[i] += arr_in[i + j];
        }
        __syncthreads();
    }
    if (threadIdx.x == 0)
    {
        atomicAdd(arr_out,arr_in[i]);
    }
    
}



void checkCUDAError(const char *msg) 
{
    cudaError_t err = cudaGetLastError();
    if( cudaSuccess != err) {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg, cudaGetErrorString( err) );
        exit(EXIT_FAILURE);
    }
}

int main (void)
{
    printf("-------------------N = %d----------------\n", N);
    float ans;
    //Declare host array
    float* arr_h;
    float* out_h;
 
    //Declare device array
    float* arr_in_d;
    float* arr_out_d;
 
    //Set amount of memory required for arrays
    const int num_bytes = N*sizeof(float);
 
    //Allocate memory for host array
    arr_h = (float*)malloc(num_bytes);
    out_h = (float*)malloc(num_bytes);

    //Allocate memory to the device
    cudaMalloc((void**)&arr_in_d, num_bytes);
    cudaMalloc((void**)&arr_out_d, num_bytes);

    //Fill host arrays with random values
    fillArray(arr_h);


//////Sequential////////
     ////Start Timing
    cudaEvent_t launch_begin, launch_end;
 
    cudaEventCreate(&launch_begin);
    cudaEventCreate(&launch_end);
 
    cudaEventRecord(launch_begin,0);
 
    //Sequential calculation for checking
    seq_VecAdd(arr_h, &ans);
 
    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);

    float seq_time = 0;
	cudaEventElapsedTime(&seq_time, launch_begin, launch_end);
    float cputp = 1e-9*N/(seq_time*1e-3); //divive by 10^9 for giga and times by 10^3 to get seconds
    printf("CPU: Run Time: %f ms\n", seq_time);
    printf("CPU: Speed Up: %fx\n", seq_time/seq_time);
    printf("CPU: Throughputs: %f GFLOP/s\n\n",cputp );
 //////////////GPU Shared///////////////////
    cudaEventCreate(&launch_begin);
    cudaEventCreate(&launch_end);
 
    int num_blocks = N/num_threads;
 
    if (N % num_threads)
        num_blocks++;
    
    cudaEventRecord(launch_begin,0);
 
    cudaMemcpy(arr_in_d, arr_h, num_bytes, cudaMemcpyHostToDevice);
    
    share_VecAdd<<<num_blocks,num_threads>>>(arr_in_d, arr_out_d );

    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);
    
    float share_time = 0;
	cudaEventElapsedTime(&share_time, launch_begin, launch_end);
 
    cudaMemcpy(out_h, arr_out_d, num_bytes, cudaMemcpyDeviceToHost);
    checkCUDAError("share_VecAdd");

    if (out_h[0] == ans)
    {
        printf("Number of threads = %d\n\n", num_threads); 
        printf("GPU(Shared) Tile Size = %d: Run Time: %f ms\n", num_threads, share_time);
        printf("GPU(Shared) Tile Size = %d: Speed Up: %fx\n", num_threads, seq_time/share_time);
        printf("GPU(Shared) Tile Size = %d: Throughputs: %f GFLOP/s\n", num_threads, 1e-9*N/(share_time*1e-3));
        printf("GPU(Shared) Tile Size = %d: Ratio of Throughputs: %f\n\n", num_threads, 1e-9*N/(share_time*1e-3)/cputp);
    }
    else
    {
        printf("GPU Shared Failed : %f\n", out_h[0]);
    }
/////////////GPU Global/////////////////
    cudaMemset(arr_out_d, 0, num_bytes);
    
    cudaEventCreate(&launch_begin);
    cudaEventCreate(&launch_end);
 
    if (N % num_threads)
        num_blocks++;
    
    cudaEventRecord(launch_begin,0);
 
    cudaMemcpy(arr_in_d, arr_h, num_bytes, cudaMemcpyHostToDevice);
    
    glob_VecAdd<<<num_blocks,num_threads>>>(arr_in_d, arr_out_d);

    
    cudaEventRecord(launch_end,0);
    cudaEventSynchronize(launch_end);
    
    float glob_time = 0;
	cudaEventElapsedTime(&glob_time, launch_begin, launch_end);
 
    cudaMemcpy(out_h, arr_out_d, num_bytes, cudaMemcpyDeviceToHost);
    checkCUDAError("glob_VecAdd");

    if (out_h[0] == ans)
    {
        printf("GPU(Global): Run Time: %f ms\n", glob_time);
        printf("GPU(Global): Speed Up: %fx\n", seq_time/glob_time);
        printf("GPU(Global): Throughputs: %f GFLOP/s\n", 1e-9*N/(glob_time*1e-3));
        printf("GPU(Global): Ratio of Throughputs: %f\n\n", 1e-9*N/(glob_time*1e-3)/cputp);
    }
    else
    {
        printf("GPU Global Failed : %f\n", out_h[0]);
    }


    //Free host array
    free(arr_h);
    free(out_h);
 
    //Free device arrays
    cudaFree(arr_in_d);
    cudaFree(arr_out_d);


    return 0;
}
	.file	"tmpxft_002041c6_00000000-6_Vector_add.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9fillArrayPf
	.type	_Z9fillArrayPf, @function
_Z9fillArrayPf:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$10, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	movl	$42, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	call	srand@PLT
.L3:
	call	rand@PLT
	cltd
	idivl	%r12d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$524288, %rbx
	jne	.L3
	movl	$10, %r12d
.L4:
	call	rand@PLT
	cltd
	idivl	%r12d
	negl	%edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx
	jne	.L4
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9fillArrayPf, .-_Z9fillArrayPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%f "
.LC1:
	.string	"\n"
	.text
	.globl	_Z10printArrayPf
	.type	_Z10printArrayPf, @function
_Z10printArrayPf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L10:
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r12, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$1048576, %rbx
	jne	.L10
	popq	%rbx
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z10printArrayPf, .-_Z10printArrayPf
	.globl	_Z10seq_VecAddPfS_
	.type	_Z10seq_VecAddPfS_, @function
_Z10seq_VecAddPfS_:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L14:
	addss	(%rdi,%rax,4), %xmm0
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L14
	movss	%xmm0, (%rsi)
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10seq_VecAddPfS_, .-_Z10seq_VecAddPfS_
	.section	.rodata.str1.1
.LC3:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L16
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC3(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L16:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z34__device_stub__Z12share_VecAddPfS_PfS_
	.type	_Z34__device_stub__Z12share_VecAddPfS_PfS_, @function
_Z34__device_stub__Z12share_VecAddPfS_PfS_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12share_VecAddPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L19:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z34__device_stub__Z12share_VecAddPfS_PfS_, .-_Z34__device_stub__Z12share_VecAddPfS_PfS_
	.globl	_Z12share_VecAddPfS_
	.type	_Z12share_VecAddPfS_, @function
_Z12share_VecAddPfS_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12share_VecAddPfS_PfS_
	.cfi_endproc
.LFE2057:
	.size	_Z12share_VecAddPfS_, .-_Z12share_VecAddPfS_
	.globl	_Z33__device_stub__Z11glob_VecAddPfS_PfS_
	.type	_Z33__device_stub__Z11glob_VecAddPfS_PfS_, @function
_Z33__device_stub__Z11glob_VecAddPfS_PfS_:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11glob_VecAddPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L24:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z33__device_stub__Z11glob_VecAddPfS_PfS_, .-_Z33__device_stub__Z11glob_VecAddPfS_PfS_
	.globl	_Z11glob_VecAddPfS_
	.type	_Z11glob_VecAddPfS_, @function
_Z11glob_VecAddPfS_:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z11glob_VecAddPfS_PfS_
	.cfi_endproc
.LFE2059:
	.size	_Z11glob_VecAddPfS_, .-_Z11glob_VecAddPfS_
	.section	.rodata.str1.1
.LC4:
	.string	"-------------------N = %d----------------\n"
.LC7:
	.string	"CPU: Run Time: %f ms\n"
.LC8:
	.string	"CPU: Speed Up: %fx\n"
.LC9:
	.string	"CPU: Throughputs: %f GFLOP/s\n\n"
.LC10:
	.string	"share_VecAdd"
.LC11:
	.string	"Number of threads = %d\n\n"
.LC12:
	.string	"GPU(Shared) Tile Size = %d: Run Time: %f ms\n"
.LC13:
	.string	"GPU(Shared) Tile Size = %d: Speed Up: %fx\n"
.LC14:
	.string	"GPU(Shared) Tile Size = %d: Throughputs: %f GFLOP/s\n"
.LC15:
	.string	"GPU(Shared) Tile Size = %d: Ratio of Throughputs: %f\n\n"
.LC16:
	.string	"GPU Shared Failed : %f\n"
.LC17:
	.string	"glob_VecAdd"
.LC18:
	.string	"GPU(Global): Run Time: %f ms\n"
.LC19:
	.string	"GPU(Global): Speed Up: %fx\n"
.LC20:
	.string	"GPU(Global): Throughputs: %f GFLOP/s\n"
.LC21:
	.string	"GPU(Global): Ratio of Throughputs: %f\n\n"
.LC22:
	.string	"GPU Global Failed : %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$1048576, %edx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %r13
	leaq	56(%rsp), %r12
	call	__printf_chk@PLT
	movl	$4194304, %edi
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	$4194304, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%rbp, %rdi
	call	_Z9fillArrayPf
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	20(%rsp), %rsi
	movq	%rbp, %rdi
	call	_Z10seq_VecAddPfS_
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	24(%rsp), %rdi
	movl	$0x00000000, 24(%rsp)
	call	cudaEventElapsedTime@PLT
	movsd	.LC5(%rip), %xmm2
	movb	$1, %al
	cvtss2sd	24(%rsp), %xmm0
	movsd	.LC6(%rip), %xmm1
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	mulsd	%xmm0, %xmm2
	divsd	%xmm2, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, (%rsp)
	call	__printf_chk@PLT
	movss	24(%rsp), %xmm0
	leaq	.LC8(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	divss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movss	(%rsp), %xmm1
	movl	$2, %edi
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	cvtss2sd	%xmm1, %xmm3
	movaps	%xmm3, %xmm0
	movsd	%xmm3, (%rsp)
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1048577, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$12, %rdi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z34__device_stub__Z12share_VecAddPfS_PfS_
.L30:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	28(%rsp), %rdi
	movl	$0x00000000, 28(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movss	20(%rsp), %xmm4
	movss	(%rbx), %xmm0
	ucomiss	%xmm4, %xmm0
	movss	%xmm4, 12(%rsp)
	jp	.L31
	jne	.L31
	movl	$256, %edx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$256, %edx
	leaq	.LC12(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtss2sd	28(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$256, %edx
	leaq	.LC13(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	movss	24(%rsp), %xmm0
	divss	28(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	28(%rsp), %xmm0
	movb	$1, %al
	movsd	.LC6(%rip), %xmm1
	mulsd	.LC5(%rip), %xmm0
	movl	$256, %edx
	movl	$2, %edi
	leaq	.LC14(%rip), %rsi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	28(%rsp), %xmm1
	movb	$1, %al
	movsd	.LC6(%rip), %xmm0
	mulsd	.LC5(%rip), %xmm1
	movl	$256, %edx
	movl	$2, %edi
	leaq	.LC15(%rip), %rsi
	divsd	%xmm1, %xmm0
	divsd	(%rsp), %xmm0
	call	__printf_chk@PLT
	jmp	.L33
.L31:
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
.L33:
	movq	40(%rsp), %rdi
	movl	$4194304, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	%r12, %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1048577, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$12, %rdi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z33__device_stub__Z11glob_VecAddPfS_PfS_
.L34:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	movl	$0x00000000, 76(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	leaq	.LC17(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movss	(%rbx), %xmm0
	movss	12(%rsp), %xmm7
	ucomiss	%xmm0, %xmm7
	jp	.L35
	jne	.L35
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	24(%rsp), %xmm0
	divss	76(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	76(%rsp), %xmm0
	movl	$2, %edi
	movb	$1, %al
	mulsd	.LC5(%rip), %xmm0
	movsd	.LC6(%rip), %xmm1
	leaq	.LC20(%rip), %rsi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	__printf_chk@PLT
	cvtss2sd	76(%rsp), %xmm1
	mulsd	.LC5(%rip), %xmm1
	movsd	.LC6(%rip), %xmm0
	leaq	.LC21(%rip), %rsi
	divsd	%xmm1, %xmm0
	divsd	(%rsp), %xmm0
	jmp	.L42
.L35:
	leaq	.LC22(%rip), %rsi
	cvtss2sd	%xmm0, %xmm0
.L42:
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC23:
	.string	"_Z11glob_VecAddPfS_"
.LC24:
	.string	"_Z12share_VecAddPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11glob_VecAddPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12share_VecAddPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	-755914244
	.long	1062232653
	.align 8
.LC6:
	.long	-400107883
	.long	1062284811
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

#define num_threads 256
#define N (1<<20)
void fillArray(float* arr)
{
    //Seed rand()
    srand(42);
    for (int i = 0; i < N/2; i++)
    {
        arr[i] = rand() % 10;
    }
 ///Negatives
    for (int i = N/2; i < N; i++)
    {
        arr[i] = -1*(rand() % 10);
    }
}

void printArray(float* arr)
{
    for (int i = 0; i < N; i++)
        printf("%f ", arr[i]);
    printf("\n");
}

void seq_VecAdd(float* arr_in, float* ans)
{
    float total = 0;
    for (int i = 0; i < N; i++)
    {
        total += arr_in[i];
    }
    *ans = total;
}


__global__ void share_VecAdd(float* arr_in, float* arr_out)
{
    __shared__ float sVec[num_threads];
 
    unsigned int i = threadIdx.x + blockIdx.x*blockDim.x;
    
    //Loading shared memory
    if (i < N)
    {
    sVec[threadIdx.x] = arr_in[i];
    }
    __syncthreads();
    
    //reduction in shared mem
    for(unsigned int j = blockDim.x/2; j > 0; j >>= 1)
    {
        if (threadIdx.x < j)
        {
            sVec[threadIdx.x] += sVec[threadIdx.x + j];
        }
        __syncthreads();
    }
    if (threadIdx.x == 0)
    {
        atomicAdd(arr_out,sVec[threadIdx.x]);
    }
    
}

__global__ void glob_VecAdd(float* arr_in, float* arr_out)
{
    
    unsigned int i = threadIdx.x + blockIdx.x*blockDim.x;
 
    for(unsigned int j = blockDim.x/2; j > 0; j = j/2)
    {
        if (threadIdx.x < j)
        {
            arr_in[i] += arr_in[i + j];
        }
        __syncthreads();
    }
    if (threadIdx.x == 0)
    {
        atomicAdd(arr_out,arr_in[i]);
    }
    
}



void checkCUDAError(const char *msg) 
{
    hipError_t err = hipGetLastError();
    if( hipSuccess != err) {
        fprintf(stderr, "Cuda error: %s: %s.\n", msg, hipGetErrorString( err) );
        exit(EXIT_FAILURE);
    }
}

int main (void)
{
    printf("-------------------N = %d----------------\n", N);
    float ans;
    //Declare host array
    float* arr_h;
    float* out_h;
 
    //Declare device array
    float* arr_in_d;
    float* arr_out_d;
 
    //Set amount of memory required for arrays
    const int num_bytes = N*sizeof(float);
 
    //Allocate memory for host array
    arr_h = (float*)malloc(num_bytes);
    out_h = (float*)malloc(num_bytes);

    //Allocate memory to the device
    hipMalloc((void**)&arr_in_d, num_bytes);
    hipMalloc((void**)&arr_out_d, num_bytes);

    //Fill host arrays with random values
    fillArray(arr_h);


//////Sequential////////
     ////Start Timing
    hipEvent_t launch_begin, launch_end;
 
    hipEventCreate(&launch_begin);
    hipEventCreate(&launch_end);
 
    hipEventRecord(launch_begin,0);
 
    //Sequential calculation for checking
    seq_VecAdd(arr_h, &ans);
 
    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);

    float seq_time = 0;
	hipEventElapsedTime(&seq_time, launch_begin, launch_end);
    float cputp = 1e-9*N/(seq_time*1e-3); //divive by 10^9 for giga and times by 10^3 to get seconds
    printf("CPU: Run Time: %f ms\n", seq_time);
    printf("CPU: Speed Up: %fx\n", seq_time/seq_time);
    printf("CPU: Throughputs: %f GFLOP/s\n\n",cputp );
 //////////////GPU Shared///////////////////
    hipEventCreate(&launch_begin);
    hipEventCreate(&launch_end);
 
    int num_blocks = N/num_threads;
 
    if (N % num_threads)
        num_blocks++;
    
    hipEventRecord(launch_begin,0);
 
    hipMemcpy(arr_in_d, arr_h, num_bytes, hipMemcpyHostToDevice);
    
    share_VecAdd<<<num_blocks,num_threads>>>(arr_in_d, arr_out_d );

    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);
    
    float share_time = 0;
	hipEventElapsedTime(&share_time, launch_begin, launch_end);
 
    hipMemcpy(out_h, arr_out_d, num_bytes, hipMemcpyDeviceToHost);
    checkCUDAError("share_VecAdd");

    if (out_h[0] == ans)
    {
        printf("Number of threads = %d\n\n", num_threads); 
        printf("GPU(Shared) Tile Size = %d: Run Time: %f ms\n", num_threads, share_time);
        printf("GPU(Shared) Tile Size = %d: Speed Up: %fx\n", num_threads, seq_time/share_time);
        printf("GPU(Shared) Tile Size = %d: Throughputs: %f GFLOP/s\n", num_threads, 1e-9*N/(share_time*1e-3));
        printf("GPU(Shared) Tile Size = %d: Ratio of Throughputs: %f\n\n", num_threads, 1e-9*N/(share_time*1e-3)/cputp);
    }
    else
    {
        printf("GPU Shared Failed : %f\n", out_h[0]);
    }
/////////////GPU Global/////////////////
    hipMemset(arr_out_d, 0, num_bytes);
    
    hipEventCreate(&launch_begin);
    hipEventCreate(&launch_end);
 
    if (N % num_threads)
        num_blocks++;
    
    hipEventRecord(launch_begin,0);
 
    hipMemcpy(arr_in_d, arr_h, num_bytes, hipMemcpyHostToDevice);
    
    glob_VecAdd<<<num_blocks,num_threads>>>(arr_in_d, arr_out_d);

    
    hipEventRecord(launch_end,0);
    hipEventSynchronize(launch_end);
    
    float glob_time = 0;
	hipEventElapsedTime(&glob_time, launch_begin, launch_end);
 
    hipMemcpy(out_h, arr_out_d, num_bytes, hipMemcpyDeviceToHost);
    checkCUDAError("glob_VecAdd");

    if (out_h[0] == ans)
    {
        printf("GPU(Global): Run Time: %f ms\n", glob_time);
        printf("GPU(Global): Speed Up: %fx\n", seq_time/glob_time);
        printf("GPU(Global): Throughputs: %f GFLOP/s\n", 1e-9*N/(glob_time*1e-3));
        printf("GPU(Global): Ratio of Throughputs: %f\n\n", 1e-9*N/(glob_time*1e-3)/cputp);
    }
    else
    {
        printf("GPU Global Failed : %f\n", out_h[0]);
    }


    //Free host array
    free(arr_h);
    free(out_h);
 
    //Free device arrays
    hipFree(arr_in_d);
    hipFree(arr_out_d);


    return 0;
}
	.text
	.file	"Vector_add.hip"
	.globl	_Z9fillArrayPf                  # -- Begin function _Z9fillArrayPf
	.type	_Z9fillArrayPf,@function
_Z9fillArrayPf:                         # @_Z9fillArrayPf
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	$42, %edi
	callq	srand
	xorl	%r14d, %r14d
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$524288, %r14                   # imm = 0x80000
	jne	.LBB0_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB0_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%eax, %ecx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	movss	%xmm0, 2097152(%rbx,%r14,4)
	incq	%r14
	cmpq	$524288, %r14                   # imm = 0x80000
	jne	.LBB0_3
# %bb.4:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z9fillArrayPf, .Lfunc_end0-_Z9fillArrayPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printArrayPf                # -- Begin function _Z10printArrayPf
	.type	_Z10printArrayPf,@function
_Z10printArrayPf:                       # @_Z10printArrayPf
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r14,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r14
	cmpq	$1048576, %r14                  # imm = 0x100000
	jne	.LBB1_1
# %bb.2:
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end1:
	.size	_Z10printArrayPf, .Lfunc_end1-_Z10printArrayPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z10seq_VecAddPfS_              # -- Begin function _Z10seq_VecAddPfS_
	.type	_Z10seq_VecAddPfS_,@function
_Z10seq_VecAddPfS_:                     # @_Z10seq_VecAddPfS_
	.cfi_startproc
# %bb.0:
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	addss	(%rdi,%rax,4), %xmm0
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB2_1
# %bb.2:
	movss	%xmm0, (%rsi)
	retq
.Lfunc_end2:
	.size	_Z10seq_VecAddPfS_, .Lfunc_end2-_Z10seq_VecAddPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__share_VecAddPfS_ # -- Begin function _Z27__device_stub__share_VecAddPfS_
	.type	_Z27__device_stub__share_VecAddPfS_,@function
_Z27__device_stub__share_VecAddPfS_:    # @_Z27__device_stub__share_VecAddPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12share_VecAddPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__share_VecAddPfS_, .Lfunc_end3-_Z27__device_stub__share_VecAddPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__glob_VecAddPfS_ # -- Begin function _Z26__device_stub__glob_VecAddPfS_
	.type	_Z26__device_stub__glob_VecAddPfS_,@function
_Z26__device_stub__glob_VecAddPfS_:     # @_Z26__device_stub__glob_VecAddPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11glob_VecAddPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z26__device_stub__glob_VecAddPfS_, .Lfunc_end4-_Z26__device_stub__glob_VecAddPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB5_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end5-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI6_0:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
.LCPI6_1:
	.quad	0x3f512e0be826d695              # double 0.0010485760000000001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%r12d, %r12d
	movl	$.L.str.3, %edi
	movl	$1048576, %esi                  # imm = 0x100000
	xorl	%eax, %eax
	callq	printf
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	%rbx, %rdi
	callq	_Z9fillArrayPf
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	xorps	%xmm0, %xmm0
.LBB6_1:                                # =>This Inner Loop Header: Depth=1
	addss	(%rbx,%r12,4), %xmm0
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB6_1
# %bb.2:                                # %_Z10seq_VecAddPfS_.exit
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movabsq	$4294967552, %r15               # imm = 0x100000100
	leaq	8(%rsp), %r12
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r12), %rdi
	callq	hipEventSynchronize
	leaq	36(%rsp), %rbp
	movl	$0, (%rbp)
	leaq	48(%rsp), %r13
	movq	(%r13), %rsi
	movq	(%r12), %rdx
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp), %xmm0
	movsd	.LCPI6_0(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	.LCPI6_1(%rip), %xmm2           # xmm2 = mem[0],zero
	divsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	movss	%xmm1, 40(%rsp)                 # 4-byte Spill
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movss	(%rbp), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	40(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$.L.str.6, %edi
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movb	$1, %al
	callq	printf
	movq	%r13, %rdi
	callq	hipEventCreate
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	3840(%r15), %r12
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z27__device_stub__share_VecAddPfS_
.LBB6_4:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	4(%rsp), %rdi
	movl	$0, (%rdi)
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	callq	_Z14checkCUDAErrorPKc
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	jne	.LBB6_6
	jp	.LBB6_6
# %bb.5:
	movl	$.L.str.8, %edi
	movl	$256, %esi                      # imm = 0x100
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0
	movl	$.L.str.9, %edi
	movl	$256, %esi                      # imm = 0x100
	movb	$1, %al
	callq	printf
	movss	36(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.10, %edi
	movl	$256, %esi                      # imm = 0x100
	movb	$1, %al
	callq	printf
	cvtss2sd	4(%rsp), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.11, %edi
	movl	$256, %esi                      # imm = 0x100
	movb	$1, %al
	callq	printf
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	divsd	40(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.12, %edi
	movl	$256, %esi                      # imm = 0x100
	movb	$1, %al
	callq	printf
	jmp	.LBB6_7
.LBB6_6:
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.13, %edi
	movb	$1, %al
	callq	printf
.LBB6_7:
	movq	16(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	xorl	%esi, %esi
	callq	hipMemset
	leaq	48(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_9
# %bb.8:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z26__device_stub__glob_VecAddPfS_
.LBB6_9:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	%rsp, %rdi
	movl	$0, (%rdi)
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	hipEventElapsedTime
	movq	16(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.14, %edi
	callq	_Z14checkCUDAErrorPKc
	movss	(%r14), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	jne	.LBB6_11
	jp	.LBB6_11
# %bb.10:
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0
	movl	$.L.str.15, %edi
	movb	$1, %al
	callq	printf
	movss	36(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.16, %edi
	movb	$1, %al
	callq	printf
	cvtss2sd	(%rsp), %xmm1
	mulsd	.LCPI6_0(%rip), %xmm1
	movsd	.LCPI6_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$.L.str.17, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0
	mulsd	.LCPI6_0(%rip), %xmm0
	movsd	.LCPI6_1(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	divsd	40(%rsp), %xmm1                 # 8-byte Folded Reload
	movapd	%xmm1, %xmm0
	movl	$.L.str.18, %edi
	jmp	.LBB6_12
.LBB6_11:
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.19, %edi
.LBB6_12:
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12share_VecAddPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11glob_VecAddPfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f "
	.size	.L.str, 4

	.type	_Z12share_VecAddPfS_,@object    # @_Z12share_VecAddPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z12share_VecAddPfS_
	.p2align	3, 0x0
_Z12share_VecAddPfS_:
	.quad	_Z27__device_stub__share_VecAddPfS_
	.size	_Z12share_VecAddPfS_, 8

	.type	_Z11glob_VecAddPfS_,@object     # @_Z11glob_VecAddPfS_
	.globl	_Z11glob_VecAddPfS_
	.p2align	3, 0x0
_Z11glob_VecAddPfS_:
	.quad	_Z26__device_stub__glob_VecAddPfS_
	.size	_Z11glob_VecAddPfS_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str.2, 21

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"-------------------N = %d----------------\n"
	.size	.L.str.3, 43

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU: Run Time: %f ms\n"
	.size	.L.str.4, 22

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CPU: Speed Up: %fx\n"
	.size	.L.str.5, 20

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CPU: Throughputs: %f GFLOP/s\n\n"
	.size	.L.str.6, 31

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"share_VecAdd"
	.size	.L.str.7, 13

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Number of threads = %d\n\n"
	.size	.L.str.8, 25

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"GPU(Shared) Tile Size = %d: Run Time: %f ms\n"
	.size	.L.str.9, 45

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"GPU(Shared) Tile Size = %d: Speed Up: %fx\n"
	.size	.L.str.10, 43

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"GPU(Shared) Tile Size = %d: Throughputs: %f GFLOP/s\n"
	.size	.L.str.11, 53

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"GPU(Shared) Tile Size = %d: Ratio of Throughputs: %f\n\n"
	.size	.L.str.12, 55

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"GPU Shared Failed : %f\n"
	.size	.L.str.13, 24

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"glob_VecAdd"
	.size	.L.str.14, 12

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"GPU(Global): Run Time: %f ms\n"
	.size	.L.str.15, 30

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"GPU(Global): Speed Up: %fx\n"
	.size	.L.str.16, 28

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"GPU(Global): Throughputs: %f GFLOP/s\n"
	.size	.L.str.17, 38

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"GPU(Global): Ratio of Throughputs: %f\n\n"
	.size	.L.str.18, 40

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"GPU Global Failed : %f\n"
	.size	.L.str.19, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12share_VecAddPfS_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11glob_VecAddPfS_"
	.size	.L__unnamed_2, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__share_VecAddPfS_
	.addrsig_sym _Z26__device_stub__glob_VecAddPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12share_VecAddPfS_
	.addrsig_sym _Z11glob_VecAddPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12share_VecAddPfS_    ; -- Begin function _Z12share_VecAddPfS_
	.globl	_Z12share_VecAddPfS_
	.p2align	8
	.type	_Z12share_VecAddPfS_,@function
_Z12share_VecAddPfS_:                   ; @_Z12share_VecAddPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v3, 2, v0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmpx_gt_u32_e32 0x100000, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v1
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_lt_u32 s4, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_lshr_b32 s0, s4, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v1, s0, 2, v3
	ds_load_b32 v1, v1
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v1, v1, v2
	ds_store_b32 v3, v1
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s4, 4
	s_mov_b32 s4, s0
	s_branch .LBB0_3
.LBB0_7:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.8:
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s0, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s1, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s1
	s_cbranch_execz .LBB0_11
; %bb.9:
	s_bcnt1_i32_b32 s0, s0
	s_load_b32 s1, s[2:3], 0x0
	v_cvt_f32_ubyte0_e32 v1, s0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	ds_load_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v3, v0, v1
	v_mov_b32_e32 v1, s1
.LBB0_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v3
	global_atomic_cmpswap_b32 v0, v2, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_10
.LBB0_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12share_VecAddPfS_
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12share_VecAddPfS_, .Lfunc_end0-_Z12share_VecAddPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 368
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11glob_VecAddPfS_     ; -- Begin function _Z11glob_VecAddPfS_
	.globl	_Z11glob_VecAddPfS_
	.p2align	8
	.type	_Z11glob_VecAddPfS_,@function
_Z11glob_VecAddPfS_:                    ; @_Z11glob_VecAddPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cmp_lt_u32 s4, 2
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v3
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s5, s4, 1
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[6:7], off
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v6
	global_store_b32 v[4:5], v2, off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s4, 4
	s_mov_b32 s4, s5
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_11
; %bb.6:
	v_mov_b32_e32 v2, 0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_bfrev_b32_e32 v2, 1
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
.LBB1_7:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s0, s4
	s_waitcnt vmcnt(0)
	v_readlane_b32 s1, v0, s0
	s_lshl_b32 s0, 1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, s0
	s_cmp_lg_u32 s4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s1, v2
	s_cbranch_scc1 .LBB1_7
; %bb.8:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB1_11
; %bb.9:
	v_mov_b32_e32 v3, 0
	global_load_b32 v1, v3, s[2:3]
.LBB1_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_10
.LBB1_11:                               ; %Flow21
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11glob_VecAddPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11glob_VecAddPfS_, .Lfunc_end1-_Z11glob_VecAddPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12share_VecAddPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12share_VecAddPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11glob_VecAddPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11glob_VecAddPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
