#include <iostream>

#define DATA_ELEM   75
#define DB_ELEM     20
#define DB_SIZE    100

using namespace std;

struct Data {
	unsigned int d1;
	unsigned int d2;
};

union Item {
    Data data;
    unsigned long long int raw;
};

// TODO, changes only in kernel_write
// database has empty(0) and non-empty(!=0) positions, around DB_ELEM/DB_SIZE occupied
// change the kernel so each thread writes dataToAdd in an empty spot in database
// reordoring of data is permitted
// (0 1 0 1 0 ) => (t1:2, t2:3) => (2 1 1 3 0)
__global__ void kernel_write(unsigned long long int *data,
                             unsigned long long int *database,
                             int dbElemNum) {
    	int idx = blockIdx.x * blockDim.x + threadIdx.x;
    	long long unsigned dataToAdd = data[idx];
	unsigned long long oldData;

    	if(dataToAdd == 0) {
        	return;
    	}

    	// logic using atomicExch to place elements in empty slots, no barriers
    	// TODO
	while((oldData = atomicExch(database + idx, dataToAdd))) {
		atomicExch(database + idx, oldData);
		idx = (idx + 1) % dbElemNum;
	}
}

// do not modify validateDB and main
//
void validateDB(unsigned long long int *database, int dbSize, int expNZElem) {

    	bool isValid = true;
    	int numNZElem = 0;

    	for(int i = 0; i < DB_SIZE; i++) {

        	Item item;
        	item.raw = database[i];

        	if(item.raw != 0) {
            		numNZElem++;
        	}

        	cout << item.data.d1 << "-" << item.data.d2;
        	if(item.data.d1 != item.data.d2) {
            		cout << " ERR, ";
            		isValid = false;
        	} else {
            		cout << " OK, ";
        	}
    	}

    	if (!isValid) {
        	cout << endl << "INVALID, corrupt writes" << endl;
    	} else if (expNZElem != numNZElem) {
        	cout << endl << "INVALID, expected database elements "
            	<< expNZElem << " but got " << numNZElem << endl;
    	} else {
        	cout << endl << "VALID" << endl;
    	}
}

int main(void) {

    	long long unsigned *data = 0;
    	cudaMallocManaged(&data, DATA_ELEM * sizeof(unsigned long long int));
    	if (data == 0) {
       		cout << "[HOST] Couldn't allocate memory\n";
        	return 1;
    	}

    	// data to introduce into db
    	for(int i = 0; i < DATA_ELEM; i++) {
        	Item item;
        	item.data.d1 = i + 1;
        	item.data.d2 = i + 1;
        	data[i] = item.raw;
    	}

   	long long unsigned *database = 0;
    	cudaMallocManaged(&database, DB_SIZE * sizeof(unsigned long long int));
    	if (data == 0) {
       		cout << "[HOST] Couldn't allocate memory\n";
        	return 1;
    	}

    	// current db is 25% full, 75% empty
    	for(int i = 0; i < DB_SIZE; i++) {
        	if(i % (DB_SIZE / DB_ELEM) == 0) {
            	Item item;
            	item.data.d1 = 1111;
           	item.data.d2 = 1111;
            	database[i] = item.raw;
        }
    }

    	kernel_write<<<DATA_ELEM, 1>>> (data, database, DB_SIZE);
	cudaDeviceSynchronize();

    	validateDB(database, DB_SIZE, (DB_ELEM + DATA_ELEM));

    	cudaFree(data);
    	cudaFree(database);
    	return 0;
}

	.file	"tmpxft_002f6f94_00000000-6_task3_atomic_exch.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"-"
.LC1:
	.string	" ERR, "
.LC2:
	.string	" OK, "
.LC3:
	.string	"INVALID, corrupt writes"
.LC4:
	.string	"INVALID, expected database elements "
.LC5:
	.string	" but got "
.LC6:
	.string	"VALID"
	.text
	.globl	_Z10validateDBPyii
	.type	_Z10validateDBPyii, @function
_Z10validateDBPyii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movb	$1, %r15b
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L6:
	movq	(%r14,%r12,8), %r13
	leaq	_ZSt4cout(%rip), %rdi
	cmpq	$1, %r13
	movl	%r13d, %esi
	sbbl	$-1, %ebx
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r13, %rax
	shrq	$32, %rax
	movq	%rax, 8(%rsp)
	movl	8(%rsp), %esi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	cmpl	%r13d, 8(%rsp)
	je	.L4
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%r15d, %r15d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L5
.L4:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L5:
	incq	%r12
	cmpq	$100, %r12
	jne	.L6
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	testb	%r15b, %r15b
	jne	.L7
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	jmp	.L13
.L7:
	cmpl	%ebp, %ebx
	je	.L8
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	jmp	.L14
.L8:
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
.L13:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L14:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z10validateDBPyii, .-_Z10validateDBPyii
	.globl	_Z35__device_stub__Z12kernel_writePyS_iPyS_i
	.type	_Z35__device_stub__Z12kernel_writePyS_iPyS_i, @function
_Z35__device_stub__Z12kernel_writePyS_iPyS_i:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12kernel_writePyS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L16:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z35__device_stub__Z12kernel_writePyS_iPyS_i, .-_Z35__device_stub__Z12kernel_writePyS_iPyS_i
	.globl	_Z12kernel_writePyS_i
	.type	_Z12kernel_writePyS_i, @function
_Z12kernel_writePyS_i:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12kernel_writePyS_iPyS_i
	.cfi_endproc
.LFE3662:
	.size	_Z12kernel_writePyS_i, .-_Z12kernel_writePyS_i
	.section	.rodata.str1.1
.LC7:
	.string	"[HOST] Couldn't allocate memory\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	xorl	%edx, %edx
	movl	$600, %esi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	movq	%rdx, (%rsp)
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rcx
	movl	$1, %eax
	testq	%rcx, %rcx
	jne	.L22
.L24:
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %eax
	jmp	.L21
.L22:
	movq	%rax, %rsi
	movl	%eax, %edx
	salq	$32, %rsi
	orq	%rsi, %rdx
	movq	%rdx, -8(%rcx,%rax,8)
	incq	%rax
	cmpq	$76, %rax
	jne	.L22
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$800, %esi
	movq	%rax, 8(%rsp)
	call	cudaMallocManaged@PLT
	cmpq	$0, (%rsp)
	je	.L24
	movq	8(%rsp), %rdx
	xorl	%eax, %eax
	movabsq	$4771708666967, %rcx
.L26:
	imull	$-858993459, %eax, %esi
	cmpl	$858993459, %esi
	ja	.L25
	movq	%rcx, (%rdx,%rax,8)
.L25:
	incq	%rax
	cmpq	$100, %rax
	jne	.L26
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdx
	movabsq	$4294967371, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$100, %edx
	call	_Z35__device_stub__Z12kernel_writePyS_iPyS_i
.L27:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdi
	movl	$95, %edx
	movl	$100, %esi
	call	_Z10validateDBPyii
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L21:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z12kernel_writePyS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12kernel_writePyS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>

#define DATA_ELEM   75
#define DB_ELEM     20
#define DB_SIZE    100

using namespace std;

struct Data {
	unsigned int d1;
	unsigned int d2;
};

union Item {
    Data data;
    unsigned long long int raw;
};

// TODO, changes only in kernel_write
// database has empty(0) and non-empty(!=0) positions, around DB_ELEM/DB_SIZE occupied
// change the kernel so each thread writes dataToAdd in an empty spot in database
// reordoring of data is permitted
// (0 1 0 1 0 ) => (t1:2, t2:3) => (2 1 1 3 0)
__global__ void kernel_write(unsigned long long int *data,
                             unsigned long long int *database,
                             int dbElemNum) {
    	int idx = blockIdx.x * blockDim.x + threadIdx.x;
    	long long unsigned dataToAdd = data[idx];
	unsigned long long oldData;

    	if(dataToAdd == 0) {
        	return;
    	}

    	// logic using atomicExch to place elements in empty slots, no barriers
    	// TODO
	while((oldData = atomicExch(database + idx, dataToAdd))) {
		atomicExch(database + idx, oldData);
		idx = (idx + 1) % dbElemNum;
	}
}

// do not modify validateDB and main
//
void validateDB(unsigned long long int *database, int dbSize, int expNZElem) {

    	bool isValid = true;
    	int numNZElem = 0;

    	for(int i = 0; i < DB_SIZE; i++) {

        	Item item;
        	item.raw = database[i];

        	if(item.raw != 0) {
            		numNZElem++;
        	}

        	cout << item.data.d1 << "-" << item.data.d2;
        	if(item.data.d1 != item.data.d2) {
            		cout << " ERR, ";
            		isValid = false;
        	} else {
            		cout << " OK, ";
        	}
    	}

    	if (!isValid) {
        	cout << endl << "INVALID, corrupt writes" << endl;
    	} else if (expNZElem != numNZElem) {
        	cout << endl << "INVALID, expected database elements "
            	<< expNZElem << " but got " << numNZElem << endl;
    	} else {
        	cout << endl << "VALID" << endl;
    	}
}

int main(void) {

    	long long unsigned *data = 0;
    	hipMallocManaged(&data, DATA_ELEM * sizeof(unsigned long long int));
    	if (data == 0) {
       		cout << "[HOST] Couldn't allocate memory\n";
        	return 1;
    	}

    	// data to introduce into db
    	for(int i = 0; i < DATA_ELEM; i++) {
        	Item item;
        	item.data.d1 = i + 1;
        	item.data.d2 = i + 1;
        	data[i] = item.raw;
    	}

   	long long unsigned *database = 0;
    	hipMallocManaged(&database, DB_SIZE * sizeof(unsigned long long int));
    	if (data == 0) {
       		cout << "[HOST] Couldn't allocate memory\n";
        	return 1;
    	}

    	// current db is 25% full, 75% empty
    	for(int i = 0; i < DB_SIZE; i++) {
        	if(i % (DB_SIZE / DB_ELEM) == 0) {
            	Item item;
            	item.data.d1 = 1111;
           	item.data.d2 = 1111;
            	database[i] = item.raw;
        }
    }

    	kernel_write<<<DATA_ELEM, 1>>> (data, database, DB_SIZE);
	hipDeviceSynchronize();

    	validateDB(database, DB_SIZE, (DB_ELEM + DATA_ELEM));

    	hipFree(data);
    	hipFree(database);
    	return 0;
}

	.text
	.file	"task3_atomic_exch.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__kernel_writePyS_i # -- Begin function _Z27__device_stub__kernel_writePyS_i
	.type	_Z27__device_stub__kernel_writePyS_i,@function
_Z27__device_stub__kernel_writePyS_i:   # @_Z27__device_stub__kernel_writePyS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12kernel_writePyS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__kernel_writePyS_i, .Lfunc_end0-_Z27__device_stub__kernel_writePyS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z10validateDBPyii              # -- Begin function _Z10validateDBPyii
	.type	_Z10validateDBPyii,@function
_Z10validateDBPyii:                     # @_Z10validateDBPyii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	movq	%rdi, %r14
	xorl	%r13d, %r13d
	movb	$1, %al
	movl	%eax, (%rsp)                    # 4-byte Spill
	xorl	%ebx, %ebx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movq	(%r14,%r13,8), %rbp
	movq	%rbp, %r15
	shrq	$32, %r15
	cmpq	$1, %rbp
	sbbl	$-1, %ebx
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r12
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$_ZSt4cout, %edi
	cmpl	%r15d, %ebp
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$.L.str.2, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_4
.LBB1_2:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$.L.str.1, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$0, (%rsp)                      # 4-byte Folded Spill
.LBB1_4:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r13
	cmpq	$100, %r13
	jne	.LBB1_1
# %bb.5:
	testb	$1, (%rsp)                      # 1-byte Folded Reload
	jne	.LBB1_7
# %bb.6:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$23, %edx
	movq	%rax, %rdi
	jmp	.LBB1_10
.LBB1_7:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %r14
	movl	4(%rsp), %ebp                   # 4-byte Reload
	cmpl	%ebp, %ebx
	jne	.LBB1_8
# %bb.9:
	movl	$.L.str.6, %esi
	movl	$5, %edx
	movq	%r14, %rdi
.LBB1_10:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_11
.LBB1_8:
	movl	$.L.str.4, %esi
	movl	$36, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.5, %esi
	movl	$9, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
.LBB1_11:
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end1:
	.size	_Z10validateDBPyii, .Lfunc_end1-_Z10validateDBPyii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %r14
	movq	$0, (%r14)
	movl	$1, %ebx
	movl	$600, %esi                      # imm = 0x258
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r14), %rax
	testq	%rax, %rax
	je	.LBB2_12
# %bb.1:                                # %.preheader20.preheader
	movabsq	$4294967297, %r14               # imm = 0x100000001
	xorl	%ecx, %ecx
	movq	%r14, %rdx
.LBB2_2:                                # %.preheader20
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, (%rax,%rcx,8)
	incq	%rcx
	addq	%r14, %rdx
	cmpq	$75, %rcx
	jne	.LBB2_2
# %bb.3:
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$1, %ebx
	movl	$800, %esi                      # imm = 0x320
	movl	$1, %edx
	callq	hipMallocManaged
	cmpq	$0, 16(%rsp)
	je	.LBB2_12
# %bb.4:                                # %.preheader
	movq	8(%rsp), %rax
	xorl	%ecx, %ecx
	movabsq	$4771708666967, %rdx            # imm = 0x45700000457
	xorl	%esi, %esi
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	movzbl	%sil, %edi
	imull	$205, %edi, %edi
	shrl	$10, %edi
	leal	(%rdi,%rdi,4), %edi
	addb	%cl, %dil
	jne	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_5 Depth=1
	movq	%rdx, (%rax,%rsi,8)
.LBB2_7:                                #   in Loop: Header=BB2_5 Depth=1
	incq	%rsi
	decb	%cl
	cmpq	$100, %rsi
	jne	.LBB2_5
# %bb.8:
	leaq	74(%r14), %rdi
	xorl	%ebx, %ebx
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.9:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$100, %edx
	callq	_Z27__device_stub__kernel_writePyS_i
.LBB2_10:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	movl	$95, %edx
	callq	_Z10validateDBPyii
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	jmp	.LBB2_11
.LBB2_12:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB2_11:
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12kernel_writePyS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12kernel_writePyS_i,@object   # @_Z12kernel_writePyS_i
	.section	.rodata,"a",@progbits
	.globl	_Z12kernel_writePyS_i
	.p2align	3, 0x0
_Z12kernel_writePyS_i:
	.quad	_Z27__device_stub__kernel_writePyS_i
	.size	_Z12kernel_writePyS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"-"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ERR, "
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" OK, "
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"INVALID, corrupt writes"
	.size	.L.str.3, 24

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"INVALID, expected database elements "
	.size	.L.str.4, 37

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" but got "
	.size	.L.str.5, 10

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"VALID"
	.size	.L.str.6, 6

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"[HOST] Couldn't allocate memory\n"
	.size	.L.str.7, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12kernel_writePyS_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__kernel_writePyS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12kernel_writePyS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12kernel_writePyS_i   ; -- Begin function _Z12kernel_writePyS_i
	.globl	_Z12kernel_writePyS_i
	.p2align	8
	.type	_Z12kernel_writePyS_i,@function
_Z12kernel_writePyS_i:                  ; @_Z12kernel_writePyS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[2:3]
	v_add_co_u32 v0, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_atomic_swap_b64 v[6:7], v[4:5], v[0:1], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, 0, v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s1
	s_xor_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v3, s0
	s_sub_i32 s1, 0, s0
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v3
	v_mul_lo_u32 v8, s1, v3
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v8, v3, v8
	v_add_nc_u32_e32 v8, v3, v8
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v2, 1, v2
	global_atomic_swap_b64 v[4:5], v[6:7], off
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v3
	v_xor_b32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v2, v8
	v_mul_lo_u32 v9, v9, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v9
	v_subrev_nc_u32_e32 v9, s0, v2
	v_cmp_le_u32_e32 vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	v_subrev_nc_u32_e32 v9, s0, v2
	v_cmp_le_u32_e32 vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	v_xor_b32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v3
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 3, v[2:3]
	v_add_co_u32 v4, vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v10, vcc_lo
	global_atomic_swap_b64 v[6:7], v[4:5], v[0:1], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12kernel_writePyS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12kernel_writePyS_i, .Lfunc_end0-_Z12kernel_writePyS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 400
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12kernel_writePyS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12kernel_writePyS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
