/***********************************************************************************
  This work is COMS 4824 Architecture Final Project, advised by Professor Martha Kim.
  
  "A Walk on the Hyperthreaded Side: 
       an Implementation and Analysis of Translating Virtual Addresses on a GPU"

  Copyright (c) 2017 Columbia University.
  All rights reserved.

  Created by Serena Liu and Raphael Norwitz.

  AWS EC2 instance configuration:
--Instance type: g2.2xlarge
--AMI Id: NVIDIA CUDA 7.5 Toolkit on Amazon Linux-0ce7aca3-5b96-4ff4-8396-05245687380a-ami-52420645.3 (ami-52f7b345)

CUDA examples used:
https://raw.githubusercontent.com/berkeley-scf/gpu-workshop-2016/master/kernelExample.cu

  Software Usage:
--compile: nvcc page_walk.cu -o page_walk.out
--output: ./page_walk.out -n <total addresses> <intermediate table parameters>
          (eg, ./page_walk.out -n 400 2 3 2 4)
************************************************************************************/


#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <errno.h>
#include <assert.h>
#include <sys/time.h>
#include <time.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <stdint.h>

#define BLOCK_D1 512
#define BLOCK_D2 1
#define BLOCK_D3 1
#define MAX_LEVELS 20

#define cudaCheckErrors(msg) \
	do { \
		cudaError_t __err = cudaGetLastError(); \
		if (__err != cudaSuccess) { \
			fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
					msg, cudaGetErrorString(__err), \
					__FILE__, __LINE__); \
			fprintf(stderr, "*** FAILED - ABORTING\n"); \
			exit(1); \
		} \
	} while (0)


static int max_table;

struct trans_thread {
	void **curr_table;
	unsigned long cuda_result;
	int offset[MAX_LEVELS];
	int curr;
	int max;
};

//function called by CUDA kernel
__host__ __device__ int translate_cpu(struct trans_thread *trans) {
	unsigned long *gpu_ptr = (unsigned long *) trans->curr_table;
	while(trans->curr < trans->max-1) {
		gpu_ptr = (unsigned long *) gpu_ptr[trans->offset[trans->curr]]; 
		trans->curr++;
	}
	return (int) *((int *) gpu_ptr + trans->offset[trans->curr]); 
	// ((void *) trans->curr_table + trans->offset[trans->max-1]);
}

//CPU counterpart 
int translate_cpu2(struct trans_thread *trans) {
	
	while(trans->curr < trans->max-1) {
		trans->curr_table = (void **) trans->curr_table[trans->offset[trans->curr]];
		trans->curr++;
	}
	
	return (int) *((int *) trans->curr_table + trans->offset[trans->curr]); 
	// ((void *) trans->curr_table + trans->offset[trans->max-1]);
}



// CUDA kernel: gpu_run_time<<<gridSize, blockSize>>>(d_new_threads, total_addresses);
__global__ void gpu_run_time(struct trans_thread *trans, int addresses) {
	// id of the block
	int myblock = blockIdx.x + blockIdx.y * gridDim.x;
	// size of each block (within grid of blocks)
	int blocksize = blockDim.x * blockDim.y * blockDim.z;
	// id of thread in a given block
	int subthread = threadIdx.z*(blockDim.x * blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	// assign overall id/index of the thread
	int idx = myblock * blocksize + subthread;
	
	if(idx < addresses) {		
		translate_cpu(&trans[idx]);	
	}
}


// CPU analog for speed comparison
float cpu_run_time(struct trans_thread *trans, int addresses) {
	
	for(int i = 0; i < addresses; i++) {
		translate_cpu2(&trans[i]);	
	}

	return 0;
}

/* --------------------------- host code ------------------------------*/
double read_timer() {

	struct timeval end;
	gettimeofday( &end, NULL );
	return end.tv_sec+1.e-6*end.tv_usec;
}

//sequential phase 1: construct the table 
int construct_table(void *table, int *levels, int num_levels) {
	int i, j, level_size = 1;
	void **table_ptr = (void **) table;
	unsigned long **level_ptr;

	// set intermediate addresses of table
	for(i = 0; i < num_levels-1; i++)
	{
		level_size *= levels[i];

		level_ptr = (unsigned long **) table + level_size + (((unsigned long *)table_ptr - (unsigned long *) table)/(sizeof(unsigned long *)));

		fprintf(stderr, "level_size: %d, level_ptr: %d, table_ptr: %d\n", level_size, (level_ptr- (unsigned long **) table) / sizeof(void *), (unsigned long **) table_ptr -  (unsigned long **) table);

		for(j = 0; j < level_size; j++) {
			table_ptr[j] = level_ptr + ((j)*levels[i+1]);
		}

		table_ptr += level_size;
	}
	assert((intptr_t )table_ptr - (intptr_t )table < max_table);


	// set last level of page table to garbage; 
	for(i = 0; i < level_size * levels[num_levels-1]; i++) {
		*table_ptr = (unsigned long *) i;
		table_ptr++;
	}
	assert((intptr_t )table_ptr - (intptr_t )table == max_table);
	// return number of entries at the lowest level of the page table
	return levels[num_levels-1] * level_size;
}

//sequential phase 2: generate struct trans_thread for each address
struct trans_thread *gen_addresses(int num_addr, int levels, int *level_sizes, void **pgd)
{
	int i,j;
	struct trans_thread *new_threads = (struct trans_thread *)malloc(sizeof(struct trans_thread) * num_addr);
	if (!new_threads){
		fprintf(stderr, "malloc failed: %d\n", strerror(errno));
		exit(1);
	}

	for(i = 0; i < num_addr; i++)
	{
		new_threads[i].curr_table = pgd;
		new_threads[i].max = levels;
		new_threads[i].curr = 0;

		for(j = 0; j < levels; j++) {
			new_threads[i].offset[j] =
				rand() % level_sizes[j];
		}
	}
	return new_threads;
}

////////////////////////////////////////////////////////////////////////////////
//
//  Main Program
//
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv) {

	void **d_pg_table; //device page table

	int i, j, table_size = 0, level_size = 1,
	    total_addresses, table_lowest_addresses,
	    levels = argc-3;

	int level_sizes[levels];
	//struct trans_thread *sample;
	struct trans_thread *h_new_threads; //host
	struct trans_thread *d_new_threads; //device

	cudaError_t cudaStat;

	//start of the program
	printf("===============================================================================\n");
	srand(time(NULL));

	// get number of pointers in contiguous page table
	for(i = 1, j =0; i < argc; i++) {
		if ( !strcmp(argv[i], "-n")) {
			total_addresses = atoi(argv[++i]);
			continue;
		}
		level_size *=  atoi(argv[i]);
		level_sizes[j++] = atoi(argv[i]);
		table_size += level_size;
	}

	//tuning the parameters of the device 
	// fixed block size (512 x1x1 threads)
	const dim3 blockSize(BLOCK_D1, BLOCK_D2, BLOCK_D3);
	// determine number of blocks we need for a given problem size
	int tmp = ceil(pow(total_addresses/BLOCK_D1, 0.5));
	printf("Grid dimension is %i x %i\n", tmp, tmp);
	//grid size
	dim3 gridSize(tmp, tmp, 1);
        //total number of threads 
	int nthreads = BLOCK_D1*BLOCK_D2*BLOCK_D3*tmp*tmp;
	//threads number legitimacy check
	if (nthreads < total_addresses){
		printf("\n============ NOT ENOUGH THREADS TO COVER total addresses=%d ===============\n\n",total_addresses);
	} else {
		printf("Launching %d threads (total_addresses=%d)\n", nthreads, total_addresses);
	}

	// allocate host memory
	max_table = table_size * sizeof(void *); //total size of page table
	void **pg_table = (void **) malloc(sizeof(void *) * table_size);

	if (!pg_table) {
		fprintf(stderr, "host memory allocation failed: %d\n", strerror(errno));
		exit(1);
	}
	else {
		printf ("host memory allocation succeeded.\n");
	}

	// allocate device memory
	cudaStat = cudaMalloc(&d_pg_table, sizeof(void *) * table_size);
	if(cudaStat != cudaSuccess) {
		printf ("device memory allocation failed.\n");
		return EXIT_FAILURE;
	}
	else {
		printf ("device memory allocation succeeded.\n");
	}

	/* --------------------------- sequential code on CPU; phase 1 --------------------------------------*/
	//number of entries at the lowest level of the page table
	//number of translatable addresses
	printf ("now construct the page table on the host.\n");
	table_lowest_addresses = construct_table(pg_table, level_sizes, levels);

	fprintf(stderr, "number of translatable addresses: %d\n", table_lowest_addresses);
	fprintf(stderr, "total size of page table: %d\n", max_table);

	cudaDeviceSynchronize();
	double tInit = read_timer();

	/* --------------------------- copy the page table from CPU to the GPU ------------------------------*/
	cudaStat = cudaMemcpy(d_pg_table, pg_table, sizeof(void *) * table_size, cudaMemcpyHostToDevice);

	printf("Memory Copy for page table from Host to Device");
	if (cudaStat != cudaSuccess){
		printf("failed.\n");
		return EXIT_FAILURE;
	} else {
		printf("successful.\n");
	}
	cudaDeviceSynchronize();
	double tTransferToGPU_pgtable = read_timer();

	/* --------------------------- sequential code on CPU; phase 2 ---------------------------------------*/
	h_new_threads = gen_addresses(total_addresses, levels, level_sizes, pg_table);
	cudaDeviceSynchronize();
	double tInit2 = read_timer();

	/* ------------------------- copy the trans_threads from CPU to the GPU ------------------------------*/
	cudaStat = cudaMalloc( (void**) &d_new_threads, sizeof(struct trans_thread) * total_addresses) ;
	if (cudaStat != cudaSuccess){
		printf("device memory allocation for d_new_threads failed.\n");
		return EXIT_FAILURE;
	} else {
		printf("device memory allocation for d_new_threads succeeded.\n");
	}

	cudaStat = cudaMemcpy( d_new_threads, h_new_threads, sizeof(struct trans_thread) * total_addresses, cudaMemcpyHostToDevice);
	printf("Memory Copy h_new_threads from Host to Device");
	if (cudaStat != cudaSuccess){
		printf("failed.\n");
		return EXIT_FAILURE;
	} else {
		printf(" successful.\n");
	}
	cudaCheckErrors("cudaMemcpy h_new_threads fail");

	cudaDeviceSynchronize();
	double tTransferToGPU_threads = read_timer();
	
        /* ----------------------------------- parallel code on GPU: kernel -----------------------------------*/
	gpu_run_time<<<gridSize, blockSize>>>(d_new_threads, total_addresses);
	
	cudaError_t cudaerr = cudaDeviceSynchronize();
	if (cudaerr){
		printf("kernel launch failed with error \"%s\".\n",
				cudaGetErrorString(cudaerr));
	} else {
		printf("kernel launch success!\n");
	}

	cudaDeviceSynchronize();
	double gpu_time = read_timer();
	printf("GPU done!\n");

        /* --------------------------------- sequential code on CPU; phase 3 ----------------------------------*/
	printf("now do calculation on CPU for comparison!\n");
	cpu_run_time(h_new_threads, total_addresses);
	double cpu_time = read_timer();
	fprintf(stderr, "The CPU took %lu microseconds to compute %d addresses. ""For a table of depth %d.\n",	cpu_time - gpu_time , total_addresses, levels);

	/* --------------------------------- sequential code on CPU; phase 4 ----------------------------------*/
	printf("Timing results for n = %d\n", total_addresses);
        //printf("page table Transfer to GPU time: %f\n", tTransferToGPU_pgtable - tInit);
        //printf("threads Transfer to GPU time: %f\n", tTransferToGPU_threads - tInit2);
        printf("Calculation time (GPU): %f\n", gpu_time - tTransferToGPU_threads);
        //printf("Transfer from GPU time: %f\n", tTransferFromGPU - gpu_time);
	printf("Calculation time (CPU): %f\n", cpu_time - gpu_time);


	printf("Freeing memory...\n");
	printf("====================================================\n");
	free(pg_table);
	free(h_new_threads);
	cudaFree(d_pg_table);
	cudaFree(d_new_threads);
	return 0;
	
	
}

	.file	"tmpxft_003282b0_00000000-6_page_walk.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2049:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2049:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13translate_cpuP12trans_thread
	.type	_Z13translate_cpuP12trans_thread, @function
_Z13translate_cpuP12trans_thread:
.LFB2040:
	.cfi_startproc
	endbr64
	movl	100(%rdi), %eax
	movq	(%rdi), %rdx
	leal	-1(%rax), %ecx
.L3:
	movslq	96(%rdi), %rsi
	movq	%rsi, %rax
	movslq	16(%rdi,%rsi,4), %rsi
	cmpl	%ecx, %eax
	jge	.L6
	incl	%eax
	movq	(%rdx,%rsi,8), %rdx
	movl	%eax, 96(%rdi)
	jmp	.L3
.L6:
	movl	(%rdx,%rsi,4), %eax
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z13translate_cpuP12trans_thread, .-_Z13translate_cpuP12trans_thread
	.globl	_Z14translate_cpu2P12trans_thread
	.type	_Z14translate_cpu2P12trans_thread, @function
_Z14translate_cpu2P12trans_thread:
.LFB2041:
	.cfi_startproc
	endbr64
	movl	100(%rdi), %eax
	leal	-1(%rax), %edx
.L8:
	movslq	96(%rdi), %rsi
	movq	(%rdi), %rcx
	movq	%rsi, %rax
	movslq	16(%rdi,%rsi,4), %rsi
	cmpl	%edx, %eax
	jge	.L10
	movq	(%rcx,%rsi,8), %rcx
	incl	%eax
	movl	%eax, 96(%rdi)
	movq	%rcx, (%rdi)
	jmp	.L8
.L10:
	movl	(%rcx,%rsi,4), %eax
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z14translate_cpu2P12trans_thread, .-_Z14translate_cpu2P12trans_thread
	.globl	_Z12cpu_run_timeP12trans_threadi
	.type	_Z12cpu_run_timeP12trans_threadi, @function
_Z12cpu_run_timeP12trans_threadi:
.LFB2042:
	.cfi_startproc
	endbr64
	movl	%esi, %r8d
	xorl	%r9d, %r9d
.L12:
	cmpl	%r8d, %r9d
	jge	.L14
	call	_Z14translate_cpu2P12trans_thread
	incl	%r9d
	addq	$104, %rdi
	jmp	.L12
.L14:
	xorps	%xmm0, %xmm0
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z12cpu_run_timeP12trans_threadi, .-_Z12cpu_run_timeP12trans_threadi
	.globl	_Z10read_timerv
	.type	_Z10read_timerv, @function
_Z10read_timerv:
.LFB2043:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z10read_timerv, .-_Z10read_timerv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"level_size: %d, level_ptr: %d, table_ptr: %d\n"
	.text
	.globl	_Z15construct_tablePvPii
	.type	_Z15construct_tablePvPii, @function
_Z15construct_tablePvPii:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r10
	movl	$1, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edx, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L19:
	leal	-1(%rbx), %eax
	cmpl	%r14d, %eax
	jle	.L26
	movq	%r12, %r9
	imull	0(%r13,%r14,4), %r15d
	movl	$2, %esi
	xorl	%eax, %eax
	subq	%r10, %r9
	movq	stderr(%rip), %rdi
	movq	%r10, 8(%rsp)
	leaq	.LC2(%rip), %rdx
	sarq	$3, %r9
	movq	%r9, %rbp
	movslq	%r15d, %r11
	movl	%r15d, %ecx
	shrq	$3, %rbp
	movq	%r11, (%rsp)
	addq	%r11, %rbp
	salq	$3, %rbp
	movq	%rbp, %r8
	sarq	$3, %r8
	shrq	$3, %r8
	call	__fprintf_chk@PLT
	movq	(%rsp), %r11
	movq	8(%rsp), %r10
	xorl	%eax, %eax
.L20:
	cmpl	%eax, %r15d
	jle	.L27
	movl	4(%r13,%r14,4), %edx
	imull	%eax, %edx
	movslq	%edx, %rdx
	leaq	0(%rbp,%rdx,8), %rdx
	addq	%r10, %rdx
	movq	%rdx, (%r12,%rax,8)
	incq	%rax
	jmp	.L20
.L27:
	leaq	(%r12,%r11,8), %r12
	incq	%r14
	jmp	.L19
.L26:
	movl	-4(%r13,%rbx,4), %eax
	xorl	%edx, %edx
	imull	%r15d, %eax
.L23:
	cmpl	%edx, %eax
	jle	.L28
	movq	%rdx, (%r12,%rdx,8)
	incq	%rdx
	jmp	.L23
.L28:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z15construct_tablePvPii, .-_Z15construct_tablePvPii
	.section	.rodata.str1.1
.LC3:
	.string	"malloc failed: %d\n"
	.text
	.globl	_Z13gen_addressesiiPiPPv
	.type	_Z13gen_addressesiiPiPPv, @function
_Z13gen_addressesiiPiPPv:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%edi, %rdi
	movq	%rcx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	imulq	$104, %rdi, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	malloc@PLT
	testq	%rax, %rax
	je	.L30
	movq	%rax, %rcx
	movq	%rax, %rbx
	xorl	%esi, %esi
	jmp	.L31
.L30:
	call	__errno_location@PLT
	movl	(%rax), %edi
	call	strerror@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L37:
	incl	%esi
	addq	$104, %rbx
.L31:
	cmpl	%r12d, %esi
	jge	.L36
	xorl	%eax, %eax
	movq	%r15, (%rbx)
	xorl	%ebp, %ebp
	movl	%r13d, 100(%rbx)
	movl	%eax, 96(%rbx)
.L32:
	cmpl	%ebp, %r13d
	jle	.L37
	movq	%rcx, 8(%rsp)
	movl	%esi, 4(%rsp)
	call	rand@PLT
	movq	8(%rsp), %rcx
	movl	4(%rsp), %esi
	cltd
	idivl	(%r14,%rbp,4)
	movl	%edx, 16(%rbx,%rbp,4)
	incq	%rbp
	jmp	.L32
.L36:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rcx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2045:
	.size	_Z13gen_addressesiiPiPPv, .-_Z13gen_addressesiiPiPPv
	.globl	_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi
	.type	_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi, @function
_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12gpu_run_timeP12trans_threadi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L38:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi, .-_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi
	.globl	_Z12gpu_run_timeP12trans_threadi
	.type	_Z12gpu_run_timeP12trans_threadi, @function
_Z12gpu_run_timeP12trans_threadi:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi
	.cfi_endproc
.LFE2072:
	.size	_Z12gpu_run_timeP12trans_threadi, .-_Z12gpu_run_timeP12trans_threadi
	.section	.rodata.str1.1
.LC4:
	.string	"===============================================================================\n"
.LC5:
	.string	"-n"
.LC7:
	.string	"Grid dimension is %i x %i\n"
.LC8:
	.string	"\n============ NOT ENOUGH THREADS TO COVER total addresses=%d ===============\n\n"
.LC9:
	.string	"Launching %d threads (total_addresses=%d)\n"
.LC10:
	.string	"host memory allocation failed: %d\n"
.LC11:
	.string	"host memory allocation succeeded.\n"
.LC12:
	.string	"device memory allocation failed.\n"
.LC13:
	.string	"device memory allocation succeeded.\n"
.LC14:
	.string	"now construct the page table on the host.\n"
.LC15:
	.string	"number of translatable addresses: %d\n"
.LC16:
	.string	"total size of page table: %d\n"
.LC17:
	.string	"Memory Copy for page table from Host to Device"
.LC18:
	.string	"failed.\n"
.LC19:
	.string	"successful.\n"
.LC20:
	.string	"device memory allocation for d_new_threads failed.\n"
.LC21:
	.string	"device memory allocation for d_new_threads succeeded.\n"
.LC22:
	.string	"Memory Copy h_new_threads from Host to Device"
.LC23:
	.string	" successful.\n"
.LC24:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/raphael-s-norwitz/arch_final_project/master/page_walk.cu"
.LC25:
	.string	"cudaMemcpy h_new_threads fail"
.LC26:
	.string	"Fatal error: %s (%s at %s:%d)\n"
.LC27:
	.string	"*** FAILED - ABORTING\n"
.LC28:
	.string	"kernel launch failed with error \"%s\".\n"
.LC29:
	.string	"kernel launch success!\n"
.LC30:
	.string	"GPU done!\n"
.LC31:
	.string	"now do calculation on CPU for comparison!\n"
.LC32:
	.string	"The CPU took %lu microseconds to compute %d addresses. For a table of depth %d.\n"
.LC33:
	.string	"Timing results for n = %d\n"
.LC34:
	.string	"Calculation time (GPU): %f\n"
.LC35:
	.string	"Calculation time (CPU): %f\n"
.LC36:
	.string	"Freeing memory...\n"
.LC37:
	.string	"====================================================\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	movq	%rsi, %r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movl	%edi, -120(%rbp)
	movq	%rsp, %rcx
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	movl	%edi, %eax
	subl	$3, %eax
	movl	%eax, -104(%rbp)
	cltq
	leaq	15(,%rax,4), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L44:
	cmpq	%rcx, %rsp
	je	.L45
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L44
.L45:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L46
	orq	$0, -8(%rsp,%rax)
.L46:
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movq	%rsp, -112(%rbp)
	xorl	%r12d, %r12d
	movl	$2, %edi
	movl	$1, %r15d
	xorl	%r14d, %r14d
	movl	$1, %ebx
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L47:
	movl	-120(%rbp), %eax
	cmpl	%eax, %ebx
	jge	.L71
	movslq	%ebx, %rax
	leaq	.LC5(%rip), %rsi
	movq	0(%r13,%rax,8), %rdi
	leaq	0(,%rax,8), %rdx
	movq	%rdx, -136(%rbp)
	movq	%rdi, -128(%rbp)
	call	strcmp@PLT
	movq	-128(%rbp), %rdi
	movq	-136(%rbp), %rdx
	testl	%eax, %eax
	jne	.L48
	movq	8(%r13,%rdx), %rdi
	incl	%ebx
	call	atoi@PLT
	movl	%eax, -100(%rbp)
	jmp	.L49
.L48:
	call	atoi@PLT
	movq	-112(%rbp), %rcx
	movslq	%r14d, %rdx
	incl	%r14d
	imull	%eax, %r15d
	movl	%eax, (%rcx,%rdx,4)
	addl	%r15d, %r12d
.L49:
	incl	%ebx
	jmp	.L47
.L71:
	movl	$8388609, %eax
	movl	$512, %ecx
	movsd	.LC6(%rip), %xmm1
	movl	$1, -72(%rbp)
	salq	$9, %rax
	movq	%rax, -80(%rbp)
	movl	-100(%rbp), %eax
	cltd
	idivl	%ecx
	cvtsi2sdl	%eax, %xmm0
	call	pow@PLT
	call	ceil@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	cvttsd2sil	%xmm0, %ebx
	movl	%ebx, %edx
	movl	%ebx, %ecx
	call	__printf_chk@PLT
	movl	%ebx, -68(%rbp)
	movl	%ebx, -64(%rbp)
	imull	%ebx, %ebx
	movl	$1, -60(%rbp)
	sall	$9, %ebx
	movl	%ebx, %edx
	cmpl	%ebx, -100(%rbp)
	jle	.L51
	movl	-100(%rbp), %edx
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L52
.L51:
	movl	-100(%rbp), %ecx
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L52:
	movslq	%r12d, %r13
	leal	0(,%r12,8), %eax
	salq	$3, %r13
	movl	%eax, _ZL9max_table(%rip)
	movq	%r13, %rdi
	call	malloc@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L53
	call	__errno_location@PLT
	movl	(%rax), %edi
	call	strerror@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L70
.L53:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r13, %rsi
	leaq	-96(%rbp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC12(%rip), %rsi
	testl	%eax, %eax
	jne	.L69
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	-104(%rbp), %edx
	movq	-112(%rbp), %rsi
	movq	%rbx, %rdi
	call	_Z15construct_tablePvPii
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC15(%rip), %rdx
	movl	%eax, %ecx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	_ZL9max_table(%rip), %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	movq	stderr(%rip), %rdi
	leaq	.LC16(%rip), %rdx
	call	__fprintf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z10read_timerv
	movq	-96(%rbp), %rdi
	movq	%r13, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %r13d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	testl	%r13d, %r13d
	je	.L56
.L59:
	leaq	.LC18(%rip), %rsi
.L69:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L43
.L56:
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	call	_Z10read_timerv
	movq	-112(%rbp), %rdx
	movl	-104(%rbp), %esi
	movq	%rbx, %rcx
	movl	-100(%rbp), %edi
	call	_Z13gen_addressesiiPiPPv
	movq	%rax, %r13
	call	cudaDeviceSynchronize@PLT
	call	_Z10read_timerv
	movslq	-100(%rbp), %r14
	leaq	-88(%rbp), %rdi
	imulq	$104, %r14, %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	leaq	.LC20(%rip), %rsi
	testl	%eax, %eax
	jne	.L69
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-88(%rbp), %rdi
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %r14d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	testl	%r14d, %r14d
	jne	.L59
	movl	$2, %edi
	leaq	.LC23(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L60
	call	cudaGetErrorString@PLT
	leaq	.LC25(%rip), %rcx
	leaq	.LC26(%rip), %rdx
	movl	$2, %esi
	movq	%rax, %r8
	pushq	%rax
	movq	stderr(%rip), %rdi
	xorl	%eax, %eax
	pushq	$305
	leaq	.LC24(%rip), %r9
	call	__fprintf_chk@PLT
	movq	stderr(%rip), %rdi
	popq	%rdx
	xorl	%eax, %eax
	popq	%rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
.L70:
	movl	$1, %edi
	call	exit@PLT
.L60:
	call	cudaDeviceSynchronize@PLT
	call	_Z10read_timerv
	movl	-72(%rbp), %ecx
	movq	-80(%rbp), %rdx
	xorl	%r9d, %r9d
	movq	-68(%rbp), %rdi
	movl	-60(%rbp), %esi
	xorl	%r8d, %r8d
	movsd	%xmm0, -120(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movl	-100(%rbp), %esi
	movq	-88(%rbp), %rdi
	call	_Z46__device_stub__Z12gpu_run_timeP12trans_threadiP12trans_threadi
.L61:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L62
	call	cudaGetErrorString@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L63
.L62:
	leaq	.LC29(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L63:
	call	cudaDeviceSynchronize@PLT
	call	_Z10read_timerv
	leaq	.LC30(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movsd	%xmm0, -112(%rbp)
	call	__printf_chk@PLT
	leaq	.LC31(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	-100(%rbp), %esi
	movq	%r13, %rdi
	call	_Z12cpu_run_timeP12trans_threadi
	call	_Z10read_timerv
	subsd	-112(%rbp), %xmm0
	movl	-104(%rbp), %r8d
	movb	$1, %al
	movl	-100(%rbp), %ecx
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC32(%rip), %rdx
	movq	%xmm0, %r14
	call	__fprintf_chk@PLT
	movl	-100(%rbp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC33(%rip), %rsi
	call	__printf_chk@PLT
	movsd	-112(%rbp), %xmm0
	subsd	-120(%rbp), %xmm0
	movb	$1, %al
	leaq	.LC34(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%r14, %xmm0
	leaq	.LC35(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC36(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC37(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	-96(%rbp), %rdi
	call	cudaFree@PLT
	movq	-88(%rbp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L43:
	movq	-56(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE2046:
	.size	main, .-main
	.section	.rodata.str1.1
.LC38:
	.string	"_Z12gpu_run_timeP12trans_threadi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2074:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12gpu_run_timeP12trans_threadi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2074:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL9max_table
	.comm	_ZL9max_table,4,4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC6:
	.long	0
	.long	1071644672
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/***********************************************************************************
  This work is COMS 4824 Architecture Final Project, advised by Professor Martha Kim.
  
  "A Walk on the Hyperthreaded Side: 
       an Implementation and Analysis of Translating Virtual Addresses on a GPU"

  Copyright (c) 2017 Columbia University.
  All rights reserved.

  Created by Serena Liu and Raphael Norwitz.

  AWS EC2 instance configuration:
--Instance type: g2.2xlarge
--AMI Id: NVIDIA CUDA 7.5 Toolkit on Amazon Linux-0ce7aca3-5b96-4ff4-8396-05245687380a-ami-52420645.3 (ami-52f7b345)

CUDA examples used:
https://raw.githubusercontent.com/berkeley-scf/gpu-workshop-2016/master/kernelExample.cu

  Software Usage:
--compile: nvcc page_walk.cu -o page_walk.out
--output: ./page_walk.out -n <total addresses> <intermediate table parameters>
          (eg, ./page_walk.out -n 400 2 3 2 4)
************************************************************************************/


#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <errno.h>
#include <assert.h>
#include <sys/time.h>
#include <time.h>
#include <hip/hip_runtime.h>

#include <stdint.h>

#define BLOCK_D1 512
#define BLOCK_D2 1
#define BLOCK_D3 1
#define MAX_LEVELS 20

#define cudaCheckErrors(msg) \
	do { \
		hipError_t __err = hipGetLastError(); \
		if (__err != hipSuccess) { \
			fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
					msg, hipGetErrorString(__err), \
					__FILE__, __LINE__); \
			fprintf(stderr, "*** FAILED - ABORTING\n"); \
			exit(1); \
		} \
	} while (0)


static int max_table;

struct trans_thread {
	void **curr_table;
	unsigned long cuda_result;
	int offset[MAX_LEVELS];
	int curr;
	int max;
};

//function called by CUDA kernel
__host__ __device__ int translate_cpu(struct trans_thread *trans) {
	unsigned long *gpu_ptr = (unsigned long *) trans->curr_table;
	while(trans->curr < trans->max-1) {
		gpu_ptr = (unsigned long *) gpu_ptr[trans->offset[trans->curr]]; 
		trans->curr++;
	}
	return (int) *((int *) gpu_ptr + trans->offset[trans->curr]); 
	// ((void *) trans->curr_table + trans->offset[trans->max-1]);
}

//CPU counterpart 
int translate_cpu2(struct trans_thread *trans) {
	
	while(trans->curr < trans->max-1) {
		trans->curr_table = (void **) trans->curr_table[trans->offset[trans->curr]];
		trans->curr++;
	}
	
	return (int) *((int *) trans->curr_table + trans->offset[trans->curr]); 
	// ((void *) trans->curr_table + trans->offset[trans->max-1]);
}



// CUDA kernel: gpu_run_time<<<gridSize, blockSize>>>(d_new_threads, total_addresses);
__global__ void gpu_run_time(struct trans_thread *trans, int addresses) {
	// id of the block
	int myblock = blockIdx.x + blockIdx.y * gridDim.x;
	// size of each block (within grid of blocks)
	int blocksize = blockDim.x * blockDim.y * blockDim.z;
	// id of thread in a given block
	int subthread = threadIdx.z*(blockDim.x * blockDim.y) + threadIdx.y*blockDim.x + threadIdx.x;
	// assign overall id/index of the thread
	int idx = myblock * blocksize + subthread;
	
	if(idx < addresses) {		
		translate_cpu(&trans[idx]);	
	}
}


// CPU analog for speed comparison
float cpu_run_time(struct trans_thread *trans, int addresses) {
	
	for(int i = 0; i < addresses; i++) {
		translate_cpu2(&trans[i]);	
	}

	return 0;
}

/* --------------------------- host code ------------------------------*/
double read_timer() {

	struct timeval end;
	gettimeofday( &end, NULL );
	return end.tv_sec+1.e-6*end.tv_usec;
}

//sequential phase 1: construct the table 
int construct_table(void *table, int *levels, int num_levels) {
	int i, j, level_size = 1;
	void **table_ptr = (void **) table;
	unsigned long **level_ptr;

	// set intermediate addresses of table
	for(i = 0; i < num_levels-1; i++)
	{
		level_size *= levels[i];

		level_ptr = (unsigned long **) table + level_size + (((unsigned long *)table_ptr - (unsigned long *) table)/(sizeof(unsigned long *)));

		fprintf(stderr, "level_size: %d, level_ptr: %d, table_ptr: %d\n", level_size, (level_ptr- (unsigned long **) table) / sizeof(void *), (unsigned long **) table_ptr -  (unsigned long **) table);

		for(j = 0; j < level_size; j++) {
			table_ptr[j] = level_ptr + ((j)*levels[i+1]);
		}

		table_ptr += level_size;
	}
	assert((intptr_t )table_ptr - (intptr_t )table < max_table);


	// set last level of page table to garbage; 
	for(i = 0; i < level_size * levels[num_levels-1]; i++) {
		*table_ptr = (unsigned long *) i;
		table_ptr++;
	}
	assert((intptr_t )table_ptr - (intptr_t )table == max_table);
	// return number of entries at the lowest level of the page table
	return levels[num_levels-1] * level_size;
}

//sequential phase 2: generate struct trans_thread for each address
struct trans_thread *gen_addresses(int num_addr, int levels, int *level_sizes, void **pgd)
{
	int i,j;
	struct trans_thread *new_threads = (struct trans_thread *)malloc(sizeof(struct trans_thread) * num_addr);
	if (!new_threads){
		fprintf(stderr, "malloc failed: %d\n", strerror(errno));
		exit(1);
	}

	for(i = 0; i < num_addr; i++)
	{
		new_threads[i].curr_table = pgd;
		new_threads[i].max = levels;
		new_threads[i].curr = 0;

		for(j = 0; j < levels; j++) {
			new_threads[i].offset[j] =
				rand() % level_sizes[j];
		}
	}
	return new_threads;
}

////////////////////////////////////////////////////////////////////////////////
//
//  Main Program
//
////////////////////////////////////////////////////////////////////////////////
int main(int argc, char** argv) {

	void **d_pg_table; //device page table

	int i, j, table_size = 0, level_size = 1,
	    total_addresses, table_lowest_addresses,
	    levels = argc-3;

	int level_sizes[levels];
	//struct trans_thread *sample;
	struct trans_thread *h_new_threads; //host
	struct trans_thread *d_new_threads; //device

	hipError_t cudaStat;

	//start of the program
	printf("===============================================================================\n");
	srand(time(NULL));

	// get number of pointers in contiguous page table
	for(i = 1, j =0; i < argc; i++) {
		if ( !strcmp(argv[i], "-n")) {
			total_addresses = atoi(argv[++i]);
			continue;
		}
		level_size *=  atoi(argv[i]);
		level_sizes[j++] = atoi(argv[i]);
		table_size += level_size;
	}

	//tuning the parameters of the device 
	// fixed block size (512 x1x1 threads)
	const dim3 blockSize(BLOCK_D1, BLOCK_D2, BLOCK_D3);
	// determine number of blocks we need for a given problem size
	int tmp = ceil(pow(total_addresses/BLOCK_D1, 0.5));
	printf("Grid dimension is %i x %i\n", tmp, tmp);
	//grid size
	dim3 gridSize(tmp, tmp, 1);
        //total number of threads 
	int nthreads = BLOCK_D1*BLOCK_D2*BLOCK_D3*tmp*tmp;
	//threads number legitimacy check
	if (nthreads < total_addresses){
		printf("\n============ NOT ENOUGH THREADS TO COVER total addresses=%d ===============\n\n",total_addresses);
	} else {
		printf("Launching %d threads (total_addresses=%d)\n", nthreads, total_addresses);
	}

	// allocate host memory
	max_table = table_size * sizeof(void *); //total size of page table
	void **pg_table = (void **) malloc(sizeof(void *) * table_size);

	if (!pg_table) {
		fprintf(stderr, "host memory allocation failed: %d\n", strerror(errno));
		exit(1);
	}
	else {
		printf ("host memory allocation succeeded.\n");
	}

	// allocate device memory
	cudaStat = hipMalloc(&d_pg_table, sizeof(void *) * table_size);
	if(cudaStat != hipSuccess) {
		printf ("device memory allocation failed.\n");
		return EXIT_FAILURE;
	}
	else {
		printf ("device memory allocation succeeded.\n");
	}

	/* --------------------------- sequential code on CPU; phase 1 --------------------------------------*/
	//number of entries at the lowest level of the page table
	//number of translatable addresses
	printf ("now construct the page table on the host.\n");
	table_lowest_addresses = construct_table(pg_table, level_sizes, levels);

	fprintf(stderr, "number of translatable addresses: %d\n", table_lowest_addresses);
	fprintf(stderr, "total size of page table: %d\n", max_table);

	hipDeviceSynchronize();
	double tInit = read_timer();

	/* --------------------------- copy the page table from CPU to the GPU ------------------------------*/
	cudaStat = hipMemcpy(d_pg_table, pg_table, sizeof(void *) * table_size, hipMemcpyHostToDevice);

	printf("Memory Copy for page table from Host to Device");
	if (cudaStat != hipSuccess){
		printf("failed.\n");
		return EXIT_FAILURE;
	} else {
		printf("successful.\n");
	}
	hipDeviceSynchronize();
	double tTransferToGPU_pgtable = read_timer();

	/* --------------------------- sequential code on CPU; phase 2 ---------------------------------------*/
	h_new_threads = gen_addresses(total_addresses, levels, level_sizes, pg_table);
	hipDeviceSynchronize();
	double tInit2 = read_timer();

	/* ------------------------- copy the trans_threads from CPU to the GPU ------------------------------*/
	cudaStat = hipMalloc( (void**) &d_new_threads, sizeof(struct trans_thread) * total_addresses) ;
	if (cudaStat != hipSuccess){
		printf("device memory allocation for d_new_threads failed.\n");
		return EXIT_FAILURE;
	} else {
		printf("device memory allocation for d_new_threads succeeded.\n");
	}

	cudaStat = hipMemcpy( d_new_threads, h_new_threads, sizeof(struct trans_thread) * total_addresses, hipMemcpyHostToDevice);
	printf("Memory Copy h_new_threads from Host to Device");
	if (cudaStat != hipSuccess){
		printf("failed.\n");
		return EXIT_FAILURE;
	} else {
		printf(" successful.\n");
	}
	cudaCheckErrors("hipMemcpy h_new_threads fail");

	hipDeviceSynchronize();
	double tTransferToGPU_threads = read_timer();
	
        /* ----------------------------------- parallel code on GPU: kernel -----------------------------------*/
	gpu_run_time<<<gridSize, blockSize>>>(d_new_threads, total_addresses);
	
	hipError_t cudaerr = hipDeviceSynchronize();
	if (cudaerr){
		printf("kernel launch failed with error \"%s\".\n",
				hipGetErrorString(cudaerr));
	} else {
		printf("kernel launch success!\n");
	}

	hipDeviceSynchronize();
	double gpu_time = read_timer();
	printf("GPU done!\n");

        /* --------------------------------- sequential code on CPU; phase 3 ----------------------------------*/
	printf("now do calculation on CPU for comparison!\n");
	cpu_run_time(h_new_threads, total_addresses);
	double cpu_time = read_timer();
	fprintf(stderr, "The CPU took %lu microseconds to compute %d addresses. ""For a table of depth %d.\n",	cpu_time - gpu_time , total_addresses, levels);

	/* --------------------------------- sequential code on CPU; phase 4 ----------------------------------*/
	printf("Timing results for n = %d\n", total_addresses);
        //printf("page table Transfer to GPU time: %f\n", tTransferToGPU_pgtable - tInit);
        //printf("threads Transfer to GPU time: %f\n", tTransferToGPU_threads - tInit2);
        printf("Calculation time (GPU): %f\n", gpu_time - tTransferToGPU_threads);
        //printf("Transfer from GPU time: %f\n", tTransferFromGPU - gpu_time);
	printf("Calculation time (CPU): %f\n", cpu_time - gpu_time);


	printf("Freeing memory...\n");
	printf("====================================================\n");
	free(pg_table);
	free(h_new_threads);
	hipFree(d_pg_table);
	hipFree(d_new_threads);
	return 0;
	
	
}

	.text
	.file	"page_walk.hip"
	.globl	_Z13translate_cpuP12trans_thread # -- Begin function _Z13translate_cpuP12trans_thread
	.type	_Z13translate_cpuP12trans_thread,@function
_Z13translate_cpuP12trans_thread:       # @_Z13translate_cpuP12trans_thread
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rax
	movslq	100(%rdi), %r9
	leaq	-1(%r9), %rcx
	movslq	96(%rdi), %r8
	cmpl	%ecx, %r8d
	jge	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	leaq	(%rdi,%r8,4), %rdx
	addq	$16, %rdx
	movq	%r8, %rsi
	notq	%rsi
	addq	%r9, %rsi
	incl	%r8d
	xorl	%r9d, %r9d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rdx,%r9,4), %r10
	movq	(%rax,%r10,8), %rax
	leal	(%r8,%r9), %r10d
	movl	%r10d, 96(%rdi)
	incq	%r9
	cmpq	%r9, %rsi
	jne	.LBB0_2
# %bb.3:
	movq	%rcx, %r8
.LBB0_4:                                # %._crit_edge
	movslq	16(%rdi,%r8,4), %rcx
	movl	(%rax,%rcx,4), %eax
	retq
.Lfunc_end0:
	.size	_Z13translate_cpuP12trans_thread, .Lfunc_end0-_Z13translate_cpuP12trans_thread
	.cfi_endproc
                                        # -- End function
	.globl	_Z14translate_cpu2P12trans_thread # -- Begin function _Z14translate_cpu2P12trans_thread
	.type	_Z14translate_cpu2P12trans_thread,@function
_Z14translate_cpu2P12trans_thread:      # @_Z14translate_cpu2P12trans_thread
	.cfi_startproc
# %bb.0:
	movslq	100(%rdi), %rdx
	decq	%rdx
	movslq	96(%rdi), %rax
	movq	(%rdi), %rcx
	cmpl	%edx, %eax
	jge	.LBB1_4
# %bb.1:                                # %.lr.ph
	leal	1(%rax), %esi
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movslq	16(%rdi,%rax,4), %r8
	movq	(%rcx,%r8,8), %rcx
	movq	%rcx, (%rdi)
	incq	%rax
	movl	%esi, 96(%rdi)
	incl	%esi
	cmpq	%rax, %rdx
	jne	.LBB1_2
# %bb.3:
	movq	%rdx, %rax
.LBB1_4:                                # %._crit_edge
	movslq	16(%rdi,%rax,4), %rax
	movl	(%rcx,%rax,4), %eax
	retq
.Lfunc_end1:
	.size	_Z14translate_cpu2P12trans_thread, .Lfunc_end1-_Z14translate_cpu2P12trans_thread
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__gpu_run_timeP12trans_threadi # -- Begin function _Z27__device_stub__gpu_run_timeP12trans_threadi
	.type	_Z27__device_stub__gpu_run_timeP12trans_threadi,@function
_Z27__device_stub__gpu_run_timeP12trans_threadi: # @_Z27__device_stub__gpu_run_timeP12trans_threadi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12gpu_run_timeP12trans_threadi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__gpu_run_timeP12trans_threadi, .Lfunc_end2-_Z27__device_stub__gpu_run_timeP12trans_threadi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12cpu_run_timeP12trans_threadi # -- Begin function _Z12cpu_run_timeP12trans_threadi
	.type	_Z12cpu_run_timeP12trans_threadi,@function
_Z12cpu_run_timeP12trans_threadi:       # @_Z12cpu_run_timeP12trans_threadi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB3_7
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %eax
	leaq	16(%rdi), %rcx
	xorl	%edx, %edx
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	imulq	$104, %rdx, %r8
	movslq	100(%rdi,%r8), %rbx
	leal	-1(%rbx), %esi
	movslq	96(%rdi,%r8), %r14
	cmpl	%esi, %r14d
	jge	.LBB3_5
# %bb.3:                                # %.lr.ph.i
                                        #   in Loop: Header=BB3_2 Depth=1
	leaq	(%rdi,%r8), %rsi
	addq	%rdi, %r8
	addq	$96, %r8
	movq	(%rsi), %r9
	leaq	(%rcx,%r14,4), %r10
	movq	%r14, %r11
	notq	%r11
	addq	%rbx, %r11
	leal	1(%r14), %ebx
	xorl	%r14d, %r14d
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%r10,%r14,4), %r15
	movq	(%r9,%r15,8), %r9
	movq	%r9, (%rsi)
	leal	(%rbx,%r14), %ebp
	movl	%ebp, (%r8)
	incq	%r14
	cmpq	%r14, %r11
	jne	.LBB3_4
.LBB3_5:                                # %_Z14translate_cpu2P12trans_thread.exit
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%rdx
	addq	$104, %rcx
	cmpq	%rax, %rdx
	jne	.LBB3_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB3_7:                                # %._crit_edge
	xorps	%xmm0, %xmm0
	retq
.Lfunc_end3:
	.size	_Z12cpu_run_timeP12trans_threadi, .Lfunc_end3-_Z12cpu_run_timeP12trans_threadi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10read_timerv
.LCPI4_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z10read_timerv
	.type	_Z10read_timerv,@function
_Z10read_timerv:                        # @_Z10read_timerv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI4_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z10read_timerv, .Lfunc_end4-_Z10read_timerv
	.cfi_endproc
                                        # -- End function
	.globl	_Z15construct_tablePvPii        # -- Begin function _Z15construct_tablePvPii
	.type	_Z15construct_tablePvPii,@function
_Z15construct_tablePvPii:               # @_Z15construct_tablePvPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $edx killed $edx def $rdx
	movq	%rsi, %r14
	movq	%rdi, %r15
	leal	-1(%rdx), %eax
	movl	$1, %ebx
	cmpl	$2, %edx
	movl	%eax, 12(%rsp)                  # 4-byte Spill
	jl	.LBB5_1
# %bb.6:                                # %.lr.ph50
	movl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	$1, %ebx
	xorl	%r13d, %r13d
	movq	%r15, %r12
.LBB5_7:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_9 Depth 2
	movslq	(%r14,%r13,4), %rax
	movslq	%ebx, %rbx
	imulq	%rax, %rbx
	leaq	(%r15,%rbx,8), %rax
	movq	%r12, %r8
	subq	%r15, %r8
	sarq	$3, %r8
	movq	%r8, %rbp
	andq	$-8, %rbp
	addq	%rax, %rbp
	movq	stderr(%rip), %rdi
	movq	%rbp, %rcx
	subq	%r15, %rcx
	sarq	$3, %rcx
	shrq	$3, %rcx
	movl	$.L.str, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	fprintf
	testl	%ebx, %ebx
	jle	.LBB5_10
# %bb.8:                                # %.lr.ph
                                        #   in Loop: Header=BB5_7 Depth=1
	movslq	4(%r14,%r13,4), %rax
	movl	%ebx, %ecx
	shlq	$3, %rax
	xorl	%edx, %edx
.LBB5_9:                                #   Parent Loop BB5_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbp, (%r12,%rdx,8)
	incq	%rdx
	addq	%rax, %rbp
	cmpq	%rdx, %rcx
	jne	.LBB5_9
.LBB5_10:                               # %._crit_edge
                                        #   in Loop: Header=BB5_7 Depth=1
	leaq	(%r12,%rbx,8), %r12
	incq	%r13
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB5_7
	jmp	.LBB5_2
.LBB5_1:
	movq	%r15, %r12
.LBB5_2:                                # %.preheader
	movslq	12(%rsp), %rax                  # 4-byte Folded Reload
	imull	(%r14,%rax,4), %ebx
	testl	%ebx, %ebx
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph55.preheader
	movl	%ebx, %eax
	xorl	%ecx, %ecx
.LBB5_4:                                # %.lr.ph55
                                        # =>This Inner Loop Header: Depth=1
	movq	%rcx, (%r12,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge56
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z15construct_tablePvPii, .Lfunc_end5-_Z15construct_tablePvPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13gen_addressesiiPiPPv        # -- Begin function _Z13gen_addressesiiPiPPv
	.type	_Z13gen_addressesiiPiPPv,@function
_Z13gen_addressesiiPiPPv:               # @_Z13gen_addressesiiPiPPv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, %r14
	movl	%esi, 4(%rsp)                   # 4-byte Spill
	movl	%edi, %r12d
	movslq	%edi, %rax
	imulq	$104, %rax, %rdi
	callq	malloc
	testq	%rax, %rax
	je	.LBB6_8
# %bb.1:                                # %.preheader
	movq	%rax, %rbx
	testl	%r12d, %r12d
	jle	.LBB6_7
# %bb.2:                                # %.lr.ph25
	movl	%r12d, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movl	4(%rsp), %r13d                  # 4-byte Reload
	movq	%rbx, %r15
	addq	$16, %r15
	xorl	%r12d, %r12d
.LBB6_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_5 Depth 2
	imulq	$104, %r12, %rax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movq	%rcx, (%rbx,%rax)
	movl	4(%rsp), %ecx                   # 4-byte Reload
	movl	%ecx, 100(%rbx,%rax)
	movl	$0, 96(%rbx,%rax)
	testl	%ecx, %ecx
	jle	.LBB6_6
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB6_3 Depth=1
	xorl	%ebp, %ebp
.LBB6_5:                                # %.lr.ph
                                        #   Parent Loop BB6_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltd
	idivl	(%r14,%rbp,4)
	movl	%edx, (%r15,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB6_5
.LBB6_6:                                # %._crit_edge
                                        #   in Loop: Header=BB6_3 Depth=1
	incq	%r12
	addq	$104, %r15
	cmpq	8(%rsp), %r12                   # 8-byte Folded Reload
	jne	.LBB6_3
.LBB6_7:                                # %._crit_edge26
	movq	%rbx, %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_8:
	.cfi_def_cfa_offset 80
	movq	stderr(%rip), %rbx
	callq	__errno_location
	movl	(%rax), %edi
	callq	strerror
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end6:
	.size	_Z13gen_addressesiiPiPPv, .Lfunc_end6-_Z13gen_addressesiiPiPPv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI7_0:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$88, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, -128(%rbp)                # 8-byte Spill
	movl	%edi, %r13d
	movq	%rsp, %r12
	leal	-3(%r13), %ebx
	movq	%rsp, %rcx
	leaq	15(,%rbx,4), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -64(%rbp)                 # 8-byte Spill
	movq	%rcx, %rsp
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
                                        # implicit-def: $r14d
	movq	%r13, -88(%rbp)                 # 8-byte Spill
	cmpl	$2, %r13d
	movq	%rbx, -96(%rbp)                 # 8-byte Spill
	jl	.LBB7_7
# %bb.1:                                # %.lr.ph.preheader
	xorl	%eax, %eax
	movq	%rax, -72(%rbp)                 # 8-byte Spill
	movq	%r12, -48(%rbp)                 # 8-byte Spill
	movl	$1, %r13d
	movl	$0, -80(%rbp)                   # 4-byte Folded Spill
	movl	$1, %r15d
                                        # implicit-def: $eax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
	movq	-128(%rbp), %r12                # 8-byte Reload
.LBB7_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	%r13d, %rbx
	movq	(%r12,%rbx,8), %r14
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	callq	strcmp
	testl	%eax, %eax
	je	.LBB7_4
# %bb.3:                                #   in Loop: Header=BB7_2 Depth=1
	movq	%r14, %rdi
	callq	atoi
	imull	%eax, %r15d
	movq	-72(%rbp), %rdx                 # 8-byte Reload
	movslq	%edx, %rcx
	incl	%edx
	movq	%rdx, -72(%rbp)                 # 8-byte Spill
	movq	-64(%rbp), %rdx                 # 8-byte Reload
	movl	%eax, (%rdx,%rcx,4)
	addl	%r15d, -80(%rbp)                # 4-byte Folded Spill
	jmp	.LBB7_5
.LBB7_4:                                #   in Loop: Header=BB7_2 Depth=1
	leal	1(%rbx), %r13d
	movq	8(%r12,%rbx,8), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, -56(%rbp)                 # 8-byte Spill
.LBB7_5:                                #   in Loop: Header=BB7_2 Depth=1
	incl	%r13d
	cmpl	-88(%rbp), %r13d                # 4-byte Folded Reload
	jl	.LBB7_2
# %bb.6:                                # %._crit_edge.loopexit
	movslq	-80(%rbp), %r15                 # 4-byte Folded Reload
	shlq	$3, %r15
	movq	-48(%rbp), %r12                 # 8-byte Reload
	movq	-56(%rbp), %r14                 # 8-byte Reload
.LBB7_7:                                # %._crit_edge
	leal	511(%r14), %eax
	testl	%r14d, %r14d
	cmovnsl	%r14d, %eax
	sarl	$9, %eax
	cvtsi2sd	%eax, %xmm0
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB7_9
# %bb.8:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB7_10
.LBB7_9:                                # %call.sqrt
	callq	sqrt@PLT
.LBB7_10:                               # %._crit_edge.split
	andpd	.LCPI7_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %ebx
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	movl	%ebx, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %esi
	imull	%ebx, %esi
	shll	$9, %esi
	cmpl	%r14d, %esi
	jge	.LBB7_12
# %bb.11:
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB7_13
.LBB7_12:
	movl	$.L.str.6, %edi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	printf
.LBB7_13:
	movq	%r15, %rdi
	callq	malloc
	testq	%rax, %rax
	je	.LBB7_32
# %bb.14:
	movq	%r15, %r13
	movq	%rax, %r15
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	-120(%rbp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB7_17
# %bb.15:
	movl	$.Lstr.15, %edi
	callq	puts@PLT
	movl	$1, %r15d
.LBB7_16:
	movq	%r12, %rsp
	movl	%r15d, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB7_17:
	.cfi_def_cfa %rbp, 16
	movq	%r14, -56(%rbp)                 # 8-byte Spill
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	%r15, %rdi
	movq	-64(%rbp), %rsi                 # 8-byte Reload
	movq	-96(%rbp), %rdx                 # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z15construct_tablePvPii
	movq	stderr(%rip), %rdi
	movl	$.L.str.12, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rdi
	movl	$.L.str.13, %esi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	fprintf
	callq	hipDeviceSynchronize
	leaq	-112(%rbp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	-120(%rbp), %rdi
	movq	%r15, %rsi
	movl	$1, %r15d
	movq	%rsi, -72(%rbp)                 # 8-byte Spill
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r14d
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	testl	%r14d, %r14d
	je	.LBB7_19
# %bb.18:
	movl	$.Lstr.14, %edi
	callq	puts@PLT
	jmp	.LBB7_16
.LBB7_19:
	movq	%r12, -48(%rbp)                 # 8-byte Spill
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	callq	hipDeviceSynchronize
	leaq	-112(%rbp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	-56(%rbp), %r14                 # 8-byte Reload
	movl	%r14d, %edi
	movq	-96(%rbp), %rsi                 # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movq	-64(%rbp), %rdx                 # 8-byte Reload
	movq	-72(%rbp), %rcx                 # 8-byte Reload
	callq	_Z13gen_addressesiiPiPPv
	movq	%rax, %r12
	callq	hipDeviceSynchronize
	leaq	-112(%rbp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movslq	%r14d, %rax
	imulq	$104, %rax, %r13
	leaq	-112(%rbp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB7_21
# %bb.20:
	movl	$.Lstr.13, %edi
	jmp	.LBB7_23
.LBB7_21:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	-112(%rbp), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %r14d
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	testl	%r14d, %r14d
	je	.LBB7_25
# %bb.22:
	movl	$.Lstr.14, %edi
.LBB7_23:
	callq	puts@PLT
.LBB7_24:
	movq	-48(%rbp), %r12                 # 8-byte Reload
	jmp	.LBB7_16
.LBB7_25:
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB7_34
# %bb.26:
	movabsq	$4294967297, %r14               # imm = 0x100000001
	imulq	%r14, %rbx
	callq	hipDeviceSynchronize
	callq	_Z10read_timerv
	movsd	%xmm0, -64(%rbp)                # 8-byte Spill
	addq	$511, %r14                      # imm = 0x1FF
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	-96(%rbp), %rbx                 # 8-byte Reload
	movq	-56(%rbp), %r14                 # 8-byte Reload
	jne	.LBB7_28
# %bb.27:
	movq	-112(%rbp), %rdi
	movl	%r14d, %esi
	callq	_Z27__device_stub__gpu_run_timeP12trans_threadi
.LBB7_28:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB7_30
# %bb.29:
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	jmp	.LBB7_31
.LBB7_30:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB7_31:
	callq	hipDeviceSynchronize
	callq	_Z10read_timerv
	movsd	%xmm0, -88(%rbp)                # 8-byte Spill
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movq	%r12, %rdi
	movl	%r14d, %esi
	callq	_Z12cpu_run_timeP12trans_threadi
	callq	_Z10read_timerv
	movq	stderr(%rip), %rdi
	subsd	-88(%rbp), %xmm0                # 8-byte Folded Reload
	movsd	%xmm0, -80(%rbp)                # 8-byte Spill
	movl	$.L.str.29, %esi
	movl	%r14d, %edx
	movl	%ebx, %ecx
	movb	$1, %al
	callq	fprintf
	xorl	%r15d, %r15d
	movl	$.L.str.30, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movsd	-88(%rbp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	subsd	-64(%rbp), %xmm0                # 8-byte Folded Reload
	movl	$.L.str.31, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.32, %edi
	movsd	-80(%rbp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.Lstr.10, %edi
	callq	puts@PLT
	movl	$.Lstr.11, %edi
	callq	puts@PLT
	movq	-72(%rbp), %rdi                 # 8-byte Reload
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	-120(%rbp), %rdi
	callq	hipFree
	movq	-112(%rbp), %rdi
	callq	hipFree
	jmp	.LBB7_24
.LBB7_32:
	movq	stderr(%rip), %rbx
	callq	__errno_location
	movl	(%rax), %edi
	callq	strerror
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
.LBB7_33:
	movl	$1, %edi
	callq	exit
.LBB7_34:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.21, %esi
	movl	$.L.str.22, %edx
	movl	$.L.str.23, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$305, %r9d                      # imm = 0x131
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rcx
	movl	$.L.str.24, %edi
	movl	$22, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB7_33
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12gpu_run_timeP12trans_threadi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12gpu_run_timeP12trans_threadi,@object # @_Z12gpu_run_timeP12trans_threadi
	.section	.rodata,"a",@progbits
	.globl	_Z12gpu_run_timeP12trans_threadi
	.p2align	3, 0x0
_Z12gpu_run_timeP12trans_threadi:
	.quad	_Z27__device_stub__gpu_run_timeP12trans_threadi
	.size	_Z12gpu_run_timeP12trans_threadi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"level_size: %d, level_ptr: %d, table_ptr: %d\n"
	.size	.L.str, 46

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"malloc failed: %d\n"
	.size	.L.str.1, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"-n"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Grid dimension is %i x %i\n"
	.size	.L.str.4, 27

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\n============ NOT ENOUGH THREADS TO COVER total addresses=%d ===============\n\n"
	.size	.L.str.5, 79

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Launching %d threads (total_addresses=%d)\n"
	.size	.L.str.6, 43

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"host memory allocation failed: %d\n"
	.size	.L.str.7, 35

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"number of translatable addresses: %d\n"
	.size	.L.str.12, 38

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"total size of page table: %d\n"
	.size	.L.str.13, 30

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Memory Copy for page table from Host to Device"
	.size	.L.str.14, 47

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Memory Copy h_new_threads from Host to Device"
	.size	.L.str.19, 46

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Fatal error: %s (%s at %s:%d)\n"
	.size	.L.str.21, 31

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"hipMemcpy h_new_threads fail"
	.size	.L.str.22, 29

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/raphael-s-norwitz/arch_final_project/master/page_walk.hip"
	.size	.L.str.23, 120

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"*** FAILED - ABORTING\n"
	.size	.L.str.24, 23

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"kernel launch failed with error \"%s\".\n"
	.size	.L.str.25, 39

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"The CPU took %lu microseconds to compute %d addresses. For a table of depth %d.\n"
	.size	.L.str.29, 81

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"Timing results for n = %d\n"
	.size	.L.str.30, 27

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"Calculation time (GPU): %f\n"
	.size	.L.str.31, 28

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"Calculation time (CPU): %f\n"
	.size	.L.str.32, 28

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12gpu_run_timeP12trans_threadi"
	.size	.L__unnamed_1, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"==============================================================================="
	.size	.Lstr, 80

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"host memory allocation succeeded."
	.size	.Lstr.1, 34

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"device memory allocation succeeded."
	.size	.Lstr.2, 36

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"now construct the page table on the host."
	.size	.Lstr.3, 42

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"successful."
	.size	.Lstr.4, 12

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"device memory allocation for d_new_threads succeeded."
	.size	.Lstr.5, 54

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	" successful."
	.size	.Lstr.6, 13

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"kernel launch success!"
	.size	.Lstr.7, 23

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"GPU done!"
	.size	.Lstr.8, 10

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"now do calculation on CPU for comparison!"
	.size	.Lstr.9, 42

	.type	.Lstr.10,@object                # @str.10
.Lstr.10:
	.asciz	"Freeing memory..."
	.size	.Lstr.10, 18

	.type	.Lstr.11,@object                # @str.11
.Lstr.11:
	.asciz	"===================================================="
	.size	.Lstr.11, 53

	.type	.Lstr.13,@object                # @str.13
.Lstr.13:
	.asciz	"device memory allocation for d_new_threads failed."
	.size	.Lstr.13, 51

	.type	.Lstr.14,@object                # @str.14
.Lstr.14:
	.asciz	"failed."
	.size	.Lstr.14, 8

	.type	.Lstr.15,@object                # @str.15
.Lstr.15:
	.asciz	"device memory allocation failed."
	.size	.Lstr.15, 33

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__gpu_run_timeP12trans_threadi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12gpu_run_timeP12trans_threadi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12gpu_run_timeP12trans_threadi ; -- Begin function _Z12gpu_run_timeP12trans_threadi
	.globl	_Z12gpu_run_timeP12trans_threadi
	.p2align	8
	.type	_Z12gpu_run_timeP12trans_threadi,@function
_Z12gpu_run_timeP12trans_threadi:       ; @_Z12gpu_run_timeP12trans_threadi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x10
	s_load_b64 s[2:3], s[0:1], 0x1c
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s15
	s_and_b32 s3, s3, 0xffff
	s_add_i32 s4, s4, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s4, s3, v[1:2]
	v_bfe_u32 v1, v0, 10, 10
	s_load_b32 s3, s[0:1], 0x8
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[3:4], null, v2, s4, v[1:2]
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB0_5
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[2:3], null, 0x68, v0, s[0:1]
	global_load_b64 v[0:1], v[2:3], off offset:96
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, -1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, v0, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.2:                                ; %.lr.ph.i.preheader
	v_add_co_u32 v1, vcc_lo, 0x60, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v3, vcc_lo
	s_mov_b32 s0, 0
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v0, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v0, v4
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_3
; %bb.4:                                ; %_Z13translate_cpuP12trans_thread.exit.loopexit
	s_or_b32 exec_lo, exec_lo, s0
	global_store_b32 v[1:2], v0, off
.LBB0_5:                                ; %_Z13translate_cpuP12trans_thread.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12gpu_run_timeP12trans_threadi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12gpu_run_timeP12trans_threadi, .Lfunc_end0-_Z12gpu_run_timeP12trans_threadi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12gpu_run_timeP12trans_threadi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12gpu_run_timeP12trans_threadi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
