#include <algorithm>
#include <cassert>
#include <cstdlib>
#include <functional>
#include <iostream>
#include <vector>
#include <chrono>

using namespace std;
constexpr int M = 1 << 3 ;        //M =8
constexpr int N = 1 << 3;
constexpr int K = 1 << 3;
constexpr int THREADS = 1 << 2;   


constexpr int M_padded = M + THREADS - M % THREADS;   //8+4 - 8%4 = 12
constexpr int N_padded = N + THREADS - N % THREADS;
constexpr int K_padded = K + THREADS - K % THREADS;

constexpr int SHMEM_SIZE = THREADS * THREADS;         // size de MemSh par threads

__global__ void matrixMul(const int *a, const int *b, int *c);
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c);
void initMatrix(vector<int>& ,int, int);
void afficheMatrix(vector<int>& m,int line, int colone);
auto get_time() { return chrono::high_resolution_clock::now(); }

int main() 
{
  size_t bytes_a = M_padded * K_padded * sizeof(int);        // MxN = MxK * KxN
  size_t bytes_b = K_padded * N_padded * sizeof(int);
  size_t bytes_c = M * N * sizeof(int);

  // CPU
  vector<int> h_a(M_padded * K_padded);                   //12*12
  vector<int> h_b(K_padded * N_padded);                   // 12*12
  vector<int> h_c(M * N);                                 //8*8

  
  initMatrix(h_a,M_padded,K_padded);
  initMatrix(h_b,K_padded,N_padded);
  

  // GPU
  int *d_a, *d_b, *d_c;
  cudaMalloc(&d_a, bytes_a);
  cudaMalloc(&d_b, bytes_b);
  cudaMalloc(&d_c, bytes_c);

  // CPU ---> GPU
  cudaMemcpy(d_a, h_a.data(), bytes_a, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, h_b.data(), bytes_b, cudaMemcpyHostToDevice);

  
  int BLOCKS_X = N_padded / THREADS;                           // 12/4 = 3
  int BLOCKS_Y = M_padded / THREADS;                            // 12/4 =3
  dim3 threads(THREADS, THREADS);                               // (4,4)
  dim3 blocks(BLOCKS_X, BLOCKS_Y);                              // (3,3)
  auto start = get_time();
  matrixMul<<<blocks, threads>>>(d_a, d_b, d_c);                //<<< (3,3), (4,4) >>>
  cudaMemcpy(h_c.data(), d_c, bytes_c, cudaMemcpyDeviceToHost);
  auto finish = get_time();
  auto duration =
      chrono::duration_cast<chrono::milliseconds>(finish - start);
    
  cout << "temps écoulé en kernel = " << duration.count() << " ms\n";
  afficheMatrix(h_c,M,N);
  verify_result(h_a, h_b, h_c);

  cout << "terminé avec succès"<<endl;

  
  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);

  return 0;
}

__global__ void matrixMul(const int *a, const int *b, int *c) 
{  
  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;
  __shared__ int s_a[SHMEM_SIZE];
  __shared__ int s_b[SHMEM_SIZE];

  int tmp = 0;

  for (int i = 0; i < K_padded; i += blockDim.x) 
  {
    s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * K + i + threadIdx.x];
    s_b[threadIdx.y * blockDim.x + threadIdx.x] = b[i * N + threadIdx.y * N + col];
    __syncthreads();

    for (int j = 0; j < blockDim.x; j++) 
      tmp += s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
    __syncthreads();

  }

  if (row < M && col < N) c[row * N + col] = tmp;
}


void verify_result(vector<int> &a, vector<int> &b, vector<int> &c)
{
  for (int row = 0; row < M_padded; row++) 
  {
    if (row >= M) continue;
    for (int col = 0; col < N_padded; col++) 
    {
      if (col >= N) continue;
      int tmp = 0;
      for (int i = 0; i < K_padded; i++) 
        tmp += a[row * K + i] * b[i * N + col];
      assert(tmp == c[row * N + col]);
    }
  }
}



void initMatrix(vector<int>& m,int line, int colone)
{ 
  for (int i = 0; i <line;  i++) 
  {
    for (int j = 0; j < colone; j++)
    { 
      if (i < M && j < K) m[i * K + j] = rand() % 100;
      else m[i * K + j] = 0;
      cout<<m[i]<<" ";
    }
  cout<<endl;
  }
  cout<<"\n_______________________________________"<<endl;
}


void afficheMatrix(vector<int>& m,int line, int colone)
{ 
  for (int i = 0; i <line;  i++) 
  {
    for (int j = 0; j < colone; j++)
    { 
      cout<<m[i]<<" ";
    }
  cout<<endl;
  }
  cout<<"\n_______________________________________"<<endl;
}

	.file	"tmpxft_0022a504_00000000-6_mmul_nonMultiple.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4995:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4995:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB5786:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE5786:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z8get_timev
	.type	_Z8get_timev, @function
_Z8get_timev:
.LFB4985:
	.cfi_startproc
	endbr64
	jmp	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	.cfi_endproc
.LFE4985:
	.size	_Z8get_timev, .-_Z8get_timev
	.globl	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.type	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_, @function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_:
.LFB4990:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE4990:
	.size	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
.LC1:
	.string	"\n_______________________________________"
	.text
	.globl	_Z10initMatrixRSt6vectorIiSaIiEEii
	.type	_Z10initMatrixRSt6vectorIiSaIiEEii, @function
_Z10initMatrixRSt6vectorIiSaIiEEii:
.LFB4991:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, 12(%rsp)
.L6:
	movl	%ebp, 8(%rsp)
	cmpl	%ebp, 12(%rsp)
	jle	.L10
	leal	0(,%rbp,8), %ebx
	leaq	0(,%rbp,4), %r15
	xorl	%r12d, %r12d
	movslq	%ebx, %rbx
	salq	$2, %rbx
.L11:
	cmpl	%r14d, %r12d
	jge	.L20
	cmpl	$7, 8(%rsp)
	jg	.L7
	cmpl	$7, %r12d
	jg	.L7
	call	rand@PLT
	movl	$100, %esi
	movq	0(%r13), %rdi
	cltd
	idivl	%esi
	movl	%edx, (%rdi,%rbx)
	jmp	.L8
.L7:
	movq	0(%r13), %rax
	xorl	%edx, %edx
	movl	%edx, (%rax,%rbx)
.L8:
	movq	0(%r13), %rax
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r12d
	addq	$4, %rbx
	movl	(%rax,%r15), %esi
	call	_ZNSolsEi@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L11
.L20:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbp
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L6
.L10:
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%rax, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE4991:
	.size	_Z10initMatrixRSt6vectorIiSaIiEEii, .-_Z10initMatrixRSt6vectorIiSaIiEEii
	.globl	_Z13afficheMatrixRSt6vectorIiSaIiEEii
	.type	_Z13afficheMatrixRSt6vectorIiSaIiEEii, @function
_Z13afficheMatrixRSt6vectorIiSaIiEEii:
.LFB4992:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 64
.L22:
	cmpl	%ebx, %r13d
	jle	.L24
	leaq	0(,%rbx,4), %r15
	xorl	%ebp, %ebp
.L25:
	cmpl	%r14d, %ebp
	jge	.L27
	movq	(%r12), %rax
	leaq	_ZSt4cout(%rip), %rdi
	incl	%ebp
	movl	(%rax,%r15), %esi
	call	_ZNSolsEi@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L25
.L27:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incq	%rbx
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L22
.L24:
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE4992:
	.size	_Z13afficheMatrixRSt6vectorIiSaIiEEii, .-_Z13afficheMatrixRSt6vectorIiSaIiEEii
	.globl	_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi
	.type	_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi, @function
_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi:
.LFB5017:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9matrixMulPKiS0_Pi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L28:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5017:
	.size	_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi, .-_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi
	.globl	_Z9matrixMulPKiS0_Pi
	.type	_Z9matrixMulPKiS0_Pi, @function
_Z9matrixMulPKiS0_Pi:
.LFB5018:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi
	.cfi_endproc
.LFE5018:
	.size	_Z9matrixMulPKiS0_Pi, .-_Z9matrixMulPKiS0_Pi
	.section	.rodata.str1.1
.LC2:
	.string	"_Z9matrixMulPKiS0_Pi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB5020:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9matrixMulPKiS0_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE5020:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIiSaIiEEC2EmRKS0_.str1.1,"aMS",@progbits,1
.LC3:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.type	_ZNSt6vectorIiSaIiEEC2EmRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:
.LFB5361:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	%rsi, %rax
	jnb	.L36
	leaq	.LC3(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L36:
	movq	%rsi, %rbp
	xorl	%esi, %esi
	movq	%rdi, %rbx
	xorl	%eax, %eax
	movq	%rsi, (%rdi)
	leaq	0(,%rbp,4), %r12
	movq	%rsi, 8(%rdi)
	movq	%rsi, 16(%rdi)
	testq	%rbp, %rbp
	je	.L37
	movq	%r12, %rdi
	call	_Znwm@PLT
.L37:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L38
	xorl	%ecx, %ecx
	addq	$4, %rax
	movl	%ecx, -4(%rax)
	decq	%rbp
	je	.L38
.L39:
	cmpq	%rax, %r12
	je	.L38
	xorl	%edx, %edx
	addq	$4, %rax
	movl	%edx, -4(%rax)
	jmp	.L39
.L38:
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5361:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.weak	_ZNSt6vectorIiSaIiEEC1EmRKS0_
	.set	_ZNSt6vectorIiSaIiEEC1EmRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB5364:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L50
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L50:
	ret
	.cfi_endproc
.LFE5364:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.rodata.str1.1
.LC4:
	.string	"temps \303\251coul\303\251 en kernel = "
.LC5:
	.string	" ms\n"
.LC6:
	.string	"termin\303\251 avec succ\303\250s"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4986:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4986
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$144, %esi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	addq	$-128, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	96(%rsp), %r13
	leaq	48(%rsp), %rbp
	movq	%r13, %rdx
	movq	%rbp, %rdi
	leaq	72(%rsp), %r12
.LEHB0:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE0:
	movq	%r13, %rdx
	movl	$144, %esi
	movq	%r12, %rdi
.LEHB1:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE1:
	leaq	36(%rsp), %rdx
	movl	$64, %esi
	movq	%r13, %rdi
.LEHB2:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE2:
	movl	$12, %edx
	movl	$12, %esi
	movq	%rbp, %rdi
.LEHB3:
	call	_Z10initMatrixRSt6vectorIiSaIiEEii
	movl	$12, %edx
	movl	$12, %esi
	movq	%r12, %rdi
	call	_Z10initMatrixRSt6vectorIiSaIiEEii
	movq	%rsp, %rdi
	movl	$576, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$576, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$256, %esi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$576, %edx
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$576, %edx
	call	cudaMemcpy@PLT
	movabsq	$17179869188, %rax
	movl	$1, 32(%rsp)
	movq	%rax, 24(%rsp)
	movabsq	$12884901891, %rax
	movq	%rax, 36(%rsp)
	movl	$1, 44(%rsp)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	32(%rsp), %ecx
	movl	44(%rsp), %esi
	xorl	%r9d, %r9d
	movq	24(%rsp), %rdx
	movq	36(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %rbx
	call	__cudaPushCallConfiguration@PLT
	movq	16(%rsp), %rdx
	testl	%eax, %eax
	jne	.L53
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z34__device_stub__Z9matrixMulPKiS0_PiPKiS0_Pi
.L53:
	movq	16(%rsp), %rsi
	movq	96(%rsp), %rdi
	movl	$2, %ecx
	movl	$256, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1000000, %ecx
	leaq	_ZSt4cout(%rip), %r14
	leaq	.LC4(%rip), %rsi
	subq	%rbx, %rax
	movq	%r14, %rdi
	cqto
	idivq	%rcx
	movq	%rax, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC5(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8, %edx
	movl	$8, %esi
	movq	%r13, %rdi
	call	_Z13afficheMatrixRSt6vectorIiSaIiEEii
	leaq	.LC6(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%r12, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	%rbp, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	jmp	.L62
.L61:
	endbr64
	movq	%rax, %rbx
.L54:
	movq	%r13, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L55
.L60:
	endbr64
	movq	%rax, %rbx
.L55:
	movq	%r12, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L56
.L59:
	endbr64
	movq	%rax, %rbx
.L56:
	movq	%rbp, %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L62
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L62:
	call	__stack_chk_fail@PLT
.L58:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4986:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4986:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4986-.LLSDACSB4986
.LLSDACSB4986:
	.uleb128 .LEHB0-.LFB4986
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4986
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L59-.LFB4986
	.uleb128 0
	.uleb128 .LEHB2-.LFB4986
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L60-.LFB4986
	.uleb128 0
	.uleb128 .LEHB3-.LFB4986
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L61-.LFB4986
	.uleb128 0
	.uleb128 .LEHB4-.LFB4986
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4986:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <algorithm>
#include <cassert>
#include <cstdlib>
#include <functional>
#include <iostream>
#include <vector>
#include <chrono>

using namespace std;
constexpr int M = 1 << 3 ;        //M =8
constexpr int N = 1 << 3;
constexpr int K = 1 << 3;
constexpr int THREADS = 1 << 2;   


constexpr int M_padded = M + THREADS - M % THREADS;   //8+4 - 8%4 = 12
constexpr int N_padded = N + THREADS - N % THREADS;
constexpr int K_padded = K + THREADS - K % THREADS;

constexpr int SHMEM_SIZE = THREADS * THREADS;         // size de MemSh par threads

__global__ void matrixMul(const int *a, const int *b, int *c);
void verify_result(vector<int> &a, vector<int> &b, vector<int> &c);
void initMatrix(vector<int>& ,int, int);
void afficheMatrix(vector<int>& m,int line, int colone);
auto get_time() { return chrono::high_resolution_clock::now(); }

int main() 
{
  size_t bytes_a = M_padded * K_padded * sizeof(int);        // MxN = MxK * KxN
  size_t bytes_b = K_padded * N_padded * sizeof(int);
  size_t bytes_c = M * N * sizeof(int);

  // CPU
  vector<int> h_a(M_padded * K_padded);                   //12*12
  vector<int> h_b(K_padded * N_padded);                   // 12*12
  vector<int> h_c(M * N);                                 //8*8

  
  initMatrix(h_a,M_padded,K_padded);
  initMatrix(h_b,K_padded,N_padded);
  

  // GPU
  int *d_a, *d_b, *d_c;
  hipMalloc(&d_a, bytes_a);
  hipMalloc(&d_b, bytes_b);
  hipMalloc(&d_c, bytes_c);

  // CPU ---> GPU
  hipMemcpy(d_a, h_a.data(), bytes_a, hipMemcpyHostToDevice);
  hipMemcpy(d_b, h_b.data(), bytes_b, hipMemcpyHostToDevice);

  
  int BLOCKS_X = N_padded / THREADS;                           // 12/4 = 3
  int BLOCKS_Y = M_padded / THREADS;                            // 12/4 =3
  dim3 threads(THREADS, THREADS);                               // (4,4)
  dim3 blocks(BLOCKS_X, BLOCKS_Y);                              // (3,3)
  auto start = get_time();
  matrixMul<<<blocks, threads>>>(d_a, d_b, d_c);                //<<< (3,3), (4,4) >>>
  hipMemcpy(h_c.data(), d_c, bytes_c, hipMemcpyDeviceToHost);
  auto finish = get_time();
  auto duration =
      chrono::duration_cast<chrono::milliseconds>(finish - start);
    
  cout << "temps écoulé en kernel = " << duration.count() << " ms\n";
  afficheMatrix(h_c,M,N);
  verify_result(h_a, h_b, h_c);

  cout << "terminé avec succès"<<endl;

  
  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);

  return 0;
}

__global__ void matrixMul(const int *a, const int *b, int *c) 
{  
  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;
  __shared__ int s_a[SHMEM_SIZE];
  __shared__ int s_b[SHMEM_SIZE];

  int tmp = 0;

  for (int i = 0; i < K_padded; i += blockDim.x) 
  {
    s_a[threadIdx.y * blockDim.x + threadIdx.x] = a[row * K + i + threadIdx.x];
    s_b[threadIdx.y * blockDim.x + threadIdx.x] = b[i * N + threadIdx.y * N + col];
    __syncthreads();

    for (int j = 0; j < blockDim.x; j++) 
      tmp += s_a[threadIdx.y * blockDim.x + j] * s_b[j * blockDim.x + threadIdx.x];
    __syncthreads();

  }

  if (row < M && col < N) c[row * N + col] = tmp;
}


void verify_result(vector<int> &a, vector<int> &b, vector<int> &c)
{
  for (int row = 0; row < M_padded; row++) 
  {
    if (row >= M) continue;
    for (int col = 0; col < N_padded; col++) 
    {
      if (col >= N) continue;
      int tmp = 0;
      for (int i = 0; i < K_padded; i++) 
        tmp += a[row * K + i] * b[i * N + col];
      assert(tmp == c[row * N + col]);
    }
  }
}



void initMatrix(vector<int>& m,int line, int colone)
{ 
  for (int i = 0; i <line;  i++) 
  {
    for (int j = 0; j < colone; j++)
    { 
      if (i < M && j < K) m[i * K + j] = rand() % 100;
      else m[i * K + j] = 0;
      cout<<m[i]<<" ";
    }
  cout<<endl;
  }
  cout<<"\n_______________________________________"<<endl;
}


void afficheMatrix(vector<int>& m,int line, int colone)
{ 
  for (int i = 0; i <line;  i++) 
  {
    for (int j = 0; j < colone; j++)
    { 
      cout<<m[i]<<" ";
    }
  cout<<endl;
  }
  cout<<"\n_______________________________________"<<endl;
}

	.text
	.file	"mmul_nonMultiple.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z8get_timev                    # -- Begin function _Z8get_timev
	.type	_Z8get_timev,@function
_Z8get_timev:                           # @_Z8get_timev
	.cfi_startproc
# %bb.0:
	jmp	_ZNSt6chrono3_V212system_clock3nowEv # TAILCALL
.Lfunc_end0:
	.size	_Z8get_timev, .Lfunc_end0-_Z8get_timev
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$576, %edi                      # imm = 0x240
	callq	_Znwm
	movq	%rax, %rbx
	movq	%rax, 72(%rsp)
	leaq	576(%rax), %r14
	movq	%r14, 88(%rsp)
	movl	$576, %edx                      # imm = 0x240
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r14, 80(%rsp)
.Ltmp0:
	movl	$576, %edi                      # imm = 0x240
	callq	_Znwm
.Ltmp1:
# %bb.1:
	movq	%rax, %r14
	movq	%rax, 48(%rsp)
	movq	%rax, %r15
	addq	$576, %r15                      # imm = 0x240
	movq	%r15, 64(%rsp)
	movl	$576, %edx                      # imm = 0x240
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r15, 56(%rsp)
.Ltmp3:
	movl	$256, %edi                      # imm = 0x100
	callq	_Znwm
.Ltmp4:
# %bb.2:
	movq	%rax, %r15
	movq	%rax, 24(%rsp)
	movq	%rax, %r12
	addq	$256, %r12                      # imm = 0x100
	movq	%r12, 40(%rsp)
	movl	$256, %edx                      # imm = 0x100
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movq	%r12, 32(%rsp)
.Ltmp6:
	leaq	72(%rsp), %rdi
	movl	$12, %esi
	movl	$12, %edx
	callq	_Z10initMatrixRSt6vectorIiSaIiEEii
.Ltmp7:
# %bb.3:
.Ltmp8:
	leaq	48(%rsp), %rdi
	movl	$12, %esi
	movl	$12, %edx
	callq	_Z10initMatrixRSt6vectorIiSaIiEEii
.Ltmp9:
# %bb.4:
.Ltmp11:
	leaq	16(%rsp), %rdi
	movl	$576, %esi                      # imm = 0x240
	callq	hipMalloc
.Ltmp12:
# %bb.5:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit
.Ltmp13:
	leaq	8(%rsp), %rdi
	movl	$576, %esi                      # imm = 0x240
	callq	hipMalloc
.Ltmp14:
# %bb.6:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit32
.Ltmp15:
	movq	%rsp, %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
.Ltmp16:
# %bb.7:                                # %_ZL9hipMallocIiE10hipError_tPPT_m.exit33
	movq	16(%rsp), %rdi
.Ltmp17:
	movl	$576, %edx                      # imm = 0x240
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp18:
# %bb.8:
	movq	8(%rsp), %rdi
.Ltmp19:
	movl	$576, %edx                      # imm = 0x240
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp20:
# %bb.9:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
.Ltmp22:
	movabsq	$12884901891, %rdi              # imm = 0x300000003
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp23:
# %bb.10:
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
.Ltmp24:
	callq	_Z24__device_stub__matrixMulPKiS0_Pi
.Ltmp25:
.LBB1_12:
	movq	(%rsp), %rsi
.Ltmp26:
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp27:
# %bb.13:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r13
.Ltmp29:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp30:
# %bb.14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	subq	%r12, %r13
	movabsq	$4835703278458516699, %rcx      # imm = 0x431BDE82D7B634DB
	movq	%r13, %rax
	imulq	%rcx
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$18, %rdx
	addq	%rdx, %rsi
.Ltmp31:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp32:
# %bb.15:                               # %_ZNSolsEl.exit
.Ltmp33:
	movl	$.L.str.1, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp34:
# %bb.16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit34
.Ltmp35:
	leaq	24(%rsp), %rdi
	movl	$8, %esi
	movl	$8, %edx
	callq	_Z13afficheMatrixRSt6vectorIiSaIiEEii
.Ltmp36:
# %bb.17:
.Ltmp37:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp38:
# %bb.18:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit35
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r12
.Ltmp39:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp40:
# %bb.19:                               # %.noexc
.Ltmp41:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp42:
# %bb.20:                               # %.noexc48
.Ltmp43:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp44:
# %bb.21:                               # %_ZNSolsEPFRSoS_E.exit
	movq	16(%rsp), %rdi
.Ltmp45:
	callq	hipFree
.Ltmp46:
# %bb.22:
	movq	8(%rsp), %rdi
.Ltmp47:
	callq	hipFree
.Ltmp48:
# %bb.23:
	movq	(%rsp), %rdi
.Ltmp49:
	callq	hipFree
.Ltmp50:
# %bb.24:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit39
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$96, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_26:
	.cfi_def_cfa_offset 144
.Ltmp5:
	movq	%rax, %r12
	jmp	.LBB1_32
.LBB1_25:
.Ltmp2:
	movq	%rax, %r12
	jmp	.LBB1_33
.LBB1_27:
.Ltmp10:
	jmp	.LBB1_31
.LBB1_29:
.Ltmp28:
	jmp	.LBB1_31
.LBB1_28:
.Ltmp21:
	jmp	.LBB1_31
.LBB1_30:
.Ltmp51:
.LBB1_31:
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB1_32:
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB1_33:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit45
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp9-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp20-.Ltmp11                #   Call between .Ltmp11 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp27-.Ltmp22                #   Call between .Ltmp22 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp50-.Ltmp29                #   Call between .Ltmp29 and .Ltmp50
	.uleb128 .Ltmp51-.Lfunc_begin0          #     jumps to .Ltmp51
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Lfunc_end1-.Ltmp50            #   Call between .Ltmp50 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z10initMatrixRSt6vectorIiSaIiEEii # -- Begin function _Z10initMatrixRSt6vectorIiSaIiEEii
	.type	_Z10initMatrixRSt6vectorIiSaIiEEii,@function
_Z10initMatrixRSt6vectorIiSaIiEEii:     # @_Z10initMatrixRSt6vectorIiSaIiEEii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%esi, %esi
	jle	.LBB2_8
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r13d, %ebp
	andl	$536870911, %ebp                # imm = 0x1FFFFFFF
	shlq	$5, %rbp
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r15d, %ecx
	orl	%r13d, %ecx
	xorl	%eax, %eax
	testl	$-8, %ecx
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=2
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=2
	movq	(%r14), %rcx
	leaq	(%rcx,%rbp), %rdx
	movl	%eax, (%rdx,%r15,4)
	movl	(%rcx,%r13,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	cmpq	(%rsp), %r13                    # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_8:                                # %._crit_edge19
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end2:
	.size	_Z10initMatrixRSt6vectorIiSaIiEEii, .Lfunc_end2-_Z10initMatrixRSt6vectorIiSaIiEEii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__matrixMulPKiS0_Pi # -- Begin function _Z24__device_stub__matrixMulPKiS0_Pi
	.type	_Z24__device_stub__matrixMulPKiS0_Pi,@function
_Z24__device_stub__matrixMulPKiS0_Pi:   # @_Z24__device_stub__matrixMulPKiS0_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9matrixMulPKiS0_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__matrixMulPKiS0_Pi, .Lfunc_end3-_Z24__device_stub__matrixMulPKiS0_Pi
	.cfi_endproc
                                        # -- End function
	.globl	_Z13afficheMatrixRSt6vectorIiSaIiEEii # -- Begin function _Z13afficheMatrixRSt6vectorIiSaIiEEii
	.type	_Z13afficheMatrixRSt6vectorIiSaIiEEii,@function
_Z13afficheMatrixRSt6vectorIiSaIiEEii:  # @_Z13afficheMatrixRSt6vectorIiSaIiEEii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%esi, %esi
	jle	.LBB4_4
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %r15d
	xorl	%r12d, %r12d
	movl	$_ZSt4cout, %r13d
.LBB4_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	movl	%ebx, %ebp
	testl	%ebx, %ebx
	jle	.LBB4_3
.LBB4_5:                                # %.lr.ph
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r14), %rax
	movl	(%rax,%r12,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	decl	%ebp
	jne	.LBB4_5
.LBB4_3:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	cmpq	%r15, %r12
	jne	.LBB4_2
.LBB4_4:                                # %._crit_edge10
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$40, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end4:
	.size	_Z13afficheMatrixRSt6vectorIiSaIiEEii, .Lfunc_end4-_Z13afficheMatrixRSt6vectorIiSaIiEEii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_ # -- Begin function _Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.type	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_,@function
_Z13verify_resultRSt6vectorIiSaIiEES2_S2_: # @_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end5:
	.size	_Z13verify_resultRSt6vectorIiSaIiEES2_S2_, .Lfunc_end5-_Z13verify_resultRSt6vectorIiSaIiEES2_S2_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9matrixMulPKiS0_Pi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9matrixMulPKiS0_Pi,@object    # @_Z9matrixMulPKiS0_Pi
	.section	.rodata,"a",@progbits
	.globl	_Z9matrixMulPKiS0_Pi
	.p2align	3, 0x0
_Z9matrixMulPKiS0_Pi:
	.quad	_Z24__device_stub__matrixMulPKiS0_Pi
	.size	_Z9matrixMulPKiS0_Pi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"temps \303\251coul\303\251 en kernel = "
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ms\n"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"termin\303\251 avec succ\303\250s"
	.size	.L.str.2, 22

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" "
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n_______________________________________"
	.size	.L.str.4, 41

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9matrixMulPKiS0_Pi"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z24__device_stub__matrixMulPKiS0_Pi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9matrixMulPKiS0_Pi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9matrixMulPKiS0_Pi    ; -- Begin function _Z9matrixMulPKiS0_Pi
	.globl	_Z9matrixMulPKiS0_Pi
	.p2align	8
	.type	_Z9matrixMulPKiS0_Pi,@function
_Z9matrixMulPKiS0_Pi:                   ; @_Z9matrixMulPKiS0_Pi
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v7, v0, 2, 64
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s3, 16
	s_and_b32 s2, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s8, v[1:2]
	v_mul_u32_u24_e32 v9, s2, v1
	v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
	v_cmp_ne_u16_e64 s3, s3, 0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_lshl_u32 v8, v9, v0, 2
	v_lshlrev_b32_e32 v6, 3, v2
	v_lshlrev_b32_e32 v9, 2, v9
	s_lshl_b32 s9, s2, 2
	v_add_nc_u32_e32 v10, 64, v8
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v0, v5 :: v_dual_add_nc_u32 v11, v6, v0
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, s8, v11
	v_add_nc_u32_e32 v14, s8, v1
	v_lshlrev_b64 v[12:13], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v14, 3, v3
	v_lshlrev_b64 v[14:15], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s6, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s3
	global_load_b32 v4, v[12:13], off
	global_load_b32 v12, v[14:15], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v8, v4
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_mov_b32_e32 v4, v7
	s_mov_b32 s10, 0
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v12, s10, v9
	s_add_i32 s10, s10, 4
	ds_load_b32 v14, v4
	ds_load_b32 v15, v12
	v_add_nc_u32_e32 v4, s9, v4
	s_cmp_eq_u32 s9, s10
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[12:13], null, v14, v15, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v12
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s8, s8, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s8, 11
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.5:
	v_max_i32_e32 v1, v2, v3
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 8, v1
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_add_nc_u32_e32 v1, v6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9matrixMulPKiS0_Pi
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9matrixMulPKiS0_Pi, .Lfunc_end0-_Z9matrixMulPKiS0_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9matrixMulPKiS0_Pi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9matrixMulPKiS0_Pi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
