#include <stdio.h>
#include <cuda.h>

typedef unsigned char u8;

typedef struct cell {
    u8 state;
    size_t* neighbor;
    u8 neighborSize;
} cell;

typedef enum type {life, koNeiman, koNeimanMur, koMur} type;

u8*** hStates;
size_t hX, hY, hZ;
type hT;

__device__ u8* dStates;
__device__ size_t *pdX, *pdY, *pdZ;
__device__ type *pdT;

__device__ cell* dCurrent;
__device__ cell* dNext;
__device__ size_t* pdFullSize;

void readInput(const char* inputFile)
{
    FILE* input = fopen(inputFile, "r");
    if (input == NULL) {
        printf("Can't open file %s\n", inputFile);
        exit(-1);
    }
    
    u8 firstLine = 1;
    const int LINE_SIZE = 100;
    char line[LINE_SIZE];
    size_t x, y, z;
    u8 cellState;
    int typeNumber;
    
    size_t i;
    size_t wordStart;
    u8 inWord;
    u8 separator;
    char* word;
    size_t wordSize;
    size_t wordCount;
    
    while (fgets(line, LINE_SIZE, input)) {
        wordCount = 0;
        wordStart = 0;
        inWord = 0;
        i = 0;
        if (firstLine) {
            while (line[i] != '\0') {
                separator = (line[i] == ' ' || line[i] == '\n') ? 1 : 0;
                if (inWord) {
                    if (separator) {
                        inWord = 0;
                        wordSize = i - wordStart;
                        word = (char*) malloc(wordSize + 1);
                        memcpy(word, line + wordStart, (i - wordStart) * sizeof(char));
                        word[wordSize] = '\0';
                        
                        switch (wordCount) {
                            case 0:
                                hX = (size_t)atoi(word);
                                break;
                            case 1:
                                hY = (size_t)atoi(word);
                                break;
                            case 2:
                                hZ = (size_t)atoi(word);
                                break;
                            case 3:
                                typeNumber = atoi(word);
                                switch (typeNumber) {
                                    case 1:
                                        hT = life;
                                        break;
                                    case 2:
                                        hT = koNeiman;
                                        break;
                                    case 3:
                                        hT = koNeimanMur;
                                        break;
                                    case 4:
                                        hT = koMur;
                                        break;
                                    default:
                                        printf("Wrong type of simulation: %d\n", typeNumber);
                                        exit(-1);
                                }
                                break;
                            default:
                                printf("Too much words in a line: %s\n", line);
                                exit(-1);
                        }
                        
                        free(word);
                        wordCount++;
                    }
                }
                else if (!separator) {
                    inWord = 1;
                    wordStart = i;
                }
                i++;
            }
            firstLine = 0;
            
            hStates = (u8***) malloc(hX * sizeof(u8**));
            for (x = 0; x < hX; x++) {
                hStates[x] = (u8**) malloc(hY * sizeof(u8*));
                for (y = 0; y < hY; y++) {
                    hStates[x][y] = (u8*) malloc(hZ * sizeof(u8));
                    for (z = 0; z < hZ; z++)
                        hStates[x][y][z] = 0;
                }
            }
        }
        else {
            while (line[i] != '\0') {
                separator = (line[i] == ' ' || line[i] == '\n') ? 1 : 0;
                if (inWord) {
                    if (separator) {
                        inWord = 0;
                        wordSize = i - wordStart;
                        word = (char*) malloc(wordSize + 1);
                        memcpy(word, line + wordStart, (i - wordStart) * sizeof(char));
                        word[wordSize] = '\0';
                        
                        switch (wordCount) {
                            case 0:
                                cellState = (u8)atoi(word);
                                if (cellState == 0)
                                    goto stop;
                                break;
                            case 1:
                                x = (size_t)atoi(word);
                                break;
                            case 2:
                                y = (size_t)atoi(word);
                                break;
                            case 3:
                                z = (size_t)atoi(word);
                                break;
                            default:
                                printf("Too much words in a line: %s\n", line);
                                exit(-1);
                        }
                        free(word);
                        wordCount++;
                    }
                }
                else if (!separator) {
                    inWord = 1;
                    wordStart = i;
                }
                i++;
            }
            hStates[x][y][z] = cellState;
        }
    }
    
stop:
    fclose(input);
}

void passStatesToDevice()
{
    size_t i, j;
    cudaMalloc((void**)&dStates, hX * hY * hZ * sizeof(u8));
    for (i = 0; i < hX; i++)
        for (j = 0; j < hY; j++)
            cudaMemcpy(&dStates[i * hY * hZ + j * hZ], hStates[i][j], hZ * sizeof(u8), cudaMemcpyHostToDevice);
    
    cudaMalloc((void**)&pdX, sizeof(size_t));
    cudaMemcpy(pdX, &hX, sizeof(size_t), cudaMemcpyHostToDevice);
    
    cudaMalloc((void**)&pdY, sizeof(size_t));
    cudaMemcpy(pdY, &hY, sizeof(size_t), cudaMemcpyHostToDevice);
    
    cudaMalloc((void**)&pdZ, sizeof(size_t));
    cudaMemcpy(pdZ, &hZ, sizeof(size_t), cudaMemcpyHostToDevice);
    
    cudaMalloc((void**)&pdT, sizeof(type));
    cudaMemcpy(pdT, &hT, sizeof(type), cudaMemcpyHostToDevice);
    
    cudaMalloc((void**)&pdFullSize, sizeof(size_t));
    size_t size = hX * hY * hZ;
    cudaMemcpy(pdFullSize, &size, sizeof(size_t), cudaMemcpyHostToDevice);
    
    cudaMalloc((void**)&dCurrent, size * sizeof(cell));
    cudaMalloc((void**)&dNext, size * sizeof(cell));
    
    u8 neighborSize = 6;
    for (i = 0; i < size; i++) {
        cudaMemcpy(&dCurrent[i].neighborSize, &neighborSize, sizeof(u8), cudaMemcpyHostToDevice);
        cudaMemcpy(&dNext[i].neighborSize, &neighborSize, sizeof(u8), cudaMemcpyHostToDevice);
                
        size_t* tmp1;
        size_t* tmp2;
        cudaMalloc((void**)&tmp1, neighborSize * sizeof(size_t));
        cudaMalloc((void**)&tmp2, neighborSize * sizeof(size_t));
        cudaMemcpy(&dCurrent[i].neighbor, &tmp1, neighborSize * sizeof(size_t), cudaMemcpyDeviceToDevice);
        cudaMemcpy(&dNext[i].neighbor, &tmp2, neighborSize * sizeof(size_t), cudaMemcpyDeviceToDevice);
    }
}

__device__ void idx3to1(size_t x, size_t y, size_t z, size_t* i)
{
    *i = x * (*pdY) * (*pdZ) + y * (*pdZ) + z;
}

__device__ void idx1to3(size_t i, size_t* x, size_t* y, size_t* z)
{
    *x = i / (*pdY) / (*pdZ);
    i -= (*x) * (*pdY) * (*pdZ);
    *y = i / (*pdZ);
    i -= (*y) * (*pdZ);
    *z = i;
}

__device__ size_t plus(size_t i, size_t* max)
{
    return (i == *max - 1) ? 0 : ++i;
}

__device__ size_t minus(size_t i, size_t* max)
{
    return (i == 0) ? *max - 1 : --i;
}

__global__ void transformStatesIntoCells()
{
    int idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        dCurrent[idx].state = dNext[idx].state = dStates[idx];
        
        size_t x, y, z;
        idx1to3(idx, &x, &y, &z);
        
        size_t xn[2], yn[2], zn[2];
        xn[0] = minus(x, pdX);
        xn[1] = plus(x, pdX);
        yn[0] = minus(y, pdY);
        yn[1] = plus(y, pdY);
        zn[0] = minus(z, pdZ);
        zn[1] = plus(z, pdZ);
        
        int i, j, k;
        size_t neighborIdx;
        int neighborCount = 0;
        for (i = 0; i < 2; i++)
            for (j = 0; j < 2; j++)
                for (k = 0; k < 2; k++) {
                    idx3to1(xn[i], yn[j], zn[k], &neighborIdx);
                    dCurrent[idx].neighbor[neighborCount] = dNext[idx].neighbor[neighborCount] = neighborIdx;
                    neighborCount++;
                }
        
        idx += blockDim.x;
    }
    __syncthreads();
}

__global__ void calc()
{
    int idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        u8 s = 0;
        int i;
        for (i = 0; i < dCurrent[idx].neighborSize; i++)
            if (dCurrent[dCurrent[idx].neighbor[i]].state)
                s++;
        
        if (dCurrent[idx].state) {
            if (s < 4)
                dNext[idx].state = 0;
        }
        else {
            if (s >= 6)
                dNext[idx].state = 1;
        }
        idx += blockDim.x;
    }
    __syncthreads();
    
    idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        dCurrent[idx].state = dNext[idx].state;
        idx += blockDim.x;
    }
    __syncthreads();
}

__global__ void transformCellsIntoStates()
{
    int idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        dStates[idx] = dCurrent[idx].state;
        idx += blockDim.x;
    }
    __syncthreads();
}

void getDataFromDevice(size_t nThreads)
{
    transformCellsIntoStates<<<1, nThreads>>>();
    
    size_t i, j;
    for (i = 0; i < hX; i++)
        for (j = 0; j < hY; j++)
            cudaMemcpy(hStates[i][j], &dStates[i * hY * hZ + j * hZ], hZ * sizeof(u8), cudaMemcpyDeviceToHost);
}

void print(const char* outputFile)
{
    FILE* output = fopen(outputFile, "a");
    if (output == NULL) {
        printf("Can't open file %s\n", outputFile);
        exit(-1);
    }
    
    size_t i, j, k;
    for (i = 0; i < hX; i++)
        for (j = 0; j < hY; j++)
            for (k = 0; k < hZ; k++)
                fprintf(output, "%d %ld %ld %ld\n", hStates[i][j][k], i, j, k);
    fprintf(output, "0 0 0 0\n");
    fclose(output);
}

void printResults(const char* outputFile, size_t nThreads)
{
    getDataFromDevice(nThreads);
    print(outputFile);
}

void clean()
{
    cudaFree(dStates);
    cudaFree(pdX);
    cudaFree(pdY);
    cudaFree(pdZ);
    cudaFree(pdT);
    
    /*size_t i;
    for (i = 0; i < hX * hY * hZ; i++) {
        cudaFree(dCurrent[i].neighbor);
        cudaFree(dNext[i].neighbor);
    }*/
    cudaFree(dCurrent);
    cudaFree(dNext);
    cudaFree(pdFullSize);
    
    size_t x, y;
    for (x = 0; x < hX; x++) {
        for (y = 0; y < hY; y++)
            free(hStates[x][y]);
        free(hStates[x]);
    }
    cudaFree(hStates);
}

void gameOfLife(const char* inputFile, int nSteps, int outputInterval, const char* outputFile)
{
    readInput(inputFile);
    printf("Input file has been read\n");
    passStatesToDevice();
    printf("States have been copied to device\n");
    
    int device;
    cudaGetDevice(&device);
    
    struct cudaDeviceProp prop;
    cudaGetDeviceProperties(&prop, device);
    
    transformStatesIntoCells<<<1, prop.maxThreadsDim[0]>>>();
    printf("Neighbors have been set\n");
    
    FILE* output = fopen(outputFile, "w");
    if (output == NULL) {
        printf("Can't open file %s\n", outputFile);
        exit(-1);
    }
    fclose(output);
    
    print(outputFile);
    printf("Output\n");
    
    int i;
    for (i = 1; i <= nSteps; i++) {
        calc<<<1, prop.maxThreadsDim[0]>>>();
        printf("Step %d\n", i);
        if (i % outputInterval == 0) {
            printResults(outputFile, prop.maxThreadsDim[0]);
            printf("Output\n");
        }
    }
    
    clean();
    printf("Memory has been set free\n");
}

int main(int argc, const char * argv[])
{
    if (argc != 5)
        printf("Usage: %s inputFile nSteps outputInterval outputFile\n", argv[0]);
    else
    {
        const char* inputFile = argv[1];
        int nSteps = atoi(argv[2]);
        int outputInterval = atoi(argv[3]);
        const char* outputFile = argv[4];
        
        gameOfLife(inputFile, nSteps, outputInterval, outputFile);
    }
    return 0;
}

	.file	"tmpxft_002ccd1b_00000000-6_\321\201ellular_auto.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2041:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2041:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"Can't open file %s\n"
.LC2:
	.string	"Wrong type of simulation: %d\n"
.LC3:
	.string	"Too much words in a line: %s\n"
	.text
	.globl	_Z9readInputPKc
	.type	_Z9readInputPKc, @function
_Z9readInputPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	52(%rsp), %r13
	call	fopen@PLT
	movb	$1, 8(%rsp)
	movq	%rax, 16(%rsp)
	testq	%rax, %rax
	jne	.L3
	movq	%r14, %rdx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	jmp	.L58
.L61:
	testq	%r14, %r14
	jne	.L52
	movq	(%rsp), %rdi
	call	atoi@PLT
	cltq
	movq	%rax, hX(%rip)
.L14:
	movq	(%rsp), %rdi
	incq	%r14
	call	free@PLT
	xorl	%eax, %eax
.L7:
	incq	%rbx
.L4:
	movb	0(%r13,%rbx), %cl
	testb	%cl, %cl
	je	.L60
	cmpb	$10, %cl
	sete	%dl
	cmpb	$32, %cl
	sete	%cl
	orl	%ecx, %edx
	testb	%al, %al
	je	.L6
	testb	%dl, %dl
	je	.L7
	movq	%rbx, %rax
	subq	%r15, %rax
	leaq	1(%rax), %rcx
	movq	%rax, 24(%rsp)
	movq	%rcx, %rdi
	movq	%rcx, 40(%rsp)
	call	malloc@PLT
	movq	40(%rsp), %rcx
	movq	24(%rsp), %rdx
	leaq	0(%r13,%r15), %rsi
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	__memcpy_chk@PLT
	movq	(%rsp), %rax
	movq	24(%rsp), %rsi
	movb	$0, (%rax,%rsi)
	cmpq	$2, %r14
	je	.L8
	jbe	.L61
	cmpq	$3, %r14
	je	.L12
.L13:
	movq	%r13, %rdx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
.L58:
	call	__printf_chk@PLT
.L57:
	orl	$-1, %edi
	call	exit@PLT
.L38:
	cmpb	$0, 8(%rsp)
	jne	.L42
	xorl	%edx, %edx
	xorl	%ecx, %ecx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
	movq	%rdx, 8(%rsp)
.L5:
	movq	8(%rsp), %rax
	movb	0(%r13,%rax), %dl
	testb	%dl, %dl
	jne	.L37
	movq	hStates(%rip), %rax
	movb	39(%rsp), %cl
	movq	(%rax,%rbx,8), %rax
	movq	(%rax,%rbp,8), %rax
	movb	%cl, (%rax,%r12)
.L28:
	movb	$0, 8(%rsp)
.L3:
	movq	16(%rsp), %rcx
	movl	$100, %edx
	movl	$100, %esi
	movq	%r13, %rdi
	call	__fgets_chk@PLT
	testq	%rax, %rax
	jne	.L38
	jmp	.L39
.L42:
	xorl	%r14d, %r14d
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	xorl	%ebx, %ebx
	jmp	.L4
.L52:
	movq	(%rsp), %rdi
	call	atoi@PLT
	cltq
	movq	%rax, hY(%rip)
	jmp	.L14
.L8:
	movq	(%rsp), %rdi
	call	atoi@PLT
	cltq
	movq	%rax, hZ(%rip)
	jmp	.L14
.L12:
	movq	(%rsp), %rdi
	call	atoi@PLT
	movl	%eax, %edx
	cmpl	$3, %eax
	je	.L15
	jg	.L16
	cmpl	$1, %eax
	je	.L17
	cmpl	$2, %eax
	jne	.L19
	movl	$1, hT(%rip)
	jmp	.L14
.L16:
	cmpl	$4, %eax
	jne	.L19
	movl	$3, hT(%rip)
	jmp	.L14
.L17:
	xorl	%eax, %eax
	movl	%eax, hT(%rip)
	jmp	.L14
.L15:
	movl	$2, hT(%rip)
	jmp	.L14
.L19:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L57
.L6:
	movb	8(%rsp), %sil
	testb	%dl, %dl
	cmove	%rbx, %r15
	cmove	%esi, %eax
	jmp	.L7
.L60:
	movq	hX(%rip), %rax
	xorl	%ebx, %ebx
	leaq	0(,%rax,8), %rdi
	call	malloc@PLT
	movq	%rax, hStates(%rip)
.L22:
	cmpq	hX(%rip), %rbx
	jnb	.L28
	movq	hY(%rip), %rax
	movq	hStates(%rip), %rbp
	leaq	0(,%rbx,8), %r14
	leaq	0(,%rax,8), %rdi
	addq	%r14, %rbp
	call	malloc@PLT
	movq	%rax, 0(%rbp)
	xorl	%ebp, %ebp
.L23:
	cmpq	hY(%rip), %rbp
	jnb	.L62
	movq	hStates(%rip), %rax
	movq	hZ(%rip), %rdi
	leaq	0(,%rbp,8), %r15
	movq	(%rax,%r14), %r12
	call	malloc@PLT
	addq	%r15, %r12
	movq	%rax, (%r12)
	xorl	%r12d, %r12d
.L24:
	cmpq	hZ(%rip), %r12
	jnb	.L63
	movq	hStates(%rip), %rax
	movq	(%rax,%r14), %rax
	movq	(%rax,%r15), %rax
	movb	$0, (%rax,%r12)
	incq	%r12
	jmp	.L24
.L63:
	incq	%rbp
	jmp	.L23
.L62:
	incq	%rbx
	jmp	.L22
.L37:
	cmpb	$10, %dl
	sete	%al
	cmpb	$32, %dl
	sete	%dl
	orl	%edx, %eax
	testb	%cl, %cl
	je	.L29
	testb	%al, %al
	je	.L30
	movq	8(%rsp), %rax
	subq	%r15, %rax
	leaq	1(%rax), %rcx
	movq	%rax, 24(%rsp)
	movq	%rcx, %rdi
	movq	%rcx, 40(%rsp)
	call	malloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rcx
	leaq	0(%r13,%r15), %rsi
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	__memcpy_chk@PLT
	movq	(%rsp), %rax
	movq	24(%rsp), %rdx
	movb	$0, (%rax,%rdx)
	cmpq	$2, %r14
	je	.L31
	ja	.L32
	testq	%r14, %r14
	jne	.L53
	movq	(%rsp), %rdi
	call	atoi@PLT
	movb	%al, 39(%rsp)
	testb	%al, %al
	jne	.L36
.L39:
	movq	16(%rsp), %rdi
	call	fclose@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L32:
	cmpq	$3, %r14
	jne	.L13
	movq	(%rsp), %rdi
	call	atoi@PLT
	movslq	%eax, %r12
	jmp	.L36
.L53:
	movq	(%rsp), %rdi
	call	atoi@PLT
	movslq	%eax, %rbx
	jmp	.L36
.L31:
	movq	(%rsp), %rdi
	call	atoi@PLT
	movslq	%eax, %rbp
.L36:
	movq	(%rsp), %rdi
	incq	%r14
	call	free@PLT
	xorl	%ecx, %ecx
	jmp	.L30
.L29:
	testb	%al, %al
	cmove	8(%rsp), %r15
	sete	%cl
.L30:
	incq	8(%rsp)
	jmp	.L5
.L40:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9readInputPKc, .-_Z9readInputPKc
	.globl	_Z18passStatesToDevicev
	.type	_Z18passStatesToDevicev, @function
_Z18passStatesToDevicev:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	_ZL7dStates(%rip), %rdi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	hX(%rip), %rsi
	imulq	hY(%rip), %rsi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	imulq	hZ(%rip), %rsi
	call	cudaMalloc@PLT
.L65:
	cmpq	hX(%rip), %rbp
	jnb	.L67
	leaq	0(,%rbp,8), %r12
	xorl	%ebx, %ebx
.L68:
	movq	hY(%rip), %rdi
	cmpq	%rdi, %rbx
	jnb	.L73
	movq	hStates(%rip), %rax
	imulq	%rbp, %rdi
	movl	$1, %ecx
	movq	hZ(%rip), %rdx
	movq	(%rax,%r12), %rax
	addq	%rbx, %rdi
	movq	(%rax,%rbx,8), %rsi
	imulq	%rdx, %rdi
	addq	_ZL7dStates(%rip), %rdi
	incq	%rbx
	call	cudaMemcpy@PLT
	jmp	.L68
.L73:
	incq	%rbp
	jmp	.L65
.L67:
	movl	$8, %esi
	leaq	_ZL3pdX(%rip), %rdi
	xorl	%ebp, %ebp
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	_ZL3pdX(%rip), %rdi
	movl	$8, %edx
	leaq	hX(%rip), %rsi
	leaq	15(%rsp), %r12
	call	cudaMemcpy@PLT
	movl	$8, %esi
	leaq	_ZL3pdY(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	_ZL3pdY(%rip), %rdi
	movl	$8, %edx
	leaq	hY(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$8, %esi
	leaq	_ZL3pdZ(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	_ZL3pdZ(%rip), %rdi
	movl	$8, %edx
	leaq	hZ(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$4, %esi
	leaq	_ZL3pdT(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movq	_ZL3pdT(%rip), %rdi
	movl	$4, %edx
	leaq	hT(%rip), %rsi
	call	cudaMemcpy@PLT
	movl	$8, %esi
	leaq	_ZL10pdFullSize(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$8, %edx
	movq	hX(%rip), %rax
	imulq	hY(%rip), %rax
	movq	_ZL10pdFullSize(%rip), %rdi
	leaq	16(%rsp), %rsi
	imulq	hZ(%rip), %rax
	movq	%rax, 16(%rsp)
	call	cudaMemcpy@PLT
	imulq	$24, 16(%rsp), %rsi
	leaq	_ZL8dCurrent(%rip), %rdi
	call	cudaMalloc@PLT
	imulq	$24, 16(%rsp), %rsi
	leaq	_ZL5dNext(%rip), %rdi
	call	cudaMalloc@PLT
	movb	$6, 15(%rsp)
.L69:
	cmpq	16(%rsp), %rbp
	jnb	.L74
	imulq	$24, %rbp, %rbx
	movl	$1, %ecx
	movq	%r12, %rsi
	incq	%rbp
	movl	$1, %edx
	leaq	24(%rsp), %r14
	leaq	32(%rsp), %r13
	movq	_ZL8dCurrent(%rip), %rdi
	addq	%rbx, %rdi
	addq	$16, %rdi
	call	cudaMemcpy@PLT
	movq	_ZL5dNext(%rip), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1, %edx
	addq	%rbx, %rdi
	addq	$16, %rdi
	call	cudaMemcpy@PLT
	movzbl	15(%rsp), %esi
	movq	%r14, %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movzbl	15(%rsp), %esi
	movq	%r13, %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movq	_ZL8dCurrent(%rip), %rdi
	movzbl	15(%rsp), %edx
	movq	%r14, %rsi
	movl	$3, %ecx
	addq	%rbx, %rdi
	salq	$3, %rdx
	addq	$8, %rdi
	call	cudaMemcpy@PLT
	movzbl	15(%rsp), %edx
	movl	$3, %ecx
	movq	%r13, %rsi
	addq	_ZL5dNext(%rip), %rbx
	salq	$3, %rdx
	leaq	8(%rbx), %rdi
	call	cudaMemcpy@PLT
	jmp	.L69
.L74:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z18passStatesToDevicev, .-_Z18passStatesToDevicev
	.globl	_Z7idx3to1mmmPm
	.type	_Z7idx3to1mmmPm, @function
_Z7idx3to1mmmPm:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z7idx3to1mmmPm, .-_Z7idx3to1mmmPm
	.globl	_Z7idx1to3mPmS_S_
	.type	_Z7idx1to3mPmS_S_, @function
_Z7idx1to3mPmS_S_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z7idx1to3mPmS_S_, .-_Z7idx1to3mPmS_S_
	.globl	_Z4plusmPm
	.type	_Z4plusmPm, @function
_Z4plusmPm:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z4plusmPm, .-_Z4plusmPm
	.globl	_Z5minusmPm
	.type	_Z5minusmPm, @function
_Z5minusmPm:
.LFB2187:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z4plusmPm
	.cfi_endproc
.LFE2187:
	.size	_Z5minusmPm, .-_Z5minusmPm
	.section	.rodata.str1.1
.LC4:
	.string	"a"
.LC5:
	.string	"%d %ld %ld %ld\n"
.LC6:
	.string	"0 0 0 0\n"
	.text
	.globl	_Z5printPKc
	.type	_Z5printPKc, @function
_Z5printPKc:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC4(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%r8
	.cfi_def_cfa_offset 64
	call	fopen@PLT
	testq	%rax, %rax
	jne	.L92
	movl	$2, %edi
	movq	%rbp, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L92:
	movq	%rax, %rbx
	xorl	%r12d, %r12d
.L84:
	cmpq	hX(%rip), %r12
	jnb	.L88
	leaq	0(,%r12,8), %r15
	xorl	%ebp, %ebp
.L89:
	cmpq	hY(%rip), %rbp
	jnb	.L86
	leaq	0(,%rbp,8), %r14
	xorl	%r13d, %r13d
.L87:
	cmpq	hZ(%rip), %r13
	jnb	.L94
	movq	hStates(%rip), %rax
	movq	%rbp, %r9
	movq	%r12, %r8
	movq	%rbx, %rdi
	movl	$2, %esi
	movq	(%rax,%r15), %rax
	movq	(%rax,%r14), %rax
	movzbl	(%rax,%r13), %ecx
	pushq	%rdx
	.cfi_def_cfa_offset 72
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rdx
	pushq	%r13
	.cfi_def_cfa_offset 80
	incq	%r13
	call	__fprintf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 72
	popq	%rsi
	.cfi_def_cfa_offset 64
	jmp	.L87
.L94:
	incq	%rbp
	jmp	.L89
.L86:
	incq	%r12
	jmp	.L84
.L88:
	movq	%rbx, %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 56
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2034:
	.size	_Z5printPKc, .-_Z5printPKc
	.globl	_Z5cleanv
	.type	_Z5cleanv, @function
_Z5cleanv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	_ZL7dStates(%rip), %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	cudaFree@PLT
	movq	_ZL3pdX(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL3pdY(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL3pdZ(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL3pdT(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL8dCurrent(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL5dNext(%rip), %rdi
	call	cudaFree@PLT
	movq	_ZL10pdFullSize(%rip), %rdi
	call	cudaFree@PLT
.L96:
	cmpq	hX(%rip), %rbp
	jnb	.L98
	leaq	0(,%rbp,8), %r12
	xorl	%ebx, %ebx
.L99:
	movq	hStates(%rip), %rax
	cmpq	hY(%rip), %rbx
	movq	(%rax,%r12), %rdi
	jnb	.L101
	movq	(%rdi,%rbx,8), %rdi
	incq	%rbx
	call	free@PLT
	jmp	.L99
.L101:
	call	free@PLT
	incq	%rbp
	jmp	.L96
.L98:
	movq	hStates(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2036:
	.size	_Z5cleanv, .-_Z5cleanv
	.globl	_Z43__device_stub__Z24transformStatesIntoCellsvv
	.type	_Z43__device_stub__Z24transformStatesIntoCellsvv, @function
_Z43__device_stub__Z24transformStatesIntoCellsvv:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L102
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z24transformStatesIntoCellsv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L102:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L104
	call	__stack_chk_fail@PLT
.L104:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z43__device_stub__Z24transformStatesIntoCellsvv, .-_Z43__device_stub__Z24transformStatesIntoCellsvv
	.globl	_Z24transformStatesIntoCellsv
	.type	_Z24transformStatesIntoCellsv, @function
_Z24transformStatesIntoCellsv:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z24transformStatesIntoCellsvv
	.cfi_endproc
.LFE2064:
	.size	_Z24transformStatesIntoCellsv, .-_Z24transformStatesIntoCellsv
	.globl	_Z22__device_stub__Z4calcvv
	.type	_Z22__device_stub__Z4calcvv, @function
_Z22__device_stub__Z4calcvv:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L107
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z4calcv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L107:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L109
	call	__stack_chk_fail@PLT
.L109:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z22__device_stub__Z4calcvv, .-_Z22__device_stub__Z4calcvv
	.globl	_Z4calcv
	.type	_Z4calcv, @function
_Z4calcv:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z22__device_stub__Z4calcvv
	.cfi_endproc
.LFE2066:
	.size	_Z4calcv, .-_Z4calcv
	.globl	_Z43__device_stub__Z24transformCellsIntoStatesvv
	.type	_Z43__device_stub__Z24transformCellsIntoStatesvv, @function
_Z43__device_stub__Z24transformCellsIntoStatesvv:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L112
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z24transformCellsIntoStatesv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L112:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L114
	call	__stack_chk_fail@PLT
.L114:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z43__device_stub__Z24transformCellsIntoStatesvv, .-_Z43__device_stub__Z24transformCellsIntoStatesvv
	.globl	_Z24transformCellsIntoStatesv
	.type	_Z24transformCellsIntoStatesv, @function
_Z24transformCellsIntoStatesv:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z24transformCellsIntoStatesvv
	.cfi_endproc
.LFE2068:
	.size	_Z24transformCellsIntoStatesv, .-_Z24transformCellsIntoStatesv
	.globl	_Z17getDataFromDevicem
	.type	_Z17getDataFromDevicem, @function
_Z17getDataFromDevicem:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movl	%edi, 20(%rsp)
	movabsq	$4294967297, %rdi
	movq	%rdi, 24(%rsp)
	movl	28(%rsp), %ecx
	movq	20(%rsp), %rdx
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L118
	call	_Z43__device_stub__Z24transformCellsIntoStatesvv
.L118:
	xorl	%ebp, %ebp
.L119:
	cmpq	hX(%rip), %rbp
	jnb	.L117
	leaq	0(,%rbp,8), %r12
	xorl	%ebx, %ebx
.L122:
	movq	hY(%rip), %rsi
	cmpq	%rsi, %rbx
	jnb	.L124
	movq	hStates(%rip), %rax
	imulq	%rbp, %rsi
	movl	$2, %ecx
	movq	hZ(%rip), %rdx
	movq	(%rax,%r12), %rax
	addq	%rbx, %rsi
	movq	(%rax,%rbx,8), %rdi
	imulq	%rdx, %rsi
	addq	_ZL7dStates(%rip), %rsi
	incq	%rbx
	call	cudaMemcpy@PLT
	jmp	.L122
.L124:
	incq	%rbp
	jmp	.L119
.L117:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z17getDataFromDevicem, .-_Z17getDataFromDevicem
	.globl	_Z12printResultsPKcm
	.type	_Z12printResultsPKcm, @function
_Z12printResultsPKcm:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	call	_Z17getDataFromDevicem
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_Z5printPKc
	.cfi_endproc
.LFE2035:
	.size	_Z12printResultsPKcm, .-_Z12printResultsPKcm
	.section	.rodata.str1.1
.LC7:
	.string	"Input file has been read\n"
.LC8:
	.string	"States have been copied to device\n"
.LC9:
	.string	"Neighbors have been set\n"
.LC10:
	.string	"w"
.LC11:
	.string	"Output\n"
.LC12:
	.string	"Step %d\n"
.LC13:
	.string	"Memory has been set free\n"
	.text
	.globl	_Z10gameOfLifePKciiS0_
	.type	_Z10gameOfLifePKciiS0_, @function
_Z10gameOfLifePKciiS0_:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1080, %rsp
	.cfi_def_cfa_offset 1136
	movq	%fs:40, %rax
	movq	%rax, 1064(%rsp)
	xorl	%eax, %eax
	call	_Z9readInputPKc
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	_Z18passStatesToDevicev
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	4(%rsp), %esi
	leaq	32(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movl	356(%rsp), %eax
	movl	$1, 16(%rsp)
	movabsq	$4294967297, %rdi
	movq	%rdi, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%eax, 20(%rsp)
	movq	20(%rsp), %rdx
	movq	%rdi, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L128
	call	_Z43__device_stub__Z24transformStatesIntoCellsvv
.L128:
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	leaq	.LC10(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %rdi
	testq	%rax, %rax
	jne	.L129
	movl	$2, %edi
	movq	%rbp, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L129:
	call	fclose@PLT
	movq	%rbp, %rdi
	leaq	.LC11(%rip), %r15
	movl	$1, %ebx
	call	_Z5printPKc
	movq	%r15, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movabsq	$4294967297, %r14
.L130:
	cmpl	%r13d, %ebx
	jg	.L136
	movl	356(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdi
	movq	%r14, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	$1, %esi
	movl	%eax, 20(%rsp)
	movq	20(%rsp), %rdx
	movq	%r14, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L131
	call	_Z22__device_stub__Z4calcvv
.L131:
	movl	%ebx, %edx
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %eax
	cltd
	idivl	%r12d
	testl	%edx, %edx
	jne	.L132
	movslq	356(%rsp), %rsi
	movq	%rbp, %rdi
	call	_Z12printResultsPKcm
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L132:
	incl	%ebx
	jmp	.L130
.L136:
	call	_Z5cleanv
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC13(%rip), %rsi
	call	__printf_chk@PLT
	movq	1064(%rsp), %rax
	subq	%fs:40, %rax
	je	.L134
	call	__stack_chk_fail@PLT
.L134:
	addq	$1080, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z10gameOfLifePKciiS0_, .-_Z10gameOfLifePKciiS0_
	.section	.rodata.str1.1
.LC14:
	.string	"Usage: %s inputFile nSteps outputInterval outputFile\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	cmpl	$5, %edi
	je	.L138
	movq	(%rsi), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rsi
	call	__printf_chk@PLT
	jmp	.L139
.L138:
	movq	16(%rsi), %rdi
	movq	8(%rsi), %r12
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movq	32(%rbx), %rcx
	movl	%ebp, %esi
	movq	%r12, %rdi
	movl	%eax, %edx
	call	_Z10gameOfLifePKciiS0_
.L139:
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z24transformCellsIntoStatesv"
.LC16:
	.string	"_Z4calcv"
.LC17:
	.string	"_Z24transformStatesIntoCellsv"
.LC18:
	.string	"dStates"
.LC19:
	.string	"pdX"
.LC20:
	.string	"pdY"
.LC21:
	.string	"pdZ"
.LC22:
	.string	"pdT"
.LC23:
	.string	"dCurrent"
.LC24:
	.string	"dNext"
.LC25:
	.string	"pdFullSize"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z24transformCellsIntoStatesv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4calcv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24transformStatesIntoCellsv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movl	$8, %r9d
	leaq	_ZL7dStates(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL3pdX(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL3pdY(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL3pdZ(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL3pdT(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL8dCurrent(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL5dNext(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$8, %r9d
	movq	%rdx, %rcx
	leaq	_ZL10pdFullSize(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL10pdFullSize
	.comm	_ZL10pdFullSize,8,8
	.local	_ZL5dNext
	.comm	_ZL5dNext,8,8
	.local	_ZL8dCurrent
	.comm	_ZL8dCurrent,8,8
	.local	_ZL3pdT
	.comm	_ZL3pdT,8,8
	.local	_ZL3pdZ
	.comm	_ZL3pdZ,8,8
	.local	_ZL3pdY
	.comm	_ZL3pdY,8,8
	.local	_ZL3pdX
	.comm	_ZL3pdX,8,8
	.local	_ZL7dStates
	.comm	_ZL7dStates,8,8
	.globl	hT
	.bss
	.align 4
	.type	hT, @object
	.size	hT, 4
hT:
	.zero	4
	.globl	hZ
	.align 8
	.type	hZ, @object
	.size	hZ, 8
hZ:
	.zero	8
	.globl	hY
	.align 8
	.type	hY, @object
	.size	hY, 8
hY:
	.zero	8
	.globl	hX
	.align 8
	.type	hX, @object
	.size	hX, 8
hX:
	.zero	8
	.globl	hStates
	.align 8
	.type	hStates, @object
	.size	hStates, 8
hStates:
	.zero	8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

typedef unsigned char u8;

typedef struct cell {
    u8 state;
    size_t* neighbor;
    u8 neighborSize;
} cell;

typedef enum type {life, koNeiman, koNeimanMur, koMur} type;

u8*** hStates;
size_t hX, hY, hZ;
type hT;

__device__ u8* dStates;
__device__ size_t *pdX, *pdY, *pdZ;
__device__ type *pdT;

__device__ cell* dCurrent;
__device__ cell* dNext;
__device__ size_t* pdFullSize;

void readInput(const char* inputFile)
{
    FILE* input = fopen(inputFile, "r");
    if (input == NULL) {
        printf("Can't open file %s\n", inputFile);
        exit(-1);
    }
    
    u8 firstLine = 1;
    const int LINE_SIZE = 100;
    char line[LINE_SIZE];
    size_t x, y, z;
    u8 cellState;
    int typeNumber;
    
    size_t i;
    size_t wordStart;
    u8 inWord;
    u8 separator;
    char* word;
    size_t wordSize;
    size_t wordCount;
    
    while (fgets(line, LINE_SIZE, input)) {
        wordCount = 0;
        wordStart = 0;
        inWord = 0;
        i = 0;
        if (firstLine) {
            while (line[i] != '\0') {
                separator = (line[i] == ' ' || line[i] == '\n') ? 1 : 0;
                if (inWord) {
                    if (separator) {
                        inWord = 0;
                        wordSize = i - wordStart;
                        word = (char*) malloc(wordSize + 1);
                        memcpy(word, line + wordStart, (i - wordStart) * sizeof(char));
                        word[wordSize] = '\0';
                        
                        switch (wordCount) {
                            case 0:
                                hX = (size_t)atoi(word);
                                break;
                            case 1:
                                hY = (size_t)atoi(word);
                                break;
                            case 2:
                                hZ = (size_t)atoi(word);
                                break;
                            case 3:
                                typeNumber = atoi(word);
                                switch (typeNumber) {
                                    case 1:
                                        hT = life;
                                        break;
                                    case 2:
                                        hT = koNeiman;
                                        break;
                                    case 3:
                                        hT = koNeimanMur;
                                        break;
                                    case 4:
                                        hT = koMur;
                                        break;
                                    default:
                                        printf("Wrong type of simulation: %d\n", typeNumber);
                                        exit(-1);
                                }
                                break;
                            default:
                                printf("Too much words in a line: %s\n", line);
                                exit(-1);
                        }
                        
                        free(word);
                        wordCount++;
                    }
                }
                else if (!separator) {
                    inWord = 1;
                    wordStart = i;
                }
                i++;
            }
            firstLine = 0;
            
            hStates = (u8***) malloc(hX * sizeof(u8**));
            for (x = 0; x < hX; x++) {
                hStates[x] = (u8**) malloc(hY * sizeof(u8*));
                for (y = 0; y < hY; y++) {
                    hStates[x][y] = (u8*) malloc(hZ * sizeof(u8));
                    for (z = 0; z < hZ; z++)
                        hStates[x][y][z] = 0;
                }
            }
        }
        else {
            while (line[i] != '\0') {
                separator = (line[i] == ' ' || line[i] == '\n') ? 1 : 0;
                if (inWord) {
                    if (separator) {
                        inWord = 0;
                        wordSize = i - wordStart;
                        word = (char*) malloc(wordSize + 1);
                        memcpy(word, line + wordStart, (i - wordStart) * sizeof(char));
                        word[wordSize] = '\0';
                        
                        switch (wordCount) {
                            case 0:
                                cellState = (u8)atoi(word);
                                if (cellState == 0)
                                    goto stop;
                                break;
                            case 1:
                                x = (size_t)atoi(word);
                                break;
                            case 2:
                                y = (size_t)atoi(word);
                                break;
                            case 3:
                                z = (size_t)atoi(word);
                                break;
                            default:
                                printf("Too much words in a line: %s\n", line);
                                exit(-1);
                        }
                        free(word);
                        wordCount++;
                    }
                }
                else if (!separator) {
                    inWord = 1;
                    wordStart = i;
                }
                i++;
            }
            hStates[x][y][z] = cellState;
        }
    }
    
stop:
    fclose(input);
}

void passStatesToDevice()
{
    size_t i, j;
    hipMalloc((void**)&dStates, hX * hY * hZ * sizeof(u8));
    for (i = 0; i < hX; i++)
        for (j = 0; j < hY; j++)
            hipMemcpy(&dStates[i * hY * hZ + j * hZ], hStates[i][j], hZ * sizeof(u8), hipMemcpyHostToDevice);
    
    hipMalloc((void**)&pdX, sizeof(size_t));
    hipMemcpy(pdX, &hX, sizeof(size_t), hipMemcpyHostToDevice);
    
    hipMalloc((void**)&pdY, sizeof(size_t));
    hipMemcpy(pdY, &hY, sizeof(size_t), hipMemcpyHostToDevice);
    
    hipMalloc((void**)&pdZ, sizeof(size_t));
    hipMemcpy(pdZ, &hZ, sizeof(size_t), hipMemcpyHostToDevice);
    
    hipMalloc((void**)&pdT, sizeof(type));
    hipMemcpy(pdT, &hT, sizeof(type), hipMemcpyHostToDevice);
    
    hipMalloc((void**)&pdFullSize, sizeof(size_t));
    size_t size = hX * hY * hZ;
    hipMemcpy(pdFullSize, &size, sizeof(size_t), hipMemcpyHostToDevice);
    
    hipMalloc((void**)&dCurrent, size * sizeof(cell));
    hipMalloc((void**)&dNext, size * sizeof(cell));
    
    u8 neighborSize = 6;
    for (i = 0; i < size; i++) {
        hipMemcpy(&dCurrent[i].neighborSize, &neighborSize, sizeof(u8), hipMemcpyHostToDevice);
        hipMemcpy(&dNext[i].neighborSize, &neighborSize, sizeof(u8), hipMemcpyHostToDevice);
                
        size_t* tmp1;
        size_t* tmp2;
        hipMalloc((void**)&tmp1, neighborSize * sizeof(size_t));
        hipMalloc((void**)&tmp2, neighborSize * sizeof(size_t));
        hipMemcpy(&dCurrent[i].neighbor, &tmp1, neighborSize * sizeof(size_t), hipMemcpyDeviceToDevice);
        hipMemcpy(&dNext[i].neighbor, &tmp2, neighborSize * sizeof(size_t), hipMemcpyDeviceToDevice);
    }
}

__device__ void idx3to1(size_t x, size_t y, size_t z, size_t* i)
{
    *i = x * (*pdY) * (*pdZ) + y * (*pdZ) + z;
}

__device__ void idx1to3(size_t i, size_t* x, size_t* y, size_t* z)
{
    *x = i / (*pdY) / (*pdZ);
    i -= (*x) * (*pdY) * (*pdZ);
    *y = i / (*pdZ);
    i -= (*y) * (*pdZ);
    *z = i;
}

__device__ size_t plus(size_t i, size_t* max)
{
    return (i == *max - 1) ? 0 : ++i;
}

__device__ size_t minus(size_t i, size_t* max)
{
    return (i == 0) ? *max - 1 : --i;
}

__global__ void transformStatesIntoCells()
{
    int idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        dCurrent[idx].state = dNext[idx].state = dStates[idx];
        
        size_t x, y, z;
        idx1to3(idx, &x, &y, &z);
        
        size_t xn[2], yn[2], zn[2];
        xn[0] = minus(x, pdX);
        xn[1] = plus(x, pdX);
        yn[0] = minus(y, pdY);
        yn[1] = plus(y, pdY);
        zn[0] = minus(z, pdZ);
        zn[1] = plus(z, pdZ);
        
        int i, j, k;
        size_t neighborIdx;
        int neighborCount = 0;
        for (i = 0; i < 2; i++)
            for (j = 0; j < 2; j++)
                for (k = 0; k < 2; k++) {
                    idx3to1(xn[i], yn[j], zn[k], &neighborIdx);
                    dCurrent[idx].neighbor[neighborCount] = dNext[idx].neighbor[neighborCount] = neighborIdx;
                    neighborCount++;
                }
        
        idx += blockDim.x;
    }
    __syncthreads();
}

__global__ void calc()
{
    int idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        u8 s = 0;
        int i;
        for (i = 0; i < dCurrent[idx].neighborSize; i++)
            if (dCurrent[dCurrent[idx].neighbor[i]].state)
                s++;
        
        if (dCurrent[idx].state) {
            if (s < 4)
                dNext[idx].state = 0;
        }
        else {
            if (s >= 6)
                dNext[idx].state = 1;
        }
        idx += blockDim.x;
    }
    __syncthreads();
    
    idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        dCurrent[idx].state = dNext[idx].state;
        idx += blockDim.x;
    }
    __syncthreads();
}

__global__ void transformCellsIntoStates()
{
    int idx = threadIdx.x;
    while (idx <= *pdFullSize) {
        dStates[idx] = dCurrent[idx].state;
        idx += blockDim.x;
    }
    __syncthreads();
}

void getDataFromDevice(size_t nThreads)
{
    transformCellsIntoStates<<<1, nThreads>>>();
    
    size_t i, j;
    for (i = 0; i < hX; i++)
        for (j = 0; j < hY; j++)
            hipMemcpy(hStates[i][j], &dStates[i * hY * hZ + j * hZ], hZ * sizeof(u8), hipMemcpyDeviceToHost);
}

void print(const char* outputFile)
{
    FILE* output = fopen(outputFile, "a");
    if (output == NULL) {
        printf("Can't open file %s\n", outputFile);
        exit(-1);
    }
    
    size_t i, j, k;
    for (i = 0; i < hX; i++)
        for (j = 0; j < hY; j++)
            for (k = 0; k < hZ; k++)
                fprintf(output, "%d %ld %ld %ld\n", hStates[i][j][k], i, j, k);
    fprintf(output, "0 0 0 0\n");
    fclose(output);
}

void printResults(const char* outputFile, size_t nThreads)
{
    getDataFromDevice(nThreads);
    print(outputFile);
}

void clean()
{
    hipFree(dStates);
    hipFree(pdX);
    hipFree(pdY);
    hipFree(pdZ);
    hipFree(pdT);
    
    /*size_t i;
    for (i = 0; i < hX * hY * hZ; i++) {
        cudaFree(dCurrent[i].neighbor);
        cudaFree(dNext[i].neighbor);
    }*/
    hipFree(dCurrent);
    hipFree(dNext);
    hipFree(pdFullSize);
    
    size_t x, y;
    for (x = 0; x < hX; x++) {
        for (y = 0; y < hY; y++)
            free(hStates[x][y]);
        free(hStates[x]);
    }
    hipFree(hStates);
}

void gameOfLife(const char* inputFile, int nSteps, int outputInterval, const char* outputFile)
{
    readInput(inputFile);
    printf("Input file has been read\n");
    passStatesToDevice();
    printf("States have been copied to device\n");
    
    int device;
    hipGetDevice(&device);
    
    struct hipDeviceProp_t prop;
    hipGetDeviceProperties(&prop, device);
    
    transformStatesIntoCells<<<1, prop.maxThreadsDim[0]>>>();
    printf("Neighbors have been set\n");
    
    FILE* output = fopen(outputFile, "w");
    if (output == NULL) {
        printf("Can't open file %s\n", outputFile);
        exit(-1);
    }
    fclose(output);
    
    print(outputFile);
    printf("Output\n");
    
    int i;
    for (i = 1; i <= nSteps; i++) {
        calc<<<1, prop.maxThreadsDim[0]>>>();
        printf("Step %d\n", i);
        if (i % outputInterval == 0) {
            printResults(outputFile, prop.maxThreadsDim[0]);
            printf("Output\n");
        }
    }
    
    clean();
    printf("Memory has been set free\n");
}

int main(int argc, const char * argv[])
{
    if (argc != 5)
        printf("Usage: %s inputFile nSteps outputInterval outputFile\n", argv[0]);
    else
    {
        const char* inputFile = argv[1];
        int nSteps = atoi(argv[2]);
        int outputInterval = atoi(argv[3]);
        const char* outputFile = argv[4];
        
        gameOfLife(inputFile, nSteps, outputInterval, outputFile);
    }
    return 0;
}

	.text
	.file	"\321\201ellular_auto.hip"
	.globl	_Z9readInputPKc                 # -- Begin function _Z9readInputPKc
	.type	_Z9readInputPKc,@function
_Z9readInputPKc:                        # @_Z9readInputPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %r14
	movl	$.L.str, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB0_60
# %bb.1:
	leaq	48(%rsp), %rdi
	movl	$100, %esi
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%rax, %rdx
	callq	fgets
	testq	%rax, %rax
	je	.LBB0_55
# %bb.2:                                # %.lr.ph158.preheader
	xorl	%ecx, %ecx
                                        # implicit-def: $al
	movl	%eax, 20(%rsp)                  # 4-byte Spill
                                        # implicit-def: $r13
                                        # implicit-def: $r14
                                        # implicit-def: $rbx
.LBB0_3:                                # %.lr.ph158
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_20 Depth 2
                                        #     Child Loop BB0_41 Depth 2
                                        #       Child Loop BB0_43 Depth 3
                                        #         Child Loop BB0_45 Depth 4
                                        #     Child Loop BB0_5 Depth 2
	testb	$1, %cl
	je	.LBB0_19
# %bb.4:                                # %.preheader.preheader
                                        #   in Loop: Header=BB0_3 Depth=1
	xorl	%r15d, %r15d
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
.LBB0_5:                                # %.preheader
                                        #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movzbl	48(%rsp,%r15), %ecx
	cmpl	$10, %ecx
	je	.LBB0_9
# %bb.6:                                # %.preheader
                                        #   in Loop: Header=BB0_5 Depth=2
	cmpl	$32, %ecx
	je	.LBB0_9
# %bb.7:                                # %.preheader
                                        #   in Loop: Header=BB0_5 Depth=2
	testl	%ecx, %ecx
	je	.LBB0_52
# %bb.8:                                # %switch.edge115.thread
                                        #   in Loop: Header=BB0_5 Depth=2
	testb	%al, %al
	movq	32(%rsp), %rax                  # 8-byte Reload
	cmoveq	%r15, %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movb	$1, %al
	jmp	.LBB0_18
.LBB0_9:                                # %switch.edge115
                                        #   in Loop: Header=BB0_5 Depth=2
	testb	%al, %al
	je	.LBB0_17
# %bb.10:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movq	24(%rsp), %r12                  # 8-byte Reload
	movq	32(%rsp), %rbp                  # 8-byte Reload
	subq	%rbp, %r12
	leaq	1(%r12), %rdi
	callq	malloc
	movq	%rax, %r15
	leaq	(%rsp,%rbp), %rsi
	addq	$48, %rsi
	movq	%rax, %rdi
	movq	%r12, %rdx
	movq	24(%rsp), %r12                  # 8-byte Reload
	callq	memcpy@PLT
	movq	%r15, %rax
	subq	%rbp, %rax
	movb	$0, (%rax,%r12)
	cmpq	$3, 8(%rsp)                     # 8-byte Folded Reload
	ja	.LBB0_56
# %bb.11:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%r15, %rcx
	movq	%r12, %r15
	movq	8(%rsp), %rax                   # 8-byte Reload
	jmpq	*.LJTI0_2(,%rax,8)
.LBB0_12:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%rcx, %rbp
	movq	%rcx, %rdi
	callq	atoi
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	testb	%al, %al
	jne	.LBB0_16
	jmp	.LBB0_55
.LBB0_13:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%rcx, %rbp
	movq	%rcx, %rdi
	callq	atoi
	movslq	%eax, %r14
	jmp	.LBB0_16
.LBB0_14:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%rcx, %rbp
	movq	%rcx, %rdi
	callq	atoi
	movslq	%eax, %r13
	jmp	.LBB0_16
.LBB0_15:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%rcx, %rbp
	movq	%rcx, %rdi
	callq	atoi
	movslq	%eax, %rbx
.LBB0_16:                               #   in Loop: Header=BB0_5 Depth=2
	movq	%rbp, %rdi
	callq	free
	incq	8(%rsp)                         # 8-byte Folded Spill
.LBB0_17:                               # %.thread122
                                        #   in Loop: Header=BB0_5 Depth=2
	xorl	%eax, %eax
.LBB0_18:                               # %.thread122
                                        #   in Loop: Header=BB0_5 Depth=2
	incq	%r15
	jmp	.LBB0_5
.LBB0_19:                               # %.preheader127.preheader
                                        #   in Loop: Header=BB0_3 Depth=1
	xorl	%ebx, %ebx
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	xorl	%eax, %eax
	xorl	%r12d, %r12d
.LBB0_20:                               # %.preheader127
                                        #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movzbl	48(%rsp,%rbx), %ecx
	cmpl	$10, %ecx
	je	.LBB0_24
# %bb.21:                               # %.preheader127
                                        #   in Loop: Header=BB0_20 Depth=2
	cmpl	$32, %ecx
	je	.LBB0_24
# %bb.22:                               # %.preheader127
                                        #   in Loop: Header=BB0_20 Depth=2
	testl	%ecx, %ecx
	je	.LBB0_39
# %bb.23:                               # %switch.edge.thread
                                        #   in Loop: Header=BB0_20 Depth=2
	testb	%al, %al
	movq	8(%rsp), %rax                   # 8-byte Reload
	cmoveq	%rbx, %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movb	$1, %al
	jmp	.LBB0_35
.LBB0_24:                               # %switch.edge
                                        #   in Loop: Header=BB0_20 Depth=2
	testb	%al, %al
	je	.LBB0_34
# %bb.25:                               #   in Loop: Header=BB0_20 Depth=2
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %r12
	movq	8(%rsp), %rbp                   # 8-byte Reload
	subq	%rbp, %r12
	leaq	1(%r12), %rdi
	callq	malloc
	movq	%rax, %r15
	leaq	(%rsp,%rbp), %rsi
	addq	$48, %rsi
	movq	%rax, %rdi
	movq	%r12, %rdx
	movq	24(%rsp), %r12                  # 8-byte Reload
	callq	memcpy@PLT
	movq	%r15, %rax
	subq	%rbp, %rax
	movb	$0, (%rax,%rbx)
	cmpq	$3, %r12
	ja	.LBB0_56
# %bb.26:                               #   in Loop: Header=BB0_20 Depth=2
	jmpq	*.LJTI0_0(,%r12,8)
.LBB0_27:                               #   in Loop: Header=BB0_20 Depth=2
	movq	%r15, %rdi
	callq	atoi
	cltq
	movq	%rax, hX(%rip)
	jmp	.LBB0_33
.LBB0_28:                               #   in Loop: Header=BB0_20 Depth=2
	movq	%r15, %rdi
	callq	atoi
	cltq
	movq	%rax, hZ(%rip)
	jmp	.LBB0_33
.LBB0_29:                               #   in Loop: Header=BB0_20 Depth=2
	movq	%r15, %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	leal	-1(%rax), %ecx
	cmpl	$3, %ecx
	ja	.LBB0_59
# %bb.30:                               #   in Loop: Header=BB0_20 Depth=2
	jmpq	*.LJTI0_1(,%rcx,8)
.LBB0_31:                               #   in Loop: Header=BB0_20 Depth=2
	movl	$0, hT(%rip)
	jmp	.LBB0_33
.LBB0_32:                               #   in Loop: Header=BB0_20 Depth=2
	movq	%r15, %rdi
	callq	atoi
	cltq
	movq	%rax, hY(%rip)
.LBB0_33:                               #   in Loop: Header=BB0_20 Depth=2
	movq	%r15, %rdi
	callq	free
	incq	%r12
.LBB0_34:                               # %.thread
                                        #   in Loop: Header=BB0_20 Depth=2
	xorl	%eax, %eax
.LBB0_35:                               # %.thread
                                        #   in Loop: Header=BB0_20 Depth=2
	incq	%rbx
	jmp	.LBB0_20
.LBB0_36:                               #   in Loop: Header=BB0_20 Depth=2
	movl	$2, hT(%rip)
	jmp	.LBB0_33
.LBB0_37:                               #   in Loop: Header=BB0_20 Depth=2
	movl	$3, hT(%rip)
	jmp	.LBB0_33
.LBB0_38:                               #   in Loop: Header=BB0_20 Depth=2
	movl	$1, hT(%rip)
	jmp	.LBB0_33
.LBB0_39:                               #   in Loop: Header=BB0_3 Depth=1
	movq	hX(%rip), %r15
	leaq	(,%r15,8), %rdi
	callq	malloc
	movq	%rax, hStates(%rip)
	testq	%r15, %r15
	je	.LBB0_53
# %bb.40:                               # %.lr.ph147.preheader
                                        #   in Loop: Header=BB0_3 Depth=1
	movq	hY(%rip), %r12
	movq	%r12, %rbp
	xorl	%ebx, %ebx
.LBB0_41:                               # %.lr.ph147
                                        #   Parent Loop BB0_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_43 Depth 3
                                        #         Child Loop BB0_45 Depth 4
	leaq	(,%rbp,8), %rdi
	callq	malloc
	movq	hStates(%rip), %rcx
	movq	%rax, (%rcx,%rbx,8)
	testq	%rbp, %rbp
	je	.LBB0_50
# %bb.42:                               # %.lr.ph140.preheader
                                        #   in Loop: Header=BB0_41 Depth=2
	movq	hZ(%rip), %r15
	xorl	%r14d, %r14d
.LBB0_43:                               # %.lr.ph140
                                        #   Parent Loop BB0_3 Depth=1
                                        #     Parent Loop BB0_41 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB0_45 Depth 4
	movq	%r15, %rdi
	callq	malloc
	movq	hStates(%rip), %rcx
	movq	(%rcx,%rbx,8), %rcx
	movq	%rax, (%rcx,%r14,8)
	testq	%r15, %r15
	je	.LBB0_47
# %bb.44:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_43 Depth=3
	xorl	%r13d, %r13d
.LBB0_45:                               # %.lr.ph
                                        #   Parent Loop BB0_3 Depth=1
                                        #     Parent Loop BB0_41 Depth=2
                                        #       Parent Loop BB0_43 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movq	hStates(%rip), %rax
	movq	(%rax,%rbx,8), %rax
	movq	(%rax,%r14,8), %rax
	movb	$0, (%rax,%r13)
	incq	%r13
	movq	hZ(%rip), %r15
	cmpq	%r15, %r13
	jb	.LBB0_45
# %bb.46:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB0_43 Depth=3
	movq	hY(%rip), %r12
	jmp	.LBB0_48
.LBB0_47:                               #   in Loop: Header=BB0_43 Depth=3
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
.LBB0_48:                               # %._crit_edge
                                        #   in Loop: Header=BB0_43 Depth=3
	incq	%r14
	cmpq	%r12, %r14
	jb	.LBB0_43
# %bb.49:                               # %._crit_edge141.loopexit
                                        #   in Loop: Header=BB0_41 Depth=2
	movq	hX(%rip), %r15
	movq	%r12, %rbp
	jmp	.LBB0_51
.LBB0_50:                               #   in Loop: Header=BB0_41 Depth=2
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB0_51:                               # %._crit_edge141
                                        #   in Loop: Header=BB0_41 Depth=2
	incq	%rbx
	cmpq	%r15, %rbx
	jb	.LBB0_41
	jmp	.LBB0_54
.LBB0_52:                               #   in Loop: Header=BB0_3 Depth=1
	movq	hStates(%rip), %rax
	movq	(%rax,%rbx,8), %rax
	movq	(%rax,%r14,8), %rax
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movb	%cl, (%rax,%r13)
	jmp	.LBB0_54
.LBB0_53:                               #   in Loop: Header=BB0_3 Depth=1
	xorl	%ebx, %ebx
.LBB0_54:                               # %.loopexit126
                                        #   in Loop: Header=BB0_3 Depth=1
	leaq	48(%rsp), %rdi
	movl	$100, %esi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	callq	fgets
	movb	$1, %cl
	testq	%rax, %rax
	jne	.LBB0_3
.LBB0_55:                               # %.loopexit
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	fclose
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_56:
	.cfi_def_cfa_offset 208
	leaq	48(%rsp), %rsi
	movl	$.L.str.3, %edi
.LBB0_57:
	xorl	%eax, %eax
	callq	printf
.LBB0_58:
	movl	$-1, %edi
	callq	exit
.LBB0_59:
	movl	$.L.str.2, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB0_58
.LBB0_60:
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	jmp	.LBB0_57
.Lfunc_end0:
	.size	_Z9readInputPKc, .Lfunc_end0-_Z9readInputPKc
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI0_0:
	.quad	.LBB0_27
	.quad	.LBB0_32
	.quad	.LBB0_28
	.quad	.LBB0_29
.LJTI0_1:
	.quad	.LBB0_31
	.quad	.LBB0_38
	.quad	.LBB0_36
	.quad	.LBB0_37
.LJTI0_2:
	.quad	.LBB0_12
	.quad	.LBB0_15
	.quad	.LBB0_13
	.quad	.LBB0_14
                                        # -- End function
	.text
	.globl	_Z18passStatesToDevicev         # -- Begin function _Z18passStatesToDevicev
	.type	_Z18passStatesToDevicev,@function
_Z18passStatesToDevicev:                # @_Z18passStatesToDevicev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	hY(%rip), %rsi
	imulq	hX(%rip), %rsi
	imulq	hZ(%rip), %rsi
	movl	$dStates, %edi
	callq	hipMalloc
	movq	hX(%rip), %rax
	testq	%rax, %rax
	je	.LBB1_8
# %bb.1:                                # %.preheader.preheader
	movq	hY(%rip), %rdi
	xorl	%ebx, %ebx
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	testq	%rdi, %rdi
	je	.LBB1_3
# %bb.4:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%r14d, %r14d
.LBB1_5:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	hZ(%rip), %rdx
	imulq	%rbx, %rdi
	addq	%r14, %rdi
	imulq	%rdx, %rdi
	addq	dStates(%rip), %rdi
	movq	hStates(%rip), %rax
	movq	(%rax,%rbx,8), %rax
	movq	(%rax,%r14,8), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	incq	%r14
	movq	hY(%rip), %rdi
	cmpq	%rdi, %r14
	jb	.LBB1_5
# %bb.6:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	hX(%rip), %rax
	jmp	.LBB1_7
.LBB1_3:                                #   in Loop: Header=BB1_2 Depth=1
	xorl	%edi, %edi
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rbx
	cmpq	%rax, %rbx
	jb	.LBB1_2
.LBB1_8:                                # %._crit_edge18
	movl	$pdX, %edi
	movl	$8, %esi
	callq	hipMalloc
	movq	pdX(%rip), %rdi
	movl	$hX, %esi
	movl	$8, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$pdY, %edi
	movl	$8, %esi
	callq	hipMalloc
	movq	pdY(%rip), %rdi
	movl	$hY, %esi
	movl	$8, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$pdZ, %edi
	movl	$8, %esi
	callq	hipMalloc
	movq	pdZ(%rip), %rdi
	movl	$hZ, %esi
	movl	$8, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$pdT, %edi
	movl	$4, %esi
	callq	hipMalloc
	movq	pdT(%rip), %rdi
	movl	$hT, %esi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$pdFullSize, %edi
	movl	$8, %esi
	callq	hipMalloc
	movq	hY(%rip), %rax
	imulq	hX(%rip), %rax
	imulq	hZ(%rip), %rax
	leaq	8(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	pdFullSize(%rip), %rdi
	movl	$8, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,2), %rsi
	movl	$dCurrent, %edi
	callq	hipMalloc
	movq	(%rbx), %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,2), %rsi
	movl	$dNext, %edi
	callq	hipMalloc
	movb	$6, 7(%rsp)
	cmpq	$0, (%rbx)
	je	.LBB1_11
# %bb.9:                                # %.lr.ph21.preheader
	movl	$16, %r12d
	xorl	%r13d, %r13d
	leaq	7(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
.LBB1_10:                               # %.lr.ph21
                                        # =>This Inner Loop Header: Depth=1
	movq	dCurrent(%rip), %rdi
	addq	%r12, %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dNext(%rip), %rdi
	addq	%r12, %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movzbl	7(%rsp), %esi
	shll	$3, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	movzbl	7(%rsp), %esi
	shll	$3, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	dCurrent(%rip), %rax
	leaq	(%rax,%r12), %rdi
	addq	$-8, %rdi
	movzbl	7(%rsp), %edx
	shll	$3, %edx
	movq	%r14, %rsi
	movl	$3, %ecx
	callq	hipMemcpy
	movq	dNext(%rip), %rax
	leaq	(%rax,%r12), %rdi
	addq	$-8, %rdi
	movzbl	7(%rsp), %edx
	shll	$3, %edx
	movq	%r15, %rsi
	movl	$3, %ecx
	callq	hipMemcpy
	incq	%r13
	addq	$24, %r12
	cmpq	8(%rsp), %r13
	jb	.LBB1_10
.LBB1_11:                               # %._crit_edge22
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18passStatesToDevicev, .Lfunc_end1-_Z18passStatesToDevicev
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__transformStatesIntoCellsv # -- Begin function _Z39__device_stub__transformStatesIntoCellsv
	.type	_Z39__device_stub__transformStatesIntoCellsv,@function
_Z39__device_stub__transformStatesIntoCellsv: # @_Z39__device_stub__transformStatesIntoCellsv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z24transformStatesIntoCellsv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z39__device_stub__transformStatesIntoCellsv, .Lfunc_end2-_Z39__device_stub__transformStatesIntoCellsv
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__calcv        # -- Begin function _Z19__device_stub__calcv
	.type	_Z19__device_stub__calcv,@function
_Z19__device_stub__calcv:               # @_Z19__device_stub__calcv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z4calcv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z19__device_stub__calcv, .Lfunc_end3-_Z19__device_stub__calcv
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__transformCellsIntoStatesv # -- Begin function _Z39__device_stub__transformCellsIntoStatesv
	.type	_Z39__device_stub__transformCellsIntoStatesv,@function
_Z39__device_stub__transformCellsIntoStatesv: # @_Z39__device_stub__transformCellsIntoStatesv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z24transformCellsIntoStatesv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z39__device_stub__transformCellsIntoStatesv, .Lfunc_end4-_Z39__device_stub__transformCellsIntoStatesv
	.cfi_endproc
                                        # -- End function
	.globl	_Z17getDataFromDevicem          # -- Begin function _Z17getDataFromDevicem
	.type	_Z17getDataFromDevicem,@function
_Z17getDataFromDevicem:                 # @_Z17getDataFromDevicem
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%edi, %edx
	btsq	$32, %rdx
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	callq	_Z39__device_stub__transformCellsIntoStatesv
.LBB5_2:
	movq	hX(%rip), %rax
	testq	%rax, %rax
	je	.LBB5_10
# %bb.3:                                # %.preheader.preheader
	movq	hY(%rip), %rsi
	xorl	%ebx, %ebx
.LBB5_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_7 Depth 2
	testq	%rsi, %rsi
	je	.LBB5_5
# %bb.6:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB5_4 Depth=1
	xorl	%r14d, %r14d
.LBB5_7:                                # %.lr.ph
                                        #   Parent Loop BB5_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	hStates(%rip), %rax
	movq	(%rax,%rbx,8), %rax
	movq	(%rax,%r14,8), %rdi
	movq	hZ(%rip), %rdx
	imulq	%rbx, %rsi
	addq	%r14, %rsi
	imulq	%rdx, %rsi
	addq	dStates(%rip), %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	incq	%r14
	movq	hY(%rip), %rsi
	cmpq	%rsi, %r14
	jb	.LBB5_7
# %bb.8:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB5_4 Depth=1
	movq	hX(%rip), %rax
	jmp	.LBB5_9
.LBB5_5:                                #   in Loop: Header=BB5_4 Depth=1
	xorl	%esi, %esi
.LBB5_9:                                # %._crit_edge
                                        #   in Loop: Header=BB5_4 Depth=1
	incq	%rbx
	cmpq	%rax, %rbx
	jb	.LBB5_4
.LBB5_10:                               # %._crit_edge18
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z17getDataFromDevicem, .Lfunc_end5-_Z17getDataFromDevicem
	.cfi_endproc
                                        # -- End function
	.globl	_Z5printPKc                     # -- Begin function _Z5printPKc
	.type	_Z5printPKc,@function
_Z5printPKc:                            # @_Z5printPKc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %r14
	movl	$.L.str.4, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB6_15
# %bb.1:                                # %.preheader21
	movq	%rax, %rbx
	movq	hX(%rip), %rcx
	testq	%rcx, %rcx
	je	.LBB6_14
# %bb.2:                                # %.preheader20.preheader
	movq	hY(%rip), %rax
	movq	%rax, %rdx
	xorl	%r14d, %r14d
.LBB6_3:                                # %.preheader20
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_6 Depth 2
                                        #       Child Loop BB6_9 Depth 3
	testq	%rdx, %rdx
	je	.LBB6_4
# %bb.5:                                # %.preheader.preheader
                                        #   in Loop: Header=BB6_3 Depth=1
	movq	hZ(%rip), %rcx
	xorl	%r15d, %r15d
.LBB6_6:                                # %.preheader
                                        #   Parent Loop BB6_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_9 Depth 3
	testq	%rcx, %rcx
	je	.LBB6_7
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB6_6 Depth=2
	xorl	%r12d, %r12d
.LBB6_9:                                # %.lr.ph
                                        #   Parent Loop BB6_3 Depth=1
                                        #     Parent Loop BB6_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	hStates(%rip), %rax
	movq	(%rax,%r14,8), %rax
	movq	(%rax,%r15,8), %rax
	movzbl	(%rax,%r12), %edx
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	movq	%r14, %rcx
	movq	%r15, %r8
	movq	%r12, %r9
	xorl	%eax, %eax
	callq	fprintf
	incq	%r12
	movq	hZ(%rip), %rcx
	cmpq	%rcx, %r12
	jb	.LBB6_9
# %bb.10:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB6_6 Depth=2
	movq	hY(%rip), %rax
	jmp	.LBB6_11
.LBB6_7:                                #   in Loop: Header=BB6_6 Depth=2
	xorl	%ecx, %ecx
.LBB6_11:                               # %._crit_edge
                                        #   in Loop: Header=BB6_6 Depth=2
	incq	%r15
	cmpq	%rax, %r15
	jb	.LBB6_6
# %bb.12:                               # %._crit_edge24.loopexit
                                        #   in Loop: Header=BB6_3 Depth=1
	movq	hX(%rip), %rcx
	movq	%rax, %rdx
	jmp	.LBB6_13
.LBB6_4:                                #   in Loop: Header=BB6_3 Depth=1
	xorl	%edx, %edx
.LBB6_13:                               # %._crit_edge24
                                        #   in Loop: Header=BB6_3 Depth=1
	incq	%r14
	cmpq	%rcx, %r14
	jb	.LBB6_3
.LBB6_14:                               # %._crit_edge26
	movl	$.L.str.6, %edi
	movl	$8, %esi
	movl	$1, %edx
	movq	%rbx, %rcx
	callq	fwrite@PLT
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.LBB6_15:
	.cfi_def_cfa_offset 48
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end6:
	.size	_Z5printPKc, .Lfunc_end6-_Z5printPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z12printResultsPKcm            # -- Begin function _Z12printResultsPKcm
	.type	_Z12printResultsPKcm,@function
_Z12printResultsPKcm:                   # @_Z12printResultsPKcm
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	callq	_Z17getDataFromDevicem
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_Z5printPKc                     # TAILCALL
.Lfunc_end7:
	.size	_Z12printResultsPKcm, .Lfunc_end7-_Z12printResultsPKcm
	.cfi_endproc
                                        # -- End function
	.globl	_Z5cleanv                       # -- Begin function _Z5cleanv
	.type	_Z5cleanv,@function
_Z5cleanv:                              # @_Z5cleanv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	dStates(%rip), %rdi
	callq	hipFree
	movq	pdX(%rip), %rdi
	callq	hipFree
	movq	pdY(%rip), %rdi
	callq	hipFree
	movq	pdZ(%rip), %rdi
	callq	hipFree
	movq	pdT(%rip), %rdi
	callq	hipFree
	movq	dCurrent(%rip), %rdi
	callq	hipFree
	movq	dNext(%rip), %rdi
	callq	hipFree
	movq	pdFullSize(%rip), %rdi
	callq	hipFree
	cmpq	$0, hX(%rip)
	je	.LBB8_6
# %bb.1:                                # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB8_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_4 Depth 2
	cmpq	$0, hY(%rip)
	je	.LBB8_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB8_2 Depth=1
	xorl	%r14d, %r14d
.LBB8_4:                                # %.lr.ph
                                        #   Parent Loop BB8_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	hStates(%rip), %rax
	movq	(%rax,%rbx,8), %rax
	movq	(%rax,%r14,8), %rdi
	callq	free
	incq	%r14
	cmpq	hY(%rip), %r14
	jb	.LBB8_4
.LBB8_5:                                # %._crit_edge
                                        #   in Loop: Header=BB8_2 Depth=1
	movq	hStates(%rip), %rax
	movq	(%rax,%rbx,8), %rdi
	callq	free
	incq	%rbx
	cmpq	hX(%rip), %rbx
	jb	.LBB8_2
.LBB8_6:                                # %._crit_edge10
	movq	hStates(%rip), %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end8:
	.size	_Z5cleanv, .Lfunc_end8-_Z5cleanv
	.cfi_endproc
                                        # -- End function
	.globl	_Z10gameOfLifePKciiS0_          # -- Begin function _Z10gameOfLifePKciiS0_
	.type	_Z10gameOfLifePKciiS0_,@function
_Z10gameOfLifePKciiS0_:                 # @_Z10gameOfLifePKciiS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1536
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movl	%edx, %ebp
	movl	%esi, %r14d
	movabsq	$4294967296, %r13               # imm = 0x100000000
	callq	_Z9readInputPKc
	movl	$.Lstr, %edi
	callq	puts@PLT
	callq	_Z18passStatesToDevicev
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	4(%rsp), %r15
	movq	%r15, %rdi
	callq	hipGetDevice
	movl	(%r15), %esi
	leaq	8(%rsp), %r15
	movq	%r15, %rdi
	callq	hipGetDevicePropertiesR0600
	movl	324(%r15), %edx
	btsq	$32, %rdx
	leaq	1(%r13), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	callq	_Z39__device_stub__transformStatesIntoCellsv
.LBB9_2:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.10, %esi
	movq	%rbx, %rdi
	callq	fopen
	testq	%rax, %rax
	je	.LBB9_11
# %bb.3:
	movq	%rax, %rdi
	callq	fclose
	movq	%rbx, %rdi
	callq	_Z5printPKc
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	testl	%r14d, %r14d
	jle	.LBB9_10
# %bb.4:                                # %.lr.ph.preheader
	negl	%r14d
	movl	$1, %r12d
	leaq	1(%r13), %r15
.LBB9_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	332(%rsp), %edx
	orq	%r13, %rdx
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_7
# %bb.6:                                #   in Loop: Header=BB9_5 Depth=1
	callq	_Z19__device_stub__calcv
.LBB9_7:                                #   in Loop: Header=BB9_5 Depth=1
	movl	$.L.str.12, %edi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r12d, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	jne	.LBB9_9
# %bb.8:                                #   in Loop: Header=BB9_5 Depth=1
	movslq	332(%rsp), %rdi
	callq	_Z17getDataFromDevicem
	movq	%rbx, %rdi
	callq	_Z5printPKc
	movl	$.Lstr.5, %edi
	callq	puts@PLT
.LBB9_9:                                #   in Loop: Header=BB9_5 Depth=1
	leal	(%r14,%r12), %eax
	incl	%eax
	movl	%r12d, %ecx
	incl	%ecx
	movl	%ecx, %r12d
	cmpl	$1, %eax
	jne	.LBB9_5
.LBB9_10:                               # %._crit_edge
	callq	_Z5cleanv
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB9_11:
	.cfi_def_cfa_offset 1536
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end9:
	.size	_Z10gameOfLifePKciiS0_, .Lfunc_end9-_Z10gameOfLifePKciiS0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$5, %edi
	jne	.LBB10_1
# %bb.2:
	movq	8(%rbx), %r14
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	atoi
	movq	32(%rbx), %rcx
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%eax, %edx
	callq	_Z10gameOfLifePKciiS0_
	jmp	.LBB10_3
.LBB10_1:
	movq	(%rbx), %rsi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
.LBB10_3:
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	main, .Lfunc_end10-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24transformStatesIntoCellsv, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4calcv, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24transformCellsIntoStatesv, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$dStates, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$pdX, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$pdY, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$pdZ, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$pdT, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$dCurrent, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$dNext, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$pdFullSize, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	hStates,@object                 # @hStates
	.bss
	.globl	hStates
	.p2align	3, 0x0
hStates:
	.quad	0
	.size	hStates, 8

	.type	hX,@object                      # @hX
	.globl	hX
	.p2align	3, 0x0
hX:
	.quad	0                               # 0x0
	.size	hX, 8

	.type	hY,@object                      # @hY
	.globl	hY
	.p2align	3, 0x0
hY:
	.quad	0                               # 0x0
	.size	hY, 8

	.type	hZ,@object                      # @hZ
	.globl	hZ
	.p2align	3, 0x0
hZ:
	.quad	0                               # 0x0
	.size	hZ, 8

	.type	hT,@object                      # @hT
	.globl	hT
	.p2align	2, 0x0
hT:
	.long	0                               # 0x0
	.size	hT, 4

	.type	dStates,@object                 # @dStates
	.local	dStates
	.comm	dStates,8,8
	.type	pdX,@object                     # @pdX
	.local	pdX
	.comm	pdX,8,8
	.type	pdY,@object                     # @pdY
	.local	pdY
	.comm	pdY,8,8
	.type	pdZ,@object                     # @pdZ
	.local	pdZ
	.comm	pdZ,8,8
	.type	pdT,@object                     # @pdT
	.local	pdT
	.comm	pdT,8,8
	.type	dCurrent,@object                # @dCurrent
	.local	dCurrent
	.comm	dCurrent,8,8
	.type	dNext,@object                   # @dNext
	.local	dNext
	.comm	dNext,8,8
	.type	pdFullSize,@object              # @pdFullSize
	.local	pdFullSize
	.comm	pdFullSize,8,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Can't open file %s\n"
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Wrong type of simulation: %d\n"
	.size	.L.str.2, 30

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Too much words in a line: %s\n"
	.size	.L.str.3, 30

	.type	_Z24transformStatesIntoCellsv,@object # @_Z24transformStatesIntoCellsv
	.section	.rodata,"a",@progbits
	.globl	_Z24transformStatesIntoCellsv
	.p2align	3, 0x0
_Z24transformStatesIntoCellsv:
	.quad	_Z39__device_stub__transformStatesIntoCellsv
	.size	_Z24transformStatesIntoCellsv, 8

	.type	_Z4calcv,@object                # @_Z4calcv
	.globl	_Z4calcv
	.p2align	3, 0x0
_Z4calcv:
	.quad	_Z19__device_stub__calcv
	.size	_Z4calcv, 8

	.type	_Z24transformCellsIntoStatesv,@object # @_Z24transformCellsIntoStatesv
	.globl	_Z24transformCellsIntoStatesv
	.p2align	3, 0x0
_Z24transformCellsIntoStatesv:
	.quad	_Z39__device_stub__transformCellsIntoStatesv
	.size	_Z24transformCellsIntoStatesv, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"a"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d %ld %ld %ld\n"
	.size	.L.str.5, 16

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"0 0 0 0\n"
	.size	.L.str.6, 9

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"w"
	.size	.L.str.10, 2

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Step %d\n"
	.size	.L.str.12, 9

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Usage: %s inputFile nSteps outputInterval outputFile\n"
	.size	.L.str.14, 54

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z24transformStatesIntoCellsv"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4calcv"
	.size	.L__unnamed_2, 9

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z24transformCellsIntoStatesv"
	.size	.L__unnamed_3, 30

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"dStates"
	.size	.L__unnamed_4, 8

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"pdX"
	.size	.L__unnamed_5, 4

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"pdY"
	.size	.L__unnamed_6, 4

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"pdZ"
	.size	.L__unnamed_7, 4

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"pdT"
	.size	.L__unnamed_8, 4

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"dCurrent"
	.size	.L__unnamed_9, 9

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"dNext"
	.size	.L__unnamed_10, 6

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"pdFullSize"
	.size	.L__unnamed_11, 11

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Input file has been read"
	.size	.Lstr, 25

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"States have been copied to device"
	.size	.Lstr.1, 34

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Neighbors have been set"
	.size	.Lstr.2, 24

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Memory has been set free"
	.size	.Lstr.4, 25

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Output"
	.size	.Lstr.5, 7

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z39__device_stub__transformStatesIntoCellsv
	.addrsig_sym _Z19__device_stub__calcv
	.addrsig_sym _Z39__device_stub__transformCellsIntoStatesv
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym hX
	.addrsig_sym hY
	.addrsig_sym hZ
	.addrsig_sym hT
	.addrsig_sym dStates
	.addrsig_sym pdX
	.addrsig_sym pdY
	.addrsig_sym pdZ
	.addrsig_sym pdT
	.addrsig_sym dCurrent
	.addrsig_sym dNext
	.addrsig_sym pdFullSize
	.addrsig_sym _Z24transformStatesIntoCellsv
	.addrsig_sym _Z4calcv
	.addrsig_sym _Z24transformCellsIntoStatesv
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z24transformStatesIntoCellsv ; -- Begin function _Z24transformStatesIntoCellsv
	.globl	_Z24transformStatesIntoCellsv
	.p2align	8
	.type	_Z24transformStatesIntoCellsv,@function
_Z24transformStatesIntoCellsv:          ; @_Z24transformStatesIntoCellsv
; %bb.0:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, pdFullSize@rel32@lo+4
	s_addc_u32 s3, s3, pdFullSize@rel32@hi+12
	s_mov_b32 s18, exec_lo
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s2 :: v_dual_mov_b32 v2, s3
	flat_load_b64 v[2:3], v[1:2]
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_u64_e64 v[2:3], v[0:1]
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.lr.ph
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, dStates@rel32@lo+4
	s_addc_u32 s9, s9, dStates@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, pdY@rel32@lo+4
	s_addc_u32 s5, s5, pdY@rel32@hi+12
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, pdZ@rel32@lo+4
	s_addc_u32 s7, s7, pdZ@rel32@hi+12
	s_getpc_b64 s[10:11]
	s_add_u32 s10, s10, pdX@rel32@lo+4
	s_addc_u32 s11, s11, pdX@rel32@hi+12
	s_getpc_b64 s[12:13]
	s_add_u32 s12, s12, dNext@rel32@lo+4
	s_addc_u32 s13, s13, dNext@rel32@hi+12
	s_getpc_b64 s[14:15]
	s_add_u32 s14, s14, dCurrent@rel32@lo+4
	s_addc_u32 s15, s15, dCurrent@rel32@hi+12
	s_mov_b32 s20, 0
	s_load_b64 s[4:5], s[4:5], 0x0
	s_load_b64 s[6:7], s[6:7], 0x0
	s_load_b64 s[16:17], s[10:11], 0x0
	s_load_b32 s0, s[0:1], 0xc
	s_load_b64 s[8:9], s[8:9], 0x0
	s_load_b64 s[10:11], s[12:13], 0x0
	s_load_b64 s[12:13], s[14:15], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	v_dual_mov_b32 v4, s6 :: v_dual_mov_b32 v5, s7
	v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v7, s17
	s_and_b32 s19, s0, 0xffff
.LBB0_2:                                ; %_Z5minusmPm.exit
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;       Child Loop BB0_4 Depth 3
                                        ;         Child Loop BB0_5 Depth 4
	flat_load_b64 v[8:9], v[2:3]
	flat_load_b64 v[10:11], v[4:5]
	v_mad_u64_u32 v[14:15], null, v0, 24, s[10:11]
	v_mul_lo_u32 v28, v1, 24
	flat_load_b64 v[20:21], v[6:7]
	s_mov_b32 s14, 0
	v_add_nc_u32_e32 v15, v28, v15
	s_waitcnt vmcnt(2) lgkmcnt(2)
	v_cvt_f32_u32_e32 v12, v8
	v_cvt_f32_u32_e32 v13, v9
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_cvt_f32_u32_e32 v29, v10
	v_cvt_f32_u32_e32 v30, v11
	v_sub_co_u32 v24, vcc_lo, 0, v8
	v_fmac_f32_e32 v12, 0x4f800000, v13
	v_sub_co_ci_u32_e32 v25, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v29, 0x4f800000, v30
	v_add_co_u32 v16, vcc_lo, s8, v0
	v_rcp_f32_e32 v12, v12
	v_add_co_ci_u32_e32 v17, vcc_lo, s9, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v29, v29
	flat_load_u8 v36, v[16:17]
	v_dual_mul_f32 v12, 0x5f7ffffc, v12 :: v_dual_mul_f32 v29, 0x5f7ffffc, v29
	v_mul_f32_e32 v13, 0x2f800000, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v13, v13
	v_fmac_f32_e32 v12, 0xcf800000, v13
	v_cvt_u32_f32_e32 v26, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v27, v12
	v_mul_lo_u32 v22, v24, v26
	v_mad_u64_u32 v[12:13], null, v0, 24, s[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v23, v25, v27
	v_mad_u64_u32 v[18:19], null, v24, v27, 0
	v_add_nc_u32_e32 v13, v28, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v31, v19, v22, v23
	v_mul_hi_u32 v30, v27, v18
	v_mad_u64_u32 v[22:23], null, v26, v18, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[16:17], null, v27, v31, 0
	v_mad_u64_u32 v[18:19], null, v26, v31, 0
	v_add_co_u32 v16, vcc_lo, v30, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v16, vcc_lo, v16, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v16, vcc_lo, v17, v23, vcc_lo
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v19, vcc_lo
	v_mul_f32_e32 v17, 0x2f800000, v29
	v_add_co_u32 v16, vcc_lo, v16, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v19, vcc_lo
	v_trunc_f32_e32 v17, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v31, vcc_lo, v27, v16
	v_add_co_ci_u32_e32 v32, vcc_lo, v26, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v29, 0xcf800000, v17
	v_mul_lo_u32 v25, v25, v31
	v_mad_u64_u32 v[22:23], null, v24, v31, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_lo_u32 v24, v24, v32
	v_sub_co_u32 v34, vcc_lo, 0, v10
	v_sub_co_ci_u32_e32 v35, vcc_lo, 0, v11, vcc_lo
	v_cvt_u32_f32_e32 v37, v17
	v_mul_hi_u32 v41, v31, v22
	v_mad_u64_u32 v[27:28], null, v32, v22, 0
	v_add3_u32 v33, v23, v24, v25
	v_cvt_u32_f32_e32 v38, v29
	v_mul_lo_u32 v39, v34, v37
	flat_load_b64 v[16:17], v[14:15] offset:8
	flat_load_b64 v[18:19], v[12:13] offset:8
	v_mad_u64_u32 v[23:24], null, v31, v33, 0
	v_mad_u64_u32 v[29:30], null, v32, v33, 0
	v_mul_lo_u32 v40, v35, v38
	v_mad_u64_u32 v[25:26], null, v34, v38, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, v41, v23
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v24, vcc_lo
	v_add_co_u32 v22, vcc_lo, v22, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v22, vcc_lo, v23, v28, vcc_lo
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v30, vcc_lo
	v_add3_u32 v33, v26, v39, v40
	v_add_co_u32 v24, vcc_lo, v22, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v26, vcc_lo, 0, v23, vcc_lo
	v_mul_hi_u32 v39, v38, v25
	v_add_co_u32 v40, vcc_lo, v31, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v41, vcc_lo, v32, v26, vcc_lo
	v_mad_u64_u32 v[22:23], null, v37, v25, 0
	v_mul_hi_u32 v42, v0, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[26:27], null, v0, v41, 0
	v_mad_u64_u32 v[24:25], null, v38, v33, 0
	v_mad_u64_u32 v[30:31], null, v1, v40, 0
	v_mad_u64_u32 v[28:29], null, v37, v33, 0
	v_add_co_u32 v26, vcc_lo, v42, v26
	v_mad_u64_u32 v[32:33], null, v1, v41, 0
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v27, vcc_lo
	v_add_co_u32 v24, vcc_lo, v39, v24
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v25, vcc_lo
	v_add_co_u32 v26, vcc_lo, v26, v30
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v26, vcc_lo, v27, v31, vcc_lo
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v22, vcc_lo, v24, v22
	v_add_co_u32 v30, s0, v26, v32
	v_add_co_ci_u32_e32 v24, vcc_lo, v25, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v31, s0, 0, v27, s0
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v29, vcc_lo
	v_add_co_u32 v24, vcc_lo, v24, v28
	v_mul_lo_u32 v26, v9, v30
	v_mad_u64_u32 v[22:23], null, v8, v30, 0
	v_mul_lo_u32 v27, v8, v31
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v25, vcc_lo
	v_add_co_u32 v29, vcc_lo, v30, 2
	v_add_co_ci_u32_e32 v32, vcc_lo, 0, v31, vcc_lo
	v_add_co_u32 v33, vcc_lo, v38, v24
	v_add3_u32 v27, v23, v27, v26
	v_add_co_ci_u32_e32 v37, vcc_lo, v37, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mad_u64_u32 v[23:24], null, v34, v33, 0
	v_add_co_u32 v38, vcc_lo, v30, 1
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v31, vcc_lo
	v_mul_lo_u32 v28, v35, v33
	v_sub_nc_u32_e32 v35, v1, v27
	v_sub_co_u32 v22, vcc_lo, v0, v22
	v_mul_lo_u32 v34, v34, v37
	v_mad_u64_u32 v[25:26], null, v37, v23, 0
	v_mul_hi_u32 v40, v33, v23
	v_sub_co_ci_u32_e64 v23, s0, v35, v9, vcc_lo
	v_sub_co_ci_u32_e32 v41, vcc_lo, v1, v27, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v22, v8
	v_sub_co_u32 v35, s0, v22, v8
	v_add3_u32 v24, v24, v34, v28
	v_cndmask_b32_e64 v42, 0, -1, vcc_lo
	v_subrev_co_ci_u32_e64 v34, vcc_lo, 0, v23, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_ge_u32_e32 vcc_lo, v35, v8
	v_mad_u64_u32 v[22:23], null, v33, v24, 0
	v_mad_u64_u32 v[27:28], null, v37, v24, 0
	v_cndmask_b32_e64 v35, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v41, v9
	v_cmp_eq_u32_e64 s0, v34, v9
	v_cndmask_b32_e64 v43, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v34, v9
	v_cndmask_b32_e64 v24, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v41, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v24, v24, v35, s0
	v_cndmask_b32_e32 v41, v43, v42, vcc_lo
	v_add_co_u32 v22, vcc_lo, v40, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v23, vcc_lo
	v_cmp_ne_u32_e64 s0, 0, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v22, vcc_lo, v22, v25
	v_add_co_ci_u32_e32 v24, vcc_lo, v23, v26, vcc_lo
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v22, v39, v32, s0
	v_cmp_ne_u32_e32 vcc_lo, 0, v41
	v_cndmask_b32_e32 v23, v31, v22, vcc_lo
	v_cndmask_b32_e64 v22, v38, v29, s0
	v_add_co_u32 v24, s0, v24, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v25, s0, 0, v25, s0
	v_cndmask_b32_e32 v22, v30, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v32, vcc_lo, v33, v24
	v_add_co_ci_u32_e32 v34, vcc_lo, v37, v25, vcc_lo
	v_mul_lo_u32 v31, v10, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v30, v22, v32
	v_mad_u64_u32 v[26:27], null, v23, v32, 0
	v_mad_u64_u32 v[24:25], null, v22, v34, 0
	v_mad_u64_u32 v[28:29], null, v23, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v24, vcc_lo, v30, v24
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v25, vcc_lo
	v_mul_lo_u32 v30, v11, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v24, vcc_lo, v24, v26
	v_add_co_ci_u32_e32 v24, vcc_lo, v25, v27, vcc_lo
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v28, vcc_lo, v24, v28
	v_add_co_ci_u32_e32 v27, vcc_lo, 0, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v26, v11, v28
	v_mad_u64_u32 v[24:25], null, v10, v28, 0
	v_mul_lo_u32 v29, v10, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v24, vcc_lo, v22, v24
	v_add3_u32 v29, v25, v29, v26
	v_mad_u64_u32 v[25:26], null, v10, v8, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v33, v23, v29
	v_sub_co_ci_u32_e64 v33, s0, v33, v11, vcc_lo
	v_add_co_u32 v35, s0, v28, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v37, s0, 0, v27, s0
	v_sub_co_u32 v38, s0, v24, v10
	v_sub_co_ci_u32_e32 v29, vcc_lo, v23, v29, vcc_lo
	v_subrev_co_ci_u32_e64 v33, s0, 0, v33, s0
	v_cmp_ge_u32_e32 vcc_lo, v38, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e64 s0, v29, v11
	v_cndmask_b32_e64 v38, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v33, v11
	s_waitcnt vmcnt(2) lgkmcnt(2)
	flat_store_b8 v[14:15], v36
	v_cndmask_b32_e64 v39, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v24, v10
	v_cndmask_b32_e64 v24, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v29, v11
	v_cndmask_b32_e64 v40, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v33, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v24, v40, v24, s0
	v_cndmask_b32_e32 v33, v39, v38, vcc_lo
	v_add_co_u32 v38, vcc_lo, v28, 1
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v27, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v29, v39, v37, vcc_lo
	v_cndmask_b32_e32 v33, v38, v35, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v24
	v_add3_u32 v24, v26, v31, v30
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v27, v27, v29, vcc_lo
	v_cndmask_b32_e32 v26, v28, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v30, v25, v27
	v_mul_lo_u32 v24, v24, v26
	v_mad_u64_u32 v[28:29], null, v25, v26, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v25, v29, v30, v24
	v_sub_co_u32 v24, vcc_lo, v0, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_ci_u32_e32 v25, vcc_lo, v1, v25, vcc_lo
	v_mad_u64_u32 v[28:29], null, v24, v34, 0
	v_mul_hi_u32 v1, v24, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[30:31], null, v25, v32, 0
	v_mad_u64_u32 v[32:33], null, v25, v34, 0
	v_add_co_u32 v1, vcc_lo, v1, v28
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, v30
	v_add_co_ci_u32_e32 v1, vcc_lo, v28, v31, vcc_lo
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v33, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v37, vcc_lo, v1, v32
	v_add_co_ci_u32_e32 v38, vcc_lo, 0, v28, vcc_lo
	v_add_co_u32 v30, vcc_lo, v20, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v1, v11, v37
	v_mad_u64_u32 v[28:29], null, v10, v37, 0
	v_mul_lo_u32 v34, v10, v38
	v_add_co_ci_u32_e32 v31, vcc_lo, -1, v21, vcc_lo
	v_add_co_u32 v32, vcc_lo, v8, -1
	v_add_co_ci_u32_e32 v33, vcc_lo, -1, v9, vcc_lo
	v_cmp_gt_u64_e32 vcc_lo, v[10:11], v[22:23]
	v_add3_u32 v1, v29, v34, v1
	v_add_co_u32 v34, s0, v10, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v35, s0, -1, v11, s0
	v_cndmask_b32_e32 v14, v27, v21, vcc_lo
	v_sub_nc_u32_e32 v15, v25, v1
	v_cndmask_b32_e32 v20, v26, v20, vcc_lo
	v_sub_co_u32 v21, vcc_lo, v24, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v15, s0, v15, v11, vcc_lo
	v_add_co_u32 v22, s0, v37, 2
	v_add_co_ci_u32_e64 v23, s0, 0, v38, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_co_u32 v28, s0, v21, v10
	v_sub_co_ci_u32_e32 v1, vcc_lo, v25, v1, vcc_lo
	v_subrev_co_ci_u32_e64 v15, s0, 0, v15, s0
	v_cmp_ge_u32_e32 vcc_lo, v28, v10
	v_cndmask_b32_e64 v28, 0, -1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_u32_e32 vcc_lo, v15, v11
	v_cndmask_b32_e64 v29, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v21, v10
	v_cndmask_b32_e64 v21, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v1, v11
	v_cndmask_b32_e64 v39, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v15, v11
	v_cndmask_b32_e32 v15, v29, v28, vcc_lo
	v_add_co_u32 v28, vcc_lo, v37, 1
	v_add_co_ci_u32_e32 v29, vcc_lo, 0, v38, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v1, v11
	v_cndmask_b32_e32 v1, v39, v21, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v15
	v_add_co_u32 v21, s0, v26, 1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s0, 0, v27, s0
	v_cndmask_b32_e32 v23, v29, v23, vcc_lo
	v_cmp_ne_u32_e64 s1, 0, v1
	v_cndmask_b32_e32 v22, v28, v22, vcc_lo
	v_cmp_ne_u64_e64 s0, v[30:31], v[26:27]
	v_add_co_u32 v1, vcc_lo, v20, -1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v27, v38, v23, s1
	v_cndmask_b32_e64 v26, v37, v22, s1
	v_add_co_ci_u32_e32 v14, vcc_lo, -1, v14, vcc_lo
	v_cmp_gt_u64_e32 vcc_lo, v[10:11], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v23, v27, v10
	v_mul_lo_u32 v30, v26, v11
	v_mad_u64_u32 v[28:29], null, v26, v10, 0
	v_cndmask_b32_e64 v15, 0, v15, s0
	v_dual_cndmask_b32 v8, v26, v8 :: v_dual_cndmask_b32 v9, v27, v9
	v_add_co_u32 v31, vcc_lo, v26, 1
	v_add_co_ci_u32_e32 v37, vcc_lo, 0, v27, vcc_lo
	v_add3_u32 v29, v29, v30, v23
	v_cndmask_b32_e64 v20, 0, v21, s0
	v_add_co_u32 v21, vcc_lo, v8, -1
	v_sub_co_u32 v8, s0, v24, v28
	v_add_co_ci_u32_e32 v22, vcc_lo, -1, v9, vcc_lo
	v_sub_co_ci_u32_e64 v9, s0, v25, v29, s0
	v_cmp_eq_u64_e64 s0, v[24:25], v[28:29]
	v_cmp_ne_u64_e32 vcc_lo, v[32:33], v[26:27]
	v_add_co_u32 v28, s1, v8, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v25, s1, 0, v9, s1
	v_cndmask_b32_e64 v10, v8, v10, s0
	v_dual_cndmask_b32 v23, 0, v37 :: v_dual_cndmask_b32 v24, 0, v31
	v_cmp_ne_u64_e32 vcc_lo, v[34:35], v[8:9]
	v_cndmask_b32_e64 v11, v9, v11, s0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v26, s0, v10, -1
	flat_store_b8 v[12:13], v36
	v_cndmask_b32_e32 v25, 0, v25, vcc_lo
	v_add_co_ci_u32_e64 v27, s0, -1, v11, s0
	v_cndmask_b32_e32 v28, 0, v28, vcc_lo
	s_mov_b64 s[0:1], 0
	s_mov_b32 s1, -1
.LBB0_3:                                ; %.preheader39
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_4 Depth 3
                                        ;         Child Loop BB0_5 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s21, s1, -1
	s_cmp_eq_u32 s0, 1
	s_mov_b32 s15, -1
	s_cselect_b32 vcc_lo, -1, 0
	s_mov_b64 s[0:1], 0
	v_dual_cndmask_b32 v29, v14, v15 :: v_dual_cndmask_b32 v30, v1, v20
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_5 Depth 4
	s_xor_b32 s22, s15, -1
	s_cmp_eq_u32 s0, 1
	s_mov_b64 s[16:17], 0
	s_cselect_b32 vcc_lo, -1, 0
	s_ashr_i32 s15, s14, 31
	v_dual_cndmask_b32 v9, v22, v23 :: v_dual_cndmask_b32 v8, v21, v24
	s_lshl_b64 s[0:1], s[14:15], 3
	s_waitcnt vmcnt(0) lgkmcnt(2)
	v_add_co_u32 v10, vcc_lo, v18, s0
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v19, vcc_lo
	v_add_co_u32 v12, vcc_lo, v16, s0
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v17, vcc_lo
	s_mov_b32 s1, -1
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_3 Depth=2
                                        ;       Parent Loop BB0_4 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_dual_mov_b32 v32, s5 :: v_dual_mov_b32 v31, s4
	v_dual_mov_b32 v34, s7 :: v_dual_mov_b32 v33, s6
	s_cmp_eq_u32 s16, 1
	s_mov_b64 s[16:17], 1
	flat_load_b64 v[31:32], v[31:32]
	s_cselect_b32 vcc_lo, -1, 0
	flat_load_b64 v[33:34], v[33:34]
	v_dual_cndmask_b32 v36, v27, v25 :: v_dual_cndmask_b32 v35, v26, v28
	s_and_b32 s0, exec_lo, s1
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_mad_u64_u32 v[37:38], null, v31, v30, v[8:9]
	v_mul_lo_u32 v31, v31, v29
	v_mul_lo_u32 v32, v32, v30
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v34, v37, v34
	v_add3_u32 v38, v32, v38, v31
	v_mad_u64_u32 v[31:32], null, v37, v33, v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v33, v38, v33
	v_add3_u32 v32, v33, v32, v34
	flat_store_b64 v[12:13], v[31:32]
	flat_store_b64 v[10:11], v[31:32]
	v_add_co_u32 v10, vcc_lo, v10, 8
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	v_add_co_u32 v12, vcc_lo, v12, 8
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_mov_b32 vcc_lo, s0
	s_cbranch_vccnz .LBB0_5
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=3
	s_add_i32 s14, s14, 2
	s_mov_b64 s[0:1], 1
	s_and_not1_b32 vcc_lo, exec_lo, s22
	s_mov_b32 s15, 0
	s_cbranch_vccnz .LBB0_4
; %bb.7:                                ;   in Loop: Header=BB0_3 Depth=2
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_mov_b32 s1, 0
	s_cbranch_vccnz .LBB0_3
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_dual_mov_b32 v9, s3 :: v_dual_mov_b32 v8, s2
	v_add_nc_u32_e32 v0, s19, v0
	flat_load_b64 v[8:9], v[8:9]
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u64_e32 vcc_lo, v[8:9], v[0:1]
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_2
.LBB0_9:                                ; %Flow55
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24transformStatesIntoCellsv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 256
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 44
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z24transformStatesIntoCellsv, .Lfunc_end0-_Z24transformStatesIntoCellsv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2796
; NumSgprs: 25
; NumVgprs: 44
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 44
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4calcv                ; -- Begin function _Z4calcv
	.globl	_Z4calcv
	.p2align	8
	.type	_Z4calcv,@function
_Z4calcv:                               ; @_Z4calcv
; %bb.0:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, pdFullSize@rel32@lo+4
	s_addc_u32 s3, s3, pdFullSize@rel32@hi+12
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s2 :: v_dual_mov_b32 v2, s3
	s_mov_b32 s3, exec_lo
	flat_load_b64 v[2:3], v[1:2]
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_u64_e64 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_13
; %bb.1:                                ; %.preheader.lr.ph
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, dCurrent@rel32@lo+4
	s_addc_u32 s5, s5, dCurrent@rel32@hi+12
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, dNext@rel32@lo+4
	s_addc_u32 s7, s7, dNext@rel32@hi+12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	s_load_b32 s2, s[0:1], 0xc
	s_load_b64 s[4:5], s[4:5], 0x0
	s_load_b64 s[6:7], s[6:7], 0x0
	v_mov_b32_e32 v10, v0
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s2, 0xffff
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	v_mad_u64_u32 v[6:7], null, v4, 24, s[4:5]
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v8, v7
	v_mad_u64_u32 v[11:12], null, v5, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v9, v11
	v_mov_b32_e32 v11, 0
	flat_load_u8 v12, v[8:9] offset:16
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v12
	s_cbranch_execz .LBB1_6
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v8, v7
	v_and_b32_e32 v12, 0xffff, v12
	s_mov_b32 s11, 0
	v_mov_b32_e32 v11, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, v5, 24, v[8:9]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v9, v13
	flat_load_b64 v[8:9], v[8:9] offset:8
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_load_b64 v[13:14], v[8:9]
	v_add_nc_u32_e32 v12, -1, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s2, 0, v12
	s_or_b32 s11, s2, s11
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[15:16], null, v13, 24, s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v13, v16
	v_mad_u64_u32 v[16:17], null, v14, 24, v[13:14]
	flat_load_u8 v13, v[15:16]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v13
	v_cndmask_b32_e64 v13, 0, 1, vcc_lo
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u16 v11, v11, v13
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_4
; %bb.5:                                ; %Flow44
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB1_6:                                ; %Flow45
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s10
	v_mad_u64_u32 v[8:9], null, v5, 24, v[7:8]
	s_mov_b32 s2, 0
	s_mov_b32 s10, exec_lo
                                        ; implicit-def: $sgpr11
	v_mov_b32_e32 v7, v8
	flat_load_u8 v6, v[6:7]
	v_and_b32_e32 v7, 0xff, v11
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v6
	s_xor_b32 s10, exec_lo, s10
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_u16_e32 vcc_lo, 4, v7
	s_mov_b32 s11, 0
                                        ; implicit-def: $vgpr7
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.8:                                ; %Flow42
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_saveexec_b32 s10, s10
	v_mov_b32_e32 v6, s11
	s_xor_b32 exec_lo, exec_lo, s10
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_lt_u16_e32 vcc_lo, 5, v7
	v_mov_b32_e32 v6, 1
	s_and_not1_b32 s2, s2, exec_lo
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s11
; %bb.10:                               ; %Flow43
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s10, s2
	s_cbranch_execz .LBB1_12
; %bb.11:                               ; %.sink.split
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mad_u64_u32 v[7:8], null, v4, 24, s[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v8
	v_mad_u64_u32 v[8:9], null, v5, 24, v[4:5]
	flat_store_b8 v[7:8], v6
.LBB1_12:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v4, s8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_mov_b32_e32 v10, v4
	v_cmp_lt_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_2
.LBB1_13:                               ; %Flow47
	s_or_b32 exec_lo, exec_lo, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, pdFullSize@rel32@lo+4
	s_addc_u32 s3, s3, pdFullSize@rel32@hi+12
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_load_b64 s[2:3], s[2:3], 0x0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	flat_load_b64 v[2:3], v[2:3]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ge_u64_e64 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_16
; %bb.14:                               ; %.lr.ph34
	s_load_b32 s5, s[0:1], 0xc
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, dNext@rel32@lo+4
	s_addc_u32 s1, s1, dNext@rel32@hi+12
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, dCurrent@rel32@lo+4
	s_addc_u32 s3, s3, dCurrent@rel32@hi+12
	s_load_b64 s[0:1], s[0:1], 0x0
	s_load_b64 s[2:3], s[2:3], 0x0
	s_mov_b32 s6, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, s5, v0
.LBB1_15:                               ; =>This Inner Loop Header: Depth=1
	v_mad_u64_u32 v[5:6], null, v0, 24, s[0:1]
	v_mul_lo_u32 v8, v1, 24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v8, v6
	flat_load_u8 v9, v[5:6]
	v_mad_u64_u32 v[6:7], null, v0, 24, s[2:3]
	v_ashrrev_i32_e32 v5, 31, v4
	v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
	v_cmp_lt_u64_e32 vcc_lo, v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v7, v8, v7
	v_add_nc_u32_e32 v4, s5, v4
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[6:7], v9
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_15
.LBB1_16:                               ; %Flow41
	s_or_b32 exec_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4calcv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 256
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4calcv, .Lfunc_end1-_Z4calcv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 892
; NumSgprs: 14
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24transformCellsIntoStatesv ; -- Begin function _Z24transformCellsIntoStatesv
	.globl	_Z24transformCellsIntoStatesv
	.p2align	8
	.type	_Z24transformCellsIntoStatesv,@function
_Z24transformCellsIntoStatesv:          ; @_Z24transformCellsIntoStatesv
; %bb.0:
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, pdFullSize@rel32@lo+4
	s_addc_u32 s3, s3, pdFullSize@rel32@hi+12
	s_load_b64 s[2:3], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s2 :: v_dual_mov_b32 v2, s3
	s_mov_b32 s2, exec_lo
	flat_load_b64 v[2:3], v[1:2]
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ge_u64_e64 v[2:3], v[0:1]
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s0, s[0:1], 0xc
	v_mov_b32_e32 v4, v1
	s_mov_b32 s1, 0
	v_mov_b32_e32 v3, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s0, v0
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, dCurrent@rel32@lo+4
	s_addc_u32 s5, s5, dCurrent@rel32@hi+12
	global_load_b64 v[5:6], v1, s[4:5]
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, dStates@rel32@lo+4
	s_addc_u32 s5, s5, dStates@rel32@hi+12
	global_load_b64 v[7:8], v1, s[4:5]
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, pdFullSize@rel32@lo+4
	s_addc_u32 s5, s5, pdFullSize@rel32@hi+12
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[9:10], null, v3, 24, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v0, v10
	v_mad_u64_u32 v[5:6], null, v4, 24, v[0:1]
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v10, v5
	flat_load_u8 v0, v[9:10]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	flat_store_b8 v[3:4], v0
	global_load_b64 v[3:4], v1, s[4:5]
	s_waitcnt vmcnt(0)
	flat_load_b64 v[4:5], v[3:4]
	v_ashrrev_i32_e32 v3, 31, v2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u64_e32 vcc_lo, v[4:5], v[2:3]
	v_mov_b32_e32 v4, v3
	v_dual_mov_b32 v3, v2 :: v_dual_add_nc_u32 v2, s0, v2
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %Flow7
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24transformCellsIntoStatesv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 256
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z24transformCellsIntoStatesv, .Lfunc_end2-_Z24transformCellsIntoStatesv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 8
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	dStates                 ; @dStates
	.type	dStates,@object
	.section	.bss,"aw",@nobits
	.globl	dStates
	.p2align	3, 0x0
dStates:
	.quad	0
	.size	dStates, 8

	.protected	pdX                     ; @pdX
	.type	pdX,@object
	.globl	pdX
	.p2align	3, 0x0
pdX:
	.quad	0
	.size	pdX, 8

	.protected	pdY                     ; @pdY
	.type	pdY,@object
	.globl	pdY
	.p2align	3, 0x0
pdY:
	.quad	0
	.size	pdY, 8

	.protected	pdZ                     ; @pdZ
	.type	pdZ,@object
	.globl	pdZ
	.p2align	3, 0x0
pdZ:
	.quad	0
	.size	pdZ, 8

	.protected	pdT                     ; @pdT
	.type	pdT,@object
	.globl	pdT
	.p2align	3, 0x0
pdT:
	.quad	0
	.size	pdT, 8

	.protected	dCurrent                ; @dCurrent
	.type	dCurrent,@object
	.globl	dCurrent
	.p2align	3, 0x0
dCurrent:
	.quad	0
	.size	dCurrent, 8

	.protected	dNext                   ; @dNext
	.type	dNext,@object
	.globl	dNext
	.p2align	3, 0x0
dNext:
	.quad	0
	.size	dNext, 8

	.protected	pdFullSize              ; @pdFullSize
	.type	pdFullSize,@object
	.globl	pdFullSize
	.p2align	3, 0x0
pdFullSize:
	.quad	0
	.size	pdFullSize, 8

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym dStates
	.addrsig_sym pdX
	.addrsig_sym pdY
	.addrsig_sym pdZ
	.addrsig_sym pdT
	.addrsig_sym dCurrent
	.addrsig_sym dNext
	.addrsig_sym pdFullSize
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         4
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         12
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         14
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         16
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         18
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         20
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         22
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         40
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         64
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 256
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24transformStatesIntoCellsv
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z24transformStatesIntoCellsv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     44
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         4
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         12
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         14
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         16
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         18
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         20
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         22
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         40
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         64
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 256
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4calcv
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z4calcv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         4
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         12
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         14
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         16
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         18
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         20
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         22
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         40
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         64
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 256
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24transformCellsIntoStatesv
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z24transformCellsIntoStatesv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
