
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include<cmath>
#include<iostream>
#include <stdio.h>
#include<iomanip>
#include<fstream>

using namespace std;

#define precision 1E-8
#define PI 3.141592653589793238462643383
#define divide (8192)
#define saving 8192

#define lambdamax 1.5
#define dlambda (double(lambdamax)/divide)

const int times = 1000000;

__global__ void kernel(double *dev_arr)//ÿһ߳̽м
{
	int offset = blockDim.x*blockIdx.x + threadIdx.x;//λƶ
	double thread_lambda = offset * dlambda;

	int start = offset * saving;

	for (int i = 0; i < times; i++)
	{
		dev_arr[start + (i) % saving] = thread_lambda * sin(PI * dev_arr[start + (i - 1) % saving]);
	}

}

double arr[divide*saving];//ÿһ̻߳һСΪ1024buffer

int main()
{	

	ofstream out("C:\\Users\\10069\\Desktop\\Sinx.txt");
	double *dev_arr;

	cudaMalloc((void**)&dev_arr, sizeof(double)*divide*saving);

	for (int i = 0; i < divide*saving; i++)
	{
		arr[i] = rand()-(RAND_MAX/2);
	}
		
	cudaMemcpy(dev_arr,arr, sizeof(double)*divide*saving, cudaMemcpyHostToDevice);
	

	int blocksize = 512;

	kernel<<<divide / blocksize, blocksize >>>(dev_arr);

	cudaMemcpy(arr, dev_arr, sizeof(double)*divide*saving, cudaMemcpyDeviceToHost);

	double result = 0;
	out << setprecision(12);
	for (int i = 0; i < divide*saving; i++)
	{
		out << arr[i] << ' ';
	}

	cudaFree(dev_arr);
	out.close();

	system("pause");
}


	.file	"tmpxft_00333117_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4008:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4008:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z25__device_stub__Z6kernelPdPd
	.type	_Z25__device_stub__Z6kernelPdPd, @function
_Z25__device_stub__Z6kernelPdPd:
.LFB4030:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z6kernelPd(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L2:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4030:
	.size	_Z25__device_stub__Z6kernelPdPd, .-_Z25__device_stub__Z6kernelPdPd
	.globl	_Z6kernelPd
	.type	_Z6kernelPd, @function
_Z6kernelPd:
.LFB4031:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z6kernelPdPd
	.cfi_endproc
.LFE4031:
	.size	_Z6kernelPd, .-_Z6kernelPd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z6kernelPd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4033:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata.str1.1
.LC1:
	.string	"C:\\Users\\10069\\Desktop\\Sinx.txt"
.LC2:
	.string	"pause"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4005:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4005
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC1(%rip), %rsi
	movl	$16, %edx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$560, %rsp
	.cfi_def_cfa_offset 608
	movq	%fs:40, %rax
	movq	%rax, 552(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbp
	movq	%rbp, %rdi
.LEHB0:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	leaq	8(%rsp), %rdi
	movl	$536870912, %esi
.LEHB1:
	call	cudaMalloc@PLT
	leaq	arr(%rip), %rbx
	leaq	536870912(%rbx), %r13
	movq	%rbx, %r12
	movq	%rbx, %r14
.L11:
	call	rand@PLT
	addq	$8, %r12
	subl	$1073741823, %eax
	cvtsi2sdl	%eax, %xmm0
	movsd	%xmm0, -8(%r12)
	cmpq	%r13, %r12
	jne	.L11
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$536870912, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	$8388609, %edx
	movl	$268435457, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rdx
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	8(%rsp), %rdi
	testl	%eax, %eax
	jne	.L12
	call	_Z25__device_stub__Z6kernelPdPd
.L12:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$536870912, %edx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rax
	leaq	28(%rsp), %r12
	movq	-24(%rax), %rax
	movq	$12, 48(%rsp,%rax)
.L15:
	movsd	(%rbx), %xmm0
	movq	%rbp, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movb	$32, 28(%rsp)
	movq	%rax, %rdi
	movq	(%rax), %rax
	movq	-24(%rax), %rax
	cmpq	$0, 16(%rdi,%rax)
	je	.L13
	movl	$1, %edx
	movq	%r12, %rsi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	jmp	.L14
.L13:
	movl	$32, %esi
	call	_ZNSo3putEc@PLT
.L14:
	addq	$8, %rbx
	cmpq	%r13, %rbx
	jne	.L15
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
	leaq	.LC2(%rip), %rdi
	call	system@PLT
.LEHE1:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	552(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	jmp	.L22
.L19:
	endbr64
	movq	%rax, %rbx
.L16:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	552(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L22
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L22:
	call	__stack_chk_fail@PLT
.L18:
	addq	$560, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4005:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4005:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4005-.LLSDACSB4005
.LLSDACSB4005:
	.uleb128 .LEHB0-.LFB4005
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4005
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L19-.LFB4005
	.uleb128 0
	.uleb128 .LEHB2-.LFB4005
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4005:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	arr
	.bss
	.align 32
	.type	arr, @object
	.size	arr, 536870912
arr:
	.zero	536870912
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"

#include<cmath>
#include<iostream>
#include <stdio.h>
#include<iomanip>
#include<fstream>

using namespace std;

#define precision 1E-8
#define PI 3.141592653589793238462643383
#define divide (8192)
#define saving 8192

#define lambdamax 1.5
#define dlambda (double(lambdamax)/divide)

const int times = 1000000;

__global__ void kernel(double *dev_arr)//ÿһ߳̽м
{
	int offset = blockDim.x*blockIdx.x + threadIdx.x;//λƶ
	double thread_lambda = offset * dlambda;

	int start = offset * saving;

	for (int i = 0; i < times; i++)
	{
		dev_arr[start + (i) % saving] = thread_lambda * sin(PI * dev_arr[start + (i - 1) % saving]);
	}

}

double arr[divide*saving];//ÿһ̻߳һСΪ1024buffer

int main()
{	

	ofstream out("C:\\Users\\10069\\Desktop\\Sinx.txt");
	double *dev_arr;

	hipMalloc((void**)&dev_arr, sizeof(double)*divide*saving);

	for (int i = 0; i < divide*saving; i++)
	{
		arr[i] = rand()-(RAND_MAX/2);
	}
		
	hipMemcpy(dev_arr,arr, sizeof(double)*divide*saving, hipMemcpyHostToDevice);
	

	int blocksize = 512;

	kernel<<<divide / blocksize, blocksize >>>(dev_arr);

	hipMemcpy(arr, dev_arr, sizeof(double)*divide*saving, hipMemcpyDeviceToHost);

	double result = 0;
	out << setprecision(12);
	for (int i = 0; i < divide*saving; i++)
	{
		out << arr[i] << ' ';
	}

	hipFree(dev_arr);
	out.close();

	system("pause");
}


	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__kernelPd     # -- Begin function _Z21__device_stub__kernelPd
	.type	_Z21__device_stub__kernelPd,@function
_Z21__device_stub__kernelPd:            # @_Z21__device_stub__kernelPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPd, .Lfunc_end0-_Z21__device_stub__kernelPd
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$528, %rsp                      # imm = 0x210
	.cfi_def_cfa_offset 560
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	16(%rsp), %rdi
	movl	$.L.str, %esi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp0:
	leaq	8(%rsp), %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
.Ltmp1:
# %bb.1:                                # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB1_2:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	addl	$-1073741823, %eax              # imm = 0xC0000001
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, arr(%rbx)
	addq	$8, %rbx
	cmpq	$536870912, %rbx                # imm = 0x20000000
	jne	.LBB1_2
# %bb.3:
	movq	8(%rsp), %rdi
.Ltmp2:
	movl	$arr, %esi
	movl	$536870912, %edx                # imm = 0x20000000
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp3:
# %bb.4:
.Ltmp5:
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp6:
# %bb.5:
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	movq	8(%rsp), %rdi
.Ltmp7:
	callq	_Z21__device_stub__kernelPd
.Ltmp8:
.LBB1_7:
	movq	8(%rsp), %rsi
.Ltmp9:
	movl	$arr, %edi
	movl	$536870912, %edx                # imm = 0x20000000
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp10:
# %bb.8:
	leaq	16(%rsp), %rbx
	movq	(%rbx), %rax
	movq	-24(%rax), %rax
	movq	$12, 24(%rsp,%rax)
	xorl	%r15d, %r15d
	leaq	7(%rsp), %r14
.LBB1_9:                                # =>This Inner Loop Header: Depth=1
	movsd	arr(%r15), %xmm0                # xmm0 = mem[0],zero
.Ltmp12:
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp13:
# %bb.10:                               # %_ZNSolsEd.exit
                                        #   in Loop: Header=BB1_9 Depth=1
	movb	$32, 7(%rsp)
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	cmpq	$0, 16(%rax,%rcx)
	je	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=1
.Ltmp14:
	movl	$1, %edx
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
	jmp	.LBB1_13
.LBB1_12:                               #   in Loop: Header=BB1_9 Depth=1
.Ltmp16:
	movq	%rax, %rdi
	movl	$32, %esi
	callq	_ZNSo3putEc
.Ltmp17:
.LBB1_13:                               #   in Loop: Header=BB1_9 Depth=1
	addq	$8, %r15
	cmpq	$536870912, %r15                # imm = 0x20000000
	jne	.LBB1_9
# %bb.14:
	movq	8(%rsp), %rdi
.Ltmp19:
	callq	hipFree
.Ltmp20:
# %bb.15:
.Ltmp21:
	leaq	16(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp22:
# %bb.16:
.Ltmp23:
	movl	$.L.str.1, %edi
	callq	system
.Ltmp24:
# %bb.17:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	24(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 16(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	264(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	xorl	%eax, %eax
	addq	$528, %rsp                      # imm = 0x210
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB1_18:
	.cfi_def_cfa_offset 560
.Ltmp4:
	jmp	.LBB1_19
.LBB1_20:
.Ltmp11:
	jmp	.LBB1_19
.LBB1_21:
.Ltmp25:
	jmp	.LBB1_19
.LBB1_22:
.Ltmp18:
.LBB1_19:
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp10-.Ltmp5                 #   Call between .Ltmp5 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp17-.Ltmp12                #   Call between .Ltmp12 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp24-.Ltmp19                #   Call between .Ltmp19 and .Ltmp24
	.uleb128 .Ltmp25-.Lfunc_begin0          #     jumps to .Ltmp25
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Lfunc_end1-.Ltmp24            #   Call between .Ltmp24 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6kernelPd,@object             # @_Z6kernelPd
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPd
	.p2align	3, 0x0
_Z6kernelPd:
	.quad	_Z21__device_stub__kernelPd
	.size	_Z6kernelPd, 8

	.type	arr,@object                     # @arr
	.bss
	.globl	arr
	.p2align	4, 0x0
arr:
	.zero	536870912
	.size	arr, 536870912

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"C:\\Users\\10069\\Desktop\\Sinx.txt"
	.size	.L.str, 32

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"pause"
	.size	.L.str.1, 6

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPd"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPd
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z6kernelPd
	.addrsig_sym arr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPd             ; -- Begin function _Z6kernelPd
	.globl	_Z6kernelPd
	.p2align	8
	.type	_Z6kernelPd,@function
_Z6kernelPd:                            ; @_Z6kernelPd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s10, 0x33145c00
	s_mov_b32 s12, 0x252049c0
	s_mov_b32 s16, 0x46cc5e42
	s_mov_b32 s18, 0xa17f65f6
	s_mov_b32 s20, 0x19f4ec90
	s_mov_b32 s22, 0x16c16967
	s_mov_b32 s24, 0x55555555
	s_mov_b32 s26, 0xb42fdfa7
	s_mov_b32 s28, 0xf9a43bb8
	s_mov_b32 s30, 0x796cde01
	s_mov_b32 s34, 0x19e83e5c
	s_mov_b32 s36, 0x11110bb3
	s_mov_b32 s33, -1
	s_mov_b32 s5, 0x400921fb
	s_mov_b32 s7, 0x3c91a626
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_mov_b32 s13, 0xb97b839a
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s14, 0x9037ab78
	s_mov_b32 s1, 0x3ff921fb
	s_mov_b32 s15, 0x3e21eeb6
	s_mov_b32 s17, 0xbda907db
	s_mov_b32 s19, 0xbe927e4f
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[2:3], v1
	v_lshlrev_b32_e32 v10, 13, v1
	s_mov_b32 s21, 0x3efa01a0
	s_mov_b32 s23, 0xbf56c16c
	s_mov_b32 s25, 0x3fa55555
	s_mov_b32 s27, 0xbe5ae600
	s_mov_b32 s29, 0x3de5e0b2
	s_mov_b32 s31, 0x3ec71de3
	s_mov_b32 s35, 0xbf2a01a0
	s_mov_b32 s37, 0x3f811111
	s_mov_b32 s38, 0x33145c07
	s_mov_b32 s41, 0xbff921fb
	s_mov_b32 s43, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[0:1], 0x3f280000, v[2:3]
	v_mov_b32_e32 v2, 0
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s0, s33, 31
	s_mov_b32 s6, exec_lo
	s_lshr_b32 s0, s0, 19
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr6_vgpr7
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s33, s0
	s_and_b32 s0, s0, 0xffffe000
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s0, s33, s0
	v_add_nc_u32_e32 v3, s0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[4:5], v[3:4], s[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[4:5]|
	s_xor_b32 s6, exec_lo, s6
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_ldexp_f64 v[6:7], |v[4:5]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[4:5]|
	v_trig_preop_f64 v[8:9], |v[4:5]|, 0
	v_and_b32_e32 v3, 0x7fffffff, v5
	v_trig_preop_f64 v[11:12], |v[4:5]|, 1
	v_trig_preop_f64 v[21:22], |v[4:5]|, 2
	s_mov_b32 s39, s7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v6, v4, v6 :: v_dual_cndmask_b32 v7, v3, v7
	v_mul_f64 v[13:14], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[15:16], v[11:12], v[6:7]
	v_fma_f64 v[8:9], v[8:9], v[6:7], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[11:12], v[6:7], -v[15:16]
	v_add_f64 v[17:18], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[17:18], -v[15:16]
	v_add_f64 v[25:26], v[13:14], v[17:18]
	v_add_f64 v[23:24], v[17:18], -v[19:20]
	v_add_f64 v[8:9], v[8:9], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[19:20], v[25:26], -2
	v_add_f64 v[13:14], v[25:26], -v[13:14]
	v_add_f64 v[15:16], v[15:16], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[19:20]|
	v_add_f64 v[13:14], v[17:18], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], v[15:16]
	v_fract_f64_e32 v[15:16], v[19:20]
	v_cndmask_b32_e32 v16, 0, v16, vcc_lo
	v_mul_f64 v[27:28], v[21:22], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, 0, v15, vcc_lo
	v_ldexp_f64 v[15:16], v[15:16], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[27:28], v[11:12]
	v_fma_f64 v[6:7], v[21:22], v[6:7], -v[27:28]
	v_add_f64 v[17:18], v[23:24], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[13:14], v[17:18]
	v_add_f64 v[29:30], v[17:18], -v[23:24]
	v_add_f64 v[25:26], v[19:20], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[17:18], -v[29:30]
	v_add_f64 v[8:9], v[8:9], -v[29:30]
	v_add_f64 v[13:14], v[19:20], -v[13:14]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[25:26]
	v_add_f64 v[25:26], v[23:24], -v[27:28]
	v_cndmask_b32_e64 v3, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[33:34], v[23:24], -v[25:26]
	v_add_f64 v[11:12], v[11:12], -v[25:26]
	v_add_f64 v[23:24], v[23:24], -v[35:36]
	v_add_f64 v[15:16], v[15:16], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[27:28], -v[33:34]
	v_add_f64 v[8:9], v[8:9], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[19:20], v[15:16]
	v_add_f64 v[11:12], v[11:12], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v3, v[31:32]
	v_add_f64 v[8:9], v[11:12], v[8:9]
	v_add_f64 v[11:12], v[17:18], -v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[29:30], v3
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], -v[29:30]
	v_add_f64 v[6:7], v[11:12], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[19:20], v[15:16]
	v_add_f64 v[8:9], v[21:22], -v[15:16]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[19:20], -v[8:9]
	v_add_co_ci_u32_e64 v11, s0, 0, v3, vcc_lo
	v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
	s_mov_b32 s0, s4
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[21:22], -v[2:3]
	v_add_f64 v[12:13], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[12:13], s[0:1]
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	v_fma_f64 v[16:17], v[12:13], s[0:1], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_fma_f64 v[8:9], v[12:13], s[38:39], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[6:7], s[0:1], v[8:9]
	v_add_f64 v[6:7], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[6:7], -v[14:15]
	v_add_f64 v[8:9], v[8:9], -v[12:13]
.LBB0_3:                                ; %Flow
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_and_not1_saveexec_b32 s0, s6
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_f64 v[6:7], |v[4:5]|, s[8:9]
	s_mov_b32 s40, s4
	s_mov_b32 s6, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[11:12], v[6:7]
	v_fma_f64 v[6:7], v[11:12], s[40:41], |v[4:5]|
	v_mul_f64 v[8:9], v[11:12], s[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[15:16], v[11:12], s[10:11], v[6:7]
	v_add_f64 v[13:14], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[6:7], -v[13:14]
	v_add_f64 v[13:14], v[13:14], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	v_fma_f64 v[8:9], v[11:12], s[6:7], v[8:9]
	v_add_f64 v[6:7], v[13:14], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_fma_f64 v[8:9], v[11:12], s[12:13], v[6:7]
	v_cvt_i32_f64_e32 v11, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[15:16], v[8:9]
	v_add_f64 v[13:14], v[6:7], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[13:14]
.LBB0_5:                                ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[12:13], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[22:23], v[8:9], 0.5
	s_mov_b32 s42, s24
	v_cmp_class_f64_e64 s0, v[4:5], 0x1f8
	v_and_b32_e32 v3, 1, v11
	s_add_i32 s33, s33, 1
	v_lshlrev_b32_e32 v4, 30, v11
	s_cmp_eq_u32 s33, 0xf423f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_xor_b32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_and_b32_e32 v4, 0x80000000, v4
	v_fma_f64 v[14:15], v[12:13], s[28:29], s[26:27]
	v_fma_f64 v[16:17], v[12:13], s[16:17], s[14:15]
	v_mul_f64 v[18:19], v[12:13], 0.5
	v_mul_f64 v[24:25], v[6:7], -v[12:13]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[18:19]
	v_add_f64 v[20:21], -v[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[34:35]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], -v[20:21], 1.0
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[22:23]
	v_add_f64 v[18:19], v[26:27], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[24:25], v[14:15], v[22:23]
	v_mul_f64 v[22:23], v[12:13], v[12:13]
	v_fma_f64 v[16:17], v[12:13], v[16:17], s[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[6:7], -v[8:9], v[18:19]
	v_fma_f64 v[8:9], v[12:13], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[22:23], v[16:17], v[18:19]
	v_fma_f64 v[8:9], v[24:25], s[42:43], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[20:21], v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v12, v6, vcc_lo
	v_cndmask_b32_e32 v5, v13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0, v3, s0
	v_xor_b32_e32 v4, v5, v4
	v_and_or_b32 v5, 0x1fff, s33, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0x7ff80000, v4, s0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[3:4], v[0:1], v[3:4]
	v_lshlrev_b64 v[5:6], 3, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_store_b64 v[5:6], v[3:4], off
	s_cbranch_scc0 .LBB0_1
; %bb.6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 37
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPd, .Lfunc_end0-_Z6kernelPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1728
; NumSgprs: 46
; NumVgprs: 37
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 37
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPd
    .private_segment_fixed_size: 0
    .sgpr_count:     46
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     37
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
