#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>

#define TILE_WIDTH 2
#define INPUT_CONSTANT 1.5
#define BLOCK_SIZE 2


__host__
float *allocateMatrix(int rows, int columns){
  return (float *) malloc(sizeof(float) * rows * columns);
}

__host__
void initializeMatrix(int rows, int columns, float *matrix){
  float constantMultiplicant = INPUT_CONSTANT;
  int index;

  for(index = 0; index < (rows * columns); ++index){
    matrix[index] = (index+1) * constantMultiplicant;
  }
}

__host__
void naiveMatrixMultiply(float *mA, float *mB, float *mC, int aRows, int aCols, int bRows, int bCols){
  int rowIndex;
  int colIndex;
  for(rowIndex = 0; rowIndex < aRows; ++rowIndex){
    for(colIndex = 0; colIndex < bCols; ++colIndex){
      float resultValue = 0;
      int index;
      for(index = 0; index < aCols; ++index){
        float aValue = mA[(rowIndex * aCols) + index];
        float bValue = mB[(index * bCols) + colIndex];
        resultValue += (aValue * bValue);
      }
      mC[(rowIndex * bCols) + colIndex] = resultValue;
    }
  }
}


__global__
void cudaMatrixMultiply(float *mA, float *mB, float *mC, int aRows, int aCols, int bRows, int bCols){
  __shared__ float aTile[TILE_WIDTH][TILE_WIDTH];
  __shared__ float bTile[TILE_WIDTH][TILE_WIDTH];

  int row = blockIdx.y * blockDim.y + threadIdx.y; /* row of matrix A to consider for this thread */
  int column = blockIdx.x * blockDim.x + threadIdx.x; /* column of matrix B to consider for this thread */

  if(row < aRows && column < bCols){
    int tile_index;
    float resultValue = 0;

    for(tile_index = 0; tile_index < (aCols/TILE_WIDTH + 1); ++tile_index){
      /*load tiles into shared memory*/
      aTile[threadIdx.y][threadIdx.x] = mA[(row * aCols) + (tile_index * TILE_WIDTH) + threadIdx.x];
      bTile[threadIdx.y][threadIdx.x] = mB[(bCols * ((tile_index * TILE_WIDTH) + threadIdx.y)) + column];
      /* wait for all data loads to finish */
      __syncthreads();
      /* calculate additions to accumulator value within this tile */
      int intraTileIndex;
      for(intraTileIndex = 0; intraTileIndex < TILE_WIDTH; ++intraTileIndex){
        float incrementValue = (aTile[threadIdx.y][intraTileIndex] * bTile[intraTileIndex][threadIdx.x]);
        if(incrementValue != NAN){
          resultValue += incrementValue;
        }
      }
      /* wait for all calculations on current tile to complete */
      __syncthreads();
    }

    mC[(row * bCols) + column] = resultValue;
  }

/* OLD UNTILED VERSION
  if(row < aRows && column < bCols){
    float resultValue = 0;
    int k;


    for(k = 0; k < aCols; k++){
      float aValue = mA[(row * aCols) + k];
      float bValue = mB[(k * bCols) + column];
      resultValue += (aValue * bValue);
    }

    mC[(row * bCols) + column] = resultValue;
  }
*/

}

__host__
void multiplyMatrices(float *mA, float *mB, float *mC, int aRows, int aCols, int bRows, int bCols){
  //declare device matrices
  float *gpuMatrixA;
  float *gpuMatrixB;
  float *gpuMatrixC;

  int aSize = aRows * aCols * sizeof(float);
  int bSize = bRows * bCols * sizeof(float);
  int cSize = aRows * bCols * sizeof(float);

  //allocate device global memory
  cudaMalloc((void **) &gpuMatrixA, aSize);
  cudaMalloc((void **) &gpuMatrixB, bSize);
  cudaMalloc((void **) &gpuMatrixC, cSize);

  //copy host data to GPU global memory
  cudaMemcpy(gpuMatrixA, mA, aSize, cudaMemcpyHostToDevice);
  cudaMemcpy(gpuMatrixB, mB, bSize, cudaMemcpyHostToDevice);

  //initialize kernal dimensions
  struct dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE, 1); // 16 * 16 = 256 threads per block
  struct dim3 numberOfBlocks(bCols/threadsPerBlock.x + 1, aRows/threadsPerBlock.y + 1, 1); //need enough blocks to cover the full result matrix

  //delegate matrix manipulation to GPU

  //naiveMatrixMultiply(mA, mB, mC, aRows, aCols, bRows, bCols);
  cudaMatrixMultiply<<<numberOfBlocks, threadsPerBlock>>>(gpuMatrixA, gpuMatrixB, gpuMatrixC, aRows, aCols, bRows, bCols);
  cudaThreadSynchronize(); // here we wait until all threads are finished

  //copy result back to host memory
  cudaMemcpy(mC, gpuMatrixC, cSize, cudaMemcpyDeviceToHost);

  //free allocated device memory
  cudaFree(gpuMatrixA);
  cudaFree(gpuMatrixB);
  cudaFree(gpuMatrixC);
}

__host__
void printMatrix(float *matrix, int rows, int columns){
  printf("MATRIX:\n\n");
  int rowIdx;
  for(rowIdx = 0; rowIdx < rows; ++rowIdx){
    int colIdx;
    for(colIdx = 0; colIdx < columns; ++colIdx){
      printf("%f ", matrix[(rowIdx * columns) + colIdx]);
    }
    printf("\n");
  }
  printf("\n\n");
}

__host__
int main(int argc, char **argv){

  // declare host matrices
  float *baseMatrix;
  float *modulationMatrix;
  float *resultMatrix;

  //setup matrix dimensions
  int baseRows = 10;
  int baseColumns = 10;
  int modulationRows = baseColumns; // in order for this function to be defined, the column count from A must be equal to the row count of B
  int modulationColumns = 10;
  int resultRows = baseRows;
  int resultColumns = modulationColumns;

  //allocate memory for host matrices
  baseMatrix = allocateMatrix(baseRows, baseColumns);
  modulationMatrix = allocateMatrix(modulationRows, modulationColumns);
  resultMatrix = allocateMatrix(resultRows, resultColumns);

  //build in simple data
  initializeMatrix(baseRows, baseColumns, baseMatrix);
  initializeMatrix(modulationRows, modulationColumns, modulationMatrix);

  multiplyMatrices(baseMatrix, modulationMatrix, resultMatrix, baseRows, baseColumns, modulationRows, modulationColumns);

  //output results of the calculation
  //printMatrix(baseMatrix, baseRows, baseColumns);
  //printMatrix(modulationMatrix, modulationRows, modulationColumns);
  printMatrix(resultMatrix, baseRows, modulationColumns);

  //free host memory
  free(baseMatrix);
  free(modulationMatrix);
  free(resultMatrix);

  return 0;
}

	.file	"tmpxft_002bbfec_00000000-6_matrixMultiplication.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14allocateMatrixii
	.type	_Z14allocateMatrixii, @function
_Z14allocateMatrixii:
.LFB2027:
	.cfi_startproc
	endbr64
	movslq	%edi, %rdi
	movslq	%esi, %rsi
	imulq	%rsi, %rdi
	salq	$2, %rdi
	jmp	malloc@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z14allocateMatrixii, .-_Z14allocateMatrixii
	.globl	_Z16initializeMatrixiiPf
	.type	_Z16initializeMatrixiiPf, @function
_Z16initializeMatrixiiPf:
.LFB2028:
	.cfi_startproc
	endbr64
	imull	%esi, %edi
	movss	.LC0(%rip), %xmm1
	xorl	%eax, %eax
.L4:
	cmpl	%eax, %edi
	jle	.L7
	leal	1(%rax), %ecx
	cvtsi2ssl	%ecx, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L4
.L7:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z16initializeMatrixiiPf, .-_Z16initializeMatrixiiPf
	.globl	_Z19naiveMatrixMultiplyPfS_S_iiii
	.type	_Z19naiveMatrixMultiplyPfS_S_iiii, @function
_Z19naiveMatrixMultiplyPfS_S_iiii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%ecx, %ebp
	xorl	%ecx, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	56(%rsp), %r11
	movq	%rsi, %rbx
	movq	%rdx, %rsi
	movq	%r11, %r12
	salq	$2, %r11
.L9:
	cmpl	%ebp, %r10d
	jge	.L8
	movslq	%r9d, %rax
	leaq	(%rsi,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L14:
	cmpl	%eax, %r12d
	jle	.L11
	leaq	(%rbx,%rax,4), %r13
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L12:
	cmpl	%edx, %r8d
	jle	.L16
	movss	(%r14,%rdx,4), %xmm1
	mulss	0(%r13), %xmm1
	incq	%rdx
	addq	%r11, %r13
	addss	%xmm1, %xmm0
	jmp	.L12
.L16:
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	jmp	.L14
.L11:
	incl	%r10d
	addl	%r12d, %r9d
	addl	%r8d, %ecx
	jmp	.L9
.L8:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z19naiveMatrixMultiplyPfS_S_iiii, .-_Z19naiveMatrixMultiplyPfS_S_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"MATRIX:\n\n"
.LC3:
	.string	"%f "
.LC4:
	.string	"\n"
.LC5:
	.string	"\n\n"
	.text
	.globl	_Z11printMatrixPfii
	.type	_Z11printMatrixPfii, @function
_Z11printMatrixPfii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	leaq	.LC2(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L18:
	cmpl	%r14d, %r13d
	jge	.L20
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L21:
	cmpl	%r15d, %ebx
	jle	.L23
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L21
.L23:
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L18
.L20:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z11printMatrixPfii, .-_Z11printMatrixPfii
	.globl	_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii
	.type	_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii, @function
_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18cudaMatrixMultiplyPfS_S_iiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L24:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii, .-_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii
	.globl	_Z18cudaMatrixMultiplyPfS_S_iiii
	.type	_Z18cudaMatrixMultiplyPfS_S_iiii, @function
_Z18cudaMatrixMultiplyPfS_S_iiii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii
	.cfi_endproc
.LFE2058:
	.size	_Z18cudaMatrixMultiplyPfS_S_iiii, .-_Z18cudaMatrixMultiplyPfS_S_iiii
	.globl	_Z16multiplyMatricesPfS_S_iiii
	.type	_Z16multiplyMatricesPfS_S_iiii, @function
_Z16multiplyMatricesPfS_S_iiii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r12d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movl	160(%rsp), %r13d
	movq	%rdx, 16(%rsp)
	movl	%ecx, %edx
	leaq	40(%rsp), %rdi
	imull	%r8d, %edx
	movq	%rsi, 8(%rsp)
	imull	%r13d, %ebp
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	sall	$2, %edx
	movslq	%edx, %rdx
	sall	$2, %ebp
	movq	%rdx, %rsi
	movslq	%ebp, %rbp
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%ebx, %eax
	leaq	56(%rsp), %rdi
	imull	%r13d, %eax
	sall	$2, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%rbp, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r13d, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	shrl	%eax
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$8589934594, %rdx
	incl	%eax
	movl	%eax, 76(%rsp)
	movl	%ebx, %eax
	shrl	%eax
	incl	%eax
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	%rax
	.cfi_def_cfa_offset 168
	movl	%ebx, %ecx
	movl	%r12d, %r9d
	movl	%r14d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 176
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z46__device_stub__Z18cudaMatrixMultiplyPfS_S_iiiiPfS_S_iiii
	popq	%rdx
	.cfi_def_cfa_offset 168
	popq	%rcx
	.cfi_def_cfa_offset 160
.L30:
	call	cudaThreadSynchronize@PLT
	movq	(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z16multiplyMatricesPfS_S_iiii, .-_Z16multiplyMatricesPfS_S_iiii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$400, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$400, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%r12, %rdx
	movl	$10, %esi
	movl	$10, %edi
	movq	%rax, %rbx
	movl	$10, %r9d
	movl	$10, %r8d
	call	_Z16initializeMatrixiiPf
	movq	%rbp, %rdx
	movl	$10, %edi
	call	_Z16initializeMatrixiiPf
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 40
	movl	$10, %ecx
	pushq	$10
	.cfi_def_cfa_offset 48
	call	_Z16multiplyMatricesPfS_S_iiii
	popq	%rdx
	.cfi_def_cfa_offset 40
	movl	$10, %esi
	popq	%rcx
	.cfi_def_cfa_offset 32
	movl	$10, %edx
	movq	%rbx, %rdi
	call	_Z11printMatrixPfii
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z18cudaMatrixMultiplyPfS_S_iiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18cudaMatrixMultiplyPfS_S_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1069547520
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>


#define TILE_WIDTH 2
#define INPUT_CONSTANT 1.5
#define BLOCK_SIZE 2


__host__
float *allocateMatrix(int rows, int columns){
  return (float *) malloc(sizeof(float) * rows * columns);
}

__host__
void initializeMatrix(int rows, int columns, float *matrix){
  float constantMultiplicant = INPUT_CONSTANT;
  int index;

  for(index = 0; index < (rows * columns); ++index){
    matrix[index] = (index+1) * constantMultiplicant;
  }
}

__host__
void naiveMatrixMultiply(float *mA, float *mB, float *mC, int aRows, int aCols, int bRows, int bCols){
  int rowIndex;
  int colIndex;
  for(rowIndex = 0; rowIndex < aRows; ++rowIndex){
    for(colIndex = 0; colIndex < bCols; ++colIndex){
      float resultValue = 0;
      int index;
      for(index = 0; index < aCols; ++index){
        float aValue = mA[(rowIndex * aCols) + index];
        float bValue = mB[(index * bCols) + colIndex];
        resultValue += (aValue * bValue);
      }
      mC[(rowIndex * bCols) + colIndex] = resultValue;
    }
  }
}


__global__
void cudaMatrixMultiply(float *mA, float *mB, float *mC, int aRows, int aCols, int bRows, int bCols){
  __shared__ float aTile[TILE_WIDTH][TILE_WIDTH];
  __shared__ float bTile[TILE_WIDTH][TILE_WIDTH];

  int row = blockIdx.y * blockDim.y + threadIdx.y; /* row of matrix A to consider for this thread */
  int column = blockIdx.x * blockDim.x + threadIdx.x; /* column of matrix B to consider for this thread */

  if(row < aRows && column < bCols){
    int tile_index;
    float resultValue = 0;

    for(tile_index = 0; tile_index < (aCols/TILE_WIDTH + 1); ++tile_index){
      /*load tiles into shared memory*/
      aTile[threadIdx.y][threadIdx.x] = mA[(row * aCols) + (tile_index * TILE_WIDTH) + threadIdx.x];
      bTile[threadIdx.y][threadIdx.x] = mB[(bCols * ((tile_index * TILE_WIDTH) + threadIdx.y)) + column];
      /* wait for all data loads to finish */
      __syncthreads();
      /* calculate additions to accumulator value within this tile */
      int intraTileIndex;
      for(intraTileIndex = 0; intraTileIndex < TILE_WIDTH; ++intraTileIndex){
        float incrementValue = (aTile[threadIdx.y][intraTileIndex] * bTile[intraTileIndex][threadIdx.x]);
        if(incrementValue != NAN){
          resultValue += incrementValue;
        }
      }
      /* wait for all calculations on current tile to complete */
      __syncthreads();
    }

    mC[(row * bCols) + column] = resultValue;
  }

/* OLD UNTILED VERSION
  if(row < aRows && column < bCols){
    float resultValue = 0;
    int k;


    for(k = 0; k < aCols; k++){
      float aValue = mA[(row * aCols) + k];
      float bValue = mB[(k * bCols) + column];
      resultValue += (aValue * bValue);
    }

    mC[(row * bCols) + column] = resultValue;
  }
*/

}

__host__
void multiplyMatrices(float *mA, float *mB, float *mC, int aRows, int aCols, int bRows, int bCols){
  //declare device matrices
  float *gpuMatrixA;
  float *gpuMatrixB;
  float *gpuMatrixC;

  int aSize = aRows * aCols * sizeof(float);
  int bSize = bRows * bCols * sizeof(float);
  int cSize = aRows * bCols * sizeof(float);

  //allocate device global memory
  hipMalloc((void **) &gpuMatrixA, aSize);
  hipMalloc((void **) &gpuMatrixB, bSize);
  hipMalloc((void **) &gpuMatrixC, cSize);

  //copy host data to GPU global memory
  hipMemcpy(gpuMatrixA, mA, aSize, hipMemcpyHostToDevice);
  hipMemcpy(gpuMatrixB, mB, bSize, hipMemcpyHostToDevice);

  //initialize kernal dimensions
  struct dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE, 1); // 16 * 16 = 256 threads per block
  struct dim3 numberOfBlocks(bCols/threadsPerBlock.x + 1, aRows/threadsPerBlock.y + 1, 1); //need enough blocks to cover the full result matrix

  //delegate matrix manipulation to GPU

  //naiveMatrixMultiply(mA, mB, mC, aRows, aCols, bRows, bCols);
  cudaMatrixMultiply<<<numberOfBlocks, threadsPerBlock>>>(gpuMatrixA, gpuMatrixB, gpuMatrixC, aRows, aCols, bRows, bCols);
  hipDeviceSynchronize(); // here we wait until all threads are finished

  //copy result back to host memory
  hipMemcpy(mC, gpuMatrixC, cSize, hipMemcpyDeviceToHost);

  //free allocated device memory
  hipFree(gpuMatrixA);
  hipFree(gpuMatrixB);
  hipFree(gpuMatrixC);
}

__host__
void printMatrix(float *matrix, int rows, int columns){
  printf("MATRIX:\n\n");
  int rowIdx;
  for(rowIdx = 0; rowIdx < rows; ++rowIdx){
    int colIdx;
    for(colIdx = 0; colIdx < columns; ++colIdx){
      printf("%f ", matrix[(rowIdx * columns) + colIdx]);
    }
    printf("\n");
  }
  printf("\n\n");
}

__host__
int main(int argc, char **argv){

  // declare host matrices
  float *baseMatrix;
  float *modulationMatrix;
  float *resultMatrix;

  //setup matrix dimensions
  int baseRows = 10;
  int baseColumns = 10;
  int modulationRows = baseColumns; // in order for this function to be defined, the column count from A must be equal to the row count of B
  int modulationColumns = 10;
  int resultRows = baseRows;
  int resultColumns = modulationColumns;

  //allocate memory for host matrices
  baseMatrix = allocateMatrix(baseRows, baseColumns);
  modulationMatrix = allocateMatrix(modulationRows, modulationColumns);
  resultMatrix = allocateMatrix(resultRows, resultColumns);

  //build in simple data
  initializeMatrix(baseRows, baseColumns, baseMatrix);
  initializeMatrix(modulationRows, modulationColumns, modulationMatrix);

  multiplyMatrices(baseMatrix, modulationMatrix, resultMatrix, baseRows, baseColumns, modulationRows, modulationColumns);

  //output results of the calculation
  //printMatrix(baseMatrix, baseRows, baseColumns);
  //printMatrix(modulationMatrix, modulationRows, modulationColumns);
  printMatrix(resultMatrix, baseRows, modulationColumns);

  //free host memory
  free(baseMatrix);
  free(modulationMatrix);
  free(resultMatrix);

  return 0;
}

	.text
	.file	"matrixMultiplication.hip"
	.globl	_Z14allocateMatrixii            # -- Begin function _Z14allocateMatrixii
	.type	_Z14allocateMatrixii,@function
_Z14allocateMatrixii:                   # @_Z14allocateMatrixii
	.cfi_startproc
# %bb.0:
	movslq	%edi, %rax
	movslq	%esi, %rdi
	imulq	%rax, %rdi
	shlq	$2, %rdi
	jmp	malloc                          # TAILCALL
.Lfunc_end0:
	.size	_Z14allocateMatrixii, .Lfunc_end0-_Z14allocateMatrixii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z16initializeMatrixiiPf
.LCPI1_0:
	.long	0x3fc00000                      # float 1.5
	.text
	.globl	_Z16initializeMatrixiiPf
	.type	_Z16initializeMatrixiiPf,@function
_Z16initializeMatrixiiPf:               # @_Z16initializeMatrixiiPf
	.cfi_startproc
# %bb.0:
	imull	%esi, %edi
	testl	%edi, %edi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edi, %eax
	xorl	%ecx, %ecx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rcx), %rsi
	xorps	%xmm1, %xmm1
	cvtsi2ss	%esi, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%rdx,%rcx,4)
	movq	%rsi, %rcx
	cmpq	%rsi, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z16initializeMatrixiiPf, .Lfunc_end1-_Z16initializeMatrixiiPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z19naiveMatrixMultiplyPfS_S_iiii # -- Begin function _Z19naiveMatrixMultiplyPfS_S_iiii
	.type	_Z19naiveMatrixMultiplyPfS_S_iiii,@function
_Z19naiveMatrixMultiplyPfS_S_iiii:      # @_Z19naiveMatrixMultiplyPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB2_9
# %bb.1:                                # %.preheader29.lr.ph
	movslq	56(%rsp), %r9
	movl	%ecx, %ecx
	movl	%r9d, %r10d
	movl	%r8d, %r11d
	leaq	(,%r9,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader29
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_6 Depth 3
	cmpl	$0, 56(%rsp)
	jle	.LBB2_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r14d, %eax
	leaq	(%rdi,%rax,4), %r12
	movq	%r15, %rax
	imulq	%r9, %rax
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_6 Depth 3
	xorps	%xmm0, %xmm0
	testl	%r8d, %r8d
	jle	.LBB2_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_4 Depth=2
	movq	%rsi, %rbp
	xorl	%edx, %edx
.LBB2_6:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	incq	%rdx
	addq	%rbx, %rbp
	cmpq	%rdx, %r11
	jne	.LBB2_6
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=2
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB2_4
.LBB2_8:                                # %._crit_edge33
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%rcx, %r15
	jne	.LBB2_2
.LBB2_9:                                # %._crit_edge35
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z19naiveMatrixMultiplyPfS_S_iiii, .Lfunc_end2-_Z19naiveMatrixMultiplyPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii # -- Begin function _Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii
	.type	_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii,@function
_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii: # @_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18cudaMatrixMultiplyPfS_S_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii, .Lfunc_end3-_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16multiplyMatricesPfS_S_iiii  # -- Begin function _Z16multiplyMatricesPfS_S_iiii
	.type	_Z16multiplyMatricesPfS_S_iiii,@function
_Z16multiplyMatricesPfS_S_iiii:         # @_Z16multiplyMatricesPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movl	128(%rsp), %ecx
	leal	(,%rbx,4), %r12d
	movl	%r12d, %eax
	movl	%r8d, 24(%rsp)                  # 4-byte Spill
	imull	%r8d, %eax
	movl	%r9d, 28(%rsp)                  # 4-byte Spill
	movl	%r9d, %r15d
	imull	%ecx, %r15d
	shll	$2, %r15d
	imull	%ecx, %r12d
	movslq	%eax, %rbp
	leaq	40(%rsp), %r14
	movq	%r14, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movslq	%r15d, %r13
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	%r12d, %r12
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	128(%rsp), %ebp
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	shrl	%eax
	movl	%ebx, %ecx
	shrl	%ecx
	incl	%ecx
	shlq	$32, %rcx
	leaq	(%rcx,%rax), %rdi
	incq	%rdi
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebp, (%rsp)
	movl	%ebx, %ecx
	movl	24(%rsp), %r8d                  # 4-byte Reload
	movl	28(%rsp), %r9d                  # 4-byte Reload
	callq	_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii
.LBB4_2:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z16multiplyMatricesPfS_S_iiii, .Lfunc_end4-_Z16multiplyMatricesPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPfii             # -- Begin function _Z11printMatrixPfii
	.type	_Z11printMatrixPfii,@function
_Z11printMatrixPfii:                    # @_Z11printMatrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	testl	%ebp, %ebp
	jle	.LBB5_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB5_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB5_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB5_4
.LBB5_5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB5_2
.LBB5_6:                                # %._crit_edge14
	movl	$.Lstr.1, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end5:
	.size	_Z11printMatrixPfii, .Lfunc_end5-_Z11printMatrixPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI6_0:
	.long	0x3fc00000                      # float 1.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %rbx
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %r14
	movl	$400, %edi                      # imm = 0x190
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
	movss	.LCPI6_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB6_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%rbx,%rax,4)
	movq	%rcx, %rax
	cmpq	$100, %rcx
	jne	.LBB6_1
# %bb.2:                                # %.lr.ph.i27.preheader
	xorl	%eax, %eax
.LBB6_3:                                # %.lr.ph.i27
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	mulss	%xmm0, %xmm1
	movss	%xmm1, (%r14,%rax,4)
	movq	%rcx, %rax
	cmpq	$100, %rcx
	jne	.LBB6_3
# %bb.4:                                # %_Z16initializeMatrixiiPf.exit31
	movl	$10, (%rsp)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$10, %ecx
	movl	$10, %r8d
	movl	$10, %r9d
	callq	_Z16multiplyMatricesPfS_S_iiii
	movq	%r15, %rdi
	movl	$10, %esi
	movl	$10, %edx
	callq	_Z11printMatrixPfii
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18cudaMatrixMultiplyPfS_S_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18cudaMatrixMultiplyPfS_S_iiii,@object # @_Z18cudaMatrixMultiplyPfS_S_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z18cudaMatrixMultiplyPfS_S_iiii
	.p2align	3, 0x0
_Z18cudaMatrixMultiplyPfS_S_iiii:
	.quad	_Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii
	.size	_Z18cudaMatrixMultiplyPfS_S_iiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%f "
	.size	.L.str.1, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18cudaMatrixMultiplyPfS_S_iiii"
	.size	.L__unnamed_1, 33

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"MATRIX:\n"
	.size	.Lstr, 9

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n"
	.size	.Lstr.1, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__cudaMatrixMultiplyPfS_S_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18cudaMatrixMultiplyPfS_S_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18cudaMatrixMultiplyPfS_S_iiii ; -- Begin function _Z18cudaMatrixMultiplyPfS_S_iiii
	.globl	_Z18cudaMatrixMultiplyPfS_S_iiii
	.p2align	8
	.type	_Z18cudaMatrixMultiplyPfS_S_iiii,@function
_Z18cudaMatrixMultiplyPfS_S_iiii:       ; @_Z18cudaMatrixMultiplyPfS_S_iiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s8, s[0:1], 0x24
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s5, v[2:3]
	s_mul_i32 s14, s14, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, s14, v4
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s8, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s2
	s_cbranch_execz .LBB0_5
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v6, 0
	s_cmp_lt_i32 s3, -1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_lshlrev_b32_e32 v5, 2, v4
	v_mul_lo_u32 v6, v2, s8
	v_lshlrev_b32_e32 v7, 3, v2
	s_lshr_b32 s2, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	s_add_i32 s2, s3, s2
	v_mad_u64_u32 v[2:3], null, v0, s3, v[4:5]
	v_mov_b32_e32 v3, 0
	v_add3_u32 v4, v4, v6, s14
	s_ashr_i32 s2, s2, 1
	s_lshl_b32 s3, s8, 1
	s_add_i32 s2, s2, 1
	v_mov_b32_e32 v6, v3
	v_add_nc_u32_e32 v8, 16, v5
	v_add_nc_u32_e32 v9, v7, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v8, v7
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v5, v3
	v_lshlrev_b64 v[11:12], 2, v[2:3]
	v_add_nc_u32_e32 v2, 2, v2
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	v_lshlrev_b64 v[13:14], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	v_add_nc_u32_e32 v4, s3, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s6, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
	global_load_b32 v5, v[11:12], off
	global_load_b32 v11, v[13:14], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[11:12], v7
	ds_load_2addr_b32 v[13:14], v8 offset1:2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v6, v11, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v12, v14
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %._crit_edge
	v_mad_u64_u32 v[2:3], null, v0, s8, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18cudaMatrixMultiplyPfS_S_iiii
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18cudaMatrixMultiplyPfS_S_iiii, .Lfunc_end0-_Z18cudaMatrixMultiplyPfS_S_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 32
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18cudaMatrixMultiplyPfS_S_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18cudaMatrixMultiplyPfS_S_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
