#include <iostream>
#include <stdio.h>
#include <math.h>
#include <vector>

/**
 * Several variations of a simple 3D 7-point Laplacian.
 *
 * Notes:
 * - Since it is a very simple example which naturally fits the parallelization
 * model of CUDA, there are not many elaborate optimization.
 * - Using shared memory might help a lot once several stencils are fused to
 * store intermediate values. In this example there is no/negligible performance
 * improvement (depending on the GPU architecture).
 */

const size_t Nx = 128;
const size_t Ny = 512;
const size_t Nz = 512;

const size_t nrepeat = 100;

__host__ __device__ __forceinline__ int index(const int i, const int j,
                                              const int k, const dim3 sizes) {
    const int istride = 1;
    const int jstride = sizes.x;
    const int kstride = sizes.x * sizes.y;
    return i * istride + j * jstride + k * kstride;
}

__host__ __device__ __forceinline__ int
index_strides(const int i, const int j, const int k, const dim3 strides) {
    return i * strides.x + j * strides.y + k * strides.z;
}

/**
 * Naive/non-optimized version.
 */
__global__ void laplace3d_no_ldg(double *d, double *n, const dim3 sizes,
                                 const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index_strides(i, j, k, strides)] =
                    1. / 2. * (                                              //
                                  (n[index_strides(i - 1, j, k, strides)])   //
                                  + (n[index_strides(i + 1, j, k, strides)]) //
                                  + (n[index_strides(i, j - 1, k, strides)]) //
                                  + (n[index_strides(i, j + 1, k, strides)]) //
                                  + (n[index_strides(i, j, k - 1, strides)]) //
                                  + (n[index_strides(i, j, k + 1, strides)]) //
                                  - 6. * (n[index_strides(i, j, k, strides)]));
}

/**
 * Putting const __restrict__ on the read only pointers allows the compiler to
 * automatically detect that the read-only data cache can be used (no need for
 * explicit __ldg())
 */
__global__ void laplace3d_ldg(double *d, double *n, const dim3 sizes,
                              const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index_strides(i, j, k, strides)] =
                    1. / 2. *
                    (                                                    //
                        __ldg(&n[index_strides(i - 1, j, k, strides)])   //
                        + __ldg(&n[index_strides(i + 1, j, k, strides)]) //
                        + __ldg(&n[index_strides(i, j - 1, k, strides)]) //
                        + __ldg(&n[index_strides(i, j + 1, k, strides)]) //
                        + __ldg(&n[index_strides(i, j, k - 1, strides)]) //
                        + __ldg(&n[index_strides(i, j, k + 1, strides)]) //
                        - 6. * __ldg(&n[index_strides(i, j, k, strides)]));
}

/**
 * Relative indexing should reduce the number of integer computations which
 * could have an impact.
 */
__global__ void laplace3d_relative_indexing(double *d, double *n,
                                            const dim3 sizes,
                                            const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    int index = index_strides(i, j, k, strides);

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index] = 1. / 2. * (                                  //
                                         __ldg(&n[index - strides.x])   //
                                         + __ldg(&n[index + strides.x]) //
                                         + __ldg(&n[index - strides.y]) //
                                         + __ldg(&n[index + strides.y]) //
                                         + __ldg(&n[index - strides.z]) //
                                         + __ldg(&n[index + strides.z]) //
                                         - 6. * __ldg(&n[index]));
}

/**
 * Putting const __restrict__ on the read only pointers allows the compiler to
 * automatically detect that the read-only data cache can be used (no need for
 * explicit __ldg())
 */
__global__ void laplace3d_const_restrict(double *__restrict__ d,
                                         const double *__restrict__ n,
                                         const dim3 sizes, const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index_strides(i, j, k, strides)] =
                    1. / 2. * (                                              //
                                  (n[index_strides(i - 1, j, k, strides)])   //
                                  + (n[index_strides(i + 1, j, k, strides)]) //
                                  + (n[index_strides(i, j - 1, k, strides)]) //
                                  + (n[index_strides(i, j + 1, k, strides)]) //
                                  + (n[index_strides(i, j, k - 1, strides)]) //
                                  + (n[index_strides(i, j, k + 1, strides)]) //
                                  - 6. * (n[index_strides(i, j, k, strides)]));
}

__host__ __device__ __forceinline__ int index_smem(const int i, const int j,
                                                   const int k) {
    return (i + 1) + (j + 1) * (blockDim.x + 2) +
           (k + 1) * (blockDim.x + 2) * (blockDim.y + 2);
}

/**
 * Shared memory is a per block scratch pad (user-managed cache), which usually
 * is very beneficial for storing intermediate values.
 *
 * Here we just copy the local input of the stencil for each block into its
 * buffer and read from the buffer.
 * The halo region is filled by dedicated threads (first and last in all
 * directions).
 *
 * Note: Another option would be to add extra threads for the halo points to
 * each block and let them sleep for the actual computation.
 */
__global__ void laplace3d_smem(double *d, double *n, const dim3 sizes,
                               const dim3 strides) {
    extern __shared__ double smem[];
    // global indices
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    // local indices
    int ii = threadIdx.x;
    int jj = threadIdx.y;
    int kk = threadIdx.z;

    // copy all elements of the compute domain into the shared mem buffer (on
    // block level)
    smem[index_smem(ii, jj, kk)] = __ldg(&n[index_strides(i, j, k, strides)]);

    // first and last threads (in all dimensions copy the halo region into the
    // shared mem buffer
    if (ii == 0)
        if (i > 0)
            smem[index_smem(-1, jj, kk)] =
                __ldg(&n[index_strides(i - 1, j, k, strides)]);
    if (ii == blockDim.x - 1)
        if (i < sizes.x - 1)
            smem[index_smem(blockDim.x, jj, kk)] =
                __ldg(&n[index_strides(i + 1, j, k, strides)]);
    if (jj == 0)
        if (j > 0)
            smem[index_smem(ii, -1, kk)] =
                __ldg(&n[index_strides(i, j - 1, k, strides)]);
    if (jj == blockDim.y - 1)
        if (j < sizes.y - 1)
            smem[index_smem(ii, blockDim.y, kk)] =
                __ldg(&n[index_strides(i, j + 1, k, strides)]);

    if (kk == 0)
        if (k > 0)
            smem[index_smem(ii, jj, -1)] =
                __ldg(&n[index_strides(i, j, k - 1, strides)]);
    if (kk == blockDim.z - 1)
        if (k < sizes.z - 1)
            smem[index_smem(ii, jj, blockDim.z)] =
                __ldg(&n[index_strides(i, j, k + 1, strides)]);

    __syncthreads();
    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                // read only from the shared mem buffer
                d[index_strides(i, j, k, strides)] =
                    1. / 2. * (                                      //
                                  smem[index_smem(ii - 1, jj, kk)]   //
                                  + smem[index_smem(ii + 1, jj, kk)] //
                                  + smem[index_smem(ii, jj - 1, kk)] //
                                  + smem[index_smem(ii, jj + 1, kk)] //
                                  + smem[index_smem(ii, jj, kk - 1)] //
                                  + smem[index_smem(ii, jj, kk + 1)] //
                                  - 6. * smem[index_smem(ii, jj, kk)]);
}

__global__ void laplace3d_smem_relative(double *__restrict__ d,
                                        const double *__restrict__ n,
                                        const dim3 sizes, const dim3 strides) {
    extern __shared__ double smem[];
    // global indices
    const int i = threadIdx.x + blockIdx.x * blockDim.x;
    const int j = threadIdx.y + blockIdx.y * blockDim.y;
    const int k = threadIdx.z + blockIdx.z * blockDim.z;

    // local indices
    const int ii = threadIdx.x;
    const int jj = threadIdx.y;
    const int kk = threadIdx.z;

    // local strides
    const int is = blockDim.x;
    const int js = blockDim.y;
    const int ks = blockDim.z;

    int glob_index = index_strides(i, j, k, strides);
    int loc_index = index_smem(ii, jj, kk);

    // copy all elements of the compute domain into the shared mem buffer (on
    // block level)
    smem[loc_index] = __ldg(&n[glob_index]);

    // first and last threads (in all dimensions copy the halo region into the
    // shared mem buffer
    if (ii == 0)
        if (i > 0)
            smem[loc_index - is] = __ldg(&n[glob_index - strides.x]);
    if (ii == blockDim.x - 1)
        if (i < sizes.x - 1)
            smem[loc_index + is] = __ldg(&n[glob_index + strides.x]);
    if (jj == 0)
        if (j > 0)
            smem[loc_index - js] = __ldg(&n[glob_index - strides.y]);
    if (jj == blockDim.y - 1)
        if (j < sizes.y - 1)
            smem[loc_index + js] = __ldg(&n[glob_index + strides.y]);

    if (kk == 0)
        if (k > 0)
            smem[loc_index - ks] = __ldg(&n[glob_index - strides.z]);
    if (kk == blockDim.z - 1)
        if (k < sizes.z - 1)
            smem[loc_index + ks] = __ldg(&n[glob_index + strides.z]);

    __syncthreads();
    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                // read only from the shared mem buffer
                d[glob_index] = 1. / 2. * (                          //
                                              smem[loc_index - is]   //
                                              + smem[loc_index + is] //
                                              + smem[loc_index - js] //
                                              + smem[loc_index + js] //
                                              + smem[loc_index - ks] //
                                              + smem[loc_index + ks] //
                                              - 6. * smem[loc_index]);
}

__host__ __device__ __forceinline__ int index_smem2(const int i, const int j,
                                                    const int k) {
    return i + j * (blockDim.x) + k * (blockDim.x) * (blockDim.y);
}

/**
 * Using extra threads for copying halo points to
 * each block and let them sleep for the actual computation.
 */
__global__ void laplace3d_smem2(double *d, double *n, const dim3 sizes,
                                const dim3 strides) {
    extern __shared__ double smem[];
    // global indices
    int i = -1 + (int)(threadIdx.x + blockIdx.x * (blockDim.x - 2));
    int j = -1 + (int)(threadIdx.y + blockIdx.y * (blockDim.y - 2));
    int k = -1 + (int)(threadIdx.z + blockIdx.z * (blockDim.z - 2));

    // local indices
    int ii = threadIdx.x;
    int jj = threadIdx.y;
    int kk = threadIdx.z;

    // copy all elements of the compute domain into the shared mem buffer
    if (i >= 0 && i < sizes.x)
        if (j >= 0 && j < sizes.y)
            if (k >= 0 && k < sizes.z) {
                smem[index_smem2(ii, jj, kk)] =
                    __ldg(&n[index_strides(i, j, k, strides)]);
            }

    __syncthreads();
    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                if (ii > 0 && ii < blockDim.x - 1)
                    if (jj > 0 && jj < blockDim.y - 1)
                        if (kk > 0 && kk < blockDim.z - 1) {
                            d[index_strides(i, j, k, strides)] =
                                1. / 2. *
                                (                                       //
                                    smem[index_smem2(ii - 1, jj, kk)]   //
                                    + smem[index_smem2(ii + 1, jj, kk)] //
                                    + smem[index_smem2(ii, jj - 1, kk)] //
                                    + smem[index_smem2(ii, jj + 1, kk)] //
                                    + smem[index_smem2(ii, jj, kk - 1)] //
                                    + smem[index_smem2(ii, jj, kk + 1)] //
                                    - 6. * smem[index_smem2(ii, jj, kk)]);
                        }
}

void init(double *n, const dim3 sizes) {
    for (size_t i = 0; i < sizes.x; ++i)
        for (size_t j = 0; j < sizes.y; ++j)
            for (size_t k = 0; k < sizes.z; ++k) {
                n[index(i, j, k, sizes)] =
                    sin((double)i / ((double)sizes.x - 1.) * M_PI) *
                    sin((double)j / ((double)sizes.y - 1.) * M_PI) *
                    sin((double)k / ((double)sizes.z - 1.) * M_PI);
            }
}

void print(double *n, const dim3 sizes) {
    for (size_t i = 0; i < sizes.x; ++i) {
        std::cout << (double)i / (double)(sizes.x - 1) << " \t"
                  << -1. * n[index(i, sizes.y / 2, sizes.z / 2, sizes)] /
                         pow(2. * M_PI / sizes.x, 3)
                  << std::endl;
    }
}

float elapsed(cudaEvent_t &start, cudaEvent_t &stop) {
    float result;
    cudaEventElapsedTime(&result, start, stop);
    return result;
}

enum class Variation {
    LDG,
    SHARED_MEM,
    SHARED_MEM_REL,
    NO_LDG,
    RELATIVE,
    CONST_RESTRICT,
    SHARED_MEM2
};

std::ostream &operator<<(std::ostream &s, Variation const &var) {
    switch (var) {
    case Variation::NO_LDG:
        s << "no optimization,        ";
        break;
    case Variation::LDG:
        s << "__ldg,                  ";
        break;
    case Variation::SHARED_MEM:
        s << "shared memory,          ";
        break;
    case Variation::SHARED_MEM_REL:
        s << "shared memory relative, ";
        break;
    case Variation::SHARED_MEM2:
        s << "shared memory v2,       ";
        break;
    case Variation::RELATIVE:
        s << "relative indexing,      ";
        break;
    case Variation::CONST_RESTRICT:
        s << "const __restrict__,     ";
        break;
    default:
        s << "n/a";
    }

    return s;
}

/**
 * Warning: one of the stencils is modifying the threadsPerBlock.
 */
template <Variation Var>
void execute(dim3 threadsPerBlock, double *dd, double *dn) {
    const dim3 sizes(Nx, Ny, Nz);
    const dim3 strides(1, Nx, Nx * Ny);

    cudaEvent_t start_;
    cudaEvent_t stop_;
    cudaEventCreate(&start_);
    cudaEventCreate(&stop_);
    int nBlocksX = Nx / threadsPerBlock.x;
    int nBlocksY = Ny / threadsPerBlock.y;
    int nBlocksZ = Nz / threadsPerBlock.z;

    if (Nx % threadsPerBlock.x != 0) {
        nBlocksX++;
        throw std::runtime_error("there is a bug for non divisible sizes");
    }
    if (Ny % threadsPerBlock.y != 0) {
        nBlocksY++;
        throw std::runtime_error("there is a bug for non divisible sizes");
    }
    if (Nz % threadsPerBlock.z != 0) {
        nBlocksZ++;
        throw std::runtime_error("there is a bug for non divisible sizes");
    }

    dim3 nBlocks(nBlocksX, nBlocksY, nBlocksZ);

    cudaEventRecord(start_, 0);

    for (size_t i = 0; i < nrepeat; ++i) {
        if (Var == Variation::SHARED_MEM) {
            size_t smem_size = (threadsPerBlock.x + 2) *
                               (threadsPerBlock.y + 2) *
                               (threadsPerBlock.z + 2);
            laplace3d_smem<<<nBlocks, threadsPerBlock,
                             smem_size * sizeof(double)>>>(dd, dn, sizes,
                                                           strides);
        } else if (Var == Variation::SHARED_MEM_REL) {
            size_t smem_size = (threadsPerBlock.x + 2) *
                               (threadsPerBlock.y + 2) *
                               (threadsPerBlock.z + 2);
            laplace3d_smem_relative<<<nBlocks, threadsPerBlock,
                                      smem_size * sizeof(double)>>>(
                dd, dn, sizes, strides);
        } else if (Var == Variation::SHARED_MEM2) {
            size_t smem_size = (threadsPerBlock.x + 2) *
                               (threadsPerBlock.y + 2) *
                               (threadsPerBlock.z + 2);

            if (smem_size <= 1024) {

                dim3 enlargedBlock(threadsPerBlock.x + 2, threadsPerBlock.y + 2,
                                   threadsPerBlock.z + 2);

                laplace3d_smem2<<<nBlocks, enlargedBlock,
                                  smem_size * sizeof(double)>>>(dd, dn, sizes,
                                                                strides);
            }
        } else if (Var == Variation::LDG)
            laplace3d_ldg<<<nBlocks, threadsPerBlock>>>(dd, dn, sizes, strides);
        else if (Var == Variation::NO_LDG)
            laplace3d_no_ldg<<<nBlocks, threadsPerBlock>>>(dd, dn, sizes,
                                                           strides);
        else if (Var == Variation::CONST_RESTRICT)
            laplace3d_const_restrict<<<nBlocks, threadsPerBlock>>>(
                dd, dn, sizes, strides);
        else if (Var == Variation::RELATIVE)
            laplace3d_relative_indexing<<<nBlocks, threadsPerBlock>>>(
                dd, dn, sizes, strides);
    }
    cudaEventRecord(stop_, 0);
    cudaEventSynchronize(stop_);

    cudaDeviceSynchronize();
    cudaError_t error = cudaGetLastError();
    if (error != cudaSuccess) {
        fprintf(stderr, "CUDA ERROR: %s in %s at line %d\n",
                cudaGetErrorString(error), __FILE__, __LINE__);
        exit(-1);
    }

    std::cout << "# Variation: " << Var;
    std::cout << "threads/block = (" << threadsPerBlock.x << "/"
              << threadsPerBlock.y << "/" << threadsPerBlock.z << "), \t";
    std::cout << "blocks = (" << nBlocks.x << "/" << nBlocks.y << "/"
              << nBlocks.z << "), \t";
    std::cout << "time = " << elapsed(start_, stop_) / (float)nrepeat << "ms"
              << std::endl;

    cudaEventDestroy(start_);
    cudaEventDestroy(stop_);
}

bool verify(double *ref, double *out, dim3 sizes) {
    for (size_t i = 1; i < sizes.x - 1; ++i)
        for (size_t j = 1; j < sizes.y - 1; ++j)
            for (size_t k = 1; k < sizes.z - 1; ++k) {
                if (ref[i] != out[i]) {
                    std::cout << "in index " << i << " val=" << out[i]
                              << ", ref=" << ref[i] << std::endl;
                    return false;
                }
            }
    return true;
}

int main() {
    dim3 sizes(Nx, Ny, Nz);

    size_t total_size = Nx * Ny * Nz;
    double *d = new double[total_size];
    double *n = new double[total_size];
    double *ref = new double[total_size];

    init(n, sizes);

    double *dd;
    cudaMalloc(&dd, sizeof(double) * total_size);
    double *dn;
    cudaMalloc(&dn, sizeof(double) * total_size);

    cudaMemcpy(dn, n, sizeof(double) * total_size, cudaMemcpyHostToDevice);

    // execute one of variations to be used as a reference
    execute<Variation::NO_LDG>(dim3(8, 8, 8), dd, dn);
    cudaMemcpy(ref, dd, sizeof(double) * total_size, cudaMemcpyDeviceToHost);

    std::vector<dim3> threadsPerBlock;
    // the smem version does not work for non-full blocks, difficult exercise:
    // threadsPerBlock.emplace_back(14, 6, 6);

    threadsPerBlock.emplace_back(32, 4, 4);
    threadsPerBlock.emplace_back(8, 8, 8);
    threadsPerBlock.emplace_back(16, 8, 8);
    threadsPerBlock.emplace_back(16, 4, 4);

    for (auto dim : threadsPerBlock) {
        execute<Variation::NO_LDG>(dim, dd, dn);
        execute<Variation::LDG>(dim, dd, dn);
        execute<Variation::CONST_RESTRICT>(dim, dd, dn);
        execute<Variation::RELATIVE>(dim, dd, dn);
        execute<Variation::SHARED_MEM>(dim, dd, dn);
        execute<Variation::SHARED_MEM2>(dim, dd, dn);
        execute<Variation::SHARED_MEM_REL>(dim, dd, dn);
    }

    cudaMemcpy(d, dd, sizeof(double) * total_size, cudaMemcpyDeviceToHost);

    if (!verify(ref, d, sizes)) {
        std::cout << "ERROR: the last executed variant didn't validate"
                  << std::endl;
    } else {
        std::cout << "OK: last variation verified against the non-optimized "
                     "CUDA version"
                  << std::endl;
    }
    //    print(d, sizes);

    delete[] d;
    delete[] n;
    delete[] ref;
    cudaFree(dd);
    cudaFree(dn);
}

	.file	"tmpxft_00261fd7_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4021:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4021:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"vector::_M_realloc_insert"
	.text
	.align 2
	.type	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0, @function
_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0:
.LFB4780:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	8(%rdi), %rbx
	cmpq	16(%rdi), %rbx
	je	.L3
	movl	(%rcx), %eax
	movl	(%rdx), %edx
	addq	$12, %rbx
	movl	(%rsi), %ecx
	movl	%edx, -8(%rbx)
	movl	%ecx, -12(%rbx)
	movl	%eax, -4(%rbx)
	movq	%rbx, 8(%rdi)
	jmp	.L2
.L3:
	movabsq	$-6148914691236517205, %rax
	movq	(%rdi), %r14
	movq	%rbx, %r15
	movabsq	$768614336404564650, %rdi
	subq	%r14, %r15
	movq	%r15, %rbp
	sarq	$2, %rbp
	imulq	%rax, %rbp
	cmpq	%rdi, %rbp
	jne	.L5
	leaq	.LC0(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L5:
	cmpq	%r14, %rbx
	movl	$1, %eax
	cmovne	%rbp, %rax
	addq	%rax, %rbp
	jc	.L15
	xorl	%r13d, %r13d
	testq	%rbp, %rbp
	je	.L10
	movabsq	$768614336404564650, %rax
	cmpq	%rax, %rbp
	cmova	%rax, %rbp
	jmp	.L9
.L15:
	movq	%rdi, %rbp
.L9:
	imulq	$12, %rbp, %rdi
	movq	%rcx, 24(%rsp)
	movq	%rdx, 16(%rsp)
	movq	%rsi, 8(%rsp)
	call	_Znwm@PLT
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	%rax, %r13
.L10:
	movl	(%rcx), %eax
	movl	(%rsi), %ecx
	addq	%r13, %r15
	movl	(%rdx), %edx
	movl	%ecx, (%r15)
	movl	%edx, 4(%r15)
	movq	%r13, %rdx
	movl	%eax, 8(%r15)
	movq	%r14, %rax
.L11:
	addq	$12, %rdx
	cmpq	%rax, %rbx
	je	.L23
	movq	(%rax), %rcx
	addq	$12, %rax
	movq	%rcx, -12(%rdx)
	movl	-4(%rax), %ecx
	movl	%ecx, -4(%rdx)
	jmp	.L11
.L23:
	movabsq	$3074457345618258603, %rax
	subq	%r14, %rbx
	shrq	$2, %rbx
	imulq	%rax, %rbx
	movabsq	$4611686018427387903, %rax
	andq	%rax, %rbx
	incq	%rbx
	imulq	$12, %rbx, %rbx
	addq	%r13, %rbx
	testq	%r14, %r14
	je	.L13
	movq	16(%r12), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L13:
	imulq	$12, %rbp, %rbp
	movq	%r13, (%r12)
	movq	%rbx, 8(%r12)
	addq	%rbp, %r13
	movq	%r13, 16(%r12)
.L2:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4780:
	.size	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0, .-_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4786:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4786:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z4initPd4dim3
	.type	_Z4initPd4dim3, @function
_Z4initPd4dim3:
.LFB4002:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %rcx
	movl	%esi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rsi, 48(%rsp)
	movl	52(%rsp), %ebp
	movl	%edx, 24(%rsp)
	movq	%rdi, %rdx
	movl	%ebp, %r8d
	imull	%edi, %r8d
.L26:
	cmpq	%rdi, %r14
	jnb	.L25
	movl	24(%rsp), %r12d
	movl	%r14d, %eax
	xorl	%ebx, %ebx
	movl	%ebp, %r13d
.L37:
	cmpq	%r13, %rbx
	jnb	.L34
	xorl	%r15d, %r15d
.L35:
	cmpq	%r12, %r15
	jnb	.L39
	cvtsi2sdq	%r14, %xmm0
	movl	%edx, 44(%rsp)
	cvtsi2sdq	%rdi, %xmm1
	subsd	.LC1(%rip), %xmm1
	movq	%rcx, 32(%rsp)
	movl	%eax, 40(%rsp)
	movl	%r8d, 28(%rsp)
	divsd	%xmm1, %xmm0
	movq	%rdi, 16(%rsp)
	mulsd	.LC2(%rip), %xmm0
	call	sin@PLT
	cvtsi2sdq	%r13, %xmm1
	subsd	.LC1(%rip), %xmm1
	movsd	%xmm0, (%rsp)
	cvtsi2sdq	%rbx, %xmm0
	divsd	%xmm1, %xmm0
	mulsd	.LC2(%rip), %xmm0
	call	sin@PLT
	cvtsi2sdq	%r12, %xmm1
	subsd	.LC1(%rip), %xmm1
	movsd	%xmm0, 8(%rsp)
	cvtsi2sdq	%r15, %xmm0
	divsd	%xmm1, %xmm0
	mulsd	.LC2(%rip), %xmm0
	call	sin@PLT
	movl	28(%rsp), %r8d
	movl	40(%rsp), %eax
	movaps	%xmm0, %xmm1
	movsd	(%rsp), %xmm0
	movq	32(%rsp), %rcx
	mulsd	8(%rsp), %xmm0
	movl	%r8d, %r9d
	movl	44(%rsp), %edx
	imull	%r15d, %r9d
	movq	16(%rsp), %rdi
	incq	%r15
	addl	%eax, %r9d
	mulsd	%xmm1, %xmm0
	movslq	%r9d, %r9
	movsd	%xmm0, (%rcx,%r9,8)
	jmp	.L35
.L39:
	incq	%rbx
	addl	%edx, %eax
	jmp	.L37
.L34:
	incq	%r14
	jmp	.L26
.L25:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4002:
	.size	_Z4initPd4dim3, .-_Z4initPd4dim3
	.section	.rodata.str1.1
.LC3:
	.string	" \t"
	.text
	.globl	_Z5printPd4dim3
	.type	_Z5printPd4dim3, @function
_Z5printPd4dim3:
.LFB4003:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rsi, 16(%rsp)
	movl	20(%rsp), %ebx
	movl	%edx, 24(%rsp)
	imull	%ebx, %r12d
	shrl	%ebx
	imull	%esi, %ebx
.L41:
	movl	%r15d, %r13d
	cmpq	%r13, %r14
	jnb	.L48
	leal	-1(%r15), %eax
	leaq	_ZSt4cout(%rip), %rdi
	cvtsi2sdq	%rax, %xmm1
	cvtsi2sdq	%r14, %xmm0
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2sdq	%r13, %xmm1
	leal	(%rbx,%r14), %ecx
	incq	%r14
	movsd	.LC6(%rip), %xmm0
	movq	%rax, 8(%rsp)
	movl	24(%rsp), %eax
	divsd	%xmm1, %xmm0
	shrl	%eax
	movsd	.LC5(%rip), %xmm1
	imull	%r12d, %eax
	addl	%ecx, %eax
	cltq
	movsd	0(%rbp,%rax,8), %xmm2
	xorps	.LC4(%rip), %xmm2
	movsd	%xmm2, (%rsp)
	call	pow@PLT
	movsd	(%rsp), %xmm2
	movq	8(%rsp), %rdi
	divsd	%xmm0, %xmm2
	movaps	%xmm2, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L41
.L48:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4003:
	.size	_Z5printPd4dim3, .-_Z5printPd4dim3
	.globl	_Z7elapsedRP10CUevent_stS1_
	.type	_Z7elapsedRP10CUevent_stS1_, @function
_Z7elapsedRP10CUevent_stS1_:
.LFB4004:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, %rax
	movq	%fs:40, %rdx
	movq	%rdx, 8(%rsp)
	xorl	%edx, %edx
	movq	(%rsi), %rdx
	movq	(%rax), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movss	4(%rsp), %xmm0
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4004:
	.size	_Z7elapsedRP10CUevent_stS1_, .-_Z7elapsedRP10CUevent_stS1_
	.section	.rodata.str1.1
.LC7:
	.string	"no optimization,        "
.LC8:
	.string	"__ldg,                  "
.LC9:
	.string	"shared memory,          "
.LC10:
	.string	"shared memory relative, "
.LC11:
	.string	"shared memory v2,       "
.LC12:
	.string	"relative indexing,      "
.LC13:
	.string	"const __restrict__,     "
.LC14:
	.string	"n/a"
	.text
	.globl	_ZlsRSoRK9Variation
	.type	_ZlsRSoRK9Variation, @function
_ZlsRSoRK9Variation:
.LFB4005:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	cmpl	$6, (%rsi)
	movq	%rdi, %rbx
	ja	.L53
	movl	(%rsi), %eax
	leaq	.L55(%rip), %rdx
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata
	.align 4
	.align 4
.L55:
	.long	.L61-.L55
	.long	.L60-.L55
	.long	.L59-.L55
	.long	.L58-.L55
	.long	.L57-.L55
	.long	.L56-.L55
	.long	.L54-.L55
	.text
.L58:
	leaq	.LC7(%rip), %rsi
	jmp	.L64
.L61:
	leaq	.LC8(%rip), %rsi
	jmp	.L64
.L60:
	leaq	.LC9(%rip), %rsi
	jmp	.L64
.L59:
	leaq	.LC10(%rip), %rsi
	jmp	.L64
.L54:
	leaq	.LC11(%rip), %rsi
	jmp	.L64
.L57:
	leaq	.LC12(%rip), %rsi
	jmp	.L64
.L56:
	leaq	.LC13(%rip), %rsi
	jmp	.L64
.L53:
	leaq	.LC14(%rip), %rsi
.L64:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4005:
	.size	_ZlsRSoRK9Variation, .-_ZlsRSoRK9Variation
	.section	.rodata.str1.1
.LC15:
	.string	"in index "
.LC16:
	.string	" val="
.LC17:
	.string	", ref="
	.text
	.globl	_Z6verifyPdS_4dim3
	.type	_Z6verifyPdS_4dim3, @function
_Z6verifyPdS_4dim3:
.LFB4007:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	decl	%ecx
	movl	$1, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
	addq	$8, %rbp
	leal	-1(%rdx), %edi
	addq	$8, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, (%rsp)
	movl	4(%rsp), %eax
	leal	-1(%rax), %esi
.L66:
	cmpq	%rdi, %r12
	jnb	.L74
	movl	$1, %eax
.L72:
	cmpq	%rsi, %rax
	jnb	.L77
	movl	$1, %edx
.L71:
	cmpq	%rcx, %rdx
	jnb	.L78
	movsd	(%rbx), %xmm0
	ucomisd	0(%rbp), %xmm0
	jp	.L75
	je	.L67
.L75:
	leaq	.LC15(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC16(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
	jmp	.L65
.L67:
	incq	%rdx
	jmp	.L71
.L78:
	incq	%rax
	jmp	.L72
.L77:
	incq	%r12
	addq	$8, %rbx
	addq	$8, %rbp
	jmp	.L66
.L74:
	movb	$1, %al
.L65:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4007:
	.size	_Z6verifyPdS_4dim3, .-_Z6verifyPdS_4dim3
	.globl	_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_
	.type	_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_, @function
_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_:
.LFB4043:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L79
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16laplace3d_no_ldgPdS_4dim3S0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L79:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4043:
	.size	_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_, .-_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_
	.globl	_Z16laplace3d_no_ldgPdS_4dim3S0_
	.type	_Z16laplace3d_no_ldgPdS_4dim3S0_, @function
_Z16laplace3d_no_ldgPdS_4dim3S0_:
.LFB4044:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4044:
	.size	_Z16laplace3d_no_ldgPdS_4dim3S0_, .-_Z16laplace3d_no_ldgPdS_4dim3S0_
	.globl	_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_
	.type	_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_, @function
_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_:
.LFB4045:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13laplace3d_ldgPdS_4dim3S0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L85:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4045:
	.size	_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_, .-_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_
	.globl	_Z13laplace3d_ldgPdS_4dim3S0_
	.type	_Z13laplace3d_ldgPdS_4dim3S0_, @function
_Z13laplace3d_ldgPdS_4dim3S0_:
.LFB4046:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4046:
	.size	_Z13laplace3d_ldgPdS_4dim3S0_, .-_Z13laplace3d_ldgPdS_4dim3S0_
	.globl	_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_
	.type	_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_, @function
_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_:
.LFB4047:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z27laplace3d_relative_indexingPdS_4dim3S0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L91:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L93
	call	__stack_chk_fail@PLT
.L93:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4047:
	.size	_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_, .-_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_
	.globl	_Z27laplace3d_relative_indexingPdS_4dim3S0_
	.type	_Z27laplace3d_relative_indexingPdS_4dim3S0_, @function
_Z27laplace3d_relative_indexingPdS_4dim3S0_:
.LFB4048:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4048:
	.size	_Z27laplace3d_relative_indexingPdS_4dim3S0_, .-_Z27laplace3d_relative_indexingPdS_4dim3S0_
	.globl	_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_
	.type	_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_, @function
_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_:
.LFB4049:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L97
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z24laplace3d_const_restrictPdPKd4dim3S2_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L97:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L99
	call	__stack_chk_fail@PLT
.L99:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4049:
	.size	_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_, .-_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_
	.globl	_Z24laplace3d_const_restrictPdPKd4dim3S2_
	.type	_Z24laplace3d_const_restrictPdPKd4dim3S2_, @function
_Z24laplace3d_const_restrictPdPKd4dim3S2_:
.LFB4050:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4050:
	.size	_Z24laplace3d_const_restrictPdPKd4dim3S2_, .-_Z24laplace3d_const_restrictPdPKd4dim3S2_
	.globl	_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_
	.type	_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_, @function
_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_:
.LFB4051:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L103
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14laplace3d_smemPdS_4dim3S0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L103:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L105
	call	__stack_chk_fail@PLT
.L105:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4051:
	.size	_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_, .-_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_
	.globl	_Z14laplace3d_smemPdS_4dim3S0_
	.type	_Z14laplace3d_smemPdS_4dim3S0_, @function
_Z14laplace3d_smemPdS_4dim3S0_:
.LFB4052:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4052:
	.size	_Z14laplace3d_smemPdS_4dim3S0_, .-_Z14laplace3d_smemPdS_4dim3S0_
	.globl	_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_
	.type	_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_, @function
_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_:
.LFB4053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L109
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23laplace3d_smem_relativePdPKd4dim3S2_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L109:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L111
	call	__stack_chk_fail@PLT
.L111:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4053:
	.size	_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_, .-_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_
	.globl	_Z23laplace3d_smem_relativePdPKd4dim3S2_
	.type	_Z23laplace3d_smem_relativePdPKd4dim3S2_, @function
_Z23laplace3d_smem_relativePdPKd4dim3S2_:
.LFB4054:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4054:
	.size	_Z23laplace3d_smem_relativePdPKd4dim3S2_, .-_Z23laplace3d_smem_relativePdPKd4dim3S2_
	.globl	_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_
	.type	_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_, @function
_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_:
.LFB4055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rsp)
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 104(%rsp)
	leaq	24(%rsp), %rdx
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rcx, 112(%rsp)
	leaq	32(%rsp), %rcx
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15laplace3d_smem2PdS_4dim3S0_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L115:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L117
	call	__stack_chk_fail@PLT
.L117:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4055:
	.size	_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_, .-_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_
	.globl	_Z15laplace3d_smem2PdS_4dim3S0_
	.type	_Z15laplace3d_smem2PdS_4dim3S0_, @function
_Z15laplace3d_smem2PdS_4dim3S0_:
.LFB4056:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%rdx, 16(%rsp)
	leaq	16(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	movq	%rsp, %rcx
	movq	%r8, (%rsp)
	movl	%r9d, 8(%rsp)
	call	_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4056:
	.size	_Z15laplace3d_smem2PdS_4dim3S0_, .-_Z15laplace3d_smem2PdS_4dim3S0_
	.section	.rodata.str1.1
.LC18:
	.string	"_Z15laplace3d_smem2PdS_4dim3S0_"
.LC19:
	.string	"_Z23laplace3d_smem_relativePdPKd4dim3S2_"
.LC20:
	.string	"_Z14laplace3d_smemPdS_4dim3S0_"
.LC21:
	.string	"_Z24laplace3d_const_restrictPdPKd4dim3S2_"
.LC22:
	.string	"_Z27laplace3d_relative_indexingPdS_4dim3S0_"
.LC23:
	.string	"_Z13laplace3d_ldgPdS_4dim3S0_"
.LC24:
	.string	"_Z16laplace3d_no_ldgPdS_4dim3S0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15laplace3d_smem2PdS_4dim3S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23laplace3d_smem_relativePdPKd4dim3S2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14laplace3d_smemPdS_4dim3S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24laplace3d_const_restrictPdPKd4dim3S2_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z27laplace3d_relative_indexingPdS_4dim3S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13laplace3d_ldgPdS_4dim3S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16laplace3d_no_ldgPdS_4dim3S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._Z7executeIL9Variation3EEv4dim3PdS2_.str1.1,"aMS",@progbits,1
.LC25:
	.string	"there is a bug for non divisible sizes"
.LC26:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/orgarten/hack18_dd/master/main.cu"
.LC27:
	.string	"CUDA ERROR: %s in %s at line %d\n"
.LC28:
	.string	"# Variation: "
.LC29:
	.string	"threads/block = ("
.LC30:
	.string	"/"
.LC31:
	.string	"), \t"
.LC32:
	.string	"blocks = ("
.LC33:
	.string	"time = "
.LC35:
	.string	"ms"
	.section	.text._Z7executeIL9Variation3EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation3EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation3EEv4dim3PdS2_
	.type	_Z7executeIL9Variation3EEv4dim3PdS2_, @function
_Z7executeIL9Variation3EEv4dim3PdS2_:
.LFB4365:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4365
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r14d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdx, 48(%rsp)
	movq	%rcx, 56(%rsp)
	movq	%rdi, 64(%rsp)
	movl	68(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB0:
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaEventCreate@PLT
.LEHE0:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r14d
	xorl	%edx, %edx
	movl	%eax, 36(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 40(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	$128, %eax
	divq	%r12
	testq	%rdx, %rdx
	je	.L124
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB1:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE1:
	jmp	.L147
.L124:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, (%rsp)
	movq	%rcx, %rax
	divq	(%rsp)
	testq	%rdx, %rdx
	je	.L126
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB2:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE2:
	jmp	.L147
.L126:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
	movq	%rcx, %rax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L128
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB3:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE3:
.L147:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L144
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB4:
	call	__cxa_throw@PLT
.L128:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r13d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
.L131:
	movl	36(%rsp), %eax
	movl	%r14d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 68(%rsp)
	movl	44(%rsp), %esi
	movl	%ebx, %ecx
	movl	%eax, 100(%rsp)
	movl	40(%rsp), %eax
	movq	64(%rsp), %rdx
	movl	%eax, 104(%rsp)
	movq	100(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L130
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	leaq	124(%rsp), %rcx
	movabsq	$549755813889, %rax
	leaq	112(%rsp), %rdx
	movq	%r15, 112(%rsp)
	movl	$512, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$65536, 132(%rsp)
	call	_Z46__device_stub__Z16laplace3d_no_ldgPdS_4dim3S0_PdS_RK4dim3S2_
.L130:
	decq	%r13
	jne	.L131
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L132
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L132:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	leaq	.LC31(%rip), %r12
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	36(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	40(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L139
	jmp	.L144
.L140:
	endbr64
	jmp	.L148
.L141:
	endbr64
	jmp	.L148
.L142:
	endbr64
.L148:
	movq	%rax, %rbp
.L137:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L144
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE4:
.L144:
	call	__stack_chk_fail@PLT
.L139:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4365:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._Z7executeIL9Variation3EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation3EEv4dim3PdS2_,comdat
.LLSDA4365:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4365-.LLSDACSB4365
.LLSDACSB4365:
	.uleb128 .LEHB0-.LFB4365
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4365
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L140-.LFB4365
	.uleb128 0
	.uleb128 .LEHB2-.LFB4365
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L141-.LFB4365
	.uleb128 0
	.uleb128 .LEHB3-.LFB4365
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L142-.LFB4365
	.uleb128 0
	.uleb128 .LEHB4-.LFB4365
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4365:
	.section	.text._Z7executeIL9Variation3EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation3EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation3EEv4dim3PdS2_, .-_Z7executeIL9Variation3EEv4dim3PdS2_
	.section	.text._ZNSt6vectorI4dim3SaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorI4dim3SaIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorI4dim3SaIS0_EED2Ev
	.type	_ZNSt6vectorI4dim3SaIS0_EED2Ev, @function
_ZNSt6vectorI4dim3SaIS0_EED2Ev:
.LFB4376:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L149
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L149:
	ret
	.cfi_endproc
.LFE4376:
	.size	_ZNSt6vectorI4dim3SaIS0_EED2Ev, .-_ZNSt6vectorI4dim3SaIS0_EED2Ev
	.weak	_ZNSt6vectorI4dim3SaIS0_EED1Ev
	.set	_ZNSt6vectorI4dim3SaIS0_EED1Ev,_ZNSt6vectorI4dim3SaIS0_EED2Ev
	.section	.text._Z7executeIL9Variation0EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation0EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation0EEv4dim3PdS2_
	.type	_Z7executeIL9Variation0EEv4dim3PdS2_, @function
_Z7executeIL9Variation0EEv4dim3PdS2_:
.LFB4385:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4385
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r14d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdx, 48(%rsp)
	movq	%rcx, 56(%rsp)
	movq	%rdi, 64(%rsp)
	movl	68(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB5:
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaEventCreate@PLT
.LEHE5:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r14d
	xorl	%edx, %edx
	movl	%eax, 36(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 40(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	$128, %eax
	divq	%r12
	testq	%rdx, %rdx
	je	.L152
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB6:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE6:
	jmp	.L175
.L152:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, (%rsp)
	movq	%rcx, %rax
	divq	(%rsp)
	testq	%rdx, %rdx
	je	.L154
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB7:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE7:
	jmp	.L175
.L154:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
	movq	%rcx, %rax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L156
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB8:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE8:
.L175:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L172
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB9:
	call	__cxa_throw@PLT
.L156:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r13d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
.L159:
	movl	36(%rsp), %eax
	movl	%r14d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 68(%rsp)
	movl	44(%rsp), %esi
	movl	%ebx, %ecx
	movl	%eax, 100(%rsp)
	movl	40(%rsp), %eax
	movq	64(%rsp), %rdx
	movl	%eax, 104(%rsp)
	movq	100(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L158
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	leaq	124(%rsp), %rcx
	movabsq	$549755813889, %rax
	leaq	112(%rsp), %rdx
	movq	%r15, 112(%rsp)
	movl	$512, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$65536, 132(%rsp)
	call	_Z43__device_stub__Z13laplace3d_ldgPdS_4dim3S0_PdS_RK4dim3S2_
.L158:
	decq	%r13
	jne	.L159
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L160
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L160:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	leaq	.LC31(%rip), %r12
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	36(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	40(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L167
	jmp	.L172
.L168:
	endbr64
	jmp	.L176
.L169:
	endbr64
	jmp	.L176
.L170:
	endbr64
.L176:
	movq	%rax, %rbp
.L165:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L172
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE9:
.L172:
	call	__stack_chk_fail@PLT
.L167:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4385:
	.section	.gcc_except_table._Z7executeIL9Variation0EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation0EEv4dim3PdS2_,comdat
.LLSDA4385:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4385-.LLSDACSB4385
.LLSDACSB4385:
	.uleb128 .LEHB5-.LFB4385
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB6-.LFB4385
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L168-.LFB4385
	.uleb128 0
	.uleb128 .LEHB7-.LFB4385
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L169-.LFB4385
	.uleb128 0
	.uleb128 .LEHB8-.LFB4385
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L170-.LFB4385
	.uleb128 0
	.uleb128 .LEHB9-.LFB4385
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
.LLSDACSE4385:
	.section	.text._Z7executeIL9Variation0EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation0EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation0EEv4dim3PdS2_, .-_Z7executeIL9Variation0EEv4dim3PdS2_
	.section	.text._Z7executeIL9Variation5EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation5EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation5EEv4dim3PdS2_
	.type	_Z7executeIL9Variation5EEv4dim3PdS2_, @function
_Z7executeIL9Variation5EEv4dim3PdS2_:
.LFB4386:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4386
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r14d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdx, 48(%rsp)
	movq	%rcx, 56(%rsp)
	movq	%rdi, 64(%rsp)
	movl	68(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB10:
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaEventCreate@PLT
.LEHE10:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r14d
	xorl	%edx, %edx
	movl	%eax, 36(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 40(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	$128, %eax
	divq	%r12
	testq	%rdx, %rdx
	je	.L178
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB11:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE11:
	jmp	.L201
.L178:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, (%rsp)
	movq	%rcx, %rax
	divq	(%rsp)
	testq	%rdx, %rdx
	je	.L180
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB12:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE12:
	jmp	.L201
.L180:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
	movq	%rcx, %rax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L182
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB13:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE13:
.L201:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L198
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB14:
	call	__cxa_throw@PLT
.L182:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r13d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
.L185:
	movl	36(%rsp), %eax
	movl	%r14d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 68(%rsp)
	movl	44(%rsp), %esi
	movl	%ebx, %ecx
	movl	%eax, 100(%rsp)
	movl	40(%rsp), %eax
	movq	64(%rsp), %rdx
	movl	%eax, 104(%rsp)
	movq	100(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	leaq	124(%rsp), %rcx
	movabsq	$549755813889, %rax
	leaq	112(%rsp), %rdx
	movq	%r15, 112(%rsp)
	movl	$512, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$65536, 132(%rsp)
	call	_Z55__device_stub__Z24laplace3d_const_restrictPdPKd4dim3S2_PdPKdRK4dim3S4_
.L184:
	decq	%r13
	jne	.L185
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L186
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L186:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	leaq	.LC31(%rip), %r12
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	36(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	40(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L193
	jmp	.L198
.L194:
	endbr64
	jmp	.L202
.L195:
	endbr64
	jmp	.L202
.L196:
	endbr64
.L202:
	movq	%rax, %rbp
.L191:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L198
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE14:
.L198:
	call	__stack_chk_fail@PLT
.L193:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4386:
	.section	.gcc_except_table._Z7executeIL9Variation5EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation5EEv4dim3PdS2_,comdat
.LLSDA4386:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4386-.LLSDACSB4386
.LLSDACSB4386:
	.uleb128 .LEHB10-.LFB4386
	.uleb128 .LEHE10-.LEHB10
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB11-.LFB4386
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L194-.LFB4386
	.uleb128 0
	.uleb128 .LEHB12-.LFB4386
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L195-.LFB4386
	.uleb128 0
	.uleb128 .LEHB13-.LFB4386
	.uleb128 .LEHE13-.LEHB13
	.uleb128 .L196-.LFB4386
	.uleb128 0
	.uleb128 .LEHB14-.LFB4386
	.uleb128 .LEHE14-.LEHB14
	.uleb128 0
	.uleb128 0
.LLSDACSE4386:
	.section	.text._Z7executeIL9Variation5EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation5EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation5EEv4dim3PdS2_, .-_Z7executeIL9Variation5EEv4dim3PdS2_
	.section	.text._Z7executeIL9Variation4EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation4EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation4EEv4dim3PdS2_
	.type	_Z7executeIL9Variation4EEv4dim3PdS2_, @function
_Z7executeIL9Variation4EEv4dim3PdS2_:
.LFB4387:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4387
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r14d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdx, 48(%rsp)
	movq	%rcx, 56(%rsp)
	movq	%rdi, 64(%rsp)
	movl	68(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
.LEHB15:
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	cudaEventCreate@PLT
.LEHE15:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r14d
	xorl	%edx, %edx
	movl	%eax, 36(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 40(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	$128, %eax
	divq	%r12
	testq	%rdx, %rdx
	je	.L204
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB16:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE16:
	jmp	.L227
.L204:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, (%rsp)
	movq	%rcx, %rax
	divq	(%rsp)
	testq	%rdx, %rdx
	je	.L206
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB17:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE17:
	jmp	.L227
.L206:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
	movq	%rcx, %rax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L208
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB18:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE18:
.L227:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L224
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB19:
	call	__cxa_throw@PLT
.L208:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r13d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
.L211:
	movl	36(%rsp), %eax
	movl	%r14d, 64(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 68(%rsp)
	movl	44(%rsp), %esi
	movl	%ebx, %ecx
	movl	%eax, 100(%rsp)
	movl	40(%rsp), %eax
	movq	64(%rsp), %rdx
	movl	%eax, 104(%rsp)
	movq	100(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L210
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	leaq	124(%rsp), %rcx
	movabsq	$549755813889, %rax
	leaq	112(%rsp), %rdx
	movq	%r15, 112(%rsp)
	movl	$512, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$65536, 132(%rsp)
	call	_Z57__device_stub__Z27laplace3d_relative_indexingPdS_4dim3S0_PdS_RK4dim3S2_
.L210:
	decq	%r13
	jne	.L211
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L212
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L212:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r12, %rsi
	leaq	.LC31(%rip), %r12
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	36(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	40(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L219
	jmp	.L224
.L220:
	endbr64
	jmp	.L228
.L221:
	endbr64
	jmp	.L228
.L222:
	endbr64
.L228:
	movq	%rax, %rbp
.L217:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L224
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE19:
.L224:
	call	__stack_chk_fail@PLT
.L219:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4387:
	.section	.gcc_except_table._Z7executeIL9Variation4EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation4EEv4dim3PdS2_,comdat
.LLSDA4387:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4387-.LLSDACSB4387
.LLSDACSB4387:
	.uleb128 .LEHB15-.LFB4387
	.uleb128 .LEHE15-.LEHB15
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB16-.LFB4387
	.uleb128 .LEHE16-.LEHB16
	.uleb128 .L220-.LFB4387
	.uleb128 0
	.uleb128 .LEHB17-.LFB4387
	.uleb128 .LEHE17-.LEHB17
	.uleb128 .L221-.LFB4387
	.uleb128 0
	.uleb128 .LEHB18-.LFB4387
	.uleb128 .LEHE18-.LEHB18
	.uleb128 .L222-.LFB4387
	.uleb128 0
	.uleb128 .LEHB19-.LFB4387
	.uleb128 .LEHE19-.LEHB19
	.uleb128 0
	.uleb128 0
.LLSDACSE4387:
	.section	.text._Z7executeIL9Variation4EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation4EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation4EEv4dim3PdS2_, .-_Z7executeIL9Variation4EEv4dim3PdS2_
	.section	.text._Z7executeIL9Variation1EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation1EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation1EEv4dim3PdS2_
	.type	_Z7executeIL9Variation1EEv4dim3PdS2_, @function
_Z7executeIL9Variation1EEv4dim3PdS2_:
.LFB4388:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4388
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r12d, %r13d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdx, 64(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rdi, 80(%rsp)
	movl	84(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	96(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB20:
	call	cudaEventCreate@PLT
	leaq	104(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	cudaEventCreate@PLT
.LEHE20:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r12d
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 48(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 52(%rsp)
	movl	$128, %eax
	divq	%r13
	testq	%rdx, %rdx
	je	.L230
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB21:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE21:
	jmp	.L253
.L230:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
	movq	%rcx, %rax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L232
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB22:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE22:
	jmp	.L253
.L232:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 16(%rsp)
	movq	%rcx, %rax
	divq	16(%rsp)
	testq	%rdx, %rdx
	je	.L234
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB23:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE23:
.L253:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L250
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB24:
	call	__cxa_throw@PLT
.L234:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r14d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
	leal	2(%rbp), %edx
	leal	2(%r12), %eax
	imull	%edx, %eax
	leal	2(%rbx), %edx
	imull	%edx, %eax
	salq	$3, %rax
	movq	%rax, 56(%rsp)
.L237:
	movl	44(%rsp), %eax
	movl	%r12d, 80(%rsp)
	xorl	%r9d, %r9d
	movl	%ebx, %ecx
	movq	56(%rsp), %r8
	movl	52(%rsp), %esi
	movl	%ebp, 84(%rsp)
	movl	%eax, 116(%rsp)
	movl	48(%rsp), %eax
	movq	80(%rsp), %rdx
	movl	%eax, 120(%rsp)
	movq	116(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L236
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	movabsq	$549755813889, %rax
	leaq	140(%rsp), %rcx
	leaq	128(%rsp), %rdx
	movq	%r15, 128(%rsp)
	movl	$512, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$65536, 148(%rsp)
	call	_Z44__device_stub__Z14laplace3d_smemPdS_4dim3S0_PdS_RK4dim3S2_
.L236:
	decq	%r14
	jne	.L237
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	104(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L238
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L238:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	leaq	.LC31(%rip), %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	48(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	52(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	96(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L245
	jmp	.L250
.L246:
	endbr64
	jmp	.L254
.L247:
	endbr64
	jmp	.L254
.L248:
	endbr64
.L254:
	movq	%rax, %rbp
.L243:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L250
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE24:
.L250:
	call	__stack_chk_fail@PLT
.L245:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4388:
	.section	.gcc_except_table._Z7executeIL9Variation1EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation1EEv4dim3PdS2_,comdat
.LLSDA4388:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4388-.LLSDACSB4388
.LLSDACSB4388:
	.uleb128 .LEHB20-.LFB4388
	.uleb128 .LEHE20-.LEHB20
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB21-.LFB4388
	.uleb128 .LEHE21-.LEHB21
	.uleb128 .L246-.LFB4388
	.uleb128 0
	.uleb128 .LEHB22-.LFB4388
	.uleb128 .LEHE22-.LEHB22
	.uleb128 .L247-.LFB4388
	.uleb128 0
	.uleb128 .LEHB23-.LFB4388
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L248-.LFB4388
	.uleb128 0
	.uleb128 .LEHB24-.LFB4388
	.uleb128 .LEHE24-.LEHB24
	.uleb128 0
	.uleb128 0
.LLSDACSE4388:
	.section	.text._Z7executeIL9Variation1EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation1EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation1EEv4dim3PdS2_, .-_Z7executeIL9Variation1EEv4dim3PdS2_
	.section	.text._Z7executeIL9Variation6EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation6EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation6EEv4dim3PdS2_
	.type	_Z7executeIL9Variation6EEv4dim3PdS2_, @function
_Z7executeIL9Variation6EEv4dim3PdS2_:
.LFB4389:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4389
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%rdx, 64(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rdi, 80(%rsp)
	movl	84(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	104(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
.LEHB25:
	call	cudaEventCreate@PLT
	leaq	112(%rsp), %rdi
	call	cudaEventCreate@PLT
.LEHE25:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r12d
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 48(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 52(%rsp)
	movl	%r12d, %eax
	movq	%rax, 8(%rsp)
	movl	$128, %eax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L256
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB26:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE26:
	jmp	.L280
.L256:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, 16(%rsp)
	movq	%rcx, %rax
	divq	16(%rsp)
	testq	%rdx, %rdx
	je	.L258
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB27:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE27:
	jmp	.L280
.L258:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 24(%rsp)
	movq	%rcx, %rax
	divq	24(%rsp)
	testq	%rdx, %rdx
	je	.L260
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB28:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE28:
.L280:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L277
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB29:
	call	__cxa_throw@PLT
.L260:
	addl	$2, %r12d
	addl	$2, %ebp
	addl	$2, %ebx
	movq	104(%rsp), %rdi
	movl	%r12d, %r13d
	xorl	%esi, %esi
	movl	$100, %r14d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
	imull	%ebp, %r13d
	imull	%ebx, %r13d
	leaq	0(,%r13,8), %rax
	movq	%rax, 56(%rsp)
.L264:
	cmpq	$1024, %r13
	ja	.L262
	movl	44(%rsp), %eax
	movl	%ebp, 136(%rsp)
	xorl	%r9d, %r9d
	movl	%ebx, %ecx
	movl	%r12d, 132(%rsp)
	movq	56(%rsp), %r8
	movq	132(%rsp), %rdx
	movl	52(%rsp), %esi
	movl	%eax, 120(%rsp)
	movl	48(%rsp), %eax
	movl	%eax, 124(%rsp)
	movq	120(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L262
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	movabsq	$549755813889, %rax
	leaq	156(%rsp), %rcx
	leaq	144(%rsp), %rdx
	movq	%r15, 144(%rsp)
	movl	$512, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$65536, 164(%rsp)
	call	_Z45__device_stub__Z15laplace3d_smem2PdS_4dim3S0_PdS_RK4dim3S2_
.L262:
	decq	%r14
	jne	.L264
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	112(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L265
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L265:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	leaq	.LC31(%rip), %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	48(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	52(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	32(%rsp), %rdi
	leaq	112(%rsp), %rsi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	112(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L272
	jmp	.L277
.L273:
	endbr64
	jmp	.L281
.L274:
	endbr64
	jmp	.L281
.L275:
	endbr64
.L281:
	movq	%rax, %rbp
.L270:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L277
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE29:
.L277:
	call	__stack_chk_fail@PLT
.L272:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4389:
	.section	.gcc_except_table._Z7executeIL9Variation6EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation6EEv4dim3PdS2_,comdat
.LLSDA4389:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4389-.LLSDACSB4389
.LLSDACSB4389:
	.uleb128 .LEHB25-.LFB4389
	.uleb128 .LEHE25-.LEHB25
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB26-.LFB4389
	.uleb128 .LEHE26-.LEHB26
	.uleb128 .L273-.LFB4389
	.uleb128 0
	.uleb128 .LEHB27-.LFB4389
	.uleb128 .LEHE27-.LEHB27
	.uleb128 .L274-.LFB4389
	.uleb128 0
	.uleb128 .LEHB28-.LFB4389
	.uleb128 .LEHE28-.LEHB28
	.uleb128 .L275-.LFB4389
	.uleb128 0
	.uleb128 .LEHB29-.LFB4389
	.uleb128 .LEHE29-.LEHB29
	.uleb128 0
	.uleb128 0
.LLSDACSE4389:
	.section	.text._Z7executeIL9Variation6EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation6EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation6EEv4dim3PdS2_, .-_Z7executeIL9Variation6EEv4dim3PdS2_
	.section	.text._Z7executeIL9Variation2EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation2EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation2EEv4dim3PdS2_
	.type	_Z7executeIL9Variation2EEv4dim3PdS2_, @function
_Z7executeIL9Variation2EEv4dim3PdS2_:
.LFB4390:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4390
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r12d, %r13d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdx, 64(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rdi, 80(%rsp)
	movl	84(%rsp), %ebp
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	96(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB30:
	call	cudaEventCreate@PLT
	leaq	104(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	cudaEventCreate@PLT
.LEHE30:
	movl	$128, %eax
	xorl	%edx, %edx
	movl	$512, %ecx
	divl	%r12d
	xorl	%edx, %edx
	movl	%eax, 44(%rsp)
	movl	%ecx, %eax
	divl	%ebp
	xorl	%edx, %edx
	movl	%eax, 48(%rsp)
	movl	%ecx, %eax
	divl	%ebx
	xorl	%edx, %edx
	movl	%eax, 52(%rsp)
	movl	$128, %eax
	divq	%r13
	testq	%rdx, %rdx
	je	.L283
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB31:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE31:
	jmp	.L306
.L283:
	movl	%ebp, %eax
	movl	$512, %ecx
	xorl	%edx, %edx
	movq	%rax, 8(%rsp)
	movq	%rcx, %rax
	divq	8(%rsp)
	testq	%rdx, %rdx
	je	.L285
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB32:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE32:
	jmp	.L306
.L285:
	movl	%ebx, %eax
	xorl	%edx, %edx
	movq	%rax, 16(%rsp)
	movq	%rcx, %rax
	divq	16(%rsp)
	testq	%rdx, %rdx
	je	.L287
	movl	$16, %edi
	call	__cxa_allocate_exception@PLT
	leaq	.LC25(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
.LEHB33:
	call	_ZNSt13runtime_errorC1EPKc@PLT
.LEHE33:
.L306:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L303
	movq	_ZNSt13runtime_errorD1Ev@GOTPCREL(%rip), %rdx
	leaq	_ZTISt13runtime_error(%rip), %rsi
	movq	%rbx, %rdi
.LEHB34:
	call	__cxa_throw@PLT
.L287:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	movl	$100, %r14d
	movabsq	$2199023255680, %r15
	call	cudaEventRecord@PLT
	leal	2(%rbp), %edx
	leal	2(%r12), %eax
	imull	%edx, %eax
	leal	2(%rbx), %edx
	imull	%edx, %eax
	salq	$3, %rax
	movq	%rax, 56(%rsp)
.L290:
	movl	44(%rsp), %eax
	movl	%r12d, 80(%rsp)
	xorl	%r9d, %r9d
	movl	%ebx, %ecx
	movq	56(%rsp), %r8
	movl	52(%rsp), %esi
	movl	%ebp, 84(%rsp)
	movl	%eax, 116(%rsp)
	movl	48(%rsp), %eax
	movq	80(%rsp), %rdx
	movl	%eax, 120(%rsp)
	movq	116(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L289
	movq	72(%rsp), %rsi
	movq	64(%rsp), %rdi
	movabsq	$549755813889, %rax
	leaq	140(%rsp), %rcx
	leaq	128(%rsp), %rdx
	movq	%r15, 128(%rsp)
	movl	$512, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$65536, 148(%rsp)
	call	_Z54__device_stub__Z23laplace3d_smem_relativePdPKd4dim3S2_PdPKdRK4dim3S4_
.L289:
	decq	%r14
	jne	.L290
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	104(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L291
	call	cudaGetErrorString@PLT
	movl	$476, %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC27(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L291:
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC28(%rip), %rsi
	movq	%rbx, %rdi
	leaq	.LC30(%rip), %rbp
	leaq	.LC31(%rip), %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC29(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rsp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC32(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	44(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	48(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	52(%rsp), %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rdi
	leaq	.LC33(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rax, %rbx
	call	_Z7elapsedRP10CUevent_stS1_
	movq	%rbx, %rdi
	divss	.LC34(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC35(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	96(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L298
	jmp	.L303
.L299:
	endbr64
	jmp	.L307
.L300:
	endbr64
	jmp	.L307
.L301:
	endbr64
.L307:
	movq	%rax, %rbp
.L296:
	movq	%rbx, %rdi
	call	__cxa_free_exception@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L303
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE34:
.L303:
	call	__stack_chk_fail@PLT
.L298:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4390:
	.section	.gcc_except_table._Z7executeIL9Variation2EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation2EEv4dim3PdS2_,comdat
.LLSDA4390:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4390-.LLSDACSB4390
.LLSDACSB4390:
	.uleb128 .LEHB30-.LFB4390
	.uleb128 .LEHE30-.LEHB30
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB31-.LFB4390
	.uleb128 .LEHE31-.LEHB31
	.uleb128 .L299-.LFB4390
	.uleb128 0
	.uleb128 .LEHB32-.LFB4390
	.uleb128 .LEHE32-.LEHB32
	.uleb128 .L300-.LFB4390
	.uleb128 0
	.uleb128 .LEHB33-.LFB4390
	.uleb128 .LEHE33-.LEHB33
	.uleb128 .L301-.LFB4390
	.uleb128 0
	.uleb128 .LEHB34-.LFB4390
	.uleb128 .LEHE34-.LEHB34
	.uleb128 0
	.uleb128 0
.LLSDACSE4390:
	.section	.text._Z7executeIL9Variation2EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation2EEv4dim3PdS2_,comdat
	.size	_Z7executeIL9Variation2EEv4dim3PdS2_, .-_Z7executeIL9Variation2EEv4dim3PdS2_
	.section	.rodata.str1.1
.LC36:
	.string	"ERROR: the last executed variant didn't validate"
.LC37:
	.string	"OK: last variation verified against the non-optimized CUDA version"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4008:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4008
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$268435456, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	movabsq	$2199023255680, %rax
	leaq	52(%rsp), %r15
	leaq	20(%rsp), %r14
	movl	$512, 48(%rsp)
	leaq	16(%rsp), %r13
	movq	%rax, 40(%rsp)
.LEHB35:
	call	_Znam@PLT
	movl	$268435456, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$268435456, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	48(%rsp), %edx
	movq	40(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%rax, %rbx
	call	_Z4initPd4dim3
	leaq	24(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movabsq	$34359738376, %rdi
	movl	$8, %esi
	movq	%rdi, 64(%rsp)
	movl	$8, 72(%rsp)
	call	_Z7executeIL9Variation3EEv4dim3PdS2_
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
.LEHE35:
	xorl	%eax, %eax
	movq	%r15, %rcx
	movq	%r14, %rdx
	movq	%rax, 64(%rsp)
	movq	%r13, %rsi
	movq	%rax, 72(%rsp)
	movq	%rax, 80(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, %rdi
	movl	$4, 52(%rsp)
	movl	$4, 20(%rsp)
	movl	$32, 16(%rsp)
	movq	%rax, 8(%rsp)
.LEHB36:
	call	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0
	movq	8(%rsp), %rdi
	movq	%r15, %rcx
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	$8, 52(%rsp)
	movl	$8, 20(%rsp)
	movl	$8, 16(%rsp)
	call	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0
	movq	8(%rsp), %rdi
	movq	%r15, %rcx
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	$8, 52(%rsp)
	movl	$8, 20(%rsp)
	movl	$16, 16(%rsp)
	call	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0
	movq	8(%rsp), %rdi
	movq	%r15, %rcx
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	$4, 52(%rsp)
	movl	$4, 20(%rsp)
	movl	$16, 16(%rsp)
	call	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_.isra.0
	movq	72(%rsp), %r14
	movq	64(%rsp), %r13
.L309:
	movq	24(%rsp), %rsi
	cmpq	%r13, %r14
	je	.L323
	movl	8(%r13), %eax
	movq	0(%r13), %rdi
	movq	%rsi, %rdx
	movq	32(%rsp), %rcx
	movl	%eax, %esi
	movq	%rdi, 52(%rsp)
	movl	%eax, 60(%rsp)
	call	_Z7executeIL9Variation3EEv4dim3PdS2_
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	_Z7executeIL9Variation0EEv4dim3PdS2_
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	_Z7executeIL9Variation5EEv4dim3PdS2_
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	_Z7executeIL9Variation4EEv4dim3PdS2_
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	_Z7executeIL9Variation1EEv4dim3PdS2_
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	_Z7executeIL9Variation6EEv4dim3PdS2_
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movq	52(%rsp), %rdi
	movl	60(%rsp), %esi
	call	_Z7executeIL9Variation2EEv4dim3PdS2_
	addq	$12, %r13
	jmp	.L309
.L323:
	movl	$2, %ecx
	movl	$268435456, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	48(%rsp), %ecx
	movq	40(%rsp), %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_Z6verifyPdS_4dim3
	testb	%al, %al
	leaq	.LC36(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	je	.L322
	leaq	.LC37(%rip), %rsi
.L322:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
.LEHE36:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorI4dim3SaIS0_EED1Ev
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L315
	jmp	.L317
.L316:
	endbr64
	movq	%rax, %rbx
.L313:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorI4dim3SaIS0_EED1Ev
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L317
	movq	%rbx, %rdi
.LEHB37:
	call	_Unwind_Resume@PLT
.LEHE37:
.L317:
	call	__stack_chk_fail@PLT
.L315:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4008:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4008:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4008-.LLSDACSB4008
.LLSDACSB4008:
	.uleb128 .LEHB35-.LFB4008
	.uleb128 .LEHE35-.LEHB35
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB36-.LFB4008
	.uleb128 .LEHE36-.LEHB36
	.uleb128 .L316-.LFB4008
	.uleb128 0
	.uleb128 .LEHB37-.LFB4008
	.uleb128 .LEHE37-.LEHB37
	.uleb128 0
	.uleb128 0
.LLSDACSE4008:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.align 8
.LC2:
	.long	1413754136
	.long	1074340347
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC5:
	.long	0
	.long	1074266112
	.align 8
.LC6:
	.long	1413754136
	.long	1075388923
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC34:
	.long	1120403456
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <math.h>
#include <vector>

/**
 * Several variations of a simple 3D 7-point Laplacian.
 *
 * Notes:
 * - Since it is a very simple example which naturally fits the parallelization
 * model of CUDA, there are not many elaborate optimization.
 * - Using shared memory might help a lot once several stencils are fused to
 * store intermediate values. In this example there is no/negligible performance
 * improvement (depending on the GPU architecture).
 */

const size_t Nx = 128;
const size_t Ny = 512;
const size_t Nz = 512;

const size_t nrepeat = 100;

__host__ __device__ __forceinline__ int index(const int i, const int j,
                                              const int k, const dim3 sizes) {
    const int istride = 1;
    const int jstride = sizes.x;
    const int kstride = sizes.x * sizes.y;
    return i * istride + j * jstride + k * kstride;
}

__host__ __device__ __forceinline__ int
index_strides(const int i, const int j, const int k, const dim3 strides) {
    return i * strides.x + j * strides.y + k * strides.z;
}

/**
 * Naive/non-optimized version.
 */
__global__ void laplace3d_no_ldg(double *d, double *n, const dim3 sizes,
                                 const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index_strides(i, j, k, strides)] =
                    1. / 2. * (                                              //
                                  (n[index_strides(i - 1, j, k, strides)])   //
                                  + (n[index_strides(i + 1, j, k, strides)]) //
                                  + (n[index_strides(i, j - 1, k, strides)]) //
                                  + (n[index_strides(i, j + 1, k, strides)]) //
                                  + (n[index_strides(i, j, k - 1, strides)]) //
                                  + (n[index_strides(i, j, k + 1, strides)]) //
                                  - 6. * (n[index_strides(i, j, k, strides)]));
}

/**
 * Putting const __restrict__ on the read only pointers allows the compiler to
 * automatically detect that the read-only data cache can be used (no need for
 * explicit __ldg())
 */
__global__ void laplace3d_ldg(double *d, double *n, const dim3 sizes,
                              const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index_strides(i, j, k, strides)] =
                    1. / 2. *
                    (                                                    //
                        __ldg(&n[index_strides(i - 1, j, k, strides)])   //
                        + __ldg(&n[index_strides(i + 1, j, k, strides)]) //
                        + __ldg(&n[index_strides(i, j - 1, k, strides)]) //
                        + __ldg(&n[index_strides(i, j + 1, k, strides)]) //
                        + __ldg(&n[index_strides(i, j, k - 1, strides)]) //
                        + __ldg(&n[index_strides(i, j, k + 1, strides)]) //
                        - 6. * __ldg(&n[index_strides(i, j, k, strides)]));
}

/**
 * Relative indexing should reduce the number of integer computations which
 * could have an impact.
 */
__global__ void laplace3d_relative_indexing(double *d, double *n,
                                            const dim3 sizes,
                                            const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    int index = index_strides(i, j, k, strides);

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index] = 1. / 2. * (                                  //
                                         __ldg(&n[index - strides.x])   //
                                         + __ldg(&n[index + strides.x]) //
                                         + __ldg(&n[index - strides.y]) //
                                         + __ldg(&n[index + strides.y]) //
                                         + __ldg(&n[index - strides.z]) //
                                         + __ldg(&n[index + strides.z]) //
                                         - 6. * __ldg(&n[index]));
}

/**
 * Putting const __restrict__ on the read only pointers allows the compiler to
 * automatically detect that the read-only data cache can be used (no need for
 * explicit __ldg())
 */
__global__ void laplace3d_const_restrict(double *__restrict__ d,
                                         const double *__restrict__ n,
                                         const dim3 sizes, const dim3 strides) {
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                d[index_strides(i, j, k, strides)] =
                    1. / 2. * (                                              //
                                  (n[index_strides(i - 1, j, k, strides)])   //
                                  + (n[index_strides(i + 1, j, k, strides)]) //
                                  + (n[index_strides(i, j - 1, k, strides)]) //
                                  + (n[index_strides(i, j + 1, k, strides)]) //
                                  + (n[index_strides(i, j, k - 1, strides)]) //
                                  + (n[index_strides(i, j, k + 1, strides)]) //
                                  - 6. * (n[index_strides(i, j, k, strides)]));
}

__host__ __device__ __forceinline__ int index_smem(const int i, const int j,
                                                   const int k) {
    return (i + 1) + (j + 1) * (blockDim.x + 2) +
           (k + 1) * (blockDim.x + 2) * (blockDim.y + 2);
}

/**
 * Shared memory is a per block scratch pad (user-managed cache), which usually
 * is very beneficial for storing intermediate values.
 *
 * Here we just copy the local input of the stencil for each block into its
 * buffer and read from the buffer.
 * The halo region is filled by dedicated threads (first and last in all
 * directions).
 *
 * Note: Another option would be to add extra threads for the halo points to
 * each block and let them sleep for the actual computation.
 */
__global__ void laplace3d_smem(double *d, double *n, const dim3 sizes,
                               const dim3 strides) {
    extern __shared__ double smem[];
    // global indices
    int i = threadIdx.x + blockIdx.x * blockDim.x;
    int j = threadIdx.y + blockIdx.y * blockDim.y;
    int k = threadIdx.z + blockIdx.z * blockDim.z;

    // local indices
    int ii = threadIdx.x;
    int jj = threadIdx.y;
    int kk = threadIdx.z;

    // copy all elements of the compute domain into the shared mem buffer (on
    // block level)
    smem[index_smem(ii, jj, kk)] = __ldg(&n[index_strides(i, j, k, strides)]);

    // first and last threads (in all dimensions copy the halo region into the
    // shared mem buffer
    if (ii == 0)
        if (i > 0)
            smem[index_smem(-1, jj, kk)] =
                __ldg(&n[index_strides(i - 1, j, k, strides)]);
    if (ii == blockDim.x - 1)
        if (i < sizes.x - 1)
            smem[index_smem(blockDim.x, jj, kk)] =
                __ldg(&n[index_strides(i + 1, j, k, strides)]);
    if (jj == 0)
        if (j > 0)
            smem[index_smem(ii, -1, kk)] =
                __ldg(&n[index_strides(i, j - 1, k, strides)]);
    if (jj == blockDim.y - 1)
        if (j < sizes.y - 1)
            smem[index_smem(ii, blockDim.y, kk)] =
                __ldg(&n[index_strides(i, j + 1, k, strides)]);

    if (kk == 0)
        if (k > 0)
            smem[index_smem(ii, jj, -1)] =
                __ldg(&n[index_strides(i, j, k - 1, strides)]);
    if (kk == blockDim.z - 1)
        if (k < sizes.z - 1)
            smem[index_smem(ii, jj, blockDim.z)] =
                __ldg(&n[index_strides(i, j, k + 1, strides)]);

    __syncthreads();
    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                // read only from the shared mem buffer
                d[index_strides(i, j, k, strides)] =
                    1. / 2. * (                                      //
                                  smem[index_smem(ii - 1, jj, kk)]   //
                                  + smem[index_smem(ii + 1, jj, kk)] //
                                  + smem[index_smem(ii, jj - 1, kk)] //
                                  + smem[index_smem(ii, jj + 1, kk)] //
                                  + smem[index_smem(ii, jj, kk - 1)] //
                                  + smem[index_smem(ii, jj, kk + 1)] //
                                  - 6. * smem[index_smem(ii, jj, kk)]);
}

__global__ void laplace3d_smem_relative(double *__restrict__ d,
                                        const double *__restrict__ n,
                                        const dim3 sizes, const dim3 strides) {
    extern __shared__ double smem[];
    // global indices
    const int i = threadIdx.x + blockIdx.x * blockDim.x;
    const int j = threadIdx.y + blockIdx.y * blockDim.y;
    const int k = threadIdx.z + blockIdx.z * blockDim.z;

    // local indices
    const int ii = threadIdx.x;
    const int jj = threadIdx.y;
    const int kk = threadIdx.z;

    // local strides
    const int is = blockDim.x;
    const int js = blockDim.y;
    const int ks = blockDim.z;

    int glob_index = index_strides(i, j, k, strides);
    int loc_index = index_smem(ii, jj, kk);

    // copy all elements of the compute domain into the shared mem buffer (on
    // block level)
    smem[loc_index] = __ldg(&n[glob_index]);

    // first and last threads (in all dimensions copy the halo region into the
    // shared mem buffer
    if (ii == 0)
        if (i > 0)
            smem[loc_index - is] = __ldg(&n[glob_index - strides.x]);
    if (ii == blockDim.x - 1)
        if (i < sizes.x - 1)
            smem[loc_index + is] = __ldg(&n[glob_index + strides.x]);
    if (jj == 0)
        if (j > 0)
            smem[loc_index - js] = __ldg(&n[glob_index - strides.y]);
    if (jj == blockDim.y - 1)
        if (j < sizes.y - 1)
            smem[loc_index + js] = __ldg(&n[glob_index + strides.y]);

    if (kk == 0)
        if (k > 0)
            smem[loc_index - ks] = __ldg(&n[glob_index - strides.z]);
    if (kk == blockDim.z - 1)
        if (k < sizes.z - 1)
            smem[loc_index + ks] = __ldg(&n[glob_index + strides.z]);

    __syncthreads();
    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                // read only from the shared mem buffer
                d[glob_index] = 1. / 2. * (                          //
                                              smem[loc_index - is]   //
                                              + smem[loc_index + is] //
                                              + smem[loc_index - js] //
                                              + smem[loc_index + js] //
                                              + smem[loc_index - ks] //
                                              + smem[loc_index + ks] //
                                              - 6. * smem[loc_index]);
}

__host__ __device__ __forceinline__ int index_smem2(const int i, const int j,
                                                    const int k) {
    return i + j * (blockDim.x) + k * (blockDim.x) * (blockDim.y);
}

/**
 * Using extra threads for copying halo points to
 * each block and let them sleep for the actual computation.
 */
__global__ void laplace3d_smem2(double *d, double *n, const dim3 sizes,
                                const dim3 strides) {
    extern __shared__ double smem[];
    // global indices
    int i = -1 + (int)(threadIdx.x + blockIdx.x * (blockDim.x - 2));
    int j = -1 + (int)(threadIdx.y + blockIdx.y * (blockDim.y - 2));
    int k = -1 + (int)(threadIdx.z + blockIdx.z * (blockDim.z - 2));

    // local indices
    int ii = threadIdx.x;
    int jj = threadIdx.y;
    int kk = threadIdx.z;

    // copy all elements of the compute domain into the shared mem buffer
    if (i >= 0 && i < sizes.x)
        if (j >= 0 && j < sizes.y)
            if (k >= 0 && k < sizes.z) {
                smem[index_smem2(ii, jj, kk)] =
                    __ldg(&n[index_strides(i, j, k, strides)]);
            }

    __syncthreads();
    if (i > 0 && i < sizes.x - 1)
        if (j > 0 && j < sizes.y - 1)
            if (k > 0 && k < sizes.z - 1)
                if (ii > 0 && ii < blockDim.x - 1)
                    if (jj > 0 && jj < blockDim.y - 1)
                        if (kk > 0 && kk < blockDim.z - 1) {
                            d[index_strides(i, j, k, strides)] =
                                1. / 2. *
                                (                                       //
                                    smem[index_smem2(ii - 1, jj, kk)]   //
                                    + smem[index_smem2(ii + 1, jj, kk)] //
                                    + smem[index_smem2(ii, jj - 1, kk)] //
                                    + smem[index_smem2(ii, jj + 1, kk)] //
                                    + smem[index_smem2(ii, jj, kk - 1)] //
                                    + smem[index_smem2(ii, jj, kk + 1)] //
                                    - 6. * smem[index_smem2(ii, jj, kk)]);
                        }
}

void init(double *n, const dim3 sizes) {
    for (size_t i = 0; i < sizes.x; ++i)
        for (size_t j = 0; j < sizes.y; ++j)
            for (size_t k = 0; k < sizes.z; ++k) {
                n[index(i, j, k, sizes)] =
                    sin((double)i / ((double)sizes.x - 1.) * M_PI) *
                    sin((double)j / ((double)sizes.y - 1.) * M_PI) *
                    sin((double)k / ((double)sizes.z - 1.) * M_PI);
            }
}

void print(double *n, const dim3 sizes) {
    for (size_t i = 0; i < sizes.x; ++i) {
        std::cout << (double)i / (double)(sizes.x - 1) << " \t"
                  << -1. * n[index(i, sizes.y / 2, sizes.z / 2, sizes)] /
                         pow(2. * M_PI / sizes.x, 3)
                  << std::endl;
    }
}

float elapsed(hipEvent_t &start, hipEvent_t &stop) {
    float result;
    hipEventElapsedTime(&result, start, stop);
    return result;
}

enum class Variation {
    LDG,
    SHARED_MEM,
    SHARED_MEM_REL,
    NO_LDG,
    RELATIVE,
    CONST_RESTRICT,
    SHARED_MEM2
};

std::ostream &operator<<(std::ostream &s, Variation const &var) {
    switch (var) {
    case Variation::NO_LDG:
        s << "no optimization,        ";
        break;
    case Variation::LDG:
        s << "__ldg,                  ";
        break;
    case Variation::SHARED_MEM:
        s << "shared memory,          ";
        break;
    case Variation::SHARED_MEM_REL:
        s << "shared memory relative, ";
        break;
    case Variation::SHARED_MEM2:
        s << "shared memory v2,       ";
        break;
    case Variation::RELATIVE:
        s << "relative indexing,      ";
        break;
    case Variation::CONST_RESTRICT:
        s << "const __restrict__,     ";
        break;
    default:
        s << "n/a";
    }

    return s;
}

/**
 * Warning: one of the stencils is modifying the threadsPerBlock.
 */
template <Variation Var>
void execute(dim3 threadsPerBlock, double *dd, double *dn) {
    const dim3 sizes(Nx, Ny, Nz);
    const dim3 strides(1, Nx, Nx * Ny);

    hipEvent_t start_;
    hipEvent_t stop_;
    hipEventCreate(&start_);
    hipEventCreate(&stop_);
    int nBlocksX = Nx / threadsPerBlock.x;
    int nBlocksY = Ny / threadsPerBlock.y;
    int nBlocksZ = Nz / threadsPerBlock.z;

    if (Nx % threadsPerBlock.x != 0) {
        nBlocksX++;
        throw std::runtime_error("there is a bug for non divisible sizes");
    }
    if (Ny % threadsPerBlock.y != 0) {
        nBlocksY++;
        throw std::runtime_error("there is a bug for non divisible sizes");
    }
    if (Nz % threadsPerBlock.z != 0) {
        nBlocksZ++;
        throw std::runtime_error("there is a bug for non divisible sizes");
    }

    dim3 nBlocks(nBlocksX, nBlocksY, nBlocksZ);

    hipEventRecord(start_, 0);

    for (size_t i = 0; i < nrepeat; ++i) {
        if (Var == Variation::SHARED_MEM) {
            size_t smem_size = (threadsPerBlock.x + 2) *
                               (threadsPerBlock.y + 2) *
                               (threadsPerBlock.z + 2);
            laplace3d_smem<<<nBlocks, threadsPerBlock,
                             smem_size * sizeof(double)>>>(dd, dn, sizes,
                                                           strides);
        } else if (Var == Variation::SHARED_MEM_REL) {
            size_t smem_size = (threadsPerBlock.x + 2) *
                               (threadsPerBlock.y + 2) *
                               (threadsPerBlock.z + 2);
            laplace3d_smem_relative<<<nBlocks, threadsPerBlock,
                                      smem_size * sizeof(double)>>>(
                dd, dn, sizes, strides);
        } else if (Var == Variation::SHARED_MEM2) {
            size_t smem_size = (threadsPerBlock.x + 2) *
                               (threadsPerBlock.y + 2) *
                               (threadsPerBlock.z + 2);

            if (smem_size <= 1024) {

                dim3 enlargedBlock(threadsPerBlock.x + 2, threadsPerBlock.y + 2,
                                   threadsPerBlock.z + 2);

                laplace3d_smem2<<<nBlocks, enlargedBlock,
                                  smem_size * sizeof(double)>>>(dd, dn, sizes,
                                                                strides);
            }
        } else if (Var == Variation::LDG)
            laplace3d_ldg<<<nBlocks, threadsPerBlock>>>(dd, dn, sizes, strides);
        else if (Var == Variation::NO_LDG)
            laplace3d_no_ldg<<<nBlocks, threadsPerBlock>>>(dd, dn, sizes,
                                                           strides);
        else if (Var == Variation::CONST_RESTRICT)
            laplace3d_const_restrict<<<nBlocks, threadsPerBlock>>>(
                dd, dn, sizes, strides);
        else if (Var == Variation::RELATIVE)
            laplace3d_relative_indexing<<<nBlocks, threadsPerBlock>>>(
                dd, dn, sizes, strides);
    }
    hipEventRecord(stop_, 0);
    hipEventSynchronize(stop_);

    hipDeviceSynchronize();
    hipError_t error = hipGetLastError();
    if (error != hipSuccess) {
        fprintf(stderr, "CUDA ERROR: %s in %s at line %d\n",
                hipGetErrorString(error), __FILE__, __LINE__);
        exit(-1);
    }

    std::cout << "# Variation: " << Var;
    std::cout << "threads/block = (" << threadsPerBlock.x << "/"
              << threadsPerBlock.y << "/" << threadsPerBlock.z << "), \t";
    std::cout << "blocks = (" << nBlocks.x << "/" << nBlocks.y << "/"
              << nBlocks.z << "), \t";
    std::cout << "time = " << elapsed(start_, stop_) / (float)nrepeat << "ms"
              << std::endl;

    hipEventDestroy(start_);
    hipEventDestroy(stop_);
}

bool verify(double *ref, double *out, dim3 sizes) {
    for (size_t i = 1; i < sizes.x - 1; ++i)
        for (size_t j = 1; j < sizes.y - 1; ++j)
            for (size_t k = 1; k < sizes.z - 1; ++k) {
                if (ref[i] != out[i]) {
                    std::cout << "in index " << i << " val=" << out[i]
                              << ", ref=" << ref[i] << std::endl;
                    return false;
                }
            }
    return true;
}

int main() {
    dim3 sizes(Nx, Ny, Nz);

    size_t total_size = Nx * Ny * Nz;
    double *d = new double[total_size];
    double *n = new double[total_size];
    double *ref = new double[total_size];

    init(n, sizes);

    double *dd;
    hipMalloc(&dd, sizeof(double) * total_size);
    double *dn;
    hipMalloc(&dn, sizeof(double) * total_size);

    hipMemcpy(dn, n, sizeof(double) * total_size, hipMemcpyHostToDevice);

    // execute one of variations to be used as a reference
    execute<Variation::NO_LDG>(dim3(8, 8, 8), dd, dn);
    hipMemcpy(ref, dd, sizeof(double) * total_size, hipMemcpyDeviceToHost);

    std::vector<dim3> threadsPerBlock;
    // the smem version does not work for non-full blocks, difficult exercise:
    // threadsPerBlock.emplace_back(14, 6, 6);

    threadsPerBlock.emplace_back(32, 4, 4);
    threadsPerBlock.emplace_back(8, 8, 8);
    threadsPerBlock.emplace_back(16, 8, 8);
    threadsPerBlock.emplace_back(16, 4, 4);

    for (auto dim : threadsPerBlock) {
        execute<Variation::NO_LDG>(dim, dd, dn);
        execute<Variation::LDG>(dim, dd, dn);
        execute<Variation::CONST_RESTRICT>(dim, dd, dn);
        execute<Variation::RELATIVE>(dim, dd, dn);
        execute<Variation::SHARED_MEM>(dim, dd, dn);
        execute<Variation::SHARED_MEM2>(dim, dd, dn);
        execute<Variation::SHARED_MEM_REL>(dim, dd, dn);
    }

    hipMemcpy(d, dd, sizeof(double) * total_size, hipMemcpyDeviceToHost);

    if (!verify(ref, d, sizes)) {
        std::cout << "ERROR: the last executed variant didn't validate"
                  << std::endl;
    } else {
        std::cout << "OK: last variation verified against the non-optimized "
                     "CUDA version"
                  << std::endl;
    }
    //    print(d, sizes);

    delete[] d;
    delete[] n;
    delete[] ref;
    hipFree(dd);
    hipFree(dn);
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_ # -- Begin function _Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_
	.type	_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_,@function
_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_: # @_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16laplace3d_no_ldgPdS_4dim3S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_, .Lfunc_end0-_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_ # -- Begin function _Z28__device_stub__laplace3d_ldgPdS_4dim3S0_
	.type	_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_,@function
_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_: # @_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13laplace3d_ldgPdS_4dim3S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_, .Lfunc_end1-_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_ # -- Begin function _Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_
	.type	_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_,@function
_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_: # @_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27laplace3d_relative_indexingPdS_4dim3S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_, .Lfunc_end2-_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_ # -- Begin function _Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_
	.type	_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_,@function
_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_: # @_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24laplace3d_const_restrictPdPKd4dim3S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_, .Lfunc_end3-_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__laplace3d_smemPdS_4dim3S0_ # -- Begin function _Z29__device_stub__laplace3d_smemPdS_4dim3S0_
	.type	_Z29__device_stub__laplace3d_smemPdS_4dim3S0_,@function
_Z29__device_stub__laplace3d_smemPdS_4dim3S0_: # @_Z29__device_stub__laplace3d_smemPdS_4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14laplace3d_smemPdS_4dim3S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__laplace3d_smemPdS_4dim3S0_, .Lfunc_end4-_Z29__device_stub__laplace3d_smemPdS_4dim3S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_ # -- Begin function _Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_
	.type	_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_,@function
_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_: # @_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23laplace3d_smem_relativePdPKd4dim3S2_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_, .Lfunc_end5-_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_ # -- Begin function _Z30__device_stub__laplace3d_smem2PdS_4dim3S0_
	.type	_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_,@function
_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_: # @_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdx, (%rax)
	movl	%ecx, 8(%rax)
	leaq	64(%rsp), %rcx
	movq	%r8, (%rcx)
	movl	%r9d, 8(%rcx)
	leaq	24(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	16(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15laplace3d_smem2PdS_4dim3S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_, .Lfunc_end6-_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4initPd4dim3
.LCPI7_0:
	.quad	0xbff0000000000000              # double -1
.LCPI7_3:
	.quad	0x400921fb54442d18              # double 3.1415926535897931
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI7_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI7_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.text
	.globl	_Z4initPd4dim3
	.type	_Z4initPd4dim3,@function
_Z4initPd4dim3:                         # @_Z4initPd4dim3
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	movl	$4294967295, %ecx               # imm = 0xFFFFFFFF
	andq	%rsi, %rcx
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	je	.LBB7_9
# %bb.1:                                # %.preheader25.lr.ph
	movq	%rdi, %r15
	movq	%rsi, %rax
	movq	%rsi, %rdx
	movq	%rax, %r13
	shrq	$32, %r13
	movl	12(%rsp), %ebp                  # 4-byte Reload
	movl	%eax, %ecx
	cvtsi2sd	%rcx, %xmm1
	movsd	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 56(%rsp)                 # 8-byte Spill
	xorps	%xmm1, %xmm1
	cvtsi2sd	%r13, %xmm1
	cvtsi2sd	%rbp, %xmm2
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 72(%rsp)                 # 8-byte Spill
	addsd	%xmm0, %xmm2
	movsd	%xmm2, 88(%rsp)                 # 8-byte Spill
	shlq	$32, %rdx
	movq	%rdx, 80(%rsp)                  # 8-byte Spill
	movq	%r13, 48(%rsp)                  # 8-byte Spill
                                        # kill: def $r13d killed $r13d killed $r13 def $r13
	imull	%eax, %r13d
	shlq	$32, %r13
	xorl	%eax, %eax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
.LBB7_2:                                # %.preheader25
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
                                        #       Child Loop BB7_6 Depth 3
	cmpq	$0, 48(%rsp)                    # 8-byte Folded Reload
	je	.LBB7_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB7_2 Depth=1
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	unpcklps	.LCPI7_1(%rip), %xmm0           # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI7_2(%rip), %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	divsd	56(%rsp), %xmm1                 # 8-byte Folded Reload
	mulsd	.LCPI7_3(%rip), %xmm1
	movq	40(%rsp), %rax                  # 8-byte Reload
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
	movapd	%xmm1, 96(%rsp)                 # 16-byte Spill
.LBB7_4:                                # %.preheader
                                        #   Parent Loop BB7_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB7_6 Depth 3
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	je	.LBB7_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB7_4 Depth=2
	movq	%r12, %xmm0
	punpckldq	.LCPI7_1(%rip), %xmm0   # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
	subpd	.LCPI7_2(%rip), %xmm0
	movapd	%xmm0, %xmm2
	unpckhpd	%xmm0, %xmm2                    # xmm2 = xmm2[1],xmm0[1]
	addsd	%xmm0, %xmm2
	divsd	72(%rsp), %xmm2                 # 8-byte Folded Reload
	mulsd	.LCPI7_3(%rip), %xmm2
	movapd	%xmm2, 112(%rsp)                # 16-byte Spill
	movq	24(%rsp), %rbx                  # 8-byte Reload
	xorl	%r14d, %r14d
.LBB7_6:                                #   Parent Loop BB7_2 Depth=1
                                        #     Parent Loop BB7_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movapd	%xmm1, %xmm0
	callq	sin
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movapd	112(%rsp), %xmm0                # 16-byte Reload
	callq	sin
	mulsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movq	%r14, %xmm1
	punpckldq	.LCPI7_1(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI7_2(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	88(%rsp), %xmm0                 # 8-byte Folded Reload
	mulsd	.LCPI7_3(%rip), %xmm0
	callq	sin
	movapd	96(%rsp), %xmm1                 # 16-byte Reload
	mulsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movq	%rbx, %rax
	sarq	$29, %rax
	movsd	%xmm0, (%r15,%rax)
	incq	%r14
	addq	%r13, %rbx
	cmpq	%r14, %rbp
	jne	.LBB7_6
.LBB7_7:                                # %._crit_edge
                                        #   in Loop: Header=BB7_4 Depth=2
	incq	%r12
	movq	24(%rsp), %rax                  # 8-byte Reload
	addq	80(%rsp), %rax                  # 8-byte Folded Reload
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	cmpq	48(%rsp), %r12                  # 8-byte Folded Reload
	jne	.LBB7_4
.LBB7_8:                                # %._crit_edge28
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	16(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	addq	%rax, 40(%rsp)                  # 8-byte Folded Spill
	movq	%rcx, %rax
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	cmpq	64(%rsp), %rcx                  # 8-byte Folded Reload
	jne	.LBB7_2
.LBB7_9:                                # %._crit_edge30
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z4initPd4dim3, .Lfunc_end7-_Z4initPd4dim3
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z5printPd4dim3
.LCPI8_0:
	.quad	0x401921fb54442d18              # double 6.2831853071795862
.LCPI8_4:
	.quad	0x4008000000000000              # double 3
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI8_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI8_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
.LCPI8_3:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.text
	.globl	_Z5printPd4dim3
	.type	_Z5printPd4dim3,@function
_Z5printPd4dim3:                        # @_Z5printPd4dim3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4294967295, %r15d              # imm = 0xFFFFFFFF
	andq	%rsi, %r15
	je	.LBB8_3
# %bb.1:                                # %.lr.ph
	movq	%rdi, %rbx
	leal	-1(%rsi), %eax
	cvtsi2sd	%rax, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%rsi, %rax
	shrq	$33, %rax
	shrl	%edx
	movq	%rsi, %r12
	shrq	$32, %r12
	imull	%edx, %r12d
	addl	%eax, %r12d
	movl	%esi, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	imull	%esi, %r12d
	movsd	.LCPI8_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, (%rsp)                   # 8-byte Spill
	xorl	%r13d, %r13d
.LBB8_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r13, %xmm1
	punpckldq	.LCPI8_1(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI8_2(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leal	(%r12,%r13), %eax
	cltq
	movsd	(%rbx,%rax,8), %xmm0            # xmm0 = mem[0],zero
	xorps	.LCPI8_3(%rip), %xmm0
	movaps	%xmm0, 16(%rsp)                 # 16-byte Spill
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	.LCPI8_4(%rip), %xmm1           # xmm1 = mem[0],zero
	callq	pow
	movapd	16(%rsp), %xmm1                 # 16-byte Reload
	divsd	%xmm0, %xmm1
	movq	%r14, %rdi
	movapd	%xmm1, %xmm0
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB8_2
.LBB8_3:                                # %._crit_edge
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z5printPd4dim3, .Lfunc_end8-_Z5printPd4dim3
	.cfi_endproc
                                        # -- End function
	.globl	_Z7elapsedRP11ihipEvent_tS1_    # -- Begin function _Z7elapsedRP11ihipEvent_tS1_
	.type	_Z7elapsedRP11ihipEvent_tS1_,@function
_Z7elapsedRP11ihipEvent_tS1_:           # @_Z7elapsedRP11ihipEvent_tS1_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	(%rdi), %rax
	movq	(%rsi), %rdx
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z7elapsedRP11ihipEvent_tS1_, .Lfunc_end9-_Z7elapsedRP11ihipEvent_tS1_
	.cfi_endproc
                                        # -- End function
	.globl	_ZlsRSoRK9Variation             # -- Begin function _ZlsRSoRK9Variation
	.type	_ZlsRSoRK9Variation,@function
_ZlsRSoRK9Variation:                    # @_ZlsRSoRK9Variation
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movl	(%rsi), %eax
	cmpq	$6, %rax
	ja	.LBB10_10
# %bb.1:
	jmpq	*.LJTI10_0(,%rax,8)
.LBB10_4:
	movl	$.L.str.2, %esi
	jmp	.LBB10_3
.LBB10_8:
	movl	$.L.str.6, %esi
	jmp	.LBB10_3
.LBB10_6:
	movl	$.L.str.4, %esi
	jmp	.LBB10_3
.LBB10_2:
	movl	$.L.str.1, %esi
	jmp	.LBB10_3
.LBB10_10:
	movl	$.L.str.8, %esi
	movl	$3, %edx
	jmp	.LBB10_11
.LBB10_5:
	movl	$.L.str.3, %esi
	jmp	.LBB10_3
.LBB10_9:
	movl	$.L.str.7, %esi
	jmp	.LBB10_3
.LBB10_7:
	movl	$.L.str.5, %esi
.LBB10_3:
	movl	$24, %edx
.LBB10_11:
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_ZlsRSoRK9Variation, .Lfunc_end10-_ZlsRSoRK9Variation
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI10_0:
	.quad	.LBB10_4
	.quad	.LBB10_5
	.quad	.LBB10_6
	.quad	.LBB10_2
	.quad	.LBB10_8
	.quad	.LBB10_9
	.quad	.LBB10_7
                                        # -- End function
	.text
	.globl	_Z6verifyPdS_4dim3              # -- Begin function _Z6verifyPdS_4dim3
	.type	_Z6verifyPdS_4dim3,@function
_Z6verifyPdS_4dim3:                     # @_Z6verifyPdS_4dim3
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movl	$4294967295, %esi               # imm = 0xFFFFFFFF
	leal	(%rdx,%rsi), %eax
	movb	$1, %bl
	cmpl	$2, %eax
	jb	.LBB11_8
# %bb.1:                                # %.preheader31.lr.ph
	movq	%rdi, %r14
	shrq	$32, %rdx
	addl	%esi, %edx
	addl	$-3, %ecx
	leaq	-1(%rdx), %rsi
	movl	$1, %r12d
	xorl	%ebx, %ebx
.LBB11_2:                               # %.preheader31
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_4 Depth 2
	cmpl	$2, %edx
	jb	.LBB11_7
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB11_2 Depth=1
	movq	%rsi, %rdi
.LBB11_4:                               # %.preheader
                                        #   Parent Loop BB11_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$-3, %ecx
	ja	.LBB11_6
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB11_4 Depth=2
	movsd	(%r14,%r12,8), %xmm0            # xmm0 = mem[0],zero
	ucomisd	(%r15,%r12,8), %xmm0
	jne	.LBB11_9
	jp	.LBB11_9
.LBB11_6:                               # %._crit_edge
                                        #   in Loop: Header=BB11_4 Depth=2
	decq	%rdi
	jne	.LBB11_4
.LBB11_7:                               # %._crit_edge40
                                        #   in Loop: Header=BB11_2 Depth=1
	incq	%r12
	cmpq	%rax, %r12
	setae	%bl
	jne	.LBB11_2
	jmp	.LBB11_8
.LBB11_9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r13
	movl	$.L.str.10, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r15,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.11, %esi
	movl	$6, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r14,%r12,8), %xmm0            # xmm0 = mem[0],zero
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB11_8:                               # %.loopexit
	andb	$1, %bl
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z6verifyPdS_4dim3, .Lfunc_end11-_Z6verifyPdS_4dim3
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$268435456, %edi                # imm = 0x10000000
	callq	_Znam
	movq	%rax, %rbp
	movl	$268435456, %edi                # imm = 0x10000000
	callq	_Znam
	movq	%rax, %r14
	movl	$268435456, %edi                # imm = 0x10000000
	callq	_Znam
	movq	%rax, %r15
	movabsq	$2199023255680, %rsi            # imm = 0x20000000080
	movq	%r14, %rdi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z4initPd4dim3
	movq	%rsp, %r12
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r13
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdx
	movq	(%r13), %rcx
	movabsq	$34359738376, %rdi              # imm = 0x800000008
	movl	$8, %ebx
	movl	$8, %esi
	callq	_Z7executeIL9Variation3EEv4dim3PdS2_
	movq	(%r12), %rsi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	leaq	32(%rsp), %rdi
	movaps	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	leaq	28(%rsp), %rsi
	movl	$32, (%rsi)
	movl	$4, %eax
	leaq	24(%rsp), %rdx
	movl	%eax, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%eax, (%rcx)
.Ltmp0:
	callq	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
.Ltmp1:
# %bb.1:
	movq	%r14, 64(%rsp)                  # 8-byte Spill
	leaq	28(%rsp), %rsi
	movl	%ebx, (%rsi)
	leaq	24(%rsp), %rdx
	movl	%ebx, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%ebx, (%rcx)
.Ltmp3:
	leaq	32(%rsp), %rdi
	callq	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
.Ltmp4:
# %bb.2:
	movq	%rbp, %r14
	leaq	28(%rsp), %rsi
	movl	$16, (%rsi)
	movl	$8, %eax
	leaq	24(%rsp), %rdx
	movl	%eax, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%eax, (%rcx)
.Ltmp6:
	leaq	32(%rsp), %rdi
	callq	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
.Ltmp7:
# %bb.3:
	leaq	28(%rsp), %rsi
	movl	$16, (%rsi)
	movl	$4, %eax
	leaq	24(%rsp), %rdx
	movl	%eax, (%rdx)
	leaq	20(%rsp), %rcx
	movl	%eax, (%rcx)
.Ltmp9:
	leaq	32(%rsp), %rdi
	callq	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
.Ltmp10:
# %bb.4:
	movq	32(%rsp), %r13
	movq	40(%rsp), %rbx
.LBB12_5:                               # =>This Inner Loop Header: Depth=1
	cmpq	%rbx, %r13
	je	.LBB12_6
# %bb.20:                               # %.lr.ph
                                        #   in Loop: Header=BB12_5 Depth=1
	movq	(%r13), %r12
	movl	8(%r13), %ebp
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp12:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation3EEv4dim3PdS2_
.Ltmp13:
# %bb.21:                               #   in Loop: Header=BB12_5 Depth=1
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp14:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation0EEv4dim3PdS2_
.Ltmp15:
# %bb.22:                               #   in Loop: Header=BB12_5 Depth=1
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp16:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation5EEv4dim3PdS2_
.Ltmp17:
# %bb.23:                               #   in Loop: Header=BB12_5 Depth=1
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp18:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation4EEv4dim3PdS2_
.Ltmp19:
# %bb.24:                               #   in Loop: Header=BB12_5 Depth=1
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp20:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation1EEv4dim3PdS2_
.Ltmp21:
# %bb.25:                               #   in Loop: Header=BB12_5 Depth=1
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp22:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation6EEv4dim3PdS2_
.Ltmp23:
# %bb.26:                               #   in Loop: Header=BB12_5 Depth=1
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
.Ltmp24:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_Z7executeIL9Variation2EEv4dim3PdS2_
.Ltmp25:
# %bb.27:                               #   in Loop: Header=BB12_5 Depth=1
	addq	$12, %r13
	jmp	.LBB12_5
.LBB12_6:                               # %._crit_edge
	movq	(%rsp), %rsi
.Ltmp27:
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp28:
# %bb.7:
.Ltmp29:
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$512, %ecx                      # imm = 0x200
	callq	_Z6verifyPdS_4dim3
.Ltmp30:
# %bb.8:                                # %.invoke
	movl	$.L.str.13, %ecx
	movl	$.L.str.12, %esi
	testb	%al, %al
	cmovneq	%rcx, %rsi
	movl	$66, %eax
	movl	$48, %edx
	cmovneq	%rax, %rdx
.Ltmp31:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.9:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit66.invoke
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r12
.Ltmp33:
	movq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp34:
# %bb.10:                               # %.noexc72.invoke
.Ltmp35:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp36:
# %bb.11:                               # %.noexc73.invoke
.Ltmp37:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp38:
# %bb.12:                               # %_ZNSolsEPFRSoS_E.exit
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	(%rsp), %rdi
.Ltmp39:
	callq	hipFree
.Ltmp40:
# %bb.13:
	movq	8(%rsp), %rdi
.Ltmp41:
	callq	hipFree
.Ltmp42:
# %bb.14:
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_16
# %bb.15:
	callq	_ZdlPv
.LBB12_16:                              # %_ZNSt6vectorI4dim3SaIS0_EED2Ev.exit
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB12_19:
	.cfi_def_cfa_offset 128
.Ltmp11:
	jmp	.LBB12_31
.LBB12_18:
.Ltmp8:
	jmp	.LBB12_31
.LBB12_17:
.Ltmp5:
	jmp	.LBB12_31
.LBB12_30:
.Ltmp2:
	jmp	.LBB12_31
.LBB12_29:
.Ltmp43:
	jmp	.LBB12_31
.LBB12_28:
.Ltmp26:
.LBB12_31:
	movq	%rax, %rbx
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_33
# %bb.32:
	callq	_ZdlPv
.LBB12_33:                              # %_ZNSt6vectorI4dim3SaIS0_EED2Ev.exit69
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end12:
	.size	main, .Lfunc_end12-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table12:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp25-.Ltmp12                #   Call between .Ltmp12 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin0          #     jumps to .Ltmp26
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp42-.Ltmp27                #   Call between .Ltmp27 and .Ltmp42
	.uleb128 .Ltmp43-.Lfunc_begin0          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Lfunc_end12-.Ltmp42           #   Call between .Ltmp42 and .Lfunc_end12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation3EEv4dim3PdS2_
.LCPI13_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation3EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation3EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation3EEv4dim3PdS2_
	.type	_Z7executeIL9Variation3EEv4dim3PdS2_,@function
_Z7executeIL9Variation3EEv4dim3PdS2_:   # @_Z7executeIL9Variation3EEv4dim3PdS2_
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movq	%rdi, %r13
	movq	%rdi, %r14
	shrq	$32, %r14
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%r13d
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r14d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%ebp
	testl	%r8d, %r8d
	jne	.LBB13_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB13_4
# %bb.6:
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jne	.LBB13_7
# %bb.9:
	movl	%eax, %ebx
	movl	%ecx, %eax
	movl	%esi, %r14d
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	shlq	$32, %r14
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	orq	%rax, %r14
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r15d
	movabsq	$549755813889, %r12             # imm = 0x8000000001
.LBB13_10:                              # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	movq	%r13, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_12
# %bb.11:                               #   in Loop: Header=BB13_10 Depth=1
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movq	%r12, %r8
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_
.LBB13_12:                              #   in Loop: Header=BB13_10 Depth=1
	decq	%r15
	jne	.LBB13_10
# %bb.13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB13_17
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$3, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI13_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_1:
	.cfi_def_cfa_offset 128
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp44:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp45:
	jmp	.LBB13_2
.LBB13_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp47:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp48:
	jmp	.LBB13_2
.LBB13_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp50:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp51:
.LBB13_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB13_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB13_8:
.Ltmp52:
	jmp	.LBB13_16
.LBB13_5:
.Ltmp49:
	jmp	.LBB13_16
.LBB13_15:
.Ltmp46:
.LBB13_16:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end13:
	.size	_Z7executeIL9Variation3EEv4dim3PdS2_, .Lfunc_end13-_Z7executeIL9Variation3EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation3EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation3EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table13:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp44-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp44
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp45-.Ltmp44                #   Call between .Ltmp44 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin1          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp47-.Ltmp45                #   Call between .Ltmp45 and .Ltmp47
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp48-.Ltmp47                #   Call between .Ltmp47 and .Ltmp48
	.uleb128 .Ltmp49-.Lfunc_begin1          #     jumps to .Ltmp49
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp48-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp50-.Ltmp48                #   Call between .Ltmp48 and .Ltmp50
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp51-.Ltmp50                #   Call between .Ltmp50 and .Ltmp51
	.uleb128 .Ltmp52-.Lfunc_begin1          #     jumps to .Ltmp52
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Lfunc_end13-.Ltmp51           #   Call between .Ltmp51 and .Lfunc_end13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_,"axG",@progbits,_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_,comdat
	.weak	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_ # -- Begin function _ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_,@function
_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_: # @_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rcx, %r8
	movq	%rdx, %rcx
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rax
	cmpq	16(%rdi), %rax
	je	.LBB14_2
# %bb.1:
	movl	(%rdx), %edx
	movl	(%rcx), %ecx
	movl	(%r8), %esi
	movl	%edx, (%rax)
	movl	%ecx, 4(%rax)
	movl	%esi, 8(%rax)
	addq	$12, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB14_3
.LBB14_2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	callq	_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	movq	8(%rbx), %rax
.LBB14_3:
	addq	$-12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_, .Lfunc_end14-_ZNSt6vectorI4dim3SaIS0_EE12emplace_backIJiiiEEERS0_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation0EEv4dim3PdS2_
.LCPI15_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation0EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation0EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation0EEv4dim3PdS2_
	.type	_Z7executeIL9Variation0EEv4dim3PdS2_,@function
_Z7executeIL9Variation0EEv4dim3PdS2_:   # @_Z7executeIL9Variation0EEv4dim3PdS2_
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movq	%rdi, %r13
	movq	%rdi, %r14
	shrq	$32, %r14
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%r13d
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r14d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%ebp
	testl	%r8d, %r8d
	jne	.LBB15_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB15_4
# %bb.6:
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jne	.LBB15_7
# %bb.9:
	movl	%eax, %ebx
	movl	%ecx, %eax
	movl	%esi, %r14d
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	shlq	$32, %r14
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	orq	%rax, %r14
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r15d
	movabsq	$549755813889, %r12             # imm = 0x8000000001
.LBB15_10:                              # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	movq	%r13, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB15_12
# %bb.11:                               #   in Loop: Header=BB15_10 Depth=1
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movq	%r12, %r8
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_
.LBB15_12:                              #   in Loop: Header=BB15_10 Depth=1
	decq	%r15
	jne	.LBB15_10
# %bb.13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB15_17
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$0, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI15_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB15_1:
	.cfi_def_cfa_offset 128
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp53:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp54:
	jmp	.LBB15_2
.LBB15_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp56:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp57:
	jmp	.LBB15_2
.LBB15_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp59:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp60:
.LBB15_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB15_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB15_8:
.Ltmp61:
	jmp	.LBB15_16
.LBB15_5:
.Ltmp58:
	jmp	.LBB15_16
.LBB15_15:
.Ltmp55:
.LBB15_16:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end15:
	.size	_Z7executeIL9Variation0EEv4dim3PdS2_, .Lfunc_end15-_Z7executeIL9Variation0EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation0EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation0EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table15:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp53-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp53
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp53-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp54-.Ltmp53                #   Call between .Ltmp53 and .Ltmp54
	.uleb128 .Ltmp55-.Lfunc_begin2          #     jumps to .Ltmp55
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp54-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp56-.Ltmp54                #   Call between .Ltmp54 and .Ltmp56
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp57-.Ltmp56                #   Call between .Ltmp56 and .Ltmp57
	.uleb128 .Ltmp58-.Lfunc_begin2          #     jumps to .Ltmp58
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Ltmp59-.Ltmp57                #   Call between .Ltmp57 and .Ltmp59
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp59-.Lfunc_begin2          # >> Call Site 6 <<
	.uleb128 .Ltmp60-.Ltmp59                #   Call between .Ltmp59 and .Ltmp60
	.uleb128 .Ltmp61-.Lfunc_begin2          #     jumps to .Ltmp61
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin2          # >> Call Site 7 <<
	.uleb128 .Lfunc_end15-.Ltmp60           #   Call between .Ltmp60 and .Lfunc_end15
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation5EEv4dim3PdS2_
.LCPI16_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation5EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation5EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation5EEv4dim3PdS2_
	.type	_Z7executeIL9Variation5EEv4dim3PdS2_,@function
_Z7executeIL9Variation5EEv4dim3PdS2_:   # @_Z7executeIL9Variation5EEv4dim3PdS2_
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movq	%rdi, %r13
	movq	%rdi, %r14
	shrq	$32, %r14
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%r13d
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r14d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%ebp
	testl	%r8d, %r8d
	jne	.LBB16_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB16_4
# %bb.6:
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jne	.LBB16_7
# %bb.9:
	movl	%eax, %ebx
	movl	%ecx, %eax
	movl	%esi, %r14d
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	shlq	$32, %r14
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	orq	%rax, %r14
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r15d
	movabsq	$549755813889, %r12             # imm = 0x8000000001
.LBB16_10:                              # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	movq	%r13, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_12
# %bb.11:                               #   in Loop: Header=BB16_10 Depth=1
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movq	%r12, %r8
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_
.LBB16_12:                              #   in Loop: Header=BB16_10 Depth=1
	decq	%r15
	jne	.LBB16_10
# %bb.13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB16_17
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$5, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI16_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB16_1:
	.cfi_def_cfa_offset 128
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp62:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp63:
	jmp	.LBB16_2
.LBB16_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp65:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp66:
	jmp	.LBB16_2
.LBB16_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp68:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp69:
.LBB16_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB16_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB16_8:
.Ltmp70:
	jmp	.LBB16_16
.LBB16_5:
.Ltmp67:
	jmp	.LBB16_16
.LBB16_15:
.Ltmp64:
.LBB16_16:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end16:
	.size	_Z7executeIL9Variation5EEv4dim3PdS2_, .Lfunc_end16-_Z7executeIL9Variation5EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation5EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation5EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table16:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Lfunc_begin3-.Lfunc_begin3    # >> Call Site 1 <<
	.uleb128 .Ltmp62-.Lfunc_begin3          #   Call between .Lfunc_begin3 and .Ltmp62
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp62-.Lfunc_begin3          # >> Call Site 2 <<
	.uleb128 .Ltmp63-.Ltmp62                #   Call between .Ltmp62 and .Ltmp63
	.uleb128 .Ltmp64-.Lfunc_begin3          #     jumps to .Ltmp64
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin3          # >> Call Site 3 <<
	.uleb128 .Ltmp65-.Ltmp63                #   Call between .Ltmp63 and .Ltmp65
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin3          # >> Call Site 4 <<
	.uleb128 .Ltmp66-.Ltmp65                #   Call between .Ltmp65 and .Ltmp66
	.uleb128 .Ltmp67-.Lfunc_begin3          #     jumps to .Ltmp67
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin3          # >> Call Site 5 <<
	.uleb128 .Ltmp68-.Ltmp66                #   Call between .Ltmp66 and .Ltmp68
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp68-.Lfunc_begin3          # >> Call Site 6 <<
	.uleb128 .Ltmp69-.Ltmp68                #   Call between .Ltmp68 and .Ltmp69
	.uleb128 .Ltmp70-.Lfunc_begin3          #     jumps to .Ltmp70
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp69-.Lfunc_begin3          # >> Call Site 7 <<
	.uleb128 .Lfunc_end16-.Ltmp69           #   Call between .Ltmp69 and .Lfunc_end16
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end3:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation4EEv4dim3PdS2_
.LCPI17_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation4EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation4EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation4EEv4dim3PdS2_
	.type	_Z7executeIL9Variation4EEv4dim3PdS2_,@function
_Z7executeIL9Variation4EEv4dim3PdS2_:   # @_Z7executeIL9Variation4EEv4dim3PdS2_
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %ebp
	movq	%rdi, %r13
	movq	%rdi, %r14
	shrq	$32, %r14
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%r13d
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r14d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%ebp
	testl	%r8d, %r8d
	jne	.LBB17_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB17_4
# %bb.6:
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	testl	%edx, %edx
	jne	.LBB17_7
# %bb.9:
	movl	%eax, %ebx
	movl	%ecx, %eax
	movl	%esi, %r14d
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	shlq	$32, %r14
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	orq	%rax, %r14
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %r15d
	movabsq	$549755813889, %r12             # imm = 0x8000000001
.LBB17_10:                              # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	movq	%r13, %rdx
	movl	%ebp, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB17_12
# %bb.11:                               #   in Loop: Header=BB17_10 Depth=1
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movq	%r12, %r8
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_
.LBB17_12:                              #   in Loop: Header=BB17_10 Depth=1
	decq	%r15
	jne	.LBB17_10
# %bb.13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB17_17
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$4, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r13d, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI17_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB17_1:
	.cfi_def_cfa_offset 128
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp71:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp72:
	jmp	.LBB17_2
.LBB17_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp74:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp75:
	jmp	.LBB17_2
.LBB17_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp77:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp78:
.LBB17_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB17_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB17_8:
.Ltmp79:
	jmp	.LBB17_16
.LBB17_5:
.Ltmp76:
	jmp	.LBB17_16
.LBB17_15:
.Ltmp73:
.LBB17_16:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end17:
	.size	_Z7executeIL9Variation4EEv4dim3PdS2_, .Lfunc_end17-_Z7executeIL9Variation4EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation4EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation4EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table17:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Lfunc_begin4-.Lfunc_begin4    # >> Call Site 1 <<
	.uleb128 .Ltmp71-.Lfunc_begin4          #   Call between .Lfunc_begin4 and .Ltmp71
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp71-.Lfunc_begin4          # >> Call Site 2 <<
	.uleb128 .Ltmp72-.Ltmp71                #   Call between .Ltmp71 and .Ltmp72
	.uleb128 .Ltmp73-.Lfunc_begin4          #     jumps to .Ltmp73
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp72-.Lfunc_begin4          # >> Call Site 3 <<
	.uleb128 .Ltmp74-.Ltmp72                #   Call between .Ltmp72 and .Ltmp74
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp74-.Lfunc_begin4          # >> Call Site 4 <<
	.uleb128 .Ltmp75-.Ltmp74                #   Call between .Ltmp74 and .Ltmp75
	.uleb128 .Ltmp76-.Lfunc_begin4          #     jumps to .Ltmp76
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp75-.Lfunc_begin4          # >> Call Site 5 <<
	.uleb128 .Ltmp77-.Ltmp75                #   Call between .Ltmp75 and .Ltmp77
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp77-.Lfunc_begin4          # >> Call Site 6 <<
	.uleb128 .Ltmp78-.Ltmp77                #   Call between .Ltmp77 and .Ltmp78
	.uleb128 .Ltmp79-.Lfunc_begin4          #     jumps to .Ltmp79
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp78-.Lfunc_begin4          # >> Call Site 7 <<
	.uleb128 .Lfunc_end17-.Ltmp78           #   Call between .Ltmp78 and .Lfunc_end17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end4:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation1EEv4dim3PdS2_
.LCPI18_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation1EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation1EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation1EEv4dim3PdS2_
	.type	_Z7executeIL9Variation1EEv4dim3PdS2_,@function
_Z7executeIL9Variation1EEv4dim3PdS2_:   # @_Z7executeIL9Variation1EEv4dim3PdS2_
.Lfunc_begin5:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception5
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movq	%rdi, %rbp
	movq	%rdi, %r12
	shrq	$32, %r12
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%ebp
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r12d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r14d
	testl	%r8d, %r8d
	jne	.LBB18_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB18_4
# %bb.6:
	testl	%edx, %edx
	jne	.LBB18_7
# %bb.9:
	movl	%eax, %ebx
	movl	%ecx, %eax
	movl	%esi, %r15d
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	shlq	$32, %r15
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	orq	%rax, %r15
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leal	2(%rbp), %eax
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	leal	2(%r12), %ecx
	leal	2(%r14), %r12d
	imull	%eax, %r12d
	imull	%ecx, %r12d
	shlq	$3, %r12
	movl	$100, %r13d
.LBB18_10:                              # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	%ebx, %esi
	movq	%rbp, %rdx
	movl	%r14d, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_12
# %bb.11:                               #   in Loop: Header=BB18_10 Depth=1
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movabsq	$549755813889, %r8              # imm = 0x8000000001
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z29__device_stub__laplace3d_smemPdS_4dim3S0_
.LBB18_12:                              #   in Loop: Header=BB18_10 Depth=1
	decq	%r13
	jne	.LBB18_10
# %bb.13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB18_17
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$1, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r15
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r15
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI18_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB18_1:
	.cfi_def_cfa_offset 128
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp80:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp81:
	jmp	.LBB18_2
.LBB18_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp83:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp84:
	jmp	.LBB18_2
.LBB18_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp86:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp87:
.LBB18_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB18_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB18_8:
.Ltmp88:
	jmp	.LBB18_16
.LBB18_5:
.Ltmp85:
	jmp	.LBB18_16
.LBB18_15:
.Ltmp82:
.LBB18_16:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end18:
	.size	_Z7executeIL9Variation1EEv4dim3PdS2_, .Lfunc_end18-_Z7executeIL9Variation1EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation1EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation1EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table18:
.Lexception5:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end5-.Lcst_begin5
.Lcst_begin5:
	.uleb128 .Lfunc_begin5-.Lfunc_begin5    # >> Call Site 1 <<
	.uleb128 .Ltmp80-.Lfunc_begin5          #   Call between .Lfunc_begin5 and .Ltmp80
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp80-.Lfunc_begin5          # >> Call Site 2 <<
	.uleb128 .Ltmp81-.Ltmp80                #   Call between .Ltmp80 and .Ltmp81
	.uleb128 .Ltmp82-.Lfunc_begin5          #     jumps to .Ltmp82
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin5          # >> Call Site 3 <<
	.uleb128 .Ltmp83-.Ltmp81                #   Call between .Ltmp81 and .Ltmp83
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp83-.Lfunc_begin5          # >> Call Site 4 <<
	.uleb128 .Ltmp84-.Ltmp83                #   Call between .Ltmp83 and .Ltmp84
	.uleb128 .Ltmp85-.Lfunc_begin5          #     jumps to .Ltmp85
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp84-.Lfunc_begin5          # >> Call Site 5 <<
	.uleb128 .Ltmp86-.Ltmp84                #   Call between .Ltmp84 and .Ltmp86
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp86-.Lfunc_begin5          # >> Call Site 6 <<
	.uleb128 .Ltmp87-.Ltmp86                #   Call between .Ltmp86 and .Ltmp87
	.uleb128 .Ltmp88-.Lfunc_begin5          #     jumps to .Ltmp88
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp87-.Lfunc_begin5          # >> Call Site 7 <<
	.uleb128 .Lfunc_end18-.Ltmp87           #   Call between .Ltmp87 and .Lfunc_end18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end5:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation6EEv4dim3PdS2_
.LCPI19_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation6EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation6EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation6EEv4dim3PdS2_
	.type	_Z7executeIL9Variation6EEv4dim3PdS2_,@function
_Z7executeIL9Variation6EEv4dim3PdS2_:   # @_Z7executeIL9Variation6EEv4dim3PdS2_
.Lfunc_begin6:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception6
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 80(%rsp)                  # 8-byte Spill
	movq	%rdx, 72(%rsp)                  # 8-byte Spill
	movl	%esi, %ebx
	movq	%rdi, %r12
	movq	%rdi, %r15
	shrq	$32, %r15
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%r12d
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r15d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%ebx
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	testl	%r8d, %r8d
	jne	.LBB19_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB19_4
# %bb.6:
	testl	%edx, %edx
	jne	.LBB19_7
# %bb.9:
	movl	%ecx, %eax
	movl	%esi, %r14d
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	shlq	$32, %r14
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	orq	%rax, %r14
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	leal	2(%r12), %eax
	movq	%r15, 56(%rsp)                  # 8-byte Spill
	leal	2(%r15), %ebp
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	leal	2(%rbx), %r15d
	movl	%r15d, %r13d
	imull	%eax, %r13d
	imull	%ebp, %r13d
	shlq	$32, %rbp
	orq	%rax, %rbp
	leal	(,%r13,8), %r12d
	movl	$100, %ebx
.LBB19_10:                              # =>This Inner Loop Header: Depth=1
	cmpl	$1024, %r13d                    # imm = 0x400
	ja	.LBB19_13
# %bb.11:                               #   in Loop: Header=BB19_10 Depth=1
	movq	%r14, %rdi
	movl	4(%rsp), %esi                   # 4-byte Reload
	movq	%rbp, %rdx
	movl	%r15d, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB19_13
# %bb.12:                               #   in Loop: Header=BB19_10 Depth=1
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movabsq	$549755813889, %r8              # imm = 0x8000000001
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_
.LBB19_13:                              #   in Loop: Header=BB19_10 Depth=1
	decq	%rbx
	jne	.LBB19_10
# %bb.14:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB19_18
# %bb.15:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$6, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	32(%rsp), %esi                  # 4-byte Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	64(%rsp), %esi                  # 4-byte Reload
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	4(%rsp), %esi                   # 4-byte Reload
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI19_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB19_1:
	.cfi_def_cfa_offset 144
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp89:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp90:
	jmp	.LBB19_2
.LBB19_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp92:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp93:
	jmp	.LBB19_2
.LBB19_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp95:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp96:
.LBB19_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB19_18:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB19_8:
.Ltmp97:
	jmp	.LBB19_17
.LBB19_5:
.Ltmp94:
	jmp	.LBB19_17
.LBB19_16:
.Ltmp91:
.LBB19_17:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end19:
	.size	_Z7executeIL9Variation6EEv4dim3PdS2_, .Lfunc_end19-_Z7executeIL9Variation6EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation6EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation6EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table19:
.Lexception6:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end6-.Lcst_begin6
.Lcst_begin6:
	.uleb128 .Lfunc_begin6-.Lfunc_begin6    # >> Call Site 1 <<
	.uleb128 .Ltmp89-.Lfunc_begin6          #   Call between .Lfunc_begin6 and .Ltmp89
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp89-.Lfunc_begin6          # >> Call Site 2 <<
	.uleb128 .Ltmp90-.Ltmp89                #   Call between .Ltmp89 and .Ltmp90
	.uleb128 .Ltmp91-.Lfunc_begin6          #     jumps to .Ltmp91
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp90-.Lfunc_begin6          # >> Call Site 3 <<
	.uleb128 .Ltmp92-.Ltmp90                #   Call between .Ltmp90 and .Ltmp92
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp92-.Lfunc_begin6          # >> Call Site 4 <<
	.uleb128 .Ltmp93-.Ltmp92                #   Call between .Ltmp92 and .Ltmp93
	.uleb128 .Ltmp94-.Lfunc_begin6          #     jumps to .Ltmp94
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp93-.Lfunc_begin6          # >> Call Site 5 <<
	.uleb128 .Ltmp95-.Ltmp93                #   Call between .Ltmp93 and .Ltmp95
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp95-.Lfunc_begin6          # >> Call Site 6 <<
	.uleb128 .Ltmp96-.Ltmp95                #   Call between .Ltmp95 and .Ltmp96
	.uleb128 .Ltmp97-.Lfunc_begin6          #     jumps to .Ltmp97
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp96-.Lfunc_begin6          # >> Call Site 7 <<
	.uleb128 .Lfunc_end19-.Ltmp96           #   Call between .Ltmp96 and .Lfunc_end19
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end6:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7executeIL9Variation2EEv4dim3PdS2_
.LCPI20_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z7executeIL9Variation2EEv4dim3PdS2_,"axG",@progbits,_Z7executeIL9Variation2EEv4dim3PdS2_,comdat
	.weak	_Z7executeIL9Variation2EEv4dim3PdS2_
	.type	_Z7executeIL9Variation2EEv4dim3PdS2_,@function
_Z7executeIL9Variation2EEv4dim3PdS2_:   # @_Z7executeIL9Variation2EEv4dim3PdS2_
.Lfunc_begin7:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception7
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movq	%rdi, %rbp
	movq	%rdi, %r12
	shrq	$32, %r12
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$128, %eax
	xorl	%edx, %edx
	divl	%ebp
	movl	%edx, %r8d
	movl	%eax, %ecx
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r12d
	movl	%edx, %edi
	movl	%eax, %esi
	movl	$512, %eax                      # imm = 0x200
	xorl	%edx, %edx
	divl	%r14d
	testl	%r8d, %r8d
	jne	.LBB20_1
# %bb.3:
	testl	%edi, %edi
	jne	.LBB20_4
# %bb.6:
	testl	%edx, %edx
	jne	.LBB20_7
# %bb.9:
	movl	%eax, %ebx
	movl	%ecx, %eax
	movl	%esi, %r15d
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	shlq	$32, %r15
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	orq	%rax, %r15
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leal	2(%rbp), %eax
	movq	%r12, 48(%rsp)                  # 8-byte Spill
	leal	2(%r12), %ecx
	leal	2(%r14), %r12d
	imull	%eax, %r12d
	imull	%ecx, %r12d
	shlq	$3, %r12
	movl	$100, %r13d
.LBB20_10:                              # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	%ebx, %esi
	movq	%rbp, %rdx
	movl	%r14d, %ecx
	movq	%r12, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_12
# %bb.11:                               #   in Loop: Header=BB20_10 Depth=1
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movabsq	$2199023255680, %rdx            # imm = 0x20000000080
	movl	$512, %ecx                      # imm = 0x200
	movabsq	$549755813889, %r8              # imm = 0x8000000001
	movl	$65536, %r9d                    # imm = 0x10000
	callq	_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_
.LBB20_12:                              #   in Loop: Header=BB20_10 Depth=1
	decq	%r13
	jne	.LBB20_10
# %bb.13:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB20_17
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	28(%rsp), %rsi
	movl	$2, (%rsi)
	movl	$_ZSt4cout, %edi
	callq	_ZlsRSoRK9Variation
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r15
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r15, %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r15
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%r14d, %esi
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
	movq	%rax, %r14
	movl	$.L.str.19, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebx, %esi
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.20, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI20_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.23, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB20_1:
	.cfi_def_cfa_offset 128
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp98:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp99:
	jmp	.LBB20_2
.LBB20_4:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp101:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp102:
	jmp	.LBB20_2
.LBB20_7:
	movl	$16, %edi
	callq	__cxa_allocate_exception
	movq	%rax, %rbx
.Ltmp104:
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	callq	_ZNSt13runtime_errorC1EPKc
.Ltmp105:
.LBB20_2:
	movl	$_ZTISt13runtime_error, %esi
	movl	$_ZNSt13runtime_errorD1Ev, %edx
	movq	%rbx, %rdi
	callq	__cxa_throw
.LBB20_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.16, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$478, %r8d                      # imm = 0x1DE
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.LBB20_8:
.Ltmp106:
	jmp	.LBB20_16
.LBB20_5:
.Ltmp103:
	jmp	.LBB20_16
.LBB20_15:
.Ltmp100:
.LBB20_16:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	__cxa_free_exception
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end20:
	.size	_Z7executeIL9Variation2EEv4dim3PdS2_, .Lfunc_end20-_Z7executeIL9Variation2EEv4dim3PdS2_
	.cfi_endproc
	.section	.gcc_except_table._Z7executeIL9Variation2EEv4dim3PdS2_,"aG",@progbits,_Z7executeIL9Variation2EEv4dim3PdS2_,comdat
	.p2align	2, 0x0
GCC_except_table20:
.Lexception7:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end7-.Lcst_begin7
.Lcst_begin7:
	.uleb128 .Lfunc_begin7-.Lfunc_begin7    # >> Call Site 1 <<
	.uleb128 .Ltmp98-.Lfunc_begin7          #   Call between .Lfunc_begin7 and .Ltmp98
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp98-.Lfunc_begin7          # >> Call Site 2 <<
	.uleb128 .Ltmp99-.Ltmp98                #   Call between .Ltmp98 and .Ltmp99
	.uleb128 .Ltmp100-.Lfunc_begin7         #     jumps to .Ltmp100
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp99-.Lfunc_begin7          # >> Call Site 3 <<
	.uleb128 .Ltmp101-.Ltmp99               #   Call between .Ltmp99 and .Ltmp101
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp101-.Lfunc_begin7         # >> Call Site 4 <<
	.uleb128 .Ltmp102-.Ltmp101              #   Call between .Ltmp101 and .Ltmp102
	.uleb128 .Ltmp103-.Lfunc_begin7         #     jumps to .Ltmp103
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp102-.Lfunc_begin7         # >> Call Site 5 <<
	.uleb128 .Ltmp104-.Ltmp102              #   Call between .Ltmp102 and .Ltmp104
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp104-.Lfunc_begin7         # >> Call Site 6 <<
	.uleb128 .Ltmp105-.Ltmp104              #   Call between .Ltmp104 and .Ltmp105
	.uleb128 .Ltmp106-.Lfunc_begin7         #     jumps to .Ltmp106
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp105-.Lfunc_begin7         # >> Call Site 7 <<
	.uleb128 .Lfunc_end20-.Ltmp105          #   Call between .Ltmp105 and .Lfunc_end20
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end7:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.weak	_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_ # -- Begin function _ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,@function
_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_: # @_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, 8(%rsp)                    # 8-byte Spill
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %rbp
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.24, %edx
	callq	_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc
	movq	(%rbx), %r12
	movq	8(%rbx), %r14
	movq	%rbx, %rdi
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorI4dim3E8allocateEmPKv
	movq	%rax, %r13
	movl	(%rbp), %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	movl	(%rcx), %ecx
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	(%rdx), %edx
	movq	%r15, %rsi
	movq	%r13, %rbp
	subq	%r12, %rsi
	movl	%eax, (%r13,%rsi)
	movl	%ecx, 4(%r13,%rsi)
	movl	%edx, 8(%r13,%rsi)
	je	.LBB21_3
# %bb.1:                                # %.lr.ph.i.i.i.preheader
	movq	%r13, %rbp
	movq	%r12, %rax
.LBB21_2:                               # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	8(%rax), %ecx
	movl	%ecx, 8(%rbp)
	movq	(%rax), %rcx
	movq	%rcx, (%rbp)
	addq	$12, %rax
	addq	$12, %rbp
	cmpq	%r15, %rax
	jne	.LBB21_2
.LBB21_3:                               # %_ZNSt6vectorI4dim3SaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	addq	$12, %rbp
	cmpq	%r15, %r14
	je	.LBB21_5
.LBB21_4:                               # %.lr.ph.i.i.i29
                                        # =>This Inner Loop Header: Depth=1
	movl	8(%r15), %eax
	movl	%eax, 8(%rbp)
	movq	(%r15), %rax
	movq	%rax, (%rbp)
	addq	$12, %r15
	addq	$12, %rbp
	cmpq	%r14, %r15
	jne	.LBB21_4
.LBB21_5:                               # %_ZNSt6vectorI4dim3SaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit34
	testq	%r12, %r12
	je	.LBB21_7
# %bb.6:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB21_7:                               # %_ZNSt12_Vector_baseI4dim3SaIS0_EE13_M_deallocateEPS0_m.exit
	movq	%r13, (%rbx)
	movq	%rbp, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(,%rax,4), %rax
	addq	%r13, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .Lfunc_end21-_ZNSt6vectorI4dim3SaIS0_EE17_M_realloc_insertIJiiiEEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$768614336404564650, %rcx       # imm = 0xAAAAAAAAAAAAAAA
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$2, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB22_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB22_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end22:
	.size	_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc, .Lfunc_end22-_ZNKSt6vectorI4dim3SaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorI4dim3E8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorI4dim3E8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorI4dim3E8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorI4dim3E8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorI4dim3E8allocateEmPKv,@function
_ZNSt15__new_allocatorI4dim3E8allocateEmPKv: # @_ZNSt15__new_allocatorI4dim3E8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jae	.LBB23_1
# %bb.3:
	shlq	$2, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB23_1:
	.cfi_def_cfa_offset 16
	movabsq	$1537228672809129302, %rax      # imm = 0x1555555555555556
	cmpq	%rax, %rsi
	jb	.LBB23_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB23_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end23:
	.size	_ZNSt15__new_allocatorI4dim3E8allocateEmPKv, .Lfunc_end23-_ZNSt15__new_allocatorI4dim3E8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB24_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB24_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16laplace3d_no_ldgPdS_4dim3S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13laplace3d_ldgPdS_4dim3S0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27laplace3d_relative_indexingPdS_4dim3S0_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24laplace3d_const_restrictPdPKd4dim3S2_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14laplace3d_smemPdS_4dim3S0_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23laplace3d_smem_relativePdPKd4dim3S2_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15laplace3d_smem2PdS_4dim3S0_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end24:
	.size	__hip_module_ctor, .Lfunc_end24-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB25_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB25_2:
	retq
.Lfunc_end25:
	.size	__hip_module_dtor, .Lfunc_end25-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16laplace3d_no_ldgPdS_4dim3S0_,@object # @_Z16laplace3d_no_ldgPdS_4dim3S0_
	.section	.rodata,"a",@progbits
	.globl	_Z16laplace3d_no_ldgPdS_4dim3S0_
	.p2align	3, 0x0
_Z16laplace3d_no_ldgPdS_4dim3S0_:
	.quad	_Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_
	.size	_Z16laplace3d_no_ldgPdS_4dim3S0_, 8

	.type	_Z13laplace3d_ldgPdS_4dim3S0_,@object # @_Z13laplace3d_ldgPdS_4dim3S0_
	.globl	_Z13laplace3d_ldgPdS_4dim3S0_
	.p2align	3, 0x0
_Z13laplace3d_ldgPdS_4dim3S0_:
	.quad	_Z28__device_stub__laplace3d_ldgPdS_4dim3S0_
	.size	_Z13laplace3d_ldgPdS_4dim3S0_, 8

	.type	_Z27laplace3d_relative_indexingPdS_4dim3S0_,@object # @_Z27laplace3d_relative_indexingPdS_4dim3S0_
	.globl	_Z27laplace3d_relative_indexingPdS_4dim3S0_
	.p2align	3, 0x0
_Z27laplace3d_relative_indexingPdS_4dim3S0_:
	.quad	_Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_
	.size	_Z27laplace3d_relative_indexingPdS_4dim3S0_, 8

	.type	_Z24laplace3d_const_restrictPdPKd4dim3S2_,@object # @_Z24laplace3d_const_restrictPdPKd4dim3S2_
	.globl	_Z24laplace3d_const_restrictPdPKd4dim3S2_
	.p2align	3, 0x0
_Z24laplace3d_const_restrictPdPKd4dim3S2_:
	.quad	_Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_
	.size	_Z24laplace3d_const_restrictPdPKd4dim3S2_, 8

	.type	_Z14laplace3d_smemPdS_4dim3S0_,@object # @_Z14laplace3d_smemPdS_4dim3S0_
	.globl	_Z14laplace3d_smemPdS_4dim3S0_
	.p2align	3, 0x0
_Z14laplace3d_smemPdS_4dim3S0_:
	.quad	_Z29__device_stub__laplace3d_smemPdS_4dim3S0_
	.size	_Z14laplace3d_smemPdS_4dim3S0_, 8

	.type	_Z23laplace3d_smem_relativePdPKd4dim3S2_,@object # @_Z23laplace3d_smem_relativePdPKd4dim3S2_
	.globl	_Z23laplace3d_smem_relativePdPKd4dim3S2_
	.p2align	3, 0x0
_Z23laplace3d_smem_relativePdPKd4dim3S2_:
	.quad	_Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_
	.size	_Z23laplace3d_smem_relativePdPKd4dim3S2_, 8

	.type	_Z15laplace3d_smem2PdS_4dim3S0_,@object # @_Z15laplace3d_smem2PdS_4dim3S0_
	.globl	_Z15laplace3d_smem2PdS_4dim3S0_
	.p2align	3, 0x0
_Z15laplace3d_smem2PdS_4dim3S0_:
	.quad	_Z30__device_stub__laplace3d_smem2PdS_4dim3S0_
	.size	_Z15laplace3d_smem2PdS_4dim3S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" \t"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"no optimization,        "
	.size	.L.str.1, 25

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"__ldg,                  "
	.size	.L.str.2, 25

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"shared memory,          "
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"shared memory relative, "
	.size	.L.str.4, 25

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"shared memory v2,       "
	.size	.L.str.5, 25

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"relative indexing,      "
	.size	.L.str.6, 25

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"const __restrict__,     "
	.size	.L.str.7, 25

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"n/a"
	.size	.L.str.8, 4

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"in index "
	.size	.L.str.9, 10

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	" val="
	.size	.L.str.10, 6

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	", ref="
	.size	.L.str.11, 7

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"ERROR: the last executed variant didn't validate"
	.size	.L.str.12, 49

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"OK: last variation verified against the non-optimized CUDA version"
	.size	.L.str.13, 67

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"there is a bug for non divisible sizes"
	.size	.L.str.14, 39

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"CUDA ERROR: %s in %s at line %d\n"
	.size	.L.str.15, 33

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/orgarten/hack18_dd/master/main.hip"
	.size	.L.str.16, 97

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"# Variation: "
	.size	.L.str.17, 14

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"threads/block = ("
	.size	.L.str.18, 18

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"/"
	.size	.L.str.19, 2

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"), \t"
	.size	.L.str.20, 5

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"blocks = ("
	.size	.L.str.21, 11

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"time = "
	.size	.L.str.22, 8

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"ms"
	.size	.L.str.23, 3

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.24, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16laplace3d_no_ldgPdS_4dim3S0_"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13laplace3d_ldgPdS_4dim3S0_"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z27laplace3d_relative_indexingPdS_4dim3S0_"
	.size	.L__unnamed_3, 44

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z24laplace3d_const_restrictPdPKd4dim3S2_"
	.size	.L__unnamed_4, 42

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z14laplace3d_smemPdS_4dim3S0_"
	.size	.L__unnamed_5, 31

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z23laplace3d_smem_relativePdPKd4dim3S2_"
	.size	.L__unnamed_6, 41

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z15laplace3d_smem2PdS_4dim3S0_"
	.size	.L__unnamed_7, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__laplace3d_no_ldgPdS_4dim3S0_
	.addrsig_sym _Z28__device_stub__laplace3d_ldgPdS_4dim3S0_
	.addrsig_sym _Z42__device_stub__laplace3d_relative_indexingPdS_4dim3S0_
	.addrsig_sym _Z39__device_stub__laplace3d_const_restrictPdPKd4dim3S2_
	.addrsig_sym _Z29__device_stub__laplace3d_smemPdS_4dim3S0_
	.addrsig_sym _Z38__device_stub__laplace3d_smem_relativePdPKd4dim3S2_
	.addrsig_sym _Z30__device_stub__laplace3d_smem2PdS_4dim3S0_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z16laplace3d_no_ldgPdS_4dim3S0_
	.addrsig_sym _Z13laplace3d_ldgPdS_4dim3S0_
	.addrsig_sym _Z27laplace3d_relative_indexingPdS_4dim3S0_
	.addrsig_sym _Z24laplace3d_const_restrictPdPKd4dim3S2_
	.addrsig_sym _Z14laplace3d_smemPdS_4dim3S0_
	.addrsig_sym _Z23laplace3d_smem_relativePdPKd4dim3S2_
	.addrsig_sym _Z15laplace3d_smem2PdS_4dim3S0_
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZTISt13runtime_error
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16laplace3d_no_ldgPdS_4dim3S0_ ; -- Begin function _Z16laplace3d_no_ldgPdS_4dim3S0_
	.globl	_Z16laplace3d_no_ldgPdS_4dim3S0_
	.p2align	8
	.type	_Z16laplace3d_no_ldgPdS_4dim3S0_,@function
_Z16laplace3d_no_ldgPdS_4dim3S0_:       ; @_Z16laplace3d_no_ldgPdS_4dim3S0_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x14
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s8, s8, -1
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	s_and_b32 s2, s3, 0xffff
	s_add_i32 s3, s5, -1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s2, s4, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	v_min_i32_e32 v3, v1, v0
	v_cmp_gt_u32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s3, s3, v2
	v_cmp_lt_i32_e64 s4, 0, v3
	v_cmp_lt_i32_e64 s5, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s2, s2, s3
	s_and_b32 s3, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s5
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b32 s4, s[0:1], 0x24
	v_add_nc_u32_e32 v3, -1, v0
	v_mul_lo_u32 v10, v1, s7
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v0, v0, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v1, v3, s6
	v_subrev_nc_u32_e32 v5, s7, v10
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v15, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v1, v15, v10, v1
	v_add3_u32 v5, v15, v0, v5
	v_add_nc_u32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshl_add_u32 v3, s6, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshl_add_u32 v8, s7, 1, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 3, v[5:6]
	v_ashrrev_i32_e32 v9, 31, v8
	v_subrev_nc_u32_e32 v5, s4, v15
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_nc_u32_e32 v15, v0, v15
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_clause 0x1
	global_load_b64 v[1:2], v[1:2], off
	global_load_b64 v[3:4], v[3:4], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_nc_u32_e32 v10, v5, v0
	v_ashrrev_i32_e32 v16, 31, v15
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshl_add_u32 v13, s4, 1, v10
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	global_load_b64 v[8:9], v[8:9], off
	v_lshlrev_b64 v[11:12], 3, v[10:11]
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	global_load_b64 v[11:12], v[11:12], off
	v_add_co_u32 v13, vcc_lo, s2, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
	v_add_co_u32 v17, vcc_lo, s2, v15
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v16, vcc_lo
	s_clause 0x1
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[17:18], v[17:18], off
	s_waitcnt vmcnt(5)
	v_add_f64 v[0:1], v[1:2], v[3:4]
	v_add_co_u32 v2, vcc_lo, s0, v15
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v16, vcc_lo
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	s_waitcnt vmcnt(3)
	v_add_f64 v[0:1], v[0:1], v[8:9]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[11:12]
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[13:14]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0xc0180000, v[17:18], v[0:1]
	v_mul_f64 v[0:1], v[0:1], 0.5
	global_store_b64 v[2:3], v[0:1], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16laplace3d_no_ldgPdS_4dim3S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16laplace3d_no_ldgPdS_4dim3S0_, .Lfunc_end0-_Z16laplace3d_no_ldgPdS_4dim3S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 704
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z13laplace3d_ldgPdS_4dim3S0_ ; -- Begin function _Z13laplace3d_ldgPdS_4dim3S0_
	.globl	_Z13laplace3d_ldgPdS_4dim3S0_
	.p2align	8
	.type	_Z13laplace3d_ldgPdS_4dim3S0_,@function
_Z13laplace3d_ldgPdS_4dim3S0_:          ; @_Z13laplace3d_ldgPdS_4dim3S0_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x14
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s8, s8, -1
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	s_and_b32 s2, s3, 0xffff
	s_add_i32 s3, s5, -1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s2, s4, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	v_min_i32_e32 v3, v1, v0
	v_cmp_gt_u32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s3, s3, v2
	v_cmp_lt_i32_e64 s4, 0, v3
	v_cmp_lt_i32_e64 s5, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s2, s2, s3
	s_and_b32 s3, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s5
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b32 s4, s[0:1], 0x24
	v_add_nc_u32_e32 v3, -1, v0
	v_mul_lo_u32 v10, v1, s7
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v0, v0, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v1, v3, s6
	v_subrev_nc_u32_e32 v5, s7, v10
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v15, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v1, v15, v10, v1
	v_add3_u32 v5, v15, v0, v5
	v_add_nc_u32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshl_add_u32 v3, s6, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshl_add_u32 v8, s7, 1, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 3, v[5:6]
	v_ashrrev_i32_e32 v9, 31, v8
	v_subrev_nc_u32_e32 v5, s4, v15
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_nc_u32_e32 v15, v0, v15
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_clause 0x1
	global_load_b64 v[1:2], v[1:2], off
	global_load_b64 v[3:4], v[3:4], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_nc_u32_e32 v10, v5, v0
	v_ashrrev_i32_e32 v16, 31, v15
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshl_add_u32 v13, s4, 1, v10
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	global_load_b64 v[8:9], v[8:9], off
	v_lshlrev_b64 v[11:12], 3, v[10:11]
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	global_load_b64 v[11:12], v[11:12], off
	v_add_co_u32 v13, vcc_lo, s2, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
	v_add_co_u32 v17, vcc_lo, s2, v15
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v16, vcc_lo
	s_clause 0x1
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[17:18], v[17:18], off
	s_waitcnt vmcnt(5)
	v_add_f64 v[0:1], v[1:2], v[3:4]
	v_add_co_u32 v2, vcc_lo, s0, v15
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v16, vcc_lo
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	s_waitcnt vmcnt(3)
	v_add_f64 v[0:1], v[0:1], v[8:9]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[11:12]
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[13:14]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0xc0180000, v[17:18], v[0:1]
	v_mul_f64 v[0:1], v[0:1], 0.5
	global_store_b64 v[2:3], v[0:1], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13laplace3d_ldgPdS_4dim3S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13laplace3d_ldgPdS_4dim3S0_, .Lfunc_end1-_Z13laplace3d_ldgPdS_4dim3S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 704
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z27laplace3d_relative_indexingPdS_4dim3S0_ ; -- Begin function _Z27laplace3d_relative_indexingPdS_4dim3S0_
	.globl	_Z27laplace3d_relative_indexingPdS_4dim3S0_
	.p2align	8
	.type	_Z27laplace3d_relative_indexingPdS_4dim3S0_,@function
_Z27laplace3d_relative_indexingPdS_4dim3S0_: ; @_Z27laplace3d_relative_indexingPdS_4dim3S0_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x14
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s8, s8, -1
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	s_and_b32 s2, s3, 0xffff
	s_add_i32 s3, s5, -1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s2, s4, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	v_min_i32_e32 v3, v1, v0
	v_cmp_gt_u32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s3, s3, v2
	v_cmp_lt_i32_e64 s4, 0, v3
	v_cmp_lt_i32_e64 s5, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s2, s2, s3
	s_and_b32 s3, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s5
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v0, v0, s6
	v_mul_lo_u32 v1, v1, s7
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v0, v1, v0, v2
	v_mov_b32_e32 v2, 0
	v_subrev_nc_u32_e32 v1, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_add_nc_u32_e32 v1, s6, v0
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_subrev_nc_u32_e32 v1, s7, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	v_lshlrev_b64 v[7:8], 3, v[1:2]
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[5:6], v[5:6], off
	v_add_nc_u32_e32 v1, s7, v0
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 3, v[1:2]
	v_subrev_nc_u32_e32 v1, s4, v0
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_lshlrev_b64 v[11:12], 3, v[1:2]
	v_add_nc_u32_e32 v1, s4, v0
	global_load_b64 v[9:10], v[9:10], off
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	global_load_b64 v[11:12], v[11:12], off
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[13:14], v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v15, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(5)
	v_add_f64 v[2:3], v[3:4], v[5:6]
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[7:8]
	s_waitcnt vmcnt(3)
	v_add_f64 v[2:3], v[2:3], v[9:10]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[11:12]
	s_waitcnt vmcnt(1)
	v_add_f64 v[2:3], v[2:3], v[13:14]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], 0xc0180000, v[15:16], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	global_store_b64 v[0:1], v[2:3], off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27laplace3d_relative_indexingPdS_4dim3S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z27laplace3d_relative_indexingPdS_4dim3S0_, .Lfunc_end2-_Z27laplace3d_relative_indexingPdS_4dim3S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 640
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z24laplace3d_const_restrictPdPKd4dim3S2_ ; -- Begin function _Z24laplace3d_const_restrictPdPKd4dim3S2_
	.globl	_Z24laplace3d_const_restrictPdPKd4dim3S2_
	.p2align	8
	.type	_Z24laplace3d_const_restrictPdPKd4dim3S2_,@function
_Z24laplace3d_const_restrictPdPKd4dim3S2_: ; @_Z24laplace3d_const_restrictPdPKd4dim3S2_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x14
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s8, s8, -1
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s9, v[3:4]
	s_and_b32 s2, s3, 0xffff
	s_add_i32 s3, s5, -1
	v_mad_u64_u32 v[2:3], null, s15, s2, v[4:5]
	s_add_i32 s2, s4, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e32 vcc_lo, s8, v0
	v_min_i32_e32 v3, v1, v0
	v_cmp_gt_u32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e64 s3, s3, v2
	v_cmp_lt_i32_e64 s4, 0, v3
	v_cmp_lt_i32_e64 s5, 0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s2, s2, s3
	s_and_b32 s3, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s5
	s_and_b32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b32 s4, s[0:1], 0x24
	v_add_nc_u32_e32 v3, -1, v0
	v_mul_lo_u32 v10, v1, s7
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mul_lo_u32 v0, v0, s6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v1, v3, s6
	v_subrev_nc_u32_e32 v5, s7, v10
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v15, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add3_u32 v1, v15, v10, v1
	v_add3_u32 v5, v15, v0, v5
	v_add_nc_u32_e32 v0, v10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshl_add_u32 v3, s6, 1, v1
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshl_add_u32 v8, s7, 1, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 3, v[5:6]
	v_ashrrev_i32_e32 v9, 31, v8
	v_subrev_nc_u32_e32 v5, s4, v15
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_nc_u32_e32 v15, v0, v15
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s2, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_clause 0x1
	global_load_b64 v[1:2], v[1:2], off
	global_load_b64 v[3:4], v[3:4], off
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_nc_u32_e32 v10, v5, v0
	v_ashrrev_i32_e32 v16, 31, v15
	global_load_b64 v[6:7], v[6:7], off
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshl_add_u32 v13, s4, 1, v10
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	global_load_b64 v[8:9], v[8:9], off
	v_lshlrev_b64 v[11:12], 3, v[10:11]
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	global_load_b64 v[11:12], v[11:12], off
	v_add_co_u32 v13, vcc_lo, s2, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s3, v14, vcc_lo
	v_add_co_u32 v17, vcc_lo, s2, v15
	v_add_co_ci_u32_e32 v18, vcc_lo, s3, v16, vcc_lo
	s_clause 0x1
	global_load_b64 v[13:14], v[13:14], off
	global_load_b64 v[17:18], v[17:18], off
	s_waitcnt vmcnt(5)
	v_add_f64 v[0:1], v[1:2], v[3:4]
	v_add_co_u32 v2, vcc_lo, s0, v15
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v16, vcc_lo
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	s_waitcnt vmcnt(3)
	v_add_f64 v[0:1], v[0:1], v[8:9]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[11:12]
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[13:14]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0xc0180000, v[17:18], v[0:1]
	v_mul_f64 v[0:1], v[0:1], 0.5
	global_store_b64 v[2:3], v[0:1], off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24laplace3d_const_restrictPdPKd4dim3S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z24laplace3d_const_restrictPdPKd4dim3S2_, .Lfunc_end3-_Z24laplace3d_const_restrictPdPKd4dim3S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 704
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z14laplace3d_smemPdS_4dim3S0_ ; -- Begin function _Z14laplace3d_smemPdS_4dim3S0_
	.globl	_Z14laplace3d_smemPdS_4dim3S0_
	.p2align	8
	.type	_Z14laplace3d_smemPdS_4dim3S0_,@function
_Z14laplace3d_smemPdS_4dim3S0_:         ; @_Z14laplace3d_smemPdS_4dim3S0_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b256 s[16:23], s[0:1], 0x0
	s_load_b64 s[6:7], s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_eq_u32_e64 s0, 0, v1
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[9:10], null, s14, s4, v[4:5]
	v_mad_u64_u32 v[11:12], null, s13, s2, v[1:2]
	s_and_b32 s10, s3, 0xffff
	v_add_nc_u32_e32 v5, 1, v4
	v_mad_u64_u32 v[7:8], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v16, v9, s6
	s_add_i32 s9, s4, 2
	v_mul_lo_u32 v14, v11, s23
	s_add_i32 s8, s2, 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v7, s7
	v_add_nc_u32_e32 v6, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v6, v10
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[12:13]
	v_add_nc_u32_e32 v13, 1, v0
	v_mad_u32_u24 v8, s9, v13, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v17, vcc_lo, s18, v2
	v_add_co_ci_u32_e32 v18, vcc_lo, s19, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v15, v8, s8
	v_cmp_lt_i32_e32 vcc_lo, 0, v11
	global_load_b64 v[17:18], v[17:18], off
	s_and_b32 s0, s0, vcc_lo
	v_add_nc_u32_e32 v8, v15, v1
	v_lshl_add_u32 v8, v8, 3, 0
	s_waitcnt vmcnt(0)
	ds_store_b64 v8, v[17:18] offset:8
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_2
; %bb.1:
	v_subrev_nc_u32_e32 v17, s23, v14
	v_lshl_add_u32 v18, v15, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v16, v17, v16, v10
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	v_add_co_u32 v16, s0, s18, v16
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s0, s19, v17, s0
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v18, v[16:17]
.LBB4_2:
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s0, s2, -1
	s_add_i32 s3, s20, -1
	v_cmp_eq_u32_e64 s1, s0, v1
	v_cmp_gt_u32_e64 s0, s3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s0
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB4_4
; %bb.3:
	v_add_nc_u32_e32 v11, s23, v12
	v_add_nc_u32_e32 v15, s2, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshl_add_u32 v15, v15, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	v_add_co_u32 v11, s1, s18, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s1, s19, v12, s1
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v15, v[11:12] offset:8
.LBB4_4:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_eq_u32_e64 s2, 0, v4
	v_cmp_lt_i32_e64 s1, 0, v9
	v_mul_u32_u24_e32 v11, s9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB4_6
; %bb.5:
	v_add_nc_u32_e32 v12, -1, v9
	v_mad_u64_u32 v[15:16], null, v11, s8, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v12, v12, s6
	v_lshl_add_u32 v15, v15, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v12, v12, v14, v10
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v12, s2, s18, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s2, s19, v13, s2
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v15, v[12:13] offset:8
.LBB4_6:
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s2, s4, -1
	s_add_i32 s5, s21, -1
	v_cmp_eq_u32_e64 s3, s2, v4
	v_cmp_gt_u32_e64 s2, s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s2
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB4_8
; %bb.7:
	v_mad_u64_u32 v[12:13], null, s6, v9, s[6:7]
	v_add3_u32 v9, s4, 1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v12, v12, v14, v10
	v_mad_u64_u32 v[14:15], null, v9, s8, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshl_add_u32 v9, v14, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	v_add_co_u32 v12, s3, s18, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s3, s19, v13, s3
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v9, v[12:13] offset:8
.LBB4_8:
	s_or_b32 exec_lo, exec_lo, s5
	v_cmp_eq_u32_e64 s4, 0, v0
	v_cmp_lt_i32_e64 s3, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s4, s4, s3
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB4_10
; %bb.9:
	v_add_nc_u32_e32 v9, -1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v9, s7, v[6:7]
	v_mad_u32_u24 v9, s8, v5, v1
	v_lshl_add_u32 v9, v9, 3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[12:13], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v12, s4, s18, v12
	v_add_co_ci_u32_e64 v13, s4, s19, v13, s4
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v9, v[12:13] offset:8
.LBB4_10:
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s4, s10, -1
	s_add_i32 s6, s22, -1
	v_cmp_eq_u32_e64 s5, s4, v0
	v_cmp_gt_u32_e64 s4, s6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, s4
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB4_12
; %bb.11:
	v_add3_u32 v6, v10, s7, v6
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s5, s18, v6
	v_add_co_ci_u32_e64 v7, s5, s19, v7, s5
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, s10, s9, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, v9, s8, v[1:2]
	v_lshl_add_u32 v9, v12, 3, 0
	ds_store_b64 v9, v[6:7] offset:8
.LBB4_12:
	s_or_b32 exec_lo, exec_lo, s6
	s_and_b32 s0, s0, s1
	s_and_b32 s1, s2, s3
	s_and_b32 s0, vcc_lo, s0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, s1
	s_barrier
	s_and_b32 s0, s0, s4
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB4_14
; %bb.13:
	ds_load_2addr_b64 v[12:15], v8 offset1:1
	ds_load_b64 v[6:7], v8 offset:16
	v_add_nc_u32_e32 v4, v11, v4
	v_mad_u32_u24 v0, s9, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, s8, v[1:2]
	v_lshl_add_u32 v11, v8, 3, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v0, s8, v[1:2]
	ds_load_b64 v[4:5], v11 offset:8
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[6:7], v[12:13], v[6:7]
	v_lshl_add_u32 v12, s9, 1, v0
	v_lshl_add_u32 v0, s8, 4, v11
	v_lshl_add_u32 v8, v8, 3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[9:10], null, v12, s8, v[1:2]
	v_add_co_u32 v2, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	v_lshl_add_u32 v10, v9, 3, 0
	ds_load_b64 v[0:1], v0 offset:8
	ds_load_b64 v[8:9], v8 offset:8
	ds_load_b64 v[10:11], v10 offset:8
	s_waitcnt lgkmcnt(3)
	v_add_f64 v[4:5], v[6:7], v[4:5]
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[4:5], v[0:1]
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[8:9]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[10:11]
	v_fma_f64 v[0:1], 0xc0180000, v[14:15], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], 0.5
	global_store_b64 v[2:3], v[0:1], off
.LBB4_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14laplace3d_smemPdS_4dim3S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z14laplace3d_smemPdS_4dim3S0_, .Lfunc_end4-_Z14laplace3d_smemPdS_4dim3S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1332
; NumSgprs: 26
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z23laplace3d_smem_relativePdPKd4dim3S2_ ; -- Begin function _Z23laplace3d_smem_relativePdPKd4dim3S2_
	.globl	_Z23laplace3d_smem_relativePdPKd4dim3S2_
	.p2align	8
	.type	_Z23laplace3d_smem_relativePdPKd4dim3S2_,@function
_Z23laplace3d_smem_relativePdPKd4dim3S2_: ; @_Z23laplace3d_smem_relativePdPKd4dim3S2_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b64 s[16:17], s[0:1], 0x20
	v_and_b32_e32 v10, 0x3ff, v0
	v_bfe_u32 v7, v0, 10, 10
	v_bfe_u32 v2, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s18, s3, 0xffff
	s_lshr_b32 s6, s2, 16
	s_and_b32 s4, s2, 0xffff
	v_mad_u64_u32 v[8:9], null, s14, s6, v[7:8]
	v_mad_u64_u32 v[11:12], null, s13, s4, v[10:11]
	v_mad_u64_u32 v[5:6], null, s15, s18, v[2:3]
	s_load_b64 s[12:13], s[0:1], 0x8
	s_add_i32 s2, s6, 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v1, v8, s16
	v_mul_lo_u32 v0, v11, s11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v5, s17
	v_add3_u32 v3, v1, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	v_add_nc_u32_e32 v4, 1, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v4, s2, v4, v7
	s_add_i32 s2, s4, 2
	v_cmp_lt_i32_e32 vcc_lo, 0, v11
	global_load_b64 v[13:14], v[12:13], off
	v_mul_lo_u32 v4, s2, v4
	v_add3_u32 v12, v4, s2, v10
	v_cmp_eq_u32_e64 s2, 0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v6, s4, v12
	v_lshl_add_u32 v4, v12, 3, 0
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v6, v6, 3, 0
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[13:14] offset:8
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_2
; %bb.1:
	v_subrev_nc_u32_e32 v13, s11, v3
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	v_add_co_u32 v13, s2, s12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s2, s13, v14, s2
	global_load_b64 v[13:14], v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v6, v[13:14] offset:8
.LBB5_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_add_i32 s2, s4, -1
	s_add_i32 s5, s8, -1
	v_cmp_eq_u32_e64 s3, s2, v10
	v_cmp_gt_u32_e64 s2, s5, v11
	v_lshl_add_u32 v9, s4, 3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s3, s2
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB5_4
; %bb.3:
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v10, s11, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	v_add_co_u32 v10, s3, s12, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s3, s13, v11, s3
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v9, v[10:11] offset:8
.LBB5_4:
	s_or_b32 exec_lo, exec_lo, s4
	v_subrev_nc_u32_e32 v10, s6, v12
	v_cmp_eq_u32_e64 s4, 0, v7
	v_cmp_lt_i32_e64 s3, 0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v10, v10, 3, 0
	s_and_b32 s4, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB5_6
; %bb.5:
	v_subrev_nc_u32_e32 v13, s16, v3
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	v_add_co_u32 v13, s4, s12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s4, s13, v14, s4
	global_load_b64 v[13:14], v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v10, v[13:14] offset:8
.LBB5_6:
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s4, s6, -1
	s_add_i32 s7, s9, -1
	v_cmp_eq_u32_e64 s5, s4, v7
	v_cmp_gt_u32_e64 s4, s7, v8
	v_lshl_add_u32 v7, s6, 3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s5, s5, s4
	s_and_saveexec_b32 s6, s5
	s_cbranch_execz .LBB5_8
; %bb.7:
	v_dual_mov_b32 v14, 0 :: v_dual_add_nc_u32 v13, s16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	v_add_co_u32 v13, s5, s12, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s5, s13, v14, s5
	global_load_b64 v[13:14], v[13:14], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v7, v[13:14] offset:8
.LBB5_8:
	s_or_b32 exec_lo, exec_lo, s6
	v_subrev_nc_u32_e32 v8, s18, v12
	v_cmp_eq_u32_e64 s6, 0, v2
	v_cmp_lt_i32_e64 s5, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v8, v8, 3, 0
	s_and_b32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s7, s6
	s_cbranch_execz .LBB5_10
; %bb.9:
	v_subrev_nc_u32_e32 v11, s17, v3
	v_mov_b32_e32 v12, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	v_add_co_u32 v11, s6, s12, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s6, s13, v12, s6
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v8, v[11:12] offset:8
.LBB5_10:
	s_or_b32 exec_lo, exec_lo, s7
	s_add_i32 s6, s18, -1
	s_add_i32 s8, s10, -1
	v_cmp_eq_u32_e64 s7, s6, v2
	v_cmp_gt_u32_e64 s6, s8, v5
	v_lshl_add_u32 v2, s18, 3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s7, s7, s6
	s_and_saveexec_b32 s8, s7
	s_cbranch_execz .LBB5_12
; %bb.11:
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v11, s17, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 3, v[11:12]
	v_add_co_u32 v11, s7, s12, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s7, s13, v12, s7
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v2, v[11:12] offset:8
.LBB5_12:
	s_or_b32 exec_lo, exec_lo, s8
	s_and_b32 s2, s2, s3
	s_and_b32 s3, s4, s5
	s_and_b32 s2, vcc_lo, s2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, s3
	s_barrier
	s_and_b32 s2, s2, s6
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_14
; %bb.13:
	ds_load_b64 v[5:6], v6 offset:8
	ds_load_b64 v[11:12], v9 offset:8
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[5:6], v[5:6], v[11:12]
	ds_load_b64 v[9:10], v10 offset:8
	ds_load_b64 v[11:12], v7 offset:8
	ds_load_b64 v[7:8], v8 offset:8
	ds_load_b64 v[2:3], v2 offset:8
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt lgkmcnt(3)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[11:12]
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[5:6], v[2:3]
	ds_load_b64 v[4:5], v4 offset:8
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], 0xc0180000, v[4:5], v[2:3]
	v_mul_f64 v[2:3], v[2:3], 0.5
	global_store_b64 v[0:1], v[2:3], off
.LBB5_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23laplace3d_smem_relativePdPKd4dim3S2_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z23laplace3d_smem_relativePdPKd4dim3S2_, .Lfunc_end5-_Z23laplace3d_smem_relativePdPKd4dim3S2_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1152
; NumSgprs: 21
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z15laplace3d_smem2PdS_4dim3S0_ ; -- Begin function _Z15laplace3d_smem2PdS_4dim3S0_
	.globl	_Z15laplace3d_smem2PdS_4dim3S0_
	.p2align	8
	.type	_Z15laplace3d_smem2PdS_4dim3S0_,@function
_Z15laplace3d_smem2PdS_4dim3S0_:        ; @_Z15laplace3d_smem2PdS_4dim3S0_
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x34
	s_load_b64 s[8:9], s[0:1], 0x20
	s_load_b256 s[16:23], s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_lshr_b32 s6, s2, 16
	s_add_i32 s0, s5, -2
	s_and_b32 s4, s3, 0xffff
	v_mad_u64_u32 v[3:4], null, s0, s13, v[1:2]
	s_add_i32 s1, s6, -2
	s_add_i32 s0, s4, -2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[4:5], null, s1, s14, v[2:3]
	v_mad_u64_u32 v[5:6], null, s0, s15, v[0:1]
	v_add_nc_u32_e32 v9, -1, v3
	v_mad_u32_u24 v6, v0, s6, v2
	v_add_nc_u32_e32 v8, -1, v4
	v_min_i32_e32 v10, v4, v3
	v_add_nc_u32_e32 v7, -1, v5
	v_mul_lo_u32 v3, v9, s23
	v_cmp_gt_u32_e32 vcc_lo, s20, v9
	v_mul_lo_u32 v4, v8, s8
	v_cmp_gt_u32_e64 s1, s21, v8
	v_mul_lo_u32 v11, v7, s9
	v_cmp_gt_u32_e64 s2, s22, v7
	v_cmp_lt_i32_e64 s0, 0, v10
	v_cmp_lt_i32_e64 s3, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s1, s1, s2
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v4, v3, v11
	s_and_b32 s1, s1, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, s1
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_ashrrev_i32_e32 v4, 31, v3
	v_mad_u64_u32 v[13:14], null, v6, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 3, v[3:4]
	v_lshl_add_u32 v4, v13, 3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s19, v12, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[11:12]
.LBB6_2:
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s0, s20, -1
	s_add_i32 s2, s21, -1
	v_cmp_lt_i32_e32 vcc_lo, 1, v10
	v_cmp_gt_u32_e64 s0, s0, v9
	v_cmp_lt_i32_e64 s1, 1, v5
	v_cmp_gt_u32_e64 s2, s2, v8
	s_add_i32 s3, s6, -1
	s_add_i32 s4, s4, -1
	s_and_b32 s0, vcc_lo, s0
	v_cmp_gt_u32_e64 s3, s3, v2
	s_and_b32 s1, s2, s1
	s_add_i32 s2, s22, -1
	s_and_b32 s7, s0, s1
	v_cmp_gt_u32_e32 vcc_lo, s2, v7
	v_cmp_ne_u32_e64 s0, 0, v1
	s_add_i32 s1, s5, -1
	v_cmp_ne_u32_e64 s2, 0, v2
	v_cmp_gt_u32_e64 s1, s1, v1
	v_cmp_gt_u32_e64 s4, s4, v0
	s_and_b32 s0, s0, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
	s_and_b32 s0, s7, s0
	s_and_b32 s1, s2, s1
	s_and_b32 s2, s3, s4
	s_and_b32 s0, s0, s1
	s_and_b32 s1, s2, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, s1
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB6_4
; %bb.3:
	v_mul_lo_u32 v14, v6, s5
	v_mul_u32_u24_e32 v0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v0, s6, v0
	v_add_nc_u32_e32 v4, v1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v2
	v_lshl_add_u32 v4, v4, 3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v5, -8, v4
	ds_load_2addr_b64 v[7:10], v5 offset1:1
	ds_load_b64 v[4:5], v4 offset:8
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[4:5], v[7:8], v[4:5]
	v_add_nc_u32_e32 v8, -1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, s5, v[1:2]
	v_lshl_add_u32 v2, s6, 1, v0
	v_mad_u64_u32 v[11:12], null, v0, s5, v[1:2]
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v6, v6, 3, 0
	v_mad_u64_u32 v[12:13], null, v2, s5, v[1:2]
	v_add3_u32 v0, v14, s5, v1
	ds_load_b64 v[6:7], v6
	v_lshl_add_u32 v2, v11, 3, 0
	v_lshl_add_u32 v0, v0, 3, 0
	v_lshl_add_u32 v8, v12, 3, 0
	ds_load_b64 v[0:1], v0
	ds_load_b64 v[11:12], v2
	ds_load_b64 v[13:14], v8
	s_waitcnt lgkmcnt(3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[4:5], v[0:1]
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[2:3], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_add_f64 v[0:1], v[0:1], v[11:12]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[13:14]
	v_fma_f64 v[0:1], 0xc0180000, v[9:10], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], 0.5
	global_store_b64 v[2:3], v[0:1], off
.LBB6_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15laplace3d_smem2PdS_4dim3S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z15laplace3d_smem2PdS_4dim3S0_, .Lfunc_end6-_Z15laplace3d_smem2PdS_4dim3S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 800
; NumSgprs: 26
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           12
        .value_kind:     by_value
      - .offset:         28
        .size:           12
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
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