#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define CHECK(e) { int res = (e); if (res) printf("CUDA ERROR %d\n", res); }
#define CHANNEL 3

// Struct for measuring performance
struct GpuTimer{
	cudaEvent_t start;
	cudaEvent_t stop;

	GpuTimer(){
		cudaEventCreate(&start);
		cudaEventCreate(&stop);
	}

	~GpuTimer(){
		cudaEventDestroy(start);
		cudaEventDestroy(stop);
	}

	void Start(){
		cudaEventRecord(start, 0);
	}

	void Stop(){
		cudaEventRecord(stop, 0);
	}

	float Elapsed(){
		float elapsed;
		cudaEventSynchronize(stop);
		cudaEventElapsedTime(&elapsed, start, stop);
		return elapsed;
	}
};

struct Image {
	int width;
	int height;
	unsigned int bytes;
	unsigned char *img;
	unsigned char *dev_img;
};

// Reads a color ppm image file and saves the data in the provided Image structure. 
// The max_col_val is set to the value read from the input file.
// This is used later for writing the output image. 
int readInpImg(const char * fname, Image & source, int & max_col_val) {
	FILE *src;
	if (!(src = fopen(fname, "rb"))){
		printf("Couldn't open file %s for reading.\n", fname);
		return 1;
	}
	char p, s;
	fscanf(src, "%c%c\n", &p, &s);
	if (p != 'P' || s != '6'){	// Is it a valid format?
		printf("Not a valid PPM file (%c %c)\n", p, s);
		exit(1);
	}
	fscanf(src, "%d %d\n", &source.width, &source.height);
	fscanf(src, "%d\n", &max_col_val);
	int pixels = source.width * source.height;
	source.bytes = pixels * CHANNEL;  // CHANNEL = 3 => colored image with r, g, and b channels 
	source.img = (unsigned char *)malloc(source.bytes);
	if (fread(source.img, sizeof(unsigned char), source.bytes, src) != source.bytes){
		printf("Error reading file.\n");
		exit(1);
	}
	fclose(src);
	return 0;
}

// Write a color ppm image into a file.  
// Image structure represents the image in the memory. 
int writeOutImg(const char * fname, const Image & rotated, const int max_col_val) {
	FILE *out;
	if (!(out = fopen(fname, "wb"))){
		printf("Couldn't open file for output.\n");
		return 1;
	}
	fprintf(out, "P6\n%d %d\n%d\n", rotated.width, rotated.height, max_col_val);
	if (fwrite(rotated.dev_img, sizeof(unsigned char), rotated.bytes, out) != rotated.bytes){
		printf("Error writing file.\n");
		return 1;
	}
	fclose(out);
	return 0;
}

// To be launched on CPU
void rotate_90_CPU(unsigned char in[], unsigned char out[], int height, int width) {
	for (int i = 0; i < height; i++) {
		for (int j = 0; j < width; j++) {
			int index_in = i * width * CHANNEL + j * CHANNEL;
			int index_out = j * height * CHANNEL + height * CHANNEL - (i + 1) * CHANNEL;
			out[index_out] = in[index_in];
			out[index_out + 1] = in[index_in + 1];
			out[index_out + 2] = in[index_in + 2];
		}
	}
}

// To be launched on a single thread
__global__ void rotate_90_serial(unsigned char in[], unsigned char out[], int height, int width) {
	for (int i = 0; i < height; i++) {
		for (int j = 0; j < width; j++) {
			int index_in = i * width * CHANNEL + j * CHANNEL;
			int index_out = j * height * CHANNEL + height * CHANNEL - (i + 1) * CHANNEL;
			out[index_out] = in[index_in];
			out[index_out + 1] = in[index_in + 1];
			out[index_out + 2] = in[index_in + 2];
		}
	}
}

// To be launched with one thread per element
__global__ void rotate_90_parallel_per_element(unsigned char in[], unsigned char out[], int height, int width) {
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	int j = blockIdx.y*blockDim.y + threadIdx.y;
	int index_in = i * width * CHANNEL + j * CHANNEL;
	int index_out = j * height * CHANNEL + height * CHANNEL - (i + 1) * CHANNEL;
	int image_size = height * width * CHANNEL;
	if(index_in < image_size && index_in >= 0 && index_out < image_size && index_out >= 0){
		out[index_out] = in[index_in];
		out[index_out + 1] = in[index_in + 1];
		out[index_out + 2] = in[index_in + 2];
	}
}

// To be launched with one thread per element. Thread blocks read & write tiles in coalesced fashion.
__global__ void rotate_90_parallel_per_element_tiled(unsigned char in[], unsigned char out[], int height, int width, unsigned int tile_size) {
	// (i,j) locations of the tile corners for input & output matrices:
	int in_corner_i = blockIdx.x * tile_size, in_corner_j = blockIdx.y * tile_size * CHANNEL;
	int out_corner_i = blockIdx.y * tile_size * CHANNEL, out_corner_j = blockIdx.x * tile_size;
	int x = threadIdx.x, y = threadIdx.y;
	int index_tile = x * (tile_size)*CHANNEL + y * CHANNEL;
	int index_in = in_corner_i * width * CHANNEL + x * width *CHANNEL + in_corner_j + y * CHANNEL;
	int image_size = height * width * CHANNEL;
	int total_tile_size = tile_size * tile_size * CHANNEL;
	extern __shared__ unsigned char tile[];
	// Coalesced read from global mem, rotated write into shared mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_in < image_size  && index_in >= 0){
		tile[index_tile] = in[index_in];
		tile[index_tile+1] = in[index_in+1];
		tile[index_tile+2] = in[index_in+2];
	}

	__syncthreads();
	int index_out = out_corner_i*height + y * height * CHANNEL + height * CHANNEL - (x+1) * CHANNEL - out_corner_j * CHANNEL;
	// Read from shared mem, coalesced write to global mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_out < image_size && index_out >= 0 && index_in < image_size  && index_in >= 0){
		out[index_out] = tile[index_tile];
		out[index_out + 1] = tile[index_tile + 1];
		out[index_out + 2] = tile[index_tile + 2];
	}

}

// To be launched with one thread per element. Thread blocks read & write tiles in coalesced fashion.
// Shared memory array padded to avoid bank conflicts.
__global__ void rotate_90_parallel_per_element_tiled_padded(unsigned char in[], unsigned char out[], int height, int width, unsigned int tile_size) {
	// (i,j) locations of the tile corners for input & output matrices:
	int in_corner_i = blockIdx.x * tile_size, in_corner_j = blockIdx.y * tile_size * CHANNEL;
	int out_corner_i = blockIdx.y * tile_size * CHANNEL, out_corner_j = blockIdx.x * tile_size;
	int x = threadIdx.x, y = threadIdx.y;
	int image_size = height * width * CHANNEL;
	int total_tile_size = tile_size * (tile_size + 1) * CHANNEL ;
	int index_tile = x * (tile_size + 1)*CHANNEL + y * CHANNEL;
	int index_in = in_corner_i * width * CHANNEL + x * width *CHANNEL + in_corner_j + y * CHANNEL;
	extern __shared__ unsigned char tile[];
	// coalesced read from global mem, rotated write into shared mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_in < image_size){
		tile[index_tile] = in[index_in];
		tile[index_tile+1] = in[index_in+1];
		tile[index_tile+2] = in[index_in+2];
	}
	__syncthreads();
	int index_out = out_corner_i*height + y * height * CHANNEL + height * CHANNEL - (x+1)*CHANNEL - out_corner_j*CHANNEL;
	// Read from shared mem, coalesced write to global mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_out < image_size && index_out >= 0 && index_in < image_size && index_in >=0 ){
		out[index_out] = tile[index_tile];
		out[index_out + 1] = tile[index_tile + 1];
		out[index_out + 2] = tile[index_tile + 2];
	}
}


int main(int argc, char **argv){
	if (argc != 3){
		printf("Usage: exec filename kernel\n");
		exit(1);
	}
	char *fname = argv[1];
	char kname[100] = ""; // kernel name
	int choice = atoi(argv[2]); // kernel choice
	Image source;
	int max_col_val;
	GpuTimer timer;
	unsigned char *d_in, *d_out;
	// Read the input file
	if (readInpImg(fname, source, max_col_val) != 0)  
		exit(1);
	source.dev_img = (unsigned char *)malloc(source.bytes);
	CHECK(cudaMalloc(&d_in, source.bytes));
	CHECK(cudaMalloc(&d_out, source.bytes));
	CHECK(cudaMemcpy(d_in, source.img, source.bytes, cudaMemcpyHostToDevice));
	// Run selected kernel
	switch (choice) {
	case 1: // Serial execution on GPU, i.e. creating ONLY ONE thread
		strcpy(kname, "Serial execution on GPU");
		timer.Start();
		rotate_90_serial <<<1, 1>>> (d_in, d_out, source.height, source.width);
		timer.Stop();
		CHECK(cudaMemcpy(source.dev_img, d_out, source.bytes, cudaMemcpyDeviceToHost));
		break;
	case 2: { // One thread per pixel
		strcpy(kname, "One thread per pixel");
		int k = 32;
		dim3 blocks(ceil((float)source.height / (float)k), ceil((float)source.width / (float)k));   // blocks per grid (using ceil in case height or width are not multiple of k)
		dim3 threads(k, k);	// threads per block
		timer.Start();
		rotate_90_parallel_per_element <<<blocks, threads>>> (d_in, d_out, source.height, source.width);
		timer.Stop();
		CHECK(cudaMemcpy(source.dev_img, d_out, source.bytes, cudaMemcpyDeviceToHost));
		break;
	}
	case 3: { // One thread per pixel - tiled (16 X 16)
		strcpy(kname, "One thread per pixel - tiled (16 X 16)");
		int k = 16; // tile size is k x k
		unsigned int shmem_size = k * k * CHANNEL * sizeof(unsigned char);
		dim3 blocks(ceil((float)source.height / (float)k), ceil((float)source.width / (float)k));   // blocks per grid 
		dim3 threads(k, k);	// threads per block
		timer.Start();
		rotate_90_parallel_per_element_tiled <<<blocks, threads, shmem_size>>> (d_in, d_out, source.height, source.width, k);
		timer.Stop();
		CHECK(cudaMemcpy(source.dev_img, d_out, source.bytes, cudaMemcpyDeviceToHost));
		break;
	}
	case 4: { // One thread per matrix element - tiled (16x16) - no shared mem conflict
		strcpy(kname, "One thread per matrix element - tiled (16x16) - no shared mem conflict");
		int k = 16; // tile size is k x k
		dim3 blocks(ceil((float)source.height / (float)k), ceil((float)source.width / (float)k));   // blocks per grid
		dim3 threads(k, k);	// threads per block
		unsigned int shmem_size = k * (k+1) * CHANNEL * sizeof(unsigned char);
		timer.Start();
		rotate_90_parallel_per_element_tiled_padded <<<blocks, threads, shmem_size>>> (d_in, d_out, source.height, source.width, k);
		timer.Stop();
		CHECK(cudaMemcpy(source.dev_img, d_out, source.bytes, cudaMemcpyDeviceToHost));
		break;
	}
	default:
		printf("Choose a kernel between 1 and 4");
		exit(1);
	}
	printf("\nRotating Image \"%s\" with Height = %d and Width = %d.\nUsing kernel %d: %s\nElapsed time: %g ms.\n\n", argv[1],
		source.height, source.width, choice, kname, timer.Elapsed());
	// Swap height and width for the rotated image
	int temp = source.height;
	source.height = source.width;
	source.width = temp;
	// Write the output file
	if (writeOutImg("rotated.ppm", source, max_col_val) != 0) // For demonstration, the input file is written to a new file named "rotated.ppm" 
		exit(1);
	// free up the allocated memory
	free(source.img);
	free(source.dev_img);
	CHECK(cudaFree(d_in));
	CHECK(cudaFree(d_out));
	exit(0);
}
	.file	"tmpxft_00354558_00000000-6_rotate_img.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2042:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2042:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZN8GpuTimer4StopEv.isra.0, @function
_ZN8GpuTimer4StopEv.isra.0:
.LFB2190:
	.cfi_startproc
	xorl	%esi, %esi
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE2190:
	.size	_ZN8GpuTimer4StopEv.isra.0, .-_ZN8GpuTimer4StopEv.isra.0
	.align 2
	.type	_ZN8GpuTimer5StartEv.isra.0, @function
_ZN8GpuTimer5StartEv.isra.0:
.LFB2191:
	.cfi_startproc
	xorl	%esi, %esi
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE2191:
	.size	_ZN8GpuTimer5StartEv.isra.0, .-_ZN8GpuTimer5StartEv.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"rb"
.LC1:
	.string	"Couldn't open file %s for reading.\n"
.LC2:
	.string	"%c%c\n"
.LC3:
	.string	"Not a valid PPM file (%c %c)\n"
.LC4:
	.string	"%d %d\n"
.LC5:
	.string	"%d\n"
.LC6:
	.string	"Error reading file.\n"
	.text
	.globl	_Z10readInpImgPKcR5ImageRi
	.type	_Z10readInpImgPKcR5ImageRi, @function
_Z10readInpImgPKcR5ImageRi:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	testq	%rax, %rax
	jne	.L5
	movq	%rbx, %rdx
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L4
.L5:
	leaq	6(%rsp), %rdx
	movq	%rax, %rdi
	leaq	7(%rsp), %rcx
	movq	%rax, %r12
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movsbl	6(%rsp), %edx
	cmpb	$80, %dl
	jne	.L7
	cmpb	$54, 7(%rsp)
	je	.L8
.L7:
	movsbl	7(%rsp), %ecx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L12
.L8:
	leaq	4(%rbp), %rcx
	movq	%rbp, %rdx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movq	%r12, %rdi
	call	__isoc23_fscanf@PLT
	movq	%r13, %rdx
	movq	%r12, %rdi
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movl	0(%rbp), %ebx
	imull	4(%rbp), %ebx
	imull	$3, %ebx, %ebx
	movl	%ebx, 8(%rbp)
	movq	%rbx, %rdi
	call	malloc@PLT
	movl	$1, %edx
	movq	%r12, %r8
	movq	%rbx, %rcx
	movq	%rax, 16(%rbp)
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	__fread_chk@PLT
	movl	8(%rbp), %edx
	cmpq	%rax, %rdx
	je	.L9
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L12:
	movl	$1, %edi
	call	exit@PLT
.L9:
	movq	%r12, %rdi
	call	fclose@PLT
	xorl	%eax, %eax
.L4:
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z10readInpImgPKcR5ImageRi, .-_Z10readInpImgPKcR5ImageRi
	.section	.rodata.str1.1
.LC7:
	.string	"wb"
.LC8:
	.string	"Couldn't open file for output.\n"
.LC9:
	.string	"P6\n%d %d\n%d\n"
.LC10:
	.string	"Error writing file.\n"
	.text
	.globl	_Z11writeOutImgPKcRK5Imagei
	.type	_Z11writeOutImgPKcRK5Imagei, @function
_Z11writeOutImgPKcRK5Imagei:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	leaq	.LC7(%rip), %rsi
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	call	fopen@PLT
	movl	12(%rsp), %r9d
	leaq	.LC8(%rip), %rsi
	testq	%rax, %rax
	je	.L20
	movl	4(%rbx), %r8d
	movl	(%rbx), %ecx
	movq	%rax, %rdi
	movq	%rax, %rbp
	leaq	.LC9(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	8(%rbx), %edx
	movq	24(%rbx), %rdi
	movq	%rbp, %rcx
	movl	$1, %esi
	call	fwrite@PLT
	movl	8(%rbx), %edx
	cmpq	%rax, %rdx
	je	.L17
	leaq	.LC10(%rip), %rsi
.L20:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L14
.L17:
	movq	%rbp, %rdi
	call	fclose@PLT
	xorl	%eax, %eax
.L14:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z11writeOutImgPKcRK5Imagei, .-_Z11writeOutImgPKcRK5Imagei
	.globl	_Z13rotate_90_CPUPhS_ii
	.type	_Z13rotate_90_CPUPhS_ii, @function
_Z13rotate_90_CPUPhS_ii:
.LFB2038:
	.cfi_startproc
	endbr64
	leal	-1(%rdx), %eax
	movq	%rsi, %r8
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r9
	leal	(%rax,%rax,2), %eax
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leal	(%rdx,%rdx,2), %ebx
	movl	%ecx, %edi
	cltq
	movl	%edx, %esi
	movslq	%ebx, %rbx
	xorl	%r10d, %r10d
	leaq	(%r8,%rax), %rcx
	xorl	%r11d, %r11d
.L22:
	cmpl	%esi, %r11d
	jge	.L21
	leal	(%r10,%r10,2), %eax
	movq	%rcx, %rdx
	xorl	%r8d, %r8d
	cltq
	addq	%r9, %rax
.L25:
	cmpl	%edi, %r8d
	jge	.L27
	movb	(%rax), %r14b
	incl	%r8d
	addq	$3, %rax
	movb	%r14b, (%rdx)
	movb	-2(%rax), %r14b
	movb	%r14b, 1(%rdx)
	movb	-1(%rax), %r14b
	movb	%r14b, 2(%rdx)
	addq	%rbx, %rdx
	jmp	.L25
.L27:
	incl	%r11d
	subq	$3, %rcx
	addl	%edi, %r10d
	jmp	.L22
.L21:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	_Z13rotate_90_CPUPhS_ii, .-_Z13rotate_90_CPUPhS_ii
	.globl	_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii
	.type	_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii, @function
_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16rotate_90_serialPhS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii, .-_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii
	.globl	_Z16rotate_90_serialPhS_ii
	.type	_Z16rotate_90_serialPhS_ii, @function
_Z16rotate_90_serialPhS_ii:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii
	.cfi_endproc
.LFE2065:
	.size	_Z16rotate_90_serialPhS_ii, .-_Z16rotate_90_serialPhS_ii
	.globl	_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii
	.type	_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii, @function
_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z30rotate_90_parallel_per_elementPhS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L33:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii, .-_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii
	.globl	_Z30rotate_90_parallel_per_elementPhS_ii
	.type	_Z30rotate_90_parallel_per_elementPhS_ii, @function
_Z30rotate_90_parallel_per_elementPhS_ii:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii
	.cfi_endproc
.LFE2067:
	.size	_Z30rotate_90_parallel_per_elementPhS_ii, .-_Z30rotate_90_parallel_per_elementPhS_ii
	.globl	_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij
	.type	_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij, @function
_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z36rotate_90_parallel_per_element_tiledPhS_iij(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L38:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij, .-_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij
	.globl	_Z36rotate_90_parallel_per_element_tiledPhS_iij
	.type	_Z36rotate_90_parallel_per_element_tiledPhS_iij, @function
_Z36rotate_90_parallel_per_element_tiledPhS_iij:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij
	.cfi_endproc
.LFE2069:
	.size	_Z36rotate_90_parallel_per_element_tiledPhS_iij, .-_Z36rotate_90_parallel_per_element_tiledPhS_iij
	.globl	_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij
	.type	_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij, @function
_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L43:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij, .-_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij
	.globl	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.type	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij, @function
_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij:
.LFB2071:
	.cfi_startproc
	endbr64
	jmp	_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij
	.cfi_endproc
.LFE2071:
	.size	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij, .-_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.section	.rodata.str1.1
.LC11:
	.string	"Usage: exec filename kernel\n"
.LC12:
	.string	"CUDA ERROR %d\n"
.LC14:
	.string	"One thread per pixel - tiled (16 X 16)"
.LC16:
	.string	"One thread per matrix element - tiled (16x16) - no shared mem conflict"
.LC17:
	.string	"Choose a kernel between 1 and 4"
.LC18:
	.string	"\nRotating Image \"%s\" with Height = %d and Width = %d.\nUsing kernel %d: %s\nElapsed time: %g ms.\n\n"
.LC19:
	.string	"rotated.ppm"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2039:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA2039
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$232, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L49
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
.LEHB0:
	call	__printf_chk@PLT
	jmp	.L85
.L49:
	xorl	%eax, %eax
	leaq	-156(%rbp), %rdi
	movq	8(%rsi), %r14
	movq	%rsi, %r12
	movl	$25, %ecx
	leaq	-192(%rbp), %r13
	rep stosl
	movq	16(%rsi), %rdi
	call	atoi@PLT
	leaq	-208(%rbp), %rdi
	movl	%eax, %ebx
	call	cudaEventCreate@PLT
	leaq	-200(%rbp), %rdi
	call	cudaEventCreate@PLT
.LEHE0:
	leaq	-156(%rbp), %rax
	movq	%r13, %rsi
	movq	%r14, %rdi
	leaq	-252(%rbp), %rdx
	movq	%rax, %r15
.LEHB1:
	call	_Z10readInpImgPKcR5ImageRi
	testl	%eax, %eax
	je	.L50
.L85:
	movl	$1, %edi
	jmp	.L107
.L50:
	movl	-184(%rbp), %r14d
	movq	%r14, %rdi
	call	malloc@PLT
	leaq	-248(%rbp), %rdi
	movq	%r14, %rsi
	movq	%rax, -168(%rbp)
	call	cudaMalloc@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L51
.L53:
	movl	-184(%rbp), %esi
	leaq	-240(%rbp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L54
	jmp	.L56
.L51:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L53
.L54:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L56:
	movl	-184(%rbp), %edx
	movq	-176(%rbp), %rsi
	movl	$1, %ecx
	movq	-248(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	je	.L64
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L64:
	cmpl	$3, %ebx
	je	.L58
	jg	.L59
	cmpl	$1, %ebx
	je	.L60
	cmpl	$2, %ebx
	je	.L61
	jmp	.L62
.L59:
	cmpl	$4, %ebx
	je	.L63
	jmp	.L62
.L60:
	movabsq	$7286943362722194771, %rax
	movq	-208(%rbp), %rdi
	movabsq	$7957695015493526904, %rdx
	movq	%rax, -156(%rbp)
	movabsq	$24013639437414176, %rax
	movq	%rdx, -148(%rbp)
	movq	%rax, -140(%rbp)
	call	_ZN8GpuTimer5StartEv.isra.0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, -212(%rbp)
	movq	%rdi, %rdx
	movq	%rdi, -220(%rbp)
	movq	%rdi, -232(%rbp)
	movl	$1, -224(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movl	-192(%rbp), %ecx
	movl	-188(%rbp), %edx
	movq	-240(%rbp), %rsi
	movq	-248(%rbp), %rdi
	call	_Z40__device_stub__Z16rotate_90_serialPhS_iiPhS_ii
	jmp	.L82
.L61:
	cvtsi2ssl	-192(%rbp), %xmm0
	mulss	.LC13(%rip), %xmm0
	movabsq	$7310019993144749647, %rax
	movabsq	$8079583511501104225, %rdx
	movq	%rax, -156(%rbp)
	movabsq	$30510865324187762, %rax
	movq	%rdx, -148(%rbp)
	movq	%rax, -143(%rbp)
	call	ceilf@PLT
	movss	%xmm0, -260(%rbp)
	cvtsi2ssl	-188(%rbp), %xmm0
	mulss	.LC13(%rip), %xmm0
	call	ceilf@PLT
	movss	-260(%rbp), %xmm1
	movq	-208(%rbp), %rdi
	movl	$1, -224(%rbp)
	movl	$1, -212(%rbp)
	cvttss2siq	%xmm0, %rax
	movl	%eax, -232(%rbp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, -228(%rbp)
	movabsq	$137438953504, %rax
	movq	%rax, -220(%rbp)
	call	_ZN8GpuTimer5StartEv.isra.0
	movl	-212(%rbp), %ecx
	movq	-220(%rbp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	-232(%rbp), %rdi
	movl	-224(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movl	-192(%rbp), %ecx
	movl	-188(%rbp), %edx
	movq	-240(%rbp), %rsi
	movq	-248(%rbp), %rdi
	call	_Z54__device_stub__Z30rotate_90_parallel_per_elementPhS_iiPhS_ii
	jmp	.L82
.L58:
	cvtsi2ssl	-192(%rbp), %xmm0
	mulss	.LC15(%rip), %xmm0
	leaq	.LC14(%rip), %rsi
	movq	%r15, %rdi
	movl	$39, %ecx
	rep movsb
	call	ceilf@PLT
	movss	%xmm0, -260(%rbp)
	cvtsi2ssl	-188(%rbp), %xmm0
	mulss	.LC15(%rip), %xmm0
	call	ceilf@PLT
	movss	-260(%rbp), %xmm1
	movq	-208(%rbp), %rdi
	movl	$1, -224(%rbp)
	movl	$1, -212(%rbp)
	cvttss2siq	%xmm0, %rax
	movl	%eax, -232(%rbp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, -228(%rbp)
	movabsq	$68719476752, %rax
	movq	%rax, -220(%rbp)
	call	_ZN8GpuTimer5StartEv.isra.0
	movl	-212(%rbp), %ecx
	movq	-220(%rbp), %rdx
	xorl	%r9d, %r9d
	movl	$768, %r8d
	movq	-232(%rbp), %rdi
	movl	-224(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movl	-192(%rbp), %ecx
	movl	-188(%rbp), %edx
	movl	$16, %r8d
	movq	-240(%rbp), %rsi
	movq	-248(%rbp), %rdi
	call	_Z61__device_stub__Z36rotate_90_parallel_per_element_tiledPhS_iijPhS_iij
	jmp	.L82
.L63:
	cvtsi2ssl	-192(%rbp), %xmm0
	mulss	.LC15(%rip), %xmm0
	leaq	.LC16(%rip), %rsi
	movq	%r15, %rdi
	movl	$71, %ecx
	rep movsb
	call	ceilf@PLT
	movss	%xmm0, -260(%rbp)
	cvtsi2ssl	-188(%rbp), %xmm0
	mulss	.LC15(%rip), %xmm0
	call	ceilf@PLT
	movss	-260(%rbp), %xmm1
	movq	-208(%rbp), %rdi
	movl	$1, -224(%rbp)
	movl	$1, -212(%rbp)
	cvttss2siq	%xmm0, %rax
	movl	%eax, -232(%rbp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, -228(%rbp)
	movabsq	$68719476752, %rax
	movq	%rax, -220(%rbp)
	call	_ZN8GpuTimer5StartEv.isra.0
	movl	-212(%rbp), %ecx
	movq	-220(%rbp), %rdx
	xorl	%r9d, %r9d
	movl	$816, %r8d
	movq	-232(%rbp), %rdi
	movl	-224(%rbp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	je	.L80
.L82:
	movq	-200(%rbp), %rdi
	call	_ZN8GpuTimer4StopEv.isra.0
	jmp	.L118
.L80:
	movl	-192(%rbp), %ecx
	movl	-188(%rbp), %edx
	movl	$16, %r8d
	movq	-240(%rbp), %rsi
	movq	-248(%rbp), %rdi
	call	_Z68__device_stub__Z43rotate_90_parallel_per_element_tiled_paddedPhS_iijPhS_iij
	jmp	.L82
.L118:
	movl	-184(%rbp), %edx
	movq	-240(%rbp), %rsi
	movl	$2, %ecx
	movq	-168(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	je	.L73
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L73
.L62:
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L85
.L73:
	movq	-200(%rbp), %rdi
	call	cudaEventSynchronize@PLT
	movq	-200(%rbp), %rdx
	movq	-208(%rbp), %rsi
	leaq	-220(%rbp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	8(%r12), %rdx
	pushq	%rcx
	movl	%ebx, %r9d
	leaq	.LC18(%rip), %rsi
	pushq	%r15
	movl	-192(%rbp), %r8d
	movl	$2, %edi
	movb	$1, %al
	movl	-188(%rbp), %ecx
	cvtss2sd	-220(%rbp), %xmm0
	.cfi_escape 0x2e,0x10
	call	__printf_chk@PLT
	popq	%rax
	popq	%rdx
	leaq	.LC19(%rip), %rdi
	movq	%r13, %rsi
	movl	-192(%rbp), %edx
	movl	-188(%rbp), %eax
	movl	%edx, -188(%rbp)
	movl	-252(%rbp), %edx
	movl	%eax, -192(%rbp)
	.cfi_escape 0x2e,0
	call	_Z11writeOutImgPKcRK5Imagei
	testl	%eax, %eax
	jne	.L85
	movq	-176(%rbp), %rdi
	call	free@PLT
	movq	-168(%rbp), %rdi
	call	free@PLT
	movq	-248(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L86
.L88:
	movq	-240(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edx
	testl	%eax, %eax
	jne	.L89
	jmp	.L90
.L86:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L88
.L89:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.LEHE1:
.L90:
	xorl	%edi, %edi
.L107:
	call	exit@PLT
.L94:
	endbr64
	movq	%rax, %rbx
.L91:
	movq	-208(%rbp), %rdi
	call	cudaEventDestroy@PLT
	movq	-200(%rbp), %rdi
	call	cudaEventDestroy@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L92
	call	__stack_chk_fail@PLT
.L92:
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
	.cfi_endproc
.LFE2039:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA2039:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE2039-.LLSDACSB2039
.LLSDACSB2039:
	.uleb128 .LEHB0-.LFB2039
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB2039
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L94-.LFB2039
	.uleb128 0
	.uleb128 .LEHB2-.LFB2039
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE2039:
	.section	.text.startup
	.size	main, .-main
	.section	.rodata.str1.1
.LC22:
	.string	"_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij"
.LC23:
	.string	"_Z36rotate_90_parallel_per_element_tiledPhS_iij"
.LC24:
	.string	"_Z30rotate_90_parallel_per_elementPhS_ii"
.LC25:
	.string	"_Z16rotate_90_serialPhS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2073:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z36rotate_90_parallel_per_element_tiledPhS_iij(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z30rotate_90_parallel_per_elementPhS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16rotate_90_serialPhS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2073:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC13:
	.long	1023410176
	.align 4
.LC15:
	.long	1031798784
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define CHECK(e) { int res = (e); if (res) printf("CUDA ERROR %d\n", res); }
#define CHANNEL 3

// Struct for measuring performance
struct GpuTimer{
	hipEvent_t start;
	hipEvent_t stop;

	GpuTimer(){
		hipEventCreate(&start);
		hipEventCreate(&stop);
	}

	~GpuTimer(){
		hipEventDestroy(start);
		hipEventDestroy(stop);
	}

	void Start(){
		hipEventRecord(start, 0);
	}

	void Stop(){
		hipEventRecord(stop, 0);
	}

	float Elapsed(){
		float elapsed;
		hipEventSynchronize(stop);
		hipEventElapsedTime(&elapsed, start, stop);
		return elapsed;
	}
};

struct Image {
	int width;
	int height;
	unsigned int bytes;
	unsigned char *img;
	unsigned char *dev_img;
};

// Reads a color ppm image file and saves the data in the provided Image structure. 
// The max_col_val is set to the value read from the input file.
// This is used later for writing the output image. 
int readInpImg(const char * fname, Image & source, int & max_col_val) {
	FILE *src;
	if (!(src = fopen(fname, "rb"))){
		printf("Couldn't open file %s for reading.\n", fname);
		return 1;
	}
	char p, s;
	fscanf(src, "%c%c\n", &p, &s);
	if (p != 'P' || s != '6'){	// Is it a valid format?
		printf("Not a valid PPM file (%c %c)\n", p, s);
		exit(1);
	}
	fscanf(src, "%d %d\n", &source.width, &source.height);
	fscanf(src, "%d\n", &max_col_val);
	int pixels = source.width * source.height;
	source.bytes = pixels * CHANNEL;  // CHANNEL = 3 => colored image with r, g, and b channels 
	source.img = (unsigned char *)malloc(source.bytes);
	if (fread(source.img, sizeof(unsigned char), source.bytes, src) != source.bytes){
		printf("Error reading file.\n");
		exit(1);
	}
	fclose(src);
	return 0;
}

// Write a color ppm image into a file.  
// Image structure represents the image in the memory. 
int writeOutImg(const char * fname, const Image & rotated, const int max_col_val) {
	FILE *out;
	if (!(out = fopen(fname, "wb"))){
		printf("Couldn't open file for output.\n");
		return 1;
	}
	fprintf(out, "P6\n%d %d\n%d\n", rotated.width, rotated.height, max_col_val);
	if (fwrite(rotated.dev_img, sizeof(unsigned char), rotated.bytes, out) != rotated.bytes){
		printf("Error writing file.\n");
		return 1;
	}
	fclose(out);
	return 0;
}

// To be launched on CPU
void rotate_90_CPU(unsigned char in[], unsigned char out[], int height, int width) {
	for (int i = 0; i < height; i++) {
		for (int j = 0; j < width; j++) {
			int index_in = i * width * CHANNEL + j * CHANNEL;
			int index_out = j * height * CHANNEL + height * CHANNEL - (i + 1) * CHANNEL;
			out[index_out] = in[index_in];
			out[index_out + 1] = in[index_in + 1];
			out[index_out + 2] = in[index_in + 2];
		}
	}
}

// To be launched on a single thread
__global__ void rotate_90_serial(unsigned char in[], unsigned char out[], int height, int width) {
	for (int i = 0; i < height; i++) {
		for (int j = 0; j < width; j++) {
			int index_in = i * width * CHANNEL + j * CHANNEL;
			int index_out = j * height * CHANNEL + height * CHANNEL - (i + 1) * CHANNEL;
			out[index_out] = in[index_in];
			out[index_out + 1] = in[index_in + 1];
			out[index_out + 2] = in[index_in + 2];
		}
	}
}

// To be launched with one thread per element
__global__ void rotate_90_parallel_per_element(unsigned char in[], unsigned char out[], int height, int width) {
	int i = blockIdx.x*blockDim.x + threadIdx.x;
	int j = blockIdx.y*blockDim.y + threadIdx.y;
	int index_in = i * width * CHANNEL + j * CHANNEL;
	int index_out = j * height * CHANNEL + height * CHANNEL - (i + 1) * CHANNEL;
	int image_size = height * width * CHANNEL;
	if(index_in < image_size && index_in >= 0 && index_out < image_size && index_out >= 0){
		out[index_out] = in[index_in];
		out[index_out + 1] = in[index_in + 1];
		out[index_out + 2] = in[index_in + 2];
	}
}

// To be launched with one thread per element. Thread blocks read & write tiles in coalesced fashion.
__global__ void rotate_90_parallel_per_element_tiled(unsigned char in[], unsigned char out[], int height, int width, unsigned int tile_size) {
	// (i,j) locations of the tile corners for input & output matrices:
	int in_corner_i = blockIdx.x * tile_size, in_corner_j = blockIdx.y * tile_size * CHANNEL;
	int out_corner_i = blockIdx.y * tile_size * CHANNEL, out_corner_j = blockIdx.x * tile_size;
	int x = threadIdx.x, y = threadIdx.y;
	int index_tile = x * (tile_size)*CHANNEL + y * CHANNEL;
	int index_in = in_corner_i * width * CHANNEL + x * width *CHANNEL + in_corner_j + y * CHANNEL;
	int image_size = height * width * CHANNEL;
	int total_tile_size = tile_size * tile_size * CHANNEL;
	extern __shared__ unsigned char tile[];
	// Coalesced read from global mem, rotated write into shared mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_in < image_size  && index_in >= 0){
		tile[index_tile] = in[index_in];
		tile[index_tile+1] = in[index_in+1];
		tile[index_tile+2] = in[index_in+2];
	}

	__syncthreads();
	int index_out = out_corner_i*height + y * height * CHANNEL + height * CHANNEL - (x+1) * CHANNEL - out_corner_j * CHANNEL;
	// Read from shared mem, coalesced write to global mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_out < image_size && index_out >= 0 && index_in < image_size  && index_in >= 0){
		out[index_out] = tile[index_tile];
		out[index_out + 1] = tile[index_tile + 1];
		out[index_out + 2] = tile[index_tile + 2];
	}

}

// To be launched with one thread per element. Thread blocks read & write tiles in coalesced fashion.
// Shared memory array padded to avoid bank conflicts.
__global__ void rotate_90_parallel_per_element_tiled_padded(unsigned char in[], unsigned char out[], int height, int width, unsigned int tile_size) {
	// (i,j) locations of the tile corners for input & output matrices:
	int in_corner_i = blockIdx.x * tile_size, in_corner_j = blockIdx.y * tile_size * CHANNEL;
	int out_corner_i = blockIdx.y * tile_size * CHANNEL, out_corner_j = blockIdx.x * tile_size;
	int x = threadIdx.x, y = threadIdx.y;
	int image_size = height * width * CHANNEL;
	int total_tile_size = tile_size * (tile_size + 1) * CHANNEL ;
	int index_tile = x * (tile_size + 1)*CHANNEL + y * CHANNEL;
	int index_in = in_corner_i * width * CHANNEL + x * width *CHANNEL + in_corner_j + y * CHANNEL;
	extern __shared__ unsigned char tile[];
	// coalesced read from global mem, rotated write into shared mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_in < image_size){
		tile[index_tile] = in[index_in];
		tile[index_tile+1] = in[index_in+1];
		tile[index_tile+2] = in[index_in+2];
	}
	__syncthreads();
	int index_out = out_corner_i*height + y * height * CHANNEL + height * CHANNEL - (x+1)*CHANNEL - out_corner_j*CHANNEL;
	// Read from shared mem, coalesced write to global mem:
	if(index_tile < total_tile_size && index_tile >= 0 && index_out < image_size && index_out >= 0 && index_in < image_size && index_in >=0 ){
		out[index_out] = tile[index_tile];
		out[index_out + 1] = tile[index_tile + 1];
		out[index_out + 2] = tile[index_tile + 2];
	}
}


int main(int argc, char **argv){
	if (argc != 3){
		printf("Usage: exec filename kernel\n");
		exit(1);
	}
	char *fname = argv[1];
	char kname[100] = ""; // kernel name
	int choice = atoi(argv[2]); // kernel choice
	Image source;
	int max_col_val;
	GpuTimer timer;
	unsigned char *d_in, *d_out;
	// Read the input file
	if (readInpImg(fname, source, max_col_val) != 0)  
		exit(1);
	source.dev_img = (unsigned char *)malloc(source.bytes);
	CHECK(hipMalloc(&d_in, source.bytes));
	CHECK(hipMalloc(&d_out, source.bytes));
	CHECK(hipMemcpy(d_in, source.img, source.bytes, hipMemcpyHostToDevice));
	// Run selected kernel
	switch (choice) {
	case 1: // Serial execution on GPU, i.e. creating ONLY ONE thread
		strcpy(kname, "Serial execution on GPU");
		timer.Start();
		rotate_90_serial <<<1, 1>>> (d_in, d_out, source.height, source.width);
		timer.Stop();
		CHECK(hipMemcpy(source.dev_img, d_out, source.bytes, hipMemcpyDeviceToHost));
		break;
	case 2: { // One thread per pixel
		strcpy(kname, "One thread per pixel");
		int k = 32;
		dim3 blocks(ceil((float)source.height / (float)k), ceil((float)source.width / (float)k));   // blocks per grid (using ceil in case height or width are not multiple of k)
		dim3 threads(k, k);	// threads per block
		timer.Start();
		rotate_90_parallel_per_element <<<blocks, threads>>> (d_in, d_out, source.height, source.width);
		timer.Stop();
		CHECK(hipMemcpy(source.dev_img, d_out, source.bytes, hipMemcpyDeviceToHost));
		break;
	}
	case 3: { // One thread per pixel - tiled (16 X 16)
		strcpy(kname, "One thread per pixel - tiled (16 X 16)");
		int k = 16; // tile size is k x k
		unsigned int shmem_size = k * k * CHANNEL * sizeof(unsigned char);
		dim3 blocks(ceil((float)source.height / (float)k), ceil((float)source.width / (float)k));   // blocks per grid 
		dim3 threads(k, k);	// threads per block
		timer.Start();
		rotate_90_parallel_per_element_tiled <<<blocks, threads, shmem_size>>> (d_in, d_out, source.height, source.width, k);
		timer.Stop();
		CHECK(hipMemcpy(source.dev_img, d_out, source.bytes, hipMemcpyDeviceToHost));
		break;
	}
	case 4: { // One thread per matrix element - tiled (16x16) - no shared mem conflict
		strcpy(kname, "One thread per matrix element - tiled (16x16) - no shared mem conflict");
		int k = 16; // tile size is k x k
		dim3 blocks(ceil((float)source.height / (float)k), ceil((float)source.width / (float)k));   // blocks per grid
		dim3 threads(k, k);	// threads per block
		unsigned int shmem_size = k * (k+1) * CHANNEL * sizeof(unsigned char);
		timer.Start();
		rotate_90_parallel_per_element_tiled_padded <<<blocks, threads, shmem_size>>> (d_in, d_out, source.height, source.width, k);
		timer.Stop();
		CHECK(hipMemcpy(source.dev_img, d_out, source.bytes, hipMemcpyDeviceToHost));
		break;
	}
	default:
		printf("Choose a kernel between 1 and 4");
		exit(1);
	}
	printf("\nRotating Image \"%s\" with Height = %d and Width = %d.\nUsing kernel %d: %s\nElapsed time: %g ms.\n\n", argv[1],
		source.height, source.width, choice, kname, timer.Elapsed());
	// Swap height and width for the rotated image
	int temp = source.height;
	source.height = source.width;
	source.width = temp;
	// Write the output file
	if (writeOutImg("rotated.ppm", source, max_col_val) != 0) // For demonstration, the input file is written to a new file named "rotated.ppm" 
		exit(1);
	// free up the allocated memory
	free(source.img);
	free(source.dev_img);
	CHECK(hipFree(d_in));
	CHECK(hipFree(d_out));
	exit(0);
}
	.text
	.file	"rotate_img.hip"
	.globl	_Z10readInpImgPKcR5ImageRi      # -- Begin function _Z10readInpImgPKcR5ImageRi
	.type	_Z10readInpImgPKcR5ImageRi,@function
_Z10readInpImgPKcR5ImageRi:             # @_Z10readInpImgPKcR5ImageRi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r15
	movq	%rsi, %rbx
	movq	%rdi, %r12
	movl	$.L.str, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB0_5
# %bb.1:
	movq	%rax, %r14
	leaq	7(%rsp), %r12
	leaq	6(%rsp), %r13
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	movq	%r12, %rdx
	movq	%r13, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movsbl	(%r12), %esi
	movb	(%r13), %al
	cmpl	$80, %esi
	jne	.LBB0_7
# %bb.2:
	cmpb	$54, %al
	jne	.LBB0_7
# %bb.3:
	leaq	4(%rbx), %rcx
	xorl	%ebp, %ebp
	movl	$.L.str.4, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%rbx), %eax
	imull	4(%rbx), %eax
	leal	(%rax,%rax,2), %r15d
	movl	%r15d, 8(%rbx)
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 16(%rbx)
	movl	$1, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	fread
	movl	8(%rbx), %ecx
	cmpq	%rcx, %rax
	jne	.LBB0_8
# %bb.4:
	movq	%r14, %rdi
	callq	fclose
	jmp	.LBB0_6
.LBB0_5:
	movl	$.L.str.1, %edi
	movq	%r12, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebp
.LBB0_6:
	movl	%ebp, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_7:
	.cfi_def_cfa_offset 64
	movsbl	%al, %edx
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB0_9
.LBB0_8:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB0_9:
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z10readInpImgPKcR5ImageRi, .Lfunc_end0-_Z10readInpImgPKcR5ImageRi
	.cfi_endproc
                                        # -- End function
	.globl	_Z11writeOutImgPKcRK5Imagei     # -- Begin function _Z11writeOutImgPKcRK5Imagei
	.type	_Z11writeOutImgPKcRK5Imagei,@function
_Z11writeOutImgPKcRK5Imagei:            # @_Z11writeOutImgPKcRK5Imagei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r15d
	movq	%rsi, %rbx
	movl	$.L.str.7, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_1
# %bb.3:
	movq	%rax, %r14
	movl	(%rbx), %edx
	movl	4(%rbx), %ecx
	xorl	%ebp, %ebp
	movl	$.L.str.9, %esi
	movq	%rax, %rdi
	movl	%r15d, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movq	24(%rbx), %rdi
	movl	8(%rbx), %edx
	movl	$1, %esi
	movq	%r14, %rcx
	callq	fwrite
	movl	8(%rbx), %ecx
	cmpq	%rcx, %rax
	jne	.LBB1_4
# %bb.5:
	movq	%r14, %rdi
	callq	fclose
	jmp	.LBB1_6
.LBB1_1:
	movl	$.Lstr.1, %edi
	jmp	.LBB1_2
.LBB1_4:
	movl	$.Lstr.2, %edi
.LBB1_2:
	callq	puts@PLT
	movl	$1, %ebp
.LBB1_6:
	movl	%ebp, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z11writeOutImgPKcRK5Imagei, .Lfunc_end1-_Z11writeOutImgPKcRK5Imagei
	.cfi_endproc
                                        # -- End function
	.globl	_Z13rotate_90_CPUPhS_ii         # -- Begin function _Z13rotate_90_CPUPhS_ii
	.type	_Z13rotate_90_CPUPhS_ii,@function
_Z13rotate_90_CPUPhS_ii:                # @_Z13rotate_90_CPUPhS_ii
	.cfi_startproc
# %bb.0:
                                        # kill: def $ecx killed $ecx def $rcx
                                        # kill: def $edx killed $edx def $rdx
	testl	%edx, %edx
	jle	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %eax
	movl	%ecx, %r8d
	leal	(%rcx,%rcx,2), %r9d
	leal	(%rdx,%rdx,2), %r10d
	leal	(%rdx,%rdx,2), %edx
	addl	$-3, %edx
	xorl	%r11d, %r11d
	xorl	%ebx, %ebx
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	movl	%edx, %r14d
	movq	%r8, %r15
	movl	%r11d, %r12d
	testl	%ecx, %ecx
	jle	.LBB2_3
.LBB2_6:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	%r12d, %r12
	movb	(%rdi,%r12), %bpl
	movslq	%r14d, %r14
	movb	%bpl, (%rsi,%r14)
	movb	1(%rdi,%r12), %bpl
	movb	%bpl, 1(%rsi,%r14)
	movb	2(%rdi,%r12), %bpl
	movb	%bpl, 2(%rsi,%r14)
	addl	$3, %r12d
	addl	%r10d, %r14d
	decq	%r15
	jne	.LBB2_6
.LBB2_3:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rbx
	addl	%r9d, %r11d
	addl	$-3, %edx
	cmpq	%rax, %rbx
	jne	.LBB2_2
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB2_5:                                # %._crit_edge30
	retq
.Lfunc_end2:
	.size	_Z13rotate_90_CPUPhS_ii, .Lfunc_end2-_Z13rotate_90_CPUPhS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__rotate_90_serialPhS_ii # -- Begin function _Z31__device_stub__rotate_90_serialPhS_ii
	.type	_Z31__device_stub__rotate_90_serialPhS_ii,@function
_Z31__device_stub__rotate_90_serialPhS_ii: # @_Z31__device_stub__rotate_90_serialPhS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16rotate_90_serialPhS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__rotate_90_serialPhS_ii, .Lfunc_end3-_Z31__device_stub__rotate_90_serialPhS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii # -- Begin function _Z45__device_stub__rotate_90_parallel_per_elementPhS_ii
	.type	_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii,@function
_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii: # @_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z30rotate_90_parallel_per_elementPhS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii, .Lfunc_end4-_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij # -- Begin function _Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij
	.type	_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij,@function
_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij: # @_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z36rotate_90_parallel_per_element_tiledPhS_iij, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij, .Lfunc_end5-_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij
	.cfi_endproc
                                        # -- End function
	.globl	_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij # -- Begin function _Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.type	_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij,@function
_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij: # @_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij, .Lfunc_end6-_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x3d800000                      # float 0.0625
.LCPI7_1:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$184, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB7_1
# %bb.2:
	movq	%rsi, %r14
	movq	8(%rsi), %r15
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 160(%rsp)
	movaps	%xmm0, 144(%rsp)
	movaps	%xmm0, 128(%rsp)
	movaps	%xmm0, 112(%rsp)
	movaps	%xmm0, 96(%rsp)
	movaps	%xmm0, 80(%rsp)
	movl	$0, 176(%rsp)
	movq	16(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
.Ltmp0:
	leaq	16(%rsp), %rsi
	leaq	76(%rsp), %rdx
	movq	%r15, %rdi
	callq	_Z10readInpImgPKcR5ImageRi
.Ltmp1:
# %bb.3:
	testl	%eax, %eax
	jne	.LBB7_65
# %bb.4:
	movl	24(%rsp), %r15d
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)
.Ltmp2:
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
.Ltmp3:
# %bb.5:                                # %_ZL9hipMallocIhE10hipError_tPPT_m.exit
	testl	%eax, %eax
	je	.LBB7_7
# %bb.6:
	movl	$.L.str.12, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB7_7:
	movl	24(%rsp), %esi
.Ltmp5:
	leaq	8(%rsp), %rdi
	callq	hipMalloc
.Ltmp6:
# %bb.8:                                # %_ZL9hipMallocIhE10hipError_tPPT_m.exit110
	testl	%eax, %eax
	je	.LBB7_10
# %bb.9:
	movl	$.L.str.12, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB7_10:
	movq	48(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	24(%rsp), %edx
.Ltmp8:
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp9:
# %bb.11:
	testl	%eax, %eax
	je	.LBB7_13
# %bb.12:
	movl	$.L.str.12, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB7_13:
	leal	-1(%rbx), %eax
	cmpl	$3, %eax
	ja	.LBB7_64
# %bb.14:
	jmpq	*.LJTI7_0(,%rax,8)
.LBB7_15:
	movups	.L.str.13(%rip), %xmm0
	movaps	%xmm0, 80(%rsp)
	movabsq	$24013639437414176, %rax        # imm = 0x555047206E6F20
	movq	%rax, 96(%rsp)
	movq	56(%rsp), %rdi
.Ltmp47:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp48:
# %bb.16:                               # %_ZN8GpuTimer5StartEv.exit
.Ltmp49:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp50:
# %bb.17:
	testl	%eax, %eax
	jne	.LBB7_19
# %bb.18:
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	16(%rsp), %ecx
	movl	20(%rsp), %edx
.Ltmp51:
	callq	_Z31__device_stub__rotate_90_serialPhS_ii
.Ltmp52:
.LBB7_19:
	movq	64(%rsp), %rdi
.Ltmp53:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp54:
# %bb.20:                               # %_ZN8GpuTimer4StopEv.exit
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	24(%rsp), %edx
.Ltmp55:
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp56:
	jmp	.LBB7_21
.LBB7_1:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB7_65:
	movl	$1, %edi
	callq	exit
.LBB7_40:
	movups	.L.str.15+16(%rip), %xmm0
	movaps	%xmm0, 96(%rsp)
	movups	.L.str.15(%rip), %xmm0
	movaps	%xmm0, 80(%rsp)
	movabsq	$11600058669080630, %rax        # imm = 0x29363120582036
	movq	%rax, 111(%rsp)
	movl	16(%rsp), %ebp
	movl	20(%rsp), %r15d
	movq	56(%rsp), %rdi
.Ltmp23:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp24:
# %bb.41:                               # %_ZN8GpuTimer5StartEv.exit113
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	shlq	$32, %rdi
	orq	%r15, %rdi
.Ltmp25:
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$768, %r8d                      # imm = 0x300
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp26:
# %bb.42:
	testl	%eax, %eax
	jne	.LBB7_44
# %bb.43:
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	16(%rsp), %ecx
	movl	20(%rsp), %edx
.Ltmp27:
	movl	$16, %r8d
	callq	_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij
.Ltmp28:
.LBB7_44:
	movq	64(%rsp), %rdi
.Ltmp29:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp30:
# %bb.45:                               # %_ZN8GpuTimer4StopEv.exit114
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	24(%rsp), %edx
.Ltmp32:
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp33:
	jmp	.LBB7_21
.LBB7_47:
	leaq	80(%rsp), %rdi
	movl	$.L.str.16, %esi
	movl	$71, %edx
	callq	memcpy@PLT
	movl	16(%rsp), %ebp
	movl	20(%rsp), %r15d
	movq	56(%rsp), %rdi
.Ltmp11:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp12:
# %bb.48:                               # %_ZN8GpuTimer5StartEv.exit115
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	shlq	$32, %rdi
	orq	%r15, %rdi
.Ltmp13:
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$816, %r8d                      # imm = 0x330
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp14:
# %bb.49:
	testl	%eax, %eax
	jne	.LBB7_51
# %bb.50:
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	16(%rsp), %ecx
	movl	20(%rsp), %edx
.Ltmp15:
	movl	$16, %r8d
	callq	_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij
.Ltmp16:
.LBB7_51:
	movq	64(%rsp), %rdi
.Ltmp17:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp18:
# %bb.52:                               # %_ZN8GpuTimer4StopEv.exit116
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	24(%rsp), %edx
.Ltmp20:
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp21:
	jmp	.LBB7_21
.LBB7_33:
	movups	.L.str.14(%rip), %xmm0
	movaps	%xmm0, 80(%rsp)
	movabsq	$30510865324187762, %rax        # imm = 0x6C657869702072
	movq	%rax, 93(%rsp)
	movl	16(%rsp), %ebp
	movl	20(%rsp), %r15d
	movq	56(%rsp), %rdi
.Ltmp35:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp36:
# %bb.34:                               # %_ZN8GpuTimer5StartEv.exit111
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI7_1(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %r15d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI7_1(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	shlq	$32, %rdi
	orq	%r15, %rdi
.Ltmp37:
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp38:
# %bb.35:
	testl	%eax, %eax
	jne	.LBB7_37
# %bb.36:
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	16(%rsp), %ecx
	movl	20(%rsp), %edx
.Ltmp39:
	callq	_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii
.Ltmp40:
.LBB7_37:
	movq	64(%rsp), %rdi
.Ltmp41:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp42:
# %bb.38:                               # %_ZN8GpuTimer4StopEv.exit112
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	24(%rsp), %edx
.Ltmp44:
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp45:
.LBB7_21:
	testl	%eax, %eax
	je	.LBB7_23
# %bb.22:                               # %.sink.split
	movl	$.L.str.12, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB7_23:
	movq	8(%r14), %r14
	movl	16(%rsp), %ebp
	movl	20(%rsp), %r15d
.Ltmp58:
	leaq	56(%rsp), %rdi
	callq	_ZN8GpuTimer7ElapsedEv
.Ltmp59:
# %bb.24:
	cvtss2sd	%xmm0, %xmm0
	leaq	80(%rsp), %r9
	movl	$.L.str.18, %edi
	movq	%r14, %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	movb	$1, %al
	callq	printf
	leaq	16(%rsp), %rsi
	rolq	$32, (%rsi)
	movl	76(%rsp), %edx
	movl	$.L.str.19, %edi
	callq	_Z11writeOutImgPKcRK5Imagei
	testl	%eax, %eax
	jne	.LBB7_65
# %bb.25:
	movq	32(%rsp), %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	free
	movq	48(%rsp), %rdi
.Ltmp61:
	callq	hipFree
.Ltmp62:
# %bb.26:
	testl	%eax, %eax
	je	.LBB7_28
# %bb.27:
	movl	$.L.str.12, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB7_28:
	movq	8(%rsp), %rdi
.Ltmp64:
	callq	hipFree
.Ltmp65:
# %bb.29:
	testl	%eax, %eax
	je	.LBB7_31
# %bb.30:
	movl	$.L.str.12, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB7_31:
	xorl	%edi, %edi
	callq	exit
.LBB7_64:
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB7_65
.LBB7_55:
.Ltmp66:
	jmp	.LBB7_57
.LBB7_54:
.Ltmp63:
	jmp	.LBB7_57
.LBB7_39:
.Ltmp46:
	jmp	.LBB7_57
.LBB7_32:
.Ltmp57:
	jmp	.LBB7_57
.LBB7_53:
.Ltmp22:
	jmp	.LBB7_57
.LBB7_46:
.Ltmp34:
	jmp	.LBB7_57
.LBB7_61:
.Ltmp43:
	jmp	.LBB7_57
.LBB7_63:
.Ltmp19:
	jmp	.LBB7_57
.LBB7_62:
.Ltmp31:
	jmp	.LBB7_57
.LBB7_60:
.Ltmp10:
	jmp	.LBB7_57
.LBB7_59:
.Ltmp7:
	jmp	.LBB7_57
.LBB7_58:
.Ltmp4:
	jmp	.LBB7_57
.LBB7_56:
.Ltmp60:
.LBB7_57:
	movq	%rax, %rbx
	leaq	56(%rsp), %rdi
	callq	_ZN8GpuTimerD2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI7_0:
	.quad	.LBB7_15
	.quad	.LBB7_33
	.quad	.LBB7_40
	.quad	.LBB7_47
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table7:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp60-.Lfunc_begin0          #     jumps to .Ltmp60
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp2-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp2                  #   Call between .Ltmp2 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp5                  #   Call between .Ltmp5 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp54-.Ltmp47                #   Call between .Ltmp47 and .Ltmp54
	.uleb128 .Ltmp60-.Lfunc_begin0          #     jumps to .Ltmp60
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp55-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp56-.Ltmp55                #   Call between .Ltmp55 and .Ltmp56
	.uleb128 .Ltmp57-.Lfunc_begin0          #     jumps to .Ltmp57
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp24-.Ltmp23                #   Call between .Ltmp23 and .Ltmp24
	.uleb128 .Ltmp31-.Lfunc_begin0          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp25-.Ltmp24                #   Call between .Ltmp24 and .Ltmp25
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp30-.Ltmp25                #   Call between .Ltmp25 and .Ltmp30
	.uleb128 .Ltmp31-.Lfunc_begin0          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp33-.Ltmp32                #   Call between .Ltmp32 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin0          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp11-.Ltmp33                #   Call between .Ltmp33 and .Ltmp11
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp12-.Ltmp11                #   Call between .Ltmp11 and .Ltmp12
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp18-.Ltmp13                #   Call between .Ltmp13 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp21-.Ltmp20                #   Call between .Ltmp20 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin0          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin0          # >> Call Site 17 <<
	.uleb128 .Ltmp36-.Ltmp35                #   Call between .Ltmp35 and .Ltmp36
	.uleb128 .Ltmp43-.Lfunc_begin0          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 18 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp37-.Lfunc_begin0          # >> Call Site 19 <<
	.uleb128 .Ltmp42-.Ltmp37                #   Call between .Ltmp37 and .Ltmp42
	.uleb128 .Ltmp43-.Lfunc_begin0          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin0          # >> Call Site 20 <<
	.uleb128 .Ltmp45-.Ltmp44                #   Call between .Ltmp44 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin0          # >> Call Site 21 <<
	.uleb128 .Ltmp59-.Ltmp58                #   Call between .Ltmp58 and .Ltmp59
	.uleb128 .Ltmp60-.Lfunc_begin0          #     jumps to .Ltmp60
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp61-.Lfunc_begin0          # >> Call Site 22 <<
	.uleb128 .Ltmp62-.Ltmp61                #   Call between .Ltmp61 and .Ltmp62
	.uleb128 .Ltmp63-.Lfunc_begin0          #     jumps to .Ltmp63
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp64-.Lfunc_begin0          # >> Call Site 23 <<
	.uleb128 .Ltmp65-.Ltmp64                #   Call between .Ltmp64 and .Ltmp65
	.uleb128 .Ltmp66-.Lfunc_begin0          #     jumps to .Ltmp66
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin0          # >> Call Site 24 <<
	.uleb128 .Lfunc_end7-.Ltmp65            #   Call between .Ltmp65 and .Lfunc_end7
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN8GpuTimer7ElapsedEv,"axG",@progbits,_ZN8GpuTimer7ElapsedEv,comdat
	.weak	_ZN8GpuTimer7ElapsedEv          # -- Begin function _ZN8GpuTimer7ElapsedEv
	.p2align	1, 0x90
	.type	_ZN8GpuTimer7ElapsedEv,@function
_ZN8GpuTimer7ElapsedEv:                 # @_ZN8GpuTimer7ElapsedEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	8(%rdi), %rdi
	callq	hipEventSynchronize
	movq	(%rbx), %rsi
	movq	8(%rbx), %rdx
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZN8GpuTimer7ElapsedEv, .Lfunc_end8-_ZN8GpuTimer7ElapsedEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN8GpuTimerD2Ev,"axG",@progbits,_ZN8GpuTimerD2Ev,comdat
	.weak	_ZN8GpuTimerD2Ev                # -- Begin function _ZN8GpuTimerD2Ev
	.p2align	1, 0x90
	.type	_ZN8GpuTimerD2Ev,@function
_ZN8GpuTimerD2Ev:                       # @_ZN8GpuTimerD2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
.Ltmp67:
	callq	hipEventDestroy
.Ltmp68:
# %bb.1:
	movq	8(%rbx), %rdi
.Ltmp69:
	callq	hipEventDestroy
.Ltmp70:
# %bb.2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB9_3:
	.cfi_def_cfa_offset 16
.Ltmp71:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end9:
	.size	_ZN8GpuTimerD2Ev, .Lfunc_end9-_ZN8GpuTimerD2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN8GpuTimerD2Ev,"aG",@progbits,_ZN8GpuTimerD2Ev,comdat
	.p2align	2, 0x0
GCC_except_table9:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp67-.Lfunc_begin1          # >> Call Site 1 <<
	.uleb128 .Ltmp70-.Ltmp67                #   Call between .Ltmp67 and .Ltmp70
	.uleb128 .Ltmp71-.Lfunc_begin1          #     jumps to .Ltmp71
	.byte	1                               #   On action: 1
.Lcst_end1:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end10:
	.size	__clang_call_terminate, .Lfunc_end10-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16rotate_90_serialPhS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z30rotate_90_parallel_per_elementPhS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z36rotate_90_parallel_per_element_tiledPhS_iij, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"rb"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Couldn't open file %s for reading.\n"
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%c%c\n"
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Not a valid PPM file (%c %c)\n"
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d %d\n"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d\n"
	.size	.L.str.5, 4

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"wb"
	.size	.L.str.7, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"P6\n%d %d\n%d\n"
	.size	.L.str.9, 13

	.type	_Z16rotate_90_serialPhS_ii,@object # @_Z16rotate_90_serialPhS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z16rotate_90_serialPhS_ii
	.p2align	3, 0x0
_Z16rotate_90_serialPhS_ii:
	.quad	_Z31__device_stub__rotate_90_serialPhS_ii
	.size	_Z16rotate_90_serialPhS_ii, 8

	.type	_Z30rotate_90_parallel_per_elementPhS_ii,@object # @_Z30rotate_90_parallel_per_elementPhS_ii
	.globl	_Z30rotate_90_parallel_per_elementPhS_ii
	.p2align	3, 0x0
_Z30rotate_90_parallel_per_elementPhS_ii:
	.quad	_Z45__device_stub__rotate_90_parallel_per_elementPhS_ii
	.size	_Z30rotate_90_parallel_per_elementPhS_ii, 8

	.type	_Z36rotate_90_parallel_per_element_tiledPhS_iij,@object # @_Z36rotate_90_parallel_per_element_tiledPhS_iij
	.globl	_Z36rotate_90_parallel_per_element_tiledPhS_iij
	.p2align	3, 0x0
_Z36rotate_90_parallel_per_element_tiledPhS_iij:
	.quad	_Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij
	.size	_Z36rotate_90_parallel_per_element_tiledPhS_iij, 8

	.type	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij,@object # @_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.globl	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.p2align	3, 0x0
_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij:
	.quad	_Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.size	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij, 8

	.type	.L.str.12,@object               # @.str.12
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.12:
	.asciz	"CUDA ERROR %d\n"
	.size	.L.str.12, 15

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Serial execution on GPU"
	.size	.L.str.13, 24

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"One thread per pixel"
	.size	.L.str.14, 21

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"One thread per pixel - tiled (16 X 16)"
	.size	.L.str.15, 39

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"One thread per matrix element - tiled (16x16) - no shared mem conflict"
	.size	.L.str.16, 71

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Choose a kernel between 1 and 4"
	.size	.L.str.17, 32

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"\nRotating Image \"%s\" with Height = %d and Width = %d.\nUsing kernel %d: %s\nElapsed time: %g ms.\n\n"
	.size	.L.str.18, 97

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"rotated.ppm"
	.size	.L.str.19, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16rotate_90_serialPhS_ii"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z30rotate_90_parallel_per_elementPhS_ii"
	.size	.L__unnamed_2, 41

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z36rotate_90_parallel_per_element_tiledPhS_iij"
	.size	.L__unnamed_3, 48

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij"
	.size	.L__unnamed_4, 55

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error reading file."
	.size	.Lstr, 20

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Couldn't open file for output."
	.size	.Lstr.1, 31

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Error writing file."
	.size	.Lstr.2, 20

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Usage: exec filename kernel"
	.size	.Lstr.3, 28

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__rotate_90_serialPhS_ii
	.addrsig_sym _Z45__device_stub__rotate_90_parallel_per_elementPhS_ii
	.addrsig_sym _Z51__device_stub__rotate_90_parallel_per_element_tiledPhS_iij
	.addrsig_sym _Z58__device_stub__rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z16rotate_90_serialPhS_ii
	.addrsig_sym _Z30rotate_90_parallel_per_elementPhS_ii
	.addrsig_sym _Z36rotate_90_parallel_per_element_tiledPhS_iij
	.addrsig_sym _Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16rotate_90_serialPhS_ii ; -- Begin function _Z16rotate_90_serialPhS_ii
	.globl	_Z16rotate_90_serialPhS_ii
	.p2align	8
	.type	_Z16rotate_90_serialPhS_ii,@function
_Z16rotate_90_serialPhS_ii:             ; @_Z16rotate_90_serialPhS_ii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	s_cmp_gt_i32 s3, 0
	s_mul_i32 s8, s2, 3
	s_cselect_b32 s0, -1, 0
	s_mov_b32 s1, 0
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_mul_i32 s9, s3, 3
	s_add_i32 s10, s8, -3
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_mov_b32 s12, s10
	s_mov_b32 s13, s3
	s_mov_b32 s14, s1
	s_cbranch_vccnz .LBB0_4
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ashr_i32 s15, s14, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s4, s14
	s_addc_u32 s17, s5, s15
	s_ashr_i32 s15, s12, 31
	global_load_u8 v1, v0, s[16:17]
	s_add_u32 s18, s6, s12
	s_addc_u32 s19, s7, s15
	s_add_i32 s13, s13, -1
	s_add_i32 s14, s14, 3
	s_add_i32 s12, s12, s8
	s_cmp_eq_u32 s13, 0
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[18:19]
	global_load_u8 v1, v0, s[16:17] offset:1
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[18:19] offset:1
	global_load_u8 v1, v0, s[16:17] offset:2
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[18:19] offset:2
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s11, s11, 1
	s_add_i32 s1, s1, s9
	s_add_i32 s10, s10, -3
	s_cmp_eq_u32 s11, s2
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge32
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16rotate_90_serialPhS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16rotate_90_serialPhS_ii, .Lfunc_end0-_Z16rotate_90_serialPhS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 244
; NumSgprs: 22
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z30rotate_90_parallel_per_elementPhS_ii ; -- Begin function _Z30rotate_90_parallel_per_elementPhS_ii
	.globl	_Z30rotate_90_parallel_per_elementPhS_ii
	.p2align	8
	.type	_Z30rotate_90_parallel_per_elementPhS_ii,@function
_Z30rotate_90_parallel_per_elementPhS_ii: ; @_Z30rotate_90_parallel_per_elementPhS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
	v_mad_u64_u32 v[3:4], null, s14, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s2, v2, s[2:3]
	v_mad_u64_u32 v[4:5], null, v3, s3, v[2:3]
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_mul_i32 s3, s2, 3
	v_sub_nc_u32_e32 v2, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[0:1], null, v2, 3, -3
	v_lshl_add_u32 v1, v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	v_cmp_lt_i32_e64 s2, -1, v1
	v_cmp_gt_i32_e64 s3, s3, v0
	v_cmp_lt_i32_e64 s4, -1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	global_load_u8 v2, v1, s[0:1]
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v2, s[2:3]
	global_load_u8 v2, v1, s[0:1] offset:1
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v2, s[2:3] offset:1
	global_load_u8 v1, v1, s[0:1] offset:2
	s_waitcnt vmcnt(0)
	global_store_b8 v0, v1, s[2:3] offset:2
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z30rotate_90_parallel_per_elementPhS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z30rotate_90_parallel_per_elementPhS_ii, .Lfunc_end1-_Z30rotate_90_parallel_per_elementPhS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z36rotate_90_parallel_per_element_tiledPhS_iij ; -- Begin function _Z36rotate_90_parallel_per_element_tiledPhS_iij
	.globl	_Z36rotate_90_parallel_per_element_tiledPhS_iij
	.p2align	8
	.type	_Z36rotate_90_parallel_per_element_tiledPhS_iij,@function
_Z36rotate_90_parallel_per_element_tiledPhS_iij: ; @_Z36rotate_90_parallel_per_element_tiledPhS_iij
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s10, v[4:5]
	v_mad_u64_u32 v[0:1], null, s15, s10, v[5:6]
	v_mad_u64_u32 v[6:7], null, v4, s10, v[5:6]
	s_mul_i32 s0, s10, s10
	s_mul_i32 s1, s8, s9
	s_mul_i32 s0, s0, 3
	s_mul_i32 s1, s1, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, v2, s9, v[0:1]
	v_lshl_add_u32 v3, v6, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_gt_i32_e32 vcc_lo, s0, v3
	v_cmp_lt_i32_e64 s0, -1, v3
	v_lshl_add_u32 v4, v4, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_3
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s1, v4
	v_cmp_lt_i32_e64 s0, -1, v4
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_3
; %bb.2:
	s_clause 0x1
	global_load_u16 v1, v4, s[4:5]
	global_load_u8 v5, v4, s[4:5] offset:2
	v_add_nc_u32_e32 v6, 0, v3
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v7, 8, v1
	ds_store_b8 v6, v1
	ds_store_b8 v6, v7 offset:1
	s_waitcnt vmcnt(0)
	ds_store_b8 v6, v5 offset:2
.LBB2_3:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB2_7
; %bb.4:
	v_sub_nc_u32_e32 v1, s8, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v0, s8, v[1:2]
	v_mad_u64_u32 v[0:1], null, v5, 3, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s1, v0
	v_cmp_lt_i32_e64 s0, -1, v0
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_7
; %bb.5:
	v_cmp_gt_i32_e32 vcc_lo, s1, v4
	v_cmp_lt_i32_e64 s0, -1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_add_nc_u32_e32 v1, 0, v3
	ds_load_u8 v2, v1 offset:1
	ds_load_u8 v3, v1
	ds_load_u8 v1, v1 offset:2
	s_waitcnt lgkmcnt(2)
	v_lshlrev_b16 v2, 8, v2
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v2, v3, v2
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b8 v0, v1, s[6:7] offset:2
	global_store_b16 v0, v2, s[6:7]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z36rotate_90_parallel_per_element_tiledPhS_iij
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z36rotate_90_parallel_per_element_tiledPhS_iij, .Lfunc_end2-_Z36rotate_90_parallel_per_element_tiledPhS_iij
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 424
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij ; -- Begin function _Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.globl	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
	.p2align	8
	.type	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij,@function
_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij: ; @_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, v3, s10
	v_mad_u64_u32 v[0:1], null, s14, s10, v[3:4]
	s_add_i32 s0, s10, 1
	s_mul_i32 s2, s8, s9
	s_mul_i32 s0, s10, s0
	s_mul_i32 s2, s2, 3
	s_mul_i32 s0, s0, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s10, v[4:5]
	v_add3_u32 v2, v5, v3, v4
	v_mad_u64_u32 v[3:4], null, v0, s9, v[1:2]
	v_lshl_add_u32 v2, v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e64 s0, s0, v2
	v_lshl_add_u32 v3, v3, 1, v3
	v_cmp_lt_i32_e64 s1, -1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v3
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s1, vcc_lo
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_ashrrev_i32_e32 v5, 31, v3
	v_add_co_u32 v4, s0, s4, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
	s_clause 0x1
	global_load_u16 v6, v[4:5], off
	global_load_u8 v4, v[4:5], off offset:2
	v_add_nc_u32_e32 v5, 0, v2
	s_waitcnt vmcnt(1)
	v_lshrrev_b32_e32 v7, 8, v6
	ds_store_b8 v5, v6
	ds_store_b8 v5, v7 offset:1
	s_waitcnt vmcnt(0)
	ds_store_b8 v5, v4 offset:2
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB3_5
; %bb.3:
	v_sub_nc_u32_e32 v0, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v1, s8, v[0:1]
	v_mad_u64_u32 v[0:1], null, v4, 3, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s2, v0
	v_cmp_lt_i32_e64 s1, -1, v0
	v_cmp_lt_i32_e64 s2, -1, v3
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s2
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB3_5
; %bb.4:
	v_add_nc_u32_e32 v1, 0, v2
	ds_load_u8 v2, v1 offset:1
	ds_load_u8 v3, v1
	ds_load_u8 v1, v1 offset:2
	s_waitcnt lgkmcnt(2)
	v_lshlrev_b16 v2, 8, v2
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v2, v3, v2
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b8 v0, v1, s[6:7] offset:2
	global_store_b16 v0, v2, s[6:7]
.LBB3_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 28
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij, .Lfunc_end3-_Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 440
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16rotate_90_serialPhS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z16rotate_90_serialPhS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z30rotate_90_parallel_per_elementPhS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z30rotate_90_parallel_per_elementPhS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z36rotate_90_parallel_per_element_tiledPhS_iij
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z36rotate_90_parallel_per_element_tiledPhS_iij.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 28
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z43rotate_90_parallel_per_element_tiled_paddedPhS_iij.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
