#include <cuda_runtime.h>
#include <stdio.h>
#include "includes/kernel.cuh"
#include "includes/utils.cuh"

#define L1Func(I, x, y) (I)
#define L2Func(I, x, y) (powf(I, 2))
#define LxFunc(I, x, y) (x * I)
#define LyFunc(I, x, y) (y * I)

#define RowCumSum(name, func)                                                \
  __global__ void name(const float *image, float *rowCumSum, int colNumberM, \
                       int rowNum) {                                         \
    float sum = 0;                                                           \
    int xIndex = threadIdx.x + blockIdx.x * blockDim.x;                      \
    if (xIndex >= rowNum) return;                                            \
    for (int i = 0; i < colNumberM; ++i) {                                   \
      sum += func(image[xIndex * colNumberM + i], i, xIndex);                \
      rowCumSum[xIndex * colNumberM + i] = sum;                              \
    }                                                                        \
  }

// Usar macro para crear núcleos que calcula filas de tablas L
RowCumSum(calcL1RowCumSum, L1Func);
RowCumSum(calcL2RowCumSqrSum, L2Func);
RowCumSum(calcLxRowCumGradntSum, LxFunc);
RowCumSum(calcLyRowCumGradntSum, LyFunc);

// Suma L tablas por columna
__global__ void calcSumTable(const float *rowCumSum, float *SumTable,
                             int rowNumberN, int colNumberM) {
  int xIndex = threadIdx.x + blockIdx.x * blockDim.x;
  if (xIndex >= colNumberM) return;
  for (int i = 1; i < rowNumberN; i++) {
    SumTable[i * colNumberM + xIndex] +=
        rowCumSum[(i - 1) * colNumberM + xIndex];
  }
}

// Función auxiliar que calcula S de cierta tabla L
__device__ float computeS(float *sumTable, int rowNumberN, int colNumberM,
                          int startX, int startY, int Kx, int Ky) {
  startX--;
  startY--;
  float S =
      sumTable[startX + Kx + (Ky + startY) * colNumberM] -
      (startX < 0 ? 0 : sumTable[startX + (Ky + startY) * colNumberM]) -
      (startY < 0 ? 0 : sumTable[startX + Kx + startY * colNumberM]) +
      (startX < 0 || startY < 0 ? 0 : sumTable[startX + startY * colNumberM]);
  return S;
}

__global__ void calculateFeatureDifference(float *templateFeatures,
                                           int colNumberM, int rowNumberN,
                                           float *l1SumTable, float *l2SumTable,
                                           float *lxSumTable, float *lySumTable,
                                           int Kx, int Ky, float *differences) {
  int widthLimit = colNumberM - Kx + 1;
  int heightLimit = rowNumberN - Ky + 1;

  float meanVector;
  float varianceVector;
  float xGradientVector;
  float yGradientVector;
  int startX = threadIdx.x + blockIdx.x * blockDim.x;
  int startY = threadIdx.y + blockIdx.y * blockDim.y;
  if (startX >= widthLimit || startY >= heightLimit) return;
  float S1D =
      computeS(l1SumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);
  float S2D =
      computeS(l2SumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);

  meanVector = S1D / (Kx * Ky);

  varianceVector = S2D / (Kx * Ky) - powf(meanVector, 2);

  float SxD =
      computeS(lxSumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);

  xGradientVector = 4 * (SxD - (startX + Kx / 2.0) * S1D) / (Kx * Kx * Ky);

  float SyD =
      computeS(lySumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);
  yGradientVector = 4 * (SyD - (startY + Ky / 2.0) * S1D) / (Ky * Ky * Kx);

  differences[startX + startY * widthLimit] = norm4df(
      templateFeatures[0] - meanVector, templateFeatures[1] - varianceVector,
      templateFeatures[2] - xGradientVector,
      templateFeatures[3] - yGradientVector);
}

void preprocess(const float *I, const float *T, int M, int N, int Kx, int Ky,
                SumTable *sumTable, float *featuresT, int STableThread) {
  float *l1SumTable;
  float *l2SumTable;
  float *lxSumTable;
  float *lySumTable;

  AllocateCudaMem(&l1SumTable, sizeof(float) * M * N);
  AllocateCudaMem(&l2SumTable, sizeof(float) * M * N);
  AllocateCudaMem(&lxSumTable, sizeof(float) * M * N);
  AllocateCudaMem(&lySumTable, sizeof(float) * M * N);

  float *dev_I;

  AllocateCudaMem(&dev_I, sizeof(float) * M * N);

  cudaMemcpy(dev_I, I, sizeof(float) * M * N, cudaMemcpyHostToDevice);

  // Use streams to ensure the order
  cudaStream_t l1Stream, l2Stream, lxStream, lyStream;
  cudaStreamCreate(&l1Stream);//Crea un nuevo flujo asíncrono.
  cudaStreamCreate(&l2Stream);
  cudaStreamCreate(&lxStream);
  cudaStreamCreate(&lyStream);

  // Calcula tablas L por fila
  int rowBlocksize = (N + STableThread - 1) / STableThread;
  int sumTableBlocksize = (M + STableThread - 1) / STableThread;

  calcL1RowCumSum<<<rowBlocksize, STableThread, 0, l1Stream>>>(
      dev_I, l1SumTable, M, N);
  calcL2RowCumSqrSum<<<rowBlocksize, STableThread, 0, l2Stream>>>(
      dev_I, l2SumTable, M, N);
  calcLxRowCumGradntSum<<<rowBlocksize, STableThread, 0, lxStream>>>(
      dev_I, lxSumTable, M, N);
  calcLyRowCumGradntSum<<<rowBlocksize, STableThread, 0, lyStream>>>(
      dev_I, lySumTable, M, N);

  // then sum by column
  calcSumTable<<<sumTableBlocksize, STableThread, 0, l1Stream>>>(
      l1SumTable, l1SumTable, N, M);
  calcSumTable<<<sumTableBlocksize, STableThread, 0, l2Stream>>>(
      l2SumTable, l2SumTable, N, M);
  calcSumTable<<<sumTableBlocksize, STableThread, 0, lxStream>>>(
      lxSumTable, lxSumTable, N, M);
  calcSumTable<<<sumTableBlocksize, STableThread, 0, lyStream>>>(
      lySumTable, lySumTable, N, M);

  cudaStreamDestroy(l1Stream);
  cudaStreamDestroy(l2Stream);
  cudaStreamDestroy(lxStream);
  cudaStreamDestroy(lyStream);

  // Calculate features for the template
  for (int i = 0; i < Ky; i++) {
    for (int j = 0; j < Kx; j++) {
      featuresT[0] += T[i * Kx + j];
      featuresT[1] += T[i * Kx + j] * T[i * Kx + j];
      featuresT[2] += j * T[i * Kx + j];
      featuresT[3] += i * T[i * Kx + j];
    }
  }

  featuresT[0] /= (float)(Kx * Ky);
  featuresT[1] = featuresT[1] / (float)(Kx * Ky) - featuresT[0] * featuresT[0];
  //   4/Kx^2Ky*(Sx(D)-x*S1(D)), where x = Kx/2
  // = 4/Kx^2Ky*(f2-Kx/2*f0*Kx*Ky)
  // = 4/Kx^2Ky*f2-2*f0
  featuresT[2] = 4.0 / (Kx * Kx * Ky) * featuresT[2] - 2.0 * featuresT[0];
  featuresT[3] = 4.0 / (Ky * Kx * Ky) * featuresT[3] - 2.0 * featuresT[0];

  cudaDeviceSynchronize();
  sumTable->l1SumTable = l1SumTable;
  sumTable->l2SumTable = l2SumTable;
  sumTable->lxSumTable = lxSumTable;
  sumTable->lySumTable = lySumTable;
}

void getMinimum(float *target, int M, int N, int *x, int *y) {
  float minimum = *target;
  *x = 0;
  *y = 0;
  for (int i = 0; i < N; i++) {
    for (int j = 0; j < M; j++) {
      if (target[i * M + j] < minimum) {
        minimum = target[i * M + j];
        *x = j;
        *y = i;
      }
    }
  }
}

void GetMatch(float *I, float *T, int Iw, int Ih, int Tw, int Th, int *x,
              int *y) {
  int STableThread;
  int maxThreadsPerBlock;
  GetDeviceInfo(&maxThreadsPerBlock, &STableThread);

  SumTable sumTable;
  float featuresT[4] = {0, 0, 0, 0};
  preprocess(I, T, Iw, Ih, Tw, Th, &sumTable, featuresT, STableThread);
  float *dev_difference;
  float *difference;
  float *dev_featuresT;
  size_t difference_size = sizeof(float) * (Iw - Tw + 1) * (Ih - Th + 1);
  difference = (float *)malloc(difference_size);
  AllocateCudaMem(&dev_featuresT, sizeof(float) * 4);
  AllocateCudaMem(&dev_difference, difference_size);
  cudaMemcpy(dev_featuresT, featuresT, sizeof(float) * 4,
             cudaMemcpyHostToDevice);

  int differenceThreadsX = 32;
  int differenceThreadsY = maxThreadsPerBlock / differenceThreadsX;
  //                        Iw - Tw + 1 + differenceThreadsX - 1
  dim3 differenceBlockSize((Iw - Tw + differenceThreadsX) / differenceThreadsX,
                           // Ih - Th + 1 + differenceThreadsY - 1
                           (Ih - Th + differenceThreadsY) / differenceThreadsY);
  calculateFeatureDifference<<<differenceBlockSize,
                               dim3(differenceThreadsX, differenceThreadsY)>>>(
      dev_featuresT, Iw, Ih, sumTable.l1SumTable, sumTable.l2SumTable,
      sumTable.lxSumTable, sumTable.lySumTable, Tw, Th, dev_difference);

  cudaMemcpy(difference, dev_difference, difference_size,
             cudaMemcpyDeviceToHost);
  cudaDeviceSynchronize();
  getMinimum(difference, Iw - Tw + 1, Ih - Th + 1, x, y);
  cudaFree(sumTable.l1SumTable);
  cudaFree(sumTable.l2SumTable);
  cudaFree(sumTable.lxSumTable);
  cudaFree(sumTable.lySumTable);
  cudaFree(dev_difference);
  cudaFree(dev_featuresT);
  free(difference);
}

	.file	"tmpxft_0024ceb4_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8computeSPfiiiiii
	.type	_Z8computeSPfiiiiii, @function
_Z8computeSPfiiiiii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z8computeSPfiiiiii, .-_Z8computeSPfiiiiii
	.globl	_Z10getMinimumPfiiPiS0_
	.type	_Z10getMinimumPfiiPiS0_, @function
_Z10getMinimumPfiiPiS0_:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movss	(%rdi), %xmm0
	movl	%esi, %r9d
	xorl	%r10d, %r10d
	movl	%eax, (%rcx)
	xorl	%esi, %esi
	movl	%eax, (%r8)
.L5:
	cmpl	%edx, %esi
	jge	.L4
	movslq	%r10d, %rax
	leaq	(%rdi,%rax,4), %r11
	xorl	%eax, %eax
.L10:
	cmpl	%eax, %r9d
	jle	.L13
	movss	(%r11,%rax,4), %xmm1
	comiss	%xmm1, %xmm0
	jbe	.L6
	movl	%eax, (%rcx)
	movaps	%xmm1, %xmm0
	movl	%esi, (%r8)
.L6:
	incq	%rax
	jmp	.L10
.L13:
	incl	%esi
	addl	%r9d, %r10d
	jmp	.L5
.L4:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10getMinimumPfiiPiS0_, .-_Z10getMinimumPfiiPiS0_
	.globl	_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii
	.type	_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii, @function
_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15calcL1RowCumSumPKfPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii, .-_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii
	.globl	_Z15calcL1RowCumSumPKfPfii
	.type	_Z15calcL1RowCumSumPKfPfii, @function
_Z15calcL1RowCumSumPKfPfii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii
	.cfi_endproc
.LFE2056:
	.size	_Z15calcL1RowCumSumPKfPfii, .-_Z15calcL1RowCumSumPKfPfii
	.globl	_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii
	.type	_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii, @function
_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18calcL2RowCumSqrSumPKfPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii, .-_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii
	.globl	_Z18calcL2RowCumSqrSumPKfPfii
	.type	_Z18calcL2RowCumSqrSumPKfPfii, @function
_Z18calcL2RowCumSqrSumPKfPfii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii
	.cfi_endproc
.LFE2058:
	.size	_Z18calcL2RowCumSqrSumPKfPfii, .-_Z18calcL2RowCumSqrSumPKfPfii
	.globl	_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii
	.type	_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii, @function
_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21calcLxRowCumGradntSumPKfPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L24:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii, .-_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii
	.globl	_Z21calcLxRowCumGradntSumPKfPfii
	.type	_Z21calcLxRowCumGradntSumPKfPfii, @function
_Z21calcLxRowCumGradntSumPKfPfii:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii
	.cfi_endproc
.LFE2060:
	.size	_Z21calcLxRowCumGradntSumPKfPfii, .-_Z21calcLxRowCumGradntSumPKfPfii
	.globl	_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii
	.type	_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii, @function
_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21calcLyRowCumGradntSumPKfPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L29:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii, .-_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii
	.globl	_Z21calcLyRowCumGradntSumPKfPfii
	.type	_Z21calcLyRowCumGradntSumPKfPfii, @function
_Z21calcLyRowCumGradntSumPKfPfii:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii
	.cfi_endproc
.LFE2062:
	.size	_Z21calcLyRowCumGradntSumPKfPfii, .-_Z21calcLyRowCumGradntSumPKfPfii
	.globl	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
	.type	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii, @function
_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12calcSumTablePKfPfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L34:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii, .-_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
	.globl	_Z12calcSumTablePKfPfii
	.type	_Z12calcSumTablePKfPfii, @function
_Z12calcSumTablePKfPfii:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
	.cfi_endproc
.LFE2064:
	.size	_Z12calcSumTablePKfPfii, .-_Z12calcSumTablePKfPfii
	.globl	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	.type	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi, @function
_Z10preprocessPKfS0_iiiiP10SumTable_sPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%r9d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%ecx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movl	%edx, 12(%rsp)
	movslq	%edx, %rdx
	movl	240(%rsp), %ebp
	movl	%ecx, 16(%rsp)
	movl	12(%rsp), %ecx
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	224(%rsp), %r15
	movq	%rsi, 32(%rsp)
	movq	232(%rsp), %rbx
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	movl	16(%rsp), %eax
	movq	%rdx, 40(%rsp)
	imull	%eax, %ecx
	leal	0(,%rcx,4), %eax
	movl	%eax, %esi
	movl	%eax, 20(%rsp)
	call	_Z15AllocateCudaMemPPfi@PLT
	movl	20(%rsp), %esi
	leaq	64(%rsp), %rdi
	call	_Z15AllocateCudaMemPPfi@PLT
	movl	20(%rsp), %esi
	leaq	72(%rsp), %rdi
	call	_Z15AllocateCudaMemPPfi@PLT
	movl	20(%rsp), %esi
	leaq	80(%rsp), %rdi
	call	_Z15AllocateCudaMemPPfi@PLT
	movl	20(%rsp), %esi
	leaq	88(%rsp), %rdi
	call	_Z15AllocateCudaMemPPfi@PLT
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	imulq	%r13, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	96(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	104(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	112(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	120(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movl	12(%rsp), %eax
	movq	96(%rsp), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rcx
	movl	%ebp, 140(%rsp)
	leal	-1(%rax,%rbp), %eax
	movq	%rcx, 132(%rsp)
	movl	136(%rsp), %esi
	cltd
	movq	%rcx, 144(%rsp)
	movl	148(%rsp), %ecx
	idivl	%ebp
	movl	%eax, 20(%rsp)
	movl	16(%rsp), %eax
	leal	-1(%rax,%rbp), %eax
	cltd
	idivl	%ebp
	movq	140(%rsp), %rdx
	movl	%eax, 128(%rsp)
	movq	128(%rsp), %rdi
	movl	%eax, %r13d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movl	16(%rsp), %ecx
	movl	12(%rsp), %edx
	movq	56(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z40__device_stub__Z15calcL1RowCumSumPKfPfiiPKfPfii
.L40:
	movl	%ebp, 140(%rsp)
	movq	104(%rsp), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movl	%r13d, 128(%rsp)
	movl	136(%rsp), %esi
	movq	128(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movl	16(%rsp), %ecx
	movl	12(%rsp), %edx
	movq	64(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z43__device_stub__Z18calcL2RowCumSqrSumPKfPfiiPKfPfii
.L41:
	movl	%ebp, 140(%rsp)
	movq	112(%rsp), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movl	%r13d, 128(%rsp)
	movl	136(%rsp), %esi
	movq	128(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movl	16(%rsp), %ecx
	movl	12(%rsp), %edx
	movq	72(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z46__device_stub__Z21calcLxRowCumGradntSumPKfPfiiPKfPfii
.L42:
	movl	%ebp, 140(%rsp)
	movq	120(%rsp), %r9
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movl	%r13d, 128(%rsp)
	movl	136(%rsp), %esi
	movq	128(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movl	16(%rsp), %ecx
	movl	12(%rsp), %edx
	movq	80(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z46__device_stub__Z21calcLyRowCumGradntSumPKfPfiiPKfPfii
.L43:
	movl	20(%rsp), %esi
	movl	%ebp, 140(%rsp)
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movq	96(%rsp), %r9
	movl	%esi, 128(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	56(%rsp), %rdi
	movl	12(%rsp), %ecx
	movl	16(%rsp), %edx
	movq	%rdi, %rsi
	call	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
.L44:
	movl	20(%rsp), %esi
	movl	%ebp, 140(%rsp)
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movq	104(%rsp), %r9
	movl	%esi, 128(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	64(%rsp), %rdi
	movl	12(%rsp), %ecx
	movl	16(%rsp), %edx
	movq	%rdi, %rsi
	call	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
.L45:
	movl	20(%rsp), %esi
	movl	%ebp, 140(%rsp)
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movq	112(%rsp), %r9
	movl	%esi, 128(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	72(%rsp), %rdi
	movl	12(%rsp), %ecx
	movl	16(%rsp), %edx
	movq	%rdi, %rsi
	call	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
.L46:
	movl	20(%rsp), %edx
	movl	%ebp, 140(%rsp)
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movq	120(%rsp), %r9
	movl	%edx, 128(%rsp)
	movl	148(%rsp), %ecx
	movq	%rax, 132(%rsp)
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	80(%rsp), %rdi
	movl	12(%rsp), %ecx
	movl	16(%rsp), %edx
	movq	%rdi, %rsi
	call	_Z37__device_stub__Z12calcSumTablePKfPfiiPKfPfii
.L47:
	movq	96(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	104(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	112(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movq	120(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.L48:
	cmpl	%r14d, %ecx
	jge	.L50
	movq	32(%rsp), %rdx
	movslq	%esi, %rax
	leaq	(%rdx,%rax,4), %rax
	xorl	%edx, %edx
.L51:
	movss	(%rbx), %xmm0
	movss	4(%rbx), %xmm3
	movss	8(%rbx), %xmm2
	movss	12(%rbx), %xmm1
	cmpl	%r12d, %edx
	jge	.L54
	addss	(%rax), %xmm0
	addq	$4, %rax
	movss	%xmm0, (%rbx)
	movss	-4(%rax), %xmm0
	mulss	%xmm0, %xmm0
	addss	%xmm3, %xmm0
	movss	%xmm0, 4(%rbx)
	cvtsi2ssl	%edx, %xmm0
	mulss	-4(%rax), %xmm0
	incl	%edx
	addss	%xmm2, %xmm0
	movss	%xmm0, 8(%rbx)
	cvtsi2ssl	%ecx, %xmm0
	mulss	-4(%rax), %xmm0
	addss	%xmm1, %xmm0
	movss	%xmm0, 12(%rbx)
	jmp	.L51
.L54:
	incl	%ecx
	addl	%r12d, %esi
	jmp	.L48
.L50:
	movl	%r14d, %eax
	movss	(%rbx), %xmm0
	movss	4(%rbx), %xmm1
	imull	%r12d, %eax
	imull	%r12d, %r12d
	cvtsi2ssl	%eax, %xmm2
	imull	%r14d, %r12d
	imull	%r14d, %eax
	divss	%xmm2, %xmm0
	cvtsi2sdl	%r12d, %xmm3
	divss	%xmm2, %xmm1
	movaps	%xmm0, %xmm2
	movss	%xmm0, (%rbx)
	mulss	%xmm0, %xmm2
	cvtss2sd	%xmm0, %xmm0
	addsd	%xmm0, %xmm0
	subss	%xmm2, %xmm1
	movss	%xmm1, 4(%rbx)
	movsd	.LC0(%rip), %xmm1
	movaps	%xmm1, %xmm2
	divsd	%xmm3, %xmm2
	cvtss2sd	8(%rbx), %xmm3
	mulsd	%xmm3, %xmm2
	subsd	%xmm0, %xmm2
	cvtsd2ss	%xmm2, %xmm2
	movss	%xmm2, 8(%rbx)
	cvtsi2sdl	%eax, %xmm2
	divsd	%xmm2, %xmm1
	cvtss2sd	12(%rbx), %xmm2
	mulsd	%xmm2, %xmm1
	subsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, 12(%rbx)
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %rax
	movq	%rax, (%r15)
	movq	64(%rsp), %rax
	movq	%rax, 8(%r15)
	movq	72(%rsp), %rax
	movq	%rax, 16(%r15)
	movq	80(%rsp), %rax
	movq	%rax, 24(%r15)
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi, .-_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	.globl	_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_
	.type	_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_, @function
_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movl	%esi, 52(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	264(%rsp), %rax
	movl	%edx, 48(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	248(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L55:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L57
	call	__stack_chk_fail@PLT
.L57:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_, .-_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_
	.globl	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.type	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_, @function
_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_
	.cfi_endproc
.LFE2066:
	.size	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_, .-_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.globl	_Z8GetMatchPfS_iiiiPiS0_
	.type	_Z8GetMatchPfS_iiiiPiS0_, @function
_Z8GetMatchPfS_iiiiPiS0_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movl	%edx, 20(%rsp)
	leaq	56(%rsp), %rsi
	leaq	60(%rsp), %rdi
	movq	224(%rsp), %rax
	movl	%ecx, 24(%rsp)
	movq	%rax, 32(%rsp)
	movq	232(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	call	_Z13GetDeviceInfoPiS_@PLT
	xorps	%xmm0, %xmm0
	movl	%r12d, %r9d
	movl	%ebp, %r8d
	movups	%xmm0, 136(%rsp)
	movq	%r14, %rsi
	movq	%r13, %rdi
	pushq	%rax
	.cfi_def_cfa_offset 232
	movl	64(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 240
	leaq	152(%rsp), %r15
	pushq	%r15
	.cfi_def_cfa_offset 248
	leaq	128(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 256
	movl	56(%rsp), %ecx
	movl	52(%rsp), %edx
	call	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	movl	56(%rsp), %ebx
	movl	52(%rsp), %r13d
	subl	%r12d, %ebx
	subl	%ebp, %r13d
	leal	1(%rbx), %eax
	leal	1(%r13), %r14d
	movl	%eax, 60(%rsp)
	movslq	60(%rsp), %rdx
	movslq	%r14d, %rax
	imulq	%rdx, %rax
	salq	$2, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 224
	call	malloc@PLT
	leaq	72(%rsp), %rdi
	movl	$16, %esi
	movq	%rax, 8(%rsp)
	call	_Z15AllocateCudaMemPPfi@PLT
	movl	(%rsp), %esi
	leaq	64(%rsp), %rdi
	call	_Z15AllocateCudaMemPPfi@PLT
	movq	72(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	60(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$32, %esi
	movl	$32, 92(%rsp)
	cltd
	idivl	%esi
	movl	%eax, %ecx
	leal	32(%r13), %eax
	cltd
	movl	%ecx, 96(%rsp)
	idivl	%esi
	movl	$1, %esi
	movl	%eax, 80(%rsp)
	leal	(%rbx,%rcx), %eax
	cltd
	idivl	%ecx
	movq	92(%rsp), %rdx
	movl	$1, %ecx
	movl	%eax, 84(%rsp)
	movq	80(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	pushq	64(%rsp)
	.cfi_def_cfa_offset 232
	pushq	%r12
	.cfi_def_cfa_offset 240
	pushq	%rbp
	.cfi_def_cfa_offset 248
	pushq	152(%rsp)
	.cfi_def_cfa_offset 256
	movq	152(%rsp), %r9
	movq	144(%rsp), %r8
	movq	136(%rsp), %rcx
	movl	56(%rsp), %edx
	movl	52(%rsp), %esi
	movq	104(%rsp), %rdi
	call	_Z60__device_stub__Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_PfiiS_S_S_S_iiS_
	addq	$32, %rsp
	.cfi_def_cfa_offset 224
.L61:
	movq	(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %r8
	movq	32(%rsp), %rcx
	movl	%r14d, %esi
	movl	28(%rsp), %edx
	movq	8(%rsp), %rdi
	call	_Z10getMinimumPfiiPiS0_
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	movq	8(%rsp), %rdi
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z8GetMatchPfS_iiiiPiS0_, .-_Z8GetMatchPfS_iiiiPiS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_"
.LC2:
	.string	"_Z12calcSumTablePKfPfii"
.LC3:
	.string	"_Z21calcLyRowCumGradntSumPKfPfii"
.LC4:
	.string	"_Z21calcLxRowCumGradntSumPKfPfii"
.LC5:
	.string	"_Z18calcL2RowCumSqrSumPKfPfii"
.LC6:
	.string	"_Z15calcL1RowCumSumPKfPfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2068:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12calcSumTablePKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z21calcLyRowCumGradntSumPKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z21calcLxRowCumGradntSumPKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18calcL2RowCumSqrSumPKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15calcL1RowCumSumPKfPfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2068:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1074790400
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include "includes/kernel.cuh"
#include "includes/utils.cuh"

#define L1Func(I, x, y) (I)
#define L2Func(I, x, y) (powf(I, 2))
#define LxFunc(I, x, y) (x * I)
#define LyFunc(I, x, y) (y * I)

#define RowCumSum(name, func)                                                \
  __global__ void name(const float *image, float *rowCumSum, int colNumberM, \
                       int rowNum) {                                         \
    float sum = 0;                                                           \
    int xIndex = threadIdx.x + blockIdx.x * blockDim.x;                      \
    if (xIndex >= rowNum) return;                                            \
    for (int i = 0; i < colNumberM; ++i) {                                   \
      sum += func(image[xIndex * colNumberM + i], i, xIndex);                \
      rowCumSum[xIndex * colNumberM + i] = sum;                              \
    }                                                                        \
  }

// Usar macro para crear núcleos que calcula filas de tablas L
RowCumSum(calcL1RowCumSum, L1Func);
RowCumSum(calcL2RowCumSqrSum, L2Func);
RowCumSum(calcLxRowCumGradntSum, LxFunc);
RowCumSum(calcLyRowCumGradntSum, LyFunc);

// Suma L tablas por columna
__global__ void calcSumTable(const float *rowCumSum, float *SumTable,
                             int rowNumberN, int colNumberM) {
  int xIndex = threadIdx.x + blockIdx.x * blockDim.x;
  if (xIndex >= colNumberM) return;
  for (int i = 1; i < rowNumberN; i++) {
    SumTable[i * colNumberM + xIndex] +=
        rowCumSum[(i - 1) * colNumberM + xIndex];
  }
}

// Función auxiliar que calcula S de cierta tabla L
__device__ float computeS(float *sumTable, int rowNumberN, int colNumberM,
                          int startX, int startY, int Kx, int Ky) {
  startX--;
  startY--;
  float S =
      sumTable[startX + Kx + (Ky + startY) * colNumberM] -
      (startX < 0 ? 0 : sumTable[startX + (Ky + startY) * colNumberM]) -
      (startY < 0 ? 0 : sumTable[startX + Kx + startY * colNumberM]) +
      (startX < 0 || startY < 0 ? 0 : sumTable[startX + startY * colNumberM]);
  return S;
}

__global__ void calculateFeatureDifference(float *templateFeatures,
                                           int colNumberM, int rowNumberN,
                                           float *l1SumTable, float *l2SumTable,
                                           float *lxSumTable, float *lySumTable,
                                           int Kx, int Ky, float *differences) {
  int widthLimit = colNumberM - Kx + 1;
  int heightLimit = rowNumberN - Ky + 1;

  float meanVector;
  float varianceVector;
  float xGradientVector;
  float yGradientVector;
  int startX = threadIdx.x + blockIdx.x * blockDim.x;
  int startY = threadIdx.y + blockIdx.y * blockDim.y;
  if (startX >= widthLimit || startY >= heightLimit) return;
  float S1D =
      computeS(l1SumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);
  float S2D =
      computeS(l2SumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);

  meanVector = S1D / (Kx * Ky);

  varianceVector = S2D / (Kx * Ky) - powf(meanVector, 2);

  float SxD =
      computeS(lxSumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);

  xGradientVector = 4 * (SxD - (startX + Kx / 2.0) * S1D) / (Kx * Kx * Ky);

  float SyD =
      computeS(lySumTable, rowNumberN, colNumberM, startX, startY, Kx, Ky);
  yGradientVector = 4 * (SyD - (startY + Ky / 2.0) * S1D) / (Ky * Ky * Kx);

  differences[startX + startY * widthLimit] = norm4df(
      templateFeatures[0] - meanVector, templateFeatures[1] - varianceVector,
      templateFeatures[2] - xGradientVector,
      templateFeatures[3] - yGradientVector);
}

void preprocess(const float *I, const float *T, int M, int N, int Kx, int Ky,
                SumTable *sumTable, float *featuresT, int STableThread) {
  float *l1SumTable;
  float *l2SumTable;
  float *lxSumTable;
  float *lySumTable;

  AllocateCudaMem(&l1SumTable, sizeof(float) * M * N);
  AllocateCudaMem(&l2SumTable, sizeof(float) * M * N);
  AllocateCudaMem(&lxSumTable, sizeof(float) * M * N);
  AllocateCudaMem(&lySumTable, sizeof(float) * M * N);

  float *dev_I;

  AllocateCudaMem(&dev_I, sizeof(float) * M * N);

  hipMemcpy(dev_I, I, sizeof(float) * M * N, hipMemcpyHostToDevice);

  // Use streams to ensure the order
  hipStream_t l1Stream, l2Stream, lxStream, lyStream;
  hipStreamCreate(&l1Stream);//Crea un nuevo flujo asíncrono.
  hipStreamCreate(&l2Stream);
  hipStreamCreate(&lxStream);
  hipStreamCreate(&lyStream);

  // Calcula tablas L por fila
  int rowBlocksize = (N + STableThread - 1) / STableThread;
  int sumTableBlocksize = (M + STableThread - 1) / STableThread;

  calcL1RowCumSum<<<rowBlocksize, STableThread, 0, l1Stream>>>(
      dev_I, l1SumTable, M, N);
  calcL2RowCumSqrSum<<<rowBlocksize, STableThread, 0, l2Stream>>>(
      dev_I, l2SumTable, M, N);
  calcLxRowCumGradntSum<<<rowBlocksize, STableThread, 0, lxStream>>>(
      dev_I, lxSumTable, M, N);
  calcLyRowCumGradntSum<<<rowBlocksize, STableThread, 0, lyStream>>>(
      dev_I, lySumTable, M, N);

  // then sum by column
  calcSumTable<<<sumTableBlocksize, STableThread, 0, l1Stream>>>(
      l1SumTable, l1SumTable, N, M);
  calcSumTable<<<sumTableBlocksize, STableThread, 0, l2Stream>>>(
      l2SumTable, l2SumTable, N, M);
  calcSumTable<<<sumTableBlocksize, STableThread, 0, lxStream>>>(
      lxSumTable, lxSumTable, N, M);
  calcSumTable<<<sumTableBlocksize, STableThread, 0, lyStream>>>(
      lySumTable, lySumTable, N, M);

  hipStreamDestroy(l1Stream);
  hipStreamDestroy(l2Stream);
  hipStreamDestroy(lxStream);
  hipStreamDestroy(lyStream);

  // Calculate features for the template
  for (int i = 0; i < Ky; i++) {
    for (int j = 0; j < Kx; j++) {
      featuresT[0] += T[i * Kx + j];
      featuresT[1] += T[i * Kx + j] * T[i * Kx + j];
      featuresT[2] += j * T[i * Kx + j];
      featuresT[3] += i * T[i * Kx + j];
    }
  }

  featuresT[0] /= (float)(Kx * Ky);
  featuresT[1] = featuresT[1] / (float)(Kx * Ky) - featuresT[0] * featuresT[0];
  //   4/Kx^2Ky*(Sx(D)-x*S1(D)), where x = Kx/2
  // = 4/Kx^2Ky*(f2-Kx/2*f0*Kx*Ky)
  // = 4/Kx^2Ky*f2-2*f0
  featuresT[2] = 4.0 / (Kx * Kx * Ky) * featuresT[2] - 2.0 * featuresT[0];
  featuresT[3] = 4.0 / (Ky * Kx * Ky) * featuresT[3] - 2.0 * featuresT[0];

  hipDeviceSynchronize();
  sumTable->l1SumTable = l1SumTable;
  sumTable->l2SumTable = l2SumTable;
  sumTable->lxSumTable = lxSumTable;
  sumTable->lySumTable = lySumTable;
}

void getMinimum(float *target, int M, int N, int *x, int *y) {
  float minimum = *target;
  *x = 0;
  *y = 0;
  for (int i = 0; i < N; i++) {
    for (int j = 0; j < M; j++) {
      if (target[i * M + j] < minimum) {
        minimum = target[i * M + j];
        *x = j;
        *y = i;
      }
    }
  }
}

void GetMatch(float *I, float *T, int Iw, int Ih, int Tw, int Th, int *x,
              int *y) {
  int STableThread;
  int maxThreadsPerBlock;
  GetDeviceInfo(&maxThreadsPerBlock, &STableThread);

  SumTable sumTable;
  float featuresT[4] = {0, 0, 0, 0};
  preprocess(I, T, Iw, Ih, Tw, Th, &sumTable, featuresT, STableThread);
  float *dev_difference;
  float *difference;
  float *dev_featuresT;
  size_t difference_size = sizeof(float) * (Iw - Tw + 1) * (Ih - Th + 1);
  difference = (float *)malloc(difference_size);
  AllocateCudaMem(&dev_featuresT, sizeof(float) * 4);
  AllocateCudaMem(&dev_difference, difference_size);
  hipMemcpy(dev_featuresT, featuresT, sizeof(float) * 4,
             hipMemcpyHostToDevice);

  int differenceThreadsX = 32;
  int differenceThreadsY = maxThreadsPerBlock / differenceThreadsX;
  //                        Iw - Tw + 1 + differenceThreadsX - 1
  dim3 differenceBlockSize((Iw - Tw + differenceThreadsX) / differenceThreadsX,
                           // Ih - Th + 1 + differenceThreadsY - 1
                           (Ih - Th + differenceThreadsY) / differenceThreadsY);
  calculateFeatureDifference<<<differenceBlockSize,
                               dim3(differenceThreadsX, differenceThreadsY)>>>(
      dev_featuresT, Iw, Ih, sumTable.l1SumTable, sumTable.l2SumTable,
      sumTable.lxSumTable, sumTable.lySumTable, Tw, Th, dev_difference);

  hipMemcpy(difference, dev_difference, difference_size,
             hipMemcpyDeviceToHost);
  hipDeviceSynchronize();
  getMinimum(difference, Iw - Tw + 1, Ih - Th + 1, x, y);
  hipFree(sumTable.l1SumTable);
  hipFree(sumTable.l2SumTable);
  hipFree(sumTable.lxSumTable);
  hipFree(sumTable.lySumTable);
  hipFree(dev_difference);
  hipFree(dev_featuresT);
  free(difference);
}

	.text
	.file	"kernel.hip"
	.globl	_Z30__device_stub__calcL1RowCumSumPKfPfii # -- Begin function _Z30__device_stub__calcL1RowCumSumPKfPfii
	.type	_Z30__device_stub__calcL1RowCumSumPKfPfii,@function
_Z30__device_stub__calcL1RowCumSumPKfPfii: # @_Z30__device_stub__calcL1RowCumSumPKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15calcL1RowCumSumPKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__calcL1RowCumSumPKfPfii, .Lfunc_end0-_Z30__device_stub__calcL1RowCumSumPKfPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__calcL2RowCumSqrSumPKfPfii # -- Begin function _Z33__device_stub__calcL2RowCumSqrSumPKfPfii
	.type	_Z33__device_stub__calcL2RowCumSqrSumPKfPfii,@function
_Z33__device_stub__calcL2RowCumSqrSumPKfPfii: # @_Z33__device_stub__calcL2RowCumSqrSumPKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18calcL2RowCumSqrSumPKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z33__device_stub__calcL2RowCumSqrSumPKfPfii, .Lfunc_end1-_Z33__device_stub__calcL2RowCumSqrSumPKfPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__calcLxRowCumGradntSumPKfPfii # -- Begin function _Z36__device_stub__calcLxRowCumGradntSumPKfPfii
	.type	_Z36__device_stub__calcLxRowCumGradntSumPKfPfii,@function
_Z36__device_stub__calcLxRowCumGradntSumPKfPfii: # @_Z36__device_stub__calcLxRowCumGradntSumPKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21calcLxRowCumGradntSumPKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z36__device_stub__calcLxRowCumGradntSumPKfPfii, .Lfunc_end2-_Z36__device_stub__calcLxRowCumGradntSumPKfPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__calcLyRowCumGradntSumPKfPfii # -- Begin function _Z36__device_stub__calcLyRowCumGradntSumPKfPfii
	.type	_Z36__device_stub__calcLyRowCumGradntSumPKfPfii,@function
_Z36__device_stub__calcLyRowCumGradntSumPKfPfii: # @_Z36__device_stub__calcLyRowCumGradntSumPKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21calcLyRowCumGradntSumPKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z36__device_stub__calcLyRowCumGradntSumPKfPfii, .Lfunc_end3-_Z36__device_stub__calcLyRowCumGradntSumPKfPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__calcSumTablePKfPfii # -- Begin function _Z27__device_stub__calcSumTablePKfPfii
	.type	_Z27__device_stub__calcSumTablePKfPfii,@function
_Z27__device_stub__calcSumTablePKfPfii: # @_Z27__device_stub__calcSumTablePKfPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12calcSumTablePKfPfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__calcSumTablePKfPfii, .Lfunc_end4-_Z27__device_stub__calcSumTablePKfPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_ # -- Begin function _Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.type	_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_,@function
_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_: # @_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_, .Lfunc_end5-_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10preprocessPKfS0_iiiiP10SumTable_sPfi
.LCPI6_0:
	.quad	0x4010000000000000              # double 4
	.text
	.globl	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	.type	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi,@function
_Z10preprocessPKfS0_iiiiP10SumTable_sPfi: # @_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, 84(%rsp)                  # 4-byte Spill
	movl	%r8d, %ebp
	movl	%ecx, %ebx
	movl	%edx, %r14d
	movq	%rsi, 112(%rsp)                 # 8-byte Spill
	movq	%rdi, 96(%rsp)                  # 8-byte Spill
	movl	192(%rsp), %r13d
	movslq	%edx, %r15
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	movslq	%ecx, %rax
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	imulq	%rax, %r15
	shlq	$2, %r15
	leaq	72(%rsp), %rdi
	movl	%r15d, %esi
	callq	_Z15AllocateCudaMemPPfi
	leaq	64(%rsp), %rdi
	movl	%r15d, %esi
	callq	_Z15AllocateCudaMemPPfi
	leaq	56(%rsp), %rdi
	movl	%r15d, %esi
	callq	_Z15AllocateCudaMemPPfi
	leaq	48(%rsp), %rdi
	movl	%r15d, %esi
	callq	_Z15AllocateCudaMemPPfi
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_Z15AllocateCudaMemPPfi
	movq	(%r12), %rdi
	movl	%r14d, %r12d
	movl	%ebx, %r14d
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %r15
	movq	%r15, %rdi
	callq	hipStreamCreate
	leaq	40(%rsp), %rdi
	callq	hipStreamCreate
	leaq	32(%rsp), %rdi
	callq	hipStreamCreate
	leaq	24(%rsp), %rdi
	callq	hipStreamCreate
	movq	104(%rsp), %rax                 # 8-byte Reload
	addl	%r13d, %eax
	decl	%eax
	cltd
	idivl	%r13d
	movl	%eax, %ebx
	movq	16(%rsp), %rax                  # 8-byte Reload
	addl	%r13d, %eax
	decl	%eax
	cltd
	idivl	%r13d
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	movq	(%r15), %r9
	btsq	$32, %rbx
	btsq	$32, %r13
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	72(%rsp), %rsi
	movl	%r12d, %edx
	movl	%r14d, %ecx
	callq	_Z30__device_stub__calcL1RowCumSumPKfPfii
.LBB6_2:
	movq	40(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_4
# %bb.3:
	movq	8(%rsp), %rdi
	movq	64(%rsp), %rsi
	movl	%r12d, %edx
	movl	%r14d, %ecx
	callq	_Z33__device_stub__calcL2RowCumSqrSumPKfPfii
.LBB6_4:
	movq	32(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	%r12d, %edx
	movl	%r14d, %ecx
	callq	_Z36__device_stub__calcLxRowCumGradntSumPKfPfii
.LBB6_6:
	movabsq	$4294967296, %r15               # imm = 0x100000000
	movq	24(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	%r12d, %edx
	movl	%r14d, %ecx
	callq	_Z36__device_stub__calcLyRowCumGradntSumPKfPfii
.LBB6_8:
	movq	88(%rsp), %r9
	movl	16(%rsp), %ebx                  # 4-byte Reload
	orq	%r15, %rbx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_10
# %bb.9:
	movq	72(%rsp), %rdi
	movq	%rdi, %rsi
	movl	%r14d, %edx
	movl	%r12d, %ecx
	callq	_Z27__device_stub__calcSumTablePKfPfii
.LBB6_10:
	movq	40(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_12
# %bb.11:
	movq	64(%rsp), %rdi
	movq	%rdi, %rsi
	movl	%r14d, %edx
	movl	%r12d, %ecx
	callq	_Z27__device_stub__calcSumTablePKfPfii
.LBB6_12:
	movq	32(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.13:
	movq	56(%rsp), %rdi
	movq	%rdi, %rsi
	movl	%r14d, %edx
	movl	%r12d, %ecx
	callq	_Z27__device_stub__calcSumTablePKfPfii
.LBB6_14:
	movq	24(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_16
# %bb.15:
	movq	48(%rsp), %rdi
	movq	%rdi, %rsi
	movl	%r14d, %edx
	movl	%r12d, %ecx
	callq	_Z27__device_stub__calcSumTablePKfPfii
.LBB6_16:
	movq	184(%rsp), %r15
	movq	176(%rsp), %rbx
	movq	88(%rsp), %rdi
	callq	hipStreamDestroy
	movq	40(%rsp), %rdi
	callq	hipStreamDestroy
	movq	32(%rsp), %rdi
	callq	hipStreamDestroy
	movq	24(%rsp), %rdi
	callq	hipStreamDestroy
	movl	84(%rsp), %r9d                  # 4-byte Reload
	testl	%r9d, %r9d
	movq	112(%rsp), %r10                 # 8-byte Reload
	jle	.LBB6_22
# %bb.17:                               # %.preheader.lr.ph
	movl	%r9d, %eax
	movl	%ebp, %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB6_18:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_20 Depth 2
	testl	%ebp, %ebp
	jle	.LBB6_21
# %bb.19:                               # %.lr.ph
                                        #   in Loop: Header=BB6_18 Depth=1
	movl	%edx, %edi
	leaq	(%r10,%rdi,4), %rdi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	4(%r15), %xmm2                  # xmm2 = mem[0],zero,zero,zero
	movss	8(%r15), %xmm3                  # xmm3 = mem[0],zero,zero,zero
	movss	12(%r15), %xmm4                 # xmm4 = mem[0],zero,zero,zero
	xorl	%r8d, %r8d
.LBB6_20:                               #   Parent Loop BB6_18 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	(%rdi,%r8,4), %xmm1
	movss	%xmm1, (%r15)
	movss	(%rdi,%r8,4), %xmm5             # xmm5 = mem[0],zero,zero,zero
	mulss	%xmm5, %xmm5
	xorps	%xmm6, %xmm6
	cvtsi2ss	%r8d, %xmm6
	addss	%xmm5, %xmm2
	movss	%xmm2, 4(%r15)
	mulss	(%rdi,%r8,4), %xmm6
	addss	%xmm6, %xmm3
	movss	%xmm3, 8(%r15)
	movss	(%rdi,%r8,4), %xmm5             # xmm5 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm5
	addss	%xmm5, %xmm4
	movss	%xmm4, 12(%r15)
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB6_20
.LBB6_21:                               # %._crit_edge
                                        #   in Loop: Header=BB6_18 Depth=1
	incq	%rsi
	addl	%ebp, %edx
	cmpq	%rax, %rsi
	jne	.LBB6_18
.LBB6_22:                               # %._crit_edge197
	movl	%r9d, %eax
	imull	%ebp, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	(%r15), %xmm1                   # xmm1 = mem[0],zero,zero,zero
	movss	4(%r15), %xmm2                  # xmm2 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	%xmm1, (%r15)
	divss	%xmm0, %xmm2
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	mulss	%xmm1, %xmm1
	subss	%xmm1, %xmm2
	movss	%xmm2, 4(%r15)
	imull	%eax, %ebp
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ebp, %xmm1
	movsd	.LCPI6_0(%rip), %xmm2           # xmm2 = mem[0],zero
	movapd	%xmm2, %xmm3
	divsd	%xmm1, %xmm3
	xorps	%xmm1, %xmm1
	cvtss2sd	8(%r15), %xmm1
	mulsd	%xmm3, %xmm1
	addsd	%xmm0, %xmm0
	subsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, 8(%r15)
	imull	%r9d, %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%eax, %xmm1
	divsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtss2sd	12(%r15), %xmm1
	mulsd	%xmm2, %xmm1
	subsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, 12(%r15)
	callq	hipDeviceSynchronize
	movq	72(%rsp), %rax
	movq	%rax, (%rbx)
	movq	64(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	56(%rsp), %rax
	movq	%rax, 16(%rbx)
	movq	48(%rsp), %rax
	movq	%rax, 24(%rbx)
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi, .Lfunc_end6-_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10getMinimumPfiiPiS0_         # -- Begin function _Z10getMinimumPfiiPiS0_
	.type	_Z10getMinimumPfiiPiS0_,@function
_Z10getMinimumPfiiPiS0_:                # @_Z10getMinimumPfiiPiS0_
	.cfi_startproc
# %bb.0:
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	xorl	%eax, %eax
	movl	%eax, (%rcx)
	movl	%eax, (%r8)
	testl	%edx, %edx
	jle	.LBB7_9
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edx, %edx
	movl	%esi, %r9d
	xorl	%r10d, %r10d
.LBB7_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	testl	%esi, %esi
	jle	.LBB7_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB7_2 Depth=1
	movl	%eax, %r11d
	leaq	(%rdi,%r11,4), %r11
	xorl	%ebx, %ebx
.LBB7_4:                                #   Parent Loop BB7_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r11,%rbx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jbe	.LBB7_6
# %bb.5:                                #   in Loop: Header=BB7_4 Depth=2
	movl	%ebx, (%rcx)
	movl	%r10d, (%r8)
	movaps	%xmm1, %xmm0
.LBB7_6:                                #   in Loop: Header=BB7_4 Depth=2
	incq	%rbx
	cmpq	%rbx, %r9
	jne	.LBB7_4
.LBB7_7:                                # %._crit_edge
                                        #   in Loop: Header=BB7_2 Depth=1
	incq	%r10
	addl	%esi, %eax
	cmpq	%rdx, %r10
	jne	.LBB7_2
# %bb.8:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB7_9:                                # %._crit_edge29
	retq
.Lfunc_end7:
	.size	_Z10getMinimumPfiiPiS0_, .Lfunc_end7-_Z10getMinimumPfiiPiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8GetMatchPfS_iiiiPiS0_        # -- Begin function _Z8GetMatchPfS_iiiiPiS0_
	.type	_Z8GetMatchPfS_iiiiPiS0_,@function
_Z8GetMatchPfS_iiiiPiS0_:               # @_Z8GetMatchPfS_iiiiPiS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebx
	movl	%r8d, %r15d
	movl	%ecx, %r13d
	movl	%edx, %r14d
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movq	200(%rsp), %rbp
	movq	192(%rsp), %r12
	leaq	48(%rsp), %rdi
	leaq	52(%rsp), %rsi
	callq	_Z13GetDeviceInfoPiS_
	xorps	%xmm0, %xmm0
	leaq	112(%rsp), %rax
	movaps	%xmm0, (%rax)
	movq	%rax, %r11
	leaq	52(%rsp), %rax
	movl	(%rax), %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	leaq	64(%rsp), %r10
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	%r14d, %edx
	movl	%r13d, %ecx
	movl	%r15d, %r8d
	movl	%ebx, %r9d
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	_Z10preprocessPKfS0_iiiiP10SumTable_sPfi
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	%r14d, 36(%rsp)                 # 4-byte Spill
                                        # kill: def $r14d killed $r14d def $r14
	movq	%r15, 96(%rsp)                  # 8-byte Spill
	subl	%r15d, %r14d
	leal	1(%r14), %r15d
	movslq	%r15d, %rax
	movl	%r13d, 40(%rsp)                 # 4-byte Spill
                                        # kill: def $r13d killed $r13d def $r13
	movq	%rbx, 88(%rsp)                  # 8-byte Spill
	subl	%ebx, %r13d
	leal	1(%r13), %ecx
	movl	%ecx, 44(%rsp)                  # 4-byte Spill
	movslq	%ecx, %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	leaq	16(%rsp), %rdi
	movl	$16, %esi
	callq	_Z15AllocateCudaMemPPfi
	leaq	24(%rsp), %rdi
	movq	%rbx, (%rsp)                    # 8-byte Spill
	movl	%ebx, %esi
	callq	_Z15AllocateCudaMemPPfi
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$16, %edx
	leaq	112(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movl	(%rax), %eax
	leal	31(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$5, %ecx
	leal	32(%r14), %eax
	leal	63(%r14), %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$5, %edi
	movq	%r13, 8(%rsp)                   # 8-byte Spill
	leal	(%rcx,%r13), %eax
	cltd
	idivl	%ecx
                                        # kill: def $eax killed $eax def $rax
	shlq	$32, %rax
	orq	%rax, %rdi
	shlq	$32, %rcx
	orq	$32, %rcx
	xorl	%r13d, %r13d
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	56(%rsp), %rcx
	movq	64(%rsp), %r8
	movq	72(%rsp), %r9
	movl	36(%rsp), %esi                  # 4-byte Reload
	movl	40(%rsp), %edx                  # 4-byte Reload
	pushq	24(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB8_2:
	movq	24(%rsp), %rsi
	movq	104(%rsp), %rbx                 # 8-byte Reload
	movq	%rbx, %rdi
	movq	(%rsp), %rdx                    # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movl	%r13d, (%r12)
	movl	%r13d, (%rbp)
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	js	.LBB8_10
# %bb.3:                                # %.preheader.lr.ph.i
	movl	44(%rsp), %eax                  # 4-byte Reload
	movl	%r15d, %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB8_4:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_6 Depth 2
	testl	%r14d, %r14d
	js	.LBB8_9
# %bb.5:                                # %.lr.ph.i
                                        #   in Loop: Header=BB8_4 Depth=1
	movl	%edx, %edi
	leaq	(%rbx,%rdi,4), %rdi
	xorl	%r8d, %r8d
.LBB8_6:                                #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rdi,%r8,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jbe	.LBB8_8
# %bb.7:                                #   in Loop: Header=BB8_6 Depth=2
	movl	%r8d, (%r12)
	movl	%esi, (%rbp)
	movaps	%xmm1, %xmm0
.LBB8_8:                                #   in Loop: Header=BB8_6 Depth=2
	incq	%r8
	cmpq	%r8, %rcx
	jne	.LBB8_6
.LBB8_9:                                # %._crit_edge.i
                                        #   in Loop: Header=BB8_4 Depth=1
	incq	%rsi
	addl	%r15d, %edx
	cmpq	%rax, %rsi
	jne	.LBB8_4
.LBB8_10:                               # %_Z10getMinimumPfiiPiS0_.exit
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z8GetMatchPfS_iiiiPiS0_, .Lfunc_end8-_Z8GetMatchPfS_iiiiPiS0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15calcL1RowCumSumPKfPfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18calcL2RowCumSqrSumPKfPfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21calcLxRowCumGradntSumPKfPfii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21calcLyRowCumGradntSumPKfPfii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12calcSumTablePKfPfii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15calcL1RowCumSumPKfPfii,@object # @_Z15calcL1RowCumSumPKfPfii
	.section	.rodata,"a",@progbits
	.globl	_Z15calcL1RowCumSumPKfPfii
	.p2align	3, 0x0
_Z15calcL1RowCumSumPKfPfii:
	.quad	_Z30__device_stub__calcL1RowCumSumPKfPfii
	.size	_Z15calcL1RowCumSumPKfPfii, 8

	.type	_Z18calcL2RowCumSqrSumPKfPfii,@object # @_Z18calcL2RowCumSqrSumPKfPfii
	.globl	_Z18calcL2RowCumSqrSumPKfPfii
	.p2align	3, 0x0
_Z18calcL2RowCumSqrSumPKfPfii:
	.quad	_Z33__device_stub__calcL2RowCumSqrSumPKfPfii
	.size	_Z18calcL2RowCumSqrSumPKfPfii, 8

	.type	_Z21calcLxRowCumGradntSumPKfPfii,@object # @_Z21calcLxRowCumGradntSumPKfPfii
	.globl	_Z21calcLxRowCumGradntSumPKfPfii
	.p2align	3, 0x0
_Z21calcLxRowCumGradntSumPKfPfii:
	.quad	_Z36__device_stub__calcLxRowCumGradntSumPKfPfii
	.size	_Z21calcLxRowCumGradntSumPKfPfii, 8

	.type	_Z21calcLyRowCumGradntSumPKfPfii,@object # @_Z21calcLyRowCumGradntSumPKfPfii
	.globl	_Z21calcLyRowCumGradntSumPKfPfii
	.p2align	3, 0x0
_Z21calcLyRowCumGradntSumPKfPfii:
	.quad	_Z36__device_stub__calcLyRowCumGradntSumPKfPfii
	.size	_Z21calcLyRowCumGradntSumPKfPfii, 8

	.type	_Z12calcSumTablePKfPfii,@object # @_Z12calcSumTablePKfPfii
	.globl	_Z12calcSumTablePKfPfii
	.p2align	3, 0x0
_Z12calcSumTablePKfPfii:
	.quad	_Z27__device_stub__calcSumTablePKfPfii
	.size	_Z12calcSumTablePKfPfii, 8

	.type	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_,@object # @_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.globl	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.p2align	3, 0x0
_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_:
	.quad	_Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.size	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z15calcL1RowCumSumPKfPfii"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18calcL2RowCumSqrSumPKfPfii"
	.size	.L__unnamed_2, 30

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z21calcLxRowCumGradntSumPKfPfii"
	.size	.L__unnamed_3, 33

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z21calcLyRowCumGradntSumPKfPfii"
	.size	.L__unnamed_4, 33

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12calcSumTablePKfPfii"
	.size	.L__unnamed_5, 24

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_"
	.size	.L__unnamed_6, 47

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__calcL1RowCumSumPKfPfii
	.addrsig_sym _Z33__device_stub__calcL2RowCumSqrSumPKfPfii
	.addrsig_sym _Z36__device_stub__calcLxRowCumGradntSumPKfPfii
	.addrsig_sym _Z36__device_stub__calcLyRowCumGradntSumPKfPfii
	.addrsig_sym _Z27__device_stub__calcSumTablePKfPfii
	.addrsig_sym _Z41__device_stub__calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15calcL1RowCumSumPKfPfii
	.addrsig_sym _Z18calcL2RowCumSqrSumPKfPfii
	.addrsig_sym _Z21calcLxRowCumGradntSumPKfPfii
	.addrsig_sym _Z21calcLyRowCumGradntSumPKfPfii
	.addrsig_sym _Z12calcSumTablePKfPfii
	.addrsig_sym _Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15calcL1RowCumSumPKfPfii ; -- Begin function _Z15calcL1RowCumSumPKfPfii
	.globl	_Z15calcL1RowCumSumPKfPfii
	.p2align	8
	.type	_Z15calcL1RowCumSumPKfPfii,@function
_Z15calcL1RowCumSumPKfPfii:             ; @_Z15calcL1RowCumSumPKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mul_lo_u32 v0, v1, s2
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[0:1], off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, v4, v5
	global_store_b32 v[2:3], v4, off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15calcL1RowCumSumPKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15calcL1RowCumSumPKfPfii, .Lfunc_end0-_Z15calcL1RowCumSumPKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 216
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18calcL2RowCumSqrSumPKfPfii ; -- Begin function _Z18calcL2RowCumSqrSumPKfPfii
	.globl	_Z18calcL2RowCumSqrSumPKfPfii
	.p2align	8
	.type	_Z18calcL2RowCumSqrSumPKfPfii,@function
_Z18calcL2RowCumSqrSumPKfPfii:          ; @_Z18calcL2RowCumSqrSumPKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB1_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mul_lo_u32 v0, v1, s2
	v_mov_b32_e32 v4, 0
	s_mov_b32 s3, 0x3e76c4e1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[0:1], off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s2, s2, -1
	s_waitcnt vmcnt(0)
	v_frexp_mant_f32_e64 v7, |v5|
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v5
	v_frexp_exp_i32_f32_e32 v8, v5
	v_cmp_class_f32_e64 s4, v5, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_gt_f32_e64 s0, 0x3f2aaaab, v7
	v_cndmask_b32_e64 v6, 2.0, 1.0, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v10, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_trunc_f32_e32 v12, v6
	v_subrev_co_ci_u32_e64 v8, s0, 0, v8, s0
	v_cndmask_b32_e64 v9, 0x7f800000, 0, vcc_lo
	v_ldexp_f32 v7, v7, v10
	v_mul_f32_e32 v11, 0.5, v6
	v_cmp_eq_f32_e64 s0, v12, v6
	v_cvt_f32_i32_e32 v8, v8
	s_or_b32 vcc_lo, vcc_lo, s4
	v_add_f32_e32 v12, 1.0, v7
	v_trunc_f32_e32 v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v13, v12
	v_cmp_neq_f32_e64 s1, v10, v11
	v_dual_add_f32 v10, -1.0, v7 :: v_dual_add_f32 v11, -1.0, v12
	v_mul_f32_e32 v14, 0x3f317218, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_and_b32 s1, s0, s1
	s_cmp_lg_u32 s2, 0
	v_sub_f32_e32 v7, v7, v11
	v_cndmask_b32_e64 v16, 0, v5, s1
	v_fma_f32 v11, 0x3f317218, v8, -v14
	v_cndmask_b32_e64 v15, 1.0, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v9, 0x7fffffff, v9, v16
	v_dual_mul_f32 v16, v10, v13 :: v_dual_fmac_f32 v11, 0xb102e308, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v8, v12, v16 :: v_dual_add_f32 v17, v14, v11
	v_fma_f32 v12, v16, v12, -v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v12, v16, v7
	v_sub_f32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v7, v11, v14
	v_add_f32_e32 v11, v8, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v14, v10, v11
	v_sub_f32_e32 v8, v11, v8
	v_sub_f32_e32 v10, v10, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v8, v8, v12
	v_sub_f32_e32 v10, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v10
	v_add_f32_e32 v8, v14, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v13, v8
	v_add_f32_e32 v10, v16, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v11, v10, v16
	v_mul_f32_e32 v12, v10, v10
	v_ldexp_f32 v13, v10, 1
	v_sub_f32_e32 v8, v8, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, v10, v10, -v12
	v_add_f32_e32 v14, v8, v8
	v_ldexp_f32 v16, v8, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v10, v14
	v_add_f32_e32 v14, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmaak_f32 v18, s3, v14, 0x3e91f4c4
	v_sub_f32_e32 v12, v14, v12
	v_mul_f32_e32 v19, v10, v14
	v_dual_fmaak_f32 v18, v14, v18, 0x3ecccdef :: v_dual_sub_f32 v11, v11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, v14, v10, -v19
	v_mul_f32_e32 v20, v14, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v14, v8
	v_fma_f32 v8, v14, v18, -v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v11, v10
	v_fmac_f32_e32 v8, v11, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v19, v12
	v_dual_add_f32 v11, v20, v8 :: v_dual_sub_f32 v14, v10, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v18, v11, v20 :: v_dual_add_f32 v19, 0x3f2aaaaa, v11
	v_sub_f32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v8, v8, v18
	v_add_f32_e32 v14, 0xbf2aaaaa, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v8, 0x31739010, v8 :: v_dual_sub_f32 v11, v11, v14
	v_add_f32_e32 v8, v8, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v19, v8
	v_sub_f32_e32 v14, v19, v11
	v_mul_f32_e32 v18, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v8, v8, v14
	v_fma_f32 v14, v10, v11, -v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v10, v8
	v_fmac_f32_e32 v14, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v18, v14
	v_dual_add_f32 v10, v13, v8 :: v_dual_sub_f32 v11, v8, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v10, v13
	v_dual_sub_f32 v11, v14, v11 :: v_dual_sub_f32 v8, v8, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v16, v11
	v_add_f32_e32 v8, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v10, v8
	v_add_f32_e32 v12, v17, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v10, v11, v10 :: v_dual_sub_f32 v13, v12, v17
	v_sub_f32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v12, v13
	v_add_f32_e32 v14, v7, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v11, v11, v13 :: v_dual_sub_f32 v10, v17, v10
	v_dual_sub_f32 v13, v14, v7 :: v_dual_add_f32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v11, v14, v13
	v_sub_f32_e32 v8, v8, v13
	v_dual_add_f32 v10, v14, v10 :: v_dual_sub_f32 v7, v7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v12, v10
	v_dual_add_f32 v7, v8, v7 :: v_dual_sub_f32 v8, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v10, v8
	v_add_f32_e32 v7, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v11, v7
	v_dual_sub_f32 v10, v8, v11 :: v_dual_mul_f32 v11, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v7, v10
	v_fma_f32 v8, v6, v8, -v11
	v_cmp_class_f32_e64 s1, v11, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v6, v7
	v_add_f32_e32 v6, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v6, v11, s1
	v_sub_f32_e32 v6, v6, v11
	v_cmp_eq_f32_e64 s1, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v8, v6
	v_cndmask_b32_e64 v10, 0, 0x37000000, s1
	v_cmp_neq_f32_e64 s1, 0x7f800000, |v7|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v7, v10
	v_cndmask_b32_e64 v6, 0, v6, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v8, 0x3fb8aa3b, v7
	v_add_f32_e32 v6, v10, v6
	v_cmp_ngt_f32_e64 s1, 0xc2ce8ed0, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v10, 0x3fb8aa3b, v7, -v8
	v_rndne_f32_e32 v11, v8
	v_fmac_f32_e32 v10, 0x32a5705f, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v8, v8, v11
	v_add_f32_e32 v8, v8, v10
	v_cvt_i32_f32_e32 v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v8, v10
	v_cndmask_b32_e64 v8, 0, v8, s1
	v_cmp_nlt_f32_e64 s1, 0x42b17218, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0x7f800000, v8, s1
	v_fma_f32 v6, v7, v6, v7
	v_cmp_eq_f32_e64 s1, 0x7f800000, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, v6, v7, s1
	v_bfi_b32 v6, 0x7fffffff, v6, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v7, 0x7fc00000, v6, s0
	v_cmp_gt_f32_e64 s0, 0, v5
	v_cndmask_b32_e64 v6, v6, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v9, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v5, v5
	v_cndmask_b32_e32 v5, 0x7fc00000, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	global_store_b32 v[2:3], v4, off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc1 .LBB1_2
.LBB1_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18calcL2RowCumSqrSumPKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18calcL2RowCumSqrSumPKfPfii, .Lfunc_end1-_Z18calcL2RowCumSqrSumPKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1308
; NumSgprs: 18
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21calcLxRowCumGradntSumPKfPfii ; -- Begin function _Z21calcLxRowCumGradntSumPKfPfii
	.globl	_Z21calcLxRowCumGradntSumPKfPfii
	.p2align	8
	.type	_Z21calcLxRowCumGradntSumPKfPfii,@function
_Z21calcLxRowCumGradntSumPKfPfii:       ; @_Z21calcLxRowCumGradntSumPKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_mov_b32 s3, 0
	s_and_b32 s4, vcc_lo, s4
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mul_lo_u32 v0, v1, s2
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[0:1], off
	v_cvt_f32_i32_e32 v6, s3
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, s3
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v5, v6
	global_store_b32 v[2:3], v4, off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc1 .LBB2_2
.LBB2_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21calcLxRowCumGradntSumPKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z21calcLxRowCumGradntSumPKfPfii, .Lfunc_end2-_Z21calcLxRowCumGradntSumPKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21calcLyRowCumGradntSumPKfPfii ; -- Begin function _Z21calcLyRowCumGradntSumPKfPfii
	.globl	_Z21calcLyRowCumGradntSumPKfPfii
	.p2align	8
	.type	_Z21calcLyRowCumGradntSumPKfPfii,@function
_Z21calcLyRowCumGradntSumPKfPfii:       ; @_Z21calcLyRowCumGradntSumPKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_gt_i32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_cselect_b32 s3, -1, 0
	s_and_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB3_3
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mul_lo_u32 v2, v1, s2
	v_cvt_f32_i32_e32 v4, v1
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[0:1], off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s2, s2, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v6, v4
	global_store_b32 v[2:3], v5, off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc1 .LBB3_2
.LBB3_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21calcLyRowCumGradntSumPKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z21calcLyRowCumGradntSumPKfPfii, .Lfunc_end3-_Z21calcLyRowCumGradntSumPKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12calcSumTablePKfPfii ; -- Begin function _Z12calcSumTablePKfPfii
	.globl	_Z12calcSumTablePKfPfii
	.p2align	8
	.type	_Z12calcSumTablePKfPfii,@function
_Z12calcSumTablePKfPfii:                ; @_Z12calcSumTablePKfPfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_gt_i32 s4, 1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v1
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB4_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_add_i32 s4, s4, -1
.LBB4_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s4, 0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v0, v[2:3], off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v2
	global_store_b32 v[4:5], v0, off
	s_cbranch_scc1 .LBB4_2
.LBB4_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12calcSumTablePKfPfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12calcSumTablePKfPfii, .Lfunc_end4-_Z12calcSumTablePKfPfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_ ; -- Begin function _Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.globl	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
	.p2align	8
	.type	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_,@function
_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_: ; @_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b64 s[6:7], s[0:1], 0x30
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_sub_i32 s16, s4, s6
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_sub_i32 s2, s5, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, s16, v0
	v_cmp_ge_i32_e64 s2, s2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_26
; %bb.1:
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v6, -1, v1
	v_ashrrev_i32_e32 v5, 31, v0
	s_load_b256 s[8:15], s[0:1], 0x10
	s_ashr_i32 s2, s6, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, s7, v6
	v_add_co_u32 v15, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v16, vcc_lo, s2, v5, vcc_lo
	v_mul_lo_u32 v14, v2, s4
	v_cmp_gt_i32_e64 s3, 1, v0
	v_mov_b32_e32 v12, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v17, 31, v14
	v_add_co_u32 v2, vcc_lo, v14, v15
	v_add_co_ci_u32_e32 v3, vcc_lo, v17, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v3, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0, v0
	global_load_b32 v4, v[7:8], off offset:-4
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB5_3
; %bb.2:
	v_add_co_u32 v7, s2, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s2, v17, v5, s2
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s2, s8, v7
	v_add_co_ci_u32_e64 v8, s2, s9, v8, s2
	global_load_b32 v13, v[7:8], off offset:-4
.LBB5_3:
	s_or_b32 exec_lo, exec_lo, s5
	v_mul_lo_u32 v18, v6, s4
	v_cmp_gt_i32_e64 s4, 1, v1
	v_cmp_lt_i32_e64 s2, 0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	s_and_saveexec_b32 s17, s2
	s_cbranch_execz .LBB5_5
; %bb.4:
	v_add_co_u32 v6, s5, v18, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s5, v19, v16, s5
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s5, s8, v6
	v_add_co_ci_u32_e64 v7, s5, s9, v7, s5
	global_load_b32 v12, v[6:7], off offset:-4
.LBB5_5:
	s_or_b32 exec_lo, exec_lo, s17
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v20, 0
	s_or_b32 s3, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s3, -1
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB5_7
; %bb.6:
	v_add_co_u32 v7, s3, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s3, v19, v5, s3
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v7, s3, s8, v7
	v_add_co_ci_u32_e64 v8, s3, s9, v8, s3
	global_load_b32 v20, v[7:8], off offset:-4
.LBB5_7:                                ; %_Z8computeSPfiiiiii.exit
	s_or_b32 exec_lo, exec_lo, s5
	v_add_co_u32 v7, s3, s10, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s3, s11, v3, s3
	global_load_b32 v7, v[7:8], off offset:-4
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB5_9
; %bb.8:
	v_add_co_u32 v8, s3, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s3, v17, v5, s3
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s3, s10, v8
	v_add_co_ci_u32_e64 v9, s3, s11, v9, s3
	global_load_b32 v6, v[8:9], off offset:-4
.LBB5_9:
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, 0
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB5_11
; %bb.10:
	v_add_co_u32 v9, s3, v18, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s3, v19, v16, s3
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v9, s3, s10, v9
	v_add_co_ci_u32_e64 v10, s3, s11, v10, s3
	global_load_b32 v9, v[9:10], off offset:-4
.LBB5_11:
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB5_13
; %bb.12:
	v_add_co_u32 v10, s3, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s3, v19, v5, s3
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s3, s10, v10
	v_add_co_ci_u32_e64 v11, s3, s11, v11, s3
	global_load_b32 v8, v[10:11], off offset:-4
.LBB5_13:                               ; %_Z8computeSPfiiiiii.exit79
	s_or_b32 exec_lo, exec_lo, s5
	v_add_co_u32 v10, s3, s12, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s3, s13, v3, s3
	v_dual_mov_b32 v22, 0 :: v_dual_mov_b32 v23, 0
	global_load_b32 v21, v[10:11], off offset:-4
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB5_15
; %bb.14:
	v_add_co_u32 v10, s3, v14, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s3, v17, v5, s3
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s3, s12, v10
	v_add_co_ci_u32_e64 v11, s3, s13, v11, s3
	global_load_b32 v23, v[10:11], off offset:-4
.LBB5_15:
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB5_17
; %bb.16:
	v_add_co_u32 v10, s3, v18, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s3, v19, v16, s3
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s3, s12, v10
	v_add_co_ci_u32_e64 v11, s3, s13, v11, s3
	global_load_b32 v22, v[10:11], off offset:-4
.LBB5_17:
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v10, 0
	v_mov_b32_e32 v24, 0
	s_and_saveexec_b32 s5, s4
	s_cbranch_execz .LBB5_19
; %bb.18:
	v_add_co_u32 v24, s3, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v25, s3, v19, v5, s3
	v_lshlrev_b64 v[24:25], 2, v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v24, s3, s12, v24
	v_add_co_ci_u32_e64 v25, s3, s13, v25, s3
	global_load_b32 v24, v[24:25], off offset:-4
.LBB5_19:                               ; %_Z8computeSPfiiiiii.exit81
	s_or_b32 exec_lo, exec_lo, s5
	v_add_co_u32 v2, s3, s14, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s3, s15, v3, s3
	global_load_b32 v11, v[2:3], off offset:-4
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB5_21
; %bb.20:
	v_add_co_u32 v2, vcc_lo, v14, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, v17, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s14, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	global_load_b32 v10, v[2:3], off offset:-4
.LBB5_21:
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v14, 0 :: v_dual_mov_b32 v17, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB5_23
; %bb.22:
	v_add_co_u32 v2, vcc_lo, v18, v15
	v_add_co_ci_u32_e32 v3, vcc_lo, v19, v16, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s14, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	global_load_b32 v17, v[2:3], off offset:-4
.LBB5_23:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB5_25
; %bb.24:
	v_add_co_u32 v2, vcc_lo, v18, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, v19, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s14, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	global_load_b32 v14, v[2:3], off offset:-4
.LBB5_25:                               ; %_Z8computeSPfiiiiii.exit83
	s_or_b32 exec_lo, exec_lo, s2
	v_cvt_f64_i32_e32 v[2:3], v0
	v_cvt_f64_i32_e32 v[15:16], s6
	s_waitcnt vmcnt(1)
	v_dual_sub_f32 v5, v21, v23 :: v_dual_sub_f32 v4, v4, v13
	s_mul_i32 s2, s7, s6
	v_sub_f32_e32 v6, v7, v6
	s_mul_i32 s3, s2, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v5, v5, v22 :: v_dual_sub_f32 v4, v4, v12
	v_cvt_f64_i32_e32 v[22:23], s7
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v10, v11, v10
	v_dual_sub_f32 v6, v6, v9 :: v_dual_add_f32 v5, v5, v24
	v_add_f32_e32 v26, v4, v20
	s_load_b64 s[4:5], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v10, v10, v17
	v_add_f32_e32 v8, v6, v8
	v_cvt_f64_f32_e32 v[4:5], v5
	v_cvt_f64_f32_e32 v[12:13], v26
	s_load_b64 s[0:1], s[0:1], 0x38
	v_add_f32_e32 v10, v10, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[10:11], v10
	v_fma_f64 v[2:3], v[15:16], 0.5, v[2:3]
	v_fma_f64 v[4:5], -v[2:3], v[12:13], v[4:5]
	v_cvt_f64_i32_e32 v[2:3], s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], 4.0
	v_div_scale_f64 v[15:16], null, v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[18:19], v[15:16]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[20:21], -v[15:16], v[18:19], 1.0
	v_fma_f64 v[18:19], v[18:19], v[20:21], v[18:19]
	v_cvt_f64_i32_e32 v[20:21], v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[24:25], -v[15:16], v[18:19], 1.0
	v_fma_f64 v[20:21], v[22:23], 0.5, v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[4:5], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[18:19], v[24:25], v[18:19]
	v_fma_f64 v[10:11], -v[20:21], v[12:13], v[10:11]
	v_cvt_f32_i32_e32 v25, s2
	s_mul_i32 s2, s2, s7
	s_waitcnt lgkmcnt(0)
	s_load_b128 s[4:7], s[4:5], 0x0
	v_cvt_f64_i32_e32 v[19:20], s2
	v_div_scale_f32 v24, null, v25, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v27, v24
	v_mul_f64 v[12:13], v[22:23], v[17:18]
	v_mul_f64 v[10:11], v[10:11], 4.0
	v_fma_f64 v[14:15], -v[15:16], v[12:13], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v24, v27, 1.0
	v_div_scale_f32 v23, s2, v26, v25, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v27, v16, v27
	v_mul_f32_e32 v16, v23, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, -v24, v16, v23
	v_fmac_f32_e32 v16, v21, v27
	v_div_scale_f64 v[21:22], null, v[19:20], v[19:20], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f32 v23, -v24, v16, v23
	v_div_fmas_f64 v[12:13], v[14:15], v[17:18], v[12:13]
	s_mov_b32 vcc_lo, s2
	s_mov_b32 s2, 0x3e76c4e1
	v_div_fmas_f32 v14, v23, v27, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v18, v14, v25, v26
	v_frexp_mant_f32_e64 v14, |v18|
	v_cmp_eq_f32_e64 s3, 1.0, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v14
	v_cndmask_b32_e64 v15, 0, 1, vcc_lo
	v_ldexp_f32 v16, v14, v15
	v_rcp_f64_e32 v[14:15], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v17, 1.0, v16
	v_add_f32_e32 v24, -1.0, v16
	v_rcp_f32_e32 v23, v17
	v_add_f32_e32 v27, -1.0, v17
	v_div_fixup_f64 v[2:3], v[12:13], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v16, v27
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v26, v24, v23
	v_mul_f32_e32 v28, v17, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, v26, v17, -v28
	v_fmac_f32_e32 v27, v26, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v29, v28, v27
	v_fma_f64 v[16:17], -v[21:22], v[14:15], 1.0
	v_sub_f32_e32 v30, v24, v29
	v_sub_f32_e32 v28, v29, v28
	v_cvt_f32_f64_e32 v2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v24, v24, v30
	v_sub_f32_e32 v27, v28, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v24, v24, v29
	v_add_f32_e32 v24, v27, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v24, v30, v24
	v_mul_f32_e32 v23, v23, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v27, v26, v23
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_sub_f32_e32 v24, v27, v26
	v_mul_f32_e32 v26, v27, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v28, v23, v24
	v_fma_f32 v16, v27, v27, -v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v17, v28, v28
	v_fmac_f32_e32 v16, v27, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v23, v26, v16
	v_dual_fmaak_f32 v17, s2, v23, 0x3e91f4c4 :: v_dual_sub_f32 v24, v23, v26
	v_mul_f32_e32 v32, v27, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v17, v23, v17, 0x3ecccdef :: v_dual_sub_f32 v24, v16, v24
	v_fma_f32 v33, v23, v27, -v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v26, v23, v17
	v_fmac_f32_e32 v33, v23, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v29, v23, v17, -v26
	v_fmac_f32_e32 v29, v24, v17
	v_fma_f64 v[16:17], -v[21:22], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v30, v26, v29
	v_add_f32_e32 v31, 0x3f2aaaaa, v30
	v_sub_f32_e32 v26, v30, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v26, v29, v26 :: v_dual_add_f32 v29, 0xbf2aaaaa, v31
	v_dual_add_f32 v26, 0x31739010, v26 :: v_dual_sub_f32 v29, v30, v29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v26, v26, v29
	v_add_f32_e32 v29, v31, v26
	v_fmac_f32_e32 v33, v24, v27
	v_div_scale_f64 v[23:24], s2, v[10:11], v[19:20], v[10:11]
	v_ldexp_f32 v28, v28, 1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v31, v31, v29
	v_add_f32_e32 v30, v32, v33
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v17, v26, v31
	v_mul_f32_e32 v34, v30, v29
	v_sub_f32_e32 v16, v30, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v26, v30, v29, -v34
	v_sub_f32_e32 v16, v33, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v26, v30, v17
	v_frexp_exp_i32_f32_e32 v17, v18
	v_fmac_f32_e32 v26, v16, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v16, vcc_lo, 0, v17, vcc_lo
	v_ldexp_f32 v17, v27, 1
	v_add_f32_e32 v27, v34, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v16, v16
	v_dual_add_f32 v29, v17, v27 :: v_dual_sub_f32 v30, v27, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v31, 0x3f317218, v16
	v_dual_sub_f32 v17, v29, v17 :: v_dual_sub_f32 v26, v26, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v30, 0x3f317218, v16, -v31
	v_dual_sub_f32 v17, v27, v17 :: v_dual_add_f32 v26, v28, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmamk_f32 v27, v16, 0xb102e308, v30 :: v_dual_add_f32 v26, v26, v17
	v_add_f32_e32 v28, v31, v27
	v_mul_f64 v[16:17], v[23:24], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v6, v28, v31
	v_div_scale_f32 v31, null, v25, v25, v8
	v_sub_f32_e32 v27, v27, v6
	v_add_f32_e32 v30, v29, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v32, v28, v30 :: v_dual_sub_f32 v9, v30, v29
	v_sub_f32_e32 v7, v32, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v26, v9
	v_rcp_f32_e32 v26, v31
	v_sub_f32_e32 v29, v32, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_sub_f32 v6, v30, v7 :: v_dual_sub_f32 v7, v28, v29
	v_add_f32_e32 v28, v27, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v33, -v31, v26, 1.0
	v_add_f32_e32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v29, v28, v27 :: v_dual_fmac_f32 v26, v33, v26
	v_add_f32_e32 v30, v28, v6
	v_fma_f64 v[6:7], -v[21:22], v[16:17], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v21, v28, v29
	v_div_scale_f32 v23, vcc_lo, v8, v25, v8
	v_dual_add_f32 v22, v32, v30 :: v_dual_sub_f32 v9, v9, v29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v21, v27, v21
	v_dual_mul_f32 v27, v23, v26 :: v_dual_sub_f32 v24, v22, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v9, v21
	v_sub_f32_e32 v21, v30, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v24, -v31, v27, v23
	v_add_f32_e32 v9, v9, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v27, v24, v26
	v_cndmask_b32_e64 v24, 2.0, 1.0, s3
	v_add_f32_e32 v21, v22, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v23, -v31, v27, v23
	v_sub_f32_e32 v22, v21, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v28, v24, v21
	v_div_fmas_f32 v23, v23, v26, v27
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v9, v9, v22
	v_fma_f32 v21, v24, v21, -v28
	v_div_fmas_f64 v[6:7], v[6:7], v[14:15], v[16:17]
	v_cmp_class_f32_e64 vcc_lo, v28, 0x204
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v21, v24, v9
	v_add_f32_e32 v9, v28, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v9, v28, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v14
	v_cndmask_b32_e64 v15, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v14|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v16, v14, v15
	v_mul_f32_e32 v17, 0x3fb8aa3b, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f32 v22, 0x3fb8aa3b, v16, -v17
	v_rndne_f32_e32 v26, v17
	v_div_fixup_f64 v[4:5], v[6:7], v[19:20], v[10:11]
	v_trunc_f32_e32 v10, v24
	v_dual_fmamk_f32 v6, v16, 0x32a5705f, v22 :: v_dual_sub_f32 v7, v17, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v6, v7, v6 :: v_dual_sub_f32 v7, v9, v28
	v_cvt_i32_f32_e32 v9, v26
	v_exp_f32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v7, v21, v7
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v16
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v6, v6, v9
	v_mul_f32_e32 v9, 0.5, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v7, v15, v7 :: v_dual_cndmask_b32 v6, 0, v6
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v16
	v_trunc_f32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v6, 0x7f800000, v6, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, v10, v24
	v_cmp_neq_f32_e64 s2, v11, v9
	v_cvt_f32_f64_e32 v4, v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v3, v6, v7, v6
	v_cmp_eq_f32_e64 s3, 0x7f800000, v6
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v5, 1.0, v18, s2
	v_cndmask_b32_e64 v3, v3, v6, s3
	v_cmp_eq_f32_e64 s3, 0, v18
	v_cndmask_b32_e64 v6, 0, v18, s2
	v_cmp_class_f32_e64 s2, v18, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_bfi_b32 v3, 0x7fffffff, v3, v5
	v_cndmask_b32_e64 v5, 0x7f800000, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, 0x7fc00000, v3, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v18
	v_bfi_b32 v5, 0x7fffffff, v5, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	s_or_b32 vcc_lo, s3, s2
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v18, v18
	v_div_fixup_f32 v5, v23, v25, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, 0x7fc00000, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v4, s7, v4 :: v_dual_sub_f32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_sub_f32 v5, s4, v18 :: v_dual_and_b32 v8, 0x7fffffff, v4
	v_dual_sub_f32 v3, s5, v3 :: v_dual_sub_f32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_and_b32_e32 v6, 0x7fffffff, v5
	v_cmp_class_f32_e64 s2, v5, 0x204
	v_cmp_class_f32_e64 s5, v4, 0x204
	v_and_b32_e32 v9, 0x7fffffff, v3
	v_and_b32_e32 v7, 0x7fffffff, v2
	v_cmp_class_f32_e64 s3, v3, 0x204
	v_cmp_class_f32_e64 s4, v2, 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_max_u32_e32 v11, v6, v9
	v_max_u32_e32 v10, v7, v8
	v_min_u32_e32 v7, v7, v8
	v_min_u32_e32 v6, v6, v9
	s_or_b32 s2, s2, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_max_u32_e32 v12, v11, v10
	v_min_u32_e32 v9, v11, v10
	v_max_u32_e32 v10, v6, v7
	v_min_u32_e32 v6, v6, v7
	s_or_b32 s2, s2, s4
	v_frexp_exp_i32_f32_e32 v8, v12
	s_or_b32 s2, s2, s5
	v_min_u32_e32 v11, v10, v9
	v_max_u32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v7, 0, v8
	v_ldexp_f32 v6, v6, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f32 v10, v11, v7
	v_ldexp_f32 v9, v9, v7
	v_ldexp_f32 v7, v12, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v6, v6
	v_fmac_f32_e32 v6, v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, v9, v9
	v_mul_lo_u32 v9, v1, s16
	v_fmac_f32_e32 v6, v7, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v0, v9, v1, v0
	v_sqrt_f32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v6, v8
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, 0x7f800000, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB5_26:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 35
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_, .Lfunc_end5-_Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3188
; NumSgprs: 20
; NumVgprs: 35
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 35
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15calcL1RowCumSumPKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15calcL1RowCumSumPKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18calcL2RowCumSqrSumPKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18calcL2RowCumSqrSumPKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21calcLxRowCumGradntSumPKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21calcLxRowCumGradntSumPKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21calcLyRowCumGradntSumPKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21calcLyRowCumGradntSumPKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
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        .size:           4
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        .size:           4
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        .size:           2
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12calcSumTablePKfPfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12calcSumTablePKfPfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
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    .language:       OpenCL C
    .language_version:
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      - 0
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    .name:           _Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z26calculateFeatureDifferencePfiiS_S_S_S_iiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     35
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
