#include <algorithm>
#include <fstream>
#include <iostream>
#include <sstream>
#include <vector>
#define THREADS 64
// Error check-----
#define gpuErrchk(ans)                                                         \
  { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line,
                      bool abort = true) {
  if (code != cudaSuccess) {
    fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file,
            line);
    if (abort)
      exit(code);
  }
}
// Error check-----
// This is a very good idea to wrap your calls with that function.. Otherwise
// you will not b Moreover, you may also want to look at how to use
// cuda-memcheck and cuda-gdb for debuggin

__global__ void deviceDFSk5(int *xadj, int *adj, int *nov, int *counter) {
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  __shared__ int ct[THREADS];
  if (id < *nov) {
    ct[threadIdx.x] = 0;
    for (int i = xadj[id]; i < xadj[id + 1]; i++) {
      // adj[i] are the neighbors of id vertex, none can be id by
      // definition (no loops of len-1)
      if (adj[i] != id) {
        for (int j = xadj[adj[i]]; j < xadj[adj[i] + 1]; j++) {
          // adj[j] are the neighbors of the second vertex on this path,
          // they can't be id.
          if (adj[j] != adj[i] && adj[j] != id) {
            for (int k = xadj[adj[j]]; k < xadj[adj[j] + 1]; k++) {
              // adj[k] are the neighbors of the third vertex,
              // they can't be equal to id or the second.
              if (adj[k] != adj[j] && adj[k] != adj[i] && adj[k] != id) {
                for (int l = xadj[adj[k]]; l < xadj[adj[k] + 1]; l++) {
                  // adj[l] are the neighbors of the fourth vertex,
                  // they can't be equal to id second or the third.
                  if (adj[l] != adj[k] && adj[l] != adj[j] &&
                      adj[l] != adj[i] && adj[l] != id) {
                    for (int m = xadj[adj[l]]; m < xadj[adj[l] + 1]; m++) {
                      // adj[l] are the neighbors of the fourth vertex,
                      // they can't be equal to id second or the third.
                      if (adj[m] == id) {
                        ct[threadIdx.x]++;
                      }
                    }
                  }
                }
              }
            }
          }
        }
      }
    }
    counter[id] = ct[threadIdx.x];
  }
}

__global__ void deviceDFSk4(int *xadj, int *adj, int *nov, int *counter) {
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  __shared__ int ct[THREADS];
  if (id < *nov) {
    ct[threadIdx.x] = 0;
    for (int i = xadj[id]; i < xadj[id + 1]; i++) {
      // adj[i] are the neighbors of id vertex, none can be id by
      // definition (no loops of len-1)
      if (adj[i] != id) {
        for (int j = xadj[adj[i]]; j < xadj[adj[i] + 1]; j++) {
          // adj[j] are the neighbors of the second vertex on this path,
          // they can't be id.
          if (adj[j] != adj[i] && adj[j] != id) {
            for (int k = xadj[adj[j]]; k < xadj[adj[j] + 1]; k++) {
              // adj[k] are the neighbors of the third vertex,
              // they can't be equal to id or the second.
              if (adj[k] != adj[j] && adj[k] != adj[i] && adj[k] != id) {
                for (int l = xadj[adj[k]]; l < xadj[adj[k] + 1]; l++) {
                  // adj[l] are the neighbors of the fourth vertex,
                  if (adj[l] == id) {
                    ct[threadIdx.x]++;
                  }
                }
              }
            }
          }
        }
      }
    }
    counter[id] = ct[threadIdx.x];
  }
}

__global__ void deviceDFSk3(int *xadj, int *adj, int *nov, int *counter) {
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  if (id < *nov) {

    for (int i = xadj[id]; i < xadj[id + 1]; i++) {
      if (adj[i] > id) {
        for (int j = xadj[adj[i]]; j < xadj[adj[i] + 1]; j++) {
          if (adj[j] > adj[i] && adj[j] > id) {
            for (int k = xadj[adj[j]]; k < xadj[adj[j] + 1]; k++) {
              if (adj[k] == id) {
                atomicAdd(&counter[id], 2);
                atomicAdd(&counter[adj[i]], 2);
                atomicAdd(&counter[adj[j]], 2);
              }
            }
          }
        }
      }
    }
  }
}

void wrapper(int *xadj, int *adj, int *nov, int nnz, int k) {
  cudaSetDevice(0);
  int *d_xadj;
  int *d_adj;
  int *d_nov;
  int *d_ct;
  int *ct = new int[*nov];
  cudaMalloc((void **)&d_xadj, (*nov + 1) * sizeof(int));
  cudaMalloc((void **)&d_adj, nnz * sizeof(int));
  cudaMalloc((void **)&d_nov, sizeof(int));
  cudaMalloc((void **)&d_ct, (*nov) * sizeof(int));
  if (k == 3) {
    /*not that necessary, to ensure d_ct is set to zero in the least amount of
     * lines possible for k=3*/
    memset(ct, 0, (*nov) * sizeof(int));
    cudaMemcpy(d_ct, ct, (*nov) * sizeof(int), cudaMemcpyHostToDevice);
  }
  cudaMemcpy(d_xadj, xadj, (*nov + 1) * sizeof(int), cudaMemcpyHostToDevice);
  cudaMemcpy(d_adj, adj, (nnz) * sizeof(int), cudaMemcpyHostToDevice);
  cudaMemcpy(d_nov, nov, sizeof(int), cudaMemcpyHostToDevice);

  gpuErrchk(cudaDeviceSynchronize());
#ifdef DEBUG
  std::cout << "malloc copy done" << std::endl;
#endif
  gpuErrchk(cudaDeviceSynchronize());
  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventRecord(start, 0);
  if (k == 3)
    deviceDFSk3<<<(*nov + THREADS - 1) / THREADS, THREADS>>>(d_xadj, d_adj,
                                                             d_nov, d_ct);
  if (k == 4)
    deviceDFSk4<<<(*nov + THREADS - 1) / THREADS, THREADS>>>(d_xadj, d_adj,
                                                             d_nov, d_ct);
  if (k == 5)
    deviceDFSk5<<<(*nov + THREADS - 1) / THREADS, THREADS>>>(d_xadj, d_adj,
                                                             d_nov, d_ct);
  gpuErrchk(cudaDeviceSynchronize());
  cudaEventCreate(&stop);
  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);
  cudaMemcpy(ct, d_ct, (*nov) * sizeof(int), cudaMemcpyDeviceToHost);
  for (int i = 0; i < *nov; i++)
    printf("%d %d\n", i, ct[i]);
  float elapsedTime;
  cudaEventElapsedTime(&elapsedTime, start, stop);
  printf("GPU took: %f s\n", elapsedTime / 1000);
  cudaFree(d_xadj);
  cudaFree(d_adj);
  cudaFree(d_nov);
  cudaFree(d_ct);
}

/*Read the given file and return CSR*/
void *read_edges(char *bin_name, int k) {
  std::cout << "fname: " << bin_name << std::endl;

  // count the newlines
  unsigned int number_of_lines = 0;
  FILE *infile = fopen(bin_name, "r");
  int ch;
  while (EOF != (ch = getc(infile)))
    if ('\n' == ch)
      ++number_of_lines;
  ++number_of_lines;
#ifdef DEBUG
  std::cout << number_of_lines << " lines" << std::endl;
#endif
  fclose(infile);

  // read the first line, set it to no vertices.
  std::ifstream bp(bin_name);
  int *no_vertices = new int;
  std::string line;

  int i, j, max = 0;
  for (int iter = 0; iter < number_of_lines; iter++) {
    std::getline(bp, line);
    std::istringstream myss(line);
    if (!(myss >> i >> j)) {
      break;
    }
    if (i > max)
      max = i;
    if (j > max)
      max = j;
  }
  bp.clear();
  bp.seekg(0);
  *no_vertices = max + 1;
  int no_edges = (number_of_lines)*2; // bidirectional
  /*TODO unique and no loop decreases this, we should resize adj
   * accordingly. Not the end of the world, we will never reach those
   * indices.*/

  // if file ended with \n you'd keep it as is.

  std::vector<int> *A = new std::vector<int>[*no_vertices];
  // std::cout << "allocated A" << std::endl;

  for (int iter = 0; iter < number_of_lines; iter++) {
    std::getline(bp, line);
    std::istringstream myss(line);
    if (!(myss >> i >> j)) {
      break;
    }

#ifdef DEBUG
    std::cout << i << " " << j << std::endl;
#endif
    if (i != j) {
      // ignore diagonal edges
      A[i].push_back(j);
      A[j].push_back(i);
    }
  }
  for (int i = 0; i < *no_vertices; i++) {
    std::sort(A[i].begin(), A[i].end());
    // sort then unique.
    // you may have 3 1 and 1 3
    // if you do not sort, unique doesn't do what I think it would.
    // also we prefer them sorted in case the file has 1 2 before 1 0 or
    // sth. using default comparison:
    std::vector<int>::iterator it;
    it = std::unique(A[i].begin(), A[i].end());   // 10 20 30 20 10 ?  ?  ?  ?
                                                  //                ^
    A[i].resize(std::distance(A[i].begin(), it)); // 10 20 30 20 10
  }
  int sum = 0;
  int *xadj = new int[*no_vertices + 1]; // last one marks the end of the adj.
  int *adj = new int[no_edges]; // there are m+1 lines (m '\n's), 2m edges.
  xadj[0] = 0;
  for (int i = 0; i < *no_vertices; i++) {
    // adj.add_to_end(A[i])
    for (int j = 0; j < A[i].size(); j++) {
      adj[sum + j] = A[i][j];
    }
    sum += A[i].size();
    xadj[i + 1] = sum;
  }
  std::cout << "Done reading." << std::endl;
  wrapper(xadj, adj, no_vertices, no_edges, k);
  return 0;
}

int main(int argc, char *argv[]) {
  /*first arg is filename, second is k*/
  // omp_set_num_threads(8);
  read_edges(argv[1], atoi(argv[2]));
  return 0;
}
	.file	"tmpxft_00365d73_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4460:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4460:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_.isra.0, @function
_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_.isra.0:
.LFB5336:
	.cfi_startproc
	leaq	-1(%rdx), %rax
	movq	%rsi, %r9
	movl	%ecx, %r8d
	movq	%rdx, %rsi
	movl	$2, %ecx
	cqto
	idivq	%rcx
	movq	%r9, %rcx
.L3:
	cmpq	%rax, %rcx
	jge	.L11
	leaq	1(%rcx), %rdx
	addq	%rdx, %rdx
	movl	-4(%rdi,%rdx,4), %r11d
	leaq	-1(%rdx), %r10
	cmpl	%r11d, (%rdi,%rdx,4)
	cmovge	%rdx, %r10
	movl	(%rdi,%r10,4), %edx
	movl	%edx, (%rdi,%rcx,4)
	movq	%r10, %rcx
	jmp	.L3
.L11:
	testl	$1, %esi
	jne	.L6
	leaq	-2(%rsi), %rax
	movl	$2, %esi
	cqto
	idivq	%rsi
	cmpq	%rax, %rcx
	jne	.L6
	leaq	1(%rcx,%rcx), %rax
	movl	(%rdi,%rax,4), %edx
	movl	%edx, (%rdi,%rcx,4)
	movq	%rax, %rcx
.L6:
	leaq	-1(%rcx), %rax
	movl	$2, %esi
.L9:
	cqto
	idivq	%rsi
	leaq	(%rdi,%rcx,4), %rdx
	cmpq	%rcx, %r9
	jge	.L7
	movl	(%rdi,%rax,4), %ecx
	cmpl	%ecx, %r8d
	jle	.L7
	movl	%ecx, (%rdx)
	leaq	-1(%rax), %rdx
	movq	%rax, %rcx
	movq	%rdx, %rax
	jmp	.L9
.L7:
	movl	%r8d, (%rdx)
	ret
	.cfi_endproc
.LFE5336:
	.size	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_.isra.0, .-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_.isra.0
	.align 2
	.type	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0:
.LFB5338:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L13
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L14
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4611686018427387903, %rax
	cmpq	%rdi, %rax
	jnb	.L15
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L15:
	call	_ZSt17__throw_bad_allocv@PLT
.L14:
	.cfi_def_cfa_offset 8
	salq	$2, %rdi
	jmp	_Znwm@PLT
.L13:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5338:
	.size	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	.type	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0, @function
_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0:
.LFB5341:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	movq	240(%rdi,%rax), %rbx
	testq	%rbx, %rbx
	jne	.L20
	call	_ZSt16__throw_bad_castv@PLT
.L20:
	cmpb	$0, 56(%rbx)
	movq	%rdi, %rbp
	movq	%rsi, %r12
	je	.L21
	movb	67(%rbx), %al
	jmp	.L22
.L21:
	movq	%rbx, %rdi
	call	_ZNKSt5ctypeIcE13_M_widen_initEv@PLT
	movq	(%rbx), %rax
	movl	$10, %esi
	movq	%rbx, %rdi
	call	*48(%rax)
.L22:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movsbl	%al, %edx
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
	.cfi_endproc
.LFE5341:
	.size	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0, .-_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	.type	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.isra.0, @function
_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.isra.0:
.LFB5343:
	.cfi_startproc
	cmpq	%rsi, %rdi
	jne	.L36
	ret
.L36:
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$4, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	leaq	4(%rdi), %rbx
.L26:
	cmpq	%rbx, %r12
	je	.L40
	movl	(%rbx), %r13d
	movl	0(%rbp), %eax
	cmpl	%eax, %r13d
	jge	.L34
	movq	%rbx, %rdx
	subq	%rbp, %rdx
	cmpq	$4, %rdx
	jle	.L28
	movq	%r14, %rdi
	movq	%rbp, %rsi
	subq	%rdx, %rdi
	addq	%rbx, %rdi
	call	memmove@PLT
	jmp	.L29
.L28:
	jne	.L29
	movl	%eax, (%rbx)
.L29:
	movl	%r13d, 0(%rbp)
	jmp	.L30
.L34:
	movq	%rbx, %rax
.L27:
	movl	-4(%rax), %edx
	cmpl	%edx, %r13d
	jge	.L41
	movl	%edx, (%rax)
	subq	$4, %rax
	jmp	.L27
.L41:
	movl	%r13d, (%rax)
.L30:
	addq	$4, %rbx
	jmp	.L26
.L40:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5343:
	.size	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.isra.0, .-_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.isra.0
	.type	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_.isra.0, @function
_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_.isra.0:
.LFB5345:
	.cfi_startproc
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	leaq	4(%rdi), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
.L43:
	movq	%rbp, %rax
	subq	%rbx, %rax
	cmpq	$64, %rax
	jle	.L42
	movq	%rax, %r13
	sarq	$2, %r13
	testq	%r14, %r14
	jne	.L44
	leaq	-2(%r13), %r12
	sarq	%r12
.L46:
	movl	(%rbx,%r12,4), %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_.isra.0
	testq	%r12, %r12
	je	.L47
	decq	%r12
	jmp	.L46
.L47:
	movq	%rbp, %rax
	subq	$4, %rbp
	subq	%rbx, %rax
	cmpq	$4, %rax
	jle	.L42
	movl	(%rbx), %eax
	movl	0(%rbp), %ecx
	movq	%rbp, %rdx
	xorl	%esi, %esi
	subq	%rbx, %rdx
	movq	%rbx, %rdi
	movl	%eax, 0(%rbp)
	sarq	$2, %rdx
	call	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_.isra.0
	jmp	.L47
.L44:
	sarq	$3, %rax
	movl	4(%rbx), %edi
	movl	-4(%rbp), %ecx
	movq	%r12, %rdx
	leaq	(%rbx,%rax,4), %r8
	movl	(%rbx), %eax
	movl	(%r8), %esi
	cmpl	%esi, %edi
	jge	.L50
	cmpl	%esi, %ecx
	jg	.L56
	cmpl	%edi, %ecx
	jle	.L53
	jmp	.L64
.L50:
	cmpl	%edi, %ecx
	jle	.L55
.L53:
	movl	%edi, (%rbx)
	movl	%eax, 4(%rbx)
.L52:
	movq	%rbp, %rax
	jmp	.L54
.L55:
	cmpl	%esi, %ecx
	jle	.L56
.L64:
	movl	%ecx, (%rbx)
	movl	%eax, -4(%rbp)
	jmp	.L52
.L56:
	movl	%esi, (%rbx)
	movl	%eax, (%r8)
	jmp	.L52
.L59:
	movl	%esi, 0(%r13)
	movl	%ecx, (%rdx)
	leaq	4(%r13), %rdx
.L54:
	movl	(%rbx), %edi
.L57:
	movq	%rdx, %r13
	movl	(%rdx), %ecx
	leaq	4(%rdx), %rdx
	cmpl	%edi, %ecx
	jl	.L57
	subq	$4, %rax
.L58:
	movq	%rax, %rdx
	movl	(%rax), %esi
	subq	$4, %rax
	cmpl	%esi, %edi
	jl	.L58
	movq	%rdx, %rax
	cmpq	%rdx, %r13
	jb	.L59
	decq	%r14
	movq	%rbp, %rsi
	movq	%r13, %rdi
	movq	%r13, %rbp
	movq	%r14, %rdx
	call	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_.isra.0
	jmp	.L43
.L42:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5345:
	.size	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_.isra.0, .-_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_.isra.0
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB4440:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L71
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L65
	movl	%ebx, %edi
	call	exit@PLT
.L65:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L71:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4440:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_
	.type	_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_, @function
_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_:
.LFB4482:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11deviceDFSk5PiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L74:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4482:
	.size	_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_, .-_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_
	.globl	_Z11deviceDFSk5PiS_S_S_
	.type	_Z11deviceDFSk5PiS_S_S_, @function
_Z11deviceDFSk5PiS_S_S_:
.LFB4483:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE4483:
	.size	_Z11deviceDFSk5PiS_S_S_, .-_Z11deviceDFSk5PiS_S_S_
	.globl	_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_
	.type	_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_, @function
_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_:
.LFB4484:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L79
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11deviceDFSk4PiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L79:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
	call	__stack_chk_fail@PLT
.L81:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4484:
	.size	_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_, .-_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_
	.globl	_Z11deviceDFSk4PiS_S_S_
	.type	_Z11deviceDFSk4PiS_S_S_, @function
_Z11deviceDFSk4PiS_S_S_:
.LFB4485:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE4485:
	.size	_Z11deviceDFSk4PiS_S_S_, .-_Z11deviceDFSk4PiS_S_S_
	.globl	_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_
	.type	_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_, @function
_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_:
.LFB4486:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11deviceDFSk3PiS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L84:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L86
	call	__stack_chk_fail@PLT
.L86:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4486:
	.size	_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_, .-_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_
	.globl	_Z11deviceDFSk3PiS_S_S_
	.type	_Z11deviceDFSk3PiS_S_S_, @function
_Z11deviceDFSk3PiS_S_S_:
.LFB4487:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_
	.cfi_endproc
.LFE4487:
	.size	_Z11deviceDFSk3PiS_S_S_, .-_Z11deviceDFSk3PiS_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/hasimsait/CS406-Group-Project/main/kernel.cu"
.LC2:
	.string	"%d %d\n"
.LC4:
	.string	"GPU took: %f s\n"
	.text
	.globl	_Z7wrapperPiS_S_ii
	.type	_Z7wrapperPiS_S_ii, @function
_Z7wrapperPiS_S_ii:
.LFB4441:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%r8d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%ecx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	movslq	(%rbx), %rcx
	movabsq	$2305843009213693950, %rax
	cmpq	%rcx, %rax
	jb	.L90
	salq	$2, %rcx
	salq	$2, %rbp
	movq	%rcx, %rdi
	movq	%rcx, 8(%rsp)
	call	_Znam@PLT
	leaq	16(%rsp), %rdi
	movq	%rax, %r12
	movl	(%rbx), %eax
	leal	1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movslq	(%rbx), %rsi
	leaq	40(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	cmpl	$3, %r13d
	movq	8(%rsp), %rcx
	jne	.L92
	movslq	(%rbx), %rdx
	xorl	%esi, %esi
	movq	%r12, %rdi
	salq	$2, %rdx
	movq	%rdx, 8(%rsp)
	call	__memset_chk@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	jmp	.L92
.L90:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L104
	call	__cxa_throw_bad_array_new_length@PLT
.L92:
	movl	(%rbx), %eax
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	leal	1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	leaq	.LC1(%rip), %rbp
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$141, %edx
	movq	%rbp, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$145, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	cmpl	$3, %r13d
	jne	.L94
	movl	(%rbx), %eax
	movl	$64, %esi
	movl	$67108865, %ecx
	xorl	%r9d, %r9d
	salq	$6, %rcx
	xorl	%r8d, %r8d
	movl	$1, 80(%rsp)
	addl	$63, %eax
	movq	%rcx, 72(%rsp)
	cltd
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 60(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z11deviceDFSk3PiS_S_S_PiS_S_S_
	jmp	.L96
.L94:
	cmpl	$4, %r13d
	jne	.L97
	movl	(%rbx), %eax
	movl	$64, %esi
	movl	$67108865, %ecx
	xorl	%r9d, %r9d
	salq	$6, %rcx
	xorl	%r8d, %r8d
	movl	$1, 80(%rsp)
	addl	$63, %eax
	movq	%rcx, 72(%rsp)
	cltd
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 60(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z11deviceDFSk4PiS_S_S_PiS_S_S_
	jmp	.L96
.L97:
	cmpl	$5, %r13d
	jne	.L96
	movl	(%rbx), %eax
	movl	$64, %esi
	movl	$67108865, %ecx
	xorl	%r9d, %r9d
	salq	$6, %rcx
	xorl	%r8d, %r8d
	movl	$1, 80(%rsp)
	addl	$63, %eax
	movq	%rcx, 72(%rsp)
	cltd
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 60(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	60(%rsp), %rdi
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z11deviceDFSk5PiS_S_S_PiS_S_S_
.L96:
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$158, %edx
	movl	%eax, %edi
	xorl	%ebp, %ebp
	leaq	.LC2(%rip), %r13
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movslq	(%rbx), %rdx
	movq	40(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
.L100:
	movl	%ebp, %edx
	cmpl	%ebp, (%rbx)
	jle	.L105
	movl	(%r12,%rbp,4), %ecx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	jmp	.L100
.L105:
	movq	72(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	60(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	60(%rsp), %xmm0
	divss	.LC3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L102
.L104:
	call	__stack_chk_fail@PLT
.L102:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4441:
	.size	_Z7wrapperPiS_S_ii, .-_Z7wrapperPiS_S_ii
	.section	.rodata.str1.1
.LC5:
	.string	"_Z11deviceDFSk3PiS_S_S_"
.LC6:
	.string	"_Z11deviceDFSk4PiS_S_S_"
.LC7:
	.string	"_Z11deviceDFSk5PiS_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4489:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11deviceDFSk3PiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11deviceDFSk4PiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11deviceDFSk5PiS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4489:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.align 2
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, @function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc:
.LFB5157:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movq	%rdx, %rdi
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	movabsq	$2305843009213693951, %rax
	sarq	$2, %rcx
	movq	%rax, %rdx
	subq	%rcx, %rdx
	cmpq	%rsi, %rdx
	jnb	.L109
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt20__throw_length_errorPKc@PLT
.L109:
	.cfi_def_cfa_offset 8
	cmpq	%rcx, %rsi
	cmovb	%rcx, %rsi
	addq	%rsi, %rcx
	jc	.L108
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rcx
	cmovbe	%rcx, %rax
.L108:
	ret
	.cfi_endproc
.LFE5157:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.section	.rodata._ZNSt6vectorIiSaIiEE9push_backERKi.str1.1,"aMS",@progbits,1
.LC8:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorIiSaIiEE9push_backERKi,"axG",@progbits,_ZNSt6vectorIiSaIiEE9push_backERKi,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEE9push_backERKi
	.type	_ZNSt6vectorIiSaIiEE9push_backERKi, @function
_ZNSt6vectorIiSaIiEE9push_backERKi:
.LFB4846:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbx
	cmpq	16(%rdi), %rbx
	je	.L118
	movl	(%rsi), %eax
	addq	$4, %rbx
	movl	%eax, -4(%rbx)
	movq	%rbx, 8(%rdi)
	jmp	.L117
.L118:
	movq	%rsi, 8(%rsp)
	leaq	.LC8(%rip), %rdx
	movl	$1, %esi
	movq	%rbx, %r15
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%r14), %r12
	movq	8(%r14), %r13
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	8(%rsp), %r8
	subq	%r12, %r15
	movq	%rax, %rbp
	movl	(%r8), %eax
	movl	%eax, 0(%rbp,%r15)
	testq	%r15, %r15
	jle	.L120
	movq	%r15, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	memmove@PLT
.L120:
	subq	%rbx, %r13
	leaq	4(%rbp,%r15), %rdi
	testq	%r13, %r13
	jle	.L121
	movq	%r13, %rdx
	movq	%rbx, %rsi
	call	memmove@PLT
	movq	%rax, %rdi
.L121:
	addq	%rdi, %r13
	testq	%r12, %r12
	je	.L122
	movq	16(%r14), %rsi
	movq	%r12, %rdi
	subq	%r12, %rsi
	call	_ZdlPvm@PLT
.L122:
	movq	(%rsp), %rax
	movq	%rbp, (%r14)
	movq	%r13, 8(%r14)
	leaq	0(%rbp,%rax,4), %rax
	movq	%rax, 16(%r14)
.L117:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4846:
	.size	_ZNSt6vectorIiSaIiEE9push_backERKi, .-_ZNSt6vectorIiSaIiEE9push_backERKi
	.section	.text._ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_,"axG",@progbits,_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_,comdat
	.weak	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_
	.type	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_, @function
_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_:
.LFB5284:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	testq	%rsi, %rsi
	je	.L127
	xorl	%r8d, %r8d
	leaq	4(%rdi), %rax
	movl	%r8d, (%rdi)
	decq	%rsi
	je	.L127
	leaq	(%rax,%rsi,4), %rdx
	movq	%rax, %rcx
.L129:
	cmpq	%rcx, %rdx
	je	.L136
	xorl	%esi, %esi
	addq	$4, %rcx
	movl	%esi, -4(%rcx)
	jmp	.L129
.L136:
	subq	%rdi, %rdx
	leaq	-4(%rax,%rdx), %rax
.L127:
	ret
	.cfi_endproc
.LFE5284:
	.size	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_, .-_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_
	.section	.rodata._ZNSt6vectorIiSaIiEE17_M_default_appendEm.str1.1,"aMS",@progbits,1
.LC9:
	.string	"vector::_M_default_append"
	.section	.text._ZNSt6vectorIiSaIiEE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_default_appendEm,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEE17_M_default_appendEm
	.type	_ZNSt6vectorIiSaIiEE17_M_default_appendEm, @function
_ZNSt6vectorIiSaIiEE17_M_default_appendEm:
.LFB5052:
	.cfi_startproc
	endbr64
	testq	%rsi, %rsi
	je	.L150
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rdx
	.cfi_def_cfa_offset 64
	movq	8(%rdi), %rdi
	movq	16(%rbp), %rax
	movq	0(%rbp), %r15
	subq	%rdi, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jb	.L139
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_
	movq	%rax, 8(%rbp)
	jmp	.L137
.L139:
	movq	%rdi, %rbx
	leaq	.LC9(%rip), %rdx
	movq	%rbp, %rdi
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	subq	%r15, %rbx
	movq	%rax, %rdi
	movq	%rax, %r13
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	%r14, %rsi
	leaq	(%rax,%rbx), %rdi
	movq	%rax, %r12
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIPimEET_S3_T0_
	testq	%rbx, %rbx
	je	.L140
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
	jmp	.L141
.L140:
	testq	%r15, %r15
	je	.L142
.L141:
	movq	16(%rbp), %rsi
	movq	%r15, %rdi
	subq	%r15, %rsi
	call	_ZdlPvm@PLT
.L142:
	sarq	$2, %rbx
	movq	%r12, 0(%rbp)
	addq	%r14, %rbx
	leaq	(%r12,%rbx,4), %rax
	movq	%rax, 8(%rbp)
	leaq	(%r12,%r13,4), %rax
	movq	%rax, 16(%rbp)
.L137:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L150:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	.cfi_restore 15
	ret
	.cfi_endproc
.LFE5052:
	.size	_ZNSt6vectorIiSaIiEE17_M_default_appendEm, .-_ZNSt6vectorIiSaIiEE17_M_default_appendEm
	.section	.rodata.str1.1
.LC10:
	.string	"fname: "
.LC11:
	.string	"r"
.LC12:
	.string	"Done reading."
	.text
	.globl	_Z10read_edgesPci
	.type	_Z10read_edgesPci, @function
_Z10read_edgesPci:
.LFB4442:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4442
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	leaq	_ZSt4cout(%rip), %rdi
	subq	$1016, %rsp
	.cfi_def_cfa_offset 1072
	movl	%esi, 44(%rsp)
	leaq	.LC10(%rip), %rsi
	movq	%fs:40, %rax
	movq	%rax, 1000(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rbx, %rdi
	call	fopen@PLT
	movq	%rax, %r12
.L154:
	movq	%r12, %rdi
	leal	1(%r13), %ebp
	call	getc@PLT
	cmpl	$-1, %eax
	je	.L223
	cmpl	$10, %eax
	cmove	%ebp, %r13d
	jmp	.L154
.L223:
	movq	%r12, %rdi
	call	fclose@PLT
	leaq	480(%rsp), %rax
	movl	$8, %edx
	movq	%rbx, %rsi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	movl	$4, %edi
.LEHB1:
	call	_Znwm@PLT
.LEHE1:
	movq	%rax, 24(%rsp)
	xorl	%esi, %esi
	leaq	80(%rsp), %rax
	xorl	%r13d, %r13d
	movq	%rax, 64(%rsp)
	xorl	%ebx, %ebx
	leaq	64(%rsp), %r14
	movq	%rsi, 72(%rsp)
	movb	$0, 80(%rsp)
.L157:
	cmpl	%ebp, %r13d
	je	.L159
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
.LEHB2:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	leaq	96(%rsp), %r12
	movl	$8, %edx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@PLT
.LEHE2:
	leaq	56(%rsp), %rsi
	movq	%r12, %rdi
.LEHB3:
	call	_ZNSirsERi@PLT
	movq	%rax, %rdi
	leaq	60(%rsp), %rsi
	call	_ZNSirsERi@PLT
.LEHE3:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L158
	movl	56(%rsp), %eax
	movl	60(%rsp), %edx
	movq	%r12, %rdi
	cmpl	%edx, %eax
	cmovl	%edx, %eax
	cmpl	%eax, %ebx
	cmovl	%eax, %ebx
	incl	%r13d
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L157
.L158:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
.L159:
	leaq	736(%rsp), %rdi
	xorl	%esi, %esi
.LEHB4:
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	call	_ZNSi5seekgESt4fposI11__mbstate_tE@PLT
	movq	24(%rsp), %rax
	incl	%ebx
	orq	$-1, %rdi
	movslq	%ebx, %r12
	movl	%ebx, (%rax)
	leal	(%rbp,%rbp), %eax
	movl	%eax, 40(%rsp)
	movabsq	$384307168202282325, %rax
	cmpq	%r12, %rax
	jb	.L161
	imulq	$24, %r12, %rdi
	addq	$8, %rdi
.L161:
	call	_Znam@PLT
	leaq	8(%rax), %rbx
	movq	%r12, (%rax)
	movq	%rbx, %rax
.L162:
	decq	%r12
	js	.L224
	xorl	%ecx, %ecx
	addq	$24, %rax
	movq	%rcx, -24(%rax)
	movq	%rcx, -16(%rax)
	movq	%rcx, -8(%rax)
	jmp	.L162
.L224:
	xorl	%r12d, %r12d
	leaq	64(%rsp), %r13
.L164:
	cmpl	%ebp, %r12d
	je	.L169
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	leaq	96(%rsp), %rax
	movl	$8, %edx
	movq	%r13, %rsi
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@PLT
.LEHE4:
	leaq	56(%rsp), %r14
	movq	16(%rsp), %rdi
	movq	%r14, %rsi
.LEHB5:
	call	_ZNSirsERi@PLT
	leaq	60(%rsp), %r15
	movq	%rax, %rdi
	movq	%r15, %rsi
	call	_ZNSirsERi@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L165
	movslq	56(%rsp), %rdi
	cmpl	60(%rsp), %edi
	je	.L166
	imulq	$24, %rdi, %rdi
	movq	%r15, %rsi
	addq	%rbx, %rdi
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	movslq	60(%rsp), %rdi
	movq	%r14, %rsi
	imulq	$24, %rdi, %rdi
	addq	%rbx, %rdi
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
.LEHE5:
.L166:
	movq	16(%rsp), %rdi
	incl	%r12d
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L164
.L165:
	movq	16(%rsp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
.L169:
	xorl	%edx, %edx
	movq	%rbx, %r14
	movl	%edx, 16(%rsp)
.L167:
	movq	24(%rsp), %rax
	movl	(%rax), %edi
	movl	16(%rsp), %eax
	cmpl	%eax, %edi
	jle	.L225
	movq	8(%r14), %r12
	movq	(%r14), %rbp
	movq	%r12, %r15
	subq	%rbp, %r15
	movq	%r15, %rax
	sarq	$2, %rax
	movq	%rax, 32(%rsp)
	cmpq	%r12, %rbp
	je	.L205
	bsrq	%rax, %rax
	movl	$63, %edx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	xorq	$63, %rax
	subl	%eax, %edx
	movslq	%edx, %rdx
	addq	%rdx, %rdx
	call	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_.isra.0
	cmpq	$64, %r15
	jle	.L171
	leaq	64(%rbp), %r13
	movq	%rbp, %rdi
	movq	%r13, %rsi
	call	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.isra.0
.L172:
	cmpq	%r13, %r12
	je	.L176
	movl	0(%r13), %edx
	movq	%r13, %rax
.L173:
	movl	-4(%rax), %ecx
	cmpl	%ecx, %edx
	jge	.L226
	movl	%ecx, (%rax)
	subq	$4, %rax
	jmp	.L173
.L226:
	movl	%edx, (%rax)
	addq	$4, %r13
	jmp	.L172
.L171:
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.isra.0
.L176:
	movq	%rbp, %rdx
.L177:
	movq	%rdx, %rax
	addq	$4, %rdx
	cmpq	%rdx, %r12
	je	.L170
	movl	(%rdx), %ecx
	cmpl	%ecx, -4(%rdx)
	jne	.L177
	cmpq	%rax, %r12
	je	.L180
	leaq	8(%rax), %rdx
	movq	%rax, %rcx
.L181:
	leaq	4(%rcx), %rax
	cmpq	%rdx, %r12
	je	.L180
	movl	(%rdx), %esi
	cmpl	%esi, (%rcx)
	je	.L182
	movl	%esi, 4(%rcx)
	movq	%rax, %rcx
.L182:
	addq	$4, %rdx
	jmp	.L181
.L205:
	movq	%rbp, %rdx
.L170:
	movq	%rdx, %rax
.L180:
	movq	%rax, %rsi
	subq	%rbp, %rsi
	cmpq	%rsi, %r15
	jnb	.L184
	movq	32(%rsp), %rax
	sarq	$2, %rsi
	movq	%r14, %rdi
	subq	%rax, %rsi
.LEHB6:
	call	_ZNSt6vectorIiSaIiEE17_M_default_appendEm
	jmp	.L185
.L184:
	cmpq	%r12, %rax
	je	.L185
	cmpq	%r15, %rsi
	jnb	.L185
	movq	%rax, 8(%r14)
.L185:
	incl	16(%rsp)
	addq	$24, %r14
	jmp	.L167
.L225:
	movabsq	$2305843009213693950, %rax
	incl	%edi
	movslq	%edi, %rdi
	cmpq	%rdi, %rax
	jb	.L188
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	40(%rsp), %rdi
	movq	%rax, %rbp
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jnb	.L218
	jmp	.L227
.L188:
	movq	1000(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L219
	call	__cxa_throw_bad_array_new_length@PLT
.L218:
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	movl	%eax, 0(%rbp)
	movq	24(%rsp), %rax
	movl	(%rax), %r9d
	jmp	.L194
.L227:
	movq	1000(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L219
	call	__cxa_throw_bad_array_new_length@PLT
.L228:
	addl	%eax, %ecx
	addq	$24, %rbx
	movl	%ecx, 4(%rbp,%rsi,4)
	incq	%rsi
.L194:
	cmpl	%esi, %r9d
	jle	.L196
	movq	(%rbx), %rdi
	movq	8(%rbx), %rax
	movslq	%ecx, %rdx
	leaq	(%r12,%rdx,4), %r8
	xorl	%edx, %edx
	subq	%rdi, %rax
	sarq	$2, %rax
.L197:
	cmpq	%rdx, %rax
	je	.L228
	movl	(%rdi,%rdx,4), %r10d
	movl	%r10d, (%r8,%rdx,4)
	incq	%rdx
	jmp	.L197
.L196:
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	44(%rsp), %r8d
	movl	40(%rsp), %ecx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	24(%rsp), %rdx
	call	_Z7wrapperPiS_S_ii
.LEHE6:
	leaq	64(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	1000(%rsp), %rax
	subq	%fs:40, %rax
	je	.L203
	jmp	.L219
.L207:
	endbr64
	movq	%rax, %rbx
.L198:
	movq	%r12, %rdi
	jmp	.L221
.L209:
	endbr64
	movq	%rax, %rbx
.L200:
	movq	16(%rsp), %rdi
.L221:
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L199
.L208:
	endbr64
	movq	%rax, %rbx
.L199:
	leaq	64(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L201
.L206:
	endbr64
	movq	%rax, %rbx
.L201:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	1000(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L219
	movq	%rbx, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L219:
	call	__stack_chk_fail@PLT
.L203:
	addq	$1016, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4442:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4442:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4442-.LLSDACSB4442
.LLSDACSB4442:
	.uleb128 .LEHB0-.LFB4442
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4442
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L206-.LFB4442
	.uleb128 0
	.uleb128 .LEHB2-.LFB4442
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L208-.LFB4442
	.uleb128 0
	.uleb128 .LEHB3-.LFB4442
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L207-.LFB4442
	.uleb128 0
	.uleb128 .LEHB4-.LFB4442
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L208-.LFB4442
	.uleb128 0
	.uleb128 .LEHB5-.LFB4442
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L209-.LFB4442
	.uleb128 0
	.uleb128 .LEHB6-.LFB4442
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L208-.LFB4442
	.uleb128 0
	.uleb128 .LEHB7-.LFB4442
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE4442:
	.text
	.size	_Z10read_edgesPci, .-_Z10read_edgesPci
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4457:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	16(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movq	8(%rbx), %rdi
	movl	%eax, %esi
	call	_Z10read_edgesPci
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4457:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1148846080
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <algorithm>
#include <fstream>
#include <iostream>
#include <sstream>
#include <vector>
#define THREADS 64
// Error check-----
#define gpuErrchk(ans)                                                         \
  { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line,
                      bool abort = true) {
  if (code != hipSuccess) {
    fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file,
            line);
    if (abort)
      exit(code);
  }
}
// Error check-----
// This is a very good idea to wrap your calls with that function.. Otherwise
// you will not b Moreover, you may also want to look at how to use
// cuda-memcheck and cuda-gdb for debuggin

__global__ void deviceDFSk5(int *xadj, int *adj, int *nov, int *counter) {
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  __shared__ int ct[THREADS];
  if (id < *nov) {
    ct[threadIdx.x] = 0;
    for (int i = xadj[id]; i < xadj[id + 1]; i++) {
      // adj[i] are the neighbors of id vertex, none can be id by
      // definition (no loops of len-1)
      if (adj[i] != id) {
        for (int j = xadj[adj[i]]; j < xadj[adj[i] + 1]; j++) {
          // adj[j] are the neighbors of the second vertex on this path,
          // they can't be id.
          if (adj[j] != adj[i] && adj[j] != id) {
            for (int k = xadj[adj[j]]; k < xadj[adj[j] + 1]; k++) {
              // adj[k] are the neighbors of the third vertex,
              // they can't be equal to id or the second.
              if (adj[k] != adj[j] && adj[k] != adj[i] && adj[k] != id) {
                for (int l = xadj[adj[k]]; l < xadj[adj[k] + 1]; l++) {
                  // adj[l] are the neighbors of the fourth vertex,
                  // they can't be equal to id second or the third.
                  if (adj[l] != adj[k] && adj[l] != adj[j] &&
                      adj[l] != adj[i] && adj[l] != id) {
                    for (int m = xadj[adj[l]]; m < xadj[adj[l] + 1]; m++) {
                      // adj[l] are the neighbors of the fourth vertex,
                      // they can't be equal to id second or the third.
                      if (adj[m] == id) {
                        ct[threadIdx.x]++;
                      }
                    }
                  }
                }
              }
            }
          }
        }
      }
    }
    counter[id] = ct[threadIdx.x];
  }
}

__global__ void deviceDFSk4(int *xadj, int *adj, int *nov, int *counter) {
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  __shared__ int ct[THREADS];
  if (id < *nov) {
    ct[threadIdx.x] = 0;
    for (int i = xadj[id]; i < xadj[id + 1]; i++) {
      // adj[i] are the neighbors of id vertex, none can be id by
      // definition (no loops of len-1)
      if (adj[i] != id) {
        for (int j = xadj[adj[i]]; j < xadj[adj[i] + 1]; j++) {
          // adj[j] are the neighbors of the second vertex on this path,
          // they can't be id.
          if (adj[j] != adj[i] && adj[j] != id) {
            for (int k = xadj[adj[j]]; k < xadj[adj[j] + 1]; k++) {
              // adj[k] are the neighbors of the third vertex,
              // they can't be equal to id or the second.
              if (adj[k] != adj[j] && adj[k] != adj[i] && adj[k] != id) {
                for (int l = xadj[adj[k]]; l < xadj[adj[k] + 1]; l++) {
                  // adj[l] are the neighbors of the fourth vertex,
                  if (adj[l] == id) {
                    ct[threadIdx.x]++;
                  }
                }
              }
            }
          }
        }
      }
    }
    counter[id] = ct[threadIdx.x];
  }
}

__global__ void deviceDFSk3(int *xadj, int *adj, int *nov, int *counter) {
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  if (id < *nov) {

    for (int i = xadj[id]; i < xadj[id + 1]; i++) {
      if (adj[i] > id) {
        for (int j = xadj[adj[i]]; j < xadj[adj[i] + 1]; j++) {
          if (adj[j] > adj[i] && adj[j] > id) {
            for (int k = xadj[adj[j]]; k < xadj[adj[j] + 1]; k++) {
              if (adj[k] == id) {
                atomicAdd(&counter[id], 2);
                atomicAdd(&counter[adj[i]], 2);
                atomicAdd(&counter[adj[j]], 2);
              }
            }
          }
        }
      }
    }
  }
}

void wrapper(int *xadj, int *adj, int *nov, int nnz, int k) {
  hipSetDevice(0);
  int *d_xadj;
  int *d_adj;
  int *d_nov;
  int *d_ct;
  int *ct = new int[*nov];
  hipMalloc((void **)&d_xadj, (*nov + 1) * sizeof(int));
  hipMalloc((void **)&d_adj, nnz * sizeof(int));
  hipMalloc((void **)&d_nov, sizeof(int));
  hipMalloc((void **)&d_ct, (*nov) * sizeof(int));
  if (k == 3) {
    /*not that necessary, to ensure d_ct is set to zero in the least amount of
     * lines possible for k=3*/
    memset(ct, 0, (*nov) * sizeof(int));
    hipMemcpy(d_ct, ct, (*nov) * sizeof(int), hipMemcpyHostToDevice);
  }
  hipMemcpy(d_xadj, xadj, (*nov + 1) * sizeof(int), hipMemcpyHostToDevice);
  hipMemcpy(d_adj, adj, (nnz) * sizeof(int), hipMemcpyHostToDevice);
  hipMemcpy(d_nov, nov, sizeof(int), hipMemcpyHostToDevice);

  gpuErrchk(hipDeviceSynchronize());
#ifdef DEBUG
  std::cout << "malloc copy done" << std::endl;
#endif
  gpuErrchk(hipDeviceSynchronize());
  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventRecord(start, 0);
  if (k == 3)
    deviceDFSk3<<<(*nov + THREADS - 1) / THREADS, THREADS>>>(d_xadj, d_adj,
                                                             d_nov, d_ct);
  if (k == 4)
    deviceDFSk4<<<(*nov + THREADS - 1) / THREADS, THREADS>>>(d_xadj, d_adj,
                                                             d_nov, d_ct);
  if (k == 5)
    deviceDFSk5<<<(*nov + THREADS - 1) / THREADS, THREADS>>>(d_xadj, d_adj,
                                                             d_nov, d_ct);
  gpuErrchk(hipDeviceSynchronize());
  hipEventCreate(&stop);
  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);
  hipMemcpy(ct, d_ct, (*nov) * sizeof(int), hipMemcpyDeviceToHost);
  for (int i = 0; i < *nov; i++)
    printf("%d %d\n", i, ct[i]);
  float elapsedTime;
  hipEventElapsedTime(&elapsedTime, start, stop);
  printf("GPU took: %f s\n", elapsedTime / 1000);
  hipFree(d_xadj);
  hipFree(d_adj);
  hipFree(d_nov);
  hipFree(d_ct);
}

/*Read the given file and return CSR*/
void *read_edges(char *bin_name, int k) {
  std::cout << "fname: " << bin_name << std::endl;

  // count the newlines
  unsigned int number_of_lines = 0;
  FILE *infile = fopen(bin_name, "r");
  int ch;
  while (EOF != (ch = getc(infile)))
    if ('\n' == ch)
      ++number_of_lines;
  ++number_of_lines;
#ifdef DEBUG
  std::cout << number_of_lines << " lines" << std::endl;
#endif
  fclose(infile);

  // read the first line, set it to no vertices.
  std::ifstream bp(bin_name);
  int *no_vertices = new int;
  std::string line;

  int i, j, max = 0;
  for (int iter = 0; iter < number_of_lines; iter++) {
    std::getline(bp, line);
    std::istringstream myss(line);
    if (!(myss >> i >> j)) {
      break;
    }
    if (i > max)
      max = i;
    if (j > max)
      max = j;
  }
  bp.clear();
  bp.seekg(0);
  *no_vertices = max + 1;
  int no_edges = (number_of_lines)*2; // bidirectional
  /*TODO unique and no loop decreases this, we should resize adj
   * accordingly. Not the end of the world, we will never reach those
   * indices.*/

  // if file ended with \n you'd keep it as is.

  std::vector<int> *A = new std::vector<int>[*no_vertices];
  // std::cout << "allocated A" << std::endl;

  for (int iter = 0; iter < number_of_lines; iter++) {
    std::getline(bp, line);
    std::istringstream myss(line);
    if (!(myss >> i >> j)) {
      break;
    }

#ifdef DEBUG
    std::cout << i << " " << j << std::endl;
#endif
    if (i != j) {
      // ignore diagonal edges
      A[i].push_back(j);
      A[j].push_back(i);
    }
  }
  for (int i = 0; i < *no_vertices; i++) {
    std::sort(A[i].begin(), A[i].end());
    // sort then unique.
    // you may have 3 1 and 1 3
    // if you do not sort, unique doesn't do what I think it would.
    // also we prefer them sorted in case the file has 1 2 before 1 0 or
    // sth. using default comparison:
    std::vector<int>::iterator it;
    it = std::unique(A[i].begin(), A[i].end());   // 10 20 30 20 10 ?  ?  ?  ?
                                                  //                ^
    A[i].resize(std::distance(A[i].begin(), it)); // 10 20 30 20 10
  }
  int sum = 0;
  int *xadj = new int[*no_vertices + 1]; // last one marks the end of the adj.
  int *adj = new int[no_edges]; // there are m+1 lines (m '\n's), 2m edges.
  xadj[0] = 0;
  for (int i = 0; i < *no_vertices; i++) {
    // adj.add_to_end(A[i])
    for (int j = 0; j < A[i].size(); j++) {
      adj[sum + j] = A[i][j];
    }
    sum += A[i].size();
    xadj[i + 1] = sum;
  }
  std::cout << "Done reading." << std::endl;
  wrapper(xadj, adj, no_vertices, no_edges, k);
  return 0;
}

int main(int argc, char *argv[]) {
  /*first arg is filename, second is k*/
  // omp_set_num_threads(8);
  read_edges(argv[1], atoi(argv[2]));
  return 0;
}
	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__deviceDFSk5PiS_S_S_ # -- Begin function _Z26__device_stub__deviceDFSk5PiS_S_S_
	.type	_Z26__device_stub__deviceDFSk5PiS_S_S_,@function
_Z26__device_stub__deviceDFSk5PiS_S_S_: # @_Z26__device_stub__deviceDFSk5PiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11deviceDFSk5PiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__deviceDFSk5PiS_S_S_, .Lfunc_end0-_Z26__device_stub__deviceDFSk5PiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__deviceDFSk4PiS_S_S_ # -- Begin function _Z26__device_stub__deviceDFSk4PiS_S_S_
	.type	_Z26__device_stub__deviceDFSk4PiS_S_S_,@function
_Z26__device_stub__deviceDFSk4PiS_S_S_: # @_Z26__device_stub__deviceDFSk4PiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11deviceDFSk4PiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z26__device_stub__deviceDFSk4PiS_S_S_, .Lfunc_end1-_Z26__device_stub__deviceDFSk4PiS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__deviceDFSk3PiS_S_S_ # -- Begin function _Z26__device_stub__deviceDFSk3PiS_S_S_
	.type	_Z26__device_stub__deviceDFSk3PiS_S_S_,@function
_Z26__device_stub__deviceDFSk3PiS_S_S_: # @_Z26__device_stub__deviceDFSk3PiS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11deviceDFSk3PiS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__deviceDFSk3PiS_S_S_, .Lfunc_end2-_Z26__device_stub__deviceDFSk3PiS_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z7wrapperPiS_S_ii
.LCPI3_0:
	.long	0x447a0000                      # float 1000
	.text
	.globl	_Z7wrapperPiS_S_ii
	.type	_Z7wrapperPiS_S_ii,@function
_Z7wrapperPiS_S_ii:                     # @_Z7wrapperPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebp
	movl	%ecx, %r13d
	movq	%rdx, %rbx
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, %r12
	xorl	%edi, %edi
	callq	hipSetDevice
	movslq	(%rbx), %r15
	leaq	(,%r15,4), %rax
	testq	%r15, %r15
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	movq	%rax, %r14
	leaq	4(,%r15,4), %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	movslq	%r13d, %r13
	shlq	$2, %r13
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movslq	(%rbx), %rsi
	shlq	$2, %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	cmpl	$3, %ebp
	jne	.LBB3_2
# %bb.1:
	movslq	(%rbx), %r15
	shlq	$2, %r15
	movq	%r14, %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	memset@PLT
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.LBB3_2:
	movq	32(%rsp), %rdi
	movslq	(%rbx), %rax
	leaq	4(,%rax,4), %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$4, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit40
	leaq	56(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	cmpl	$3, %ebp
	jne	.LBB3_10
# %bb.8:
	movl	(%rbx), %edi
	leal	63(%rdi), %eax
	addl	$126, %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.9:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z26__device_stub__deviceDFSk3PiS_S_S_
	jmp	.LBB3_16
.LBB3_10:
	cmpl	$5, %ebp
	je	.LBB3_14
# %bb.11:
	cmpl	$4, %ebp
	jne	.LBB3_16
# %bb.12:
	movl	(%rbx), %edi
	leal	63(%rdi), %eax
	addl	$126, %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.13:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z26__device_stub__deviceDFSk4PiS_S_S_
	jmp	.LBB3_16
.LBB3_14:
	movl	(%rbx), %edi
	leal	63(%rdi), %eax
	addl	$126, %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$6, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$64, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.15:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	callq	_Z26__device_stub__deviceDFSk5PiS_S_S_
.LBB3_16:                               # %.thread
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_21
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKcib.exit42
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r15), %rdi
	callq	hipEventSynchronize
	movq	8(%rsp), %rsi
	movslq	(%rbx), %rdx
	shlq	$2, %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, (%rbx)
	jle	.LBB3_20
# %bb.18:                               # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB3_19:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %edx
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	movslq	(%rbx), %rax
	cmpq	%rax, %r15
	jl	.LBB3_19
.LBB3_20:                               # %._crit_edge
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdx
	leaq	68(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI3_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_3:
	.cfi_def_cfa_offset 128
	movl	%eax, %r15d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$143, %r8d
	jmp	.LBB3_4
.LBB3_6:
	movl	%eax, %r15d
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$147, %r8d
.LBB3_4:
	xorl	%eax, %eax
	callq	fprintf
	movl	%r15d, %edi
	callq	exit
.LBB3_21:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$160, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end3:
	.size	_Z7wrapperPiS_S_ii, .Lfunc_end3-_Z7wrapperPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10read_edgesPci               # -- Begin function _Z10read_edgesPci
	.type	_Z10read_edgesPci,@function
_Z10read_edgesPci:                      # @_Z10read_edgesPci
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$984, %rsp                      # imm = 0x3D8
	.cfi_def_cfa_offset 1040
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %r12d
	movq	%rdi, %rbx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testq	%rbx, %rbx
	je	.LBB4_1
# %bb.2:
	movq	%rbx, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB4_3
.LBB4_1:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB4_3:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %r14
	xorl	%ebp, %ebp
	movl	$1, %r13d
.LBB4_4:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	callq	getc
	cmpl	$-1, %eax
	je	.LBB4_7
# %bb.5:                                #   in Loop: Header=BB4_4 Depth=1
	cmpl	$10, %eax
	jne	.LBB4_4
# %bb.6:                                #   in Loop: Header=BB4_4 Depth=1
	incl	%ebp
	incl	%r13d
	jmp	.LBB4_4
.LBB4_7:
	movq	%r14, %rdi
	callq	fclose
	leaq	464(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp0:
	movl	$4, %edi
	callq	_Znwm
	movq	%rax, 72(%rsp)                  # 8-byte Spill
.Ltmp1:
# %bb.8:
	movl	%r12d, 68(%rsp)                 # 4-byte Spill
	movl	%ebp, %ecx
	leaq	48(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	$0, -8(%rax)
	movb	$0, (%rax)
	incl	%ecx
	movl	%ecx, 28(%rsp)                  # 4-byte Spill
	je	.LBB4_9
# %bb.12:                               # %.lr.ph
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %r14
	leaq	80(%rsp), %r12
.LBB4_13:                               # =>This Inner Loop Header: Depth=1
	movq	464(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp3:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp4:
# %bb.14:                               # %.noexc
                                        #   in Loop: Header=BB4_13 Depth=1
.Ltmp5:
	movsbl	%al, %edx
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp6:
# %bb.15:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
                                        #   in Loop: Header=BB4_13 Depth=1
.Ltmp8:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	$8, %edx
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode
.Ltmp9:
# %bb.16:                               #   in Loop: Header=BB4_13 Depth=1
.Ltmp11:
	movq	%r12, %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp12:
# %bb.17:                               #   in Loop: Header=BB4_13 Depth=1
.Ltmp13:
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp14:
# %bb.18:                               #   in Loop: Header=BB4_13 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	movl	32(%rax,%rcx), %ebx
	testb	$5, %bl
	jne	.LBB4_20
# %bb.19:                               #   in Loop: Header=BB4_13 Depth=1
	movl	12(%rsp), %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	cmpl	%ecx, %eax
	cmovgl	%eax, %ecx
	movl	8(%rsp), %eax
	cmpl	%ecx, %eax
	cmovgl	%eax, %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
.LBB4_20:                               #   in Loop: Header=BB4_13 Depth=1
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	movq	%r12, %rdi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	200(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	subl	$1, %ebp
	setb	%al
	testb	$5, %bl
	jne	.LBB4_22
# %bb.21:                               #   in Loop: Header=BB4_13 Depth=1
	testb	%al, %al
	je	.LBB4_13
	jmp	.LBB4_22
.LBB4_9:
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
.LBB4_22:                               # %._crit_edge
	movq	464(%rsp), %rax
	addq	-24(%rax), %r15
.Ltmp16:
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp17:
# %bb.23:
.Ltmp18:
	leaq	464(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_ZNSi5seekgESt4fposI11__mbstate_tE
.Ltmp19:
# %bb.24:
	movq	16(%rsp), %rax                  # 8-byte Reload
	leal	1(%rax), %r12d
	movslq	%r12d, %r14
	movl	$24, %ecx
	movq	%r14, %rax
	mulq	%rcx
	movq	%rax, %rbp
	seto	%al
	movq	%rbp, %rdi
	addq	$8, %rdi
	movq	$-1, %rcx
	cmovbq	%rcx, %rdi
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movl	%r14d, (%rdx)
	testb	%al, %al
	cmovneq	%rcx, %rdi
.Ltmp21:
	callq	_Znam
.Ltmp22:
# %bb.25:                               # %.preheader143
	movq	%rax, %r15
	movq	%r14, (%rax)
	addq	$8, %r15
	addq	$-24, %rbp
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	movq	%rbp, %rax
	mulq	%rcx
	shrq	$4, %rdx
	leaq	(%rdx,%rdx,2), %rax
	leaq	24(,%rax,8), %rdx
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	cmpl	$0, 28(%rsp)                    # 4-byte Folded Reload
	je	.LBB4_54
# %bb.26:                               # %.lr.ph155
	leaq	32(%rsp), %r14
	leaq	80(%rsp), %rbp
.LBB4_27:                               # =>This Inner Loop Header: Depth=1
	movq	464(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp24:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp25:
# %bb.28:                               # %.noexc121
                                        #   in Loop: Header=BB4_27 Depth=1
.Ltmp26:
	movsbl	%al, %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp27:
# %bb.29:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit123
                                        #   in Loop: Header=BB4_27 Depth=1
.Ltmp29:
	movq	%rbp, %rdi
	movq	%r14, %rsi
	movl	$8, %edx
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode
.Ltmp30:
# %bb.30:                               #   in Loop: Header=BB4_27 Depth=1
.Ltmp32:
	movq	%rbp, %rdi
	leaq	12(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp33:
# %bb.31:                               #   in Loop: Header=BB4_27 Depth=1
.Ltmp34:
	movq	%rax, %rdi
	leaq	8(%rsp), %rsi
	callq	_ZNSirsERi
.Ltmp35:
# %bb.32:                               #   in Loop: Header=BB4_27 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB4_53
# %bb.33:                               #   in Loop: Header=BB4_27 Depth=1
	movslq	12(%rsp), %rcx
	movl	8(%rsp), %eax
	cmpl	%eax, %ecx
	je	.LBB4_52
# %bb.34:                               #   in Loop: Header=BB4_27 Depth=1
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%r15,%rcx,8), %rdi
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB4_48
# %bb.35:                               #   in Loop: Header=BB4_27 Depth=1
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rdi)
	jmp	.LBB4_49
.LBB4_48:                               #   in Loop: Header=BB4_27 Depth=1
.Ltmp36:
	leaq	8(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp37:
.LBB4_49:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit
                                        #   in Loop: Header=BB4_27 Depth=1
	movslq	8(%rsp), %rax
	leaq	(%rax,%rax,2), %rax
	leaq	(%r15,%rax,8), %rdi
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB4_51
# %bb.50:                               #   in Loop: Header=BB4_27 Depth=1
	movl	12(%rsp), %eax
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rdi)
	jmp	.LBB4_52
.LBB4_51:                               #   in Loop: Header=BB4_27 Depth=1
.Ltmp38:
	leaq	12(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp39:
.LBB4_52:                               #   in Loop: Header=BB4_27 Depth=1
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	movq	%rbp, %rdi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	200(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	decl	%r13d
	jne	.LBB4_27
	jmp	.LBB4_54
.LBB4_53:                               # %.critedge
	leaq	80(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	200(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
.LBB4_54:                               # %.loopexit144
	cmpl	$2147483646, 16(%rsp)           # 4-byte Folded Reload
                                        # imm = 0x7FFFFFFE
	movq	72(%rsp), %rbp                  # 8-byte Reload
	ja	.LBB4_75
# %bb.55:                               # %.lr.ph158.preheader
	xorl	%r13d, %r13d
.LBB4_56:                               # %.lr.ph158
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_65 Depth 2
                                        #     Child Loop BB4_68 Depth 2
	leaq	(,%r13,2), %rax
	addq	%r13, %rax
	leaq	(%r15,%rax,8), %rbx
	movq	(%rbx), %r14
	movq	8(%rbx), %r12
	cmpq	%r12, %r14
	je	.LBB4_57
# %bb.58:                               #   in Loop: Header=BB4_56 Depth=1
	movq	%r12, %rax
	subq	%r14, %rax
	sarq	$2, %rax
	je	.LBB4_59
# %bb.60:                               # %cond.false
                                        #   in Loop: Header=BB4_56 Depth=1
	bsrq	%rax, %rax
	xorq	$63, %rax
	jmp	.LBB4_61
.LBB4_57:                               #   in Loop: Header=BB4_56 Depth=1
	movq	%r14, %rsi
	jmp	.LBB4_73
.LBB4_59:                               #   in Loop: Header=BB4_56 Depth=1
	movl	$64, %eax
.LBB4_61:                               # %cond.end
                                        #   in Loop: Header=BB4_56 Depth=1
	addq	%rax, %rax
	movl	$126, %edx
	subq	%rax, %rdx
.Ltmp41:
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_
.Ltmp42:
# %bb.62:                               # %.noexc129
                                        #   in Loop: Header=BB4_56 Depth=1
.Ltmp43:
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
.Ltmp44:
# %bb.63:                               # %_ZSt4sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEEvT_S7_.exit
                                        #   in Loop: Header=BB4_56 Depth=1
	movq	(%rbx), %r14
	movq	8(%rbx), %rsi
	cmpq	%rsi, %r14
	je	.LBB4_73
# %bb.64:                               # %.preheader.i.i.i.preheader
                                        #   in Loop: Header=BB4_56 Depth=1
	leaq	4(%r14), %rax
.LBB4_65:                               # %.preheader.i.i.i
                                        #   Parent Loop BB4_56 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%rsi, %rax
	je	.LBB4_73
# %bb.66:                               #   in Loop: Header=BB4_65 Depth=2
	movl	-4(%rax), %ecx
	leaq	4(%rax), %rdx
	cmpl	(%rax), %ecx
	movq	%rdx, %rax
	jne	.LBB4_65
# %bb.67:                               # %_ZSt15__adjacent_findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops19_Iter_equal_to_iterEET_S9_S9_T0_.exit.thread21.i.i
                                        #   in Loop: Header=BB4_56 Depth=1
	leaq	-8(%rdx), %rax
.LBB4_68:                               # %_ZSt15__adjacent_findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops19_Iter_equal_to_iterEET_S9_S9_T0_.exit.thread21.i.i
                                        #   Parent Loop BB4_56 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	%rsi, %rdx
	je	.LBB4_72
# %bb.69:                               # %.lr.ph.i.i
                                        #   in Loop: Header=BB4_68 Depth=2
	movl	%ecx, %edi
	movl	(%rdx), %ecx
	cmpl	%ecx, %edi
	je	.LBB4_71
# %bb.70:                               #   in Loop: Header=BB4_68 Depth=2
	movl	%ecx, 4(%rax)
	addq	$4, %rax
.LBB4_71:                               #   in Loop: Header=BB4_68 Depth=2
	addq	$4, %rdx
	jmp	.LBB4_68
.LBB4_72:                               # %._crit_edge.i.i
                                        #   in Loop: Header=BB4_56 Depth=1
	addq	$4, %rax
	movq	%rax, %rsi
.LBB4_73:                               # %.loopexit
                                        #   in Loop: Header=BB4_56 Depth=1
	subq	%r14, %rsi
	sarq	$2, %rsi
.Ltmp46:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIiSaIiEE6resizeEm
.Ltmp47:
# %bb.74:                               #   in Loop: Header=BB4_56 Depth=1
	incq	%r13
	movslq	(%rbp), %r12
	cmpq	%r12, %r13
	jl	.LBB4_56
.LBB4_75:                               # %._crit_edge159
	movslq	%r12d, %rax
	leaq	4(,%rax,4), %rdi
	cmpl	$-1, %eax
	movq	$-1, %r14
	cmovlq	%r14, %rdi
.Ltmp49:
	callq	_Znam
.Ltmp50:
# %bb.76:
	movq	%rax, %rbx
	movl	28(%rsp), %r13d                 # 4-byte Reload
	addl	%r13d, %r13d
	movslq	%r13d, %rax
	leaq	(,%rax,4), %rdi
	testl	%eax, %eax
	cmovsq	%r14, %rdi
.Ltmp52:
	callq	_Znam
.Ltmp53:
# %bb.77:
	movq	%rax, %r14
	movl	$0, (%rbx)
	testl	%r12d, %r12d
	jle	.LBB4_83
# %bb.78:                               # %.preheader.preheader
	movl	%r12d, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB4_79:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_81 Depth 2
	leaq	(%rcx,%rcx,2), %rsi
	movq	(%r15,%rsi,8), %rdi
	movq	8(%r15,%rsi,8), %r8
	movq	%r8, %rsi
	subq	%rdi, %rsi
	sarq	$2, %rsi
	cmpq	%rdi, %r8
	je	.LBB4_82
# %bb.80:                               # %.lr.ph162.preheader
                                        #   in Loop: Header=BB4_79 Depth=1
	movslq	%edx, %r9
	cmpq	$1, %rsi
	movq	%rsi, %r8
	adcq	$0, %r8
	leaq	(%r14,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB4_81:                               # %.lr.ph162
                                        #   Parent Loop BB4_79 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdi,%r10,4), %r11d
	movl	%r11d, (%r9,%r10,4)
	incq	%r10
	cmpq	%r10, %r8
	jne	.LBB4_81
.LBB4_82:                               # %._crit_edge163
                                        #   in Loop: Header=BB4_79 Depth=1
	addl	%esi, %edx
	movl	%edx, 4(%rbx,%rcx,4)
	incq	%rcx
	cmpq	%rax, %rcx
	jne	.LBB4_79
.LBB4_83:                               # %._crit_edge167
.Ltmp54:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp55:
# %bb.84:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit133
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp56:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp57:
# %bb.85:                               # %.noexc138
.Ltmp58:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp59:
# %bb.86:                               # %.noexc139
.Ltmp60:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp61:
# %bb.87:                               # %_ZNSolsEPFRSoS_E.exit
.Ltmp62:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	%r13d, %ecx
	movl	68(%rsp), %r8d                  # 4-byte Reload
	callq	_Z7wrapperPiS_S_ii
.Ltmp63:
# %bb.88:
	movq	32(%rsp), %rdi
	leaq	48(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB4_90
# %bb.89:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB4_90:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	464(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	addq	$984, %rsp                      # imm = 0x3D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_93:
	.cfi_def_cfa_offset 1040
.Ltmp51:
	jmp	.LBB4_37
.LBB4_44:
.Ltmp23:
	jmp	.LBB4_37
.LBB4_10:
.Ltmp2:
	movq	%rax, %r14
	jmp	.LBB4_11
.LBB4_43:
.Ltmp20:
	jmp	.LBB4_37
.LBB4_94:
.Ltmp64:
	jmp	.LBB4_37
.LBB4_46:
.Ltmp31:
	jmp	.LBB4_37
.LBB4_92:
.Ltmp48:
	jmp	.LBB4_37
.LBB4_91:
.Ltmp45:
	jmp	.LBB4_37
.LBB4_38:
.Ltmp10:
	jmp	.LBB4_37
.LBB4_45:
.Ltmp28:
	jmp	.LBB4_37
.LBB4_47:
.Ltmp40:
	jmp	.LBB4_40
.LBB4_36:
.Ltmp7:
.LBB4_37:
	movq	%rax, %r14
	jmp	.LBB4_41
.LBB4_39:
.Ltmp15:
.LBB4_40:
	movq	%rax, %r14
	leaq	80(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	200(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
.LBB4_41:
	leaq	48(%rsp), %rax
	movq	32(%rsp), %rdi
	cmpq	%rax, %rdi
	je	.LBB4_11
# %bb.42:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i135
	callq	_ZdlPv
.LBB4_11:
	leaq	464(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	_Z10read_edgesPci, .Lfunc_end4-_Z10read_edgesPci
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp14-.Ltmp11                #   Call between .Ltmp11 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp19-.Ltmp16                #   Call between .Ltmp16 and .Ltmp19
	.uleb128 .Ltmp20-.Lfunc_begin0          #     jumps to .Ltmp20
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp21-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp22-.Ltmp21                #   Call between .Ltmp21 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp24-.Ltmp22                #   Call between .Ltmp22 and .Ltmp24
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp27-.Ltmp24                #   Call between .Ltmp24 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp29-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp30-.Ltmp29                #   Call between .Ltmp29 and .Ltmp30
	.uleb128 .Ltmp31-.Lfunc_begin0          #     jumps to .Ltmp31
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp32-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp39-.Ltmp32                #   Call between .Ltmp32 and .Ltmp39
	.uleb128 .Ltmp40-.Lfunc_begin0          #     jumps to .Ltmp40
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp41-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp44-.Ltmp41                #   Call between .Ltmp41 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin0          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp47-.Ltmp46                #   Call between .Ltmp46 and .Ltmp47
	.uleb128 .Ltmp48-.Lfunc_begin0          #     jumps to .Ltmp48
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp49-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp50-.Ltmp49                #   Call between .Ltmp49 and .Ltmp50
	.uleb128 .Ltmp51-.Lfunc_begin0          #     jumps to .Ltmp51
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp52-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp63-.Ltmp52                #   Call between .Ltmp52 and .Ltmp63
	.uleb128 .Ltmp64-.Lfunc_begin0          #     jumps to .Ltmp64
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Lfunc_end4-.Ltmp63            #   Call between .Ltmp63 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE6resizeEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE6resizeEm,comdat
	.weak	_ZNSt6vectorIiSaIiEE6resizeEm   # -- Begin function _ZNSt6vectorIiSaIiEE6resizeEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE6resizeEm,@function
_ZNSt6vectorIiSaIiEE6resizeEm:          # @_ZNSt6vectorIiSaIiEE6resizeEm
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rdx
	movq	8(%rdi), %rcx
	movq	%rcx, %r8
	subq	%rdx, %r8
	sarq	$2, %r8
	movq	%rsi, %rax
	subq	%r8, %rax
	jbe	.LBB5_1
# %bb.5:
	movq	%rax, %rsi
	jmp	_ZNSt6vectorIiSaIiEE17_M_default_appendEm # TAILCALL
.LBB5_1:
	jae	.LBB5_4
# %bb.2:
	leaq	(%rdx,%rsi,4), %rax
	cmpq	%rax, %rcx
	je	.LBB5_4
# %bb.3:
	movq	%rax, 8(%rdi)
.LBB5_4:                                # %_ZNSt6vectorIiSaIiEE15_M_erase_at_endEPi.exit
	retq
.Lfunc_end5:
	.size	_ZNSt6vectorIiSaIiEE6resizeEm, .Lfunc_end5-_ZNSt6vectorIiSaIiEE6resizeEm
	.cfi_endproc
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	8(%rsi), %rbx
	movq	16(%rsi), %rdi
	callq	atoi
	movq	%rbx, %rdi
	movl	%eax, %esi
	callq	_Z10read_edgesPci
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.8, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB7_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB7_3
.LBB7_1:
	xorl	%ebp, %ebp
.LBB7_3:                                # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB7_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB7_5:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB7_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB7_7:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB7_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB7_9:                                # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end7-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB8_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB8_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end8:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .Lfunc_end8-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB9_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB9_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB9_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB9_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end9:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end9-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_,"axG",@progbits,_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_,comdat
	.weak	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_ # -- Begin function _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_
	.type	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_,@function
_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_: # @_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	subq	%rdi, %r14
	sarq	$2, %r14
	cmpq	$17, %r14
	jl	.LBB10_12
# %bb.1:                                # %.lr.ph
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %rbx
	leaq	4(%rdi), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	$-4, %rbp
	subq	%rdi, %rbp
.LBB10_2:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_5 Depth 2
                                        #       Child Loop BB10_6 Depth 3
                                        #       Child Loop BB10_8 Depth 3
	subq	$1, %r15
	jb	.LBB10_3
# %bb.4:                                #   in Loop: Header=BB10_2 Depth=1
	andq	$-2, %r14
	leaq	(%rbx,%r14,2), %rdx
	leaq	-4(%r12), %rcx
	movq	%rbx, %rdi
	movq	16(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	callq	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_
	movq	%r14, %rax
	movq	%r12, %rcx
.LBB10_5:                               #   Parent Loop BB10_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB10_6 Depth 3
                                        #       Child Loop BB10_8 Depth 3
	movl	(%rbx), %edx
	leaq	(%rax,%rbp), %r14
.LBB10_6:                               #   Parent Loop BB10_2 Depth=1
                                        #     Parent Loop BB10_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rax), %esi
	addq	$4, %rax
	addq	$4, %r14
	cmpl	%edx, %esi
	jl	.LBB10_6
# %bb.7:                                # %.preheader.i.i.preheader
                                        #   in Loop: Header=BB10_5 Depth=2
	leaq	-4(%rax), %r13
.LBB10_8:                               # %.preheader.i.i
                                        #   Parent Loop BB10_2 Depth=1
                                        #     Parent Loop BB10_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	-4(%rcx), %edi
	addq	$-4, %rcx
	cmpl	%edi, %edx
	jl	.LBB10_8
# %bb.9:                                #   in Loop: Header=BB10_5 Depth=2
	cmpq	%rcx, %r13
	jae	.LBB10_11
# %bb.10:                               #   in Loop: Header=BB10_5 Depth=2
	movl	%edi, (%r13)
	movl	%esi, (%rcx)
	jmp	.LBB10_5
.LBB10_11:                              # %_ZSt27__unguarded_partition_pivotIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEET_S9_S9_T0_.exit
                                        #   in Loop: Header=BB10_2 Depth=1
	movq	%r13, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_
	sarq	$2, %r14
	movq	%r13, %r12
	cmpq	$16, %r14
	jg	.LBB10_2
	jmp	.LBB10_12
.LBB10_3:
	leaq	15(%rsp), %rdx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	leaq	14(%rsp), %rdx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
.LBB10_12:                              # %.loopexit
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_, .Lfunc_end10-_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEElNS0_5__ops15_Iter_less_iterEEvT_S9_T0_T1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_,"axG",@progbits,_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_,comdat
	.weak	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_ # -- Begin function _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
	.type	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_,@function
_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_: # @_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rsi, %rax
	subq	%rdi, %rax
	cmpq	$65, %rax
	jl	.LBB11_8
# %bb.1:
	leaq	64(%rdi), %r14
	movq	%r14, %rsi
	callq	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
.LBB11_2:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_5 Depth 2
	cmpq	%rbx, %r14
	je	.LBB11_7
# %bb.3:                                # %.lr.ph.i
                                        #   in Loop: Header=BB11_2 Depth=1
	movl	-4(%r14), %ecx
	movl	(%r14), %eax
	movq	%r14, %rdx
	cmpl	%ecx, %eax
	jge	.LBB11_6
# %bb.4:                                # %.lr.ph.i.i.preheader
                                        #   in Loop: Header=BB11_2 Depth=1
	movq	%r14, %rdx
.LBB11_5:                               # %.lr.ph.i.i
                                        #   Parent Loop BB11_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ecx, (%rdx)
	movl	-8(%rdx), %ecx
	addq	$-4, %rdx
	cmpl	%ecx, %eax
	jl	.LBB11_5
.LBB11_6:                               # %_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops14_Val_less_iterEEvT_T0_.exit.i
                                        #   in Loop: Header=BB11_2 Depth=1
	movl	%eax, (%rdx)
	addq	$4, %r14
	jmp	.LBB11_2
.LBB11_8:
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_ # TAILCALL
.LBB11_7:                               # %_ZSt26__unguarded_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_.exit
	.cfi_def_cfa_offset 32
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_, .Lfunc_end11-_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_,"axG",@progbits,_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_,comdat
	.weak	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_ # -- Begin function _ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	.type	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_,@function
_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_: # @_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	subq	%rdi, %r15
	cmpq	$5, %r15
	jl	.LBB12_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %rbx
	movq	%rdi, %r14
	addq	$-4, %rbx
.LBB12_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx), %ecx
	movl	(%r14), %eax
	movl	%eax, (%rbx)
	addq	$-4, %r15
	movq	%r15, %rdx
	sarq	$2, %rdx
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_
	addq	$-4, %rbx
	cmpq	$4, %r15
	jg	.LBB12_2
.LBB12_3:                               # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_, .Lfunc_end12-_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_,"axG",@progbits,_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_,comdat
	.weak	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_ # -- Begin function _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	.type	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_,@function
_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_: # @_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	subq	%rdi, %rbx
	sarq	$2, %rbx
	cmpq	$2, %rbx
	jl	.LBB13_3
# %bb.1:
	movq	%rdi, %r14
	leaq	-2(%rbx), %r15
	shrq	%r15
.LBB13_2:                               # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %ecx
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	callq	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_
	addq	$-1, %r15
	jb	.LBB13_2
.LBB13_3:                               # %.loopexit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_, .Lfunc_end13-_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_RT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_,"axG",@progbits,_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_,comdat
	.weak	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_ # -- Begin function _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_
	.type	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_,@function
_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_: # @_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_
	.cfi_startproc
# %bb.0:
	leaq	-1(%rdx), %rax
	shrq	$63, %rax
	leaq	(%rdx,%rax), %r8
	decq	%r8
	sarq	%r8
	movq	%rsi, %rax
	cmpq	%rsi, %r8
	jle	.LBB14_6
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %r9
.LBB14_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r9,%r9), %rax
	movl	8(%rdi,%rax,4), %r10d
	cmpl	4(%rdi,%rax,4), %r10d
	jl	.LBB14_3
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB14_2 Depth=1
	leaq	2(,%r9,2), %rax
	jmp	.LBB14_5
.LBB14_3:                               #   in Loop: Header=BB14_2 Depth=1
	leaq	1(,%r9,2), %rax
.LBB14_5:                               # %.lr.ph
                                        #   in Loop: Header=BB14_2 Depth=1
	movl	(%rdi,%rax,4), %r10d
	movl	%r10d, (%rdi,%r9,4)
	movq	%rax, %r9
	cmpq	%r8, %rax
	jl	.LBB14_2
.LBB14_6:                               # %._crit_edge
	testb	$1, %dl
	jne	.LBB14_9
# %bb.7:
	addq	$-2, %rdx
	sarq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB14_9
# %bb.8:
	leaq	(%rax,%rax), %rdx
	movl	4(%rdi,%rdx,4), %edx
	movl	%edx, (%rdi,%rax,4)
	leaq	1(,%rax,2), %rax
.LBB14_9:
	cmpq	%rsi, %rax
	jle	.LBB14_10
.LBB14_11:                              # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	-1(%rax), %rdx
	shrq	$63, %rdx
	addq	%rax, %rdx
	decq	%rdx
	sarq	%rdx
	movl	(%rdi,%rdx,4), %r8d
	cmpl	%ecx, %r8d
	jge	.LBB14_10
# %bb.12:                               #   in Loop: Header=BB14_11 Depth=1
	movl	%r8d, (%rdi,%rax,4)
	movq	%rdx, %rax
	cmpq	%rsi, %rdx
	jg	.LBB14_11
	jmp	.LBB14_13
.LBB14_10:
	movq	%rax, %rdx
.LBB14_13:                              # %_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops14_Iter_less_valEEvT_T0_SA_T1_RT2_.exit
	movl	%ecx, (%rdi,%rdx,4)
	retq
.Lfunc_end14:
	.size	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_, .Lfunc_end14-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEliNS0_5__ops15_Iter_less_iterEEvT_T0_SA_T1_T2_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_,"axG",@progbits,_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_,comdat
	.weak	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_ # -- Begin function _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_
	.type	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_,@function
_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_: # @_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_
	.cfi_startproc
# %bb.0:
	movl	(%rsi), %r8d
	movl	(%rdx), %r9d
	movl	(%rcx), %eax
	cmpl	%r9d, %r8d
	jge	.LBB15_6
# %bb.1:
	cmpl	%eax, %r9d
	jge	.LBB15_3
# %bb.2:
	movl	(%rdi), %eax
	movl	%r9d, (%rdi)
	movl	%eax, (%rdx)
	retq
.LBB15_6:
	cmpl	%eax, %r8d
	jge	.LBB15_8
# %bb.7:
	movl	(%rdi), %eax
	movl	%r8d, (%rdi)
	movl	%eax, (%rsi)
	retq
.LBB15_3:
	movl	(%rdi), %edx
	cmpl	%eax, %r8d
	jge	.LBB15_5
# %bb.4:
	movl	%eax, (%rdi)
	movl	%edx, (%rcx)
	retq
.LBB15_8:
	movl	(%rdi), %esi
	cmpl	%eax, %r9d
	jge	.LBB15_10
# %bb.9:
	movl	%eax, (%rdi)
	movl	%esi, (%rcx)
	retq
.LBB15_5:
	movl	%r8d, (%rdi)
	movl	%edx, (%rsi)
	retq
.LBB15_10:
	movl	%r9d, (%rdi)
	movl	%esi, (%rdx)
	retq
.Lfunc_end15:
	.size	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_, .Lfunc_end15-_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_S9_S9_T0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_,"axG",@progbits,_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_,comdat
	.weak	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_ # -- Begin function _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
	.type	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_,@function
_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_: # @_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
	.cfi_startproc
# %bb.0:
	cmpq	%rsi, %rdi
	je	.LBB16_14
# %bb.1:                                # %.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	leaq	4(%rdi), %rax
	cmpq	%rsi, %rax
	je	.LBB16_13
# %bb.2:                                # %.lr.ph
	movq	%r14, %r15
.LBB16_3:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB16_8 Depth 2
	movq	%r15, %rdi
	movq	%rax, %r15
	movl	4(%rdi), %ebp
	movl	(%r14), %ecx
	cmpl	%ecx, %ebp
	jge	.LBB16_6
# %bb.4:                                #   in Loop: Header=BB16_3 Depth=1
	movq	%r15, %rdx
	subq	%r14, %rdx
	movq	%rdx, %rax
	sarq	$2, %rax
	cmpq	$2, %rax
	jl	.LBB16_10
# %bb.5:                                #   in Loop: Header=BB16_3 Depth=1
	shlq	$2, %rax
	subq	%rax, %rdi
	addq	$8, %rdi
	movq	%r14, %rsi
	callq	memmove@PLT
.LBB16_12:                              # %_ZSt13move_backwardIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES6_ET0_T_S8_S7_.exit
                                        #   in Loop: Header=BB16_3 Depth=1
	movq	%r14, %rax
	jmp	.LBB16_9
.LBB16_6:                               #   in Loop: Header=BB16_3 Depth=1
	movl	(%rdi), %ecx
	movq	%r15, %rax
	cmpl	%ecx, %ebp
	jge	.LBB16_9
# %bb.7:                                # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB16_3 Depth=1
	movq	%r15, %rax
.LBB16_8:                               # %.lr.ph.i
                                        #   Parent Loop BB16_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ecx, (%rax)
	movl	-8(%rax), %ecx
	addq	$-4, %rax
	cmpl	%ecx, %ebp
	jl	.LBB16_8
.LBB16_9:                               # %_ZSt13move_backwardIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES6_ET0_T_S8_S7_.exit
                                        #   in Loop: Header=BB16_3 Depth=1
	movl	%ebp, (%rax)
	leaq	4(%r15), %rax
	cmpq	%rbx, %rax
	jne	.LBB16_3
	jmp	.LBB16_13
.LBB16_10:                              #   in Loop: Header=BB16_3 Depth=1
	movq	%r14, %rax
	cmpq	$4, %rdx
	jne	.LBB16_9
# %bb.11:                               #   in Loop: Header=BB16_3 Depth=1
	movl	%ecx, 4(%rdi)
	jmp	.LBB16_12
.LBB16_13:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB16_14:                              # %.loopexit
	retq
.Lfunc_end16:
	.size	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_, .Lfunc_end16-_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops15_Iter_less_iterEEvT_S9_T0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_default_appendEm,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_default_appendEm # -- Begin function _ZNSt6vectorIiSaIiEE17_M_default_appendEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_default_appendEm,@function
_ZNSt6vectorIiSaIiEE17_M_default_appendEm: # @_ZNSt6vectorIiSaIiEE17_M_default_appendEm
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB17_16
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	8(%rdi), %r15
	movq	16(%rdi), %rax
	subq	%r15, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jae	.LBB17_2
# %bb.5:
	movq	(%rbx), %r12
	subq	%r12, %r15
	movq	%r15, %r13
	sarq	$2, %r13
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	testq	%rax, %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	je	.LBB17_6
# %bb.7:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB17_8
.LBB17_2:
	movl	$0, (%r15)
	leaq	4(%r15), %rdi
	cmpq	$1, %r14
	je	.LBB17_4
# %bb.3:                                # %_ZSt6fill_nIPimiET_S1_T0_RKT1_.exit.loopexit.i.i.i
	leaq	-4(,%r14,4), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	(%r15,%r14,4), %rdi
.LBB17_4:                               # %_ZSt27__uninitialized_default_n_aIPimiET_S1_T0_RSaIT1_E.exit
	movq	%rdi, 8(%rbx)
	jmp	.LBB17_15
.LBB17_6:
	xorl	%ebp, %ebp
.LBB17_8:
	leaq	(,%r13,4), %r13
	addq	%rbp, %r13
	movl	$0, (%r13)
	cmpq	$1, %r14
	je	.LBB17_10
# %bb.9:                                # %_ZSt6fill_nIPimiET_S1_T0_RKT1_.exit.loopexit.i.i.i30
	leaq	4(%r13), %rdi
	leaq	-4(,%r14,4), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
.LBB17_10:                              # %_ZSt27__uninitialized_default_n_aIPimiET_S1_T0_RSaIT1_E.exit32
	testq	%r15, %r15
	jle	.LBB17_12
# %bb.11:
	movq	%rbp, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB17_12:                              # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	testq	%r12, %r12
	je	.LBB17_14
# %bb.13:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB17_14:                              # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit35
	movq	%rbp, (%rbx)
	leaq	(,%r14,4), %rax
	addq	%r13, %rax
	movq	%rax, 8(%rbx)
	movq	(%rsp), %rax                    # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
.LBB17_15:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB17_16:
	retq
.Lfunc_end17:
	.size	_ZNSt6vectorIiSaIiEE17_M_default_appendEm, .Lfunc_end17-_ZNSt6vectorIiSaIiEE17_M_default_appendEm
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB18_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB18_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11deviceDFSk5PiS_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11deviceDFSk4PiS_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11deviceDFSk3PiS_S_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end18:
	.size	__hip_module_ctor, .Lfunc_end18-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB19_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB19_2:
	retq
.Lfunc_end19:
	.size	__hip_module_dtor, .Lfunc_end19-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11deviceDFSk5PiS_S_S_,@object # @_Z11deviceDFSk5PiS_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z11deviceDFSk5PiS_S_S_
	.p2align	3, 0x0
_Z11deviceDFSk5PiS_S_S_:
	.quad	_Z26__device_stub__deviceDFSk5PiS_S_S_
	.size	_Z11deviceDFSk5PiS_S_S_, 8

	.type	_Z11deviceDFSk4PiS_S_S_,@object # @_Z11deviceDFSk4PiS_S_S_
	.globl	_Z11deviceDFSk4PiS_S_S_
	.p2align	3, 0x0
_Z11deviceDFSk4PiS_S_S_:
	.quad	_Z26__device_stub__deviceDFSk4PiS_S_S_
	.size	_Z11deviceDFSk4PiS_S_S_, 8

	.type	_Z11deviceDFSk3PiS_S_S_,@object # @_Z11deviceDFSk3PiS_S_S_
	.globl	_Z11deviceDFSk3PiS_S_S_
	.p2align	3, 0x0
_Z11deviceDFSk3PiS_S_S_:
	.quad	_Z26__device_stub__deviceDFSk3PiS_S_S_
	.size	_Z11deviceDFSk3PiS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/hasimsait/CS406-Group-Project/main/kernel.hip"
	.size	.L.str, 108

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d %d\n"
	.size	.L.str.1, 7

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"GPU took: %f s\n"
	.size	.L.str.2, 16

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"fname: "
	.size	.L.str.3, 8

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"r"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Done reading."
	.size	.L.str.5, 14

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.6, 21

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.8, 26

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"vector::_M_default_append"
	.size	.L.str.9, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11deviceDFSk5PiS_S_S_"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z11deviceDFSk4PiS_S_S_"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11deviceDFSk3PiS_S_S_"
	.size	.L__unnamed_3, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__deviceDFSk5PiS_S_S_
	.addrsig_sym _Z26__device_stub__deviceDFSk4PiS_S_S_
	.addrsig_sym _Z26__device_stub__deviceDFSk3PiS_S_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z11deviceDFSk5PiS_S_S_
	.addrsig_sym _Z11deviceDFSk4PiS_S_S_
	.addrsig_sym _Z11deviceDFSk3PiS_S_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11deviceDFSk5PiS_S_S_ ; -- Begin function _Z11deviceDFSk5PiS_S_S_
	.globl	_Z11deviceDFSk5PiS_S_S_
	.p2align	8
	.type	_Z11deviceDFSk5PiS_S_S_,@function
_Z11deviceDFSk5PiS_S_S_:                ; @_Z11deviceDFSk5PiS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s1, s[8:9], 0x0
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s1, v1
	s_cbranch_execz .LBB0_34
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v4, v5
	s_cbranch_execz .LBB0_33
; %bb.2:                                ; %.lr.ph116.preheader
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v6, v4
	s_mov_b32 s2, 0
.LBB0_3:                                ; %.lr.ph116
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_13 Depth 4
                                        ;           Child Loop BB0_17 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	s_mov_b32 s3, exec_lo
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v7, v1
	s_cbranch_execz .LBB0_31
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_ashrrev_i32_e32 v8, 31, v7
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v8, v9
	s_cbranch_execz .LBB0_30
; %bb.5:                                ; %.lr.ph114.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v10, v8
	s_mov_b32 s9, 0
.LBB0_6:                                ; %.lr.ph114
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_9 Depth 3
                                        ;         Child Loop BB0_13 Depth 4
                                        ;           Child Loop BB0_17 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[11:12], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v11, v7
	v_cmp_ne_u32_e64 s0, v11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_28
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_ashrrev_i32_e32 v12, 31, v11
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[11:12]
	v_add_co_u32 v12, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v12, v13
	s_cbranch_execz .LBB0_27
; %bb.8:                                ; %.lr.ph112.preheader
                                        ;   in Loop: Header=BB0_6 Depth=2
	v_mov_b32_e32 v14, v12
	s_mov_b32 s14, 0
.LBB0_9:                                ; %.lr.ph112
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_13 Depth 4
                                        ;           Child Loop BB0_17 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	s_mov_b32 s15, exec_lo
	v_lshlrev_b64 v[15:16], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, s6, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
	global_load_b32 v15, v[15:16], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v15, v11
	s_cbranch_execz .LBB0_25
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=3
	v_cmp_ne_u32_e32 vcc_lo, v15, v7
	v_cmp_ne_u32_e64 s0, v15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_24
; %bb.11:                               ;   in Loop: Header=BB0_9 Depth=3
	v_ashrrev_i32_e32 v16, 31, v15
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[15:16]
	v_add_co_u32 v16, vcc_lo, s4, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v17, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v16, v17
	s_cbranch_execz .LBB0_23
; %bb.12:                               ; %.lr.ph110.preheader
                                        ;   in Loop: Header=BB0_9 Depth=3
	v_mov_b32_e32 v18, v16
	s_mov_b32 s18, 0
.LBB0_13:                               ; %.lr.ph110
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_17 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v19, 31, v18
	v_lshlrev_b64 v[19:20], 2, v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v19, vcc_lo, s6, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s7, v20, vcc_lo
	global_load_b32 v19, v[19:20], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v19, v15
	v_cmp_ne_u32_e64 s0, v19, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s19, s0
	s_cbranch_execz .LBB0_21
; %bb.14:                               ;   in Loop: Header=BB0_13 Depth=4
	v_cmp_ne_u32_e32 vcc_lo, v19, v7
	v_cmp_ne_u32_e64 s0, v19, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s20, s0
	s_cbranch_execz .LBB0_20
; %bb.15:                               ;   in Loop: Header=BB0_13 Depth=4
	v_ashrrev_i32_e32 v20, 31, v19
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	v_add_co_u32 v19, vcc_lo, s4, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, s5, v20, vcc_lo
	global_load_b64 v[19:20], v[19:20], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v19, v20
	s_cbranch_execz .LBB0_19
; %bb.16:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_13 Depth=4
	v_ashrrev_i32_e32 v22, 31, v19
	v_mov_b32_e32 v21, v19
	s_mov_b32 s22, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], 2, v[21:22]
	v_add_co_u32 v21, vcc_lo, s6, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v22, vcc_lo, s7, v22, vcc_lo
.LBB0_17:                               ; %.lr.ph
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_9 Depth=3
                                        ;         Parent Loop BB0_13 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	global_load_b32 v4, v[21:22], off
	v_add_nc_u32_e32 v19, 1, v19
	v_add_co_u32 v21, vcc_lo, v21, 4
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v19, v20
	s_or_b32 s22, vcc_lo, s22
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, v4, v1
	v_add_co_ci_u32_e64 v0, s0, 0, v0, s0
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB0_17
; %bb.18:                               ; %Flow
                                        ;   in Loop: Header=BB0_13 Depth=4
	s_or_b32 exec_lo, exec_lo, s22
.LBB0_19:                               ; %Flow146
                                        ;   in Loop: Header=BB0_13 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s21
.LBB0_20:                               ; %Flow147
                                        ;   in Loop: Header=BB0_13 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB0_21:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_13 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s19
	v_add_nc_u32_e32 v18, 1, v18
	v_cmp_ge_i32_e32 vcc_lo, v18, v17
	s_or_b32 s18, vcc_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_13
; %bb.22:                               ; %Flow148
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s18
.LBB0_23:                               ; %Flow149
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_24:                               ; %Flow150
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_25:                               ; %.loopexit105
                                        ;   in Loop: Header=BB0_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v14, 1, v14
	v_cmp_ge_i32_e32 vcc_lo, v14, v13
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_9
; %bb.26:                               ; %Flow151
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
.LBB0_27:                               ; %Flow152
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_28:                               ; %.loopexit106
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v10, 1, v10
	v_cmp_ge_i32_e32 vcc_lo, v10, v9
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_6
; %bb.29:                               ; %Flow153
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_30:                               ; %Flow154
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_31:                               ; %.loopexit107
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v6, 1, v6
	v_cmp_ge_i32_e32 vcc_lo, v6, v5
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_3
; %bb.32:                               ; %Flow155
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_33:                               ; %Flow156
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v1, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v3, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_34:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11deviceDFSk5PiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 23
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11deviceDFSk5PiS_S_S_, .Lfunc_end0-_Z11deviceDFSk5PiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1072
; NumSgprs: 25
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 25
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11deviceDFSk4PiS_S_S_ ; -- Begin function _Z11deviceDFSk4PiS_S_S_
	.globl	_Z11deviceDFSk4PiS_S_S_
	.p2align	8
	.type	_Z11deviceDFSk4PiS_S_S_,@function
_Z11deviceDFSk4PiS_S_S_:                ; @_Z11deviceDFSk4PiS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s1, s[8:9], 0x0
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s1, v1
	s_cbranch_execz .LBB1_26
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v0, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v4, v5
	s_cbranch_execz .LBB1_25
; %bb.2:                                ; %.lr.ph82.preheader
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v6, v4
	s_mov_b32 s2, 0
.LBB1_3:                                ; %.lr.ph82
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
                                        ;       Child Loop BB1_9 Depth 3
                                        ;         Child Loop BB1_13 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	s_mov_b32 s3, exec_lo
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v7, v1
	s_cbranch_execz .LBB1_23
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	v_ashrrev_i32_e32 v8, 31, v7
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v8, v9
	s_cbranch_execz .LBB1_22
; %bb.5:                                ; %.lr.ph80.preheader
                                        ;   in Loop: Header=BB1_3 Depth=1
	v_mov_b32_e32 v10, v8
	s_mov_b32 s9, 0
.LBB1_6:                                ; %.lr.ph80
                                        ;   Parent Loop BB1_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_9 Depth 3
                                        ;         Child Loop BB1_13 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[11:12], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, v11, v7
	v_cmp_ne_u32_e64 s0, v11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB1_20
; %bb.7:                                ;   in Loop: Header=BB1_6 Depth=2
	v_ashrrev_i32_e32 v12, 31, v11
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[11:12]
	v_add_co_u32 v12, vcc_lo, s4, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v12, v13
	s_cbranch_execz .LBB1_19
; %bb.8:                                ; %.lr.ph78.preheader
                                        ;   in Loop: Header=BB1_6 Depth=2
	v_mov_b32_e32 v14, v12
	s_mov_b32 s14, 0
.LBB1_9:                                ; %.lr.ph78
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_13 Depth 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	s_mov_b32 s15, exec_lo
	v_lshlrev_b64 v[15:16], 2, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, s6, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
	global_load_b32 v15, v[15:16], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 v15, v11
	s_cbranch_execz .LBB1_17
; %bb.10:                               ;   in Loop: Header=BB1_9 Depth=3
	v_cmp_ne_u32_e32 vcc_lo, v15, v7
	v_cmp_ne_u32_e64 s0, v15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB1_16
; %bb.11:                               ;   in Loop: Header=BB1_9 Depth=3
	v_ashrrev_i32_e32 v16, 31, v15
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	v_add_co_u32 v15, vcc_lo, s4, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v16, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v15, v16
	s_cbranch_execz .LBB1_15
; %bb.12:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_9 Depth=3
	v_ashrrev_i32_e32 v18, 31, v15
	v_mov_b32_e32 v17, v15
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_add_co_u32 v17, vcc_lo, s6, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v18, vcc_lo, s7, v18, vcc_lo
.LBB1_13:                               ; %.lr.ph
                                        ;   Parent Loop BB1_3 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ;       Parent Loop BB1_9 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_b32 v4, v[17:18], off
	v_add_nc_u32_e32 v15, 1, v15
	v_add_co_u32 v17, vcc_lo, v17, 4
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v15, v16
	s_or_b32 s18, vcc_lo, s18
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, v4, v1
	v_add_co_ci_u32_e64 v0, s0, 0, v0, s0
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB1_13
; %bb.14:                               ; %Flow
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s18
.LBB1_15:                               ; %Flow107
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s17
.LBB1_16:                               ; %Flow108
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
.LBB1_17:                               ; %.loopexit
                                        ;   in Loop: Header=BB1_9 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v14, 1, v14
	v_cmp_ge_i32_e32 vcc_lo, v14, v13
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB1_9
; %bb.18:                               ; %Flow109
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
.LBB1_19:                               ; %Flow110
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_20:                               ; %.loopexit74
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v10, 1, v10
	v_cmp_ge_i32_e32 vcc_lo, v10, v9
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_6
; %bb.21:                               ; %Flow111
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB1_22:                               ; %Flow112
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB1_23:                               ; %.loopexit75
                                        ;   in Loop: Header=BB1_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v6, 1, v6
	v_cmp_ge_i32_e32 vcc_lo, v6, v5
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_3
; %bb.24:                               ; %Flow113
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_25:                               ; %Flow114
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v1, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v3, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB1_26:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11deviceDFSk4PiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z11deviceDFSk4PiS_S_S_, .Lfunc_end1-_Z11deviceDFSk4PiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 852
; NumSgprs: 21
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11deviceDFSk3PiS_S_S_ ; -- Begin function _Z11deviceDFSk3PiS_S_S_
	.globl	_Z11deviceDFSk3PiS_S_S_
	.p2align	8
	.type	_Z11deviceDFSk3PiS_S_S_,@function
_Z11deviceDFSk3PiS_S_S_:                ; @_Z11deviceDFSk3PiS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s1, s[8:9], 0x0
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s1, v1
	s_cbranch_execz .LBB2_18
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v7, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v12, v5
	v_cmp_lt_i32_e32 vcc_lo, v4, v5
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_18
; %bb.2:                                ; %.lr.ph63
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	v_mov_b32_e32 v0, 2
	s_add_u32 s1, s4, 4
	s_addc_u32 s2, s5, 0
	s_mov_b32 s3, 0
.LBB2_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_6 Depth 2
                                        ;       Child Loop BB2_9 Depth 3
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_add_co_u32 v8, vcc_lo, s6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	global_load_b32 v13, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v13, v1
	s_cbranch_execz .LBB2_17
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	v_ashrrev_i32_e32 v14, 31, v13
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[13:14]
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v10, v11
	s_cbranch_execz .LBB2_16
; %bb.5:                                ; %.lr.ph61.preheader
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_mov_b32 s12, 0
.LBB2_6:                                ; %.lr.ph61
                                        ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_9 Depth 3
	v_ashrrev_i32_e32 v11, 31, v10
	v_max_i32_e32 v5, v13, v1
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[10:11]
	v_add_co_u32 v11, vcc_lo, s6, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v16, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v5, v16
	s_cbranch_execz .LBB2_14
; %bb.7:                                ;   in Loop: Header=BB2_6 Depth=2
	v_ashrrev_i32_e32 v17, 31, v16
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[14:15], 2, v[16:17]
	v_add_co_u32 v14, vcc_lo, s4, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v14, v15
	s_cbranch_execz .LBB2_13
; %bb.8:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB2_6 Depth=2
	v_ashrrev_i32_e32 v15, 31, v14
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], 2, v[14:15]
	v_add_co_u32 v18, vcc_lo, s6, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v19, vcc_lo
.LBB2_9:                                ; %.lr.ph
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v5, v[18:19], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e64 v5, v1
	s_cbranch_execz .LBB2_11
; %bb.10:                               ;   in Loop: Header=BB2_9 Depth=3
	global_atomic_add_u32 v[6:7], v0, off
	global_load_b32 v15, v[8:9], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v16, 31, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	v_add_co_u32 v15, vcc_lo, s10, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	global_atomic_add_u32 v[15:16], v0, off
	global_load_b32 v15, v[11:12], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v16, 31, v15
	v_lshlrev_b64 v[15:16], 2, v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v15, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s11, v16, vcc_lo
	global_atomic_add_u32 v[15:16], v0, off
	global_load_b32 v16, v[11:12], off
.LBB2_11:                               ;   in Loop: Header=BB2_9 Depth=3
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_nc_u32_e32 v14, 1, v14
	v_add_co_u32 v18, s0, v18, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v19, s0, 0, v19, s0
	v_lshlrev_b64 v[20:21], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v20, vcc_lo, s1, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s2, v21, vcc_lo
	global_load_b32 v5, v[20:21], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v14, v5
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB2_9
; %bb.12:                               ; %.loopexit.loopexit
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s15
	global_load_b32 v13, v[8:9], off
.LBB2_13:                               ; %Flow
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
.LBB2_14:                               ; %.loopexit
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v14, 31, v13
	v_add_nc_u32_e32 v10, 1, v10
	v_lshlrev_b64 v[11:12], 2, v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s1, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s2, v12, vcc_lo
	global_load_b32 v5, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v10, v5
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB2_6
; %bb.15:                               ; %.loopexit53.loopexit
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	global_load_b32 v12, v[2:3], off offset:4
.LBB2_16:                               ; %Flow80
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB2_17:                               ; %.loopexit53
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_e32 v4, 1, v4
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v4, v12
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_3
.LBB2_18:                               ; %.loopexit54
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11deviceDFSk3PiS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z11deviceDFSk3PiS_S_S_, .Lfunc_end2-_Z11deviceDFSk3PiS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 836
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11deviceDFSk5PiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     25
    .sgpr_spill_count: 0
    .symbol:         _Z11deviceDFSk5PiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11deviceDFSk4PiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z11deviceDFSk4PiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11deviceDFSk3PiS_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11deviceDFSk3PiS_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
