#include <stdio.h> //printf
#include <stdlib.h>//srand, rand
#include <time.h>  //time
#include <fstream>
#include <string>

#include <iostream>
#include <ctime>
#include <ratio>
#include <chrono>

//globalne ustawienia
const unsigned BLOCKS_PER_GRID = 16;
const unsigned THREADS_PER_BLOCK = 256;

class Matrix{
	unsigned M,N; //rozmiary macierzy
	double** tab;      //wskaznik na dane macierzy
	Matrix minor(unsigned m,unsigned n){
		Matrix result(M-1,N-1);
		for(unsigned i=0;i<M;i++){
			for(unsigned j=0;j<N;j++){
				if(i<m && j<n) result.set(i,j,this->get(i,j));
				else if(i<m && j>n) result.set(i,j-1,this->get(i,j));
				else if(i>m && j<n) result.set(i-1,j,this->get(i,j));
				else if(i>m && j>n) result.set(i-1,j-1,this->get(i,j));
			}
		}
		return result;
	}
public:
	Matrix(unsigned M, unsigned N){
		this->M = M;
		this->N = N;
		tab = new double*[M];
		for(unsigned i=0;i<M;i++){
			tab[i] = new double[N];
			for(unsigned j=0;j<N;j++){
				tab[i][j] = (i==j); //domyslnie macierz jednostkowa
			}
		}
	}

	~Matrix(){
		for(unsigned i=0;i<M;i++){
			delete[] tab[i];
		}
		delete[] tab;
	}

	unsigned getRows() const{ return M;}

	unsigned getColumns() const{ return N;}

	double get(unsigned m, unsigned n) const{
		if(m<M && n<N) return tab[m][n];
		throw "Nie znaleziono elementu pod podana para indeksow.";
	}

	void set(unsigned m, unsigned n, double num){
		if(m<M && n<N) tab[m][n] = num;
		else throw "Nie mozna ustawic wartosci elementu pod podana para indeksow.";
	}

	Matrix operator+(const Matrix& mat) const{
		if(this->M != mat.getRows() || this->N != mat.getColumns()) throw "Nie mozna dodawac macierzy o roznych wymiarach!";
		Matrix result = Matrix(M,N);
		for(unsigned i=0;i<M;i++){
			for(unsigned j=0;j<N;j++){
				result.set(i,j,this->get(i,j)+mat.get(i,j));
			}
		}
		return result;
	}

	Matrix operator*(const Matrix& mat) const{
		if(this->N != mat.getRows()) throw "Pierwsza macierz nie ma tylu kolumn, co druga wierszy - odmowa wykonania mnozenia!";
		Matrix result = Matrix(M, mat.getColumns());
		for(unsigned i=0;i<M;i++){
			for(unsigned j=0;j<mat.getColumns();j++){
				//result.set(i,j,this->get(i,j)+mat.get(i,j));
				result.set(i,j,0.0);
				for(unsigned k=0;k<this->N;k++){
					result.set(i,j,result.get(i,j)+this->get(i,k)*mat.get(k,j));
				}
			}
		}
		return result;
	}

	double det(){
		if(M != N) throw "Wyznacznik mozna obliczyc tylko dla macierzy kwadratowej!";
		if(M == 1) return get(0,0);
		else{
			double result = 0.0;
			for(unsigned i=0;i<M;i++){
				//result += ((i%2==0)?(1.0):(-1.0))*get(i,0)*minor(i,0).det();
				Matrix minr = minor(i,0);
				//printf("%.1f \n", get(i,0));
				result += ((i%2==0)?(1.0):(-1.0))*get(i,0)*minr.det();
			}
			return result;
		}
	}

	Matrix inverse(){
		double mainDet = det();
		if(mainDet == 0.0 || mainDet == -0.0) throw "Wyznacznik macierzy rowny zero!";
		Matrix result = Matrix(M,N);
		if(M==1) result.set(0,0,1.0/mainDet);
		else{
			for(unsigned i=0;i<M;i++){
				for(unsigned j=0;j<N;j++){
					double detElement = (((i%2)+(j%2))%2==0?1.0:-1.0)*minor(i,j).det();

					result.set(j,i,detElement/mainDet);
				}
			}
		}
		return result;

	}
  	void setSize(unsigned M, unsigned N) {
		for(int i =0 ;i<this->M;i++){
			delete[] tab[i];
		}
		delete[] tab;

		this->M = M;
		this->N = N;

		this->tab = new double* [this->M];
		for (unsigned i = 0; i < this->M; i++) {
			tab[i] = new double[this->N];
			for(unsigned j=0;j< this->N; j++){
				tab[i][j] = (i==j); //domyslnie macierz jednostkowa	
			}
		}
	}
	

};

void printMatrixCPU(const char* format, const Matrix& matrix){
	for(unsigned i=0; i<matrix.getRows(); i++){
		for(unsigned j=0; j<matrix.getColumns(); j++){
			printf(format, matrix.get(i,j));
		}
		printf("\n");
	}
}
void printMatrixGPU(const char* format, void* matrix){
	//debug
	//printf("%d\n",*(unsigned*)matrix);
	//printf("%d\n",*((unsigned*)matrix+1));
	
	for(unsigned i=0; i<*(unsigned*)matrix; i++){  //wartosc *(unsigned*)matrix przechowuje liczbe wierszy
		for(unsigned j=0; j<*((unsigned*)matrix+1); j++){ //wartosc *(unsigned*)matrix+1 przechowuje liczbe kolumn
			//duzo castowania
			printf(format, *((double*)((unsigned*)matrix+2)+i*(*((unsigned*)matrix+1))+j));
		}
		printf("\n");
	}
}

void copyMatrixToGPU( void* ptr, const Matrix& matrix){
	//Kopia macierzy w pamięci GPU
	*((unsigned*)ptr) = matrix.getRows();
	*((unsigned*)ptr+1) = matrix.getColumns();
	for(unsigned i=0;i<matrix.getRows();i++){
		for(unsigned j=0;j<matrix.getColumns();j++){
			//*((double*)((unsigned*)ptr+2)+(i*matrix.getRows()+j)) = matrix.get(i,j);
			*((double*)((unsigned*)ptr+2)+(i*matrix.getColumns()+j)) = matrix.get(i,j);
		}
	}
}

__global__
void add(void* matrix1, void* matrix2, void* result){//PRZY ZALOZENIU, ZE PAMIEC jest juz zaalokowana, w a matrix1 i matrix 2 są juz gotowe wartosci, zakladamy tez, ze zgadzaja sie wymiary macierzy i ewentualne inne warunki, NOTE: wymiary macierzy trzeba wpisac poza kernelem
	unsigned idx = threadIdx.x + blockDim.x * blockIdx.x;
	unsigned stride = blockDim.x * gridDim.x;

	for(unsigned i = idx; i<(*(unsigned*)matrix1)*(*((unsigned*)matrix1+1)); i+=stride){
		*((double*)((unsigned*)result+2)+i) = *((double*)((unsigned*)matrix1+2)+i) + *((double*)((unsigned*)matrix2+2)+i); 
	}
}

__global__
void mul(void* matrix1, void* matrix2, void* result){
	unsigned idx = threadIdx.x + blockDim.x * blockIdx.x;
	unsigned stride = blockDim.x * gridDim.x;

	
	for(unsigned i = idx; i<(*(unsigned*)matrix1)*(*((unsigned*)matrix2+1)); i+=stride){ //przechodzimy po elementach macierzy wynikowej
		double product = 0.0;
		for(unsigned j=0; j<*(unsigned*)matrix2; j++){
			product += (*((double*)((unsigned*)matrix1+2)+(i/(*((unsigned*)matrix2+1)))*(*((unsigned*)matrix1+1))+j))
				*  (*((double*)((unsigned*)matrix2+2)+j*(*((unsigned*)matrix2+1))+i%(*((unsigned*)matrix2+1))));
		}
		*((double*)((unsigned*)result+2)+i) = product;
	}
}


__global__
void detHelper(void* matrix, double* tab_helper/*, unsigned N*/){
	unsigned idx = threadIdx.x + blockDim.x * blockIdx.x;
	unsigned stride = blockDim.x * gridDim.x;
	unsigned N = *(unsigned*)matrix;

	//zapisujemy idx w silniowym systemie liczbowym:
	int* idxTab = new int[N];
	for(int i=1;i<=N;i++){
		idxTab[N-i] = idx%i;
		idx/=i;
	}
	//upewniamy sie, ze udzial w obliczeniach biora tylko te watki, dla ktorych oryginalny index nalezal do przedzialu <0, N!), czyli ze mamy co najwyzej N! watkow wykonujacych jakas prace
	if(idx==0){
		//zapisujemy stride (skok dla pojedynczego watku) w silniowym systemie liczbowym
		int* strideTab = new int[N];
		for(int i=1;i<=N;i++){
			strideTab[N-i] = stride%i;
			stride/=i;
		}

		//przywracamy oryginalne wartosci
		idx = threadIdx.x + blockDim.x * blockIdx.x;
		stride = blockDim.x * gridDim.x;

		//warunek konca pracy watku (wyjscie poza zakres na skutek stalego dodawania strideTab do idxTab)
		while(idxTab[0]<N){
			//wskaznik parzystosci permutacji, 0 - parzysta, 1 - nieparzysta
			int parz = 0;
			for(int i=0;i<N;i++) parz = (parz + idxTab[i])%2;
			//konwersja na interesujaca permutacje
			for(int i=0;i<N;i++){
				for(int j=1;j<=N;j++){
					bool niepojawilo = true;
					for(int k=0;k<i;k++){
						if(idxTab[k] == j){niepojawilo = false; break;}
					}
					if(niepojawilo){
						if(idxTab[i]==0){
							idxTab[i]=j;break;
						}
						else idxTab[i]--;
					}
				}
			}
			//iloczyn czastkowy (jeden z N! z wzoru na wyznacznik), z odpowiednim znakiem
			double product = ((parz%2==0) ? 1.0 : (-1.0));

			for(int i=0;i<N;i++) product*= *(((double*)((unsigned*)matrix+2))+i*N+(idxTab[i]-1));//element z i-tego wiersza i (idxTab[i]-1) kolumny

			tab_helper[idx] += product;

			//konwersja odwrotna (przywrocenie numeru indexu)
			for(int i=0;i<N;i++){
				int ile = 0;
				for(int j=i+1;j<N;j++){
					if(idxTab[j]<idxTab[i]) ile++;
				}
				idxTab[i] = ile;
			}
			//dodanie idxTab+=strideTab, (patrz: warunek konca petli)
			int ak=0;
			for(int i=1;i<=N;i++){
				idxTab[N-i]=idxTab[N-i]+strideTab[N-i]+ak;
				ak=idxTab[N-i]/i;
				if(i!=N) idxTab[N-i]%=i;
			}
			idxTab[0]+=ak;


		}
		delete[] strideTab;
	}
	delete[] idxTab;
}



void loadMatrixFromFile(Matrix & matrix) {
	char filename[50];
	printf("Podaj nazwe pliku: ");
	scanf("%s", filename);

	std::ifstream myfile;
	myfile.open(filename);
	
	if (!myfile.good()){
		printf("Nie udalo sie otworzyc pliku o podanej nazwie!\n");
	}
	if (myfile.is_open())
	{
		std::string line;
		getline(myfile, line);
		unsigned M = stoul(line);
		getline(myfile, line);
		unsigned N = stoul(line);
		matrix.setSize(M, N);
			for (unsigned i = 0; i < M; i++) {
				for (unsigned j = 0; j < N; j++) {
					getline(myfile, line);
					matrix.set(i, j, stod(line));
				}
			}

		myfile.close();
	}
}

void saveMatrixToFile(Matrix& matrixInt) {
	char filename[50];
	printf("Podaj nazwe pliku: ");
	scanf("%s", filename);

	std::ofstream myfile;
	myfile.open(filename);
	myfile << matrixInt.getRows()<<"\n";
	myfile << matrixInt.getColumns()<<"\n";
	for (int i = 0; i < matrixInt.getRows(); i++) {
		for (int j = 0; j < matrixInt.getColumns(); j++) {
			myfile << matrixInt.get(i, j)<< "\n";
		}
	}
	myfile.close();
}




using namespace std::chrono;

int main(){
	const unsigned M = 3; //test values
	const unsigned N = 3;
	Matrix matrix1(M,N);
 	Matrix matrix2(M,N);
	for(int i = 0 ;i<M;i++){
		for(int j = 0 ; j<N ; j++){
			matrix1.set(i,j,i);
		}
	}
	matrix1.set(0,0,1.0);
	matrix1.set(0,1,-1.0);
	matrix1.set(0,2,2.0);
	matrix1.set(1,0,3.0);
	matrix1.set(1,1,0.0);
	matrix1.set(1,2,-4.0);
	matrix1.set(2,0,2.0);
	matrix1.set(2,1,3.0);
	matrix1.set(2,2,5.0);

	for(int i = 0 ;i<M;i++){
		for(int j = 0 ; j<N ; j++){
			matrix2.set(i,j,j);
		}
	}

	
	int x = 11;
	while (x != 0)
	{
		printf("Macierz 1:\n");
		printMatrixCPU("%.2f ", matrix1);
		printf("\n");
		printf("Macierz 2:\n");
		printMatrixCPU("%.2f ", matrix2);
		printf("\n");

		printf( "*******************MENU********************\n");
		printf("1.Wczytaj macierz z pliku\n");
		printf("2.Zapisz macierz do pliku\n");
		printf("3.Wyznacznik ( det(m1) )\n");
		printf("4.Dodaj macierze (m1=m1+m2)\n");
		printf("5.Przemnóż macierze (m1=m1*m2)\n");
		printf("6.Macierz odwrotna ( m1=m1^(-1) )\n");
    		printf("0.Wyjdź\n");

		printf("Wybieram : \n");
		scanf("%d", &x);
		system("clear");

    		int subselect= 0;
		switch (x){
		case 1: //ladowanie
			printf("1 - Macierz 1\n2 - Macierz 2\n");
			scanf("%d", &subselect);
			subselect==1?loadMatrixFromFile(matrix1):loadMatrixFromFile(matrix2);
		break;
		case 2: //zapisywanie
			printf("1 - Macierz 1\n2 - Macierz 2\n");
			scanf("%d", &subselect);
			subselect==1?saveMatrixToFile(matrix1):saveMatrixToFile(matrix2);
		break;
		case 3: //wyznacznik
				
			if(matrix1.getRows() != matrix1.getColumns()){
				printf("Wymiary macierzy musza byc rowne!!!");	
			}
			else{
				//deklarcja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;

				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				cudaMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));

				//kopia macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);

				//dynamiczne przystosowanie liczby watkow (ominiecie bledu BLOCKS_PER_GRID * THREADS_PER_BLOCK >= N!)
				unsigned tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
				unsigned tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;

				switch(matrix1.getRows()){
					case 1:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 2:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 3:
					tempBLOCKS_PER_GRID=2;
					tempTHREADS_PER_BLOCK=2;
					break;
					case 4:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=4;
					break;
					case 5:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=16;
					break;
					case 6:
					tempBLOCKS_PER_GRID=8;
					tempTHREADS_PER_BLOCK=64;
					break;
					default:
					tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
					tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;
				}

				//tablica i wskaznik pomocnicze
				double* tab = NULL;//new double[BLOCKS_PER_GRID * THREADS_PER_BLOCK];
				cudaMallocManaged(&tab, sizeof(double) * tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK);
				for(unsigned i=0;i<tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK; i++) tab[i] = 0.0;
				double w = 0.0;
				
				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tbk = high_resolution_clock::now();

				//jezeli rozmiar macierzy wiekszy od jeden wywolaj kernel, oblicz wyznacznik
				if(matrix1.getRows()>1){

					detHelper<<<tempBLOCKS_PER_GRID, tempTHREADS_PER_BLOCK>>>(d_1, tab);
					cudaDeviceSynchronize();
					for(unsigned i=0;i<tempBLOCKS_PER_GRID*tempTHREADS_PER_BLOCK; i++){
						w += tab[i];	
					}

				}
				//w przeciwnym wypadku wyznacznikiem jest jedyny element macierzy
				else w = *((double*)((unsigned*)d_1+2));

				//koniec mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tk = high_resolution_clock::now();

				duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
				duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

				printf("(Device) Wyznacznik obliczony przy uzyciu kernela:\n");
				printf("%f\n\n", w);
				
				printf("(Device) wykonano w ciagu: %fs\n", time_nalloc.count());
				printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
				printf("\n");
				
				cudaFree(d_1);
				cudaFree(tab);
				//delete[] tab;

				//poczatek pomiaru czasu na CPU
				high_resolution_clock::time_point tpc = high_resolution_clock::now();

				double d = matrix1.det();
				
				//koniec pomiaru czasu na CPU
				high_resolution_clock::time_point tpk = high_resolution_clock::now();

				duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);

				printf("Wynik obliczen na CPU:\n");
				printf("%f\n\n", d);
				printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
				printf("\n");


			}

		break;
		case 4: //dodawanie
			if(matrix1.getRows() != matrix2.getRows() || matrix1.getColumns()!=matrix2.getColumns()){
				printf("Macierze różnych rozmiarów!\n");
			}
			else{
				//realizacja na GPU:
				//deklaracja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;
				void* d_2 = NULL;
				void* d_r = NULL;
				
				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				cudaMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				cudaMallocManaged(&d_2, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				cudaMallocManaged(&d_r, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
		
				//kopie macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);
				copyMatrixToGPU(d_2, matrix2);

				//poczatek mierzenia czasu, jedynie obliczenia
				high_resolution_clock::time_point tbk = high_resolution_clock::now();

				//ustawienie rozmiaru macierzy wynikowej
				*(unsigned*)d_r = matrix1.getRows();
				*((unsigned*)d_r+1) = matrix1.getColumns();
				add<<<BLOCKS_PER_GRID, THREADS_PER_BLOCK>>>(d_1, d_2, d_r);	
				cudaDeviceSynchronize();

				//koniec mierzenia czasu
				high_resolution_clock::time_point tk = high_resolution_clock::now();

				//obliczenie delt czasowych:
				duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
				duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

				printf("Wynik obliczen na GPU:\n");
				printMatrixGPU("%.2f ", d_r);
				printf("\n");
				printf("(Device) wykonano w ciagu: %fs\n", time_nalloc.count());
				printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
				printf("\n");

				cudaFree(d_1);
				cudaFree(d_2);
				cudaFree(d_r);
				
				//poczatek pomiaru czasu na CPU
				high_resolution_clock::time_point tpc = high_resolution_clock::now();

				Matrix result = matrix1 + matrix2;//(matrix1.getRows(),matrix.getColumns());
				
				//koniec pomiaru czasu na CPU
				high_resolution_clock::time_point tpk = high_resolution_clock::now();

				duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);
				
					
				
				printf("Wynik obliczen na CPU:\n");
				printMatrixCPU("%.2f ", result);
				printf("\n");
				printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
				printf("\n");

				for(unsigned i=0;i<matrix1.getRows();i++){
					for(unsigned j=0;j<matrix1.getColumns();j++){
						matrix1.set(i,j,result.get(i,j));
					}
				}

			}
			//else executeAdding(matrix1, matrix2);
		break;
		case 5: //mnozenie
			if(matrix1.getColumns() != matrix2.getRows()){
				printf("Nie zgadzaja sie rozmiary macierzy!!!\n");
			}
			else{
				//realizacja na GPU:
				//deklaracja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;
				void* d_2 = NULL;
				void* d_r = NULL;
				
				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				cudaMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				cudaMallocManaged(&d_2, 2*sizeof(unsigned)+matrix2.getRows()*matrix2.getColumns()*sizeof(double));
				cudaMallocManaged(&d_r, 2*sizeof(unsigned)+matrix1.getRows()*matrix2.getColumns()*sizeof(double));

				//kopie macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);
				copyMatrixToGPU(d_2, matrix2);

				//poczatek mierzenia czasu, jedynie obliczenia
				high_resolution_clock::time_point tbk = high_resolution_clock::now();

				//ustawienie rozmiaru macierzy wynikowej
				*(unsigned*)d_r = matrix1.getRows();
				*((unsigned*)d_r+1) = matrix2.getColumns();
				mul<<<BLOCKS_PER_GRID, THREADS_PER_BLOCK>>>(d_1, d_2, d_r);	
				cudaDeviceSynchronize();

				//koniec mierzenia czasu
				high_resolution_clock::time_point tk = high_resolution_clock::now();

				//obliczenie delt czasowych:
				duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
				duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

				printf("Wynik obliczen na GPU:\n");
				printMatrixGPU("%.2f ", d_r);
				printf("\n");
				printf("(Device) wykonano w ciagu: %fs\n", time_nalloc.count());
				printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
				printf("\n");

				cudaFree(d_1);
				cudaFree(d_2);
				cudaFree(d_r);
				
				//poczatek pomiaru czasu na CPU
				high_resolution_clock::time_point tpc = high_resolution_clock::now();

				Matrix result = matrix1 * matrix2;//(matrix1.getRows(),matrix.getColumns());
				
				//koniec pomiaru czasu na CPU
				high_resolution_clock::time_point tpk = high_resolution_clock::now();

				duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);
					
				printf("Wynik obliczen na CPU:\n");
				printMatrixCPU("%.2f ", result);
				printf("\n");
				printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
				printf("\n");

				matrix1.setSize(result.getRows(),result.getColumns());

				for(unsigned i=0;i<matrix1.getRows();i++){
					for(unsigned j=0;j<matrix1.getColumns();j++){
						matrix1.set(i,j,result.get(i,j));
					}
				}



			}
		break;
    		case 6: //macierz odwrotna
			if(matrix1.getColumns() != matrix1.getRows()){
				printf("Nie zgadzaja sie rozmiary macierzy!!!\n");
			}
			else{
				//deklarcja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;
				void* d_r = NULL;

				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				cudaMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				cudaMallocManaged(&d_r, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));

				//kopia macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);

				//dynamiczne przystosowanie liczby watkow (ominiecie bledu BLOCKS_PER_GRID * THREADS_PER_BLOCK >= N!)
				unsigned tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
				unsigned tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;

				switch(matrix1.getRows()){
					case 1:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 2:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 3:
					tempBLOCKS_PER_GRID=2;
					tempTHREADS_PER_BLOCK=2;
					break;
					case 4:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=4;
					break;
					case 5:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=16;
					break;
					case 6:
					tempBLOCKS_PER_GRID=8;
					tempTHREADS_PER_BLOCK=64;
					break;
					default:
					tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
					tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;
				}


				//tablica i wskaznik pomocnicze
				double* tab = NULL;//new double[BLOCKS_PER_GRID * THREADS_PER_BLOCK];
				cudaMallocManaged(&tab, sizeof(double) * tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK);
				for(unsigned i=0;i<tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK; i++) tab[i] = 0.0;
				double w = 0.0;

				//poczatek mierzenia czasu wliczajac alokacja pamieci
				//high_resolution_clock::time_point tbk = high_resolution_clock::now();

				if(matrix1.getColumns()>1){
					detHelper<<<tempBLOCKS_PER_GRID, tempTHREADS_PER_BLOCK>>>(d_1, tab);
					cudaDeviceSynchronize();
					for(unsigned i=0;i<tempBLOCKS_PER_GRID*tempTHREADS_PER_BLOCK; i++){
						w += tab[i];	
					}
				}
				//w przeciwnym wypadku wyznacznikiem jest jedyny element macierzy
				else w = *((double*)((unsigned*)d_1+2));


				double mainDet = w;

				//debug
				printf("Wyznacznik glownej macierzy: %f\n", mainDet);
				
				
				
				
				
				if(mainDet == 0.0 || mainDet == -0.0){
					printf("Wyznacznik macierzy rowny 0.0 - macierz odwrotna nie istnieje!");
				}
				else{
					*(unsigned*)d_r = matrix1.getRows();
					*((unsigned*)d_r+1) = matrix1.getColumns();
					if(matrix1.getRows()==1){
						*((double*)((unsigned*)d_r+2)) = 1.0/mainDet;
					}
					else if(matrix1.getRows()>1){
						//Tworzymy bufor na minora:
						void* minor = NULL;
						cudaMallocManaged(&minor, 2*sizeof(unsigned)+(matrix1.getRows()-1)*(matrix1.getColumns()-1)*sizeof(double));

						//przekopiowanie	
						*(unsigned*)minor = matrix1.getRows()-1;
						*((unsigned*)minor+1) = matrix1.getColumns()-1;

						
						for(unsigned i=0; i<matrix1.getRows(); i++){
							for(unsigned j=0; j<matrix1.getColumns(); j++){
								//zerujemy tab i w
								for(unsigned q=0;q<tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK; q++) tab[q] = 0.0;
								w = 0.0;
								for(unsigned q=0;q<matrix1.getRows(); q++){
									for(unsigned k=0;k<matrix1.getRows(); k++){
										if(q<i && k<j) *((double*)((unsigned*)minor+2)+q*(matrix1.getColumns()-1)+k) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);
										if(q<i && k>j) *((double*)((unsigned*)minor+2)+q*(matrix1.getColumns()-1)+k-1) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);
										if(q>i && k<j) *((double*)((unsigned*)minor+2)+(q-1)*(matrix1.getColumns()-1)+k) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);
										if(q>i && k>j) *((double*)((unsigned*)minor+2)+(q-1)*(matrix1.getColumns()-1)+k-1) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);

									}	
								}	

								unsigned temp2BLOCKS_PER_GRID = BLOCKS_PER_GRID;
								unsigned temp2THREADS_PER_BLOCK = THREADS_PER_BLOCK;

								switch(matrix1.getRows()-1){
									case 1:
									temp2BLOCKS_PER_GRID=1;
									temp2THREADS_PER_BLOCK=1;
									break;
									case 2:
									temp2BLOCKS_PER_GRID=1;
									temp2THREADS_PER_BLOCK=1;
									break;
									case 3:
									temp2BLOCKS_PER_GRID=2;
									temp2THREADS_PER_BLOCK=2;
									break;
									case 4:
									temp2BLOCKS_PER_GRID=4;
									temp2THREADS_PER_BLOCK=4;
									break;
									case 5:
									temp2BLOCKS_PER_GRID=4;
									temp2THREADS_PER_BLOCK=16;
									break;
									case 6:
									temp2BLOCKS_PER_GRID=8;
									temp2THREADS_PER_BLOCK=64;
									break;
									default:
									temp2BLOCKS_PER_GRID = BLOCKS_PER_GRID;
									temp2THREADS_PER_BLOCK = THREADS_PER_BLOCK;
								}

								if(matrix1.getColumns()-1>1){

									//kernel
									detHelper<<<temp2BLOCKS_PER_GRID, temp2THREADS_PER_BLOCK>>>(minor, tab);
									cudaDeviceSynchronize();

									for(unsigned q=0;q<temp2BLOCKS_PER_GRID*temp2THREADS_PER_BLOCK; q++){
										w += tab[q];	
									}
								}

								else w = *((double*)((unsigned*)minor+2));

								
								*((double*)((unsigned*)d_r+2)+j*matrix1.getColumns()+i) = (((i%2)+(j%2))%2==0?1.0:-1.0) * w / mainDet;

							}
						}
						
						cudaFree(minor);

					}
					//koniec mierzenia czasu
					high_resolution_clock::time_point tk = high_resolution_clock::now();

					//obliczenie delt czasowych:
					duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
					//duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

					printf("Wynik obliczen na GPU:\n");
					printMatrixGPU("%.2f ", d_r);
					printf("\n");
					printf("(Device) wykonano w ciagu: %fs\n", time_alloc.count());
					//printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
					printf("\n");


				}
				

				cudaFree(tab);
				cudaFree(d_r);
				cudaFree(d_1);

				if(mainDet != 0.0 && mainDet != -0.0){

					try{
						//poczatek pomiaru czasu na CPU
						high_resolution_clock::time_point tpc = high_resolution_clock::now();
						
						Matrix result = matrix1.inverse();

						//koniec pomiaru czasu na CPU
						high_resolution_clock::time_point tpk = high_resolution_clock::now();

						duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);	
						
						printf("Wynik obliczen na CPU:\n");
						printMatrixCPU("%.2f ", result);
						printf("\n");
						printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
						printf("\n");

						for(unsigned i=0;i<matrix1.getRows();i++){
							for(unsigned j=0;j<matrix1.getColumns();j++){
								matrix1.set(i,j,result.get(i,j));
							}
						}
					}
					catch(...){}
				}
			}
      		break;
    		case 0: //wyjscie
      			exit(0);
    		default:
			printf("Nie rozumiem - sprobuj ponownie!");
      		break;

		}
	}
	
	return 0;
}

	.file	"tmpxft_002db097_00000000-6_stable.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3893:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3893:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0, @function
_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0:
.LFB4684:
	.cfi_startproc
	cvtsi2sdq	%rdi, %xmm0
	divsd	.LC0(%rip), %xmm0
	ret
	.cfi_endproc
.LFE4684:
	.size	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0, .-_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	.type	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0, @function
_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0:
.LFB4685:
	.cfi_startproc
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	(%rdi), %rax
	movq	-24(%rax), %rax
	movq	240(%rdi,%rax), %rbx
	testq	%rbx, %rbx
	jne	.L4
	call	_ZSt16__throw_bad_castv@PLT
.L4:
	cmpb	$0, 56(%rbx)
	movq	%rdi, %rbp
	movq	%rsi, %r12
	je	.L5
	movb	67(%rbx), %al
	jmp	.L6
.L5:
	movq	%rbx, %rdi
	call	_ZNKSt5ctypeIcE13_M_widen_initEv@PLT
	movq	(%rbx), %rax
	movl	$10, %esi
	movq	%rbx, %rdi
	call	*48(%rax)
.L6:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movsbl	%al, %edx
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
	.cfi_endproc
.LFE4685:
	.size	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0, .-_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	.section	.text._ZN6MatrixC2Ejj,"axG",@progbits,_ZN6MatrixC5Ejj,comdat
	.align 2
	.weak	_ZN6MatrixC2Ejj
	.type	_ZN6MatrixC2Ejj, @function
_ZN6MatrixC2Ejj:
.LFB3867:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r14, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, (%rdi)
	movl	%r14d, 4(%rdi)
	leaq	0(,%rbx,8), %rdi
	call	_Znam@PLT
	movq	%rax, 8(%rbp)
	leaq	0(,%r14,8), %rax
	movq	%rax, 8(%rsp)
.L10:
	cmpq	%r12, %rbx
	je	.L17
	movq	8(%rbp), %r15
	movq	8(%rsp), %rdi
	leaq	0(,%r12,8), %r14
	call	_Znam@PLT
	addq	%r14, %r15
	movq	%rax, (%r15)
	xorl	%eax, %eax
.L11:
	cmpl	%r13d, %eax
	jnb	.L18
	xorps	%xmm0, %xmm0
	cmpl	%r12d, %eax
	jne	.L12
	movsd	.LC1(%rip), %xmm0
.L12:
	movq	8(%rbp), %rcx
	movq	(%rcx,%r14), %rcx
	movsd	%xmm0, (%rcx,%rax,8)
	incq	%rax
	jmp	.L11
.L18:
	incq	%r12
	jmp	.L10
.L17:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3867:
	.size	_ZN6MatrixC2Ejj, .-_ZN6MatrixC2Ejj
	.weak	_ZN6MatrixC1Ejj
	.set	_ZN6MatrixC1Ejj,_ZN6MatrixC2Ejj
	.section	.text._ZN6MatrixD2Ev,"axG",@progbits,_ZN6MatrixD5Ev,comdat
	.align 2
	.weak	_ZN6MatrixD2Ev
	.type	_ZN6MatrixD2Ev, @function
_ZN6MatrixD2Ev:
.LFB3870:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 32
.L20:
	movq	8(%rbx), %rdi
	cmpl	(%rbx), %ebp
	jnb	.L28
	movl	%ebp, %eax
	movq	(%rdi,%rax,8), %rdi
	testq	%rdi, %rdi
	je	.L21
	call	_ZdaPv@PLT
.L21:
	incl	%ebp
	jmp	.L20
.L28:
	testq	%rdi, %rdi
	je	.L19
	popq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZdaPv@PLT
.L19:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3870:
	.size	_ZN6MatrixD2Ev, .-_ZN6MatrixD2Ev
	.weak	_ZN6MatrixD1Ev
	.set	_ZN6MatrixD1Ev,_ZN6MatrixD2Ev
	.section	.rodata._ZNK6Matrix3getEjj.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Nie znaleziono elementu pod podana para indeksow."
	.section	.text._ZNK6Matrix3getEjj,"axG",@progbits,_ZNK6Matrix3getEjj,comdat
	.align 2
	.weak	_ZNK6Matrix3getEjj
	.type	_ZNK6Matrix3getEjj, @function
_ZNK6Matrix3getEjj:
.LFB3874:
	.cfi_startproc
	endbr64
	cmpl	(%rdi), %esi
	jnb	.L30
	cmpl	4(%rdi), %edx
	jb	.L32
.L30:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$8, %edi
	call	__cxa_allocate_exception@PLT
	xorl	%edx, %edx
	leaq	_ZTIPKc(%rip), %rsi
	movq	%rax, %rdi
	leaq	.LC3(%rip), %rax
	movq	%rax, (%rdi)
	call	__cxa_throw@PLT
.L32:
	.cfi_def_cfa_offset 8
	movq	8(%rdi), %rax
	movl	%esi, %esi
	movl	%edx, %edx
	movq	(%rax,%rsi,8), %rax
	movsd	(%rax,%rdx,8), %xmm0
	ret
	.cfi_endproc
.LFE3874:
	.size	_ZNK6Matrix3getEjj, .-_ZNK6Matrix3getEjj
	.section	.rodata._ZN6Matrix3setEjjd.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Nie mozna ustawic wartosci elementu pod podana para indeksow."
	.section	.text._ZN6Matrix3setEjjd,"axG",@progbits,_ZN6Matrix3setEjjd,comdat
	.align 2
	.weak	_ZN6Matrix3setEjjd
	.type	_ZN6Matrix3setEjjd, @function
_ZN6Matrix3setEjjd:
.LFB3875:
	.cfi_startproc
	endbr64
	cmpl	(%rdi), %esi
	jnb	.L36
	cmpl	4(%rdi), %edx
	jnb	.L36
	movq	8(%rdi), %rax
	movl	%esi, %esi
	movl	%edx, %edx
	movq	(%rax,%rsi,8), %rax
	movsd	%xmm0, (%rax,%rdx,8)
	ret
.L36:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$8, %edi
	call	__cxa_allocate_exception@PLT
	xorl	%edx, %edx
	leaq	_ZTIPKc(%rip), %rsi
	movq	%rax, %rdi
	leaq	.LC4(%rip), %rax
	movq	%rax, (%rdi)
	call	__cxa_throw@PLT
	.cfi_endproc
.LFE3875:
	.size	_ZN6Matrix3setEjjd, .-_ZN6Matrix3setEjjd
	.section	.text._ZN6Matrix5minorEjj,"axG",@progbits,_ZN6Matrix5minorEjj,comdat
	.align 2
	.weak	_ZN6Matrix5minorEjj
	.type	_ZN6Matrix5minorEjj, @function
_ZN6Matrix5minorEjj:
.LFB3865:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3865
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	4(%rsi), %eax
	movq	%rdi, 8(%rsp)
	leal	-1(%rax), %edx
	movl	(%rsi), %eax
	leal	-1(%rax), %esi
.LEHB0:
	call	_ZN6MatrixC1Ejj
.LEHE0:
.L41:
	cmpl	(%r12), %ebx
	jnb	.L82
	xorl	%ebp, %ebp
	leal	-1(%rbx), %r15d
.L43:
	cmpl	4(%r12), %ebp
	jnb	.L83
	cmpl	%r13d, %ebx
	setb	%al
	cmpl	%r14d, %ebp
	setb	%cl
	testb	%al, %al
	je	.L42
	testb	%cl, %cl
	je	.L42
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
.LEHB1:
	call	_ZNK6Matrix3getEjj
	movl	%ebp, %edx
.L78:
	movl	%ebx, %esi
.L80:
	movq	8(%rsp), %rdi
	call	_ZN6Matrix3setEjjd
.L45:
	incl	%ebp
	jmp	.L43
.L42:
	cmpl	%ebp, %r14d
	setb	%dl
	testb	%al, %al
	je	.L44
	testb	%dl, %dl
	je	.L44
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_ZNK6Matrix3getEjj
	leal	-1(%rbp), %edx
	jmp	.L78
.L44:
	cmpl	%ebx, %r13d
	setb	%al
	testb	%cl, %cl
	je	.L46
	testb	%al, %al
	je	.L46
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_ZNK6Matrix3getEjj
	movl	%ebp, %edx
	movl	%r15d, %esi
	jmp	.L80
.L46:
	testb	%dl, %dl
	je	.L45
	testb	%al, %al
	je	.L45
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_ZNK6Matrix3getEjj
.LEHE1:
	leal	-1(%rbp), %edx
	leal	-1(%rbx), %esi
	jmp	.L80
.L83:
	incl	%ebx
	jmp	.L41
.L50:
	endbr64
	movq	%rax, %rbx
.L48:
	movq	8(%rsp), %rdi
	call	_ZN6MatrixD1Ev
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L82:
	movq	8(%rsp), %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3865:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN6Matrix5minorEjj,"aG",@progbits,_ZN6Matrix5minorEjj,comdat
.LLSDA3865:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3865-.LLSDACSB3865
.LLSDACSB3865:
	.uleb128 .LEHB0-.LFB3865
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3865
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L50-.LFB3865
	.uleb128 0
	.uleb128 .LEHB2-.LFB3865
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3865:
	.section	.text._ZN6Matrix5minorEjj,"axG",@progbits,_ZN6Matrix5minorEjj,comdat
	.size	_ZN6Matrix5minorEjj, .-_ZN6Matrix5minorEjj
	.section	.rodata._ZNK6MatrixmlERKS_.str1.1,"aMS",@progbits,1
.LC5:
	.string	"Pierwsza macierz nie ma tylu kolumn, co druga wierszy - odmowa wykonania mnozenia!"
	.section	.text._ZNK6MatrixmlERKS_,"axG",@progbits,_ZNK6MatrixmlERKS_,comdat
	.align 2
	.weak	_ZNK6MatrixmlERKS_
	.type	_ZNK6MatrixmlERKS_, @function
_ZNK6MatrixmlERKS_:
.LFB3877:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3877
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	(%rdx), %eax
	cmpl	%eax, 4(%rsi)
	je	.L85
	movl	$8, %edi
	call	__cxa_allocate_exception@PLT
	xorl	%edx, %edx
	leaq	_ZTIPKc(%rip), %rsi
	movq	%rax, %rdi
	leaq	.LC5(%rip), %rax
	movq	%rax, (%rdi)
.LEHB3:
	call	__cxa_throw@PLT
.L85:
	movq	%rsi, %rbp
	movq	%rdx, %r14
	movl	(%rsi), %esi
	movl	4(%rdx), %edx
	movq	%rdi, %rbx
	xorl	%r12d, %r12d
	call	_ZN6MatrixC1Ejj
.LEHE3:
.L86:
	cmpl	0(%rbp), %r12d
	jnb	.L98
	xorl	%r13d, %r13d
.L90:
	cmpl	4(%r14), %r13d
	jnb	.L99
	xorps	%xmm0, %xmm0
	movl	%r13d, %edx
	movl	%r12d, %esi
	movq	%rbx, %rdi
.LEHB4:
	call	_ZN6Matrix3setEjjd
	xorl	%r15d, %r15d
.L87:
	cmpl	4(%rbp), %r15d
	jnb	.L100
	movl	%r13d, %edx
	movl	%r12d, %esi
	movq	%rbx, %rdi
	call	_ZNK6Matrix3getEjj
	movl	%r15d, %edx
	movl	%r12d, %esi
	movq	%rbp, %rdi
	movsd	%xmm0, (%rsp)
	call	_ZNK6Matrix3getEjj
	movl	%r13d, %edx
	movl	%r15d, %esi
	movq	%r14, %rdi
	movsd	%xmm0, 8(%rsp)
	call	_ZNK6Matrix3getEjj
	mulsd	8(%rsp), %xmm0
	movl	%r13d, %edx
	movl	%r12d, %esi
	movq	%rbx, %rdi
	addsd	(%rsp), %xmm0
	call	_ZN6Matrix3setEjjd
.LEHE4:
	incl	%r15d
	jmp	.L87
.L100:
	incl	%r13d
	jmp	.L90
.L99:
	incl	%r12d
	jmp	.L86
.L94:
	endbr64
	movq	%rax, %rbp
.L91:
	movq	%rbx, %rdi
	call	_ZN6MatrixD1Ev
	movq	%rbp, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L98:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3877:
	.section	.gcc_except_table._ZNK6MatrixmlERKS_,"aG",@progbits,_ZNK6MatrixmlERKS_,comdat
.LLSDA3877:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3877-.LLSDACSB3877
.LLSDACSB3877:
	.uleb128 .LEHB3-.LFB3877
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB3877
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L94-.LFB3877
	.uleb128 0
	.uleb128 .LEHB5-.LFB3877
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE3877:
	.section	.text._ZNK6MatrixmlERKS_,"axG",@progbits,_ZNK6MatrixmlERKS_,comdat
	.size	_ZNK6MatrixmlERKS_, .-_ZNK6MatrixmlERKS_
	.section	.rodata._ZN6Matrix3detEv.str1.1,"aMS",@progbits,1
.LC7:
	.string	"Wyznacznik mozna obliczyc tylko dla macierzy kwadratowej!"
	.section	.text._ZN6Matrix3detEv,"axG",@progbits,_ZN6Matrix3detEv,comdat
	.align 2
	.weak	_ZN6Matrix3detEv
	.type	_ZN6Matrix3detEv, @function
_ZN6Matrix3detEv:
.LFB3878:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3878
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	movl	(%rdi), %eax
	cmpl	4(%rdi), %eax
	je	.L102
	movl	$8, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rdi
	leaq	.LC7(%rip), %rax
	movq	%rax, (%rdi)
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L117
	xorl	%edx, %edx
	leaq	_ZTIPKc(%rip), %rsi
.LEHB6:
	call	__cxa_throw@PLT
.L102:
	decl	%eax
	movq	%rdi, %rbx
	jne	.L111
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L117
	addq	$48, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 32
	xorl	%edx, %edx
	xorl	%esi, %esi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_ZNK6Matrix3getEjj
.L111:
	.cfi_restore_state
	movq	$0x000000000, (%rsp)
	xorl	%ebp, %ebp
.L104:
	cmpl	(%rbx), %ebp
	jnb	.L118
	leaq	24(%rsp), %r12
	xorl	%ecx, %ecx
	movl	%ebp, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	call	_ZN6Matrix5minorEjj
.LEHE6:
	movq	.LC6(%rip), %rax
	movq	%rax, 8(%rsp)
	testl	$1, %ebp
	jne	.L106
	movsd	.LC1(%rip), %xmm1
	movsd	%xmm1, 8(%rsp)
.L106:
	xorl	%edx, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
.LEHB7:
	call	_ZNK6Matrix3getEjj
	mulsd	8(%rsp), %xmm0
	movq	%r12, %rdi
	movsd	%xmm0, 8(%rsp)
	call	_ZN6Matrix3detEv
.LEHE7:
	mulsd	8(%rsp), %xmm0
	movq	%r12, %rdi
	incl	%ebp
	addsd	(%rsp), %xmm0
	movsd	%xmm0, (%rsp)
	call	_ZN6MatrixD1Ev
	jmp	.L104
.L113:
	endbr64
	movq	%rax, %rbx
.L108:
	movq	%r12, %rdi
	call	_ZN6MatrixD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L117
	movq	%rbx, %rdi
.LEHB8:
	call	_Unwind_Resume@PLT
.LEHE8:
.L118:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L110
.L117:
	call	__stack_chk_fail@PLT
.L110:
	movsd	(%rsp), %xmm0
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3878:
	.section	.gcc_except_table._ZN6Matrix3detEv,"aG",@progbits,_ZN6Matrix3detEv,comdat
.LLSDA3878:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3878-.LLSDACSB3878
.LLSDACSB3878:
	.uleb128 .LEHB6-.LFB3878
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB7-.LFB3878
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L113-.LFB3878
	.uleb128 0
	.uleb128 .LEHB8-.LFB3878
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
.LLSDACSE3878:
	.section	.text._ZN6Matrix3detEv,"axG",@progbits,_ZN6Matrix3detEv,comdat
	.size	_ZN6Matrix3detEv, .-_ZN6Matrix3detEv
	.section	.rodata._ZN6Matrix7inverseEv.str1.1,"aMS",@progbits,1
.LC8:
	.string	"Wyznacznik macierzy rowny zero!"
	.section	.text._ZN6Matrix7inverseEv,"axG",@progbits,_ZN6Matrix7inverseEv,comdat
	.align 2
	.weak	_ZN6Matrix7inverseEv
	.type	_ZN6Matrix7inverseEv, @function
_ZN6Matrix7inverseEv:
.LFB3879:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3879
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	movq	%rsi, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
.LEHB9:
	call	_ZN6Matrix3detEv
	movsd	%xmm0, (%rsp)
	movsd	(%rsp), %xmm1
	xorps	%xmm0, %xmm0
	ucomisd	%xmm0, %xmm1
	jp	.L120
	jne	.L120
	movl	$8, %edi
	call	__cxa_allocate_exception@PLT
	movq	%rax, %rdi
	leaq	.LC8(%rip), %rax
	movq	%rax, (%rdi)
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L141
	xorl	%edx, %edx
	leaq	_ZTIPKc(%rip), %rsi
	call	__cxa_throw@PLT
.L120:
	movl	4(%rbx), %edx
	movl	(%rbx), %esi
	movq	%rbp, %rdi
	xorl	%r12d, %r12d
	call	_ZN6MatrixC1Ejj
.LEHE9:
	cmpl	$1, (%rbx)
	jne	.L123
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	%rbp, %rdi
	movsd	.LC1(%rip), %xmm0
	divsd	(%rsp), %xmm0
.LEHB10:
	call	_ZN6Matrix3setEjjd
	jmp	.L119
.L126:
	movsd	.LC6(%rip), %xmm3
	leal	(%r12,%r14), %eax
	movsd	%xmm3, 8(%rsp)
	testb	$1, %al
	jne	.L125
	movsd	.LC1(%rip), %xmm4
	movsd	%xmm4, 8(%rsp)
.L125:
	leaq	24(%rsp), %r13
	movl	%r14d, %ecx
	movl	%r12d, %edx
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	_ZN6Matrix5minorEjj
.LEHE10:
	movq	%r13, %rdi
.LEHB11:
	call	_ZN6Matrix3detEv
.LEHE11:
	mulsd	8(%rsp), %xmm0
	movq	%r13, %rdi
	movsd	%xmm0, 8(%rsp)
	call	_ZN6MatrixD1Ev
	movl	%r12d, %edx
	movl	%r14d, %esi
	movq	%rbp, %rdi
	movsd	8(%rsp), %xmm0
	divsd	(%rsp), %xmm0
.LEHB12:
	call	_ZN6Matrix3setEjjd
.LEHE12:
	incl	%r14d
.L127:
	cmpl	4(%rbx), %r14d
	jb	.L126
	incl	%r12d
.L123:
	cmpl	(%rbx), %r12d
	jnb	.L119
	xorl	%r14d, %r14d
	jmp	.L127
.L136:
	endbr64
	movq	%rax, %rbx
.L128:
	movq	%r13, %rdi
	call	_ZN6MatrixD1Ev
	jmp	.L129
.L135:
	endbr64
	movq	%rax, %rbx
.L129:
	movq	%rbp, %rdi
	call	_ZN6MatrixD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L141
	movq	%rbx, %rdi
.LEHB13:
	call	_Unwind_Resume@PLT
.LEHE13:
.L119:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L131
.L141:
	call	__stack_chk_fail@PLT
.L131:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3879:
	.section	.gcc_except_table._ZN6Matrix7inverseEv,"aG",@progbits,_ZN6Matrix7inverseEv,comdat
.LLSDA3879:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3879-.LLSDACSB3879
.LLSDACSB3879:
	.uleb128 .LEHB9-.LFB3879
	.uleb128 .LEHE9-.LEHB9
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB10-.LFB3879
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L135-.LFB3879
	.uleb128 0
	.uleb128 .LEHB11-.LFB3879
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L136-.LFB3879
	.uleb128 0
	.uleb128 .LEHB12-.LFB3879
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L135-.LFB3879
	.uleb128 0
	.uleb128 .LEHB13-.LFB3879
	.uleb128 .LEHE13-.LEHB13
	.uleb128 0
	.uleb128 0
.LLSDACSE3879:
	.section	.text._ZN6Matrix7inverseEv,"axG",@progbits,_ZN6Matrix7inverseEv,comdat
	.size	_ZN6Matrix7inverseEv, .-_ZN6Matrix7inverseEv
	.section	.text._ZN6Matrix7setSizeEjj,"axG",@progbits,_ZN6Matrix7setSizeEjj,comdat
	.align 2
	.weak	_ZN6Matrix7setSizeEjj
	.type	_ZN6Matrix7setSizeEjj, @function
_ZN6Matrix7setSizeEjj:
.LFB3880:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L143:
	movq	8(%rbx), %rdi
	cmpl	(%rbx), %r12d
	jnb	.L160
	movq	(%rdi,%r12,8), %rdi
	testq	%rdi, %rdi
	je	.L144
	call	_ZdaPv@PLT
.L144:
	incq	%r12
	jmp	.L143
.L160:
	testq	%rdi, %rdi
	je	.L146
	call	_ZdaPv@PLT
.L146:
	movl	%ebp, (%rbx)
	movl	%ebp, %edi
	xorl	%ebp, %ebp
	movl	%r13d, 4(%rbx)
	salq	$3, %rdi
	call	_Znam@PLT
	movq	%rax, 8(%rbx)
.L147:
	cmpl	(%rbx), %ebp
	jnb	.L161
	movl	4(%rbx), %edi
	movq	8(%rbx), %r13
	movl	%ebp, %r12d
	salq	$3, %r12
	salq	$3, %rdi
	addq	%r12, %r13
	call	_Znam@PLT
	movl	4(%rbx), %edx
	movq	%rax, 0(%r13)
	xorl	%eax, %eax
.L148:
	cmpl	%edx, %eax
	jnb	.L162
	xorps	%xmm0, %xmm0
	cmpl	%eax, %ebp
	jne	.L149
	movsd	.LC1(%rip), %xmm0
.L149:
	movq	8(%rbx), %rcx
	movq	(%rcx,%r12), %rcx
	movsd	%xmm0, (%rcx,%rax,8)
	incq	%rax
	jmp	.L148
.L162:
	incl	%ebp
	jmp	.L147
.L161:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3880:
	.size	_ZN6Matrix7setSizeEjj, .-_ZN6Matrix7setSizeEjj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC9:
	.string	"\n"
	.text
	.globl	_Z14printMatrixCPUPKcRK6Matrix
	.type	_Z14printMatrixCPUPKcRK6Matrix, @function
_Z14printMatrixCPUPKcRK6Matrix:
.LFB3881:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC9(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
.L164:
	cmpl	(%rbx), %ebp
	jnb	.L169
	xorl	%r12d, %r12d
.L166:
	cmpl	4(%rbx), %r12d
	jnb	.L170
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	incl	%r12d
	call	_ZNK6Matrix3getEjj
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	jmp	.L166
.L170:
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebp
	call	__printf_chk@PLT
	jmp	.L164
.L169:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3881:
	.size	_Z14printMatrixCPUPKcRK6Matrix, .-_Z14printMatrixCPUPKcRK6Matrix
	.globl	_Z14printMatrixGPUPKcPv
	.type	_Z14printMatrixGPUPKcPv, @function
_Z14printMatrixGPUPKcPv:
.LFB3882:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC9(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rsi, %rbx
.L172:
	cmpl	(%rbx), %ebp
	jnb	.L177
	xorl	%r14d, %r14d
.L174:
	movl	4(%rbx), %eax
	cmpl	%eax, %r14d
	jnb	.L178
	imull	%ebp, %eax
	movl	%r14d, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	incl	%r14d
	leaq	1(%rax,%rdx), %rax
	movsd	(%rbx,%rax,8), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	jmp	.L174
.L178:
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebp
	call	__printf_chk@PLT
	jmp	.L172
.L177:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3882:
	.size	_Z14printMatrixGPUPKcPv, .-_Z14printMatrixGPUPKcPv
	.globl	_Z15copyMatrixToGPUPvRK6Matrix
	.type	_Z15copyMatrixToGPUPvRK6Matrix, @function
_Z15copyMatrixToGPUPvRK6Matrix:
.LFB3883:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rsi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 48
	movl	(%rsi), %eax
	movl	%eax, (%rdi)
	movl	4(%rsi), %eax
	movl	%eax, 4(%rdi)
.L180:
	cmpl	(%rbx), %ebp
	jnb	.L185
	xorl	%r13d, %r13d
.L182:
	cmpl	4(%rbx), %r13d
	jnb	.L186
	movl	%r13d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_ZNK6Matrix3getEjj
	movl	4(%rbx), %eax
	imull	%ebp, %eax
	addl	%r13d, %eax
	incl	%r13d
	movl	%eax, %eax
	movsd	%xmm0, 8(%r12,%rax,8)
	jmp	.L182
.L186:
	incl	%ebp
	jmp	.L180
.L185:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3883:
	.size	_Z15copyMatrixToGPUPvRK6Matrix, .-_Z15copyMatrixToGPUPvRK6Matrix
	.globl	_Z26__device_stub__Z3addPvS_S_PvS_S_
	.type	_Z26__device_stub__Z3addPvS_S_PvS_S_, @function
_Z26__device_stub__Z3addPvS_S_PvS_S_:
.LFB3915:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L187
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addPvS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L187:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L189
	call	__stack_chk_fail@PLT
.L189:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3915:
	.size	_Z26__device_stub__Z3addPvS_S_PvS_S_, .-_Z26__device_stub__Z3addPvS_S_PvS_S_
	.globl	_Z3addPvS_S_
	.type	_Z3addPvS_S_, @function
_Z3addPvS_S_:
.LFB3916:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3addPvS_S_PvS_S_
	.cfi_endproc
.LFE3916:
	.size	_Z3addPvS_S_, .-_Z3addPvS_S_
	.globl	_Z26__device_stub__Z3mulPvS_S_PvS_S_
	.type	_Z26__device_stub__Z3mulPvS_S_PvS_S_, @function
_Z26__device_stub__Z3mulPvS_S_PvS_S_:
.LFB3917:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L192
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3mulPvS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L192:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L194
	call	__stack_chk_fail@PLT
.L194:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3917:
	.size	_Z26__device_stub__Z3mulPvS_S_PvS_S_, .-_Z26__device_stub__Z3mulPvS_S_PvS_S_
	.globl	_Z3mulPvS_S_
	.type	_Z3mulPvS_S_, @function
_Z3mulPvS_S_:
.LFB3918:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z3mulPvS_S_PvS_S_
	.cfi_endproc
.LFE3918:
	.size	_Z3mulPvS_S_, .-_Z3mulPvS_S_
	.globl	_Z30__device_stub__Z9detHelperPvPdPvPd
	.type	_Z30__device_stub__Z9detHelperPvPdPvPd, @function
_Z30__device_stub__Z9detHelperPvPdPvPd:
.LFB3919:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L197
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9detHelperPvPd(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L197:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L199
	call	__stack_chk_fail@PLT
.L199:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3919:
	.size	_Z30__device_stub__Z9detHelperPvPdPvPd, .-_Z30__device_stub__Z9detHelperPvPdPvPd
	.globl	_Z9detHelperPvPd
	.type	_Z9detHelperPvPd, @function
_Z9detHelperPvPd:
.LFB3920:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9detHelperPvPdPvPd
	.cfi_endproc
.LFE3920:
	.size	_Z9detHelperPvPd, .-_Z9detHelperPvPd
	.section	.rodata.str1.1
.LC10:
	.string	"_Z9detHelperPvPd"
.LC11:
	.string	"_Z3mulPvS_S_"
.LC12:
	.string	"_Z3addPvS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3922:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9detHelperPvPd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3mulPvS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3addPvS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3922:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4019:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L204
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L204:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4019:
	.size	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.text._ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.weak	_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.type	_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, @function
_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_:
.LFB4014:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4014
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	%r8d, 12(%rsp)
	leaq	28(%rsp), %r14
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	__errno_location@PLT
	movl	12(%rsp), %edx
	leaq	32(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	movl	(%rax), %eax
	movl	%eax, 28(%rsp)
	xorl	%eax, %eax
	movl	%eax, 0(%rbp)
.LEHB14:
	call	*%r15
	movq	%rax, %r15
	movq	32(%rsp), %rax
	cmpq	%rbx, %rax
	jne	.L208
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L220
	movq	%r13, %rdi
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L208:
	cmpl	$34, 0(%rbp)
	jne	.L210
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L220
	movq	%r13, %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE14:
.L210:
	testq	%r12, %r12
	je	.L212
	subq	%rbx, %rax
	movq	%rax, (%r12)
.L212:
	movq	%r14, %rdi
	call	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L215
	jmp	.L220
.L216:
	endbr64
	movq	%rax, %rbx
.L213:
	movq	%r14, %rdi
	call	_ZZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L220
	movq	%rbx, %rdi
.LEHB15:
	call	_Unwind_Resume@PLT
.LEHE15:
.L220:
	call	__stack_chk_fail@PLT
.L215:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	movq	%r15, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4014:
	.section	.gcc_except_table._ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"aG",@progbits,_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
.LLSDA4014:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4014-.LLSDACSB4014
.LLSDACSB4014:
	.uleb128 .LEHB14-.LFB4014
	.uleb128 .LEHE14-.LEHB14
	.uleb128 .L216-.LFB4014
	.uleb128 0
	.uleb128 .LEHB15-.LFB4014
	.uleb128 .LEHE15-.LEHB15
	.uleb128 0
	.uleb128 0
.LLSDACSE4014:
	.section	.text._ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.size	_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, .-_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.section	.text._ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4055:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L223
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L223:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4055:
	.size	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.rodata.str1.1
.LC13:
	.string	"Podaj nazwe pliku: "
.LC14:
	.string	"%s"
.LC15:
	.string	"Nie udalo sie otworzyc pliku o podanej nazwie!\n"
.LC16:
	.string	"stoul"
.LC17:
	.string	"stod"
	.text
	.globl	_Z18loadMatrixFromFileR6Matrix
	.type	_Z18loadMatrixFromFileR6Matrix, @function
_Z18loadMatrixFromFileR6Matrix:
.LFB3884:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3884
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC13(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$680, %rsp
	.cfi_def_cfa_offset 736
	movq	%rdi, 16(%rsp)
	leaq	614(%rsp), %rbx
	movl	$2, %edi
	movq	%fs:40, %rax
	movq	%rax, 664(%rsp)
	xorl	%eax, %eax
.LEHB16:
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	leaq	.LC14(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	88(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE16:
	movq	(%rsp), %rdi
	movl	$8, %edx
	movq	%rbx, %rsi
.LEHB17:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	cmpl	$0, 376(%rsp)
	jne	.L227
.L230:
	leaq	208(%rsp), %rdi
	call	_ZNKSt12__basic_fileIcE7is_openEv@PLT
	testb	%al, %al
	jne	.L228
	jmp	.L229
.L227:
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.LEHE17:
	jmp	.L230
.L228:
	leaq	56(%rsp), %rax
	movq	(%rsp), %rdi
	xorl	%ecx, %ecx
	movb	$0, 72(%rsp)
	movq	%rax, 8(%rsp)
	movq	8(%rsp), %rsi
	leaq	72(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	%rcx, 64(%rsp)
.LEHB18:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	leaq	.LC16(%rip), %rbp
	movq	56(%rsp), %rdx
	movl	$10, %r8d
	xorl	%ecx, %ecx
	movq	__isoc23_strtoul@GOTPCREL(%rip), %rdi
	movq	%rbp, %rsi
	call	_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%eax, %ebx
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
	movq	56(%rsp), %rdx
	movl	$10, %r8d
	xorl	%ecx, %ecx
	movq	%rbp, %rsi
	movq	__isoc23_strtoul@GOTPCREL(%rip), %rdi
	call	_ZN9__gnu_cxx6__stoaImmcJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	movq	16(%rsp), %rdi
	movl	%eax, %edx
	movl	%ebx, %esi
	movl	%eax, %r12d
	call	_ZN6Matrix7setSizeEjj
	xorl	%ebp, %ebp
	leaq	48(%rsp), %r15
.L231:
	cmpl	%ebx, %ebp
	je	.L254
	xorl	%r13d, %r13d
.L240:
	cmpl	%r12d, %r13d
	je	.L255
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.isra.0
.LEHE18:
	call	__errno_location@PLT
	movq	56(%rsp), %r14
	movq	%r15, %rsi
	movl	(%rax), %edx
	movq	%rax, 24(%rsp)
	movq	%r14, %rdi
	movl	%edx, 44(%rsp)
	xorl	%edx, %edx
	movl	%edx, (%rax)
	call	strtod@PLT
	cmpq	48(%rsp), %r14
	movq	24(%rsp), %rax
	leaq	44(%rsp), %r14
	jne	.L232
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L251
	leaq	.LC17(%rip), %rdi
.LEHB19:
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L232:
	cmpl	$34, (%rax)
	jne	.L234
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L251
	leaq	.LC17(%rip), %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE19:
.L234:
	movq	%r14, %rdi
	movsd	%xmm0, 24(%rsp)
	call	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movsd	24(%rsp), %xmm0
	movl	%r13d, %edx
	movl	%ebp, %esi
	movq	16(%rsp), %rdi
.LEHB20:
	call	_ZN6Matrix3setEjjd
	incl	%r13d
	jmp	.L240
.L248:
	endbr64
	movq	%rax, %rbx
.L237:
	movq	%r14, %rdi
	call	_ZZN9__gnu_cxx6__stoaIddcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	jmp	.L238
.L255:
	incl	%ebp
	jmp	.L231
.L254:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE20:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
.L229:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	je	.L243
	jmp	.L251
.L247:
	endbr64
	movq	%rax, %rbx
.L238:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L241
.L246:
	endbr64
	movq	%rax, %rbx
.L241:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	664(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L251
	movq	%rbx, %rdi
.LEHB21:
	call	_Unwind_Resume@PLT
.LEHE21:
.L251:
	call	__stack_chk_fail@PLT
.L243:
	addq	$680, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3884:
	.section	.gcc_except_table,"a",@progbits
.LLSDA3884:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3884-.LLSDACSB3884
.LLSDACSB3884:
	.uleb128 .LEHB16-.LFB3884
	.uleb128 .LEHE16-.LEHB16
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB17-.LFB3884
	.uleb128 .LEHE17-.LEHB17
	.uleb128 .L246-.LFB3884
	.uleb128 0
	.uleb128 .LEHB18-.LFB3884
	.uleb128 .LEHE18-.LEHB18
	.uleb128 .L247-.LFB3884
	.uleb128 0
	.uleb128 .LEHB19-.LFB3884
	.uleb128 .LEHE19-.LEHB19
	.uleb128 .L248-.LFB3884
	.uleb128 0
	.uleb128 .LEHB20-.LFB3884
	.uleb128 .LEHE20-.LEHB20
	.uleb128 .L247-.LFB3884
	.uleb128 0
	.uleb128 .LEHB21-.LFB3884
	.uleb128 .LEHE21-.LEHB21
	.uleb128 0
	.uleb128 0
.LLSDACSE3884:
	.text
	.size	_Z18loadMatrixFromFileR6Matrix, .-_Z18loadMatrixFromFileR6Matrix
	.globl	_Z16saveMatrixToFileR6Matrix
	.type	_Z16saveMatrixToFileR6Matrix, @function
_Z16saveMatrixToFileR6Matrix:
.LFB3886:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3886
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC13(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$576, %rsp
	.cfi_def_cfa_offset 624
	movq	%fs:40, %rax
	movq	%rax, 568(%rsp)
	xorl	%eax, %eax
	leaq	518(%rsp), %r12
	movq	%rsp, %rbx
.LEHB22:
	call	__printf_chk@PLT
	movq	%r12, %rsi
	leaq	.LC14(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE22:
	movl	$16, %edx
	movq	%r12, %rsi
	movq	%rbx, %rdi
.LEHB23:
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movl	0(%rbp), %esi
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC9(%rip), %r14
	movq	%rax, %rdi
	movl	$1, %edx
	movq	%r14, %rsi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	movl	4(%rbp), %esi
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movl	$1, %edx
	movq	%r14, %rsi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	xorl	%r12d, %r12d
.L257:
	cmpl	0(%rbp), %r12d
	jnb	.L269
	xorl	%r13d, %r13d
.L259:
	cmpl	4(%rbp), %r13d
	jnb	.L270
	movl	%r13d, %edx
	movl	%r12d, %esi
	movq	%rbp, %rdi
	call	_ZNK6Matrix3getEjj
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	movl	$1, %edx
	movq	%r14, %rsi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	incl	%r13d
	jmp	.L259
.L270:
	incl	%r12d
	jmp	.L257
.L269:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE23:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	je	.L262
	jmp	.L267
.L265:
	endbr64
	movq	%rax, %rbp
.L260:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	568(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L267
	movq	%rbp, %rdi
.LEHB24:
	call	_Unwind_Resume@PLT
.LEHE24:
.L267:
	call	__stack_chk_fail@PLT
.L262:
	addq	$576, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3886:
	.section	.gcc_except_table
.LLSDA3886:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3886-.LLSDACSB3886
.LLSDACSB3886:
	.uleb128 .LEHB22-.LFB3886
	.uleb128 .LEHE22-.LEHB22
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB23-.LFB3886
	.uleb128 .LEHE23-.LEHB23
	.uleb128 .L265-.LFB3886
	.uleb128 0
	.uleb128 .LEHB24-.LFB3886
	.uleb128 .LEHE24-.LEHB24
	.uleb128 0
	.uleb128 0
.LLSDACSE3886:
	.text
	.size	_Z16saveMatrixToFileR6Matrix, .-_Z16saveMatrixToFileR6Matrix
	.section	.rodata.str1.1
.LC22:
	.string	"Macierz 1:\n"
.LC23:
	.string	"%.2f "
.LC24:
	.string	"Macierz 2:\n"
.LC25:
	.string	"*******************MENU********************\n"
.LC26:
	.string	"1.Wczytaj macierz z pliku\n"
.LC27:
	.string	"2.Zapisz macierz do pliku\n"
.LC28:
	.string	"3.Wyznacznik ( det(m1) )\n"
.LC29:
	.string	"4.Dodaj macierze (m1=m1+m2)\n"
.LC30:
	.string	"5.Przemn\303\263\305\274 macierze (m1=m1*m2)\n"
.LC31:
	.string	"6.Macierz odwrotna ( m1=m1^(-1) )\n"
.LC32:
	.string	"0.Wyjd\305\272\n"
.LC33:
	.string	"Wybieram : \n"
.LC34:
	.string	"%d"
.LC35:
	.string	"clear"
.LC36:
	.string	"1 - Macierz 1\n2 - Macierz 2\n"
.LC37:
	.string	"Wymiary macierzy musza byc rowne!!!"
.LC38:
	.string	"(Device) Wyznacznik obliczony przy uzyciu kernela:\n"
.LC39:
	.string	"%f\n\n"
.LC40:
	.string	"(Device) wykonano w ciagu: %fs\n"
.LC41:
	.string	"(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n"
.LC42:
	.string	"Wynik obliczen na CPU:\n"
.LC43:
	.string	"(Host) wykonano w ciagu: %fs\n"
.LC44:
	.string	"Macierze r\303\263\305\274nych rozmiar\303\263w!\n"
.LC45:
	.string	"Wynik obliczen na GPU:\n"
.LC46:
	.string	"Nie zgadzaja sie rozmiary macierzy!!!\n"
.LC47:
	.string	"Wyznacznik glownej macierzy: %f\n"
.LC48:
	.string	"Wyznacznik macierzy rowny 0.0 - macierz odwrotna nie istnieje!"
.LC49:
	.string	"Nie rozumiem - sprobuj ponownie!"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3887:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3887
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$3, %edx
	movl	$3, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rbx
	leaq	136(%rsp), %r12
	movq	%rbx, %rdi
.LEHB25:
	call	_ZN6MatrixC1Ejj
.LEHE25:
	movl	$3, %edx
	movl	$3, %esi
	movq	%r12, %rdi
.LEHB26:
	call	_ZN6MatrixC1Ejj
.LEHE26:
	xorl	%ebp, %ebp
.L272:
	cvtsi2sdl	%ebp, %xmm4
	xorl	%r13d, %r13d
	movq	%xmm4, %r14
.L273:
	movq	%r14, %xmm0
	movl	%r13d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
.LEHB27:
	call	_ZN6Matrix3setEjjd
	incl	%r13d
	cmpl	$3, %r13d
	jne	.L273
	incl	%ebp
	cmpl	$3, %ebp
	jne	.L272
	movsd	.LC1(%rip), %xmm0
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC6(%rip), %xmm0
	movl	$1, %edx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC18(%rip), %xmm0
	movl	$2, %edx
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC19(%rip), %xmm0
	xorl	%edx, %edx
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	xorps	%xmm0, %xmm0
	movl	$1, %edx
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC20(%rip), %xmm0
	movl	$2, %edx
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC18(%rip), %xmm0
	xorl	%edx, %edx
	movl	$2, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC19(%rip), %xmm0
	movl	$1, %edx
	movl	$2, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC21(%rip), %xmm0
	movl	$2, %edx
	movl	$2, %esi
	movq	%rbx, %rdi
	call	_ZN6Matrix3setEjjd
	xorl	%ebx, %ebx
.L275:
	xorps	%xmm0, %xmm0
	xorl	%edx, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC1(%rip), %xmm0
	movl	$1, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_ZN6Matrix3setEjjd
	movsd	.LC18(%rip), %xmm0
	movl	$2, %edx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_ZN6Matrix3setEjjd
	incl	%ebx
	cmpl	$3, %ebx
	jne	.L275
	movl	$11, 64(%rsp)
.L278:
	leaq	120(%rsp), %rax
	cmpl	$0, 64(%rsp)
	leaq	136(%rsp), %r15
	movq	%rax, 8(%rsp)
	je	.L435
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC23(%rip), %r12
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z14printMatrixCPUPKcRK6Matrix
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r15, %rsi
	movq	%r12, %rdi
	call	_Z14printMatrixCPUPKcRK6Matrix
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC29(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC30(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC31(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC32(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC33(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC34(%rip), %rbx
	leaq	64(%rsp), %rsi
	xorl	%eax, %eax
	movq	%rbx, %rdi
	call	__isoc23_scanf@PLT
	leaq	.LC35(%rip), %rdi
	call	system@PLT
	xorl	%ebp, %ebp
	cmpl	$6, 64(%rsp)
	movl	%ebp, 68(%rsp)
	ja	.L279
	movl	64(%rsp), %eax
	leaq	.L281(%rip), %rdx
	leaq	120(%rsp), %rcx
	movq	%rcx, 16(%rsp)
	movslq	(%rdx,%rax,4), %rax
	addq	%rdx, %rax
	notrack jmp	*%rax
	.section	.rodata
	.align 4
	.align 4
.L281:
	.long	.L287-.L281
	.long	.L286-.L281
	.long	.L285-.L281
	.long	.L284-.L281
	.long	.L283-.L281
	.long	.L282-.L281
	.long	.L280-.L281
	.section	.text.startup
.L286:
	leaq	.LC36(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	68(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	cmpl	$1, 68(%rsp)
	movq	%r15, %rdi
	jne	.L422
	movq	8(%rsp), %rdi
.L422:
	call	_Z18loadMatrixFromFileR6Matrix
	jmp	.L278
.L285:
	leaq	.LC36(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	68(%rsp), %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	cmpl	$1, 68(%rsp)
	movq	%r15, %rdi
	jne	.L424
	movq	8(%rsp), %rdi
.L424:
	call	_Z16saveMatrixToFileR6Matrix
	jmp	.L278
.L284:
	movl	120(%rsp), %ebx
	leaq	.LC37(%rip), %rsi
	cmpl	124(%rsp), %ebx
	jne	.L426
	xorl	%r11d, %r11d
	movq	%r11, 88(%rsp)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	88(%rsp), %rdi
	movl	$1, %edx
	movq	%rax, %r14
	movl	%ebx, %eax
	imull	%ebx, %eax
	leaq	8(,%rax,8), %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z15copyMatrixToGPUPvRK6Matrix
	leal	-1(%rbx), %eax
	cmpl	$5, %eax
	ja	.L359
	leaq	CSWTCH.367(%rip), %rdx
	movzbl	(%rdx,%rax), %ebp
	leaq	CSWTCH.368(%rip), %rdx
	movzbl	(%rdx,%rax), %r12d
	jmp	.L292
.L359:
	movl	$256, %r12d
	movl	$16, %ebp
.L292:
	movl	%ebp, %esi
	movl	%r12d, %eax
	xorl	%r10d, %r10d
	movl	$1, %edx
	imulq	%rax, %rsi
	leaq	96(%rsp), %rdi
	movq	%r10, 96(%rsp)
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	movl	%ebp, %r15d
	movq	96(%rsp), %rdi
	imull	%r12d, %r15d
	movl	%r15d, %eax
	leaq	0(,%rax,8), %rcx
	xorl	%eax, %eax
	rep stosb
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, %r13
	cmpl	$1, %ebx
	jbe	.L293
	movabsq	$4294967297, %rax
	movl	%ebp, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 156(%rsp)
	movl	160(%rsp), %ecx
	movq	%rax, 112(%rsp)
	movq	108(%rsp), %rdi
	movl	%r12d, 152(%rsp)
	movl	116(%rsp), %esi
	movq	152(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L294
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z30__device_stub__Z9detHelperPvPdPvPd
.L294:
	call	cudaDeviceSynchronize@PLT
	movq	96(%rsp), %rdx
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.L295:
	movq	%rbx, %xmm2
	addsd	(%rdx,%rax,8), %xmm2
	incq	%rax
	movq	%xmm2, %rbx
	cmpl	%r15d, %eax
	jb	.L295
	jmp	.L296
.L293:
	movq	88(%rsp), %rax
	movq	8(%rax), %rbx
.L296:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC38(%rip), %rsi
	movq	%rax, %rdi
	subq	%r13, %rax
	subq	%r14, %rdi
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movq	%rax, %rdi
	xorl	%eax, %eax
	movq	%xmm0, %rbp
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %r12
	call	__printf_chk@PLT
	movq	%rbx, %xmm0
	leaq	.LC39(%rip), %rbx
	movl	$2, %edi
	movb	$1, %al
	movq	%rbx, %rsi
	call	__printf_chk@PLT
	movq	%r12, %xmm0
	leaq	.LC40(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%rbp, %xmm0
	leaq	.LC41(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	16(%rsp), %rdi
	movq	%rax, %rbp
	call	_ZN6Matrix3detEv
	movq	%xmm0, %r12
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC42(%rip), %rsi
	subq	%rbp, %rax
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %rbp
	call	__printf_chk@PLT
	movq	%r12, %xmm0
	movq	%rbx, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%rbp, %xmm0
	leaq	.LC43(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	jmp	.L426
.L283:
	movl	120(%rsp), %r13d
	cmpl	136(%rsp), %r13d
	jne	.L298
	movl	124(%rsp), %ebp
	cmpl	%ebp, 140(%rsp)
	je	.L299
.L298:
	leaq	.LC44(%rip), %rsi
	jmp	.L426
.L299:
	xorl	%r9d, %r9d
	movq	%r9, 80(%rsp)
	movq	%r9, 88(%rsp)
	movq	%r9, 96(%rsp)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	80(%rsp), %rdi
	movl	$1, %edx
	movq	%rax, %r14
	movl	%r13d, %eax
	imull	%ebp, %eax
	leaq	8(,%rax,8), %rbx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	leaq	88(%rsp), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	leaq	96(%rsp), %rdi
	movl	$1, %edx
	movq	%rbx, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z15copyMatrixToGPUPvRK6Matrix
	movq	88(%rsp), %rdi
	movq	%r15, %rsi
	call	_Z15copyMatrixToGPUPvRK6Matrix
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, %rbx
	movq	96(%rsp), %rax
	movl	$268435457, %edi
	salq	$8, %rdx
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 152(%rsp)
	movl	%r13d, (%rax)
	movl	%ebp, 4(%rax)
	movl	$1, 160(%rsp)
	movq	%rdi, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L300
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z26__device_stub__Z3addPvS_S_PvS_S_
.L300:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC45(%rip), %rsi
	movq	%rax, %rdi
	subq	%rbx, %rax
	subq	%r14, %rdi
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movq	%rax, %rdi
	xorl	%eax, %eax
	movq	%xmm0, %r14
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %rbx
	call	__printf_chk@PLT
	movq	96(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z14printMatrixGPUPKcPv
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %xmm0
	leaq	.LC40(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%r14, %xmm0
	leaq	.LC41(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	%ebp, %edx
	movl	%r13d, %esi
	movq	%rax, %r14
	leaq	152(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZN6MatrixC1Ejj
.LEHE27:
	xorl	%ebx, %ebx
	leaq	136(%rsp), %r15
.L301:
	cmpl	%ebx, %r13d
	je	.L436
	xorl	%r12d, %r12d
.L303:
	cmpl	%r12d, %ebp
	je	.L437
	movq	16(%rsp), %rdi
	movl	%r12d, %edx
	movl	%ebx, %esi
.LEHB28:
	call	_ZNK6Matrix3getEjj
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%r15, %rdi
	movsd	%xmm0, 24(%rsp)
	call	_ZNK6Matrix3getEjj
	addsd	24(%rsp), %xmm0
	movq	8(%rsp), %rdi
	movl	%r12d, %edx
	movl	%ebx, %esi
	call	_ZN6Matrix3setEjjd
.LEHE28:
	incl	%r12d
	jmp	.L303
.L437:
	incl	%ebx
	jmp	.L301
.L377:
	endbr64
	jmp	.L434
.L436:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC42(%rip), %rsi
	subq	%r14, %rax
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %r12
.LEHB29:
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	leaq	.LC23(%rip), %rdi
	call	_Z14printMatrixCPUPKcRK6Matrix
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %xmm0
	leaq	.LC43(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r12d, %r12d
	leaq	120(%rsp), %r14
.L307:
	cmpl	%ebx, %r12d
	je	.L438
	xorl	%r13d, %r13d
.L309:
	cmpl	%ebp, %r13d
	je	.L439
	movq	8(%rsp), %rdi
	movl	%r13d, %edx
	movl	%r12d, %esi
	call	_ZNK6Matrix3getEjj
	movl	%r13d, %edx
	movl	%r12d, %esi
	movq	%r14, %rdi
	call	_ZN6Matrix3setEjjd
.LEHE29:
	incl	%r13d
	jmp	.L309
.L439:
	incl	%r12d
	jmp	.L307
.L438:
	movq	8(%rsp), %rdi
	jmp	.L429
.L282:
	movl	136(%rsp), %ebx
	cmpl	124(%rsp), %ebx
	jne	.L433
	xorl	%r8d, %r8d
	movq	%r8, 80(%rsp)
	movq	%r8, 88(%rsp)
	movq	%r8, 96(%rsp)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	120(%rsp), %r14d
	leaq	80(%rsp), %rdi
	movl	$1, %edx
	movq	%rax, %rbp
	movl	%ebx, %eax
	imull	%r14d, %eax
	leaq	8(,%rax,8), %rsi
.LEHB30:
	call	cudaMallocManaged@PLT
	movl	140(%rsp), %r13d
	leaq	88(%rsp), %rdi
	movl	$1, %edx
	imull	%r13d, %ebx
	leaq	8(,%rbx,8), %rsi
	call	cudaMallocManaged@PLT
	movl	%r14d, %eax
	leaq	96(%rsp), %rdi
	movl	$1, %edx
	imull	%r13d, %eax
	leaq	8(,%rax,8), %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z15copyMatrixToGPUPvRK6Matrix
	movq	88(%rsp), %rdi
	movq	%r15, %rsi
	call	_Z15copyMatrixToGPUPvRK6Matrix
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, %rbx
	movq	96(%rsp), %rax
	movl	$268435457, %edi
	salq	$8, %rdx
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 152(%rsp)
	movl	%r14d, (%rax)
	movl	%r13d, 4(%rax)
	movl	$1, 160(%rsp)
	movq	%rdi, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L311
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z26__device_stub__Z3mulPvS_S_PvS_S_
.L311:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC45(%rip), %rsi
	movq	%rax, %rdi
	subq	%rbx, %rax
	subq	%rbp, %rdi
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movq	%rax, %rdi
	xorl	%eax, %eax
	movq	%xmm0, %rbp
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %rbx
	call	__printf_chk@PLT
	movq	96(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z14printMatrixGPUPKcPv
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %xmm0
	leaq	.LC40(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%rbp, %xmm0
	leaq	.LC41(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	.LC9(%rip), %rbx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbx, %rsi
	call	__printf_chk@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	152(%rsp), %rbp
	movq	16(%rsp), %rsi
	leaq	136(%rsp), %rdx
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	_ZNK6MatrixmlERKS_
.LEHE30:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC42(%rip), %rsi
	subq	%r12, %rax
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %r12
.LEHB31:
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	leaq	.LC23(%rip), %rdi
	call	_Z14printMatrixCPUPKcRK6Matrix
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %xmm0
	leaq	.LC43(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%rbx, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	156(%rsp), %edx
	movl	152(%rsp), %esi
	movq	16(%rsp), %rdi
	call	_ZN6Matrix7setSizeEjj
	xorl	%ebx, %ebx
	leaq	120(%rsp), %r13
.L312:
	cmpl	120(%rsp), %ebx
	jnb	.L440
	xorl	%r12d, %r12d
.L314:
	cmpl	124(%rsp), %r12d
	jnb	.L441
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	_ZNK6Matrix3getEjj
	movl	%r12d, %edx
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	_ZN6Matrix3setEjjd
.LEHE31:
	incl	%r12d
	jmp	.L314
.L441:
	incl	%ebx
	jmp	.L312
.L440:
	movq	%rbp, %rdi
	jmp	.L429
.L280:
	movl	124(%rsp), %ebp
	movl	120(%rsp), %ebx
	cmpl	%ebp, %ebx
	je	.L315
.L433:
	leaq	.LC46(%rip), %rsi
	jmp	.L426
.L315:
	xorl	%edi, %edi
	movq	%rdi, 72(%rsp)
	movq	%rdi, 80(%rsp)
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	72(%rsp), %rdi
	movl	$1, %edx
	movq	%rax, 56(%rsp)
	movl	%ebx, %eax
	imull	%ebx, %eax
	leaq	8(,%rax,8), %r12
	movq	%r12, %rsi
.LEHB32:
	call	cudaMallocManaged@PLT
	leaq	80(%rsp), %rdi
	movl	$1, %edx
	movq	%r12, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z15copyMatrixToGPUPvRK6Matrix
	leal	-1(%rbx), %r12d
	cmpl	$5, %r12d
	ja	.L366
	movl	%r12d, %eax
	leaq	CSWTCH.369(%rip), %rdx
	movzbl	(%rdx,%rax), %r13d
	leaq	CSWTCH.370(%rip), %rdx
	movzbl	(%rdx,%rax), %r14d
	jmp	.L316
.L366:
	movl	$256, %r14d
	movl	$16, %r13d
.L316:
	xorl	%esi, %esi
	movl	%r14d, %eax
	leaq	88(%rsp), %rdi
	movl	$1, %edx
	movq	%rsi, 88(%rsp)
	movl	%r13d, %esi
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	movl	%r13d, %r15d
	movq	88(%rsp), %rdi
	imull	%r14d, %r15d
	movl	%r15d, %eax
	salq	$3, %rax
	movq	%rax, 32(%rsp)
	movq	32(%rsp), %rcx
	xorl	%eax, %eax
	rep stosb
	cmpl	$1, %ebp
	jbe	.L317
	movabsq	$4294967297, %rax
	movl	%r13d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 156(%rsp)
	movl	160(%rsp), %ecx
	movq	%rax, 112(%rsp)
	movq	108(%rsp), %rdi
	movl	%r14d, 152(%rsp)
	movl	116(%rsp), %esi
	movq	152(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L318
	movq	88(%rsp), %rsi
	movq	72(%rsp), %rdi
	call	_Z30__device_stub__Z9detHelperPvPdPvPd
.L318:
	call	cudaDeviceSynchronize@PLT
	movq	$0x000000000, 8(%rsp)
	movq	88(%rsp), %rdx
	xorl	%eax, %eax
.L319:
	movsd	8(%rsp), %xmm3
	addsd	(%rdx,%rax,8), %xmm3
	incq	%rax
	movsd	%xmm3, 8(%rsp)
	cmpl	%r15d, %eax
	jb	.L319
	jmp	.L320
.L317:
	movq	72(%rsp), %rax
	movsd	8(%rax), %xmm6
	movsd	%xmm6, 8(%rsp)
.L320:
	movsd	8(%rsp), %xmm0
	leaq	.LC47(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movsd	8(%rsp), %xmm7
	xorps	%xmm0, %xmm0
	ucomisd	%xmm0, %xmm7
	jp	.L321
	leaq	.LC48(%rip), %rsi
	je	.L420
.L321:
	movq	80(%rsp), %rax
	movl	%ebx, (%rax)
	movl	%ebp, 4(%rax)
	cmpl	$1, %ebx
	jne	.L324
	movsd	.LC1(%rip), %xmm0
	divsd	8(%rsp), %xmm0
	movsd	%xmm0, 8(%rax)
	jmp	.L325
.L324:
	jbe	.L325
	leal	-1(%rbp), %r14d
	xorl	%ecx, %ecx
	leaq	96(%rsp), %rdi
	movl	$1, %edx
	movl	%r14d, %eax
	movq	%rcx, 96(%rsp)
	imull	%r12d, %eax
	leaq	8(,%rax,8), %rsi
	call	cudaMallocManaged@PLT
	movq	96(%rsp), %rax
	xorl	%edx, %edx
	movq	%rdx, 16(%rsp)
	movl	%r12d, (%rax)
	movl	%r14d, 4(%rax)
.L326:
	movl	16(%rsp), %eax
	xorl	%r12d, %r12d
	movl	%eax, 24(%rsp)
	xorl	%eax, %eax
	movl	%eax, 44(%rsp)
.L340:
	movq	88(%rsp), %rdi
	movq	32(%rsp), %rcx
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	rep stosb
	movq	72(%rsp), %rax
	movq	96(%rsp), %r8
	movq	%rax, 48(%rsp)
	movl	$1, %eax
	subl	%ebp, %eax
	movl	%eax, %r15d
.L327:
	movl	%r15d, %edx
	movq	48(%rsp), %rsi
	addl	%r14d, %r15d
	movl	%r13d, %eax
	leaq	(%r8,%rdx,8), %rdi
	movl	%r15d, %edx
	leaq	(%rsi,%rax,8), %rax
	leaq	(%r8,%rdx,8), %rsi
	xorl	%edx, %edx
.L332:
	movl	24(%rsp), %r10d
	cmpl	%r10d, %ecx
	setb	%r9b
	cmpl	%r12d, %edx
	setb	%r11b
	testb	%r9b, %r9b
	je	.L328
	testb	%r11b, %r11b
	je	.L328
	movsd	8(%rax), %xmm0
	movsd	%xmm0, 8(%rsi)
.L328:
	cmpl	%edx, %r12d
	setb	%r10b
	testb	%r9b, %r9b
	je	.L329
	testb	%r10b, %r10b
	je	.L329
	movsd	8(%rax), %xmm0
	movsd	%xmm0, (%rsi)
.L329:
	cmpl	%ecx, 24(%rsp)
	setb	%r9b
	testb	%r11b, %r11b
	je	.L330
	testb	%r9b, %r9b
	je	.L330
	movsd	8(%rax), %xmm0
	movsd	%xmm0, 8(%rdi)
.L330:
	testb	%r10b, %r10b
	je	.L331
	testb	%r9b, %r9b
	je	.L331
	movsd	8(%rax), %xmm0
	movsd	%xmm0, (%rdi)
.L331:
	incl	%edx
	addq	$8, %rax
	addq	$8, %rdi
	addq	$8, %rsi
	cmpl	%ebx, %edx
	jne	.L332
	incl	%ecx
	addl	%ebp, %r13d
	cmpl	%ebx, %ecx
	jne	.L327
	leal	-2(%rbx), %eax
	cmpl	$5, %eax
	ja	.L367
	leaq	CSWTCH.371(%rip), %rcx
	leaq	CSWTCH.372(%rip), %rdx
	movzbl	(%rcx,%rax), %r13d
	movzbl	(%rdx,%rax), %r15d
	jmp	.L334
.L367:
	movl	$256, %r15d
	movl	$16, %r13d
.L334:
	cmpl	$1, %r14d
	je	.L335
	movabsq	$4294967297, %rax
	movl	%r13d, 108(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 156(%rsp)
	movl	160(%rsp), %ecx
	movq	%rax, 112(%rsp)
	movq	108(%rsp), %rdi
	movl	%r15d, 152(%rsp)
	movl	116(%rsp), %esi
	movq	152(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L336
	movq	88(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z30__device_stub__Z9detHelperPvPdPvPd
.L336:
	call	cudaDeviceSynchronize@PLT
	imull	%r15d, %r13d
	movq	88(%rsp), %rdx
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L337:
	addsd	(%rdx,%rax,8), %xmm0
	incq	%rax
	cmpl	%r13d, %eax
	jb	.L337
	jmp	.L338
.L335:
	movsd	8(%r8), %xmm0
.L338:
	movl	24(%rsp), %eax
	movsd	.LC6(%rip), %xmm1
	addl	%r12d, %eax
	testb	$1, %al
	jne	.L339
	movsd	.LC1(%rip), %xmm1
.L339:
	movl	44(%rsp), %eax
	movq	16(%rsp), %rcx
	mulsd	%xmm1, %xmm0
	incl	%r12d
	divsd	8(%rsp), %xmm0
	addl	%ebp, 44(%rsp)
	leaq	1(%rcx,%rax), %rdx
	movq	80(%rsp), %rax
	movsd	%xmm0, (%rax,%rdx,8)
	cmpl	%ebp, %r12d
	jne	.L340
	incq	16(%rsp)
	cmpl	%ebx, 16(%rsp)
	jb	.L326
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
.L325:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	56(%rsp), %rcx
	leaq	.LC45(%rip), %rsi
	subq	%rcx, %rax
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %r12
	call	__printf_chk@PLT
	movq	80(%rsp), %rsi
	leaq	.LC23(%rip), %rdi
	call	_Z14printMatrixGPUPKcPv
	leaq	.LC9(%rip), %r13
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r13, %rsi
	call	__printf_chk@PLT
	movq	%r12, %xmm0
	leaq	.LC40(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%r13, %rsi
.L420:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
.LEHE32:
	movsd	8(%rsp), %xmm6
	xorps	%xmm0, %xmm0
	ucomisd	%xmm0, %xmm6
	jp	.L342
	je	.L278
.L342:
	leaq	152(%rsp), %r12
	leaq	120(%rsp), %r15
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%r15, %rsi
	movq	%r12, %rdi
	movq	%rax, %r13
.LEHB33:
	call	_ZN6Matrix7inverseEv
.LEHE33:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC42(%rip), %rsi
	subq	%r13, %rax
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	_ZNSt6chrono20__duration_cast_implINS_8durationIdSt5ratioILl1ELl1EEEES2_ILl1ELl1000000000EEdLb1ELb0EE6__castIlS5_EES4_RKNS1_IT_T0_EE.isra.0
	movl	$2, %edi
	movq	%xmm0, %r14
.LEHB34:
	call	__printf_chk@PLT
	movq	%r12, %rsi
	leaq	.LC23(%rip), %rdi
	call	_Z14printMatrixCPUPKcRK6Matrix
	leaq	.LC9(%rip), %r13
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r13, %rsi
	call	__printf_chk@PLT
	movq	%r14, %xmm0
	leaq	.LC43(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r13d, %r13d
.L345:
	cmpl	%ebx, %r13d
	je	.L442
	xorl	%r14d, %r14d
.L347:
	cmpl	%ebp, %r14d
	je	.L443
	movl	%r14d, %edx
	movl	%r13d, %esi
	movq	%r12, %rdi
	call	_ZNK6Matrix3getEjj
	movl	%r14d, %edx
	movl	%r13d, %esi
	movq	%r15, %rdi
	call	_ZN6Matrix3setEjjd
.LEHE34:
	incl	%r14d
	jmp	.L347
.L443:
	incl	%r13d
	jmp	.L345
.L442:
	movq	%r12, %rdi
.L429:
	call	_ZN6MatrixD1Ev
	jmp	.L278
.L287:
	xorl	%edi, %edi
	call	exit@PLT
.L279:
	leaq	.LC49(%rip), %rsi
.L426:
	movl	$2, %edi
	xorl	%eax, %eax
.LEHB35:
	call	__printf_chk@PLT
	jmp	.L278
.L435:
	movq	%r15, %rdi
	call	_ZN6MatrixD1Ev
	movq	8(%rsp), %rdi
	call	_ZN6MatrixD1Ev
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L356
	jmp	.L417
.L373:
	endbr64
.L434:
	movq	%rax, %rbx
.L349:
	movq	8(%rsp), %rdi
	jmp	.L432
.L374:
	endbr64
	movq	%rax, %rbx
.L350:
	movq	%rbp, %rdi
.L432:
	call	_ZN6MatrixD1Ev
	jmp	.L306
.L376:
	endbr64
	movq	%rax, %rbx
.L351:
	movq	%r12, %rdi
	call	_ZN6MatrixD1Ev
	movq	%rbx, %rdi
	jmp	.L352
.L375:
	endbr64
	movq	%rax, %rdi
.L352:
	call	__cxa_begin_catch@PLT
	call	__cxa_end_catch@PLT
.LEHE35:
	jmp	.L278
.L372:
	endbr64
	movq	%rax, %rbx
.L306:
	leaq	136(%rsp), %rdi
	call	_ZN6MatrixD1Ev
	jmp	.L354
.L371:
	endbr64
	movq	%rax, %rbx
.L354:
	leaq	120(%rsp), %rdi
	call	_ZN6MatrixD1Ev
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L417
	movq	%rbx, %rdi
.LEHB36:
	call	_Unwind_Resume@PLT
.LEHE36:
.L417:
	call	__stack_chk_fail@PLT
.L356:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3887:
	.section	.gcc_except_table
	.align 4
.LLSDA3887:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT3887-.LLSDATTD3887
.LLSDATTD3887:
	.byte	0x1
	.uleb128 .LLSDACSE3887-.LLSDACSB3887
.LLSDACSB3887:
	.uleb128 .LEHB25-.LFB3887
	.uleb128 .LEHE25-.LEHB25
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB26-.LFB3887
	.uleb128 .LEHE26-.LEHB26
	.uleb128 .L371-.LFB3887
	.uleb128 0
	.uleb128 .LEHB27-.LFB3887
	.uleb128 .LEHE27-.LEHB27
	.uleb128 .L372-.LFB3887
	.uleb128 0
	.uleb128 .LEHB28-.LFB3887
	.uleb128 .LEHE28-.LEHB28
	.uleb128 .L377-.LFB3887
	.uleb128 0
	.uleb128 .LEHB29-.LFB3887
	.uleb128 .LEHE29-.LEHB29
	.uleb128 .L373-.LFB3887
	.uleb128 0
	.uleb128 .LEHB30-.LFB3887
	.uleb128 .LEHE30-.LEHB30
	.uleb128 .L372-.LFB3887
	.uleb128 0
	.uleb128 .LEHB31-.LFB3887
	.uleb128 .LEHE31-.LEHB31
	.uleb128 .L374-.LFB3887
	.uleb128 0
	.uleb128 .LEHB32-.LFB3887
	.uleb128 .LEHE32-.LEHB32
	.uleb128 .L372-.LFB3887
	.uleb128 0
	.uleb128 .LEHB33-.LFB3887
	.uleb128 .LEHE33-.LEHB33
	.uleb128 .L375-.LFB3887
	.uleb128 0x1
	.uleb128 .LEHB34-.LFB3887
	.uleb128 .LEHE34-.LEHB34
	.uleb128 .L376-.LFB3887
	.uleb128 0x1
	.uleb128 .LEHB35-.LFB3887
	.uleb128 .LEHE35-.LEHB35
	.uleb128 .L372-.LFB3887
	.uleb128 0
	.uleb128 .LEHB36-.LFB3887
	.uleb128 .LEHE36-.LEHB36
	.uleb128 0
	.uleb128 0
.LLSDACSE3887:
	.byte	0x1
	.byte	0
	.align 4
	.long	0

.LLSDATT3887:
	.section	.text.startup
	.size	main, .-main
	.section	.rodata
	.type	CSWTCH.368, @object
	.size	CSWTCH.368, 6
CSWTCH.368:
	.byte	1
	.byte	1
	.byte	2
	.byte	4
	.byte	16
	.byte	64
	.set	CSWTCH.372,CSWTCH.368
	.set	CSWTCH.370,CSWTCH.368
	.type	CSWTCH.367, @object
	.size	CSWTCH.367, 6
CSWTCH.367:
	.byte	1
	.byte	1
	.byte	2
	.byte	4
	.byte	4
	.byte	8
	.set	CSWTCH.371,CSWTCH.367
	.set	CSWTCH.369,CSWTCH.367
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1104006501
	.align 8
.LC1:
	.long	0
	.long	1072693248
	.align 8
.LC6:
	.long	0
	.long	-1074790400
	.align 8
.LC18:
	.long	0
	.long	1073741824
	.align 8
.LC19:
	.long	0
	.long	1074266112
	.align 8
.LC20:
	.long	0
	.long	-1072693248
	.align 8
.LC21:
	.long	0
	.long	1075052544
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h> //printf
#include <stdlib.h>//srand, rand
#include <time.h>  //time
#include <fstream>
#include <string>

#include <iostream>
#include <ctime>
#include <ratio>
#include <chrono>

//globalne ustawienia
const unsigned BLOCKS_PER_GRID = 16;
const unsigned THREADS_PER_BLOCK = 256;

class Matrix{
	unsigned M,N; //rozmiary macierzy
	double** tab;      //wskaznik na dane macierzy
	Matrix minor(unsigned m,unsigned n){
		Matrix result(M-1,N-1);
		for(unsigned i=0;i<M;i++){
			for(unsigned j=0;j<N;j++){
				if(i<m && j<n) result.set(i,j,this->get(i,j));
				else if(i<m && j>n) result.set(i,j-1,this->get(i,j));
				else if(i>m && j<n) result.set(i-1,j,this->get(i,j));
				else if(i>m && j>n) result.set(i-1,j-1,this->get(i,j));
			}
		}
		return result;
	}
public:
	Matrix(unsigned M, unsigned N){
		this->M = M;
		this->N = N;
		tab = new double*[M];
		for(unsigned i=0;i<M;i++){
			tab[i] = new double[N];
			for(unsigned j=0;j<N;j++){
				tab[i][j] = (i==j); //domyslnie macierz jednostkowa
			}
		}
	}

	~Matrix(){
		for(unsigned i=0;i<M;i++){
			delete[] tab[i];
		}
		delete[] tab;
	}

	unsigned getRows() const{ return M;}

	unsigned getColumns() const{ return N;}

	double get(unsigned m, unsigned n) const{
		if(m<M && n<N) return tab[m][n];
		throw "Nie znaleziono elementu pod podana para indeksow.";
	}

	void set(unsigned m, unsigned n, double num){
		if(m<M && n<N) tab[m][n] = num;
		else throw "Nie mozna ustawic wartosci elementu pod podana para indeksow.";
	}

	Matrix operator+(const Matrix& mat) const{
		if(this->M != mat.getRows() || this->N != mat.getColumns()) throw "Nie mozna dodawac macierzy o roznych wymiarach!";
		Matrix result = Matrix(M,N);
		for(unsigned i=0;i<M;i++){
			for(unsigned j=0;j<N;j++){
				result.set(i,j,this->get(i,j)+mat.get(i,j));
			}
		}
		return result;
	}

	Matrix operator*(const Matrix& mat) const{
		if(this->N != mat.getRows()) throw "Pierwsza macierz nie ma tylu kolumn, co druga wierszy - odmowa wykonania mnozenia!";
		Matrix result = Matrix(M, mat.getColumns());
		for(unsigned i=0;i<M;i++){
			for(unsigned j=0;j<mat.getColumns();j++){
				//result.set(i,j,this->get(i,j)+mat.get(i,j));
				result.set(i,j,0.0);
				for(unsigned k=0;k<this->N;k++){
					result.set(i,j,result.get(i,j)+this->get(i,k)*mat.get(k,j));
				}
			}
		}
		return result;
	}

	double det(){
		if(M != N) throw "Wyznacznik mozna obliczyc tylko dla macierzy kwadratowej!";
		if(M == 1) return get(0,0);
		else{
			double result = 0.0;
			for(unsigned i=0;i<M;i++){
				//result += ((i%2==0)?(1.0):(-1.0))*get(i,0)*minor(i,0).det();
				Matrix minr = minor(i,0);
				//printf("%.1f \n", get(i,0));
				result += ((i%2==0)?(1.0):(-1.0))*get(i,0)*minr.det();
			}
			return result;
		}
	}

	Matrix inverse(){
		double mainDet = det();
		if(mainDet == 0.0 || mainDet == -0.0) throw "Wyznacznik macierzy rowny zero!";
		Matrix result = Matrix(M,N);
		if(M==1) result.set(0,0,1.0/mainDet);
		else{
			for(unsigned i=0;i<M;i++){
				for(unsigned j=0;j<N;j++){
					double detElement = (((i%2)+(j%2))%2==0?1.0:-1.0)*minor(i,j).det();

					result.set(j,i,detElement/mainDet);
				}
			}
		}
		return result;

	}
  	void setSize(unsigned M, unsigned N) {
		for(int i =0 ;i<this->M;i++){
			delete[] tab[i];
		}
		delete[] tab;

		this->M = M;
		this->N = N;

		this->tab = new double* [this->M];
		for (unsigned i = 0; i < this->M; i++) {
			tab[i] = new double[this->N];
			for(unsigned j=0;j< this->N; j++){
				tab[i][j] = (i==j); //domyslnie macierz jednostkowa	
			}
		}
	}
	

};

void printMatrixCPU(const char* format, const Matrix& matrix){
	for(unsigned i=0; i<matrix.getRows(); i++){
		for(unsigned j=0; j<matrix.getColumns(); j++){
			printf(format, matrix.get(i,j));
		}
		printf("\n");
	}
}
void printMatrixGPU(const char* format, void* matrix){
	//debug
	//printf("%d\n",*(unsigned*)matrix);
	//printf("%d\n",*((unsigned*)matrix+1));
	
	for(unsigned i=0; i<*(unsigned*)matrix; i++){  //wartosc *(unsigned*)matrix przechowuje liczbe wierszy
		for(unsigned j=0; j<*((unsigned*)matrix+1); j++){ //wartosc *(unsigned*)matrix+1 przechowuje liczbe kolumn
			//duzo castowania
			printf(format, *((double*)((unsigned*)matrix+2)+i*(*((unsigned*)matrix+1))+j));
		}
		printf("\n");
	}
}

void copyMatrixToGPU( void* ptr, const Matrix& matrix){
	//Kopia macierzy w pamięci GPU
	*((unsigned*)ptr) = matrix.getRows();
	*((unsigned*)ptr+1) = matrix.getColumns();
	for(unsigned i=0;i<matrix.getRows();i++){
		for(unsigned j=0;j<matrix.getColumns();j++){
			//*((double*)((unsigned*)ptr+2)+(i*matrix.getRows()+j)) = matrix.get(i,j);
			*((double*)((unsigned*)ptr+2)+(i*matrix.getColumns()+j)) = matrix.get(i,j);
		}
	}
}

__global__
void add(void* matrix1, void* matrix2, void* result){//PRZY ZALOZENIU, ZE PAMIEC jest juz zaalokowana, w a matrix1 i matrix 2 są juz gotowe wartosci, zakladamy tez, ze zgadzaja sie wymiary macierzy i ewentualne inne warunki, NOTE: wymiary macierzy trzeba wpisac poza kernelem
	unsigned idx = threadIdx.x + blockDim.x * blockIdx.x;
	unsigned stride = blockDim.x * gridDim.x;

	for(unsigned i = idx; i<(*(unsigned*)matrix1)*(*((unsigned*)matrix1+1)); i+=stride){
		*((double*)((unsigned*)result+2)+i) = *((double*)((unsigned*)matrix1+2)+i) + *((double*)((unsigned*)matrix2+2)+i); 
	}
}

__global__
void mul(void* matrix1, void* matrix2, void* result){
	unsigned idx = threadIdx.x + blockDim.x * blockIdx.x;
	unsigned stride = blockDim.x * gridDim.x;

	
	for(unsigned i = idx; i<(*(unsigned*)matrix1)*(*((unsigned*)matrix2+1)); i+=stride){ //przechodzimy po elementach macierzy wynikowej
		double product = 0.0;
		for(unsigned j=0; j<*(unsigned*)matrix2; j++){
			product += (*((double*)((unsigned*)matrix1+2)+(i/(*((unsigned*)matrix2+1)))*(*((unsigned*)matrix1+1))+j))
				*  (*((double*)((unsigned*)matrix2+2)+j*(*((unsigned*)matrix2+1))+i%(*((unsigned*)matrix2+1))));
		}
		*((double*)((unsigned*)result+2)+i) = product;
	}
}


__global__
void detHelper(void* matrix, double* tab_helper/*, unsigned N*/){
	unsigned idx = threadIdx.x + blockDim.x * blockIdx.x;
	unsigned stride = blockDim.x * gridDim.x;
	unsigned N = *(unsigned*)matrix;

	//zapisujemy idx w silniowym systemie liczbowym:
	int* idxTab = new int[N];
	for(int i=1;i<=N;i++){
		idxTab[N-i] = idx%i;
		idx/=i;
	}
	//upewniamy sie, ze udzial w obliczeniach biora tylko te watki, dla ktorych oryginalny index nalezal do przedzialu <0, N!), czyli ze mamy co najwyzej N! watkow wykonujacych jakas prace
	if(idx==0){
		//zapisujemy stride (skok dla pojedynczego watku) w silniowym systemie liczbowym
		int* strideTab = new int[N];
		for(int i=1;i<=N;i++){
			strideTab[N-i] = stride%i;
			stride/=i;
		}

		//przywracamy oryginalne wartosci
		idx = threadIdx.x + blockDim.x * blockIdx.x;
		stride = blockDim.x * gridDim.x;

		//warunek konca pracy watku (wyjscie poza zakres na skutek stalego dodawania strideTab do idxTab)
		while(idxTab[0]<N){
			//wskaznik parzystosci permutacji, 0 - parzysta, 1 - nieparzysta
			int parz = 0;
			for(int i=0;i<N;i++) parz = (parz + idxTab[i])%2;
			//konwersja na interesujaca permutacje
			for(int i=0;i<N;i++){
				for(int j=1;j<=N;j++){
					bool niepojawilo = true;
					for(int k=0;k<i;k++){
						if(idxTab[k] == j){niepojawilo = false; break;}
					}
					if(niepojawilo){
						if(idxTab[i]==0){
							idxTab[i]=j;break;
						}
						else idxTab[i]--;
					}
				}
			}
			//iloczyn czastkowy (jeden z N! z wzoru na wyznacznik), z odpowiednim znakiem
			double product = ((parz%2==0) ? 1.0 : (-1.0));

			for(int i=0;i<N;i++) product*= *(((double*)((unsigned*)matrix+2))+i*N+(idxTab[i]-1));//element z i-tego wiersza i (idxTab[i]-1) kolumny

			tab_helper[idx] += product;

			//konwersja odwrotna (przywrocenie numeru indexu)
			for(int i=0;i<N;i++){
				int ile = 0;
				for(int j=i+1;j<N;j++){
					if(idxTab[j]<idxTab[i]) ile++;
				}
				idxTab[i] = ile;
			}
			//dodanie idxTab+=strideTab, (patrz: warunek konca petli)
			int ak=0;
			for(int i=1;i<=N;i++){
				idxTab[N-i]=idxTab[N-i]+strideTab[N-i]+ak;
				ak=idxTab[N-i]/i;
				if(i!=N) idxTab[N-i]%=i;
			}
			idxTab[0]+=ak;


		}
		delete[] strideTab;
	}
	delete[] idxTab;
}



void loadMatrixFromFile(Matrix & matrix) {
	char filename[50];
	printf("Podaj nazwe pliku: ");
	scanf("%s", filename);

	std::ifstream myfile;
	myfile.open(filename);
	
	if (!myfile.good()){
		printf("Nie udalo sie otworzyc pliku o podanej nazwie!\n");
	}
	if (myfile.is_open())
	{
		std::string line;
		getline(myfile, line);
		unsigned M = stoul(line);
		getline(myfile, line);
		unsigned N = stoul(line);
		matrix.setSize(M, N);
			for (unsigned i = 0; i < M; i++) {
				for (unsigned j = 0; j < N; j++) {
					getline(myfile, line);
					matrix.set(i, j, stod(line));
				}
			}

		myfile.close();
	}
}

void saveMatrixToFile(Matrix& matrixInt) {
	char filename[50];
	printf("Podaj nazwe pliku: ");
	scanf("%s", filename);

	std::ofstream myfile;
	myfile.open(filename);
	myfile << matrixInt.getRows()<<"\n";
	myfile << matrixInt.getColumns()<<"\n";
	for (int i = 0; i < matrixInt.getRows(); i++) {
		for (int j = 0; j < matrixInt.getColumns(); j++) {
			myfile << matrixInt.get(i, j)<< "\n";
		}
	}
	myfile.close();
}




using namespace std::chrono;

int main(){
	const unsigned M = 3; //test values
	const unsigned N = 3;
	Matrix matrix1(M,N);
 	Matrix matrix2(M,N);
	for(int i = 0 ;i<M;i++){
		for(int j = 0 ; j<N ; j++){
			matrix1.set(i,j,i);
		}
	}
	matrix1.set(0,0,1.0);
	matrix1.set(0,1,-1.0);
	matrix1.set(0,2,2.0);
	matrix1.set(1,0,3.0);
	matrix1.set(1,1,0.0);
	matrix1.set(1,2,-4.0);
	matrix1.set(2,0,2.0);
	matrix1.set(2,1,3.0);
	matrix1.set(2,2,5.0);

	for(int i = 0 ;i<M;i++){
		for(int j = 0 ; j<N ; j++){
			matrix2.set(i,j,j);
		}
	}

	
	int x = 11;
	while (x != 0)
	{
		printf("Macierz 1:\n");
		printMatrixCPU("%.2f ", matrix1);
		printf("\n");
		printf("Macierz 2:\n");
		printMatrixCPU("%.2f ", matrix2);
		printf("\n");

		printf( "*******************MENU********************\n");
		printf("1.Wczytaj macierz z pliku\n");
		printf("2.Zapisz macierz do pliku\n");
		printf("3.Wyznacznik ( det(m1) )\n");
		printf("4.Dodaj macierze (m1=m1+m2)\n");
		printf("5.Przemnóż macierze (m1=m1*m2)\n");
		printf("6.Macierz odwrotna ( m1=m1^(-1) )\n");
    		printf("0.Wyjdź\n");

		printf("Wybieram : \n");
		scanf("%d", &x);
		system("clear");

    		int subselect= 0;
		switch (x){
		case 1: //ladowanie
			printf("1 - Macierz 1\n2 - Macierz 2\n");
			scanf("%d", &subselect);
			subselect==1?loadMatrixFromFile(matrix1):loadMatrixFromFile(matrix2);
		break;
		case 2: //zapisywanie
			printf("1 - Macierz 1\n2 - Macierz 2\n");
			scanf("%d", &subselect);
			subselect==1?saveMatrixToFile(matrix1):saveMatrixToFile(matrix2);
		break;
		case 3: //wyznacznik
				
			if(matrix1.getRows() != matrix1.getColumns()){
				printf("Wymiary macierzy musza byc rowne!!!");	
			}
			else{
				//deklarcja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;

				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				hipMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));

				//kopia macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);

				//dynamiczne przystosowanie liczby watkow (ominiecie bledu BLOCKS_PER_GRID * THREADS_PER_BLOCK >= N!)
				unsigned tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
				unsigned tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;

				switch(matrix1.getRows()){
					case 1:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 2:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 3:
					tempBLOCKS_PER_GRID=2;
					tempTHREADS_PER_BLOCK=2;
					break;
					case 4:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=4;
					break;
					case 5:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=16;
					break;
					case 6:
					tempBLOCKS_PER_GRID=8;
					tempTHREADS_PER_BLOCK=64;
					break;
					default:
					tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
					tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;
				}

				//tablica i wskaznik pomocnicze
				double* tab = NULL;//new double[BLOCKS_PER_GRID * THREADS_PER_BLOCK];
				hipMallocManaged(&tab, sizeof(double) * tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK);
				for(unsigned i=0;i<tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK; i++) tab[i] = 0.0;
				double w = 0.0;
				
				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tbk = high_resolution_clock::now();

				//jezeli rozmiar macierzy wiekszy od jeden wywolaj kernel, oblicz wyznacznik
				if(matrix1.getRows()>1){

					detHelper<<<tempBLOCKS_PER_GRID, tempTHREADS_PER_BLOCK>>>(d_1, tab);
					hipDeviceSynchronize();
					for(unsigned i=0;i<tempBLOCKS_PER_GRID*tempTHREADS_PER_BLOCK; i++){
						w += tab[i];	
					}

				}
				//w przeciwnym wypadku wyznacznikiem jest jedyny element macierzy
				else w = *((double*)((unsigned*)d_1+2));

				//koniec mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tk = high_resolution_clock::now();

				duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
				duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

				printf("(Device) Wyznacznik obliczony przy uzyciu kernela:\n");
				printf("%f\n\n", w);
				
				printf("(Device) wykonano w ciagu: %fs\n", time_nalloc.count());
				printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
				printf("\n");
				
				hipFree(d_1);
				hipFree(tab);
				//delete[] tab;

				//poczatek pomiaru czasu na CPU
				high_resolution_clock::time_point tpc = high_resolution_clock::now();

				double d = matrix1.det();
				
				//koniec pomiaru czasu na CPU
				high_resolution_clock::time_point tpk = high_resolution_clock::now();

				duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);

				printf("Wynik obliczen na CPU:\n");
				printf("%f\n\n", d);
				printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
				printf("\n");


			}

		break;
		case 4: //dodawanie
			if(matrix1.getRows() != matrix2.getRows() || matrix1.getColumns()!=matrix2.getColumns()){
				printf("Macierze różnych rozmiarów!\n");
			}
			else{
				//realizacja na GPU:
				//deklaracja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;
				void* d_2 = NULL;
				void* d_r = NULL;
				
				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				hipMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				hipMallocManaged(&d_2, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				hipMallocManaged(&d_r, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
		
				//kopie macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);
				copyMatrixToGPU(d_2, matrix2);

				//poczatek mierzenia czasu, jedynie obliczenia
				high_resolution_clock::time_point tbk = high_resolution_clock::now();

				//ustawienie rozmiaru macierzy wynikowej
				*(unsigned*)d_r = matrix1.getRows();
				*((unsigned*)d_r+1) = matrix1.getColumns();
				add<<<BLOCKS_PER_GRID, THREADS_PER_BLOCK>>>(d_1, d_2, d_r);	
				hipDeviceSynchronize();

				//koniec mierzenia czasu
				high_resolution_clock::time_point tk = high_resolution_clock::now();

				//obliczenie delt czasowych:
				duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
				duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

				printf("Wynik obliczen na GPU:\n");
				printMatrixGPU("%.2f ", d_r);
				printf("\n");
				printf("(Device) wykonano w ciagu: %fs\n", time_nalloc.count());
				printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
				printf("\n");

				hipFree(d_1);
				hipFree(d_2);
				hipFree(d_r);
				
				//poczatek pomiaru czasu na CPU
				high_resolution_clock::time_point tpc = high_resolution_clock::now();

				Matrix result = matrix1 + matrix2;//(matrix1.getRows(),matrix.getColumns());
				
				//koniec pomiaru czasu na CPU
				high_resolution_clock::time_point tpk = high_resolution_clock::now();

				duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);
				
					
				
				printf("Wynik obliczen na CPU:\n");
				printMatrixCPU("%.2f ", result);
				printf("\n");
				printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
				printf("\n");

				for(unsigned i=0;i<matrix1.getRows();i++){
					for(unsigned j=0;j<matrix1.getColumns();j++){
						matrix1.set(i,j,result.get(i,j));
					}
				}

			}
			//else executeAdding(matrix1, matrix2);
		break;
		case 5: //mnozenie
			if(matrix1.getColumns() != matrix2.getRows()){
				printf("Nie zgadzaja sie rozmiary macierzy!!!\n");
			}
			else{
				//realizacja na GPU:
				//deklaracja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;
				void* d_2 = NULL;
				void* d_r = NULL;
				
				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				hipMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				hipMallocManaged(&d_2, 2*sizeof(unsigned)+matrix2.getRows()*matrix2.getColumns()*sizeof(double));
				hipMallocManaged(&d_r, 2*sizeof(unsigned)+matrix1.getRows()*matrix2.getColumns()*sizeof(double));

				//kopie macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);
				copyMatrixToGPU(d_2, matrix2);

				//poczatek mierzenia czasu, jedynie obliczenia
				high_resolution_clock::time_point tbk = high_resolution_clock::now();

				//ustawienie rozmiaru macierzy wynikowej
				*(unsigned*)d_r = matrix1.getRows();
				*((unsigned*)d_r+1) = matrix2.getColumns();
				mul<<<BLOCKS_PER_GRID, THREADS_PER_BLOCK>>>(d_1, d_2, d_r);	
				hipDeviceSynchronize();

				//koniec mierzenia czasu
				high_resolution_clock::time_point tk = high_resolution_clock::now();

				//obliczenie delt czasowych:
				duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
				duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

				printf("Wynik obliczen na GPU:\n");
				printMatrixGPU("%.2f ", d_r);
				printf("\n");
				printf("(Device) wykonano w ciagu: %fs\n", time_nalloc.count());
				printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
				printf("\n");

				hipFree(d_1);
				hipFree(d_2);
				hipFree(d_r);
				
				//poczatek pomiaru czasu na CPU
				high_resolution_clock::time_point tpc = high_resolution_clock::now();

				Matrix result = matrix1 * matrix2;//(matrix1.getRows(),matrix.getColumns());
				
				//koniec pomiaru czasu na CPU
				high_resolution_clock::time_point tpk = high_resolution_clock::now();

				duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);
					
				printf("Wynik obliczen na CPU:\n");
				printMatrixCPU("%.2f ", result);
				printf("\n");
				printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
				printf("\n");

				matrix1.setSize(result.getRows(),result.getColumns());

				for(unsigned i=0;i<matrix1.getRows();i++){
					for(unsigned j=0;j<matrix1.getColumns();j++){
						matrix1.set(i,j,result.get(i,j));
					}
				}



			}
		break;
    		case 6: //macierz odwrotna
			if(matrix1.getColumns() != matrix1.getRows()){
				printf("Nie zgadzaja sie rozmiary macierzy!!!\n");
			}
			else{
				//deklarcja wskaznikow na pamiec urzadzenia
				void* d_1 = NULL;
				void* d_r = NULL;

				//poczatek mierzenia czasu wliczajac alokacja pamieci
				high_resolution_clock::time_point tzk = high_resolution_clock::now();

				//alokacja pamieci
				hipMallocManaged(&d_1, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));
				hipMallocManaged(&d_r, 2*sizeof(unsigned)+matrix1.getRows()*matrix1.getColumns()*sizeof(double));

				//kopia macierzy w pamieci GPU:
				copyMatrixToGPU(d_1, matrix1);

				//dynamiczne przystosowanie liczby watkow (ominiecie bledu BLOCKS_PER_GRID * THREADS_PER_BLOCK >= N!)
				unsigned tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
				unsigned tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;

				switch(matrix1.getRows()){
					case 1:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 2:
					tempBLOCKS_PER_GRID=1;
					tempTHREADS_PER_BLOCK=1;
					break;
					case 3:
					tempBLOCKS_PER_GRID=2;
					tempTHREADS_PER_BLOCK=2;
					break;
					case 4:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=4;
					break;
					case 5:
					tempBLOCKS_PER_GRID=4;
					tempTHREADS_PER_BLOCK=16;
					break;
					case 6:
					tempBLOCKS_PER_GRID=8;
					tempTHREADS_PER_BLOCK=64;
					break;
					default:
					tempBLOCKS_PER_GRID = BLOCKS_PER_GRID;
					tempTHREADS_PER_BLOCK = THREADS_PER_BLOCK;
				}


				//tablica i wskaznik pomocnicze
				double* tab = NULL;//new double[BLOCKS_PER_GRID * THREADS_PER_BLOCK];
				hipMallocManaged(&tab, sizeof(double) * tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK);
				for(unsigned i=0;i<tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK; i++) tab[i] = 0.0;
				double w = 0.0;

				//poczatek mierzenia czasu wliczajac alokacja pamieci
				//high_resolution_clock::time_point tbk = high_resolution_clock::now();

				if(matrix1.getColumns()>1){
					detHelper<<<tempBLOCKS_PER_GRID, tempTHREADS_PER_BLOCK>>>(d_1, tab);
					hipDeviceSynchronize();
					for(unsigned i=0;i<tempBLOCKS_PER_GRID*tempTHREADS_PER_BLOCK; i++){
						w += tab[i];	
					}
				}
				//w przeciwnym wypadku wyznacznikiem jest jedyny element macierzy
				else w = *((double*)((unsigned*)d_1+2));


				double mainDet = w;

				//debug
				printf("Wyznacznik glownej macierzy: %f\n", mainDet);
				
				
				
				
				
				if(mainDet == 0.0 || mainDet == -0.0){
					printf("Wyznacznik macierzy rowny 0.0 - macierz odwrotna nie istnieje!");
				}
				else{
					*(unsigned*)d_r = matrix1.getRows();
					*((unsigned*)d_r+1) = matrix1.getColumns();
					if(matrix1.getRows()==1){
						*((double*)((unsigned*)d_r+2)) = 1.0/mainDet;
					}
					else if(matrix1.getRows()>1){
						//Tworzymy bufor na minora:
						void* minor = NULL;
						hipMallocManaged(&minor, 2*sizeof(unsigned)+(matrix1.getRows()-1)*(matrix1.getColumns()-1)*sizeof(double));

						//przekopiowanie	
						*(unsigned*)minor = matrix1.getRows()-1;
						*((unsigned*)minor+1) = matrix1.getColumns()-1;

						
						for(unsigned i=0; i<matrix1.getRows(); i++){
							for(unsigned j=0; j<matrix1.getColumns(); j++){
								//zerujemy tab i w
								for(unsigned q=0;q<tempBLOCKS_PER_GRID * tempTHREADS_PER_BLOCK; q++) tab[q] = 0.0;
								w = 0.0;
								for(unsigned q=0;q<matrix1.getRows(); q++){
									for(unsigned k=0;k<matrix1.getRows(); k++){
										if(q<i && k<j) *((double*)((unsigned*)minor+2)+q*(matrix1.getColumns()-1)+k) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);
										if(q<i && k>j) *((double*)((unsigned*)minor+2)+q*(matrix1.getColumns()-1)+k-1) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);
										if(q>i && k<j) *((double*)((unsigned*)minor+2)+(q-1)*(matrix1.getColumns()-1)+k) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);
										if(q>i && k>j) *((double*)((unsigned*)minor+2)+(q-1)*(matrix1.getColumns()-1)+k-1) = *((double*)((unsigned*)d_1+2) + q*matrix1.getColumns() + k);

									}	
								}	

								unsigned temp2BLOCKS_PER_GRID = BLOCKS_PER_GRID;
								unsigned temp2THREADS_PER_BLOCK = THREADS_PER_BLOCK;

								switch(matrix1.getRows()-1){
									case 1:
									temp2BLOCKS_PER_GRID=1;
									temp2THREADS_PER_BLOCK=1;
									break;
									case 2:
									temp2BLOCKS_PER_GRID=1;
									temp2THREADS_PER_BLOCK=1;
									break;
									case 3:
									temp2BLOCKS_PER_GRID=2;
									temp2THREADS_PER_BLOCK=2;
									break;
									case 4:
									temp2BLOCKS_PER_GRID=4;
									temp2THREADS_PER_BLOCK=4;
									break;
									case 5:
									temp2BLOCKS_PER_GRID=4;
									temp2THREADS_PER_BLOCK=16;
									break;
									case 6:
									temp2BLOCKS_PER_GRID=8;
									temp2THREADS_PER_BLOCK=64;
									break;
									default:
									temp2BLOCKS_PER_GRID = BLOCKS_PER_GRID;
									temp2THREADS_PER_BLOCK = THREADS_PER_BLOCK;
								}

								if(matrix1.getColumns()-1>1){

									//kernel
									detHelper<<<temp2BLOCKS_PER_GRID, temp2THREADS_PER_BLOCK>>>(minor, tab);
									hipDeviceSynchronize();

									for(unsigned q=0;q<temp2BLOCKS_PER_GRID*temp2THREADS_PER_BLOCK; q++){
										w += tab[q];	
									}
								}

								else w = *((double*)((unsigned*)minor+2));

								
								*((double*)((unsigned*)d_r+2)+j*matrix1.getColumns()+i) = (((i%2)+(j%2))%2==0?1.0:-1.0) * w / mainDet;

							}
						}
						
						hipFree(minor);

					}
					//koniec mierzenia czasu
					high_resolution_clock::time_point tk = high_resolution_clock::now();

					//obliczenie delt czasowych:
					duration<double> time_alloc  = duration_cast<duration<double>>(tk - tzk);
					//duration<double> time_nalloc = duration_cast<duration<double>>(tk - tbk);

					printf("Wynik obliczen na GPU:\n");
					printMatrixGPU("%.2f ", d_r);
					printf("\n");
					printf("(Device) wykonano w ciagu: %fs\n", time_alloc.count());
					//printf("(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n", time_alloc.count());
					printf("\n");


				}
				

				hipFree(tab);
				hipFree(d_r);
				hipFree(d_1);

				if(mainDet != 0.0 && mainDet != -0.0){

					try{
						//poczatek pomiaru czasu na CPU
						high_resolution_clock::time_point tpc = high_resolution_clock::now();
						
						Matrix result = matrix1.inverse();

						//koniec pomiaru czasu na CPU
						high_resolution_clock::time_point tpk = high_resolution_clock::now();

						duration<double> timeCPU = duration_cast<duration<double>>(tpk - tpc);	
						
						printf("Wynik obliczen na CPU:\n");
						printMatrixCPU("%.2f ", result);
						printf("\n");
						printf("(Host) wykonano w ciagu: %fs\n", timeCPU.count());
						printf("\n");

						for(unsigned i=0;i<matrix1.getRows();i++){
							for(unsigned j=0;j<matrix1.getColumns();j++){
								matrix1.set(i,j,result.get(i,j));
							}
						}
					}
					catch(...){}
				}
			}
      		break;
    		case 0: //wyjscie
      			exit(0);
    		default:
			printf("Nie rozumiem - sprobuj ponownie!");
      		break;

		}
	}
	
	return 0;
}

	.text
	.file	"stable.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z14printMatrixCPUPKcRK6Matrix  # -- Begin function _Z14printMatrixCPUPKcRK6Matrix
	.type	_Z14printMatrixCPUPKcRK6Matrix,@function
_Z14printMatrixCPUPKcRK6Matrix:         # @_Z14printMatrixCPUPKcRK6Matrix
	.cfi_startproc
# %bb.0:
	cmpl	$0, (%rsi)
	je	.LBB0_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%ebp, %ebp
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	cmpl	$0, 4(%rbx)
	je	.LBB0_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%r15d, %r15d
.LBB0_4:                                # %.lr.ph
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZNK6Matrix3getEjj
	movq	%r14, %rdi
	movb	$1, %al
	callq	printf
	incl	%r15d
	cmpl	4(%rbx), %r15d
	jb	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%ebp
	cmpl	(%rbx), %ebp
	jb	.LBB0_2
# %bb.6:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB0_7:                                # %._crit_edge12
	retq
.Lfunc_end0:
	.size	_Z14printMatrixCPUPKcRK6Matrix, .Lfunc_end0-_Z14printMatrixCPUPKcRK6Matrix
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6Matrix3getEjj,"axG",@progbits,_ZNK6Matrix3getEjj,comdat
	.weak	_ZNK6Matrix3getEjj              # -- Begin function _ZNK6Matrix3getEjj
	.p2align	1, 0x90
	.type	_ZNK6Matrix3getEjj,@function
_ZNK6Matrix3getEjj:                     # @_ZNK6Matrix3getEjj
	.cfi_startproc
# %bb.0:
	cmpl	%esi, (%rdi)
	jbe	.LBB1_3
# %bb.1:
	cmpl	%edx, 4(%rdi)
	jbe	.LBB1_3
# %bb.2:
	movq	8(%rdi), %rax
	movl	%esi, %ecx
	movq	(%rax,%rcx,8), %rax
	movl	%edx, %ecx
	movsd	(%rax,%rcx,8), %xmm0            # xmm0 = mem[0],zero
	retq
.LBB1_3:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$8, %edi
	callq	__cxa_allocate_exception
	movq	$.L.str.32, (%rax)
	movl	$_ZTIPKc, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	__cxa_throw
.Lfunc_end1:
	.size	_ZNK6Matrix3getEjj, .Lfunc_end1-_ZNK6Matrix3getEjj
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z14printMatrixGPUPKcPv         # -- Begin function _Z14printMatrixGPUPKcPv
	.type	_Z14printMatrixGPUPKcPv,@function
_Z14printMatrixGPUPKcPv:                # @_Z14printMatrixGPUPKcPv
	.cfi_startproc
# %bb.0:
	cmpl	$0, (%rsi)
	je	.LBB2_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	leaq	8(%rsi), %r15
	xorl	%r12d, %r12d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	movl	4(%rbx), %eax
	testl	%eax, %eax
	je	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%r13d, %r13d
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%r12d, %eax
	leaq	(%r15,%rax,8), %rax
	movsd	(%rax,%r13,8), %xmm0            # xmm0 = mem[0],zero
	movq	%r14, %rdi
	movb	$1, %al
	callq	printf
	incq	%r13
	movl	4(%rbx), %eax
	cmpq	%rax, %r13
	jb	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%r12d
	cmpl	(%rbx), %r12d
	jb	.LBB2_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB2_7:                                # %._crit_edge14
	retq
.Lfunc_end2:
	.size	_Z14printMatrixGPUPKcPv, .Lfunc_end2-_Z14printMatrixGPUPKcPv
	.cfi_endproc
                                        # -- End function
	.globl	_Z15copyMatrixToGPUPvRK6Matrix  # -- Begin function _Z15copyMatrixToGPUPvRK6Matrix
	.type	_Z15copyMatrixToGPUPvRK6Matrix,@function
_Z15copyMatrixToGPUPvRK6Matrix:         # @_Z15copyMatrixToGPUPvRK6Matrix
	.cfi_startproc
# %bb.0:
	movl	(%rsi), %eax
	movl	%eax, (%rdi)
	movl	4(%rsi), %eax
	movl	%eax, 4(%rdi)
	movl	(%rsi), %ecx
	testl	%ecx, %ecx
	je	.LBB3_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%ebp, %ebp
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%eax, %eax
	movl	$0, %eax
	je	.LBB3_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%r15d, %r15d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZNK6Matrix3getEjj
	movl	4(%rbx), %eax
	movl	%ebp, %ecx
	imull	%eax, %ecx
	addl	%r15d, %ecx
	movsd	%xmm0, 8(%r14,%rcx,8)
	incl	%r15d
	cmpl	%eax, %r15d
	jb	.LBB3_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	(%rbx), %ecx
.LBB3_6:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%ebp
	cmpl	%ecx, %ebp
	jb	.LBB3_2
# %bb.7:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB3_8:                                # %._crit_edge19
	retq
.Lfunc_end3:
	.size	_Z15copyMatrixToGPUPvRK6Matrix, .Lfunc_end3-_Z15copyMatrixToGPUPvRK6Matrix
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__addPvS_S_    # -- Begin function _Z18__device_stub__addPvS_S_
	.type	_Z18__device_stub__addPvS_S_,@function
_Z18__device_stub__addPvS_S_:           # @_Z18__device_stub__addPvS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPvS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18__device_stub__addPvS_S_, .Lfunc_end4-_Z18__device_stub__addPvS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__mulPvS_S_    # -- Begin function _Z18__device_stub__mulPvS_S_
	.type	_Z18__device_stub__mulPvS_S_,@function
_Z18__device_stub__mulPvS_S_:           # @_Z18__device_stub__mulPvS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3mulPvS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z18__device_stub__mulPvS_S_, .Lfunc_end5-_Z18__device_stub__mulPvS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__detHelperPvPd # -- Begin function _Z24__device_stub__detHelperPvPd
	.type	_Z24__device_stub__detHelperPvPd,@function
_Z24__device_stub__detHelperPvPd:       # @_Z24__device_stub__detHelperPvPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9detHelperPvPd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__detHelperPvPd, .Lfunc_end6-_Z24__device_stub__detHelperPvPd
	.cfi_endproc
                                        # -- End function
	.globl	_Z18loadMatrixFromFileR6Matrix  # -- Begin function _Z18loadMatrixFromFileR6Matrix
	.type	_Z18loadMatrixFromFileR6Matrix,@function
_Z18loadMatrixFromFileR6Matrix:         # @_Z18loadMatrixFromFileR6Matrix
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$648, %rsp                      # imm = 0x288
	.cfi_def_cfa_offset 704
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	592(%rsp), %r14
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.1:
	movq	72(%rsp), %rax
	movq	-24(%rax), %rax
	cmpl	$0, 104(%rsp,%rax)
	je	.LBB7_3
# %bb.2:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB7_3:
	leaq	192(%rsp), %rdi
	callq	_ZNKSt12__basic_fileIcE7is_openEv
	testb	%al, %al
	je	.LBB7_43
# %bb.4:
	leaq	56(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	$0, -8(%rax)
	movb	$0, (%rax)
	movq	72(%rsp), %rax
	addq	-24(%rax), %rbx
.Ltmp3:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp4:
# %bb.5:                                # %.noexc
.Ltmp5:
	movsbl	%al, %edx
	leaq	72(%rsp), %rbx
	leaq	40(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp6:
# %bb.6:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
	movq	40(%rsp), %r15
	callq	__errno_location
	movq	%rax, %r14
	movl	(%rax), %ebp
	movl	$0, (%rax)
	leaq	16(%rsp), %r12
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	$10, %edx
	callq	__isoc23_strtoul
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	cmpq	%r15, (%r12)
	je	.LBB7_7
# %bb.12:
	movl	(%r14), %eax
	testl	%eax, %eax
	je	.LBB7_16
# %bb.13:
	cmpl	$34, %eax
	jne	.LBB7_17
# %bb.14:                               # %.critedge.i.i
.Ltmp8:
	movl	$.L.str.33, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp9:
# %bb.15:
.LBB7_16:
	movl	%ebp, (%r14)
.LBB7_17:
	movq	72(%rsp), %rax
	addq	-24(%rax), %rbx
.Ltmp10:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp11:
# %bb.18:                               # %.noexc24
.Ltmp12:
	movsbl	%al, %edx
	leaq	72(%rsp), %r12
	leaq	40(%rsp), %rsi
	movq	%r12, %rdi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp13:
# %bb.19:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit26
	movq	40(%rsp), %rbx
	movl	(%r14), %ebp
	movl	$0, (%r14)
	leaq	16(%rsp), %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	movl	$10, %edx
	callq	__isoc23_strtoul
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	cmpq	%rbx, (%r15)
	je	.LBB7_20
# %bb.23:
	movl	(%r14), %eax
	testl	%eax, %eax
	movq	24(%rsp), %rbx                  # 8-byte Reload
	je	.LBB7_27
# %bb.24:
	cmpl	$34, %eax
	jne	.LBB7_28
# %bb.25:                               # %.critedge.i.i27
.Ltmp15:
	movl	$.L.str.33, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp16:
# %bb.26:
.LBB7_27:
	movl	%ebp, (%r14)
.LBB7_28:
.Ltmp17:
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	%ebx, %esi
	movq	8(%rsp), %rdx                   # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_ZN6Matrix7setSizeEjj
.Ltmp18:
# %bb.29:                               # %.preheader41
	testl	%ebx, %ebx
	je	.LBB7_40
# %bb.30:                               # %.preheader.lr.ph
	xorl	%ebp, %ebp
.LBB7_31:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_33 Depth 2
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	je	.LBB7_39
# %bb.32:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB7_31 Depth=1
	xorl	%r15d, %r15d
.LBB7_33:                               # %.lr.ph
                                        #   Parent Loop BB7_31 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	72(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
.Ltmp19:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp20:
# %bb.34:                               # %.noexc32
                                        #   in Loop: Header=BB7_33 Depth=2
.Ltmp21:
	movsbl	%al, %edx
	movq	%r12, %rdi
	leaq	40(%rsp), %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp22:
# %bb.35:                               # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit34
                                        #   in Loop: Header=BB7_33 Depth=2
	movq	40(%rsp), %rbx
	movl	(%r14), %r13d
	movl	$0, (%r14)
	movq	%rbx, %rdi
	leaq	16(%rsp), %rsi
	callq	strtod
	cmpq	%rbx, 16(%rsp)
	je	.LBB7_36
# %bb.47:                               #   in Loop: Header=BB7_33 Depth=2
	movl	(%r14), %eax
	testl	%eax, %eax
	je	.LBB7_51
# %bb.48:                               #   in Loop: Header=BB7_33 Depth=2
	cmpl	$34, %eax
	jne	.LBB7_52
	jmp	.LBB7_49
.LBB7_51:                               #   in Loop: Header=BB7_33 Depth=2
	movl	%r13d, (%r14)
.LBB7_52:                               #   in Loop: Header=BB7_33 Depth=2
.Ltmp25:
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp26:
# %bb.53:                               #   in Loop: Header=BB7_33 Depth=2
	incl	%r15d
	cmpl	%r15d, 8(%rsp)                  # 4-byte Folded Reload
	jne	.LBB7_33
.LBB7_39:                               # %._crit_edge
                                        #   in Loop: Header=BB7_31 Depth=1
	incl	%ebp
	cmpl	24(%rsp), %ebp                  # 4-byte Folded Reload
	jne	.LBB7_31
.LBB7_40:                               # %._crit_edge45
.Ltmp31:
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp32:
# %bb.41:
	movq	40(%rsp), %rdi
	leaq	56(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB7_43
# %bb.42:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB7_43:
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	addq	$648, %rsp                      # imm = 0x288
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB7_36:
	.cfi_def_cfa_offset 704
.Ltmp28:
	movl	$.L.str.35, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp29:
# %bb.44:
.LBB7_49:                               # %.critedge.i.i35
.Ltmp23:
	movl	$.L.str.35, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp24:
# %bb.50:
.LBB7_7:
.Ltmp37:
	movl	$.L.str.33, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp38:
# %bb.8:
.LBB7_20:
.Ltmp34:
	movl	$.L.str.33, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp35:
# %bb.21:
.LBB7_22:
.Ltmp36:
	jmp	.LBB7_10
.LBB7_9:
.Ltmp39:
.LBB7_10:
	movq	%rax, %rbx
	cmpl	$0, (%r14)
	jne	.LBB7_57
# %bb.11:
	movl	%ebp, (%r14)
	jmp	.LBB7_57
.LBB7_38:
.Ltmp33:
	jmp	.LBB7_56
.LBB7_37:
.Ltmp14:
	jmp	.LBB7_56
.LBB7_55:
.Ltmp7:
	jmp	.LBB7_56
.LBB7_59:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB7_60
.LBB7_45:
.Ltmp30:
	movq	%rax, %rbx
	cmpl	$0, (%r14)
	jne	.LBB7_57
# %bb.46:
	movl	%r13d, (%r14)
	jmp	.LBB7_57
.LBB7_54:
.Ltmp27:
.LBB7_56:                               # %.body
	movq	%rax, %rbx
.LBB7_57:                               # %.body
	movq	40(%rsp), %rdi
	leaq	56(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB7_60
# %bb.58:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i38
	callq	_ZdlPv
.LBB7_60:
	leaq	72(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end7:
	.size	_Z18loadMatrixFromFileR6Matrix, .Lfunc_end7-_Z18loadMatrixFromFileR6Matrix
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table7:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp39-.Lfunc_begin0          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp10-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp13-.Ltmp10                #   Call between .Ltmp10 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp36-.Lfunc_begin0          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp26-.Ltmp19                #   Call between .Ltmp19 and .Ltmp26
	.uleb128 .Ltmp27-.Lfunc_begin0          #     jumps to .Ltmp27
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp31-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp32-.Ltmp31                #   Call between .Ltmp31 and .Ltmp32
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp28-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp24-.Ltmp28                #   Call between .Ltmp28 and .Ltmp24
	.uleb128 .Ltmp30-.Lfunc_begin0          #     jumps to .Ltmp30
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp37-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp38-.Ltmp37                #   Call between .Ltmp37 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin0          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp35-.Ltmp34                #   Call between .Ltmp34 and .Ltmp35
	.uleb128 .Ltmp36-.Lfunc_begin0          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Lfunc_end7-.Ltmp35            #   Call between .Ltmp35 and .Lfunc_end7
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN6Matrix7setSizeEjj
.LCPI8_0:
	.quad	0x3ff0000000000000              # double 1
	.section	.text._ZN6Matrix7setSizeEjj,"axG",@progbits,_ZN6Matrix7setSizeEjj,comdat
	.weak	_ZN6Matrix7setSizeEjj
	.p2align	1, 0x90
	.type	_ZN6Matrix7setSizeEjj,@function
_ZN6Matrix7setSizeEjj:                  # @_ZN6Matrix7setSizeEjj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	movl	(%rdi), %eax
	testl	%eax, %eax
	je	.LBB8_5
# %bb.1:                                # %.lr.ph
	xorl	%r15d, %r15d
.LBB8_2:                                # =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rcx
	movq	(%rcx,%r15,8), %rdi
	testq	%rdi, %rdi
	je	.LBB8_4
# %bb.3:                                #   in Loop: Header=BB8_2 Depth=1
	callq	_ZdaPv
	movl	(%r14), %eax
.LBB8_4:                                #   in Loop: Header=BB8_2 Depth=1
	incq	%r15
	movl	%eax, %ecx
	cmpq	%rcx, %r15
	jb	.LBB8_2
.LBB8_5:                                # %._crit_edge
	movq	8(%r14), %rdi
	testq	%rdi, %rdi
	je	.LBB8_7
# %bb.6:
	callq	_ZdaPv
.LBB8_7:
	movl	%ebp, (%r14)
	movl	%ebx, 4(%r14)
	movl	%ebp, %r12d
	leaq	(,%r12,8), %rdi
	callq	_Znam
	movq	%rax, 8(%r14)
	testl	%ebp, %ebp
	je	.LBB8_15
# %bb.8:                                # %.lr.ph25
	movl	%ebx, %r13d
	leaq	(,%r13,8), %r15
	xorl	%ebp, %ebp
.LBB8_9:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_11 Depth 2
	movq	%r15, %rdi
	callq	_Znam
	movsd	.LCPI8_0(%rip), %xmm1           # xmm1 = mem[0],zero
	movq	8(%r14), %rcx
	movq	%rax, (%rcx,%rbp,8)
	testl	%ebx, %ebx
	je	.LBB8_14
# %bb.10:                               # %.lr.ph21
                                        #   in Loop: Header=BB8_9 Depth=1
	movq	8(%r14), %rax
	movq	(%rax,%rbp,8), %rax
	xorl	%ecx, %ecx
.LBB8_11:                               #   Parent Loop BB8_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movaps	%xmm1, %xmm0
	cmpq	%rcx, %rbp
	je	.LBB8_13
# %bb.12:                               #   in Loop: Header=BB8_11 Depth=2
	xorps	%xmm0, %xmm0
.LBB8_13:                               #   in Loop: Header=BB8_11 Depth=2
	movsd	%xmm0, (%rax,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %r13
	jne	.LBB8_11
.LBB8_14:                               # %._crit_edge22
                                        #   in Loop: Header=BB8_9 Depth=1
	incq	%rbp
	cmpq	%r12, %rbp
	jne	.LBB8_9
.LBB8_15:                               # %._crit_edge26
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZN6Matrix7setSizeEjj, .Lfunc_end8-_ZN6Matrix7setSizeEjj
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN6Matrix3setEjjd,"axG",@progbits,_ZN6Matrix3setEjjd,comdat
	.weak	_ZN6Matrix3setEjjd              # -- Begin function _ZN6Matrix3setEjjd
	.p2align	1, 0x90
	.type	_ZN6Matrix3setEjjd,@function
_ZN6Matrix3setEjjd:                     # @_ZN6Matrix3setEjjd
	.cfi_startproc
# %bb.0:
	cmpl	%esi, (%rdi)
	jbe	.LBB9_3
# %bb.1:
	cmpl	%edx, 4(%rdi)
	jbe	.LBB9_3
# %bb.2:
	movq	8(%rdi), %rax
	movl	%esi, %ecx
	movq	(%rax,%rcx,8), %rax
	movl	%edx, %ecx
	movsd	%xmm0, (%rax,%rcx,8)
	retq
.LBB9_3:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$8, %edi
	callq	__cxa_allocate_exception
	movq	$.L.str.34, (%rax)
	movl	$_ZTIPKc, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	__cxa_throw
.Lfunc_end9:
	.size	_ZN6Matrix3setEjjd, .Lfunc_end9-_ZN6Matrix3setEjjd
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_Z16saveMatrixToFileR6Matrix    # -- Begin function _Z16saveMatrixToFileR6Matrix
	.type	_Z16saveMatrixToFileR6Matrix,@function
_Z16saveMatrixToFileR6Matrix:           # @_Z16saveMatrixToFileR6Matrix
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$568, %rsp                      # imm = 0x238
	.cfi_def_cfa_offset 608
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rsp, %r14
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	leaq	56(%rsp), %r15
	movq	%r15, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp40:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode
.Ltmp41:
# %bb.1:
	movl	(%rbx), %esi
.Ltmp42:
	leaq	56(%rsp), %rdi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp43:
# %bb.2:                                # %_ZNSolsEj.exit
.Ltmp44:
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp45:
# %bb.3:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	4(%rbx), %esi
.Ltmp46:
	leaq	56(%rsp), %rdi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp47:
# %bb.4:                                # %_ZNSolsEj.exit16
.Ltmp48:
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp49:
# %bb.5:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit17.preheader
	movl	(%rbx), %eax
	testl	%eax, %eax
	je	.LBB10_15
# %bb.6:                                # %.preheader.preheader
	movl	4(%rbx), %ecx
	xorl	%ebp, %ebp
	leaq	56(%rsp), %r14
.LBB10_7:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB10_9 Depth 2
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB10_14
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB10_7 Depth=1
	xorl	%r15d, %r15d
.LBB10_9:                               # %.lr.ph
                                        #   Parent Loop BB10_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp50:
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp51:
# %bb.10:                               #   in Loop: Header=BB10_9 Depth=2
.Ltmp52:
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp53:
# %bb.11:                               # %_ZNSolsEd.exit
                                        #   in Loop: Header=BB10_9 Depth=2
.Ltmp54:
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp55:
# %bb.12:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit18
                                        #   in Loop: Header=BB10_9 Depth=2
	incl	%r15d
	movl	4(%rbx), %ecx
	cmpl	%ecx, %r15d
	jb	.LBB10_9
# %bb.13:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit17.loopexit
                                        #   in Loop: Header=BB10_7 Depth=1
	movl	(%rbx), %eax
.LBB10_14:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit17
                                        #   in Loop: Header=BB10_7 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jb	.LBB10_7
.LBB10_15:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit17._crit_edge
.Ltmp57:
	leaq	56(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv
.Ltmp58:
# %bb.16:
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	64(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 56(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	304(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	addq	$568, %rsp                      # imm = 0x238
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB10_18:
	.cfi_def_cfa_offset 608
.Ltmp59:
	jmp	.LBB10_19
.LBB10_17:
.Ltmp56:
.LBB10_19:
	movq	%rax, %rbx
	leaq	56(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end10:
	.size	_Z16saveMatrixToFileR6Matrix, .Lfunc_end10-_Z16saveMatrixToFileR6Matrix
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table10:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp40-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp40
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp49-.Ltmp40                #   Call between .Ltmp40 and .Ltmp49
	.uleb128 .Ltmp59-.Lfunc_begin1          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp55-.Ltmp50                #   Call between .Ltmp50 and .Ltmp55
	.uleb128 .Ltmp56-.Lfunc_begin1          #     jumps to .Ltmp56
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp58-.Ltmp57                #   Call between .Ltmp57 and .Ltmp58
	.uleb128 .Ltmp59-.Lfunc_begin1          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Lfunc_end10-.Ltmp58           #   Call between .Ltmp58 and .Lfunc_end10
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI11_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI11_1:
	.quad	0xbff0000000000000              # double -1
.LCPI11_2:
	.quad	0x4000000000000000              # double 2
.LCPI11_3:
	.quad	0x4008000000000000              # double 3
.LCPI11_4:
	.quad	0xc010000000000000              # double -4
.LCPI11_5:
	.quad	0x4014000000000000              # double 5
.LCPI11_7:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI11_8:
	.quad	0x0000000000000000              # double 0
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI11_6:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	8(%rsp), %rdi
	movl	$3, %esi
	movl	$3, %edx
	callq	_ZN6MatrixC2Ejj
.Ltmp60:
	leaq	64(%rsp), %rdi
	movl	$3, %esi
	movl	$3, %edx
	callq	_ZN6MatrixC2Ejj
.Ltmp61:
# %bb.1:                                # %.preheader417.preheader
	xorl	%ebx, %ebx
	leaq	8(%rsp), %r14
.LBB11_2:                               # %.preheader417
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_3 Depth 2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebx, %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
.LBB11_3:                               #   Parent Loop BB11_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp63:
	movq	%r14, %rdi
	movl	%ebx, %esi
	movl	%ebp, %edx
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZN6Matrix3setEjjd
.Ltmp64:
# %bb.4:                                #   in Loop: Header=BB11_3 Depth=2
	incl	%ebp
	cmpl	$3, %ebp
	jne	.LBB11_3
# %bb.5:                                #   in Loop: Header=BB11_2 Depth=1
	incl	%ebx
	cmpl	$3, %ebx
	jne	.LBB11_2
# %bb.6:
.Ltmp66:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp67:
# %bb.7:
.Ltmp68:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_1(%rip), %xmm0          # xmm0 = mem[0],zero
	xorl	%esi, %esi
	movl	$1, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp69:
# %bb.8:
.Ltmp70:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_2(%rip), %xmm0          # xmm0 = mem[0],zero
	xorl	%esi, %esi
	movl	$2, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp71:
# %bb.9:
.Ltmp72:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_3(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$1, %esi
	xorl	%edx, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp73:
# %bb.10:
.Ltmp74:
	leaq	8(%rsp), %rdi
	xorpd	%xmm0, %xmm0
	movl	$1, %esi
	movl	$1, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp75:
# %bb.11:
.Ltmp76:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_4(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$1, %esi
	movl	$2, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp77:
# %bb.12:
.Ltmp78:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_2(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$2, %esi
	xorl	%edx, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp79:
# %bb.13:
.Ltmp80:
	leaq	8(%rsp), %rdi
	movsd	.LCPI11_3(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$2, %esi
	movl	$1, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp81:
# %bb.14:
.Ltmp82:
	leaq	8(%rsp), %r14
	movsd	.LCPI11_5(%rip), %xmm0          # xmm0 = mem[0],zero
	movq	%r14, %rdi
	movl	$2, %esi
	movl	$2, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp83:
# %bb.15:                               # %.preheader415.preheader
	xorl	%ebp, %ebp
	leaq	64(%rsp), %r12
.LBB11_16:                              # %.preheader415
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_17 Depth 2
	xorl	%r15d, %r15d
.LBB11_17:                              #   Parent Loop BB11_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15d, %xmm0
.Ltmp85:
	movq	%r12, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp86:
# %bb.18:                               #   in Loop: Header=BB11_17 Depth=2
	incl	%r15d
	cmpl	$3, %r15d
	jne	.LBB11_17
# %bb.19:                               #   in Loop: Header=BB11_16 Depth=1
	incl	%ebp
	cmpl	$3, %ebp
	jne	.LBB11_16
# %bb.20:
	leaq	108(%rsp), %rax
	movl	$11, (%rax)
	leaq	88(%rsp), %r13
.LBB11_21:                              # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_120 Depth 2
                                        #     Child Loop BB11_130 Depth 2
                                        #       Child Loop BB11_132 Depth 3
                                        #         Child Loop BB11_134 Depth 4
                                        #           Child Loop BB11_135 Depth 5
                                        #         Child Loop BB11_157 Depth 4
                                        #     Child Loop BB11_177 Depth 2
                                        #       Child Loop BB11_179 Depth 3
                                        #     Child Loop BB11_47 Depth 2
                                        #       Child Loop BB11_49 Depth 3
                                        #     Child Loop BB11_72 Depth 2
                                        #       Child Loop BB11_74 Depth 3
                                        #     Child Loop BB11_106 Depth 2
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.Ltmp88:
	movl	$.L.str.5, %edi
	movq	%r14, %rsi
	callq	_Z14printMatrixCPUPKcRK6Matrix
.Ltmp89:
# %bb.22:                               #   in Loop: Header=BB11_21 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.Ltmp90:
	movl	$.L.str.5, %edi
	movq	%r12, %rsi
	callq	_Z14printMatrixCPUPKcRK6Matrix
.Ltmp91:
# %bb.23:                               #   in Loop: Header=BB11_21 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movl	$.Lstr.10, %edi
	callq	puts@PLT
	movl	$.Lstr.11, %edi
	callq	puts@PLT
.Ltmp92:
	movl	$.L.str.16, %edi
	leaq	108(%rsp), %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
.Ltmp93:
# %bb.24:                               #   in Loop: Header=BB11_21 Depth=1
.Ltmp94:
	movl	$.L.str.17, %edi
	callq	system
.Ltmp95:
# %bb.25:                               #   in Loop: Header=BB11_21 Depth=1
	movl	$0, 84(%rsp)
	movl	108(%rsp), %eax
	cmpq	$6, %rax
	ja	.LBB11_93
# %bb.26:                               #   in Loop: Header=BB11_21 Depth=1
	jmpq	*.LJTI11_0(,%rax,8)
.LBB11_27:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.Lstr.24, %edi
	callq	puts@PLT
.Ltmp247:
	movl	$.L.str.16, %edi
	leaq	84(%rsp), %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
.Ltmp248:
# %bb.28:                               # %.invoke520
                                        #   in Loop: Header=BB11_21 Depth=1
	cmpl	$1, 84(%rsp)
	movq	%r12, %rdi
	cmoveq	%r14, %rdi
.Ltmp249:
	callq	_Z18loadMatrixFromFileR6Matrix
.Ltmp250:
	jmp	.LBB11_185
.LBB11_29:                              #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %eax
	cmpl	64(%rsp), %eax
	jne	.LBB11_92
# %bb.30:                               #   in Loop: Header=BB11_21 Depth=1
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rax, 32(%rsp)
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp146:
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp147:
# %bb.31:                               #   in Loop: Header=BB11_21 Depth=1
	movl	68(%rsp), %eax
	imull	64(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp148:
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp149:
# %bb.32:                               #   in Loop: Header=BB11_21 Depth=1
	movl	68(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp150:
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp151:
# %bb.33:                               #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
.Ltmp152:
	movq	%r14, %rsi
	callq	_Z15copyMatrixToGPUPvRK6Matrix
.Ltmp153:
# %bb.34:                               #   in Loop: Header=BB11_21 Depth=1
	movq	48(%rsp), %rdi
.Ltmp154:
	movq	%r12, %rsi
	callq	_Z15copyMatrixToGPUPvRK6Matrix
.Ltmp155:
# %bb.35:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movl	8(%rsp), %eax
	movq	32(%rsp), %rcx
	movl	%eax, (%rcx)
	movl	68(%rsp), %eax
	movl	%eax, 4(%rcx)
.Ltmp157:
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp158:
# %bb.36:                               #   in Loop: Header=BB11_21 Depth=1
	testl	%eax, %eax
	jne	.LBB11_38
# %bb.37:                               #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
.Ltmp159:
	callq	_Z18__device_stub__mulPvS_S_
.Ltmp160:
.LBB11_38:                              #   in Loop: Header=BB11_21 Depth=1
.Ltmp161:
	callq	hipDeviceSynchronize
.Ltmp162:
# %bb.39:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rcx
	subq	%r15, %rcx
	cvtsi2sd	%rcx, %xmm1
	movsd	.LCPI11_7(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	subq	%r12, %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 56(%rsp)                 # 8-byte Spill
	movl	$.Lstr.18, %edi
	callq	puts@PLT
	movq	32(%rsp), %rsi
	movl	$.L.str.5, %edi
	callq	_Z14printMatrixGPUPKcPv
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.22, %edi
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.23, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movq	24(%rsp), %rdi
.Ltmp164:
	callq	hipFree
.Ltmp165:
# %bb.40:                               #   in Loop: Header=BB11_21 Depth=1
	movq	48(%rsp), %rdi
.Ltmp166:
	callq	hipFree
.Ltmp167:
# %bb.41:                               #   in Loop: Header=BB11_21 Depth=1
	movq	32(%rsp), %rdi
.Ltmp168:
	callq	hipFree
.Ltmp169:
# %bb.42:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
.Ltmp171:
	movq	%r13, %rdi
	movq	%r14, %rsi
	leaq	64(%rsp), %rdx
	callq	_ZNK6MatrixmlERKS_
.Ltmp172:
# %bb.43:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movl	$.Lstr.22, %edi
	callq	puts@PLT
.Ltmp174:
	movl	$.L.str.5, %edi
	movq	%r13, %rsi
	callq	_Z14printMatrixCPUPKcRK6Matrix
.Ltmp175:
# %bb.44:                               #   in Loop: Header=BB11_21 Depth=1
	subq	%r15, %r12
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12, %xmm0
	divsd	.LCPI11_7(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.25, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movl	88(%rsp), %esi
	movl	92(%rsp), %edx
.Ltmp176:
	movq	%r14, %rdi
	callq	_ZN6Matrix7setSizeEjj
.Ltmp177:
# %bb.45:                               # %.preheader412
                                        #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	testl	%eax, %eax
	leaq	64(%rsp), %r12
	je	.LBB11_184
# %bb.46:                               # %.preheader407.preheader
                                        #   in Loop: Header=BB11_21 Depth=1
	xorl	%ebp, %ebp
	movl	12(%rsp), %ecx
.LBB11_47:                              # %.preheader407
                                        #   Parent Loop BB11_21 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB11_49 Depth 3
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB11_53
# %bb.48:                               # %.lr.ph444.preheader
                                        #   in Loop: Header=BB11_47 Depth=2
	xorl	%r15d, %r15d
.LBB11_49:                              # %.lr.ph444
                                        #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_47 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp179:
	movq	%r13, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp180:
# %bb.50:                               #   in Loop: Header=BB11_49 Depth=3
.Ltmp181:
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp182:
# %bb.51:                               #   in Loop: Header=BB11_49 Depth=3
	incl	%r15d
	movl	12(%rsp), %ecx
	cmpl	%ecx, %r15d
	jb	.LBB11_49
# %bb.52:                               # %._crit_edge445.loopexit
                                        #   in Loop: Header=BB11_47 Depth=2
	movl	8(%rsp), %eax
.LBB11_53:                              # %._crit_edge445
                                        #   in Loop: Header=BB11_47 Depth=2
	incl	%ebp
	cmpl	%eax, %ebp
	jb	.LBB11_47
	jmp	.LBB11_184
.LBB11_54:                              #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	cmpl	64(%rsp), %eax
	jne	.LBB11_94
# %bb.55:                               #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %eax
	cmpl	68(%rsp), %eax
	jne	.LBB11_94
# %bb.56:                               #   in Loop: Header=BB11_21 Depth=1
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 48(%rsp)
	movq	%rax, 32(%rsp)
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp184:
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp185:
# %bb.57:                               #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp186:
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp187:
# %bb.58:                               #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp188:
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp189:
# %bb.59:                               #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
.Ltmp190:
	movq	%r14, %rsi
	callq	_Z15copyMatrixToGPUPvRK6Matrix
.Ltmp191:
# %bb.60:                               #   in Loop: Header=BB11_21 Depth=1
	movq	48(%rsp), %rdi
.Ltmp192:
	movq	%r12, %rsi
	callq	_Z15copyMatrixToGPUPvRK6Matrix
.Ltmp193:
# %bb.61:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movl	8(%rsp), %eax
	movq	32(%rsp), %rcx
	movl	%eax, (%rcx)
	movl	12(%rsp), %eax
	movl	%eax, 4(%rcx)
.Ltmp195:
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp196:
# %bb.62:                               #   in Loop: Header=BB11_21 Depth=1
	testl	%eax, %eax
	jne	.LBB11_64
# %bb.63:                               #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdx
.Ltmp197:
	callq	_Z18__device_stub__addPvS_S_
.Ltmp198:
.LBB11_64:                              #   in Loop: Header=BB11_21 Depth=1
.Ltmp199:
	callq	hipDeviceSynchronize
.Ltmp200:
# %bb.65:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rcx
	subq	%r15, %rcx
	cvtsi2sd	%rcx, %xmm1
	movsd	.LCPI11_7(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	subq	%r12, %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 56(%rsp)                 # 8-byte Spill
	movl	$.Lstr.18, %edi
	callq	puts@PLT
	movq	32(%rsp), %rsi
	movl	$.L.str.5, %edi
	callq	_Z14printMatrixGPUPKcPv
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.22, %edi
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.23, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movq	24(%rsp), %rdi
.Ltmp202:
	callq	hipFree
.Ltmp203:
# %bb.66:                               #   in Loop: Header=BB11_21 Depth=1
	movq	48(%rsp), %rdi
.Ltmp204:
	callq	hipFree
.Ltmp205:
# %bb.67:                               #   in Loop: Header=BB11_21 Depth=1
	movq	32(%rsp), %rdi
.Ltmp206:
	callq	hipFree
.Ltmp207:
# %bb.68:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
.Ltmp209:
	movq	%r13, %rdi
	movq	%r14, %rsi
	leaq	64(%rsp), %rdx
	callq	_ZNK6MatrixplERKS_
.Ltmp210:
# %bb.69:                               #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movl	$.Lstr.22, %edi
	callq	puts@PLT
.Ltmp212:
	movl	$.L.str.5, %edi
	movq	%r13, %rsi
	callq	_Z14printMatrixCPUPKcRK6Matrix
.Ltmp213:
# %bb.70:                               #   in Loop: Header=BB11_21 Depth=1
	subq	%r15, %r12
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12, %xmm0
	divsd	.LCPI11_7(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.25, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movl	8(%rsp), %eax
	testl	%eax, %eax
	leaq	64(%rsp), %r12
	je	.LBB11_184
# %bb.71:                               # %.preheader406.preheader
                                        #   in Loop: Header=BB11_21 Depth=1
	xorl	%ebp, %ebp
	movl	12(%rsp), %ecx
.LBB11_72:                              # %.preheader406
                                        #   Parent Loop BB11_21 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB11_74 Depth 3
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB11_78
# %bb.73:                               # %.lr.ph449.preheader
                                        #   in Loop: Header=BB11_72 Depth=2
	xorl	%r15d, %r15d
.LBB11_74:                              # %.lr.ph449
                                        #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_72 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp215:
	movq	%r13, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp216:
# %bb.75:                               #   in Loop: Header=BB11_74 Depth=3
.Ltmp217:
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp218:
# %bb.76:                               #   in Loop: Header=BB11_74 Depth=3
	incl	%r15d
	movl	12(%rsp), %ecx
	cmpl	%ecx, %r15d
	jb	.LBB11_74
# %bb.77:                               # %._crit_edge450.loopexit
                                        #   in Loop: Header=BB11_72 Depth=2
	movl	8(%rsp), %eax
.LBB11_78:                              # %._crit_edge450
                                        #   in Loop: Header=BB11_72 Depth=2
	incl	%ebp
	cmpl	%eax, %ebp
	jb	.LBB11_72
	jmp	.LBB11_184
.LBB11_79:                              #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	cmpl	12(%rsp), %eax
	jne	.LBB11_96
# %bb.80:                               #   in Loop: Header=BB11_21 Depth=1
	movq	$0, 88(%rsp)
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp220:
	movq	%r13, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp221:
# %bb.81:                               #   in Loop: Header=BB11_21 Depth=1
	movq	88(%rsp), %rdi
.Ltmp222:
	movq	%r14, %rsi
	callq	_Z15copyMatrixToGPUPvRK6Matrix
.Ltmp223:
# %bb.82:                               #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	decl	%eax
	cmpl	$6, %eax
	jae	.LBB11_98
# %bb.83:                               # %switch.lookup
                                        #   in Loop: Header=BB11_21 Depth=1
	movl	%eax, %eax
	movl	.Lswitch.table.main.29(,%rax,4), %ebp
	movl	.Lswitch.table.main.28(,%rax,4), %r14d
	jmp	.LBB11_99
.LBB11_84:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.Lstr.24, %edi
	callq	puts@PLT
.Ltmp243:
	movl	$.L.str.16, %edi
	leaq	84(%rsp), %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
.Ltmp244:
# %bb.85:                               # %.invoke
                                        #   in Loop: Header=BB11_21 Depth=1
	cmpl	$1, 84(%rsp)
	movq	%r12, %rdi
	cmoveq	%r14, %rdi
.Ltmp245:
	callq	_Z16saveMatrixToFileR6Matrix
.Ltmp246:
	jmp	.LBB11_185
.LBB11_86:                              #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %eax
	cmpl	8(%rsp), %eax
	jne	.LBB11_92
# %bb.87:                               #   in Loop: Header=BB11_21 Depth=1
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 48(%rsp)
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 128(%rsp)                 # 8-byte Spill
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp97:
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp98:
# %bb.88:                               #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	leaq	8(,%rax,8), %rsi
.Ltmp99:
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp100:
# %bb.89:                               #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
.Ltmp101:
	movq	%r14, %rsi
	callq	_Z15copyMatrixToGPUPvRK6Matrix
.Ltmp102:
# %bb.90:                               #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	decl	%eax
	cmpl	$6, %eax
	jae	.LBB11_112
# %bb.91:                               # %switch.lookup530
                                        #   in Loop: Header=BB11_21 Depth=1
	movl	%eax, %eax
	movl	.Lswitch.table.main.28(,%rax,4), %r14d
	movl	.Lswitch.table.main.29(,%rax,4), %ebp
	jmp	.LBB11_113
.LBB11_92:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.Lstr.17, %edi
	jmp	.LBB11_95
.LBB11_93:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.L.str.31, %edi
	jmp	.LBB11_97
.LBB11_94:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.Lstr.20, %edi
.LBB11_95:                              #   in Loop: Header=BB11_21 Depth=1
	callq	puts@PLT
	jmp	.LBB11_185
.LBB11_96:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.L.str.19, %edi
.LBB11_97:                              #   in Loop: Header=BB11_21 Depth=1
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB11_185
.LBB11_98:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$16, %r14d
	movl	$256, %ebp                      # imm = 0x100
.LBB11_99:                              #   in Loop: Header=BB11_21 Depth=1
	movq	$0, 24(%rsp)
	movl	%ebp, %ebx
	imull	%r14d, %ebx
	leal	(,%rbx,8), %esi
.Ltmp225:
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp226:
# %bb.100:                              # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit.preheader
                                        #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
	leaq	(,%rbx,8), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	cmpl	$1, 8(%rsp)
	jbe	.LBB11_107
# %bb.101:                              #   in Loop: Header=BB11_21 Depth=1
	movl	%r14d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	%ebp, %edx
	orq	%rax, %rdx
.Ltmp228:
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp229:
# %bb.102:                              #   in Loop: Header=BB11_21 Depth=1
	testl	%eax, %eax
	jne	.LBB11_104
# %bb.103:                              #   in Loop: Header=BB11_21 Depth=1
	movq	88(%rsp), %rdi
	movq	24(%rsp), %rsi
.Ltmp230:
	callq	_Z24__device_stub__detHelperPvPd
.Ltmp231:
.LBB11_104:                             #   in Loop: Header=BB11_21 Depth=1
.Ltmp232:
	callq	hipDeviceSynchronize
.Ltmp233:
# %bb.105:                              # %.preheader410
                                        #   in Loop: Header=BB11_21 Depth=1
	xorpd	%xmm0, %xmm0
	movq	24(%rsp), %rax
	xorl	%ecx, %ecx
	leaq	8(%rsp), %r14
.LBB11_106:                             #   Parent Loop BB11_21 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addsd	(%rax,%rcx,8), %xmm0
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB11_106
	jmp	.LBB11_108
.LBB11_107:                             #   in Loop: Header=BB11_21 Depth=1
	movq	88(%rsp), %rax
	movsd	8(%rax), %xmm0                  # xmm0 = mem[0],zero
	leaq	8(%rsp), %r14
.LBB11_108:                             # %.loopexit411
                                        #   in Loop: Header=BB11_21 Depth=1
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rcx
	subq	%r15, %rcx
	cvtsi2sd	%rcx, %xmm1
	movsd	.LCPI11_7(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 40(%rsp)                 # 8-byte Spill
	subq	%r12, %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 120(%rsp)                # 8-byte Spill
	movl	$.Lstr.21, %edi
	callq	puts@PLT
	movl	$.L.str.21, %edi
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.22, %edi
	movsd	120(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.23, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movq	88(%rsp), %rdi
.Ltmp235:
	callq	hipFree
.Ltmp236:
# %bb.109:                              #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
.Ltmp237:
	callq	hipFree
.Ltmp238:
# %bb.110:                              #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
.Ltmp240:
	movq	%r14, %rdi
	callq	_ZN6Matrix3detEv
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
.Ltmp241:
	leaq	64(%rsp), %r12
# %bb.111:                              #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI11_7(%rip), %xmm0
	movsd	%xmm0, 56(%rsp)                 # 8-byte Spill
	movl	$.Lstr.22, %edi
	callq	puts@PLT
	movl	$.L.str.21, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$.L.str.25, %edi
	movsd	56(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	jmp	.LBB11_185
.LBB11_112:                             #   in Loop: Header=BB11_21 Depth=1
	movl	$256, %ebp                      # imm = 0x100
	movl	$16, %r14d
.LBB11_113:                             #   in Loop: Header=BB11_21 Depth=1
	movq	$0, 32(%rsp)
	movl	%r14d, %ebx
	imull	%ebp, %ebx
	leal	(,%rbx,8), %esi
.Ltmp104:
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp105:
# %bb.114:                              # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit326.preheader
                                        #   in Loop: Header=BB11_21 Depth=1
	movq	32(%rsp), %rdi
	leaq	(,%rbx,8), %rdx
	xorl	%esi, %esi
	movq	%rdx, 136(%rsp)                 # 8-byte Spill
	callq	memset@PLT
	cmpl	$1, 12(%rsp)
	jbe	.LBB11_121
# %bb.115:                              #   in Loop: Header=BB11_21 Depth=1
	movl	%r14d, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	%ebp, %edx
	orq	%rax, %rdx
.Ltmp107:
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp108:
# %bb.116:                              #   in Loop: Header=BB11_21 Depth=1
	testl	%eax, %eax
	jne	.LBB11_118
# %bb.117:                              #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
.Ltmp109:
	callq	_Z24__device_stub__detHelperPvPd
.Ltmp110:
.LBB11_118:                             #   in Loop: Header=BB11_21 Depth=1
.Ltmp111:
	callq	hipDeviceSynchronize
.Ltmp112:
# %bb.119:                              # %.preheader413
                                        #   in Loop: Header=BB11_21 Depth=1
	xorpd	%xmm0, %xmm0
	movq	32(%rsp), %rax
	xorl	%ecx, %ecx
	leaq	8(%rsp), %r14
.LBB11_120:                             #   Parent Loop BB11_21 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addsd	(%rax,%rcx,8), %xmm0
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB11_120
	jmp	.LBB11_122
.LBB11_121:                             #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rax
	movsd	8(%rax), %xmm0                  # xmm0 = mem[0],zero
	leaq	8(%rsp), %r14
.LBB11_122:                             # %.loopexit414
                                        #   in Loop: Header=BB11_21 Depth=1
	movl	$.L.str.29, %edi
	movsd	%xmm0, 112(%rsp)                # 8-byte Spill
	movb	$1, %al
	callq	printf
	movsd	112(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI11_8(%rip), %xmm0
	jne	.LBB11_124
	jp	.LBB11_124
# %bb.123:                              #   in Loop: Header=BB11_21 Depth=1
	movl	$.L.str.30, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB11_169
.LBB11_124:                             #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	movq	48(%rsp), %rdx
	movl	%eax, (%rdx)
	movl	12(%rsp), %ecx
	movl	%ecx, 4(%rdx)
	testl	%eax, %eax
	je	.LBB11_168
# %bb.125:                              #   in Loop: Header=BB11_21 Depth=1
	cmpl	$1, %eax
	jne	.LBB11_127
# %bb.126:                              #   in Loop: Header=BB11_21 Depth=1
	movsd	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	112(%rsp), %xmm0                # 8-byte Folded Reload
	movsd	%xmm0, 8(%rdx)
	jmp	.LBB11_168
.LBB11_127:                             #   in Loop: Header=BB11_21 Depth=1
	movq	$0, 88(%rsp)
	decl	%eax
	decl	%ecx
	imull	%eax, %ecx
	leaq	8(,%rcx,8), %rsi
.Ltmp114:
	movq	%r13, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp115:
# %bb.128:                              #   in Loop: Header=BB11_21 Depth=1
	movl	8(%rsp), %eax
	decl	%eax
	movq	88(%rsp), %rcx
	movl	%eax, (%rcx)
	movl	12(%rsp), %eax
	decl	%eax
	movl	%eax, 4(%rcx)
	movl	8(%rsp), %eax
	testl	%eax, %eax
	je	.LBB11_166
# %bb.129:                              # %.preheader409.preheader
                                        #   in Loop: Header=BB11_21 Depth=1
	movl	12(%rsp), %ebx
	movl	%ebx, %r15d
	movl	%ebx, %r14d
	xorl	%ebp, %ebp
.LBB11_130:                             # %.preheader409
                                        #   Parent Loop BB11_21 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB11_132 Depth 3
                                        #         Child Loop BB11_134 Depth 4
                                        #           Child Loop BB11_135 Depth 5
                                        #         Child Loop BB11_157 Depth 4
	testl	%r14d, %r14d
	je	.LBB11_164
# %bb.131:                              # %.preheader405.lr.ph
                                        #   in Loop: Header=BB11_130 Depth=2
	movq	32(%rsp), %rdi
	xorl	%r12d, %r12d
.LBB11_132:                             # %.preheader405
                                        #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_130 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB11_134 Depth 4
                                        #           Child Loop BB11_135 Depth 5
                                        #         Child Loop BB11_157 Depth 4
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	xorl	%esi, %esi
	movq	136(%rsp), %rdx                 # 8-byte Reload
	callq	memset@PLT
	movl	8(%rsp), %eax
	movl	$256, %r13d                     # imm = 0x100
	movl	$16, 56(%rsp)                   # 4-byte Folded Spill
	testq	%rax, %rax
	je	.LBB11_151
# %bb.133:                              # %.preheader.lr.ph
                                        #   in Loop: Header=BB11_132 Depth=3
	movq	%r15, 144(%rsp)                 # 8-byte Spill
	movl	%ebx, 120(%rsp)                 # 4-byte Spill
	leal	-1(%r14), %ecx
	movl	$1, %edx
	subl	%r14d, %edx
	xorl	%esi, %esi
	xorl	%edi, %edi
	xorl	%r8d, %r8d
.LBB11_134:                             # %.preheader
                                        #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_130 Depth=2
                                        #       Parent Loop BB11_132 Depth=3
                                        # =>      This Loop Header: Depth=4
                                        #           Child Loop BB11_135 Depth 5
	movl	%edi, %r9d
	movl	%esi, %r10d
	movl	%edx, %r11d
	movq	24(%rsp), %r15
	movq	88(%rsp), %rbx
	leaq	(%r15,%r9,8), %r9
	addq	$8, %r9
	leaq	(%rbx,%r10,8), %r10
	addq	$8, %r10
	leaq	(%rbx,%r11,8), %r11
	addq	$8, %r11
	xorl	%r15d, %r15d
.LBB11_135:                             #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_130 Depth=2
                                        #       Parent Loop BB11_132 Depth=3
                                        #         Parent Loop BB11_134 Depth=4
                                        # =>        This Inner Loop Header: Depth=5
	cmpq	%rbp, %r8
	jae	.LBB11_138
# %bb.136:                              #   in Loop: Header=BB11_135 Depth=5
	cmpq	%r12, %r15
	jae	.LBB11_138
# %bb.137:                              #   in Loop: Header=BB11_135 Depth=5
	movsd	(%r9,%r15,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, (%r10,%r15,8)
.LBB11_138:                             #   in Loop: Header=BB11_135 Depth=5
	cmpq	%rbp, %r8
	jae	.LBB11_141
# %bb.139:                              #   in Loop: Header=BB11_135 Depth=5
	cmpq	%r12, %r15
	jbe	.LBB11_141
# %bb.140:                              #   in Loop: Header=BB11_135 Depth=5
	movsd	(%r9,%r15,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, -8(%r10,%r15,8)
.LBB11_141:                             #   in Loop: Header=BB11_135 Depth=5
	cmpq	%rbp, %r8
	jbe	.LBB11_144
# %bb.142:                              #   in Loop: Header=BB11_135 Depth=5
	cmpq	%r12, %r15
	jae	.LBB11_144
# %bb.143:                              #   in Loop: Header=BB11_135 Depth=5
	movsd	(%r9,%r15,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, (%r11,%r15,8)
.LBB11_144:                             #   in Loop: Header=BB11_135 Depth=5
	cmpq	%rbp, %r8
	jbe	.LBB11_147
# %bb.145:                              #   in Loop: Header=BB11_135 Depth=5
	cmpq	%r12, %r15
	jbe	.LBB11_147
# %bb.146:                              #   in Loop: Header=BB11_135 Depth=5
	movsd	(%r9,%r15,8), %xmm0             # xmm0 = mem[0],zero
	movsd	%xmm0, -8(%r11,%r15,8)
.LBB11_147:                             #   in Loop: Header=BB11_135 Depth=5
	incq	%r15
	cmpq	%r15, %rax
	jne	.LBB11_135
# %bb.148:                              #   in Loop: Header=BB11_134 Depth=4
	incq	%r8
	addl	%r14d, %edi
	addl	%ecx, %esi
	addl	%ecx, %edx
	cmpq	%rax, %r8
	jne	.LBB11_134
# %bb.149:                              # %._crit_edge
                                        #   in Loop: Header=BB11_132 Depth=3
	addl	$-2, %eax
	cmpl	$6, %eax
	movl	120(%rsp), %ebx                 # 4-byte Reload
	movq	144(%rsp), %r15                 # 8-byte Reload
	jae	.LBB11_151
# %bb.150:                              # %switch.lookup536
                                        #   in Loop: Header=BB11_132 Depth=3
	movl	%eax, %eax
	movl	.Lswitch.table.main.28(,%rax,4), %ecx
	movl	%ecx, 56(%rsp)                  # 4-byte Spill
	movl	.Lswitch.table.main.29(,%rax,4), %r13d
.LBB11_151:                             # %._crit_edge.thread
                                        #   in Loop: Header=BB11_132 Depth=3
	addl	$-3, %r14d
	cmpl	$-3, %r14d
	movq	40(%rsp), %rdi                  # 8-byte Reload
	ja	.LBB11_159
# %bb.152:                              #   in Loop: Header=BB11_132 Depth=3
	movl	56(%rsp), %ebx                  # 4-byte Reload
	movl	%ebx, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	%r13d, %edx
	orq	%rax, %rdx
.Ltmp116:
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp117:
# %bb.153:                              #   in Loop: Header=BB11_132 Depth=3
	testl	%eax, %eax
	jne	.LBB11_155
# %bb.154:                              #   in Loop: Header=BB11_132 Depth=3
	movq	88(%rsp), %rdi
	movq	32(%rsp), %rsi
.Ltmp118:
	callq	_Z24__device_stub__detHelperPvPd
.Ltmp119:
.LBB11_155:                             #   in Loop: Header=BB11_132 Depth=3
.Ltmp120:
	callq	hipDeviceSynchronize
.Ltmp121:
# %bb.156:                              # %.preheader403
                                        #   in Loop: Header=BB11_132 Depth=3
	imull	%ebx, %r13d
	movq	32(%rsp), %rdi
	xorpd	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB11_157:                             #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_130 Depth=2
                                        #       Parent Loop BB11_132 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	addsd	(%rdi,%rax,8), %xmm0
	incq	%rax
	cmpq	%rax, %r13
	jne	.LBB11_157
# %bb.158:                              # %.loopexit.loopexit
                                        #   in Loop: Header=BB11_132 Depth=3
	movl	12(%rsp), %ebx
	movl	%ebx, %r15d
	jmp	.LBB11_160
.LBB11_159:                             #   in Loop: Header=BB11_132 Depth=3
	movq	88(%rsp), %rax
	movsd	8(%rax), %xmm0                  # xmm0 = mem[0],zero
.LBB11_160:                             # %.loopexit
                                        #   in Loop: Header=BB11_132 Depth=3
	leal	(%r12,%rbp), %eax
	testb	$1, %al
	je	.LBB11_162
# %bb.161:                              # %.loopexit
                                        #   in Loop: Header=BB11_132 Depth=3
	xorpd	.LCPI11_6(%rip), %xmm0
.LBB11_162:                             # %.loopexit
                                        #   in Loop: Header=BB11_132 Depth=3
	divsd	112(%rsp), %xmm0                # 8-byte Folded Reload
	imull	%r12d, %r15d
	shlq	$3, %r15
	addq	48(%rsp), %r15
	movsd	%xmm0, 8(%r15,%rbp,8)
	incq	%r12
	movl	%ebx, %eax
	movl	%ebx, %r15d
	movl	%ebx, %r14d
	cmpq	%rax, %r12
	jb	.LBB11_132
# %bb.163:                              # %._crit_edge436.loopexit
                                        #   in Loop: Header=BB11_130 Depth=2
	movl	8(%rsp), %eax
	movl	%ebx, %r15d
	movl	%ebx, %r14d
	leaq	64(%rsp), %r12
	leaq	88(%rsp), %r13
	jmp	.LBB11_165
.LBB11_164:                             #   in Loop: Header=BB11_130 Depth=2
	xorl	%r14d, %r14d
.LBB11_165:                             # %._crit_edge436
                                        #   in Loop: Header=BB11_130 Depth=2
	incq	%rbp
	movl	%eax, %ecx
	cmpq	%rcx, %rbp
	jb	.LBB11_130
.LBB11_166:                             # %._crit_edge438
                                        #   in Loop: Header=BB11_21 Depth=1
	movq	88(%rsp), %rdi
.Ltmp123:
	callq	hipFree
.Ltmp124:
# %bb.167:                              #   in Loop: Header=BB11_21 Depth=1
	leaq	8(%rsp), %r14
.LBB11_168:                             #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	128(%rsp), %rax                 # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI11_7(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$.Lstr.18, %edi
	callq	puts@PLT
	movq	48(%rsp), %rsi
	movl	$.L.str.5, %edi
	callq	_Z14printMatrixGPUPKcPv
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.22, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
.LBB11_169:                             #   in Loop: Header=BB11_21 Depth=1
	movq	32(%rsp), %rdi
.Ltmp126:
	callq	hipFree
.Ltmp127:
# %bb.170:                              #   in Loop: Header=BB11_21 Depth=1
	movq	48(%rsp), %rdi
.Ltmp128:
	callq	hipFree
.Ltmp129:
# %bb.171:                              #   in Loop: Header=BB11_21 Depth=1
	movq	24(%rsp), %rdi
.Ltmp130:
	callq	hipFree
.Ltmp131:
# %bb.172:                              #   in Loop: Header=BB11_21 Depth=1
	movsd	112(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	ucomisd	.LCPI11_8(%rip), %xmm0
	jne	.LBB11_173
	jnp	.LBB11_185
.LBB11_173:                             #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
.Ltmp132:
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	_ZN6Matrix7inverseEv
.Ltmp133:
# %bb.174:                              #   in Loop: Header=BB11_21 Depth=1
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movl	$.Lstr.22, %edi
	callq	puts@PLT
.Ltmp135:
	movl	$.L.str.5, %edi
	movq	%r13, %rsi
	callq	_Z14printMatrixCPUPKcRK6Matrix
.Ltmp136:
# %bb.175:                              #   in Loop: Header=BB11_21 Depth=1
	subq	%r15, %r12
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r12, %xmm0
	divsd	.LCPI11_7(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movl	$10, %edi
	callq	putchar@PLT
	movl	$.L.str.25, %edi
	movsd	40(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	movl	8(%rsp), %eax
	testl	%eax, %eax
	leaq	64(%rsp), %r12
	je	.LBB11_184
# %bb.176:                              # %.preheader408.preheader
                                        #   in Loop: Header=BB11_21 Depth=1
	xorl	%ebp, %ebp
	movl	12(%rsp), %ecx
.LBB11_177:                             # %.preheader408
                                        #   Parent Loop BB11_21 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB11_179 Depth 3
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB11_183
# %bb.178:                              # %.lr.ph.preheader
                                        #   in Loop: Header=BB11_177 Depth=2
	xorl	%r15d, %r15d
.LBB11_179:                             # %.lr.ph
                                        #   Parent Loop BB11_21 Depth=1
                                        #     Parent Loop BB11_177 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp138:
	movq	%r13, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp139:
# %bb.180:                              #   in Loop: Header=BB11_179 Depth=3
.Ltmp140:
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp141:
# %bb.181:                              #   in Loop: Header=BB11_179 Depth=3
	incl	%r15d
	movl	12(%rsp), %ecx
	cmpl	%ecx, %r15d
	jb	.LBB11_179
# %bb.182:                              # %._crit_edge440.loopexit
                                        #   in Loop: Header=BB11_177 Depth=2
	movl	8(%rsp), %eax
.LBB11_183:                             # %._crit_edge440
                                        #   in Loop: Header=BB11_177 Depth=2
	incl	%ebp
	cmpl	%eax, %ebp
	jb	.LBB11_177
.LBB11_184:                             # %._crit_edge452
                                        #   in Loop: Header=BB11_21 Depth=1
	movq	%r13, %rdi
	callq	_ZN6MatrixD2Ev
.LBB11_185:                             #   in Loop: Header=BB11_21 Depth=1
	cmpl	$0, 108(%rsp)
	jne	.LBB11_21
	jmp	.LBB11_191
.LBB11_186:                             #   in Loop: Header=BB11_21 Depth=1
.Ltmp137:
	movq	%rax, %r15
	leaq	64(%rsp), %r12
	jmp	.LBB11_189
.LBB11_187:                             #   in Loop: Header=BB11_21 Depth=1
.Ltmp134:
	movq	%rax, %r15
	leaq	64(%rsp), %r12
	jmp	.LBB11_190
.LBB11_188:                             #   in Loop: Header=BB11_21 Depth=1
.Ltmp142:
	movq	%rax, %r15
.LBB11_189:                             #   in Loop: Header=BB11_21 Depth=1
	movq	%r13, %rdi
	callq	_ZN6MatrixD2Ev
.LBB11_190:                             #   in Loop: Header=BB11_21 Depth=1
	movq	%r15, %rdi
	callq	__cxa_begin_catch
.Ltmp143:
	callq	__cxa_end_catch
.Ltmp144:
	jmp	.LBB11_185
.LBB11_191:
	leaq	64(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	leaq	8(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB11_192:
	.cfi_def_cfa_offset 208
	xorl	%edi, %edi
	callq	exit
.LBB11_193:
.Ltmp125:
	jmp	.LBB11_221
.LBB11_194:
.Ltmp62:
	movq	%rax, %rbx
	jmp	.LBB11_225
.LBB11_195:
.Ltmp214:
	jmp	.LBB11_223
.LBB11_196:
.Ltmp211:
	jmp	.LBB11_221
.LBB11_197:
.Ltmp242:
	jmp	.LBB11_221
.LBB11_198:
.Ltmp227:
	jmp	.LBB11_221
.LBB11_199:
.Ltmp106:
	jmp	.LBB11_221
.LBB11_200:
.Ltmp173:
	jmp	.LBB11_221
.LBB11_201:
.Ltmp201:
	jmp	.LBB11_221
.LBB11_202:
.Ltmp234:
	jmp	.LBB11_221
.LBB11_203:
.Ltmp113:
	jmp	.LBB11_221
.LBB11_204:
.Ltmp208:
	jmp	.LBB11_221
.LBB11_205:
.Ltmp178:
	jmp	.LBB11_223
.LBB11_206:
.Ltmp239:
	jmp	.LBB11_221
.LBB11_207:
.Ltmp224:
	jmp	.LBB11_221
.LBB11_208:
.Ltmp163:
	jmp	.LBB11_221
.LBB11_209:
.Ltmp194:
	jmp	.LBB11_221
.LBB11_210:
.Ltmp145:
	jmp	.LBB11_221
.LBB11_211:
.Ltmp170:
	jmp	.LBB11_221
.LBB11_212:
.Ltmp103:
	jmp	.LBB11_221
.LBB11_213:
.Ltmp84:
	jmp	.LBB11_221
.LBB11_214:
.Ltmp156:
	jmp	.LBB11_221
.LBB11_215:
.Ltmp251:
	jmp	.LBB11_221
.LBB11_216:
.Ltmp96:
	jmp	.LBB11_221
.LBB11_217:
.Ltmp122:
	jmp	.LBB11_221
.LBB11_218:
.Ltmp219:
	jmp	.LBB11_223
.LBB11_219:
.Ltmp87:
	jmp	.LBB11_221
.LBB11_220:
.Ltmp65:
.LBB11_221:
	movq	%rax, %rbx
	jmp	.LBB11_224
.LBB11_222:
.Ltmp183:
.LBB11_223:
	movq	%rax, %rbx
	leaq	88(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
.LBB11_224:
	leaq	64(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
.LBB11_225:
	leaq	8(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end11:
	.size	main, .Lfunc_end11-main
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI11_0:
	.quad	.LBB11_192
	.quad	.LBB11_27
	.quad	.LBB11_84
	.quad	.LBB11_79
	.quad	.LBB11_54
	.quad	.LBB11_29
	.quad	.LBB11_86
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table11:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp60-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp60
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp61-.Ltmp60                #   Call between .Ltmp60 and .Ltmp61
	.uleb128 .Ltmp62-.Lfunc_begin2          #     jumps to .Ltmp62
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp64-.Ltmp63                #   Call between .Ltmp63 and .Ltmp64
	.uleb128 .Ltmp65-.Lfunc_begin2          #     jumps to .Ltmp65
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp83-.Ltmp66                #   Call between .Ltmp66 and .Ltmp83
	.uleb128 .Ltmp84-.Lfunc_begin2          #     jumps to .Ltmp84
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp85-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Ltmp86-.Ltmp85                #   Call between .Ltmp85 and .Ltmp86
	.uleb128 .Ltmp87-.Lfunc_begin2          #     jumps to .Ltmp87
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp88-.Lfunc_begin2          # >> Call Site 6 <<
	.uleb128 .Ltmp95-.Ltmp88                #   Call between .Ltmp88 and .Ltmp95
	.uleb128 .Ltmp96-.Lfunc_begin2          #     jumps to .Ltmp96
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp247-.Lfunc_begin2         # >> Call Site 7 <<
	.uleb128 .Ltmp250-.Ltmp247              #   Call between .Ltmp247 and .Ltmp250
	.uleb128 .Ltmp251-.Lfunc_begin2         #     jumps to .Ltmp251
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp146-.Lfunc_begin2         # >> Call Site 8 <<
	.uleb128 .Ltmp155-.Ltmp146              #   Call between .Ltmp146 and .Ltmp155
	.uleb128 .Ltmp156-.Lfunc_begin2         #     jumps to .Ltmp156
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp157-.Lfunc_begin2         # >> Call Site 9 <<
	.uleb128 .Ltmp162-.Ltmp157              #   Call between .Ltmp157 and .Ltmp162
	.uleb128 .Ltmp163-.Lfunc_begin2         #     jumps to .Ltmp163
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp164-.Lfunc_begin2         # >> Call Site 10 <<
	.uleb128 .Ltmp169-.Ltmp164              #   Call between .Ltmp164 and .Ltmp169
	.uleb128 .Ltmp170-.Lfunc_begin2         #     jumps to .Ltmp170
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp171-.Lfunc_begin2         # >> Call Site 11 <<
	.uleb128 .Ltmp172-.Ltmp171              #   Call between .Ltmp171 and .Ltmp172
	.uleb128 .Ltmp173-.Lfunc_begin2         #     jumps to .Ltmp173
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp174-.Lfunc_begin2         # >> Call Site 12 <<
	.uleb128 .Ltmp177-.Ltmp174              #   Call between .Ltmp174 and .Ltmp177
	.uleb128 .Ltmp178-.Lfunc_begin2         #     jumps to .Ltmp178
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp179-.Lfunc_begin2         # >> Call Site 13 <<
	.uleb128 .Ltmp182-.Ltmp179              #   Call between .Ltmp179 and .Ltmp182
	.uleb128 .Ltmp183-.Lfunc_begin2         #     jumps to .Ltmp183
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp184-.Lfunc_begin2         # >> Call Site 14 <<
	.uleb128 .Ltmp193-.Ltmp184              #   Call between .Ltmp184 and .Ltmp193
	.uleb128 .Ltmp194-.Lfunc_begin2         #     jumps to .Ltmp194
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp195-.Lfunc_begin2         # >> Call Site 15 <<
	.uleb128 .Ltmp200-.Ltmp195              #   Call between .Ltmp195 and .Ltmp200
	.uleb128 .Ltmp201-.Lfunc_begin2         #     jumps to .Ltmp201
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp202-.Lfunc_begin2         # >> Call Site 16 <<
	.uleb128 .Ltmp207-.Ltmp202              #   Call between .Ltmp202 and .Ltmp207
	.uleb128 .Ltmp208-.Lfunc_begin2         #     jumps to .Ltmp208
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp209-.Lfunc_begin2         # >> Call Site 17 <<
	.uleb128 .Ltmp210-.Ltmp209              #   Call between .Ltmp209 and .Ltmp210
	.uleb128 .Ltmp211-.Lfunc_begin2         #     jumps to .Ltmp211
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp212-.Lfunc_begin2         # >> Call Site 18 <<
	.uleb128 .Ltmp213-.Ltmp212              #   Call between .Ltmp212 and .Ltmp213
	.uleb128 .Ltmp214-.Lfunc_begin2         #     jumps to .Ltmp214
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp215-.Lfunc_begin2         # >> Call Site 19 <<
	.uleb128 .Ltmp218-.Ltmp215              #   Call between .Ltmp215 and .Ltmp218
	.uleb128 .Ltmp219-.Lfunc_begin2         #     jumps to .Ltmp219
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp220-.Lfunc_begin2         # >> Call Site 20 <<
	.uleb128 .Ltmp223-.Ltmp220              #   Call between .Ltmp220 and .Ltmp223
	.uleb128 .Ltmp224-.Lfunc_begin2         #     jumps to .Ltmp224
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp243-.Lfunc_begin2         # >> Call Site 21 <<
	.uleb128 .Ltmp246-.Ltmp243              #   Call between .Ltmp243 and .Ltmp246
	.uleb128 .Ltmp251-.Lfunc_begin2         #     jumps to .Ltmp251
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp97-.Lfunc_begin2          # >> Call Site 22 <<
	.uleb128 .Ltmp102-.Ltmp97               #   Call between .Ltmp97 and .Ltmp102
	.uleb128 .Ltmp103-.Lfunc_begin2         #     jumps to .Ltmp103
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp225-.Lfunc_begin2         # >> Call Site 23 <<
	.uleb128 .Ltmp226-.Ltmp225              #   Call between .Ltmp225 and .Ltmp226
	.uleb128 .Ltmp227-.Lfunc_begin2         #     jumps to .Ltmp227
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp226-.Lfunc_begin2         # >> Call Site 24 <<
	.uleb128 .Ltmp228-.Ltmp226              #   Call between .Ltmp226 and .Ltmp228
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp228-.Lfunc_begin2         # >> Call Site 25 <<
	.uleb128 .Ltmp233-.Ltmp228              #   Call between .Ltmp228 and .Ltmp233
	.uleb128 .Ltmp234-.Lfunc_begin2         #     jumps to .Ltmp234
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp235-.Lfunc_begin2         # >> Call Site 26 <<
	.uleb128 .Ltmp238-.Ltmp235              #   Call between .Ltmp235 and .Ltmp238
	.uleb128 .Ltmp239-.Lfunc_begin2         #     jumps to .Ltmp239
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp240-.Lfunc_begin2         # >> Call Site 27 <<
	.uleb128 .Ltmp241-.Ltmp240              #   Call between .Ltmp240 and .Ltmp241
	.uleb128 .Ltmp242-.Lfunc_begin2         #     jumps to .Ltmp242
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp104-.Lfunc_begin2         # >> Call Site 28 <<
	.uleb128 .Ltmp105-.Ltmp104              #   Call between .Ltmp104 and .Ltmp105
	.uleb128 .Ltmp106-.Lfunc_begin2         #     jumps to .Ltmp106
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp105-.Lfunc_begin2         # >> Call Site 29 <<
	.uleb128 .Ltmp107-.Ltmp105              #   Call between .Ltmp105 and .Ltmp107
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp107-.Lfunc_begin2         # >> Call Site 30 <<
	.uleb128 .Ltmp112-.Ltmp107              #   Call between .Ltmp107 and .Ltmp112
	.uleb128 .Ltmp113-.Lfunc_begin2         #     jumps to .Ltmp113
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp114-.Lfunc_begin2         # >> Call Site 31 <<
	.uleb128 .Ltmp115-.Ltmp114              #   Call between .Ltmp114 and .Ltmp115
	.uleb128 .Ltmp125-.Lfunc_begin2         #     jumps to .Ltmp125
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp115-.Lfunc_begin2         # >> Call Site 32 <<
	.uleb128 .Ltmp116-.Ltmp115              #   Call between .Ltmp115 and .Ltmp116
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp116-.Lfunc_begin2         # >> Call Site 33 <<
	.uleb128 .Ltmp121-.Ltmp116              #   Call between .Ltmp116 and .Ltmp121
	.uleb128 .Ltmp122-.Lfunc_begin2         #     jumps to .Ltmp122
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp123-.Lfunc_begin2         # >> Call Site 34 <<
	.uleb128 .Ltmp124-.Ltmp123              #   Call between .Ltmp123 and .Ltmp124
	.uleb128 .Ltmp125-.Lfunc_begin2         #     jumps to .Ltmp125
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp126-.Lfunc_begin2         # >> Call Site 35 <<
	.uleb128 .Ltmp131-.Ltmp126              #   Call between .Ltmp126 and .Ltmp131
	.uleb128 .Ltmp145-.Lfunc_begin2         #     jumps to .Ltmp145
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp132-.Lfunc_begin2         # >> Call Site 36 <<
	.uleb128 .Ltmp133-.Ltmp132              #   Call between .Ltmp132 and .Ltmp133
	.uleb128 .Ltmp134-.Lfunc_begin2         #     jumps to .Ltmp134
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp135-.Lfunc_begin2         # >> Call Site 37 <<
	.uleb128 .Ltmp136-.Ltmp135              #   Call between .Ltmp135 and .Ltmp136
	.uleb128 .Ltmp137-.Lfunc_begin2         #     jumps to .Ltmp137
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp138-.Lfunc_begin2         # >> Call Site 38 <<
	.uleb128 .Ltmp141-.Ltmp138              #   Call between .Ltmp138 and .Ltmp141
	.uleb128 .Ltmp142-.Lfunc_begin2         #     jumps to .Ltmp142
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp141-.Lfunc_begin2         # >> Call Site 39 <<
	.uleb128 .Ltmp143-.Ltmp141              #   Call between .Ltmp141 and .Ltmp143
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp143-.Lfunc_begin2         # >> Call Site 40 <<
	.uleb128 .Ltmp144-.Ltmp143              #   Call between .Ltmp143 and .Ltmp144
	.uleb128 .Ltmp145-.Lfunc_begin2         #     jumps to .Ltmp145
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp144-.Lfunc_begin2         # >> Call Site 41 <<
	.uleb128 .Lfunc_end11-.Ltmp144          #   Call between .Ltmp144 and .Lfunc_end11
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN6MatrixC2Ejj
.LCPI12_0:
	.quad	0x3ff0000000000000              # double 1
	.section	.text._ZN6MatrixC2Ejj,"axG",@progbits,_ZN6MatrixC2Ejj,comdat
	.weak	_ZN6MatrixC2Ejj
	.p2align	1, 0x90
	.type	_ZN6MatrixC2Ejj,@function
_ZN6MatrixC2Ejj:                        # @_ZN6MatrixC2Ejj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, %r14
	movl	%esi, (%rdi)
	movl	%edx, 4(%rdi)
	movl	%esi, %r12d
	leaq	(,%r12,8), %rdi
	callq	_Znam
	movq	%rax, 8(%r14)
	testl	%ebp, %ebp
	je	.LBB12_8
# %bb.1:                                # %.lr.ph19
	movl	%ebx, %r13d
	leaq	(,%r13,8), %r15
	xorl	%ebp, %ebp
.LBB12_2:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB12_4 Depth 2
	movq	%r15, %rdi
	callq	_Znam
	movsd	.LCPI12_0(%rip), %xmm1          # xmm1 = mem[0],zero
	movq	8(%r14), %rcx
	movq	%rax, (%rcx,%rbp,8)
	testl	%ebx, %ebx
	je	.LBB12_7
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB12_2 Depth=1
	movq	8(%r14), %rax
	movq	(%rax,%rbp,8), %rax
	xorl	%ecx, %ecx
.LBB12_4:                               #   Parent Loop BB12_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movaps	%xmm1, %xmm0
	cmpq	%rcx, %rbp
	je	.LBB12_6
# %bb.5:                                #   in Loop: Header=BB12_4 Depth=2
	xorps	%xmm0, %xmm0
.LBB12_6:                               #   in Loop: Header=BB12_4 Depth=2
	movsd	%xmm0, (%rax,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %r13
	jne	.LBB12_4
.LBB12_7:                               # %._crit_edge
                                        #   in Loop: Header=BB12_2 Depth=1
	incq	%rbp
	cmpq	%r12, %rbp
	jne	.LBB12_2
.LBB12_8:                               # %._crit_edge20
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_ZN6MatrixC2Ejj, .Lfunc_end12-_ZN6MatrixC2Ejj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _ZN6Matrix3detEv
.LCPI13_0:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.section	.text._ZN6Matrix3detEv,"axG",@progbits,_ZN6Matrix3detEv,comdat
	.weak	_ZN6Matrix3detEv
	.p2align	1, 0x90
	.type	_ZN6Matrix3detEv,@function
_ZN6Matrix3detEv:                       # @_ZN6Matrix3detEv
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	(%rdi), %eax
	cmpl	4(%rdi), %eax
	jne	.LBB13_12
# %bb.1:
	testl	%eax, %eax
	je	.LBB13_2
# %bb.3:
	movq	%rdi, %rbx
	cmpl	$1, %eax
	jne	.LBB13_4
# %bb.13:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNK6Matrix3getEjj              # TAILCALL
.LBB13_2:
	.cfi_def_cfa_offset 80
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	jmp	.LBB13_11
.LBB13_4:                               # %.lr.ph.preheader
	xorl	%ebp, %ebp
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %r14
.LBB13_5:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	%ebp, %edx
	xorl	%ecx, %ecx
	callq	_ZN6Matrix5minorEjj
.Ltmp252:
	movq	%rbx, %rdi
	movl	%ebp, %esi
	xorl	%edx, %edx
	callq	_ZNK6Matrix3getEjj
	movapd	%xmm0, 16(%rsp)                 # 16-byte Spill
.Ltmp253:
# %bb.6:                                #   in Loop: Header=BB13_5 Depth=1
.Ltmp254:
	movq	%r14, %rdi
	callq	_ZN6Matrix3detEv
.Ltmp255:
# %bb.7:                                #   in Loop: Header=BB13_5 Depth=1
	testb	$1, %bpl
	je	.LBB13_8
# %bb.9:                                #   in Loop: Header=BB13_5 Depth=1
	movapd	16(%rsp), %xmm1                 # 16-byte Reload
	xorpd	.LCPI13_0(%rip), %xmm1
	jmp	.LBB13_10
.LBB13_8:                               #   in Loop: Header=BB13_5 Depth=1
	movapd	16(%rsp), %xmm1                 # 16-byte Reload
.LBB13_10:                              #   in Loop: Header=BB13_5 Depth=1
	mulsd	%xmm0, %xmm1
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	callq	_ZN6MatrixD2Ev
	incl	%ebp
	cmpl	(%rbx), %ebp
	jb	.LBB13_5
.LBB13_11:                              # %.loopexit
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB13_12:
	.cfi_def_cfa_offset 80
	movl	$8, %edi
	callq	__cxa_allocate_exception
	movq	$.L.str.36, (%rax)
	movl	$_ZTIPKc, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	__cxa_throw
.LBB13_14:
.Ltmp256:
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end13:
	.size	_ZN6Matrix3detEv, .Lfunc_end13-_ZN6Matrix3detEv
	.cfi_endproc
	.section	.gcc_except_table._ZN6Matrix3detEv,"aG",@progbits,_ZN6Matrix3detEv,comdat
	.p2align	2, 0x0
GCC_except_table13:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Lfunc_begin3-.Lfunc_begin3    # >> Call Site 1 <<
	.uleb128 .Ltmp252-.Lfunc_begin3         #   Call between .Lfunc_begin3 and .Ltmp252
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp252-.Lfunc_begin3         # >> Call Site 2 <<
	.uleb128 .Ltmp255-.Ltmp252              #   Call between .Ltmp252 and .Ltmp255
	.uleb128 .Ltmp256-.Lfunc_begin3         #     jumps to .Ltmp256
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp255-.Lfunc_begin3         # >> Call Site 3 <<
	.uleb128 .Lfunc_end13-.Ltmp255          #   Call between .Ltmp255 and .Lfunc_end13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end3:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNK6MatrixplERKS_,"axG",@progbits,_ZNK6MatrixplERKS_,comdat
	.weak	_ZNK6MatrixplERKS_              # -- Begin function _ZNK6MatrixplERKS_
	.p2align	1, 0x90
	.type	_ZNK6MatrixplERKS_,@function
_ZNK6MatrixplERKS_:                     # @_ZNK6MatrixplERKS_
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movl	(%rsi), %esi
	cmpl	(%rdx), %esi
	jne	.LBB14_13
# %bb.1:
	movq	%rdx, %r14
	movl	4(%r15), %edx
	cmpl	4(%r14), %edx
	jne	.LBB14_13
# %bb.2:
	movq	%rdi, %rbx
	callq	_ZN6MatrixC2Ejj
	movl	(%r15), %eax
	testl	%eax, %eax
	je	.LBB14_12
# %bb.3:                                # %.preheader.preheader
	movl	4(%r15), %ecx
	xorl	%ebp, %ebp
.LBB14_4:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB14_6 Depth 2
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB14_11
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB14_4 Depth=1
	xorl	%r12d, %r12d
.LBB14_6:                               # %.lr.ph
                                        #   Parent Loop BB14_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp257:
	movq	%r15, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	callq	_ZNK6Matrix3getEjj
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
.Ltmp258:
# %bb.7:                                #   in Loop: Header=BB14_6 Depth=2
.Ltmp259:
	movq	%r14, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp260:
# %bb.8:                                #   in Loop: Header=BB14_6 Depth=2
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
.Ltmp261:
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	movapd	%xmm1, %xmm0
	callq	_ZN6Matrix3setEjjd
.Ltmp262:
# %bb.9:                                #   in Loop: Header=BB14_6 Depth=2
	incl	%r12d
	movl	4(%r15), %ecx
	cmpl	%ecx, %r12d
	jb	.LBB14_6
# %bb.10:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB14_4 Depth=1
	movl	(%r15), %eax
.LBB14_11:                              # %._crit_edge
                                        #   in Loop: Header=BB14_4 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jb	.LBB14_4
.LBB14_12:                              # %._crit_edge20
	movq	%rbx, %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB14_13:
	.cfi_def_cfa_offset 64
	movl	$8, %edi
	callq	__cxa_allocate_exception
	movq	$.L.str.37, (%rax)
	movl	$_ZTIPKc, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	__cxa_throw
.LBB14_14:
.Ltmp263:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZN6MatrixD2Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end14:
	.size	_ZNK6MatrixplERKS_, .Lfunc_end14-_ZNK6MatrixplERKS_
	.cfi_endproc
	.section	.gcc_except_table._ZNK6MatrixplERKS_,"aG",@progbits,_ZNK6MatrixplERKS_,comdat
	.p2align	2, 0x0
GCC_except_table14:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Lfunc_begin4-.Lfunc_begin4    # >> Call Site 1 <<
	.uleb128 .Ltmp257-.Lfunc_begin4         #   Call between .Lfunc_begin4 and .Ltmp257
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp257-.Lfunc_begin4         # >> Call Site 2 <<
	.uleb128 .Ltmp262-.Ltmp257              #   Call between .Ltmp257 and .Ltmp262
	.uleb128 .Ltmp263-.Lfunc_begin4         #     jumps to .Ltmp263
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp262-.Lfunc_begin4         # >> Call Site 3 <<
	.uleb128 .Lfunc_end14-.Ltmp262          #   Call between .Ltmp262 and .Lfunc_end14
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end4:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6MatrixD2Ev,"axG",@progbits,_ZN6MatrixD2Ev,comdat
	.weak	_ZN6MatrixD2Ev                  # -- Begin function _ZN6MatrixD2Ev
	.p2align	1, 0x90
	.type	_ZN6MatrixD2Ev,@function
_ZN6MatrixD2Ev:                         # @_ZN6MatrixD2Ev
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	(%rdi), %eax
	testl	%eax, %eax
	je	.LBB15_5
# %bb.1:                                # %.lr.ph
	xorl	%r14d, %r14d
.LBB15_2:                               # =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rcx
	movq	(%rcx,%r14,8), %rdi
	testq	%rdi, %rdi
	je	.LBB15_4
# %bb.3:                                #   in Loop: Header=BB15_2 Depth=1
	callq	_ZdaPv
	movl	(%rbx), %eax
.LBB15_4:                               #   in Loop: Header=BB15_2 Depth=1
	incq	%r14
	movl	%eax, %ecx
	cmpq	%rcx, %r14
	jb	.LBB15_2
.LBB15_5:                               # %._crit_edge
	movq	8(%rbx), %rdi
	addq	$8, %rsp
	testq	%rdi, %rdi
	je	.LBB15_6
# %bb.7:
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZdaPv                          # TAILCALL
.LBB15_6:
	.cfi_def_cfa_offset 32
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_ZN6MatrixD2Ev, .Lfunc_end15-_ZN6MatrixD2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK6MatrixmlERKS_,"axG",@progbits,_ZNK6MatrixmlERKS_,comdat
	.weak	_ZNK6MatrixmlERKS_              # -- Begin function _ZNK6MatrixmlERKS_
	.p2align	1, 0x90
	.type	_ZNK6MatrixmlERKS_,@function
_ZNK6MatrixmlERKS_:                     # @_ZNK6MatrixmlERKS_
.Lfunc_begin5:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception5
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	4(%rsi), %eax
	cmpl	(%rdx), %eax
	jne	.LBB16_20
# %bb.1:
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	(%rsi), %esi
	movl	4(%rdx), %edx
	callq	_ZN6MatrixC2Ejj
	movl	(%r15), %eax
	testl	%eax, %eax
	je	.LBB16_16
# %bb.2:                                # %.preheader28.preheader
	movl	4(%r14), %ecx
	xorl	%ebp, %ebp
.LBB16_3:                               # %.preheader28
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB16_5 Depth 2
                                        #       Child Loop BB16_8 Depth 3
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB16_15
# %bb.4:                                # %.lr.ph31.preheader
                                        #   in Loop: Header=BB16_3 Depth=1
	xorl	%r12d, %r12d
.LBB16_5:                               # %.lr.ph31
                                        #   Parent Loop BB16_3 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB16_8 Depth 3
.Ltmp264:
	xorpd	%xmm0, %xmm0
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp265:
# %bb.6:                                # %.preheader
                                        #   in Loop: Header=BB16_5 Depth=2
	cmpl	$0, 4(%r15)
	je	.LBB16_13
# %bb.7:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB16_5 Depth=2
	xorl	%r13d, %r13d
.LBB16_8:                               # %.lr.ph
                                        #   Parent Loop BB16_3 Depth=1
                                        #     Parent Loop BB16_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
.Ltmp267:
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	callq	_ZNK6Matrix3getEjj
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
.Ltmp268:
# %bb.9:                                #   in Loop: Header=BB16_8 Depth=3
.Ltmp269:
	movq	%r15, %rdi
	movl	%ebp, %esi
	movl	%r13d, %edx
	callq	_ZNK6Matrix3getEjj
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
.Ltmp270:
# %bb.10:                               #   in Loop: Header=BB16_8 Depth=3
.Ltmp271:
	movq	%r14, %rdi
	movl	%r13d, %esi
	movl	%r12d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp272:
# %bb.11:                               #   in Loop: Header=BB16_8 Depth=3
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
.Ltmp273:
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%r12d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp274:
# %bb.12:                               #   in Loop: Header=BB16_8 Depth=3
	incl	%r13d
	cmpl	4(%r15), %r13d
	jb	.LBB16_8
.LBB16_13:                              # %._crit_edge
                                        #   in Loop: Header=BB16_5 Depth=2
	incl	%r12d
	movl	4(%r14), %ecx
	cmpl	%ecx, %r12d
	jb	.LBB16_5
# %bb.14:                               # %._crit_edge32.loopexit
                                        #   in Loop: Header=BB16_3 Depth=1
	movl	(%r15), %eax
.LBB16_15:                              # %._crit_edge32
                                        #   in Loop: Header=BB16_3 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jb	.LBB16_3
.LBB16_16:                              # %._crit_edge34
	movq	%rbx, %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB16_20:
	.cfi_def_cfa_offset 80
	movl	$8, %edi
	callq	__cxa_allocate_exception
	movq	$.L.str.38, (%rax)
	movl	$_ZTIPKc, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	__cxa_throw
.LBB16_17:
.Ltmp266:
	jmp	.LBB16_19
.LBB16_18:
.Ltmp275:
.LBB16_19:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZN6MatrixD2Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end16:
	.size	_ZNK6MatrixmlERKS_, .Lfunc_end16-_ZNK6MatrixmlERKS_
	.cfi_endproc
	.section	.gcc_except_table._ZNK6MatrixmlERKS_,"aG",@progbits,_ZNK6MatrixmlERKS_,comdat
	.p2align	2, 0x0
GCC_except_table16:
.Lexception5:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end5-.Lcst_begin5
.Lcst_begin5:
	.uleb128 .Lfunc_begin5-.Lfunc_begin5    # >> Call Site 1 <<
	.uleb128 .Ltmp264-.Lfunc_begin5         #   Call between .Lfunc_begin5 and .Ltmp264
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp264-.Lfunc_begin5         # >> Call Site 2 <<
	.uleb128 .Ltmp265-.Ltmp264              #   Call between .Ltmp264 and .Ltmp265
	.uleb128 .Ltmp266-.Lfunc_begin5         #     jumps to .Ltmp266
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp267-.Lfunc_begin5         # >> Call Site 3 <<
	.uleb128 .Ltmp274-.Ltmp267              #   Call between .Ltmp267 and .Ltmp274
	.uleb128 .Ltmp275-.Lfunc_begin5         #     jumps to .Ltmp275
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp274-.Lfunc_begin5         # >> Call Site 4 <<
	.uleb128 .Lfunc_end16-.Ltmp274          #   Call between .Ltmp274 and .Lfunc_end16
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end5:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZN6Matrix7inverseEv
.LCPI17_0:
	.quad	0x3ff0000000000000              # double 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI17_1:
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.section	.text._ZN6Matrix7inverseEv,"axG",@progbits,_ZN6Matrix7inverseEv,comdat
	.weak	_ZN6Matrix7inverseEv
	.p2align	1, 0x90
	.type	_ZN6Matrix7inverseEv,@function
_ZN6Matrix7inverseEv:                   # @_ZN6Matrix7inverseEv
.Lfunc_begin6:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception6
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	callq	_ZN6Matrix3detEv
	xorpd	%xmm1, %xmm1
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	ucomisd	%xmm1, %xmm0
	jne	.LBB17_1
	jnp	.LBB17_22
.LBB17_1:
	movl	(%r14), %esi
	movl	4(%r14), %edx
	movq	%rbx, %rdi
	callq	_ZN6MatrixC2Ejj
	movl	(%r14), %eax
	testl	%eax, %eax
	je	.LBB17_18
# %bb.2:
	cmpl	$1, %eax
	jne	.LBB17_3
# %bb.17:
	movsd	.LCPI17_0(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
.Ltmp276:
	movq	%rbx, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp277:
	jmp	.LBB17_18
.LBB17_3:                               # %.preheader.preheader
	movl	4(%r14), %ecx
	xorl	%r15d, %r15d
	leaq	32(%rsp), %r12
.LBB17_4:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_6 Depth 2
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB17_13
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB17_4 Depth=1
	xorl	%r13d, %r13d
.LBB17_6:                               # %.lr.ph
                                        #   Parent Loop BB17_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp279:
	movq	%r12, %rdi
	movq	%r14, %rsi
	movl	%r15d, %edx
	movl	%r13d, %ecx
	callq	_ZN6Matrix5minorEjj
.Ltmp280:
# %bb.7:                                #   in Loop: Header=BB17_6 Depth=2
.Ltmp282:
	movq	%r12, %rdi
	callq	_ZN6Matrix3detEv
.Ltmp283:
# %bb.8:                                #   in Loop: Header=BB17_6 Depth=2
	leal	(%r15,%r13), %eax
	testb	$1, %al
	je	.LBB17_10
# %bb.9:                                #   in Loop: Header=BB17_6 Depth=2
	xorpd	.LCPI17_1(%rip), %xmm0
.LBB17_10:                              #   in Loop: Header=BB17_6 Depth=2
	movapd	%xmm0, 16(%rsp)                 # 16-byte Spill
	movq	%r12, %rdi
	callq	_ZN6MatrixD2Ev
	movapd	16(%rsp), %xmm0                 # 16-byte Reload
	divsd	8(%rsp), %xmm0                  # 8-byte Folded Reload
.Ltmp285:
	movq	%rbx, %rdi
	movl	%r13d, %esi
	movl	%r15d, %edx
	callq	_ZN6Matrix3setEjjd
.Ltmp286:
# %bb.11:                               #   in Loop: Header=BB17_6 Depth=2
	incl	%r13d
	movl	4(%r14), %ecx
	cmpl	%ecx, %r13d
	jb	.LBB17_6
# %bb.12:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB17_4 Depth=1
	movl	(%r14), %eax
.LBB17_13:                              # %._crit_edge
                                        #   in Loop: Header=BB17_4 Depth=1
	incl	%r15d
	cmpl	%eax, %r15d
	jb	.LBB17_4
.LBB17_18:                              # %.loopexit
	movq	%rbx, %rax
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB17_22:
	.cfi_def_cfa_offset 96
	movl	$8, %edi
	callq	__cxa_allocate_exception
	movq	$.L.str.39, (%rax)
	movl	$_ZTIPKc, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	__cxa_throw
.LBB17_19:
.Ltmp278:
	jmp	.LBB17_20
.LBB17_15:
.Ltmp284:
	movq	%rax, %r14
	leaq	32(%rsp), %rdi
	callq	_ZN6MatrixD2Ev
	jmp	.LBB17_21
.LBB17_14:
.Ltmp281:
	jmp	.LBB17_20
.LBB17_16:
.Ltmp287:
.LBB17_20:
	movq	%rax, %r14
.LBB17_21:
	movq	%rbx, %rdi
	callq	_ZN6MatrixD2Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end17:
	.size	_ZN6Matrix7inverseEv, .Lfunc_end17-_ZN6Matrix7inverseEv
	.cfi_endproc
	.section	.gcc_except_table._ZN6Matrix7inverseEv,"aG",@progbits,_ZN6Matrix7inverseEv,comdat
	.p2align	2, 0x0
GCC_except_table17:
.Lexception6:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end6-.Lcst_begin6
.Lcst_begin6:
	.uleb128 .Lfunc_begin6-.Lfunc_begin6    # >> Call Site 1 <<
	.uleb128 .Ltmp276-.Lfunc_begin6         #   Call between .Lfunc_begin6 and .Ltmp276
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp276-.Lfunc_begin6         # >> Call Site 2 <<
	.uleb128 .Ltmp277-.Ltmp276              #   Call between .Ltmp276 and .Ltmp277
	.uleb128 .Ltmp278-.Lfunc_begin6         #     jumps to .Ltmp278
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp279-.Lfunc_begin6         # >> Call Site 3 <<
	.uleb128 .Ltmp280-.Ltmp279              #   Call between .Ltmp279 and .Ltmp280
	.uleb128 .Ltmp281-.Lfunc_begin6         #     jumps to .Ltmp281
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp282-.Lfunc_begin6         # >> Call Site 4 <<
	.uleb128 .Ltmp283-.Ltmp282              #   Call between .Ltmp282 and .Ltmp283
	.uleb128 .Ltmp284-.Lfunc_begin6         #     jumps to .Ltmp284
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp285-.Lfunc_begin6         # >> Call Site 5 <<
	.uleb128 .Ltmp286-.Ltmp285              #   Call between .Ltmp285 and .Ltmp286
	.uleb128 .Ltmp287-.Lfunc_begin6         #     jumps to .Ltmp287
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp286-.Lfunc_begin6         # >> Call Site 6 <<
	.uleb128 .Lfunc_end17-.Ltmp286          #   Call between .Ltmp286 and .Lfunc_end17
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end6:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZN6Matrix5minorEjj,"axG",@progbits,_ZN6Matrix5minorEjj,comdat
	.weak	_ZN6Matrix5minorEjj             # -- Begin function _ZN6Matrix5minorEjj
	.p2align	1, 0x90
	.type	_ZN6Matrix5minorEjj,@function
_ZN6Matrix5minorEjj:                    # @_ZN6Matrix5minorEjj
.Lfunc_begin7:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception7
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movl	%edx, %r14d
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	(%rsi), %esi
	movl	4(%r15), %edx
	decl	%esi
	decl	%edx
	callq	_ZN6MatrixC2Ejj
	movl	(%r15), %eax
	testl	%eax, %eax
	je	.LBB18_25
# %bb.1:                                # %.preheader.preheader
	movl	4(%r15), %ecx
	xorl	%r12d, %r12d
.LBB18_2:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB18_4 Depth 2
	testl	%ecx, %ecx
	movl	$0, %ecx
	je	.LBB18_24
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB18_2 Depth=1
	leal	-1(%r12), %eax
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	xorl	%r13d, %r13d
.LBB18_4:                               #   Parent Loop BB18_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	%r14d, %r12d
	jae	.LBB18_9
# %bb.5:                                #   in Loop: Header=BB18_4 Depth=2
	cmpl	%ebp, %r13d
	jae	.LBB18_9
# %bb.6:                                #   in Loop: Header=BB18_4 Depth=2
.Ltmp294:
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%r13d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp295:
# %bb.7:                                #   in Loop: Header=BB18_4 Depth=2
	movl	%r12d, %esi
.LBB18_8:                               # %.invoke
                                        #   in Loop: Header=BB18_4 Depth=2
	movl	%r13d, %edx
	jmp	.LBB18_21
.LBB18_9:                               #   in Loop: Header=BB18_4 Depth=2
	cmpl	%r14d, %r12d
	jae	.LBB18_13
# %bb.10:                               #   in Loop: Header=BB18_4 Depth=2
	cmpl	%ebp, %r13d
	jbe	.LBB18_13
# %bb.11:                               #   in Loop: Header=BB18_4 Depth=2
.Ltmp292:
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%r13d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp293:
# %bb.12:                               #   in Loop: Header=BB18_4 Depth=2
	leal	-1(%r13), %edx
	movl	%r12d, %esi
.LBB18_21:                              # %.invoke
                                        #   in Loop: Header=BB18_4 Depth=2
.Ltmp296:
	movq	%rbx, %rdi
	callq	_ZN6Matrix3setEjjd
.Ltmp297:
.LBB18_22:                              #   in Loop: Header=BB18_4 Depth=2
	incl	%r13d
	movl	4(%r15), %ecx
	cmpl	%ecx, %r13d
	jb	.LBB18_4
	jmp	.LBB18_23
.LBB18_13:                              #   in Loop: Header=BB18_4 Depth=2
	cmpl	%r14d, %r12d
	jbe	.LBB18_17
# %bb.14:                               #   in Loop: Header=BB18_4 Depth=2
	cmpl	%ebp, %r13d
	jae	.LBB18_17
# %bb.15:                               #   in Loop: Header=BB18_4 Depth=2
.Ltmp290:
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%r13d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp291:
# %bb.16:                               #   in Loop: Header=BB18_4 Depth=2
	movl	4(%rsp), %esi                   # 4-byte Reload
	jmp	.LBB18_8
.LBB18_17:                              #   in Loop: Header=BB18_4 Depth=2
	cmpl	%r14d, %r12d
	jbe	.LBB18_22
# %bb.18:                               #   in Loop: Header=BB18_4 Depth=2
	cmpl	%ebp, %r13d
	jbe	.LBB18_22
# %bb.19:                               #   in Loop: Header=BB18_4 Depth=2
.Ltmp288:
	movq	%r15, %rdi
	movl	%r12d, %esi
	movl	%r13d, %edx
	callq	_ZNK6Matrix3getEjj
.Ltmp289:
# %bb.20:                               #   in Loop: Header=BB18_4 Depth=2
	leal	-1(%r13), %edx
	movl	4(%rsp), %esi                   # 4-byte Reload
	jmp	.LBB18_21
.LBB18_23:                              # %._crit_edge.loopexit
                                        #   in Loop: Header=BB18_2 Depth=1
	movl	(%r15), %eax
.LBB18_24:                              # %._crit_edge
                                        #   in Loop: Header=BB18_2 Depth=1
	incl	%r12d
	cmpl	%eax, %r12d
	jb	.LBB18_2
.LBB18_25:                              # %._crit_edge45
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB18_26:
	.cfi_def_cfa_offset 64
.Ltmp298:
	movq	%rax, %r14
	movq	%rbx, %rdi
	callq	_ZN6MatrixD2Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end18:
	.size	_ZN6Matrix5minorEjj, .Lfunc_end18-_ZN6Matrix5minorEjj
	.cfi_endproc
	.section	.gcc_except_table._ZN6Matrix5minorEjj,"aG",@progbits,_ZN6Matrix5minorEjj,comdat
	.p2align	2, 0x0
GCC_except_table18:
.Lexception7:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end7-.Lcst_begin7
.Lcst_begin7:
	.uleb128 .Lfunc_begin7-.Lfunc_begin7    # >> Call Site 1 <<
	.uleb128 .Ltmp294-.Lfunc_begin7         #   Call between .Lfunc_begin7 and .Ltmp294
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp294-.Lfunc_begin7         # >> Call Site 2 <<
	.uleb128 .Ltmp289-.Ltmp294              #   Call between .Ltmp294 and .Ltmp289
	.uleb128 .Ltmp298-.Lfunc_begin7         #     jumps to .Ltmp298
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp289-.Lfunc_begin7         # >> Call Site 3 <<
	.uleb128 .Lfunc_end18-.Ltmp289          #   Call between .Ltmp289 and .Lfunc_end18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end7:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB19_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB19_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPvS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3mulPvS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9detHelperPvPd, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end19:
	.size	__hip_module_ctor, .Lfunc_end19-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB20_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB20_2:
	retq
.Lfunc_end20:
	.size	__hip_module_dtor, .Lfunc_end20-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n"
	.size	.L.str, 2

	.type	_Z3addPvS_S_,@object            # @_Z3addPvS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z3addPvS_S_
	.p2align	3, 0x0
_Z3addPvS_S_:
	.quad	_Z18__device_stub__addPvS_S_
	.size	_Z3addPvS_S_, 8

	.type	_Z3mulPvS_S_,@object            # @_Z3mulPvS_S_
	.globl	_Z3mulPvS_S_
	.p2align	3, 0x0
_Z3mulPvS_S_:
	.quad	_Z18__device_stub__mulPvS_S_
	.size	_Z3mulPvS_S_, 8

	.type	_Z9detHelperPvPd,@object        # @_Z9detHelperPvPd
	.globl	_Z9detHelperPvPd
	.p2align	3, 0x0
_Z9detHelperPvPd:
	.quad	_Z24__device_stub__detHelperPvPd
	.size	_Z9detHelperPvPd, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Podaj nazwe pliku: "
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%s"
	.size	.L.str.2, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%.2f "
	.size	.L.str.5, 6

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"%d"
	.size	.L.str.16, 3

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"clear"
	.size	.L.str.17, 6

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Wymiary macierzy musza byc rowne!!!"
	.size	.L.str.19, 36

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"%f\n\n"
	.size	.L.str.21, 5

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"(Device) wykonano w ciagu: %fs\n"
	.size	.L.str.22, 32

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"(Device) ... %fs, jesli uzwglednic zarzadzanie pamiecia.\n"
	.size	.L.str.23, 58

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"(Host) wykonano w ciagu: %fs\n"
	.size	.L.str.25, 30

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"Wyznacznik glownej macierzy: %f\n"
	.size	.L.str.29, 33

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"Wyznacznik macierzy rowny 0.0 - macierz odwrotna nie istnieje!"
	.size	.L.str.30, 63

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"Nie rozumiem - sprobuj ponownie!"
	.size	.L.str.31, 33

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"Nie znaleziono elementu pod podana para indeksow."
	.size	.L.str.32, 50

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"stoul"
	.size	.L.str.33, 6

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"Nie mozna ustawic wartosci elementu pod podana para indeksow."
	.size	.L.str.34, 62

	.type	.L.str.35,@object               # @.str.35
.L.str.35:
	.asciz	"stod"
	.size	.L.str.35, 5

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"Wyznacznik mozna obliczyc tylko dla macierzy kwadratowej!"
	.size	.L.str.36, 58

	.type	.L.str.37,@object               # @.str.37
.L.str.37:
	.asciz	"Nie mozna dodawac macierzy o roznych wymiarach!"
	.size	.L.str.37, 48

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"Pierwsza macierz nie ma tylu kolumn, co druga wierszy - odmowa wykonania mnozenia!"
	.size	.L.str.38, 83

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	"Wyznacznik macierzy rowny zero!"
	.size	.L.str.39, 32

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPvS_S_"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z3mulPvS_S_"
	.size	.L__unnamed_2, 13

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9detHelperPvPd"
	.size	.L__unnamed_3, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Nie udalo sie otworzyc pliku o podanej nazwie!"
	.size	.Lstr, 47

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Macierz 1:"
	.size	.Lstr.1, 11

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Macierz 2:"
	.size	.Lstr.2, 11

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"*******************MENU********************"
	.size	.Lstr.3, 44

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"1.Wczytaj macierz z pliku"
	.size	.Lstr.4, 26

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"2.Zapisz macierz do pliku"
	.size	.Lstr.5, 26

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"3.Wyznacznik ( det(m1) )"
	.size	.Lstr.6, 25

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"4.Dodaj macierze (m1=m1+m2)"
	.size	.Lstr.7, 28

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"5.Przemn\303\263\305\274 macierze (m1=m1*m2)"
	.size	.Lstr.8, 33

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"6.Macierz odwrotna ( m1=m1^(-1) )"
	.size	.Lstr.9, 34

	.type	.Lstr.10,@object                # @str.10
.Lstr.10:
	.asciz	"0.Wyjd\305\272"
	.size	.Lstr.10, 9

	.type	.Lstr.11,@object                # @str.11
.Lstr.11:
	.asciz	"Wybieram : "
	.size	.Lstr.11, 12

	.type	.Lstr.17,@object                # @str.17
.Lstr.17:
	.asciz	"Nie zgadzaja sie rozmiary macierzy!!!"
	.size	.Lstr.17, 38

	.type	.Lstr.18,@object                # @str.18
.Lstr.18:
	.asciz	"Wynik obliczen na GPU:"
	.size	.Lstr.18, 23

	.type	.Lstr.20,@object                # @str.20
.Lstr.20:
	.asciz	"Macierze r\303\263\305\274nych rozmiar\303\263w!"
	.size	.Lstr.20, 31

	.type	.Lstr.21,@object                # @str.21
.Lstr.21:
	.asciz	"(Device) Wyznacznik obliczony przy uzyciu kernela:"
	.size	.Lstr.21, 51

	.type	.Lstr.22,@object                # @str.22
.Lstr.22:
	.asciz	"Wynik obliczen na CPU:"
	.size	.Lstr.22, 23

	.type	.Lstr.24,@object                # @str.24
.Lstr.24:
	.asciz	"1 - Macierz 1\n2 - Macierz 2"
	.size	.Lstr.24, 28

	.type	.Lswitch.table.main.28,@object  # @switch.table.main.28
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
.Lswitch.table.main.28:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	4                               # 0x4
	.long	4                               # 0x4
	.long	8                               # 0x8
	.size	.Lswitch.table.main.28, 24

	.type	.Lswitch.table.main.29,@object  # @switch.table.main.29
	.p2align	2, 0x0
.Lswitch.table.main.29:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	2                               # 0x2
	.long	4                               # 0x4
	.long	16                              # 0x10
	.long	64                              # 0x40
	.size	.Lswitch.table.main.29, 24

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPvS_S_
	.addrsig_sym _Z18__device_stub__mulPvS_S_
	.addrsig_sym _Z24__device_stub__detHelperPvPd
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z3addPvS_S_
	.addrsig_sym _Z3mulPvS_S_
	.addrsig_sym _Z9detHelperPvPd
	.addrsig_sym _ZTIPKc
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPvS_S_            ; -- Begin function _Z3addPvS_S_
	.globl	_Z3addPvS_S_
	.p2align	8
	.type	_Z3addPvS_S_,@function
_Z3addPvS_S_:                           ; @_Z3addPvS_S_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[10:11], s[4:5], 0x0
	s_and_b32 s9, s8, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s11, s10
	s_mov_b32 s10, exec_lo
	v_cmpx_gt_u32_e64 s8, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s12, s[2:3], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_add_u32 s1, s4, 8
	s_addc_u32 s2, s5, 0
	v_mov_b32_e32 v2, 0
	s_add_u32 s3, s6, 8
	s_addc_u32 s4, s7, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s5, s12, s9
	s_add_u32 s6, s10, 8
	s_addc_u32 s7, s11, 0
	s_mov_b32 s9, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s1, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s2, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s3, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s4, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s8, v1
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_u32 v3, s0, s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s7, v4, s0
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	global_store_b64 v[3:4], v[5:6], off
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow27
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPvS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPvS_S_, .Lfunc_end0-_Z3addPvS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3mulPvS_S_            ; -- Begin function _Z3mulPvS_S_
	.globl	_Z3mulPvS_S_
	.p2align	8
	.type	_Z3mulPvS_S_,@function
_Z3mulPvS_S_:                           ; @_Z3mulPvS_S_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s9, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_load_b32 s8, s[6:7], 0x4
	s_and_b32 s11, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s11, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s9, s8, s10
	s_mov_b32 s10, exec_lo
	v_cmpx_gt_u32_e64 s9, v1
	s_cbranch_execz .LBB1_7
; %bb.1:                                ; %.preheader.lr.ph
	v_cvt_f32_u32_e32 v0, s8
	s_load_b32 s10, s[6:7], 0x0
	s_load_b32 s3, s[2:3], 0x0
	s_load_b64 s[14:15], s[0:1], 0x10
	s_mov_b32 s1, 0
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s10, 0
	s_mul_i32 s3, s3, s11
	s_cselect_b32 s2, -1, 0
	s_sub_i32 s0, 0, s8
	s_add_u32 s11, s4, 8
	v_mul_lo_u32 v2, s0, v0
	s_addc_u32 s12, s5, 0
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_add_u32 s13, s14, 8
	s_addc_u32 s14, s15, 0
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v0, v2
	v_mov_b32_e32 v2, 0
	v_add_nc_u32_e32 v0, v0, v3
.LBB1_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v1, v0
	s_load_b32 s0, s[4:5], 0x4
	s_mov_b32 s16, s10
	v_mul_lo_u32 v4, v3, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v1, v4
	v_subrev_nc_u32_e32 v6, s8, v4
	v_cmp_le_u32_e32 vcc_lo, s8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v4, v4, v6 :: v_dual_add_nc_u32 v5, 1, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_mov_b32 v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s8, v4
	v_dual_mov_b32 v4, v2 :: v_dual_add_nc_u32 v5, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_mul_lo_u32 v5, v3, s8
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v3, s0, v3
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v1, v5
	v_lshlrev_b64 v[7:8], 3, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[9:10], 3, v[5:6]
	v_add_co_u32 v5, vcc_lo, s11, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s12, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v10, vcc_lo
.LBB1_4:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshl_b64 s[18:19], s[0:1], 3
	s_add_i32 s16, s16, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v7, s18
	v_add_co_ci_u32_e32 v10, vcc_lo, s19, v8, vcc_lo
	s_add_i32 s0, s0, s8
	s_cmp_eq_u32 s16, 0
	global_load_b64 v[11:12], v[5:6], off
	global_load_b64 v[9:10], v[9:10], off
	v_add_co_u32 v5, vcc_lo, v5, 8
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[3:4], v[11:12], v[9:10], v[3:4]
	s_cbranch_scc0 .LBB1_4
	s_branch .LBB1_6
.LBB1_5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
.LBB1_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_add_nc_u32_e32 v1, s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s9, v1
	v_add_co_u32 v5, s0, s13, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s14, v6, s0
	s_or_b32 s15, vcc_lo, s15
	global_store_b64 v[5:6], v[3:4], off
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB1_2
.LBB1_7:                                ; %._crit_edge30
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3mulPvS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z3mulPvS_S_, .Lfunc_end1-_Z3mulPvS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 572
; NumSgprs: 22
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_alloc
	.type	__ockl_dm_alloc,@function
__ockl_dm_alloc:                        ; @__ockl_dm_alloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s32         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s38, 4
	v_writelane_b32 v40, s39, 5
	v_writelane_b32 v40, s40, 6
	v_writelane_b32 v40, s41, 7
	v_writelane_b32 v40, s42, 8
	v_writelane_b32 v40, s43, 9
	v_writelane_b32 v40, s44, 10
	v_writelane_b32 v40, s30, 11
	v_writelane_b32 v40, s31, 12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB2_702
; %bb.1:
	v_mbcnt_lo_u32_b32 v2, -1, 0
                                        ; implicit-def: $vgpr0_vgpr1
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u64_e32 0xc01, v[4:5]
	s_xor_b32 s23, exec_lo, s0
	s_cbranch_execz .LBB2_668
; %bb.2:
	v_max_u32_e32 v0, 16, v4
	v_mov_b32_e32 v5, 0
	s_load_b64 s[10:11], s[8:9], 0x60
	v_dual_mov_b32 v118, 1 :: v_dual_mov_b32 v17, 0x1800
	s_delay_alu instid0(VALU_DEP_3)
	v_clz_i32_u32_e32 v1, v0
	v_mov_b32_e32 v20, 0x200000
	v_mov_b32_e32 v8, v5
	v_mov_b32_e32 v14, 1
	v_mov_b32_e32 v68, 0x100
	v_not_b32_e32 v3, v1
	v_lshlrev_b32_e32 v1, 1, v1
	v_mov_b32_e32 v13, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 15, v3
	v_lshlrev_b32_e64 v3, v3, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s10, 0x1a800
	s_addc_u32 s13, s11, 0
	s_add_u32 s14, s10, 0x1a808
	v_lshrrev_b32_e32 v4, 1, v3
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	s_addc_u32 s15, s11, 0
	s_add_u32 s4, s10, 0x800
	s_addc_u32 s5, s11, 0
	v_or_b32_e32 v3, v4, v3
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+12
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+20
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+4
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+12
	s_add_u32 s6, s10, 0x1000
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	v_sub_nc_u32_e32 v1, v6, v1
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, 54, v1, vcc_lo
	v_lshlrev_b64 v[0:1], 7, v[7:8]
	v_lshlrev_b64 v[3:4], 5, v[7:8]
	v_lshrrev_b64 v[8:9], v7, 0xbf
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v32, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v36, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v38, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v48, vcc_lo, s6, v0
	s_add_u32 s0, s10, 0x2000
	v_add_co_ci_u32_e32 v49, vcc_lo, s7, v1, vcc_lo
	s_addc_u32 s1, s11, 0
	v_add_co_u32 v50, vcc_lo, s0, v0
	s_add_u32 s2, s10, 0x1800
	v_add_co_ci_u32_e32 v51, vcc_lo, s1, v1, vcc_lo
	s_addc_u32 s3, s11, 0
	v_add_co_u32 v52, vcc_lo, s2, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+24
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+32
	v_add_co_ci_u32_e32 v53, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, v3, s0
	v_and_b32_e32 v0, 1, v8
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+20
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+28
	v_add_co_ci_u32_e32 v55, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v64, vcc_lo, v3, s2
	v_mov_b32_e32 v9, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __unnamed_1@rel32@lo+28
	s_addc_u32 s5, s5, __unnamed_1@rel32@hi+36
	v_add_co_ci_u32_e32 v65, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v66, vcc_lo, v3, s4
	v_cmp_eq_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v8, v5
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v3, v14
	s_add_u32 s24, s10, 0x100
	s_mov_b32 s4, 0
	s_addc_u32 s25, s11, 0
.LBB2_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_6 Depth 2
                                        ;       Child Loop BB2_11 Depth 3
                                        ;         Child Loop BB2_14 Depth 4
                                        ;         Child Loop BB2_43 Depth 4
                                        ;           Child Loop BB2_47 Depth 5
                                        ;           Child Loop BB2_75 Depth 5
                                        ;             Child Loop BB2_93 Depth 6
                                        ;             Child Loop BB2_101 Depth 6
                                        ;             Child Loop BB2_107 Depth 6
                                        ;             Child Loop BB2_116 Depth 6
                                        ;             Child Loop BB2_121 Depth 6
                                        ;             Child Loop BB2_123 Depth 6
                                        ;             Child Loop BB2_144 Depth 6
                                        ;             Child Loop BB2_152 Depth 6
                                        ;             Child Loop BB2_158 Depth 6
                                        ;             Child Loop BB2_167 Depth 6
                                        ;             Child Loop BB2_175 Depth 6
                                        ;             Child Loop BB2_178 Depth 6
                                        ;             Child Loop BB2_180 Depth 6
                                        ;             Child Loop BB2_182 Depth 6
                                        ;             Child Loop BB2_184 Depth 6
                                        ;             Child Loop BB2_186 Depth 6
                                        ;             Child Loop BB2_188 Depth 6
                                        ;             Child Loop BB2_210 Depth 6
                                        ;             Child Loop BB2_218 Depth 6
                                        ;             Child Loop BB2_224 Depth 6
                                        ;             Child Loop BB2_233 Depth 6
                                        ;             Child Loop BB2_240 Depth 6
                                        ;             Child Loop BB2_243 Depth 6
                                        ;             Child Loop BB2_248 Depth 6
                                        ;             Child Loop BB2_255 Depth 6
                                        ;             Child Loop BB2_288 Depth 6
                                        ;             Child Loop BB2_296 Depth 6
                                        ;             Child Loop BB2_302 Depth 6
                                        ;             Child Loop BB2_311 Depth 6
                                        ;           Child Loop BB2_320 Depth 5
                                        ;           Child Loop BB2_323 Depth 5
                                        ;           Child Loop BB2_325 Depth 5
                                        ;           Child Loop BB2_327 Depth 5
                                        ;           Child Loop BB2_329 Depth 5
                                        ;           Child Loop BB2_331 Depth 5
                                        ;           Child Loop BB2_333 Depth 5
                                        ;       Child Loop BB2_347 Depth 3
                                        ;         Child Loop BB2_351 Depth 4
                                        ;         Child Loop BB2_378 Depth 4
                                        ;           Child Loop BB2_396 Depth 5
                                        ;           Child Loop BB2_404 Depth 5
                                        ;           Child Loop BB2_410 Depth 5
                                        ;           Child Loop BB2_419 Depth 5
                                        ;           Child Loop BB2_424 Depth 5
                                        ;           Child Loop BB2_426 Depth 5
                                        ;           Child Loop BB2_447 Depth 5
                                        ;           Child Loop BB2_455 Depth 5
                                        ;           Child Loop BB2_461 Depth 5
                                        ;           Child Loop BB2_470 Depth 5
                                        ;           Child Loop BB2_478 Depth 5
                                        ;           Child Loop BB2_481 Depth 5
                                        ;           Child Loop BB2_483 Depth 5
                                        ;           Child Loop BB2_485 Depth 5
                                        ;           Child Loop BB2_487 Depth 5
                                        ;           Child Loop BB2_489 Depth 5
                                        ;           Child Loop BB2_491 Depth 5
                                        ;           Child Loop BB2_513 Depth 5
                                        ;           Child Loop BB2_521 Depth 5
                                        ;           Child Loop BB2_527 Depth 5
                                        ;           Child Loop BB2_536 Depth 5
                                        ;           Child Loop BB2_543 Depth 5
                                        ;           Child Loop BB2_546 Depth 5
                                        ;           Child Loop BB2_551 Depth 5
                                        ;           Child Loop BB2_558 Depth 5
                                        ;           Child Loop BB2_591 Depth 5
                                        ;           Child Loop BB2_599 Depth 5
                                        ;           Child Loop BB2_605 Depth 5
                                        ;           Child Loop BB2_614 Depth 5
                                        ;         Child Loop BB2_623 Depth 4
                                        ;         Child Loop BB2_626 Depth 4
                                        ;         Child Loop BB2_628 Depth 4
                                        ;         Child Loop BB2_630 Depth 4
                                        ;         Child Loop BB2_632 Depth 4
                                        ;         Child Loop BB2_634 Depth 4
                                        ;         Child Loop BB2_636 Depth 4
                                        ;       Child Loop BB2_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v119, v3
	v_mov_b32_e32 v3, v5
	s_mov_b32 s26, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v119
	s_cbranch_execz .LBB2_666
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s27, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 s1, v7
	s_cbranch_execz .LBB2_665
; %bb.5:                                ; %.preheader196.preheader
                                        ;   in Loop: Header=BB2_3 Depth=1
	v_mov_b32_e32 v3, 1
.LBB2_6:                                ; %.preheader196
                                        ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_11 Depth 3
                                        ;         Child Loop BB2_14 Depth 4
                                        ;         Child Loop BB2_43 Depth 4
                                        ;           Child Loop BB2_47 Depth 5
                                        ;           Child Loop BB2_75 Depth 5
                                        ;             Child Loop BB2_93 Depth 6
                                        ;             Child Loop BB2_101 Depth 6
                                        ;             Child Loop BB2_107 Depth 6
                                        ;             Child Loop BB2_116 Depth 6
                                        ;             Child Loop BB2_121 Depth 6
                                        ;             Child Loop BB2_123 Depth 6
                                        ;             Child Loop BB2_144 Depth 6
                                        ;             Child Loop BB2_152 Depth 6
                                        ;             Child Loop BB2_158 Depth 6
                                        ;             Child Loop BB2_167 Depth 6
                                        ;             Child Loop BB2_175 Depth 6
                                        ;             Child Loop BB2_178 Depth 6
                                        ;             Child Loop BB2_180 Depth 6
                                        ;             Child Loop BB2_182 Depth 6
                                        ;             Child Loop BB2_184 Depth 6
                                        ;             Child Loop BB2_186 Depth 6
                                        ;             Child Loop BB2_188 Depth 6
                                        ;             Child Loop BB2_210 Depth 6
                                        ;             Child Loop BB2_218 Depth 6
                                        ;             Child Loop BB2_224 Depth 6
                                        ;             Child Loop BB2_233 Depth 6
                                        ;             Child Loop BB2_240 Depth 6
                                        ;             Child Loop BB2_243 Depth 6
                                        ;             Child Loop BB2_248 Depth 6
                                        ;             Child Loop BB2_255 Depth 6
                                        ;             Child Loop BB2_288 Depth 6
                                        ;             Child Loop BB2_296 Depth 6
                                        ;             Child Loop BB2_302 Depth 6
                                        ;             Child Loop BB2_311 Depth 6
                                        ;           Child Loop BB2_320 Depth 5
                                        ;           Child Loop BB2_323 Depth 5
                                        ;           Child Loop BB2_325 Depth 5
                                        ;           Child Loop BB2_327 Depth 5
                                        ;           Child Loop BB2_329 Depth 5
                                        ;           Child Loop BB2_331 Depth 5
                                        ;           Child Loop BB2_333 Depth 5
                                        ;       Child Loop BB2_347 Depth 3
                                        ;         Child Loop BB2_351 Depth 4
                                        ;         Child Loop BB2_378 Depth 4
                                        ;           Child Loop BB2_396 Depth 5
                                        ;           Child Loop BB2_404 Depth 5
                                        ;           Child Loop BB2_410 Depth 5
                                        ;           Child Loop BB2_419 Depth 5
                                        ;           Child Loop BB2_424 Depth 5
                                        ;           Child Loop BB2_426 Depth 5
                                        ;           Child Loop BB2_447 Depth 5
                                        ;           Child Loop BB2_455 Depth 5
                                        ;           Child Loop BB2_461 Depth 5
                                        ;           Child Loop BB2_470 Depth 5
                                        ;           Child Loop BB2_478 Depth 5
                                        ;           Child Loop BB2_481 Depth 5
                                        ;           Child Loop BB2_483 Depth 5
                                        ;           Child Loop BB2_485 Depth 5
                                        ;           Child Loop BB2_487 Depth 5
                                        ;           Child Loop BB2_489 Depth 5
                                        ;           Child Loop BB2_491 Depth 5
                                        ;           Child Loop BB2_513 Depth 5
                                        ;           Child Loop BB2_521 Depth 5
                                        ;           Child Loop BB2_527 Depth 5
                                        ;           Child Loop BB2_536 Depth 5
                                        ;           Child Loop BB2_543 Depth 5
                                        ;           Child Loop BB2_546 Depth 5
                                        ;           Child Loop BB2_551 Depth 5
                                        ;           Child Loop BB2_558 Depth 5
                                        ;           Child Loop BB2_591 Depth 5
                                        ;           Child Loop BB2_599 Depth 5
                                        ;           Child Loop BB2_605 Depth 5
                                        ;           Child Loop BB2_614 Depth 5
                                        ;         Child Loop BB2_623 Depth 4
                                        ;         Child Loop BB2_626 Depth 4
                                        ;         Child Loop BB2_628 Depth 4
                                        ;         Child Loop BB2_630 Depth 4
                                        ;         Child Loop BB2_632 Depth 4
                                        ;         Child Loop BB2_634 Depth 4
                                        ;         Child Loop BB2_636 Depth 4
                                        ;       Child Loop BB2_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v128, v3 :: v_dual_mov_b32 v3, 0
	s_mov_b32 s28, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v128
	s_cbranch_execz .LBB2_664
; %bb.7:                                ;   in Loop: Header=BB2_6 Depth=2
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB2_9
; %bb.8:                                ;   in Loop: Header=BB2_6 Depth=2
	global_load_b32 v3, v[32:33], off glc
.LBB2_9:                                ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_u32 s29, 0x100ff
	s_cbranch_scc0 .LBB2_344
; %bb.10:                               ;   in Loop: Header=BB2_6 Depth=2
	v_mbcnt_lo_u32_b32 v129, exec_lo, 0
	v_mov_b32_e32 v4, v7
	s_mov_b32 s30, 0
	s_bcnt1_i32_b32 s31, exec_lo
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_11:                               ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_14 Depth 4
                                        ;         Child Loop BB2_43 Depth 4
                                        ;           Child Loop BB2_47 Depth 5
                                        ;           Child Loop BB2_75 Depth 5
                                        ;             Child Loop BB2_93 Depth 6
                                        ;             Child Loop BB2_101 Depth 6
                                        ;             Child Loop BB2_107 Depth 6
                                        ;             Child Loop BB2_116 Depth 6
                                        ;             Child Loop BB2_121 Depth 6
                                        ;             Child Loop BB2_123 Depth 6
                                        ;             Child Loop BB2_144 Depth 6
                                        ;             Child Loop BB2_152 Depth 6
                                        ;             Child Loop BB2_158 Depth 6
                                        ;             Child Loop BB2_167 Depth 6
                                        ;             Child Loop BB2_175 Depth 6
                                        ;             Child Loop BB2_178 Depth 6
                                        ;             Child Loop BB2_180 Depth 6
                                        ;             Child Loop BB2_182 Depth 6
                                        ;             Child Loop BB2_184 Depth 6
                                        ;             Child Loop BB2_186 Depth 6
                                        ;             Child Loop BB2_188 Depth 6
                                        ;             Child Loop BB2_210 Depth 6
                                        ;             Child Loop BB2_218 Depth 6
                                        ;             Child Loop BB2_224 Depth 6
                                        ;             Child Loop BB2_233 Depth 6
                                        ;             Child Loop BB2_240 Depth 6
                                        ;             Child Loop BB2_243 Depth 6
                                        ;             Child Loop BB2_248 Depth 6
                                        ;             Child Loop BB2_255 Depth 6
                                        ;             Child Loop BB2_288 Depth 6
                                        ;             Child Loop BB2_296 Depth 6
                                        ;             Child Loop BB2_302 Depth 6
                                        ;             Child Loop BB2_311 Depth 6
                                        ;           Child Loop BB2_320 Depth 5
                                        ;           Child Loop BB2_323 Depth 5
                                        ;           Child Loop BB2_325 Depth 5
                                        ;           Child Loop BB2_327 Depth 5
                                        ;           Child Loop BB2_329 Depth 5
                                        ;           Child Loop BB2_331 Depth 5
                                        ;           Child Loop BB2_333 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 7, v[4:5]
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v129
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_13
; %bb.12:                               ;   in Loop: Header=BB2_11 Depth=3
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v6, v[18:19], off glc
.LBB2_13:                               ;   in Loop: Header=BB2_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b64 v[18:19], 5, v[4:5]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+8
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, s2
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	global_load_b32 v3, v[18:19], off
	v_add_nc_u32_e32 v6, s2, v129
	s_mov_b32 s2, 0x10100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, 0xff00ff01, v6
	v_lshrrev_b32_e32 v18, 16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v18, 0x10100, v18
	v_sub_nc_u32_e32 v6, v6, v18
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
.LBB2_14:                               ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr15_vgpr16
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_u32_e32 0x100, v6
	s_xor_b32 s3, exec_lo, s3
; %bb.15:                               ;   in Loop: Header=BB2_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[15:16], null, v6, 24, v[21:22]
; %bb.16:                               ; %Flow1135
                                        ;   in Loop: Header=BB2_14 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB2_18
; %bb.17:                               ;   in Loop: Header=BB2_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v21, 0xffffff00, v6
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_lshrrev_b32_e32 v23, 8, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, v23, 24, v[15:16]
	v_and_b32_e32 v23, 0xff, v6
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, v23, 24, v[21:22]
.LBB2_18:                               ;   in Loop: Header=BB2_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v15, v[15:16], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v15, v3
	s_cbranch_vccz .LBB2_20
; %bb.19:                               ;   in Loop: Header=BB2_14 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v15, s3
	ds_bpermute_b32 v15, v15, v6
	s_branch .LBB2_21
.LBB2_20:                               ;   in Loop: Header=BB2_14 Depth=4
	v_mov_b32_e32 v15, -1
.LBB2_21:                               ;   in Loop: Header=BB2_14 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v15
	s_cmp_eq_u32 s5, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB2_24
; %bb.22:                               ;   in Loop: Header=BB2_14 Depth=4
	s_cmpk_lt_u32 s5, 0x100
	s_cbranch_scc0 .LBB2_25
; %bb.23:                               ;   in Loop: Header=BB2_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
	s_branch .LBB2_26
.LBB2_24:                               ;   in Loop: Header=BB2_14 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB2_29
.LBB2_25:                               ;   in Loop: Header=BB2_14 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB2_26:                               ; %Flow1128
                                        ;   in Loop: Header=BB2_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_28
; %bb.27:                               ;   in Loop: Header=BB2_14 Depth=4
	s_add_i32 s6, s5, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s16, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_and_b32 s5, s5, 0xff
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[21:22], null, s16, 24, v[15:16]
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
.LBB2_28:                               ; %Flow1129
                                        ;   in Loop: Header=BB2_14 Depth=4
	s_mov_b32 s5, 0
.LBB2_29:                               ; %Flow1131
                                        ;   in Loop: Header=BB2_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_33
; %bb.30:                               ;   in Loop: Header=BB2_14 Depth=4
	v_add_nc_u32_e32 v6, s31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, 0xff00ff01, v6
	v_lshrrev_b32_e32 v15, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v15, 0x10100, v15
	v_sub_nc_u32_e32 v6, v6, v15
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_32
; %bb.31:                               ;   in Loop: Header=BB2_14 Depth=4
	global_store_b32 v[18:19], v6, off
.LBB2_32:                               ;   in Loop: Header=BB2_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
	s_sub_i32 s2, s2, s31
.LBB2_33:                               ;   in Loop: Header=BB2_14 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB2_35
; %bb.34:                               ;   in Loop: Header=BB2_14 Depth=4
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr6
	s_branch .LBB2_36
.LBB2_35:                               ;   in Loop: Header=BB2_14 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s5, 0
	s_cselect_b32 s6, -1, 0
                                        ; implicit-def: $sgpr3
.LBB2_36:                               ; %Flow1137
                                        ;   in Loop: Header=BB2_14 Depth=4
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_14
; %bb.37:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB2_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB2_342
; %bb.38:                               ;   in Loop: Header=BB2_11 Depth=3
	v_and_b32_e32 v3, -2, v4
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e32 vcc_lo, v4, v7
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e64 s2, 14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s34, s2
	s_cbranch_execz .LBB2_341
; %bb.39:                               ;   in Loop: Header=BB2_11 Depth=3
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_41
; %bb.40:                               ;   in Loop: Header=BB2_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_add_co_u32 v11, vcc_lo, s24, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s25, v12, vcc_lo
	global_load_b32 v4, v[11:12], off offset:2048 glc
.LBB2_41:                               ;   in Loop: Header=BB2_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v4
	v_add_nc_u32_e32 v22, 2, v3
	s_mov_b32 s6, -1
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_gt_u32 s36, 0x100ff
	s_cbranch_scc1 .LBB2_340
; %bb.42:                               ;   in Loop: Header=BB2_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_bcnt1_i32_b32 s35, exec_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+76
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+84
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+68
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+76
	s_add_u32 s1, s24, 0x800
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_lshlrev_b64 v[3:4], 5, v[3:4]
	v_lshrrev_b64 v[15:16], v22, 0xbf
	v_mbcnt_lo_u32_b32 v130, exec_lo, 0
	v_mov_b32_e32 v23, v5
	v_mov_b32_e32 v24, v5
	v_add_co_u32 v70, vcc_lo, s24, v11
	v_add_co_ci_u32_e32 v71, vcc_lo, s25, v12, vcc_lo
	v_add_co_u32 v80, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v81, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v82, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v83, vcc_lo, s7, v4, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v84, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1000
	v_add_co_ci_u32_e32 v85, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v86, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x2000
	v_add_co_ci_u32_e32 v87, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v96, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1800
	v_add_co_ci_u32_e32 v97, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s5, s25, 0
	v_add_co_u32 v98, vcc_lo, s1, v11
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+88
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+96
	v_add_co_ci_u32_e32 v99, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v100, vcc_lo, v3, s2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+84
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+92
	v_add_co_ci_u32_e32 v101, vcc_lo, s3, v4, vcc_lo
	v_and_b32_e32 v6, 1, v15
	v_add_co_u32 v102, vcc_lo, v3, s6
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+92
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+100
	v_add_co_ci_u32_e32 v103, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v112, vcc_lo, v3, s2
	v_cmp_eq_u32_e64 s1, 1, v6
	v_add_co_ci_u32_e32 v113, vcc_lo, s3, v4, vcc_lo
	v_mov_b32_e32 v25, v5
                                        ; implicit-def: $vgpr114_vgpr115
.LBB2_43:                               ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB2_47 Depth 5
                                        ;           Child Loop BB2_75 Depth 5
                                        ;             Child Loop BB2_93 Depth 6
                                        ;             Child Loop BB2_101 Depth 6
                                        ;             Child Loop BB2_107 Depth 6
                                        ;             Child Loop BB2_116 Depth 6
                                        ;             Child Loop BB2_121 Depth 6
                                        ;             Child Loop BB2_123 Depth 6
                                        ;             Child Loop BB2_144 Depth 6
                                        ;             Child Loop BB2_152 Depth 6
                                        ;             Child Loop BB2_158 Depth 6
                                        ;             Child Loop BB2_167 Depth 6
                                        ;             Child Loop BB2_175 Depth 6
                                        ;             Child Loop BB2_178 Depth 6
                                        ;             Child Loop BB2_180 Depth 6
                                        ;             Child Loop BB2_182 Depth 6
                                        ;             Child Loop BB2_184 Depth 6
                                        ;             Child Loop BB2_186 Depth 6
                                        ;             Child Loop BB2_188 Depth 6
                                        ;             Child Loop BB2_210 Depth 6
                                        ;             Child Loop BB2_218 Depth 6
                                        ;             Child Loop BB2_224 Depth 6
                                        ;             Child Loop BB2_233 Depth 6
                                        ;             Child Loop BB2_240 Depth 6
                                        ;             Child Loop BB2_243 Depth 6
                                        ;             Child Loop BB2_248 Depth 6
                                        ;             Child Loop BB2_255 Depth 6
                                        ;             Child Loop BB2_288 Depth 6
                                        ;             Child Loop BB2_296 Depth 6
                                        ;             Child Loop BB2_302 Depth 6
                                        ;             Child Loop BB2_311 Depth 6
                                        ;           Child Loop BB2_320 Depth 5
                                        ;           Child Loop BB2_323 Depth 5
                                        ;           Child Loop BB2_325 Depth 5
                                        ;           Child Loop BB2_327 Depth 5
                                        ;           Child Loop BB2_329 Depth 5
                                        ;           Child Loop BB2_331 Depth 5
                                        ;           Child Loop BB2_333 Depth 5
	s_cmp_eq_u32 s36, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB2_72
; %bb.44:                               ;   in Loop: Header=BB2_43 Depth=4
	v_cmp_eq_u32_e64 s2, 0, v130
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_46
; %bb.45:                               ;   in Loop: Header=BB2_43 Depth=4
	global_load_b32 v3, v[70:71], off glc
.LBB2_46:                               ;   in Loop: Header=BB2_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v6, v[80:81], off
	v_cvt_f32_u32_e32 v4, s36
	s_sub_i32 s3, 0, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s3, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s3, v3
	v_add_nc_u32_e32 v3, s3, v130
	s_mov_b32 s3, s36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
.LBB2_47:                               ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v12
	s_xor_b32 s6, exec_lo, s6
; %bb.48:                               ;   in Loop: Header=BB2_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[3:4], null, v12, 24, v[15:16]
; %bb.49:                               ; %Flow952
                                        ;   in Loop: Header=BB2_47 Depth=5
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB2_51
; %bb.50:                               ;   in Loop: Header=BB2_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	v_add_nc_u32_e32 v15, 0xffffff00, v12
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_lshrrev_b32_e32 v18, 8, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v12
	global_load_b64 v[15:16], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[15:16]
.LBB2_51:                               ;   in Loop: Header=BB2_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB2_53
; %bb.52:                               ;   in Loop: Header=BB2_47 Depth=5
	s_ctz_i32_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_mov_b32_e32 v3, s6
	ds_bpermute_b32 v3, v3, v12
	s_branch .LBB2_54
.LBB2_53:                               ;   in Loop: Header=BB2_47 Depth=5
	v_mov_b32_e32 v3, -1
.LBB2_54:                               ;   in Loop: Header=BB2_47 Depth=5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v3
	s_cmp_eq_u32 s7, -1
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_57
; %bb.55:                               ;   in Loop: Header=BB2_47 Depth=5
	s_cmpk_lt_u32 s7, 0x100
	s_cbranch_scc0 .LBB2_58
; %bb.56:                               ;   in Loop: Header=BB2_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	s_mov_b32 s16, 0
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
	s_branch .LBB2_59
.LBB2_57:                               ;   in Loop: Header=BB2_47 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB2_62
.LBB2_58:                               ;   in Loop: Header=BB2_47 Depth=5
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB2_59:                               ; %Flow946
                                        ;   in Loop: Header=BB2_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB2_61
; %bb.60:                               ;   in Loop: Header=BB2_47 Depth=5
	s_add_i32 s16, s7, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s18, s16, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s7, s7, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[15:16], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
.LBB2_61:                               ; %Flow947
                                        ;   in Loop: Header=BB2_47 Depth=5
	s_mov_b32 s7, 0
.LBB2_62:                               ; %Flow948
                                        ;   in Loop: Header=BB2_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB2_66
; %bb.63:                               ;   in Loop: Header=BB2_47 Depth=5
	v_add_nc_u32_e32 v3, s35, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB2_65
; %bb.64:                               ;   in Loop: Header=BB2_47 Depth=5
	global_store_b32 v[70:71], v12, off
.LBB2_65:                               ;   in Loop: Header=BB2_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_sub_i32 s3, s3, s35
.LBB2_66:                               ;   in Loop: Header=BB2_47 Depth=5
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB2_68
; %bb.67:                               ;   in Loop: Header=BB2_47 Depth=5
	s_mov_b32 s6, 0
	s_mov_b32 s7, -1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr12
	s_branch .LBB2_69
.LBB2_68:                               ;   in Loop: Header=BB2_47 Depth=5
	s_cmp_lt_i32 s3, 1
	s_mov_b32 s7, 0
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $sgpr6
.LBB2_69:                               ; %Flow954
                                        ;   in Loop: Header=BB2_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_71
; %bb.70:                               ;   in Loop: Header=BB2_47 Depth=5
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_branch .LBB2_47
.LBB2_71:                               ; %loop.exit.guard903
                                        ;   in Loop: Header=BB2_43 Depth=4
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_xor_b32 s2, s7, -1
	s_branch .LBB2_73
.LBB2_72:                               ;   in Loop: Header=BB2_43 Depth=4
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $sgpr6
.LBB2_73:                               ; %Flow1121
                                        ;   in Loop: Header=BB2_43 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB2_314
; %bb.74:                               ; %.loopexit188
                                        ;   in Loop: Header=BB2_43 Depth=4
	v_mbcnt_lo_u32_b32 v131, exec_lo, 0
                                        ; implicit-def: $vgpr116_vgpr117
.LBB2_75:                               ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB2_93 Depth 6
                                        ;             Child Loop BB2_101 Depth 6
                                        ;             Child Loop BB2_107 Depth 6
                                        ;             Child Loop BB2_116 Depth 6
                                        ;             Child Loop BB2_121 Depth 6
                                        ;             Child Loop BB2_123 Depth 6
                                        ;             Child Loop BB2_144 Depth 6
                                        ;             Child Loop BB2_152 Depth 6
                                        ;             Child Loop BB2_158 Depth 6
                                        ;             Child Loop BB2_167 Depth 6
                                        ;             Child Loop BB2_175 Depth 6
                                        ;             Child Loop BB2_178 Depth 6
                                        ;             Child Loop BB2_180 Depth 6
                                        ;             Child Loop BB2_182 Depth 6
                                        ;             Child Loop BB2_184 Depth 6
                                        ;             Child Loop BB2_186 Depth 6
                                        ;             Child Loop BB2_188 Depth 6
                                        ;             Child Loop BB2_210 Depth 6
                                        ;             Child Loop BB2_218 Depth 6
                                        ;             Child Loop BB2_224 Depth 6
                                        ;             Child Loop BB2_233 Depth 6
                                        ;             Child Loop BB2_240 Depth 6
                                        ;             Child Loop BB2_243 Depth 6
                                        ;             Child Loop BB2_248 Depth 6
                                        ;             Child Loop BB2_255 Depth 6
                                        ;             Child Loop BB2_288 Depth 6
                                        ;             Child Loop BB2_296 Depth 6
                                        ;             Child Loop BB2_302 Depth 6
                                        ;             Child Loop BB2_311 Depth 6
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_77
; %bb.76:                               ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v3, v[84:85], off glc
.LBB2_77:                               ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB2_137
; %bb.78:                               ;   in Loop: Header=BB2_75 Depth=5
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_80
; %bb.79:                               ;   in Loop: Header=BB2_75 Depth=5
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[86:87], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB2_80:                               ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s38, v3
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc1 .LBB2_138
; %bb.81:                               ;   in Loop: Header=BB2_75 Depth=5
	v_mbcnt_lo_u32_b32 v21, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_83
; %bb.82:                               ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v3, v[86:87], off glc
.LBB2_83:                               ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s5, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB2_171
; %bb.84:                               ;   in Loop: Header=BB2_75 Depth=5
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_88
; %bb.85:                               ;   in Loop: Header=BB2_75 Depth=5
	global_load_b64 v[28:29], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s3, s6, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s3, s7, v29, s3
	v_cmp_lt_u64_e64 s3, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s16, s3
	s_cbranch_execz .LBB2_87
; %bb.86:                               ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[96:97], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, v[3:4], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s3
.LBB2_87:                               ; %Flow1110
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s16
.LBB2_88:                               ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s39, v3
	s_mov_b32 s5, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s39, 1
	s_cbranch_scc1 .LBB2_171
; %bb.89:                               ;   in Loop: Header=BB2_75 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB2_118
; %bb.90:                               ;   in Loop: Header=BB2_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_96
; %bb.91:                               ;   in Loop: Header=BB2_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB2_95
; %bb.92:                               ; %.preheader3.i.i.i117.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_93:                               ; %.preheader3.i.i.i117
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_93
; %bb.94:                               ; %Flow1104
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_95:                               ; %Flow1106
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_96:                               ; %.loopexit4.i.i.i112
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s40, s7, 24
	s_mul_hi_u32 s41, s6, 24
	s_mul_i32 s42, s6, 24
	s_and_saveexec_b32 s43, s3
	s_cbranch_execz .LBB2_98
; %bb.97:                               ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s41, s40
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB2_98:                               ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s43
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_mov_b32_e32 v15, v5
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v29, s5
	v_mov_b32_e32 v30, s6
	v_mov_b32_e32 v28, s4
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_106
; %bb.99:                               ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB2_102
; %bb.100:                              ; %.preheader1.i.i.i115.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_101:                              ; %.preheader1.i.i.i115
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[30:31]
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_101
.LBB2_102:                              ; %Flow1102
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_104
; %bb.103:                              ;   in Loop: Header=BB2_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB2_104:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB2_106
; %bb.105:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_106:                              ; %Flow1103
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s41, s41, s40
	v_add_co_u32 v3, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v4, vcc_lo, s41, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_107:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_109
; %bb.108:                              ;   in Loop: Header=BB2_107 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_109:                              ;   in Loop: Header=BB2_107 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_111
; %bb.110:                              ;   in Loop: Header=BB2_107 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_112
.LBB2_111:                              ;   in Loop: Header=BB2_107 Depth=6
	s_mov_b32 s5, -1
.LBB2_112:                              ; %Flow1097
                                        ;   in Loop: Header=BB2_107 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_107
; %bb.113:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_117
; %bb.114:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v29, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v28 :: v_dual_cndmask_b32 v26, v26, v6
	v_mov_b32_e32 v28, v15
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_117
; %bb.115:                              ; %.preheader.i.i.i114.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s3, 0
.LBB2_116:                              ; %.preheader.i.i.i114
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[28:29]
	v_dual_mov_b32 v29, v16 :: v_dual_mov_b32 v28, v15
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_116
.LBB2_117:                              ; %Flow1095
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_118:                              ; %Flow1107
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB2_170
; %bb.119:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s3, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB2_122
; %bb.120:                              ; %.preheader175.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s3
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s3, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s3
.LBB2_121:                              ; %.preheader175
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s3, v3, s7
	v_add_co_ci_u32_e64 v4, s3, 0, v4, s3
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB2_121
.LBB2_122:                              ; %Flow1089
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB2_123:                              ; %.loopexit176
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_125
; %bb.124:                              ;   in Loop: Header=BB2_123 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB2_125:                              ;   in Loop: Header=BB2_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB2_132
; %bb.126:                              ;   in Loop: Header=BB2_123 Depth=6
	v_mov_b32_e32 v3, s39
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB2_130
; %bb.127:                              ;   in Loop: Header=BB2_123 Depth=6
	s_add_i32 s3, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s3, s3, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[11:12], null, s3, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[3:4]
	v_mov_b32_e32 v3, s39
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s3
	s_cbranch_execz .LBB2_129
; %bb.128:                              ;   in Loop: Header=BB2_123 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[86:87], v68, off
	v_mov_b32_e32 v3, 0
.LBB2_129:                              ; %Flow1082
                                        ;   in Loop: Header=BB2_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_130:                              ;   in Loop: Header=BB2_123 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB2_133
; %bb.131:                              ;   in Loop: Header=BB2_123 Depth=6
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr39
	s_branch .LBB2_134
.LBB2_132:                              ;   in Loop: Header=BB2_123 Depth=6
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $sgpr7
	s_branch .LBB2_135
.LBB2_133:                              ;   in Loop: Header=BB2_123 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
.LBB2_134:                              ; %Flow1086
                                        ;   in Loop: Header=BB2_123 Depth=6
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB2_135:                              ; %Flow1085
                                        ;   in Loop: Header=BB2_123 Depth=6
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_139
; %bb.136:                              ;   in Loop: Header=BB2_123 Depth=6
	s_mov_b32 s39, s3
	s_branch .LBB2_123
.LBB2_137:                              ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v4 :: v_dual_mov_b32 v116, v3
	s_branch .LBB2_199
.LBB2_138:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB2_191
.LBB2_139:                              ; %loop.exit.guard909
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_169
; %bb.140:                              ;   in Loop: Header=BB2_75 Depth=5
	s_and_saveexec_b32 s40, s5
	s_cbranch_execz .LBB2_168
; %bb.141:                              ;   in Loop: Header=BB2_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_147
; %bb.142:                              ;   in Loop: Header=BB2_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB2_146
; %bb.143:                              ; %.preheader3.i.i.i124.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_144:                              ; %.preheader3.i.i.i124
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_144
; %bb.145:                              ; %Flow1077
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_146:                              ; %Flow1079
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_147:                              ; %.loopexit4.i.i.i119
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s41, s7, 24
	s_mul_hi_u32 s42, s6, 24
	s_mul_i32 s43, s6, 24
	s_and_saveexec_b32 s44, s3
	s_cbranch_execz .LBB2_149
; %bb.148:                              ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s42, s41
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB2_149:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s44
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_157
; %bb.150:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s20 :: v_dual_mov_b32 v133, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB2_153
; %bb.151:                              ; %.preheader1.i.i.i122.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_152:                              ; %.preheader1.i.i.i122
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_152
.LBB2_153:                              ; %Flow1075
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_155
; %bb.154:                              ;   in Loop: Header=BB2_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB2_155:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB2_157
; %bb.156:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_157:                              ; %Flow1076
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s42, s42, s41
	v_add_co_u32 v3, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v4, vcc_lo, s42, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_158:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB2_160
; %bb.159:                              ;   in Loop: Header=BB2_158 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_160:                              ;   in Loop: Header=BB2_158 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_162
; %bb.161:                              ;   in Loop: Header=BB2_158 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_163
.LBB2_162:                              ;   in Loop: Header=BB2_158 Depth=6
	s_mov_b32 s5, -1
.LBB2_163:                              ; %Flow1070
                                        ;   in Loop: Header=BB2_158 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_158
; %bb.164:                              ;   in Loop: Header=BB2_75 Depth=5
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB2_168
; %bb.165:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_168
; %bb.166:                              ; %.preheader.i.i.i121.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s3, 0
.LBB2_167:                              ; %.preheader.i.i.i121
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_167
.LBB2_168:                              ; %Flow1080
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_mov_b32 s7, s39
.LBB2_169:                              ; %Flow1081
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s39, s7
.LBB2_170:                              ; %Flow1091
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s39
.LBB2_171:                              ; %__ockl_devmem_request.exit125
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB2_190
; %bb.172:                              ;   in Loop: Header=BB2_75 Depth=5
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_189
; %bb.173:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b64 v[3:4], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_189
; %bb.174:                              ;   in Loop: Header=BB2_75 Depth=5
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s16, s6
	s_addc_u32 s7, s17, s7
.LBB2_175:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x659
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB2_178
; %bb.176:                              ; %.preheader11.i138
                                        ;   in Loop: Header=BB2_175 Depth=6
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB2_175
.LBB2_177:                              ; %.preheader9.i137
                                        ;   in Loop: Header=BB2_178 Depth=6
	s_sleep 63
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_178:                              ; %Flow1061
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x326
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB2_177
; %bb.179:                              ; %Flow1058
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB2_182
.LBB2_180:                              ; %.preheader7.i136
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 31
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB2_180
	s_branch .LBB2_182
.LBB2_181:                              ; %.preheader5.i135
                                        ;   in Loop: Header=BB2_182 Depth=6
	s_sleep 15
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_182:                              ; %.loopexit8.i128
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0xc0
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB2_181
	s_branch .LBB2_184
.LBB2_183:                              ; %.preheader3.i134
                                        ;   in Loop: Header=BB2_184 Depth=6
	s_sleep 7
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_184:                              ; %Flow1052
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x59
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB2_183
	s_branch .LBB2_186
.LBB2_185:                              ; %.preheader1.i133
                                        ;   in Loop: Header=BB2_186 Depth=6
	s_sleep 3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_186:                              ; %Flow1049
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 38
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB2_185
; %bb.187:                              ; %Flow1046
                                        ;   in Loop: Header=BB2_75 Depth=5
	v_cmp_le_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB2_189
.LBB2_188:                              ; %.preheader.i132
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB2_188
.LBB2_189:                              ; %__ockl_rtcwait_u32.exit139
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	s_cmp_lg_u32 s5, 2
	v_mov_b32_e32 v117, s4
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v116, 0, 1, s5
.LBB2_190:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s18, 0
.LBB2_191:                              ; %Flow1113
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB2_199
; %bb.192:                              ;   in Loop: Header=BB2_75 Depth=5
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_196
; %bb.193:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b64 v[28:29], v[98:99], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v28
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_195
; %bb.194:                              ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[98:99], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[28:29]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB2_195:                              ; %Flow1040
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_196:                              ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	v_readfirstlane_b32 s7, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB2_200
; %bb.197:                              ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
.LBB2_198:                              ; %Flow1039
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v16 :: v_dual_mov_b32 v116, v15
.LBB2_199:                              ; %Flow1116
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB2_75
	s_branch .LBB2_315
.LBB2_200:                              ;   in Loop: Header=BB2_75 Depth=5
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_236
; %bb.201:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB2_205
; %bb.202:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s5, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s5, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB2_204
; %bb.203:                              ;   in Loop: Header=BB2_75 Depth=5
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s5, s5, 21
	v_mov_b32_e32 v4, s5
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB2_204:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v4
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[6:7]
	v_cmp_ge_u64_e64 s2, v[3:4], v[11:12]
	s_branch .LBB2_206
.LBB2_205:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB2_206:                              ; %Flow1037
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s20, s2
	s_cbranch_execz .LBB2_235
; %bb.207:                              ;   in Loop: Header=BB2_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_213
; %bb.208:                              ;   in Loop: Header=BB2_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB2_212
; %bb.209:                              ; %.preheader3.i.i.i145.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_210:                              ; %.preheader3.i.i.i145
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b64 v[26:27], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v28
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v29
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_210
; %bb.211:                              ; %Flow1033
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_212:                              ; %Flow1035
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_213:                              ; %.loopexit4.i.i.i140
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s39, s6, 24
	s_mul_i32 s40, s6, 24
	s_and_saveexec_b32 s41, s2
	s_cbranch_execz .LBB2_215
; %bb.214:                              ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s39, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB2_215:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s41
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v29, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_223
; %bb.216:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB2_219
; %bb.217:                              ; %.preheader1.i.i.i143.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_218:                              ; %.preheader1.i.i.i143
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[30:31]
	v_dual_mov_b32 v31, v19 :: v_dual_mov_b32 v30, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_218
.LBB2_219:                              ; %Flow1031
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_221
; %bb.220:                              ;   in Loop: Header=BB2_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB2_221:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[28:29], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[28:29]
	s_cbranch_vccnz .LBB2_223
; %bb.222:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[28:29], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_223:                              ; %Flow1032
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s39, s39, s21
	v_add_co_u32 v3, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_224:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_226
; %bb.225:                              ;   in Loop: Header=BB2_224 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_226:                              ;   in Loop: Header=BB2_224 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_228
; %bb.227:                              ;   in Loop: Header=BB2_224 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_229
.LBB2_228:                              ;   in Loop: Header=BB2_224 Depth=6
	s_mov_b32 s5, -1
.LBB2_229:                              ; %Flow1026
                                        ;   in Loop: Header=BB2_224 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_224
; %bb.230:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_234
; %bb.231:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17] offset:24 glc
	global_load_b64 v[28:29], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v21 :: v_dual_cndmask_b32 v26, v26, v6
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v28, v11
	v_mov_b32_e32 v28, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v29, v6, vcc_lo
	v_mov_b32_e32 v29, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_234
; %bb.232:                              ; %.preheader.i.i.i142.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s2, 0
.LBB2_233:                              ; %.preheader.i.i.i142
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[28:29]
	v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_233
.LBB2_234:                              ; %Flow1024
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_235:                              ; %Flow1038
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB2_236:                              ; %__ockl_devmem_request.exit146
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v3
	v_readfirstlane_b32 s17, v4
	s_cmp_eq_u64 s[16:17], 0
	s_cbranch_scc1 .LBB2_281
; %bb.237:                              ;   in Loop: Header=BB2_75 Depth=5
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[82:83], off
	s_bcnt1_i32_b32 s3, exec_lo
	s_add_u32 s6, s16, 16
	s_addc_u32 s7, s17, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB2_245
; %bb.238:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v15, v[100:101], off
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB2_241
; %bb.239:                              ; %.preheader172.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB2_240:                              ; %.preheader172
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB2_240
.LBB2_241:                              ; %Flow1013
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	global_load_b32 v16, v[102:103], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB2_244
; %bb.242:                              ; %.preheader170.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	v_mul_lo_u32 v12, v15, s3
	s_mov_b32 s18, 0
.LBB2_243:                              ; %.preheader170
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB2_243
.LBB2_244:                              ; %Flow1010
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_245:                              ; %Flow1018
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB2_250
; %bb.246:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB2_249
; %bb.247:                              ; %.preheader.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v15, v[112:113], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB2_248:                              ; %.preheader
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB2_248
.LBB2_249:                              ; %Flow1016
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
.LBB2_250:                              ; %.loopexit
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_254
; %bb.251:                              ;   in Loop: Header=BB2_75 Depth=5
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB2_253
; %bb.252:                              ;   in Loop: Header=BB2_75 Depth=5
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB2_253:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	global_store_b128 v5, v[22:25], s[16:17]
.LBB2_254:                              ; %Flow1007
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $sgpr5
.LBB2_255:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, s37
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_257
; %bb.256:                              ;   in Loop: Header=BB2_255 Depth=6
	global_load_b32 v3, v[84:85], off glc
.LBB2_257:                              ;   in Loop: Header=BB2_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB2_264
; %bb.258:                              ;   in Loop: Header=BB2_255 Depth=6
	v_mov_b32_e32 v3, s38
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_260
; %bb.259:                              ;   in Loop: Header=BB2_255 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB2_260:                              ;   in Loop: Header=BB2_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s38, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc0 .LBB2_265
; %bb.261:                              ;   in Loop: Header=BB2_255 Depth=6
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_272
; %bb.262:                              ;   in Loop: Header=BB2_255 Depth=6
	s_cmpk_lt_u32 s37, 0x100
	s_cbranch_scc0 .LBB2_266
; %bb.263:                              ;   in Loop: Header=BB2_255 Depth=6
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[11:12], null, s37, 24, v[3:4]
	s_branch .LBB2_267
.LBB2_264:                              ;   in Loop: Header=BB2_255 Depth=6
	s_mov_b64 s[2:3], 0
	s_mov_b32 s20, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB2_277
.LBB2_265:                              ;   in Loop: Header=BB2_255 Depth=6
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB2_276
.LBB2_266:                              ;   in Loop: Header=BB2_255 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_267:                              ; %Flow999
                                        ;   in Loop: Header=BB2_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_269
; %bb.268:                              ;   in Loop: Header=BB2_255 Depth=6
	s_add_i32 s6, s37, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s18, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_and_b32 s6, s37, 0xff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB2_269:                              ;   in Loop: Header=BB2_255 Depth=6
	v_dual_mov_b32 v15, s37 :: v_dual_mov_b32 v4, s17
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[16:17] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB2_271
; %bb.270:                              ;   in Loop: Header=BB2_255 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[84:85], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB2_271:                              ; %Flow997
                                        ;   in Loop: Header=BB2_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_272:                              ; %Flow1000
                                        ;   in Loop: Header=BB2_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB2_274
; %bb.273:                              ;   in Loop: Header=BB2_255 Depth=6
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
	s_branch .LBB2_275
.LBB2_274:                              ;   in Loop: Header=BB2_255 Depth=6
	s_mov_b32 s19, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_sleep 2
.LBB2_275:                              ; %Flow1005
                                        ;   in Loop: Header=BB2_255 Depth=6
	s_mov_b32 s18, 0
.LBB2_276:                              ; %Flow1004
                                        ;   in Loop: Header=BB2_255 Depth=6
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_mov_b32 s20, 0
	s_or_b32 s5, s3, s2
                                        ; implicit-def: $sgpr2_sgpr3
.LBB2_277:                              ; %Flow1003
                                        ;   in Loop: Header=BB2_255 Depth=6
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB2_255
; %bb.278:                              ; %loop.exit.guard913
                                        ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
	s_and_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB2_198
; %bb.279:                              ; %loop.exit.guard914
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB2_282
; %bb.280:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB2_283
.LBB2_281:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB2_198
.LBB2_282:                              ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB2_283:                              ; %Flow994
                                        ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB2_198
; %bb.284:                              ;   in Loop: Header=BB2_75 Depth=5
	s_and_saveexec_b32 s3, s5
	s_cbranch_execz .LBB2_313
; %bb.285:                              ;   in Loop: Header=BB2_75 Depth=5
	s_load_b64 s[18:19], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_291
; %bb.286:                              ;   in Loop: Header=BB2_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[18:19] offset:40
	global_load_b64 v[15:16], v5, s[18:19]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB2_290
; %bb.287:                              ; %.preheader3.i.i.i152.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_288:                              ; %.preheader3.i.i.i152
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b64 v[18:19], v5, s[18:19]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_288
; %bb.289:                              ; %Flow990
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_290:                              ; %Flow992
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_291:                              ; %.loopexit4.i.i.i147
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b128 v[26:29], v5, s[18:19]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s37, s7, 24
	s_mul_hi_u32 s38, s6, 24
	s_mul_i32 s39, s6, 24
	s_and_saveexec_b32 s40, s2
	s_cbranch_execz .LBB2_293
; %bb.292:                              ;   in Loop: Header=BB2_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s38, s37
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB2_293:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_301
; %bb.294:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x1
	global_load_b64 v[133:134], v5, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v132, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[133:134], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[131:134], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[133:134]
	s_cbranch_execz .LBB2_297
; %bb.295:                              ; %.preheader1.i.i.i150.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s7, 0
.LBB2_296:                              ; %.preheader1.i.i.i150
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_296
.LBB2_297:                              ; %Flow988
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[18:19] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_299
; %bb.298:                              ;   in Loop: Header=BB2_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB2_299:                              ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB2_301
; %bb.300:                              ;   in Loop: Header=BB2_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_301:                              ; %Flow989
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s38, s38, s37
	v_add_co_u32 v3, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v4, vcc_lo, s38, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_302:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_304
; %bb.303:                              ;   in Loop: Header=BB2_302 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_304:                              ;   in Loop: Header=BB2_302 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_306
; %bb.305:                              ;   in Loop: Header=BB2_302 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_307
.LBB2_306:                              ;   in Loop: Header=BB2_302 Depth=6
	s_mov_b32 s5, -1
.LBB2_307:                              ; %Flow983
                                        ;   in Loop: Header=BB2_302 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_302
; %bb.308:                              ;   in Loop: Header=BB2_75 Depth=5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_312
; %bb.309:                              ;   in Loop: Header=BB2_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	global_load_b64 v[11:12], v5, s[18:19] offset:24 glc
	global_load_b64 v[15:16], v5, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_312
; %bb.310:                              ; %.preheader.i.i.i149.preheader
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_mov_b32 s2, 0
.LBB2_311:                              ; %.preheader.i.i.i149
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ;           Parent Loop BB2_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_311
.LBB2_312:                              ; %Flow981
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v131, 0
.LBB2_313:                              ; %Flow993
                                        ;   in Loop: Header=BB2_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v15, v116 :: v_dual_mov_b32 v16, v117
	s_mov_b32 s18, -1
	s_branch .LBB2_198
.LBB2_314:                              ;   in Loop: Header=BB2_43 Depth=4
                                        ; implicit-def: $vgpr114_vgpr115
                                        ; implicit-def: $sgpr36
                                        ; implicit-def: $vgpr130
	s_branch .LBB2_338
.LBB2_315:                              ;   in Loop: Header=BB2_43 Depth=4
	v_cmp_ne_u64_e64 s5, 1, v[116:117]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB2_317
; %bb.316:                              ;   in Loop: Header=BB2_43 Depth=4
	v_dual_mov_b32 v114, v116 :: v_dual_mov_b32 v115, v117
	s_branch .LBB2_337
.LBB2_317:                              ;   in Loop: Header=BB2_43 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_334
; %bb.318:                              ;   in Loop: Header=BB2_43 Depth=4
	global_load_b64 v[3:4], v[98:99], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_334
; %bb.319:                              ;   in Loop: Header=BB2_43 Depth=4
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB2_320:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB2_323
; %bb.321:                              ; %.preheader11.i166
                                        ;   in Loop: Header=BB2_320 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB2_320
.LBB2_322:                              ; %.preheader9.i165
                                        ;   in Loop: Header=BB2_323 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_323:                              ; %Flow975
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB2_322
; %bb.324:                              ; %Flow972
                                        ;   in Loop: Header=BB2_43 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB2_327
.LBB2_325:                              ; %.preheader7.i164
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB2_325
	s_branch .LBB2_327
.LBB2_326:                              ; %.preheader5.i163
                                        ;   in Loop: Header=BB2_327 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_327:                              ; %.loopexit8.i156
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB2_326
	s_branch .LBB2_329
.LBB2_328:                              ; %.preheader3.i162
                                        ;   in Loop: Header=BB2_329 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_329:                              ; %Flow966
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB2_328
	s_branch .LBB2_331
.LBB2_330:                              ; %.preheader1.i161
                                        ;   in Loop: Header=BB2_331 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_331:                              ; %Flow963
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB2_330
; %bb.332:                              ; %Flow960
                                        ;   in Loop: Header=BB2_43 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_334
.LBB2_333:                              ; %.preheader.i160
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_11 Depth=3
                                        ;         Parent Loop BB2_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_333
.LBB2_334:                              ; %__ockl_rtcwait_u32.exit167
                                        ;   in Loop: Header=BB2_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	v_mov_b32_e32 v3, s36
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v130
	s_cbranch_execz .LBB2_336
; %bb.335:                              ;   in Loop: Header=BB2_43 Depth=4
	global_load_b32 v3, v[84:85], off glc
.LBB2_336:                              ;   in Loop: Header=BB2_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v3
.LBB2_337:                              ;   in Loop: Header=BB2_43 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_mov_b32 s6, 0
.LBB2_338:                              ; %Flow1122
                                        ;   in Loop: Header=BB2_43 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB2_43
; %bb.339:                              ; %Flow1123
                                        ;   in Loop: Header=BB2_11 Depth=3
	v_mov_b32_e32 v22, v7
.LBB2_340:                              ; %Flow1124
                                        ;   in Loop: Header=BB2_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v22
	s_and_b32 s3, s6, exec_lo
.LBB2_341:                              ; %Flow1126
                                        ;   in Loop: Header=BB2_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
.LBB2_342:                              ; %.loopexit187
                                        ;   in Loop: Header=BB2_11 Depth=3
	s_xor_b32 s1, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s30, s1, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB2_11
; %bb.343:                              ; %Flow1139
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s1, 0
	s_branch .LBB2_345
.LBB2_344:                              ;   in Loop: Header=BB2_6 Depth=2
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_345:                              ; %Flow1321
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB2_642
; %bb.346:                              ;   in Loop: Header=BB2_6 Depth=2
	v_mbcnt_lo_u32_b32 v70, exec_lo, 0
	s_bcnt1_i32_b32 s30, exec_lo
                                        ; implicit-def: $vgpr28_vgpr29
.LBB2_347:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB2_351 Depth 4
                                        ;         Child Loop BB2_378 Depth 4
                                        ;           Child Loop BB2_396 Depth 5
                                        ;           Child Loop BB2_404 Depth 5
                                        ;           Child Loop BB2_410 Depth 5
                                        ;           Child Loop BB2_419 Depth 5
                                        ;           Child Loop BB2_424 Depth 5
                                        ;           Child Loop BB2_426 Depth 5
                                        ;           Child Loop BB2_447 Depth 5
                                        ;           Child Loop BB2_455 Depth 5
                                        ;           Child Loop BB2_461 Depth 5
                                        ;           Child Loop BB2_470 Depth 5
                                        ;           Child Loop BB2_478 Depth 5
                                        ;           Child Loop BB2_481 Depth 5
                                        ;           Child Loop BB2_483 Depth 5
                                        ;           Child Loop BB2_485 Depth 5
                                        ;           Child Loop BB2_487 Depth 5
                                        ;           Child Loop BB2_489 Depth 5
                                        ;           Child Loop BB2_491 Depth 5
                                        ;           Child Loop BB2_513 Depth 5
                                        ;           Child Loop BB2_521 Depth 5
                                        ;           Child Loop BB2_527 Depth 5
                                        ;           Child Loop BB2_536 Depth 5
                                        ;           Child Loop BB2_543 Depth 5
                                        ;           Child Loop BB2_546 Depth 5
                                        ;           Child Loop BB2_551 Depth 5
                                        ;           Child Loop BB2_558 Depth 5
                                        ;           Child Loop BB2_591 Depth 5
                                        ;           Child Loop BB2_599 Depth 5
                                        ;           Child Loop BB2_605 Depth 5
                                        ;           Child Loop BB2_614 Depth 5
                                        ;         Child Loop BB2_623 Depth 4
                                        ;         Child Loop BB2_626 Depth 4
                                        ;         Child Loop BB2_628 Depth 4
                                        ;         Child Loop BB2_630 Depth 4
                                        ;         Child Loop BB2_632 Depth 4
                                        ;         Child Loop BB2_634 Depth 4
                                        ;         Child Loop BB2_636 Depth 4
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u32 s29, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB2_375
; %bb.348:                              ;   in Loop: Header=BB2_347 Depth=3
	v_cmp_eq_u32_e64 s1, 0, v70
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_350
; %bb.349:                              ;   in Loop: Header=BB2_347 Depth=3
	global_load_b32 v3, v[34:35], off glc
.LBB2_350:                              ;   in Loop: Header=BB2_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b32 v6, v[36:37], off
	v_cvt_f32_u32_e32 v4, s29
	s_sub_i32 s2, 0, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s2, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v3
	v_add_nc_u32_e32 v3, s2, v70
	s_mov_b32 s2, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v15, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
.LBB2_351:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v16
	s_xor_b32 s3, exec_lo, s3
; %bb.352:                              ;   in Loop: Header=BB2_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, 0x1800, v7, s[6:7]
	v_mad_u64_u32 v[3:4], null, v16, 24, v[11:12]
; %bb.353:                              ; %Flow1148
                                        ;   in Loop: Header=BB2_351 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB2_355
; %bb.354:                              ;   in Loop: Header=BB2_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v11, 0xffffff00, v16
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[6:7]
	v_lshrrev_b32_e32 v18, 8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v16
	global_load_b64 v[11:12], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[11:12]
.LBB2_355:                              ;   in Loop: Header=BB2_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB2_357
; %bb.356:                              ;   in Loop: Header=BB2_351 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v3, s3
	ds_bpermute_b32 v3, v3, v16
	s_branch .LBB2_358
.LBB2_357:                              ;   in Loop: Header=BB2_351 Depth=4
	v_mov_b32_e32 v3, -1
.LBB2_358:                              ;   in Loop: Header=BB2_351 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v3
	s_cmp_eq_u32 s6, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB2_361
; %bb.359:                              ;   in Loop: Header=BB2_351 Depth=4
	s_cmpk_lt_u32 s6, 0x100
	s_cbranch_scc0 .LBB2_362
; %bb.360:                              ;   in Loop: Header=BB2_351 Depth=4
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
	s_branch .LBB2_363
.LBB2_361:                              ;   in Loop: Header=BB2_351 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB2_366
.LBB2_362:                              ;   in Loop: Header=BB2_351 Depth=4
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_363:                              ; %Flow1141
                                        ;   in Loop: Header=BB2_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB2_365
; %bb.364:                              ;   in Loop: Header=BB2_351 Depth=4
	s_add_i32 s7, s6, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s6, s6, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB2_365:                              ; %Flow1142
                                        ;   in Loop: Header=BB2_351 Depth=4
	s_mov_b32 s6, 0
.LBB2_366:                              ; %Flow1144
                                        ;   in Loop: Header=BB2_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_370
; %bb.367:                              ;   in Loop: Header=BB2_351 Depth=4
	v_add_nc_u32_e32 v3, s30, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB2_369
; %bb.368:                              ;   in Loop: Header=BB2_351 Depth=4
	global_store_b32 v[34:35], v16, off
.LBB2_369:                              ;   in Loop: Header=BB2_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
	s_sub_i32 s2, s2, s30
.LBB2_370:                              ;   in Loop: Header=BB2_351 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB2_372
; %bb.371:                              ;   in Loop: Header=BB2_351 Depth=4
	s_mov_b32 s3, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr16
	s_branch .LBB2_373
.LBB2_372:                              ;   in Loop: Header=BB2_351 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s3, 0
	s_cselect_b32 s6, -1, 0
.LBB2_373:                              ; %Flow1150
                                        ;   in Loop: Header=BB2_351 Depth=4
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_351
; %bb.374:                              ; %loop.exit.guard922
                                        ;   in Loop: Header=BB2_347 Depth=3
	s_xor_b32 s1, s3, -1
	s_branch .LBB2_376
.LBB2_375:                              ;   in Loop: Header=BB2_347 Depth=3
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_376:                              ; %Flow1317
                                        ;   in Loop: Header=BB2_347 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB2_617
; %bb.377:                              ; %.loopexit190
                                        ;   in Loop: Header=BB2_347 Depth=3
	v_mbcnt_lo_u32_b32 v71, exec_lo, 0
                                        ; implicit-def: $vgpr30_vgpr31
.LBB2_378:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB2_396 Depth 5
                                        ;           Child Loop BB2_404 Depth 5
                                        ;           Child Loop BB2_410 Depth 5
                                        ;           Child Loop BB2_419 Depth 5
                                        ;           Child Loop BB2_424 Depth 5
                                        ;           Child Loop BB2_426 Depth 5
                                        ;           Child Loop BB2_447 Depth 5
                                        ;           Child Loop BB2_455 Depth 5
                                        ;           Child Loop BB2_461 Depth 5
                                        ;           Child Loop BB2_470 Depth 5
                                        ;           Child Loop BB2_478 Depth 5
                                        ;           Child Loop BB2_481 Depth 5
                                        ;           Child Loop BB2_483 Depth 5
                                        ;           Child Loop BB2_485 Depth 5
                                        ;           Child Loop BB2_487 Depth 5
                                        ;           Child Loop BB2_489 Depth 5
                                        ;           Child Loop BB2_491 Depth 5
                                        ;           Child Loop BB2_513 Depth 5
                                        ;           Child Loop BB2_521 Depth 5
                                        ;           Child Loop BB2_527 Depth 5
                                        ;           Child Loop BB2_536 Depth 5
                                        ;           Child Loop BB2_543 Depth 5
                                        ;           Child Loop BB2_546 Depth 5
                                        ;           Child Loop BB2_551 Depth 5
                                        ;           Child Loop BB2_558 Depth 5
                                        ;           Child Loop BB2_591 Depth 5
                                        ;           Child Loop BB2_599 Depth 5
                                        ;           Child Loop BB2_605 Depth 5
                                        ;           Child Loop BB2_614 Depth 5
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_380
; %bb.379:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v3, v[32:33], off glc
.LBB2_380:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB2_440
; %bb.381:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_383
; %bb.382:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[48:49], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB2_383:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s34, v3
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc1 .LBB2_441
; %bb.384:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mbcnt_lo_u32_b32 v27, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_386
; %bb.385:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v3, v[48:49], off glc
.LBB2_386:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s16, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB2_474
; %bb.387:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_391
; %bb.388:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b64 v[23:24], v[50:51], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s2, s6, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s2, s7, v24, s2
	v_cmp_lt_u64_e64 s2, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_390
; %bb.389:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s7
	global_atomic_cmpswap_b64 v[3:4], v[50:51], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, v[3:4], v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s2
.LBB2_390:                              ; %Flow1306
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_391:                              ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s16, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 1
	s_cbranch_scc1 .LBB2_474
; %bb.392:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB2_421
; %bb.393:                              ;   in Loop: Header=BB2_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_399
; %bb.394:                              ;   in Loop: Header=BB2_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB2_398
; %bb.395:                              ; %.preheader3.i.i.i75.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_396:                              ; %.preheader3.i.i.i75
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_396
; %bb.397:                              ; %Flow1300
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_398:                              ; %Flow1302
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_399:                              ; %.loopexit4.i.i.i70
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s35, s7, 24
	s_mul_hi_u32 s36, s6, 24
	s_mul_i32 s37, s6, 24
	s_and_saveexec_b32 s38, s2
	s_cbranch_execz .LBB2_401
; %bb.400:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s36, s35
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB2_401:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s38
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v26, s7
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v24, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[23:26], off offset:16
	global_store_b128 v[11:12], v[23:26], off offset:32
	global_store_b128 v[11:12], v[23:26], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_409
; %bb.402:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB2_405
; %bb.403:                              ; %.preheader1.i.i.i73.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_404:                              ; %.preheader1.i.i.i73
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[25:26]
	v_dual_mov_b32 v26, v16 :: v_dual_mov_b32 v25, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_404
.LBB2_405:                              ; %Flow1298
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_407
; %bb.406:                              ;   in Loop: Header=BB2_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB2_407:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB2_409
; %bb.408:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_409:                              ; %Flow1299
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s36, s36, s35
	v_add_co_u32 v3, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v4, vcc_lo, s36, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_410:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_412
; %bb.411:                              ;   in Loop: Header=BB2_410 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_412:                              ;   in Loop: Header=BB2_410 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_414
; %bb.413:                              ;   in Loop: Header=BB2_410 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_415
.LBB2_414:                              ;   in Loop: Header=BB2_410 Depth=5
	s_mov_b32 s5, -1
.LBB2_415:                              ; %Flow1293
                                        ;   in Loop: Header=BB2_410 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_410
; %bb.416:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_420
; %bb.417:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v24, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v23 :: v_dual_cndmask_b32 v21, v21, v6
	v_dual_mov_b32 v23, v15 :: v_dual_and_b32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_420
; %bb.418:                              ; %.preheader.i.i.i72.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s2, 0
.LBB2_419:                              ; %.preheader.i.i.i72
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[23:24]
	v_dual_mov_b32 v24, v16 :: v_dual_mov_b32 v23, v15
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_419
.LBB2_420:                              ; %Flow1291
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_421:                              ; %Flow1303
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB2_473
; %bb.422:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB2_425
; %bb.423:                              ; %.preheader185.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s2
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s2
.LBB2_424:                              ; %.preheader185
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s2, v3, s7
	v_add_co_ci_u32_e64 v4, s2, 0, v4, s2
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB2_424
.LBB2_425:                              ; %Flow1285
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB2_426:                              ; %.loopexit186
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_428
; %bb.427:                              ;   in Loop: Header=BB2_426 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB2_428:                              ;   in Loop: Header=BB2_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s2, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s2, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB2_435
; %bb.429:                              ;   in Loop: Header=BB2_426 Depth=5
	v_mov_b32_e32 v3, s3
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB2_433
; %bb.430:                              ;   in Loop: Header=BB2_426 Depth=5
	s_add_i32 s2, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s2, s2, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s2, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[3:4]
	v_mov_b32_e32 v3, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB2_432
; %bb.431:                              ;   in Loop: Header=BB2_426 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[48:49], v68, off
	v_mov_b32_e32 v3, 0
.LBB2_432:                              ; %Flow1278
                                        ;   in Loop: Header=BB2_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_433:                              ;   in Loop: Header=BB2_426 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB2_436
; %bb.434:                              ;   in Loop: Header=BB2_426 Depth=5
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr3
	s_branch .LBB2_437
.LBB2_435:                              ;   in Loop: Header=BB2_426 Depth=5
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr7
	s_branch .LBB2_438
.LBB2_436:                              ;   in Loop: Header=BB2_426 Depth=5
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
.LBB2_437:                              ; %Flow1282
                                        ;   in Loop: Header=BB2_426 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB2_438:                              ; %Flow1281
                                        ;   in Loop: Header=BB2_426 Depth=5
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_442
; %bb.439:                              ;   in Loop: Header=BB2_426 Depth=5
	s_mov_b32 s3, s2
	s_branch .LBB2_426
.LBB2_440:                              ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v4 :: v_dual_mov_b32 v30, v3
	s_branch .LBB2_502
.LBB2_441:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB2_494
.LBB2_442:                              ; %loop.exit.guard925
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_472
; %bb.443:                              ;   in Loop: Header=BB2_378 Depth=4
	s_and_saveexec_b32 s35, s5
	s_cbranch_execz .LBB2_471
; %bb.444:                              ;   in Loop: Header=BB2_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_450
; %bb.445:                              ;   in Loop: Header=BB2_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB2_449
; %bb.446:                              ; %.preheader3.i.i.i82.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_447:                              ; %.preheader3.i.i.i82
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_447
; %bb.448:                              ; %Flow1273
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_449:                              ; %Flow1275
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_450:                              ; %.loopexit4.i.i.i77
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s36, s7, 24
	s_mul_hi_u32 s37, s6, 24
	s_mul_i32 s38, s6, 24
	s_and_saveexec_b32 s39, s2
	s_cbranch_execz .LBB2_452
; %bb.451:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s37, s36
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB2_452:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s39
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_460
; %bb.453:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s20 :: v_dual_mov_b32 v81, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB2_456
; %bb.454:                              ; %.preheader1.i.i.i80.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_455:                              ; %.preheader1.i.i.i80
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_455
.LBB2_456:                              ; %Flow1271
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_458
; %bb.457:                              ;   in Loop: Header=BB2_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB2_458:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB2_460
; %bb.459:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_460:                              ; %Flow1272
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s37, s37, s36
	v_add_co_u32 v3, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_461:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB2_463
; %bb.462:                              ;   in Loop: Header=BB2_461 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_463:                              ;   in Loop: Header=BB2_461 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_465
; %bb.464:                              ;   in Loop: Header=BB2_461 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_466
.LBB2_465:                              ;   in Loop: Header=BB2_461 Depth=5
	s_mov_b32 s5, -1
.LBB2_466:                              ; %Flow1266
                                        ;   in Loop: Header=BB2_461 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_461
; %bb.467:                              ;   in Loop: Header=BB2_378 Depth=4
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB2_471
; %bb.468:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_471
; %bb.469:                              ; %.preheader.i.i.i79.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s2, 0
.LBB2_470:                              ; %.preheader.i.i.i79
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_470
.LBB2_471:                              ; %Flow1276
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_mov_b32 s7, s3
.LBB2_472:                              ; %Flow1277
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s3, s7
.LBB2_473:                              ; %Flow1287
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s16, s3
.LBB2_474:                              ; %__ockl_devmem_request.exit83
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s16, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_493
; %bb.475:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_492
; %bb.476:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b64 v[3:4], v[50:51], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_492
; %bb.477:                              ;   in Loop: Header=BB2_378 Depth=4
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB2_478:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB2_481
; %bb.479:                              ; %.preheader11.i
                                        ;   in Loop: Header=BB2_478 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB2_478
.LBB2_480:                              ; %.preheader9.i
                                        ;   in Loop: Header=BB2_481 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_481:                              ; %Flow1257
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB2_480
; %bb.482:                              ; %Flow1254
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB2_485
.LBB2_483:                              ; %.preheader7.i
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB2_483
	s_branch .LBB2_485
.LBB2_484:                              ; %.preheader5.i
                                        ;   in Loop: Header=BB2_485 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_485:                              ; %.loopexit8.i
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB2_484
	s_branch .LBB2_487
.LBB2_486:                              ; %.preheader3.i
                                        ;   in Loop: Header=BB2_487 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_487:                              ; %Flow1248
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB2_486
	s_branch .LBB2_489
.LBB2_488:                              ; %.preheader1.i
                                        ;   in Loop: Header=BB2_489 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_489:                              ; %Flow1245
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB2_488
; %bb.490:                              ; %Flow1242
                                        ;   in Loop: Header=BB2_378 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_492
.LBB2_491:                              ; %.preheader.i
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_491
.LBB2_492:                              ; %__ockl_rtcwait_u32.exit
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_cmp_lg_u32 s16, 2
	v_mov_b32_e32 v31, s4
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v30, 0, 1, s2
.LBB2_493:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s18, 0
.LBB2_494:                              ; %Flow1309
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB2_502
; %bb.495:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_499
; %bb.496:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b64 v[23:24], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v23
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB2_498
; %bb.497:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v22, s3
	global_atomic_cmpswap_b64 v[3:4], v[52:53], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[23:24]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB2_498:                              ; %Flow1236
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_499:                              ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[2:3], 0
	s_cbranch_scc0 .LBB2_503
; %bb.500:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
.LBB2_501:                              ; %Flow1235
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
.LBB2_502:                              ; %Flow1312
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_378
	s_branch .LBB2_618
.LBB2_503:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s18, s1
	s_cbranch_execz .LBB2_539
; %bb.504:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB2_508
; %bb.505:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v6, s2, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB2_507
; %bb.506:                              ;   in Loop: Header=BB2_378 Depth=4
	s_bcnt1_i32_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s2, 21
	v_mov_b32_e32 v4, s2
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB2_507:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[2:3]
	v_cmp_ge_u64_e64 s1, v[3:4], v[11:12]
	s_branch .LBB2_509
.LBB2_508:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB2_509:                              ; %Flow1233
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB2_538
; %bb.510:                              ;   in Loop: Header=BB2_378 Depth=4
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_516
; %bb.511:                              ;   in Loop: Header=BB2_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB2_515
; %bb.512:                              ; %.preheader3.i.i.i89.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_513:                              ; %.preheader3.i.i.i89
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b64 v[21:22], v5, s[2:3]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v24
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_513
; %bb.514:                              ; %Flow1229
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_515:                              ; %Flow1231
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_516:                              ; %.loopexit4.i.i.i84
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b128 v[22:25], v5, s[2:3]
	v_readfirstlane_b32 s16, v11
	v_readfirstlane_b32 s17, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[16:17], s[6:7]
	s_mul_i32 s20, s7, 24
	s_mul_hi_u32 s21, s6, 24
	s_mul_i32 s35, s6, 24
	s_and_saveexec_b32 s36, s1
	s_cbranch_execz .LBB2_518
; %bb.517:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s21, s20
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v23, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB2_518:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s36
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v24, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v25, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v27, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v26, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, s4
	v_mov_b32_e32 v25, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[24:27], off offset:16
	global_store_b128 v[11:12], v[24:27], off offset:32
	global_store_b128 v[11:12], v[24:27], off offset:48
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_526
; %bb.519:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v5, s[2:3] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s16 :: v_dual_mov_b32 v81, s17
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s17, v4
	v_and_b32_e32 v3, s16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v22, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v23, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[26:27], v5, v[80:83], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[26:27], v[82:83]
	s_cbranch_execz .LBB2_522
; %bb.520:                              ; %.preheader1.i.i.i87.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_521:                              ; %.preheader1.i.i.i87
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v24, s16 :: v_dual_mov_b32 v25, s17
	s_sleep 1
	global_store_b64 v[3:4], v[26:27], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[24:27], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[26:27]
	v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_521
.LBB2_522:                              ; %Flow1227
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[2:3] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_524
; %bb.523:                              ;   in Loop: Header=BB2_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB2_524:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[24:25], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[24:25]
	s_cbranch_vccnz .LBB2_526
; %bb.525:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[24:25], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_526:                              ; %Flow1228
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s21, s21, s20
	v_add_co_u32 v3, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_527:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_529
; %bb.528:                              ;   in Loop: Header=BB2_527 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_529:                              ;   in Loop: Header=BB2_527 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB2_531
; %bb.530:                              ;   in Loop: Header=BB2_527 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB2_532
.LBB2_531:                              ;   in Loop: Header=BB2_527 Depth=5
	s_mov_b32 s5, -1
.LBB2_532:                              ; %Flow1222
                                        ;   in Loop: Header=BB2_527 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB2_527
; %bb.533:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_537
; %bb.534:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3] offset:24 glc
	global_load_b64 v[23:24], v5, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v6
	v_and_b32_e32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v23, v11
	v_mov_b32_e32 v23, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v24, v6, vcc_lo
	v_mov_b32_e32 v24, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_537
; %bb.535:                              ; %.preheader.i.i.i86.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s1, 0
.LBB2_536:                              ; %.preheader.i.i.i86
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[23:24]
	v_dual_mov_b32 v24, v19 :: v_dual_mov_b32 v23, v18
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_536
.LBB2_537:                              ; %Flow1220
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_538:                              ; %Flow1234
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
.LBB2_539:                              ; %__ockl_devmem_request.exit90
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc1 .LBB2_584
; %bb.540:                              ;   in Loop: Header=BB2_378 Depth=4
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[38:39], off
	s_bcnt1_i32_b32 s5, exec_lo
	s_add_u32 s6, s2, 16
	s_addc_u32 s7, s3, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s16, exec_lo, s1
	s_cbranch_execz .LBB2_548
; %bb.541:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v15, v[54:55], off
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB2_544
; %bb.542:                              ; %.preheader182.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB2_543:                              ; %.preheader182
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB2_543
.LBB2_544:                              ; %Flow1209
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v16, v[64:65], off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB2_547
; %bb.545:                              ; %.preheader180.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	v_mul_lo_u32 v12, v15, s5
	s_mov_b32 s17, 0
.LBB2_546:                              ; %.preheader180
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB2_546
.LBB2_547:                              ; %Flow1206
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
.LBB2_548:                              ; %Flow1214
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB2_553
; %bb.549:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB2_552
; %bb.550:                              ; %.preheader178.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v15, v[66:67], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB2_551:                              ; %.preheader178
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB2_551
.LBB2_552:                              ; %Flow1212
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
.LBB2_553:                              ; %.loopexit179
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_557
; %bb.554:                              ;   in Loop: Header=BB2_378 Depth=4
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB2_556
; %bb.555:                              ;   in Loop: Header=BB2_378 Depth=4
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB2_556:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	global_store_b128 v5, v[7:10], s[2:3]
.LBB2_557:                              ; %Flow1203
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $sgpr5
.LBB2_558:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, s31
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB2_560
; %bb.559:                              ;   in Loop: Header=BB2_558 Depth=5
	global_load_b32 v3, v[32:33], off glc
.LBB2_560:                              ;   in Loop: Header=BB2_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s6, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s5, s6
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB2_567
; %bb.561:                              ;   in Loop: Header=BB2_558 Depth=5
	v_mov_b32_e32 v3, s34
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB2_563
; %bb.562:                              ;   in Loop: Header=BB2_558 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB2_563:                              ;   in Loop: Header=BB2_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s34, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc0 .LBB2_568
; %bb.564:                              ;   in Loop: Header=BB2_558 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB2_575
; %bb.565:                              ;   in Loop: Header=BB2_558 Depth=5
	s_cmpk_lt_u32 s31, 0x100
	s_cbranch_scc0 .LBB2_569
; %bb.566:                              ;   in Loop: Header=BB2_558 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s31, 24, v[3:4]
	s_branch .LBB2_570
.LBB2_567:                              ;   in Loop: Header=BB2_558 Depth=5
	s_mov_b64 s[16:17], 0
	s_mov_b32 s1, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB2_580
.LBB2_568:                              ;   in Loop: Header=BB2_558 Depth=5
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB2_579
.LBB2_569:                              ;   in Loop: Header=BB2_558 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB2_570:                              ; %Flow1195
                                        ;   in Loop: Header=BB2_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB2_572
; %bb.571:                              ;   in Loop: Header=BB2_558 Depth=5
	s_add_i32 s7, s31, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	s_and_b32 s7, s31, 0xff
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
.LBB2_572:                              ;   in Loop: Header=BB2_558 Depth=5
	v_dual_mov_b32 v15, s31 :: v_dual_mov_b32 v4, s3
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[2:3] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB2_574
; %bb.573:                              ;   in Loop: Header=BB2_558 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[32:33], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB2_574:                              ; %Flow1193
                                        ;   in Loop: Header=BB2_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_575:                              ; %Flow1196
                                        ;   in Loop: Header=BB2_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB2_577
; %bb.576:                              ;   in Loop: Header=BB2_558 Depth=5
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
	s_branch .LBB2_578
.LBB2_577:                              ;   in Loop: Header=BB2_558 Depth=5
	s_mov_b32 s19, 0
	s_and_not1_b32 s1, s1, exec_lo
	s_sleep 2
.LBB2_578:                              ; %Flow1201
                                        ;   in Loop: Header=BB2_558 Depth=5
	s_mov_b32 s18, 0
.LBB2_579:                              ; %Flow1200
                                        ;   in Loop: Header=BB2_558 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s16, s1, exec_lo
	s_mov_b32 s1, 0
	s_or_b32 s5, s5, s16
                                        ; implicit-def: $sgpr16_sgpr17
.LBB2_580:                              ; %Flow1199
                                        ;   in Loop: Header=BB2_558 Depth=5
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB2_558
; %bb.581:                              ; %loop.exit.guard930
                                        ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v16, s17
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_501
; %bb.582:                              ; %loop.exit.guard931
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB2_585
; %bb.583:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB2_586
.LBB2_584:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB2_501
.LBB2_585:                              ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB2_586:                              ; %Flow1190
                                        ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB2_501
; %bb.587:                              ;   in Loop: Header=BB2_378 Depth=4
	s_and_saveexec_b32 s20, s5
	s_cbranch_execz .LBB2_616
; %bb.588:                              ;   in Loop: Header=BB2_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB2_594
; %bb.589:                              ;   in Loop: Header=BB2_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB2_593
; %bb.590:                              ; %.preheader3.i.i.i96.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s7, 0
.LBB2_591:                              ; %.preheader3.i.i.i96
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_591
; %bb.592:                              ; %Flow1186
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_593:                              ; %Flow1188
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_594:                              ; %.loopexit4.i.i.i91
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s31, s6, 24
	s_mul_i32 s34, s6, 24
	s_and_saveexec_b32 s35, s1
	s_cbranch_execz .LBB2_596
; %bb.595:                              ;   in Loop: Header=BB2_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s31, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB2_596:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_604
; %bb.597:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s3, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB2_600
; %bb.598:                              ; %.preheader1.i.i.i94.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s5, 0
.LBB2_599:                              ; %.preheader1.i.i.i94
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_599
.LBB2_600:                              ; %Flow1184
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s5, exec_lo
	s_mov_b32 s3, exec_lo
	v_mbcnt_lo_u32_b32 v3, s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_602
; %bb.601:                              ;   in Loop: Header=BB2_378 Depth=4
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s5
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB2_602:                              ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB2_604
; %bb.603:                              ;   in Loop: Header=BB2_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s3, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_604:                              ; %Flow1185
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s31, s31, s21
	v_add_co_u32 v3, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB2_605:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_607
; %bb.606:                              ;   in Loop: Header=BB2_605 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB2_607:                              ;   in Loop: Header=BB2_605 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v6
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB2_609
; %bb.608:                              ;   in Loop: Header=BB2_605 Depth=5
	s_mov_b32 s2, 0
	s_sleep 1
	s_branch .LBB2_610
.LBB2_609:                              ;   in Loop: Header=BB2_605 Depth=5
	s_mov_b32 s2, -1
.LBB2_610:                              ; %Flow1179
                                        ;   in Loop: Header=BB2_605 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB2_605
; %bb.611:                              ;   in Loop: Header=BB2_378 Depth=4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB2_615
; %bb.612:                              ;   in Loop: Header=BB2_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_615
; %bb.613:                              ; %.preheader.i.i.i93.preheader
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_mov_b32 s1, 0
.LBB2_614:                              ; %.preheader.i.i.i93
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ;         Parent Loop BB2_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_614
.LBB2_615:                              ; %Flow1177
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v71, 0
.LBB2_616:                              ; %Flow1189
                                        ;   in Loop: Header=BB2_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_dual_mov_b32 v15, v30 :: v_dual_mov_b32 v16, v31
	s_mov_b32 s18, -1
	s_branch .LBB2_501
.LBB2_617:                              ;   in Loop: Header=BB2_347 Depth=3
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $sgpr29
                                        ; implicit-def: $vgpr70
	s_branch .LBB2_641
.LBB2_618:                              ;   in Loop: Header=BB2_347 Depth=3
	v_cmp_ne_u64_e64 s5, 1, v[30:31]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB2_620
; %bb.619:                              ;   in Loop: Header=BB2_347 Depth=3
	v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31
	s_branch .LBB2_640
.LBB2_620:                              ;   in Loop: Header=BB2_347 Depth=3
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB2_637
; %bb.621:                              ;   in Loop: Header=BB2_347 Depth=3
	global_load_b64 v[3:4], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_637
; %bb.622:                              ;   in Loop: Header=BB2_347 Depth=3
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB2_623:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x659
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB2_626
; %bb.624:                              ; %.preheader11.i110
                                        ;   in Loop: Header=BB2_623 Depth=4
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB2_623
.LBB2_625:                              ; %.preheader9.i109
                                        ;   in Loop: Header=BB2_626 Depth=4
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_626:                              ; %Flow1171
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x326
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_625
; %bb.627:                              ; %Flow1168
                                        ;   in Loop: Header=BB2_347 Depth=3
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB2_630
.LBB2_628:                              ; %.preheader7.i108
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB2_628
	s_branch .LBB2_630
.LBB2_629:                              ; %.preheader5.i107
                                        ;   in Loop: Header=BB2_630 Depth=4
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_630:                              ; %.loopexit8.i100
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0xc0
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_629
	s_branch .LBB2_632
.LBB2_631:                              ; %.preheader3.i106
                                        ;   in Loop: Header=BB2_632 Depth=4
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_632:                              ; %Flow1162
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x59
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_631
	s_branch .LBB2_634
.LBB2_633:                              ; %.preheader1.i105
                                        ;   in Loop: Header=BB2_634 Depth=4
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB2_634:                              ; %Flow1159
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 38
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB2_633
; %bb.635:                              ; %Flow1156
                                        ;   in Loop: Header=BB2_347 Depth=3
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_637
.LBB2_636:                              ; %.preheader.i104
                                        ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ;       Parent Loop BB2_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_636
.LBB2_637:                              ; %__ockl_rtcwait_u32.exit111
                                        ;   in Loop: Header=BB2_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, s29
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v70
	s_cbranch_execz .LBB2_639
; %bb.638:                              ;   in Loop: Header=BB2_347 Depth=3
	global_load_b32 v3, v[32:33], off glc
.LBB2_639:                              ;   in Loop: Header=BB2_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
.LBB2_640:                              ; %Flow1173
                                        ;   in Loop: Header=BB2_347 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
.LBB2_641:                              ; %Flow1318
                                        ;   in Loop: Header=BB2_347 Depth=3
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB2_347
.LBB2_642:                              ; %.loopexit189
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u64 s[6:7], 0
	s_cbranch_scc1 .LBB2_663
; %bb.643:                              ;   in Loop: Header=BB2_6 Depth=2
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mbcnt_lo_u32_b32 v3, s5, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b64 v[0:1], v5, s[6:7] offset:8 glc
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_waitcnt vmcnt(0)
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_647
; %bb.644:                              ;   in Loop: Header=BB2_6 Depth=2
	s_mov_b32 s17, exec_lo
	s_bcnt1_i32_b32 s5, s5
	v_mbcnt_lo_u32_b32 v4, s17, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_646
; %bb.645:                              ;   in Loop: Header=BB2_6 Depth=2
	s_bcnt1_i32_b32 s1, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s5, s1
	v_mov_b32_e32 v6, s1
	global_atomic_add_u32 v6, v[0:1], v6, off offset:8 glc
.LBB2_646:                              ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v4, s5, v4, s1
.LBB2_647:                              ; %Flow944
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, s4
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+4
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+12
	s_lshl_b64 s[16:17], s[2:3], 5
	v_mov_b32_e32 v11, 0
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_readfirstlane_b32 s1, v4
	s_load_b32 s5, s[18:19], 0x0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s3, 32
	s_cbranch_scc1 .LBB2_657
; %bb.648:                              ;   in Loop: Header=BB2_6 Depth=2
	v_cvt_f32_u32_e32 v4, s5
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+32
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+40
	s_lshr_b32 s3, s3, 5
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_rcp_iflag_f32_e32 v4, v4
	s_load_b32 s18, s[18:19], 0x0
	s_sub_i32 s19, 0, s5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f7ffffe, v4 :: v_dual_add_nc_u32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v6, s19, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v3, s18, v3
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+16
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+24
	s_add_u32 s16, s16, s18
	s_addc_u32 s17, s17, s19
	s_lshr_b32 s18, s2, 1
	s_add_i32 s19, s3, -1
	s_add_i32 s18, s18, 4
	v_mul_hi_u32 v6, v4, v6
	s_lshl_b32 s18, 1, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_cvt_f32_u32_e32 v6, s3
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v6
	v_subrev_nc_u32_e32 v6, s5, v3
	v_cmp_le_u32_e64 s1, s5, v3
	v_cvt_u32_f32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v3, v6, s1
	s_sub_i32 s1, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s1, v15
	v_add_co_u32 v3, s1, v0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v6, s1, 0, v1, s1
	v_subrev_nc_u32_e32 v12, s5, v4
	v_cmp_le_u32_e64 s1, s5, v4
	s_mov_b32 s5, 0
	v_mul_hi_u32 v16, v15, v11
	v_cndmask_b32_e64 v4, v4, v12, s1
	v_mov_b32_e32 v11, 0
	s_bfe_i32 s1, s2, 0x10000
	s_lshr_b32 s2, s18, 1
	v_mov_b32_e32 v12, 0
	v_lshrrev_b32_e32 v4, 5, v4
	v_add_nc_u32_e32 v18, v15, v16
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s18, s1, s18
.LBB2_649:                              ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[4:5]
	s_mov_b32 s2, -1
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $vgpr19
	v_add_co_u32 v15, s1, v3, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s1, v6, v16, s1
	global_load_b32 v21, v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v21
	s_cbranch_execz .LBB2_653
; %bb.650:                              ;   in Loop: Header=BB2_649 Depth=3
	v_not_b32_e32 v19, v21
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ctz_i32_b32_e32 v19, v19
	v_min_u32_e32 v21, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e64 v19, v21, 1
	global_atomic_or_b32 v15, v[15:16], v19, off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v15, v15, v19
	v_mov_b32_e32 v19, 0
	v_cmp_ne_u32_e64 s1, 0, v15
	v_cmpx_eq_u32_e32 0, v15
	s_cbranch_execz .LBB2_652
; %bb.651:                              ;   in Loop: Header=BB2_649 Depth=3
	s_load_b32 s2, s[16:17], 0x0
	v_lshl_add_u32 v11, v4, 5, v21
	v_mov_b32_e32 v19, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, v11, s18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s2, v0, s2
	v_add_co_ci_u32_e64 v15, s2, 0, v1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s2, v12, v11
	v_add_co_ci_u32_e64 v12, s2, 0, v15, s2
.LBB2_652:                              ;   in Loop: Header=BB2_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_not1_b32 s2, s1, exec_lo
.LBB2_653:                              ; %Flow941
                                        ;   in Loop: Header=BB2_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_and_saveexec_b32 s20, s2
; %bb.654:                              ;   in Loop: Header=BB2_649 Depth=3
	v_dual_mov_b32 v19, 0 :: v_dual_add_nc_u32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v4, v18
	v_mul_lo_u32 v15, v15, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v15
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
; %bb.655:                              ;   in Loop: Header=BB2_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	v_cmp_ne_u32_e64 s1, 0, v19
	s_cmp_eq_u32 s19, 0
	s_cselect_b32 s2, -1, 0
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s1, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_649
; %bb.656:                              ; %Flow942
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_657:                              ; %.loopexit193
                                        ;   in Loop: Header=BB2_6 Depth=2
	v_cmp_ne_u64_e64 s1, 0, v[11:12]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_660
; %bb.658:                              ;   in Loop: Header=BB2_6 Depth=2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s5, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s5
	s_cbranch_execz .LBB2_660
; %bb.659:                              ;   in Loop: Header=BB2_6 Depth=2
	s_bcnt1_i32_b32 s1, s1
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s3
	v_mov_b32_e32 v0, s1
	global_atomic_add_u32 v5, v0, s[6:7] offset:16
.LBB2_660:                              ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[11:12]
; %bb.661:                              ;   in Loop: Header=BB2_6 Depth=2
	v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v119, 0
	v_dual_mov_b32 v128, 0 :: v_dual_mov_b32 v1, v12
; %bb.662:                              ; %Flow
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v128 :: v_dual_mov_b32 v4, v119
.LBB2_663:                              ; %Flow945
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v119, v4
.LBB2_664:                              ; %Flow1324
                                        ;   in Loop: Header=BB2_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB2_6
.LBB2_665:                              ; %Flow1326
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_mov_b32_e32 v3, v119
.LBB2_666:                              ; %.loopexit197
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB2_3
; %bb.667:                              ; %Flow1328
                                        ; implicit-def: $vgpr4_vgpr5
.LBB2_668:                              ; %Flow1347
	s_and_not1_saveexec_b32 s1, s23
	s_cbranch_execz .LBB2_701
; %bb.669:
	s_load_b64 s[2:3], s[8:9], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_675
; %bb.670:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[6:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v0, v8
	v_and_b32_e32 v1, v1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v1, v1, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v10, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[8:9]
	s_cbranch_execz .LBB2_674
; %bb.671:                              ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB2_672:                              ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2]
	v_mov_b32_e32 v1, v6
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB2_672
; %bb.673:                              ; %Flow1343
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_674:                              ; %Flow1345
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_675:                              ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[6:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s10, s7, 24
	s_mul_hi_u32 s11, s6, 24
	s_mul_i32 s12, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB2_677
; %bb.676:
	v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, v3
	s_add_i32 s13, s11, s10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v7, vcc_lo
	v_dual_mov_b32 v12, 3 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[0:1], v[10:13], off offset:8
.LBB2_677:
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v0
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	s_clause 0x3
	global_store_b128 v[8:9], v[2:5], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_685
; %bb.678:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v4, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v1, vcc_lo
	global_store_b64 v[4:5], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_681
; %bb.679:                              ; %.preheader1.i.i.i.preheader
	s_mov_b32 s13, 0
.LBB2_680:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_680
.LBB2_681:                              ; %Flow1341
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_683
; %bb.682:
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_683:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_685
; %bb.684:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_685:                              ; %Flow1342
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s11, s11, s10
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_686:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_688
; %bb.687:                              ;   in Loop: Header=BB2_686 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_688:                              ;   in Loop: Header=BB2_686 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB2_690
; %bb.689:                              ;   in Loop: Header=BB2_686 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB2_691
.LBB2_690:                              ;   in Loop: Header=BB2_686 Depth=1
	s_mov_b32 s6, -1
.LBB2_691:                              ; %Flow1336
                                        ;   in Loop: Header=BB2_686 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_686
; %bb.692:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_696
; %bb.693:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_696
; %bb.694:                              ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_695:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_695
.LBB2_696:                              ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB2_700
; %bb.697:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB2_700
; %bb.698:
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s4, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB2_700
; %bb.699:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s2, s2
	s_bcnt1_i32_b32 s3, s3
	v_mov_b32_e32 v4, 0x1a000
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s2
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u64 v4, v[2:3], s[4:5] offset:2184
.LBB2_700:
	s_or_b32 exec_lo, exec_lo, s0
.LBB2_701:                              ; %Flow1348
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB2_702:                              ; %.loopexit198
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_readlane_b32 s30, v40, 11
	v_readlane_b32 s31, v40, 12
	v_readlane_b32 s44, v40, 10
	v_readlane_b32 s43, v40, 9
	v_readlane_b32 s42, v40, 8
	v_readlane_b32 s41, v40, 7
	v_readlane_b32 s40, v40, 6
	v_readlane_b32 s39, v40, 5
	v_readlane_b32 s38, v40, 4
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s32          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end2:
	.size	__ockl_dm_alloc, .Lfunc_end2-__ockl_dm_alloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 24288
; NumSgprs: 47
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 1
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_dealloc
	.type	__ockl_dm_dealloc,@function
__ockl_dm_dealloc:                      ; @__ockl_dm_dealloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0xfff, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB3_12
; %bb.1:
	v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v4, 0xffe00000, v0
	s_load_b64 s[0:1], s[8:9], 0x60
	v_and_b32_e32 v15, 0x1fffff, v0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 0x2800
	s_addc_u32 s1, s1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+16
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+24
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, 1, v6
	v_bfe_i32 v2, v6, 0, 1
	v_and_b32_e32 v16, 0xff, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 4, v1
	v_lshlrev_b32_e64 v1, v1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 1, v1
	v_and_b32_e32 v2, v2, v8
	v_add_nc_u32_e32 v8, 0xffffff00, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v14, v2, v1
	v_mov_b32_e32 v2, v6
	v_lshrrev_b32_e32 v18, 8, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_u32_e32 v1, v14
	v_sub_nc_u32_e32 v0, 0, v14
	v_lshlrev_b64 v[12:13], 5, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_add_co_u32 v12, vcc_lo, v12, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v9, v0, v17
	v_mad_u64_u32 v[0:1], null, 0x1800, v6, s[0:1]
	v_cmp_gt_u32_e64 s0, 0x100, v7
	v_mul_hi_u32 v2, v17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v7, 24, v[0:1]
	v_mad_u64_u32 v[10:11], null, v18, 24, v[0:1]
	v_dual_mov_b32 v17, 1 :: v_dual_add_nc_u32 v2, v17, v2
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v17
	v_cmp_ne_u32_e32 vcc_lo, 0, v17
	v_mov_b32_e32 v17, 0
	;;#ASMSTART
	;;#ASMEND
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB3_11
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	v_readfirstlane_b32 s1, v6
	v_readfirstlane_b32 s2, v7
	v_mov_b32_e32 v17, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, s1, v6
	v_cmp_eq_u32_e64 s1, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB3_10
; %bb.4:                                ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s7, 0
	v_cmp_ne_u32_e64 s1, 0, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v1, v9, 0, s1
	v_cndmask_b32_e64 v0, v8, 0, s1
	s_or_b32 s1, s1, s0
	s_xor_b32 s2, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB3_6
; %bb.5:                                ;   in Loop: Header=BB3_2 Depth=1
	global_load_b64 v[17:18], v[10:11], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v16, 24, v[17:18]
.LBB3_6:                                ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v17, v[12:13], off
	v_readfirstlane_b32 s2, v0
	v_readfirstlane_b32 s3, v1
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v17, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, v17, v2
	v_mul_lo_u32 v19, v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, v17, v19
	v_add_nc_u32_e32 v19, 1, v18
	v_sub_nc_u32_e32 v20, v17, v14
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, v18, v19, s1
	v_cndmask_b32_e64 v17, v17, v20, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, 1, v18
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, v18, v19, s1
	v_lshrrev_b32_e32 v18, 3, v17
	v_lshlrev_b32_e64 v17, v17, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v18, 0x1ffffffc, v18
	v_not_b32_e32 v19, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, v4, v18
	v_add_co_ci_u32_e64 v18, s1, 0, v5, s1
	global_atomic_and_b32 v[17:18], v19, off offset:16
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB3_9
; %bb.7:                                ;   in Loop: Header=BB3_2 Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s10, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s11, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s11
	s_cbranch_execz .LBB3_9
; %bb.8:                                ;   in Loop: Header=BB3_2 Depth=1
	s_bcnt1_i32_b32 s7, s7
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s10
	v_mov_b32_e32 v0, s7
	global_atomic_sub_u32 v3, v0, s[2:3] offset:16
.LBB3_9:                                ; %Flow16
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v17, 0
.LBB3_10:                               ; %Flow18
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB3_11:                               ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, v17
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_cbranch_vccnz .LBB3_2
.LBB3_12:                               ; %Flow40
	s_and_not1_saveexec_b32 s1, s4
	s_cbranch_execz .LBB3_45
; %bb.13:
	s_mov_b32 s10, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB3_44
; %bb.14:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_20
; %bb.15:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB3_19
; %bb.16:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB3_17:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB3_17
; %bb.18:                               ; %Flow34
	s_or_b32 exec_lo, exec_lo, s6
.LBB3_19:                               ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB3_20:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s11, s7, 24
	s_mul_hi_u32 s12, s6, 24
	s_mul_i32 s13, s6, 24
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB3_22
; %bb.21:
	v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, v3
	s_add_i32 s14, s12, s11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v13, vcc_lo, s14, v5, vcc_lo
	v_dual_mov_b32 v10, 3 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB3_22:
	s_or_b32 exec_lo, exec_lo, s15
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v9, s19
	v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, s18
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_30
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v6, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB3_26
; %bb.24:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s14, 0
.LBB3_25:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB3_25
.LBB3_26:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s14, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s14, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB3_28
; %bb.27:
	s_bcnt1_i32_b32 s14, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s14
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB3_28:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB3_30
; %bb.29:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_30:                               ; %Flow33
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s12, s12, s11
	v_add_co_u32 v0, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v1, vcc_lo, s12, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_31:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_33
; %bb.32:                               ;   in Loop: Header=BB3_31 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_33:                               ;   in Loop: Header=BB3_31 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB3_35
; %bb.34:                               ;   in Loop: Header=BB3_31 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB3_36
.LBB3_35:                               ;   in Loop: Header=BB3_31 Depth=1
	s_mov_b32 s6, -1
.LBB3_36:                               ; %Flow27
                                        ;   in Loop: Header=BB3_31 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB3_31
; %bb.37:
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB3_41
; %bb.38:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_41
; %bb.39:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB3_40:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_40
.LBB3_41:                               ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_mbcnt_lo_u32_b32 v0, s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s2, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s2
	s_cbranch_execz .LBB3_44
; %bb.42:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB3_44
; %bb.43:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s0, s0
	s_bcnt1_i32_b32 s2, s2
	v_mov_b32_e32 v2, 0x1a000
	s_mul_i32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s0
	s_waitcnt lgkmcnt(0)
	global_atomic_sub_u64 v2, v[0:1], s[4:5] offset:2184
.LBB3_44:                               ; %Flow38
	s_or_b32 exec_lo, exec_lo, s10
.LBB3_45:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end3:
	.size	__ockl_dm_dealloc, .Lfunc_end3-__ockl_dm_dealloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2296
; NumSgprs: 34
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z9detHelperPvPd        ; -- Begin function _Z9detHelperPvPd
	.globl	_Z9detHelperPvPd
	.p2align	8
	.type	_Z9detHelperPvPd,@function
_Z9detHelperPvPd:                       ; @_Z9detHelperPvPd
; %bb.0:
	s_clause 0x2
	s_load_b128 s[48:51], s[0:1], 0x0
	s_load_b32 s45, s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x1c
	s_mov_b32 s55, 0
	s_mov_b64 s[46:47], s[0:1]
	s_mov_b32 s53, s55
	s_mov_b32 s32, 0
	s_mov_b32 s33, 1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s52, s[48:49], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[0:1], s[52:53], 2
	s_and_b32 s53, s2, 0xffff
	v_cmp_gt_u64_e64 s3, s[0:1], 1
	v_mad_u64_u32 v[43:44], null, s15, s53, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, exec_lo
	s_cselect_b32 s56, s0, 1
	s_cselect_b32 s57, s1, 0
	v_dual_mov_b32 v0, s56 :: v_dual_mov_b32 v1, s57
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	v_dual_mov_b32 v41, v0 :: v_dual_mov_b32 v42, v1
	v_mov_b32_e32 v0, v43
	s_cmp_lg_u32 s52, 0
	s_cselect_b32 s58, -1, 0
	s_cmp_eq_u32 s52, 0
	s_cbranch_scc1 .LBB4_2
.LBB4_1:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_u32_e32 v1, s33
	s_sub_i32 s0, 0, s33
	s_sub_i32 s54, s52, s33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s0, v1
	s_lshl_b64 s[0:1], s[54:55], 2
	v_mul_hi_u32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v0 :: v_dual_add_nc_u32 v0, v1, v2
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v0, s33
	v_add_nc_u32_e32 v2, 1, v0
	v_sub_nc_u32_e32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v4, s33, v1
	v_cmp_le_u32_e32 vcc_lo, s33, v1
	v_dual_cndmask_b32 v0, v0, v2 :: v_dual_cndmask_b32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, 1, v0
	v_cmp_le_u32_e32 vcc_lo, s33, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, v41, s0
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v42, vcc_lo
	v_mul_lo_u32 v4, v0, s33
	s_add_i32 s0, s33, 1
	s_cmp_eq_u32 s52, s33
	s_mov_b32 s33, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	global_store_b32 v[1:2], v3, off
	s_cbranch_scc0 .LBB4_1
.LBB4_2:                                ; %Flow248
	s_mov_b32 s33, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execnz .LBB4_5
.LBB4_3:                                ; %Flow246
	s_or_b32 exec_lo, exec_lo, s33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[41:42]
	s_cbranch_execnz .LBB4_45
; %bb.4:                                ; %_ZdaPv.exit137
	s_endpgm
.LBB4_5:
	v_dual_mov_b32 v0, s56 :: v_dual_mov_b32 v1, s57
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_and_not1_b32 vcc_lo, exec_lo, s58
	s_mov_b32 s2, 1
	s_cbranch_vccnz .LBB4_8
; %bb.6:                                ; %.lr.ph152.preheader
	s_mul_i32 s3, s45, s53
	s_mov_b32 s1, 0
.LBB4_7:                                ; %.lr.ph152
                                        ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_u32_e32 v2, s2
	s_sub_i32 s4, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	s_mul_i32 s4, s4, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s4, s0, s4
	s_add_i32 s0, s0, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s0, s3, s0
	s_mul_i32 s4, s0, s2
	s_add_i32 s5, s0, 1
	s_sub_i32 s4, s3, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s6, s4, s2
	s_cmp_ge_u32 s4, s2
	s_cselect_b32 s0, s5, s0
	s_cselect_b32 s4, s6, s4
	s_add_i32 s5, s0, 1
	s_cmp_ge_u32 s4, s2
	s_cselect_b32 s6, s5, s0
	s_sub_i32 s0, s52, s2
	s_mul_i32 s7, s6, s2
	s_lshl_b64 s[4:5], s[0:1], 2
	s_sub_i32 s0, s3, s7
	v_add_co_u32 v2, vcc_lo, v0, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_mov_b32_e32 v4, s0
	s_add_i32 s0, s2, 1
	s_mov_b32 s3, s6
	s_cmp_eq_u32 s52, s2
	s_mov_b32 s2, s0
	global_store_b32 v[2:3], v4, off
	s_cbranch_scc0 .LBB4_7
.LBB4_8:                                ; %.preheader143
	global_load_b32 v2, v[41:42], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_gt_u32_e64 s52, v2
	s_cbranch_execz .LBB4_43
; %bb.9:                                ; %.preheader142.lr.ph
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v14, 0x3ff00000
	s_mov_b32 s1, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v44, v2
	v_lshlrev_b64 v[4:5], 3, v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s50, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s51, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, v41, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v42, vcc_lo
	global_load_b64 v[6:7], v[4:5], off
.LBB4_10:                               ; %.preheader142
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_11 Depth 2
                                        ;     Child Loop BB4_13 Depth 2
                                        ;       Child Loop BB4_14 Depth 3
                                        ;         Child Loop BB4_16 Depth 4
                                        ;     Child Loop BB4_32 Depth 2
                                        ;     Child Loop BB4_34 Depth 2
                                        ;       Child Loop BB4_36 Depth 3
                                        ;     Child Loop BB4_39 Depth 2
	v_dual_mov_b32 v10, v41 :: v_dual_mov_b32 v11, v42
	v_mov_b32_e32 v3, 0
	s_mov_b32 s0, s52
.LBB4_11:                               ;   Parent Loop BB4_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v12, v[10:11], off
	v_add_co_u32 v10, vcc_lo, v10, 4
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v12, v3
	v_lshrrev_b32_e32 v12, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v3, v12
	v_and_b32_e32 v12, -2, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v12
	s_cbranch_scc1 .LBB4_11
; %bb.12:                               ; %.preheader138.preheader
                                        ;   in Loop: Header=BB4_10 Depth=1
	s_mov_b32 s0, 0
.LBB4_13:                               ; %.preheader138
                                        ;   Parent Loop BB4_10 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB4_14 Depth 3
                                        ;         Child Loop BB4_16 Depth 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 0
	s_mov_b32 s5, 0
	s_cselect_b32 s4, -1, 0
	s_lshl_b64 s[6:7], s[0:1], 2
                                        ; implicit-def: $sgpr8
	v_add_co_u32 v10, vcc_lo, v41, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v42, vcc_lo
	s_mov_b32 s7, 1
                                        ; implicit-def: $sgpr6
.LBB4_14:                               ; %.preheader
                                        ;   Parent Loop BB4_10 Depth=1
                                        ;     Parent Loop BB4_13 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB4_16 Depth 4
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB4_20
; %bb.15:                               ; %.lr.ph156.preheader
                                        ;   in Loop: Header=BB4_14 Depth=3
	v_dual_mov_b32 v12, v41 :: v_dual_mov_b32 v13, v42
	s_mov_b32 s10, 0
	s_mov_b32 s11, 0
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $sgpr13
                                        ; implicit-def: $sgpr12
.LBB4_16:                               ; %.lr.ph156
                                        ;   Parent Loop BB4_10 Depth=1
                                        ;     Parent Loop BB4_13 Depth=2
                                        ;       Parent Loop BB4_14 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	global_load_b32 v15, v[12:13], off
	s_or_b32 s12, s12, exec_lo
	s_or_b32 s13, s13, exec_lo
	s_mov_b32 s14, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e64 s7, v15
; %bb.17:                               ;   in Loop: Header=BB4_16 Depth=4
	s_add_i32 s11, s11, 1
	v_add_co_u32 v12, vcc_lo, v12, 4
	s_cmp_ge_u32 s11, s0
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_cselect_b32 s15, -1, 0
	s_and_not1_b32 s13, s13, exec_lo
	s_and_b32 s15, s15, exec_lo
	s_and_not1_b32 s12, s12, exec_lo
	s_or_b32 s13, s13, s15
; %bb.18:                               ; %Flow235
                                        ;   in Loop: Header=BB4_16 Depth=4
	s_or_b32 exec_lo, exec_lo, s14
	s_xor_b32 s14, s12, -1
	s_and_b32 s15, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s10, s15, s10
	s_and_not1_b32 s9, s9, exec_lo
	s_and_b32 s14, s14, exec_lo
	s_or_b32 s9, s9, s14
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB4_16
; %bb.19:                               ; %loop.exit.guard231
                                        ;   in Loop: Header=BB4_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s10
	s_mov_b32 s10, -1
	s_branch .LBB4_21
.LBB4_20:                               ;   in Loop: Header=BB4_14 Depth=3
	s_mov_b32 s9, -1
	s_mov_b32 s10, 0
.LBB4_21:                               ; %Flow237
                                        ;   in Loop: Header=BB4_14 Depth=3
                                        ; implicit-def: $sgpr12
	s_and_saveexec_b32 s11, s9
	s_cbranch_execz .LBB4_25
; %bb.22:                               ; %.critedge
                                        ;   in Loop: Header=BB4_14 Depth=3
	global_load_b32 v12, v[10:11], off
	s_mov_b32 s9, 0
	s_mov_b32 s12, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v12
	s_cbranch_execz .LBB4_24
; %bb.23:                               ;   in Loop: Header=BB4_14 Depth=3
	v_add_nc_u32_e32 v12, -1, v12
	s_mov_b32 s9, exec_lo
	global_store_b32 v[10:11], v12, off
.LBB4_24:                               ; %Flow239
                                        ;   in Loop: Header=BB4_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s9, s9, exec_lo
	s_mov_b32 s12, -1
	s_or_b32 s10, s10, s9
.LBB4_25:                               ; %Flow238
                                        ;   in Loop: Header=BB4_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s11
	v_mov_b32_e32 v12, s7
	s_and_not1_b32 s8, s8, exec_lo
	s_and_b32 s11, s12, exec_lo
	s_mov_b32 s9, -1
	s_or_b32 s8, s8, s11
	s_and_saveexec_b32 s11, s10
; %bb.26:                               ; %.loopexit
                                        ;   in Loop: Header=BB4_14 Depth=3
	s_add_i32 s10, s7, 1
	s_cmp_eq_u32 s7, s52
	v_mov_b32_e32 v12, s7
	s_cselect_b32 s7, -1, 0
	s_and_not1_b32 s8, s8, exec_lo
	s_or_not1_b32 s9, s7, exec_lo
	s_mov_b32 s7, s10
; %bb.27:                               ; %Flow240
                                        ;   in Loop: Header=BB4_14 Depth=3
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s9, exec_lo, s9
	s_or_b32 s5, s9, s5
	s_and_not1_b32 s6, s6, exec_lo
	s_and_b32 s9, s8, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s6, s6, s9
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB4_14
; %bb.28:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB4_13 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s4, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB4_30
; %bb.29:                               ; %.critedge134
                                        ;   in Loop: Header=BB4_13 Depth=2
	global_store_b32 v[10:11], v12, off
.LBB4_30:                               ; %.loopexit139
                                        ;   in Loop: Header=BB4_13 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, s52
	s_cbranch_scc0 .LBB4_13
; %bb.31:                               ;   in Loop: Header=BB4_10 Depth=1
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_mov_b32 s0, 0
	v_mov_b32_e32 v10, v41
	s_mov_b32 s4, s0
	v_mov_b32_e32 v11, v42
	v_cndmask_b32_e32 v3, 0xbff00000, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v13, v3 :: v_dual_mov_b32 v12, v2
.LBB4_32:                               ;   Parent Loop BB4_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v15, v[10:11], off
	s_lshl_b64 s[6:7], s[0:1], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s5, s48, s6
	s_addc_u32 s6, s49, s7
	s_add_i32 s4, s4, 1
	s_add_i32 s0, s0, s52
	s_cmp_eq_u32 s52, s4
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v16, 31, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 3, v[15:16]
	v_add_co_u32 v15, vcc_lo, s5, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v16, vcc_lo, s6, v16, vcc_lo
	v_add_co_u32 v10, vcc_lo, v10, 4
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[12:13], v[15:16]
	s_cbranch_scc0 .LBB4_32
; %bb.33:                               ;   in Loop: Header=BB4_10 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[12:13], v[6:7]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_mov_b32 s4, 0
	global_store_b64 v[4:5], v[6:7], off
.LBB4_34:                               ;   Parent Loop BB4_10 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB4_36 Depth 3
	v_mov_b32_e32 v3, 0
	s_mov_b32 s0, s4
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s4, s52
	s_cbranch_scc1 .LBB4_37
; %bb.35:                               ; %.lr.ph166
                                        ;   in Loop: Header=BB4_34 Depth=2
	s_lshl_b64 s[6:7], s[0:1], 2
	v_mov_b32_e32 v3, 0
	v_add_co_u32 v12, vcc_lo, v41, s6
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v42, vcc_lo
	s_mov_b32 s5, s4
	global_load_b32 v15, v[12:13], off
	v_dual_mov_b32 v13, v11 :: v_dual_mov_b32 v12, v10
.LBB4_36:                               ;   Parent Loop BB4_10 Depth=1
                                        ;     Parent Loop BB4_34 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v16, v[12:13], off
	v_add_co_u32 v12, vcc_lo, v12, 4
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s5, s52
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v16, v15
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_cbranch_scc0 .LBB4_36
.LBB4_37:                               ; %._crit_edge167
                                        ;   in Loop: Header=BB4_34 Depth=2
	s_lshl_b64 s[6:7], s[0:1], 2
	s_cmp_lg_u32 s4, s52
	v_add_co_u32 v12, vcc_lo, v41, s6
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v42, vcc_lo
	v_add_co_u32 v10, vcc_lo, v10, 4
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	global_store_b32 v[12:13], v3, off
	s_cbranch_scc1 .LBB4_34
; %bb.38:                               ; %.lr.ph173.preheader
                                        ;   in Loop: Header=BB4_10 Depth=1
	v_mov_b32_e32 v3, 0
	s_mov_b32 s4, 1
	s_mov_b32 s5, 0
.LBB4_39:                               ; %.lr.ph173
                                        ;   Parent Loop BB4_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s52, s5
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[0:1], 2
	s_ashr_i32 s0, s4, 31
	v_add_co_u32 v10, vcc_lo, v41, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v42, vcc_lo
	v_add_co_u32 v12, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v1, vcc_lo
	s_add_i32 s6, s4, s0
	global_load_b32 v15, v[10:11], off
	global_load_b32 v12, v[12:13], off
	s_xor_b32 s6, s6, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v13, s6
	s_sub_i32 s7, 0, s6
	s_cmp_eq_u32 s52, s4
	v_rcp_iflag_f32_e32 v13, v13
	s_waitcnt vmcnt(0)
	v_add3_u32 v12, v15, v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v12
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, 0x4f7ffffe, v13
	v_cvt_u32_f32_e32 v13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v16, s7, v13
	v_mul_hi_u32 v15, v13, v16
	v_add_nc_u32_e32 v16, v12, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, v13, v15
	v_xor_b32_e32 v15, v16, v3
	v_xor_b32_e32 v3, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v13, v15, v13
	v_mul_lo_u32 v16, v13, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v15, v15, v16
	v_add_nc_u32_e32 v16, 1, v13
	v_subrev_nc_u32_e32 v17, s6, v15
	v_cmp_le_u32_e32 vcc_lo, s6, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v13, v13, v16, vcc_lo
	v_cndmask_b32_e32 v15, v15, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v16, 1, v13
	v_cmp_le_u32_e32 vcc_lo, s6, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v13, v13, v16, vcc_lo
	v_xor_b32_e32 v13, v13, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v13, v3
	s_cbranch_scc1 .LBB4_41
; %bb.40:                               ;   in Loop: Header=BB4_39 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v13, v3, s4
	v_sub_nc_u32_e32 v12, v12, v13
.LBB4_41:                               ;   in Loop: Header=BB4_39 Depth=2
	s_add_i32 s5, s5, -1
	s_add_i32 s4, s4, 1
	s_add_i32 s0, s52, s5
	global_store_b32 v[10:11], v12, off
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc0 .LBB4_39
; %bb.42:                               ; %._crit_edge174
                                        ;   in Loop: Header=BB4_10 Depth=1
	global_load_b32 v10, v[41:42], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s52, v3
	global_store_b32 v[41:42], v3, off
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_10
.LBB4_43:                               ; %Flow243
	s_or_b32 exec_lo, exec_lo, s2
	v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_3
; %bb.44:
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB4_3
.LBB4_45:
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_add_u32 s8, s46, 16
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9detHelperPvPd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 8
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 136
		.amdhsa_next_free_sgpr 59
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z9detHelperPvPd, .Lfunc_end4-_Z9detHelperPvPd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2036
; NumSgprs: 61
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 7
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 61
; NumVGPRsForWavesPerEU: 136
; Occupancy: 10
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.type	__unnamed_1,@object             ; @0
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
__unnamed_1:
	.long	130054                          ; 0x1fc06
	.long	129546                          ; 0x1fa0a
	.long	110114                          ; 0x1ae22
	.long	16288                           ; 0x3fa0
	.long	6                               ; 0x6
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	4195                            ; 0x1063
	.long	86927                           ; 0x1538f
	.long	86758                           ; 0x152e6
	.long	73744                           ; 0x12010
	.long	10904                           ; 0x2a98
	.long	399                             ; 0x18f
	.long	512                             ; 0x200
	.long	0                               ; 0x0
	.long	2804                            ; 0xaf4
	.long	65280                           ; 0xff00
	.long	64770                           ; 0xfd02
	.long	55054                           ; 0xd70e
	.long	8192                            ; 0x2000
	.long	0                               ; 0x0
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	2107                            ; 0x83b
	.long	43576                           ; 0xaa38
	.long	43406                           ; 0xa98e
	.long	36895                           ; 0x901f
	.long	5504                            ; 0x1580
	.long	56                              ; 0x38
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	1405                            ; 0x57d
	.long	32703                           ; 0x7fbf
	.long	32193                           ; 0x7dc1
	.long	27364                           ; 0x6ae4
	.long	4160                            ; 0x1040
	.long	63                              ; 0x3f
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	1054                            ; 0x41e
	.long	21816                           ; 0x5538
	.long	21646                           ; 0x548e
	.long	18399                           ; 0x47df
	.long	2816                            ; 0xb00
	.long	56                              ; 0x38
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	703                             ; 0x2bf
	.long	16367                           ; 0x3fef
	.long	15856                           ; 0x3df0
	.long	13477                           ; 0x34a5
	.long	2176                            ; 0x880
	.long	15                              ; 0xf
	.long	32                              ; 0x20
	.long	32768                           ; 0x8000
	.long	527                             ; 0x20f
	.long	10915                           ; 0x2aa3
	.long	10745                           ; 0x29f9
	.long	9133                            ; 0x23ad
	.long	1472                            ; 0x5c0
	.long	35                              ; 0x23
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	352                             ; 0x160
	.long	8187                            ; 0x1ffb
	.long	7676                            ; 0x1dfc
	.long	6524                            ; 0x197c
	.long	1280                            ; 0x500
	.long	11                              ; 0xb
	.long	16                              ; 0x10
	.long	134219776                       ; 0x8000800
	.long	265                             ; 0x109
	.long	5459                            ; 0x1553
	.long	5289                            ; 0x14a9
	.long	4495                            ; 0x118f
	.long	896                             ; 0x380
	.long	19                              ; 0x13
	.long	32                              ; 0x20
	.long	524288                          ; 0x80000
	.long	176                             ; 0xb0
	.long	4094                            ; 0xffe
	.long	3583                            ; 0xdff
	.long	3045                            ; 0xbe5
	.long	1024                            ; 0x400
	.long	6                               ; 0x6
	.long	8                               ; 0x8
	.long	1077952576                      ; 0x40404040
	.long	133                             ; 0x85
	.long	2730                            ; 0xaaa
	.long	2560                            ; 0xa00
	.long	2176                            ; 0x880
	.long	512                             ; 0x200
	.long	10                              ; 0xa
	.long	16                              ; 0x10
	.long	67109888                        ; 0x4000400
	.long	89                              ; 0x59
	.long	2047                            ; 0x7ff
	.long	1536                            ; 0x600
	.long	1305                            ; 0x519
	.long	1024                            ; 0x400
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	2290649224                      ; 0x88888888
	.long	66                              ; 0x42
	.long	1365                            ; 0x555
	.long	1195                            ; 0x4ab
	.long	1015                            ; 0x3f7
	.long	512                             ; 0x200
	.long	5                               ; 0x5
	.long	8                               ; 0x8
	.long	538976288                       ; 0x20202020
	.long	44                              ; 0x2c
	.long	1023                            ; 0x3ff
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	2863311530                      ; 0xaaaaaaaa
	.long	34                              ; 0x22
	.long	682                             ; 0x2aa
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	1145324612                      ; 0x44444444
	.long	35                              ; 0x23
	.size	__unnamed_1, 512

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPvS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPvS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3mulPvS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z3mulPvS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         96
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         112
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9detHelperPvPd
    .private_segment_fixed_size: 8
    .sgpr_count:     61
    .sgpr_spill_count: 0
    .symbol:         _Z9detHelperPvPd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     136
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
