/*
 ============================================================================
 Name        : scan.cu
 Author      : adaloglou
 Version     :
 Copyright   : ___Adaloglou___
 Description : CUDA compute reciprocals
 ============================================================================
 */

#include <iostream>
#include <numeric>
#include <stdlib.h>
#include<stdio.h>
#include<math.h>

#define SIZE 1024
typedef struct
{
	int width;
	int height;
	float* elements;
} Matrix;
void matrixInitSet ( Matrix *matrix  , float value  )
{

	if (matrix)
	{
		for (int i=0 ; i<matrix->height; i++)
		{
			for (int j=0 ; j<matrix->width; j++)
			{
				matrix->elements[i*matrix->width +j]=value ;
			}
		}
	}
}
void vectorPrint( float *A , size_t length  )
{
	size_t i ;
	for( i=0 ; i < length ;  i ++ )
	{
		printf("i= %lu value  = %f \n", i , A[i]);

	}
	printf("-----------------\n");
}


__global__ void reduce0(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];
	__syncthreads();

	// do reduction in shared mem
	for(unsigned int s=1; s < blockDim.x; s *= 2)
	{
		if (tid % (2*s) == 0)
		{
			sdata[tid] += sdata[tid + s];
		}
		__syncthreads();
	}
	__syncthreads();
	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];

}


__global__ void reduce1(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];
	__syncthreads();
	// do reduction in shared mem
	for (unsigned int s=1; s < blockDim.x; s *= 2)
	{
		int index = 2 * s * tid;
		if (index < blockDim.x) {
		sdata[index] += sdata[index + s];
		}
		__syncthreads();
	}

	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];

}

__global__ void reduce3(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];
	__syncthreads();
	// do reduction in shared mem
	for (unsigned int s=blockDim.x/2; s>0; s>>=1)
	{
	if (tid < s)
	{
	sdata[tid] += sdata[tid + s];
	}
	__syncthreads();

	}
	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];
}


__global__ void reduce4(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata3[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;

	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	sdata3[tid] = g_idata[i] + g_idata[i+blockDim.x];
	__syncthreads();
	// do reduction in shared mem
	for (unsigned int s=blockDim.x/2; s>0; s>>=1)
	{
	if (tid < s)
	{
		sdata3[tid] += sdata3[tid + s];
	}
	__syncthreads();

	}
	// write result for this block to global mem
	if (tid == 0)
		{

		g_odata[blockIdx.x] = sdata3[0];
		sdata3[0] =0 ;
		}

}


__global__ void reduce5(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;

	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	sdata[tid] = g_idata[i] + g_idata[i+blockDim.x];
	__syncthreads();
	// do reduction in shared mem

	for (unsigned int s=blockDim.x/2; s>32; s>>=1)
	{
	if (tid < s)
	sdata[tid] += sdata[tid + s];
	__syncthreads();
	}
	if (tid < 32)
	{
	sdata[tid] += sdata[tid + 32];
	sdata[tid] += sdata[tid + 16];
	sdata[tid] += sdata[tid + 8];
	sdata[tid] += sdata[tid + 4];
	sdata[tid] += sdata[tid + 2];
	sdata[tid] += sdata[tid + 1];
	}

	// write result for this block to global mem
	if (tid == 0)
		{
		g_odata[blockIdx.x] = sdata[0];
		sdata[0]=0;
		}

}

template <unsigned int blockSize>
__global__ void reduce6(int *g_idata, int *g_odata, unsigned int n)
{
extern __shared__ float sdata2[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x*(blockSize*2) + tid;
unsigned int gridSize = blockSize*2*gridDim.x;
sdata2[tid] = 0;
while (i < n) { sdata2[tid] += g_idata[i] + g_idata[i+blockSize]; i += gridSize; }
__syncthreads();
if (blockSize >= 512) { if (tid < 256) { sdata2[tid] += sdata2[tid + 256]; } __syncthreads(); }
if (blockSize >= 256) { if (tid < 128) { sdata2[tid] += sdata2[tid + 128]; } __syncthreads(); }
if (blockSize >= 128) { if (tid < 64) { sdata2[tid] += sdata2[tid + 64]; } __syncthreads(); }
if (tid < 32) {
if (blockSize >= 64) sdata2[tid] += sdata2[tid + 32];
if (blockSize >= 32) sdata2[tid] += sdata2[tid + 16];
if (blockSize >= 16) sdata2[tid] += sdata2[tid + 8];
if (blockSize >= 8) sdata2[tid] += sdata2[tid + 4];
if (blockSize >= 4) sdata2[tid] += sdata2[tid + 2];
if (blockSize >= 2) sdata2[tid] += sdata2[tid + 1];
}
if (tid == 0) g_odata[blockIdx.x] = sdata2[0];
}


int main()
 {
    float h_in[SIZE],h_out[SIZE];
    int i;
     for (i = 0; i < SIZE; i++)
        h_in[i] = 1.0;
    //for (i = 0; i < SIZE; i++)	printf("%d ", h_in[i]);



   float *d_in2;
   float *d_out2;
   cudaMalloc((void**)&d_in2, sizeof(float)* SIZE);
   cudaMalloc((void**)&d_out2, sizeof(float)*SIZE);
   cudaMemcpy(d_in2, h_in, sizeof(float) * SIZE, cudaMemcpyHostToDevice);


/*
   reduce0<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n R0 \n");
   printf(" value  = %f \n", h_out[0]);


   reduce1<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n R1 \n");
   printf(" value  = %f \n", h_out[0]);


   reduce3<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n R3 \n");
   printf(" value  = %f \n", h_out[0]);

  /////////////////////////////////////////////////////////////////
   reduce4<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n  R4  \n ");
   vectorPrint( h_out , 1  ) ;
*/
     reduce5<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
     cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
     printf("\n r5 \n");
     printf(" value  = %f \n", h_out[0]);


  return 0;
}



/*
 *
 * __global__ void scan(int *d_in,int *d_out,int n)
{
    extern __shared__ int sdata[];
    int i;
    int tid = threadIdx.x;
    sdata[tid] = d_in[tid];
    for (i = 1; i <n; i <<= 1)
    //for (i = 1; i <n; i++)
     {

        if (tid>=i)
         {
            sdata[tid] +=sdata[tid-i];
        }
        __syncthreads();
    }
    d_out[tid] = sdata[tid];
     __syncthreads();
 }

int main()
 {

    int h_in[SIZE],h_out[SIZE];
    int i,j;
     for (i = 0; i < SIZE; i++)
        h_in[i] = 2*i+1;
    for (i = 0; i < SIZE; i++)
        printf("%d ", h_in[i]);
   int *d_in;
   int *d_out;
   cudaMalloc((void**)&d_in, sizeof(int)* 16);
   cudaMalloc((void**)&d_out, sizeof(int)* 16);
   cudaMemcpy(d_in, h_in, sizeof(int) * 16, cudaMemcpyHostToDevice);

   scan <<<1, SIZE, sizeof(int)*SIZE >>>(d_in,d_out, SIZE);

   cudaMemcpy(h_out, d_out, sizeof(int) * SIZE, cudaMemcpyDeviceToHost);
   printf("\n\n");
   for (i = 0; i < SIZE; i++)
      printf("%d ", h_out[i]);
  return 0;
}


*/



	.file	"tmpxft_002b0af5_00000000-6_reduction_test1.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3681:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3681:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z13matrixInitSetP6Matrixf
	.type	_Z13matrixInitSetP6Matrixf, @function
_Z13matrixInitSetP6Matrixf:
.LFB3674:
	.cfi_startproc
	endbr64
	testq	%rdi, %rdi
	je	.L2
	movl	4(%rdi), %r8d
	xorl	%edx, %edx
.L4:
	cmpl	%edx, %r8d
	jle	.L2
	movl	(%rdi), %esi
	xorl	%ecx, %ecx
	movl	%esi, %eax
	imull	%edx, %eax
	cltq
	salq	$2, %rax
.L6:
	cmpl	%ecx, %esi
	jle	.L11
	movq	8(%rdi), %r9
	incl	%ecx
	movss	%xmm0, (%r9,%rax)
	addq	$4, %rax
	jmp	.L6
.L11:
	incl	%edx
	jmp	.L4
.L2:
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z13matrixInitSetP6Matrixf, .-_Z13matrixInitSetP6Matrixf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"i= %lu value  = %f \n"
.LC1:
	.string	"-----------------\n"
	.text
	.globl	_Z11vectorPrintPfm
	.type	_Z11vectorPrintPfm, @function
_Z11vectorPrintPfm:
.LFB3675:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L13:
	cmpq	%rbp, %rbx
	je	.L16
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L13
.L16:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3675:
	.size	_Z11vectorPrintPfm, .-_Z11vectorPrintPfm
	.globl	_Z28__device_stub__Z7reduce0PfS_PfS_
	.type	_Z28__device_stub__Z7reduce0PfS_PfS_, @function
_Z28__device_stub__Z7reduce0PfS_PfS_:
.LFB3703:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce0PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L17:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3703:
	.size	_Z28__device_stub__Z7reduce0PfS_PfS_, .-_Z28__device_stub__Z7reduce0PfS_PfS_
	.globl	_Z7reduce0PfS_
	.type	_Z7reduce0PfS_, @function
_Z7reduce0PfS_:
.LFB3704:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce0PfS_PfS_
	.cfi_endproc
.LFE3704:
	.size	_Z7reduce0PfS_, .-_Z7reduce0PfS_
	.globl	_Z28__device_stub__Z7reduce1PfS_PfS_
	.type	_Z28__device_stub__Z7reduce1PfS_PfS_, @function
_Z28__device_stub__Z7reduce1PfS_PfS_:
.LFB3705:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce1PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L22:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3705:
	.size	_Z28__device_stub__Z7reduce1PfS_PfS_, .-_Z28__device_stub__Z7reduce1PfS_PfS_
	.globl	_Z7reduce1PfS_
	.type	_Z7reduce1PfS_, @function
_Z7reduce1PfS_:
.LFB3706:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce1PfS_PfS_
	.cfi_endproc
.LFE3706:
	.size	_Z7reduce1PfS_, .-_Z7reduce1PfS_
	.globl	_Z28__device_stub__Z7reduce3PfS_PfS_
	.type	_Z28__device_stub__Z7reduce3PfS_PfS_, @function
_Z28__device_stub__Z7reduce3PfS_PfS_:
.LFB3707:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce3PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L27:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3707:
	.size	_Z28__device_stub__Z7reduce3PfS_PfS_, .-_Z28__device_stub__Z7reduce3PfS_PfS_
	.globl	_Z7reduce3PfS_
	.type	_Z7reduce3PfS_, @function
_Z7reduce3PfS_:
.LFB3708:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce3PfS_PfS_
	.cfi_endproc
.LFE3708:
	.size	_Z7reduce3PfS_, .-_Z7reduce3PfS_
	.globl	_Z28__device_stub__Z7reduce4PfS_PfS_
	.type	_Z28__device_stub__Z7reduce4PfS_PfS_, @function
_Z28__device_stub__Z7reduce4PfS_PfS_:
.LFB3709:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce4PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L32:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3709:
	.size	_Z28__device_stub__Z7reduce4PfS_PfS_, .-_Z28__device_stub__Z7reduce4PfS_PfS_
	.globl	_Z7reduce4PfS_
	.type	_Z7reduce4PfS_, @function
_Z7reduce4PfS_:
.LFB3710:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce4PfS_PfS_
	.cfi_endproc
.LFE3710:
	.size	_Z7reduce4PfS_, .-_Z7reduce4PfS_
	.globl	_Z28__device_stub__Z7reduce5PfS_PfS_
	.type	_Z28__device_stub__Z7reduce5PfS_PfS_, @function
_Z28__device_stub__Z7reduce5PfS_PfS_:
.LFB3711:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce5PfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L37:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3711:
	.size	_Z28__device_stub__Z7reduce5PfS_PfS_, .-_Z28__device_stub__Z7reduce5PfS_PfS_
	.globl	_Z7reduce5PfS_
	.type	_Z7reduce5PfS_, @function
_Z7reduce5PfS_:
.LFB3712:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce5PfS_PfS_
	.cfi_endproc
.LFE3712:
	.size	_Z7reduce5PfS_, .-_Z7reduce5PfS_
	.section	.rodata.str1.1
.LC3:
	.string	"\n r5 \n"
.LC4:
	.string	" value  = %f \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3678:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4112
	orq	$0, (%rsp)
	subq	$4096, %rsp
	.cfi_def_cfa_offset 8208
	orq	$0, (%rsp)
	subq	$48, %rsp
	.cfi_def_cfa_offset 8256
	movss	.LC2(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 8232(%rsp)
	xorl	%eax, %eax
.L43:
	leaq	40(%rsp), %rbx
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$1024, %rax
	jne	.L43
	movq	%rsp, %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	movl	$4096, %r8d
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z7reduce5PfS_PfS_
.L44:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$4096, %edx
	leaq	4136(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4136(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$8240, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3678:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z7reduce5PfS_"
.LC6:
	.string	"_Z7reduce4PfS_"
.LC7:
	.string	"_Z7reduce3PfS_"
.LC8:
	.string	"_Z7reduce1PfS_"
.LC9:
	.string	"_Z7reduce0PfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3714:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7reduce5PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce4PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce3PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce1PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce0PfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3714:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 ============================================================================
 Name        : scan.cu
 Author      : adaloglou
 Version     :
 Copyright   : ___Adaloglou___
 Description : CUDA compute reciprocals
 ============================================================================
 */


#include <hip/hip_runtime.h>
#include <iostream>
#include <numeric>
#include <stdlib.h>
#include<stdio.h>
#include<math.h>

#define SIZE 1024
typedef struct
{
	int width;
	int height;
	float* elements;
} Matrix;
void matrixInitSet ( Matrix *matrix  , float value  )
{

	if (matrix)
	{
		for (int i=0 ; i<matrix->height; i++)
		{
			for (int j=0 ; j<matrix->width; j++)
			{
				matrix->elements[i*matrix->width +j]=value ;
			}
		}
	}
}
void vectorPrint( float *A , size_t length  )
{
	size_t i ;
	for( i=0 ; i < length ;  i ++ )
	{
		printf("i= %lu value  = %f \n", i , A[i]);

	}
	printf("-----------------\n");
}


__global__ void reduce0(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];
	__syncthreads();

	// do reduction in shared mem
	for(unsigned int s=1; s < blockDim.x; s *= 2)
	{
		if (tid % (2*s) == 0)
		{
			sdata[tid] += sdata[tid + s];
		}
		__syncthreads();
	}
	__syncthreads();
	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];

}


__global__ void reduce1(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];
	__syncthreads();
	// do reduction in shared mem
	for (unsigned int s=1; s < blockDim.x; s *= 2)
	{
		int index = 2 * s * tid;
		if (index < blockDim.x) {
		sdata[index] += sdata[index + s];
		}
		__syncthreads();
	}

	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];

}

__global__ void reduce3(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;
	sdata[tid] = g_idata[i];
	__syncthreads();
	// do reduction in shared mem
	for (unsigned int s=blockDim.x/2; s>0; s>>=1)
	{
	if (tid < s)
	{
	sdata[tid] += sdata[tid + s];
	}
	__syncthreads();

	}
	// write result for this block to global mem
	if (tid == 0) g_odata[blockIdx.x] = sdata[0];
}


__global__ void reduce4(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata3[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;

	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	sdata3[tid] = g_idata[i] + g_idata[i+blockDim.x];
	__syncthreads();
	// do reduction in shared mem
	for (unsigned int s=blockDim.x/2; s>0; s>>=1)
	{
	if (tid < s)
	{
		sdata3[tid] += sdata3[tid + s];
	}
	__syncthreads();

	}
	// write result for this block to global mem
	if (tid == 0)
		{

		g_odata[blockIdx.x] = sdata3[0];
		sdata3[0] =0 ;
		}

}


__global__ void reduce5(float *g_idata, float *g_odata)
{
	extern __shared__ float sdata[];
	// each thread loads one element from global to shared mem
	unsigned int tid = threadIdx.x;

	unsigned int i = blockIdx.x*(blockDim.x*2) + threadIdx.x;
	sdata[tid] = g_idata[i] + g_idata[i+blockDim.x];
	__syncthreads();
	// do reduction in shared mem

	for (unsigned int s=blockDim.x/2; s>32; s>>=1)
	{
	if (tid < s)
	sdata[tid] += sdata[tid + s];
	__syncthreads();
	}
	if (tid < 32)
	{
	sdata[tid] += sdata[tid + 32];
	sdata[tid] += sdata[tid + 16];
	sdata[tid] += sdata[tid + 8];
	sdata[tid] += sdata[tid + 4];
	sdata[tid] += sdata[tid + 2];
	sdata[tid] += sdata[tid + 1];
	}

	// write result for this block to global mem
	if (tid == 0)
		{
		g_odata[blockIdx.x] = sdata[0];
		sdata[0]=0;
		}

}

template <unsigned int blockSize>
__global__ void reduce6(int *g_idata, int *g_odata, unsigned int n)
{
extern __shared__ float sdata2[];
unsigned int tid = threadIdx.x;
unsigned int i = blockIdx.x*(blockSize*2) + tid;
unsigned int gridSize = blockSize*2*gridDim.x;
sdata2[tid] = 0;
while (i < n) { sdata2[tid] += g_idata[i] + g_idata[i+blockSize]; i += gridSize; }
__syncthreads();
if (blockSize >= 512) { if (tid < 256) { sdata2[tid] += sdata2[tid + 256]; } __syncthreads(); }
if (blockSize >= 256) { if (tid < 128) { sdata2[tid] += sdata2[tid + 128]; } __syncthreads(); }
if (blockSize >= 128) { if (tid < 64) { sdata2[tid] += sdata2[tid + 64]; } __syncthreads(); }
if (tid < 32) {
if (blockSize >= 64) sdata2[tid] += sdata2[tid + 32];
if (blockSize >= 32) sdata2[tid] += sdata2[tid + 16];
if (blockSize >= 16) sdata2[tid] += sdata2[tid + 8];
if (blockSize >= 8) sdata2[tid] += sdata2[tid + 4];
if (blockSize >= 4) sdata2[tid] += sdata2[tid + 2];
if (blockSize >= 2) sdata2[tid] += sdata2[tid + 1];
}
if (tid == 0) g_odata[blockIdx.x] = sdata2[0];
}


int main()
 {
    float h_in[SIZE],h_out[SIZE];
    int i;
     for (i = 0; i < SIZE; i++)
        h_in[i] = 1.0;
    //for (i = 0; i < SIZE; i++)	printf("%d ", h_in[i]);



   float *d_in2;
   float *d_out2;
   hipMalloc((void**)&d_in2, sizeof(float)* SIZE);
   hipMalloc((void**)&d_out2, sizeof(float)*SIZE);
   hipMemcpy(d_in2, h_in, sizeof(float) * SIZE, hipMemcpyHostToDevice);


/*
   reduce0<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n R0 \n");
   printf(" value  = %f \n", h_out[0]);


   reduce1<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n R1 \n");
   printf(" value  = %f \n", h_out[0]);


   reduce3<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n R3 \n");
   printf(" value  = %f \n", h_out[0]);

  /////////////////////////////////////////////////////////////////
   reduce4<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
   cudaMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), cudaMemcpyDeviceToHost);
   printf("\n  R4  \n ");
   vectorPrint( h_out , 1  ) ;
*/
     reduce5<<<1, SIZE, (sizeof(float)*SIZE) >>>(d_in2,d_out2 );
     hipMemcpy((void *)h_out, (void *)d_out2, SIZE*sizeof(float), hipMemcpyDeviceToHost);
     printf("\n r5 \n");
     printf(" value  = %f \n", h_out[0]);


  return 0;
}



/*
 *
 * __global__ void scan(int *d_in,int *d_out,int n)
{
    extern __shared__ int sdata[];
    int i;
    int tid = threadIdx.x;
    sdata[tid] = d_in[tid];
    for (i = 1; i <n; i <<= 1)
    //for (i = 1; i <n; i++)
     {

        if (tid>=i)
         {
            sdata[tid] +=sdata[tid-i];
        }
        __syncthreads();
    }
    d_out[tid] = sdata[tid];
     __syncthreads();
 }

int main()
 {

    int h_in[SIZE],h_out[SIZE];
    int i,j;
     for (i = 0; i < SIZE; i++)
        h_in[i] = 2*i+1;
    for (i = 0; i < SIZE; i++)
        printf("%d ", h_in[i]);
   int *d_in;
   int *d_out;
   cudaMalloc((void**)&d_in, sizeof(int)* 16);
   cudaMalloc((void**)&d_out, sizeof(int)* 16);
   cudaMemcpy(d_in, h_in, sizeof(int) * 16, cudaMemcpyHostToDevice);

   scan <<<1, SIZE, sizeof(int)*SIZE >>>(d_in,d_out, SIZE);

   cudaMemcpy(h_out, d_out, sizeof(int) * SIZE, cudaMemcpyDeviceToHost);
   printf("\n\n");
   for (i = 0; i < SIZE; i++)
      printf("%d ", h_out[i]);
  return 0;
}


*/



	.text
	.file	"reduction_test1.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z13matrixInitSetP6Matrixf      # -- Begin function _Z13matrixInitSetP6Matrixf
	.type	_Z13matrixInitSetP6Matrixf,@function
_Z13matrixInitSetP6Matrixf:             # @_Z13matrixInitSetP6Matrixf
	.cfi_startproc
# %bb.0:
	testq	%rdi, %rdi
	je	.LBB0_7
# %bb.1:                                # %.preheader14
	movl	4(%rdi), %eax
	testl	%eax, %eax
	jle	.LBB0_7
# %bb.2:                                # %.preheader.lr.ph
	movl	(%rdi), %ecx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB0_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_5 Depth 2
	testl	%ecx, %ecx
	jle	.LBB0_6
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB0_3 Depth=1
	movl	%edx, %r8d
	shlq	$2, %r8
	addq	8(%rdi), %r8
	xorl	%r9d, %r9d
.LBB0_5:                                #   Parent Loop BB0_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	%xmm0, (%r8,%r9,4)
	incq	%r9
	cmpq	%r9, %rcx
	jne	.LBB0_5
.LBB0_6:                                # %._crit_edge
                                        #   in Loop: Header=BB0_3 Depth=1
	incq	%rsi
	addl	%ecx, %edx
	cmpq	%rax, %rsi
	jne	.LBB0_3
.LBB0_7:                                # %.loopexit
	retq
.Lfunc_end0:
	.size	_Z13matrixInitSetP6Matrixf, .Lfunc_end0-_Z13matrixInitSetP6Matrixf
	.cfi_endproc
                                        # -- End function
	.globl	_Z11vectorPrintPfm              # -- Begin function _Z11vectorPrintPfm
	.type	_Z11vectorPrintPfm,@function
_Z11vectorPrintPfm:                     # @_Z11vectorPrintPfm
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movq	%r15, %rsi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	movl	$.Lstr, %edi
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end1:
	.size	_Z11vectorPrintPfm, .Lfunc_end1-_Z11vectorPrintPfm
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce0PfS_  # -- Begin function _Z22__device_stub__reduce0PfS_
	.type	_Z22__device_stub__reduce0PfS_,@function
_Z22__device_stub__reduce0PfS_:         # @_Z22__device_stub__reduce0PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce0PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__reduce0PfS_, .Lfunc_end2-_Z22__device_stub__reduce0PfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce1PfS_  # -- Begin function _Z22__device_stub__reduce1PfS_
	.type	_Z22__device_stub__reduce1PfS_,@function
_Z22__device_stub__reduce1PfS_:         # @_Z22__device_stub__reduce1PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce1PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z22__device_stub__reduce1PfS_, .Lfunc_end3-_Z22__device_stub__reduce1PfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce3PfS_  # -- Begin function _Z22__device_stub__reduce3PfS_
	.type	_Z22__device_stub__reduce3PfS_,@function
_Z22__device_stub__reduce3PfS_:         # @_Z22__device_stub__reduce3PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce3PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z22__device_stub__reduce3PfS_, .Lfunc_end4-_Z22__device_stub__reduce3PfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce4PfS_  # -- Begin function _Z22__device_stub__reduce4PfS_
	.type	_Z22__device_stub__reduce4PfS_,@function
_Z22__device_stub__reduce4PfS_:         # @_Z22__device_stub__reduce4PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce4PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z22__device_stub__reduce4PfS_, .Lfunc_end5-_Z22__device_stub__reduce4PfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce5PfS_  # -- Begin function _Z22__device_stub__reduce5PfS_
	.type	_Z22__device_stub__reduce5PfS_,@function
_Z22__device_stub__reduce5PfS_:         # @_Z22__device_stub__reduce5PfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce5PfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z22__device_stub__reduce5PfS_, .Lfunc_end6-_Z22__device_stub__reduce5PfS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$8208, %rsp                     # imm = 0x2010
	.cfi_def_cfa_offset 8224
	.cfi_offset %rbx, -16
	xorl	%eax, %eax
.LBB7_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, 16(%rsp,%rax,4)    # imm = 0x3F800000
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB7_1
# %bb.2:
	leaq	8(%rsp), %rbx
	movl	$4096, %esi                     # imm = 0x1000
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	16(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	1023(%rdi), %rdx
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z22__device_stub__reduce5PfS_
.LBB7_4:
	movq	(%rsp), %rsi
	leaq	4112(%rsp), %rbx
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$8208, %rsp                     # imm = 0x2010
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce0PfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce1PfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce3PfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce4PfS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce5PfS_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"i= %lu value  = %f \n"
	.size	.L.str, 21

	.type	_Z7reduce0PfS_,@object          # @_Z7reduce0PfS_
	.section	.rodata,"a",@progbits
	.globl	_Z7reduce0PfS_
	.p2align	3, 0x0
_Z7reduce0PfS_:
	.quad	_Z22__device_stub__reduce0PfS_
	.size	_Z7reduce0PfS_, 8

	.type	_Z7reduce1PfS_,@object          # @_Z7reduce1PfS_
	.globl	_Z7reduce1PfS_
	.p2align	3, 0x0
_Z7reduce1PfS_:
	.quad	_Z22__device_stub__reduce1PfS_
	.size	_Z7reduce1PfS_, 8

	.type	_Z7reduce3PfS_,@object          # @_Z7reduce3PfS_
	.globl	_Z7reduce3PfS_
	.p2align	3, 0x0
_Z7reduce3PfS_:
	.quad	_Z22__device_stub__reduce3PfS_
	.size	_Z7reduce3PfS_, 8

	.type	_Z7reduce4PfS_,@object          # @_Z7reduce4PfS_
	.globl	_Z7reduce4PfS_
	.p2align	3, 0x0
_Z7reduce4PfS_:
	.quad	_Z22__device_stub__reduce4PfS_
	.size	_Z7reduce4PfS_, 8

	.type	_Z7reduce5PfS_,@object          # @_Z7reduce5PfS_
	.globl	_Z7reduce5PfS_
	.p2align	3, 0x0
_Z7reduce5PfS_:
	.quad	_Z22__device_stub__reduce5PfS_
	.size	_Z7reduce5PfS_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	" value  = %f \n"
	.size	.L.str.3, 15

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7reduce0PfS_"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7reduce1PfS_"
	.size	.L__unnamed_2, 15

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7reduce3PfS_"
	.size	.L__unnamed_3, 15

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z7reduce4PfS_"
	.size	.L__unnamed_4, 15

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z7reduce5PfS_"
	.size	.L__unnamed_5, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"-----------------"
	.size	.Lstr, 18

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n r5 "
	.size	.Lstr.1, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__reduce0PfS_
	.addrsig_sym _Z22__device_stub__reduce1PfS_
	.addrsig_sym _Z22__device_stub__reduce3PfS_
	.addrsig_sym _Z22__device_stub__reduce4PfS_
	.addrsig_sym _Z22__device_stub__reduce5PfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7reduce0PfS_
	.addrsig_sym _Z7reduce1PfS_
	.addrsig_sym _Z7reduce3PfS_
	.addrsig_sym _Z7reduce4PfS_
	.addrsig_sym _Z7reduce5PfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7reduce0PfS_          ; -- Begin function _Z7reduce0PfS_
	.globl	_Z7reduce0PfS_
	.p2align	8
	.type	_Z7reduce0PfS_,@function
_Z7reduce0PfS_:                         ; @_Z7reduce0PfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s1, 1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s0, s1, 1
	s_add_i32 s6, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, s6, v0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v2, s1, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_ge_u32 s0, s5
	s_mov_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce0PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7reduce0PfS_, .Lfunc_end0-_Z7reduce0PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce1PfS_          ; -- Begin function _Z7reduce1PfS_
	.globl	_Z7reduce1PfS_
	.p2align	8
	.type	_Z7reduce1PfS_,@function
_Z7reduce1PfS_:                         ; @_Z7reduce1PfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s1, 1
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s0, s1, 1
	s_mov_b32 s6, exec_lo
	v_mul_lo_u32 v1, s0, v0
	v_cmpx_gt_u32_e64 s5, v1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshl_add_u32 v1, v1, 2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, s1, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_ge_u32 s0, s5
	s_mov_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce1PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7reduce1PfS_, .Lfunc_end1-_Z7reduce1PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce3PfS_          ; -- Begin function _Z7reduce3PfS_
	.globl	_Z7reduce3PfS_
	.p2align	8
	.type	_Z7reduce3PfS_,@function
_Z7reduce3PfS_:                         ; @_Z7reduce3PfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB2_4:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB2_1
.LBB2_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce3PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7reduce3PfS_, .Lfunc_end2-_Z7reduce3PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce4PfS_          ; -- Begin function _Z7reduce4PfS_
	.globl	_Z7reduce4PfS_
	.p2align	8
	.type	_Z7reduce4PfS_,@function
_Z7reduce4PfS_:                         ; @_Z7reduce4PfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_mul_i32 s6, s15, s5
	s_cmp_lt_u32 s5, 2
	v_lshl_add_u32 v1, s6, 1, v0
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB3_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB3_4
; %bb.3:                                ;   in Loop: Header=BB3_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB3_4:                                ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB3_1
.LBB3_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	ds_store_b32 v0, v0
	s_waitcnt lgkmcnt(1)
	global_store_b32 v0, v1, s[0:1]
.LBB3_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce4PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z7reduce4PfS_, .Lfunc_end3-_Z7reduce4PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce5PfS_          ; -- Begin function _Z7reduce5PfS_
	.globl	_Z7reduce5PfS_
	.p2align	8
	.type	_Z7reduce5PfS_,@function
_Z7reduce5PfS_:                         ; @_Z7reduce5PfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_mul_i32 s6, s15, s5
	s_cmpk_lt_u32 s5, 0x42
	v_lshl_add_u32 v1, s6, 1, v0
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB4_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB4_1 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB4_4
; %bb.3:                                ;   in Loop: Header=BB4_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB4_4:                                ;   in Loop: Header=BB4_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmpk_lt_u32 s5, 0x84
	s_mov_b32 s5, s0
	s_branch .LBB4_1
.LBB4_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB4_7
; %bb.6:
	ds_load_b32 v8, v1 offset:128
	ds_load_2addr_b32 v[2:3], v1 offset1:1
	ds_load_2addr_b32 v[4:5], v1 offset0:8 offset1:16
	ds_load_2addr_b32 v[6:7], v1 offset0:2 offset1:4
	s_waitcnt lgkmcnt(2)
	v_add_f32_e32 v2, v8, v2
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v5
	v_add_f32_e32 v2, v2, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v7
	v_add_f32_e32 v2, v2, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB4_7:
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_9
; %bb.8:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	ds_load_b32 v1, v0
	ds_store_b32 v0, v0
	s_waitcnt lgkmcnt(1)
	global_store_b32 v0, v1, s[0:1]
.LBB4_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce5PfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z7reduce5PfS_, .Lfunc_end4-_Z7reduce5PfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 444
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce0PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce0PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce1PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce1PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce3PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce3PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce4PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce4PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce5PfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce5PfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
