#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#define nWorld 2
#define N 24

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

void display(char **world,int height, int width)
{
	int i,j;
	for (i = 0; i < height; ++i)
	{
		for (j = 0; j < width; ++j)
		{
			printf("%d ",world[i][j]);
		}
		printf("\n");
	}
	sleep(3);
	system("clear");

}
__global__ void worldGenerator(char *world, int height, int width, int swap)
{

    const int2 thread_2D_pos = make_int2( blockIdx.x * blockDim.x + threadIdx.x,
                                            blockIdx.y * blockDim.y + threadIdx.y);

    const int thread_1D_pos = thread_2D_pos.y * width + thread_2D_pos.x;
 	

    int z = (swap)*height*width;



    
    
    int checker = 0;
    //printf("%d\n",swap);
    //printf("x:%d y:%d\n",thread_2D_pos.y,thread_2D_pos.x);
	int x0 = (thread_2D_pos.y - 1 + height)%height;
	int x1 = (thread_2D_pos.y + 1 + height)%height;
	int y0 = (thread_2D_pos.x - 1 + width)%width;
	int y1 = (thread_2D_pos.x + 1 + width)%width;





	
	//printf("x0:%d x1:%d y0:%d y1:%d \n",x0 * width,x1 * width ,y0,y1);
	// printf("%d:%d %d:%d %d:%d \n%d:%d %d:%d %d:%d \n%d:%d %d:%d %d:%d \n\n",z + x0 * width + y0,world[z + x0 * width + y0],                z + x0 * width + thread_2D_pos.x,world[z + x0 * width + thread_2D_pos.x],                z + x0 * width + y1,world[z + x0 * width + y1],
	// 							   z + thread_2D_pos.y * width + y0,world[z + thread_2D_pos.y * width + y0],   z + thread_2D_pos.y * width + thread_2D_pos.x,world[z + thread_2D_pos.y * width + thread_2D_pos.x],   z + thread_2D_pos.y * width + y1,world[z + thread_2D_pos.y * width + y1],
	// 							                z + x1 * width + y0,world[z + x1 * width + y0],                z + x1 * width + thread_2D_pos.x,world[z + x1 * width + thread_2D_pos.x],                z + x1 * width + y1,world[z + x1 * width + y1]);

	// if(threadIdx.x == 0 || threadIdx.x == (blockDim.x - 1) || threadIdx.y == 0 || threadIdx.y == (blockDim.y - 1) )
	// {
	// 	checker =                   world[z + x0 * width + y0] +  world[z + x0 * width + thread_2D_pos.x] +    world[z + x0 * width + y1] +
	// 			      world[z + thread_2D_pos.y * width + y0] +                                       world[z + thread_2D_pos.y * width + y1] +
	// 		                        world[z + x1 * width + y0] +  world[z + x1 * width + thread_2D_pos.x] +    world[z + x1 * width + y1] ;		
	// }
	// else
	// {	
	// 	checker =           sWorld[Sx0 * blockDim.x + Sy0] +  sWorld[Sx0 * blockDim.x + threadIdx.x] +      sWorld[Sx0 * blockDim.x + Sy1] +
	// 	           sWorld[threadIdx.y * blockDim.x + Sy0] +                                             sWorld[threadIdx.y * blockDim.x + Sy1] +
	//                         sWorld[Sx1 * blockDim.x + Sy0] +  sWorld[Sx1 * blockDim.x + threadIdx.x] +      sWorld[Sx1 * blockDim.x + Sy1] ;
	
	// }





	checker =              (int) world[z + x0 * width + y0] + (int) world[z + x0 * width + thread_2D_pos.x] +   (int) world[z + x0 * width + y1] +
		      (int )world[z + thread_2D_pos.y * width + y0] +                                (int) world[z + thread_2D_pos.y * width + y1] +
	                       (int) world[z + x1 * width + y0] + (int) world[z + x1 * width + thread_2D_pos.x] +   (int) world[z + x1 * width + y1] ;
	// //printf("%d\n",checker);
	if(checker == 3 || ( checker == 2 && world[(swap)*height*width +  thread_1D_pos] == 0))
		world[(!swap)*height*width +  thread_1D_pos] = 1;
	else
		world[(!swap)*height*width +  thread_1D_pos] = 0;          

}

// __global__ void worldGenerator(int height,int width)
// {
// 	printf("height:%d width:%d\n",height,width);
// }

int main(int argc, char const *argv[])
{
	if(argc != 3)
	{
		printf(" ./run [dataSet] [interations]\n");
		return -1;
	}
	int i,j,k,swap;
	int height = 0, width = 0;
	int iteration = atoi(argv[2]);
	char *world = NULL;
	char *d_world = NULL;
	char remark[50] = "No shared mem";

    float timez;

    cudaEvent_t start, stop;

// Read the pattern

	FILE *fp = NULL;
	if((fp = fopen(argv[1],"r")) == NULL)
	{
		printf("Pattern file not opened\n");
		return -1;
	}


	fscanf(fp,"%d",&height);
	fscanf(fp,"%d",&width);

// allocate memory	
	world = (char *) calloc(nWorld*width*height,sizeof(char));
	for (i = 0; i < height; ++i)
	{
		for (j = 0; j < width; ++j)
		{
			fscanf(fp,"%d ",&world[0 * width * height + i * width + j]);
		}
	}
	fclose(fp);
// Getting the Data
	// for (k = 0; k < nWorld; ++k)
	// {
	// 	for (i = 0; i < height; ++i)
	// 	{
	// 		for (j = 0; j < width; ++j)
	// 		{
	// 			printf("%d ",world[k * width * height + i * width + j]);
	// 		}
	// 		printf("\n");
	// 	}
	// 	printf("\n");
	// }

// GPU sections
    dim3 grid(height/N,width/N);            // defines a grid of 256 x 1 x 1 blocks
    dim3 block(N,N); 	


    gpuErrchk( cudaEventCreate(&start) );
    gpuErrchk( cudaEventCreate(&stop) );
    gpuErrchk( cudaEventRecord(start, 0) );

	gpuErrchk(cudaMalloc((void**)&d_world, nWorld * width * height * sizeof(char)));
	gpuErrchk(cudaMemcpy(d_world, world, nWorld * width * height * sizeof(char), cudaMemcpyHostToDevice));

	for (i = 0,swap = 0; i < iteration; ++i)
	{
        worldGenerator<<< grid, block>>>(d_world,height,width,swap);
		swap = !swap;
	}

	gpuErrchk(cudaMemcpy(world, d_world, nWorld * width * height * sizeof(char), cudaMemcpyDeviceToHost));
	

    gpuErrchk( cudaEventRecord(stop, 0) );
    gpuErrchk( cudaEventSynchronize(stop) );
    gpuErrchk( cudaEventElapsedTime(&timez, start, stop) );  
	
	if((fp = fopen("GPUOutputChar","w")) == NULL)
	{
		printf("GPUOutput file not opened\n");
		return -1;
	}
	for (k = 0; k < nWorld; ++k)
	{
		for (i = 0; i < height; ++i)
		{
			for (j = 0; j < width; ++j)
			{
				fprintf(fp,"%d ",world[k * width * height + i * width + j]);
			}
			fprintf(fp,"\n");
		}		
		fprintf(fp,"\n");
	}	
    printf("Time to generate using GPU:  %3.1f ms \n", timez);	
 	if((fp = fopen("timing","a+")) == NULL)
	{
		printf("GPUOutput file not opened\n");
		return -1;
	}   
	fprintf(fp, "GPU char access with %s- > Height: %d Width: %d Iteration: %d Time: %f\n",remark,height,width,iteration,timez);
	return 0;
}

// algorithm to try out
/*

Since int access takes in 4 bytes use that information to process 3 cells
ie push data to device as char but read them as int



*/
	.file	"tmpxft_003519e6_00000000-6_gpuGameOfLifeCharAccess.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2045:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2045:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2040:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%d "
.LC2:
	.string	"\n"
.LC3:
	.string	"clear"
	.text
	.globl	_Z7displayPPcii
	.type	_Z7displayPPcii, @function
_Z7displayPPcii:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 64
.L13:
	cmpl	%ebx, %r12d
	jle	.L18
	xorl	%ebp, %ebp
.L15:
	cmpl	%ebp, %r14d
	jle	.L19
	movq	0(%r13,%rbx,8), %rax
	movq	%r15, %rsi
	movl	$2, %edi
	movsbl	(%rax,%rbp), %edx
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	jmp	.L15
.L19:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L13
.L18:
	movl	$3, %edi
	call	sleep@PLT
	popq	%rax
	.cfi_def_cfa_offset 56
	leaq	.LC3(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	system@PLT
	.cfi_endproc
.LFE2041:
	.size	_Z7displayPPcii, .-_Z7displayPPcii
	.globl	_Z37__device_stub__Z14worldGeneratorPciiiPciii
	.type	_Z37__device_stub__Z14worldGeneratorPciiiPciii, @function
_Z37__device_stub__Z14worldGeneratorPciiiPciii:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14worldGeneratorPciii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z37__device_stub__Z14worldGeneratorPciiiPciii, .-_Z37__device_stub__Z14worldGeneratorPciiiPciii
	.globl	_Z14worldGeneratorPciii
	.type	_Z14worldGeneratorPciii, @function
_Z14worldGeneratorPciii:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14worldGeneratorPciiiPciii
	.cfi_endproc
.LFE2068:
	.size	_Z14worldGeneratorPciii, .-_Z14worldGeneratorPciii
	.section	.rodata.str1.1
.LC4:
	.string	" ./run [dataSet] [interations]\n"
.LC5:
	.string	"r"
.LC6:
	.string	"Pattern file not opened\n"
.LC7:
	.string	"%d"
.LC8:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Pauly91/GPUgameOfLife/master/gpuGameOfLifeCharAccess.cu"
.LC9:
	.string	"w"
.LC10:
	.string	"GPUOutputChar"
.LC11:
	.string	"GPUOutput file not opened\n"
.LC12:
	.string	"Time to generate using GPU:  %3.1f ms \n"
.LC13:
	.string	"a+"
.LC14:
	.string	"timing"
.LC15:
	.string	"GPU char access with %s- > Height: %d Width: %d Iteration: %d Time: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L26
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	jmp	.L51
.L26:
	movq	%rsi, %rbx
	xorl	%esi, %esi
	movq	16(%rbx), %rdi
	movl	%esi, 4(%rsp)
	movl	%esi, 8(%rsp)
	call	atoi@PLT
	xorl	%edi, %edi
	movl	$34, %ecx
	movabsq	$469853085796, %rdx
	movl	%eax, %r12d
	movq	%rdi, 16(%rsp)
	leaq	86(%rsp), %rdi
	movabsq	$7310012246411734862, %rax
	movq	%rax, 70(%rsp)
	xorl	%eax, %eax
	leaq	.LC5(%rip), %rsi
	rep stosb
	movq	8(%rbx), %rdi
	movq	%rdx, 78(%rsp)
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L28
	leaq	.LC6(%rip), %rsi
.L52:
	movl	$2, %edi
	xorl	%eax, %eax
.L51:
	call	__printf_chk@PLT
	orl	$-1, %eax
	jmp	.L25
.L28:
	leaq	.LC7(%rip), %rbp
	movq	%rax, %rdi
	leaq	4(%rsp), %rdx
	xorl	%eax, %eax
	movq	%rbp, %rsi
	xorl	%r14d, %r14d
	leaq	.LC1(%rip), %r13
	call	__isoc23_fscanf@PLT
	movq	%rbp, %rsi
	leaq	8(%rsp), %rdx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	8(%rsp), %edi
	imull	4(%rsp), %edi
	movl	$1, %esi
	addl	%edi, %edi
	movslq	%edi, %rdi
	call	calloc@PLT
	movq	%rax, %rbp
.L30:
	cmpl	%r14d, 4(%rsp)
	jle	.L53
	xorl	%r15d, %r15d
.L32:
	movl	8(%rsp), %edx
	cmpl	%r15d, %edx
	jle	.L54
	imull	%r14d, %edx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	addl	%r15d, %edx
	incl	%r15d
	movslq	%edx, %rdx
	addq	%rbp, %rdx
	call	__isoc23_fscanf@PLT
	jmp	.L32
.L54:
	incl	%r14d
	jmp	.L30
.L53:
	movq	%rbx, %rdi
	leaq	.LC8(%rip), %rbx
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
	call	fclose@PLT
	movl	8(%rsp), %eax
	movl	$24, %esi
	leaq	24(%rsp), %rdi
	movl	$1, 52(%rsp)
	cltd
	movl	$1, 64(%rsp)
	idivl	%esi
	movl	%eax, %ecx
	movl	4(%rsp), %eax
	movl	%ecx, 48(%rsp)
	cltd
	idivl	%esi
	movl	%eax, 44(%rsp)
	movabsq	$103079215128, %rax
	movq	%rax, 56(%rsp)
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$159, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$1, %ecx
	movl	$160, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$1, %ecx
	movl	$161, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	8(%rsp), %esi
	imull	4(%rsp), %esi
	leaq	16(%rsp), %rdi
	addl	%esi, %esi
	movslq	%esi, %rsi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$163, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	8(%rsp), %edx
	imull	4(%rsp), %edx
	movq	%rbp, %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	addl	%edx, %edx
	movslq	%edx, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$164, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
.L33:
	cmpl	%r12d, %r13d
	jge	.L55
	movl	64(%rsp), %ecx
	movq	56(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movl	8(%rsp), %edx
	movl	4(%rsp), %esi
	movl	%r14d, %ecx
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z14worldGeneratorPciiiPciii
.L34:
	xorl	$1, %r14d
	incl	%r13d
	jmp	.L33
.L55:
	movl	8(%rsp), %edx
	imull	4(%rsp), %edx
	movq	%rbp, %rdi
	xorl	%r13d, %r13d
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	addl	%edx, %edx
	movslq	%edx, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$172, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$175, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$176, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	%rbx, %rsi
	movl	$1, %ecx
	movl	$177, %edx
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	.LC9(%rip), %rsi
	leaq	.LC10(%rip), %rdi
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L36
.L41:
	leaq	.LC11(%rip), %rsi
	jmp	.L52
.L56:
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	movq	%rbx, %rdi
	call	__fprintf_chk@PLT
	testl	%r13d, %r13d
	jne	.L39
	movl	$1, %r13d
.L36:
	xorl	%r15d, %r15d
.L40:
	cmpl	%r15d, 4(%rsp)
	jle	.L56
	xorl	%r14d, %r14d
.L38:
	movl	8(%rsp), %edx
	cmpl	%r14d, %edx
	jle	.L57
	movl	%edx, %eax
	imull	%r15d, %edx
	movl	$2, %esi
	movq	%rbx, %rdi
	imull	%r13d, %eax
	imull	4(%rsp), %eax
	addl	%edx, %eax
	leaq	.LC1(%rip), %rdx
	addl	%r14d, %eax
	incl	%r14d
	cltq
	movsbl	0(%rbp,%rax), %ecx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L38
.L57:
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	incl	%r15d
	movl	$2, %esi
	call	__fprintf_chk@PLT
	jmp	.L40
.L39:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC14(%rip), %rdi
	leaq	.LC13(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %rdi
	testq	%rax, %rax
	je	.L41
	leaq	70(%rsp), %rcx
	cvtss2sd	12(%rsp), %xmm0
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	$2, %esi
	pushq	%r12
	.cfi_def_cfa_offset 208
	movl	24(%rsp), %r9d
	leaq	.LC15(%rip), %rdx
	movb	$1, %al
	movl	20(%rsp), %r8d
	call	__fprintf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 200
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 192
.L25:
	movq	120(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2042:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z14worldGeneratorPciii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14worldGeneratorPciii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#define nWorld 2
#define N 24

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

void display(char **world,int height, int width)
{
	int i,j;
	for (i = 0; i < height; ++i)
	{
		for (j = 0; j < width; ++j)
		{
			printf("%d ",world[i][j]);
		}
		printf("\n");
	}
	sleep(3);
	system("clear");

}
__global__ void worldGenerator(char *world, int height, int width, int swap)
{

    const int2 thread_2D_pos = make_int2( blockIdx.x * blockDim.x + threadIdx.x,
                                            blockIdx.y * blockDim.y + threadIdx.y);

    const int thread_1D_pos = thread_2D_pos.y * width + thread_2D_pos.x;
 	

    int z = (swap)*height*width;



    
    
    int checker = 0;
    //printf("%d\n",swap);
    //printf("x:%d y:%d\n",thread_2D_pos.y,thread_2D_pos.x);
	int x0 = (thread_2D_pos.y - 1 + height)%height;
	int x1 = (thread_2D_pos.y + 1 + height)%height;
	int y0 = (thread_2D_pos.x - 1 + width)%width;
	int y1 = (thread_2D_pos.x + 1 + width)%width;





	
	//printf("x0:%d x1:%d y0:%d y1:%d \n",x0 * width,x1 * width ,y0,y1);
	// printf("%d:%d %d:%d %d:%d \n%d:%d %d:%d %d:%d \n%d:%d %d:%d %d:%d \n\n",z + x0 * width + y0,world[z + x0 * width + y0],                z + x0 * width + thread_2D_pos.x,world[z + x0 * width + thread_2D_pos.x],                z + x0 * width + y1,world[z + x0 * width + y1],
	// 							   z + thread_2D_pos.y * width + y0,world[z + thread_2D_pos.y * width + y0],   z + thread_2D_pos.y * width + thread_2D_pos.x,world[z + thread_2D_pos.y * width + thread_2D_pos.x],   z + thread_2D_pos.y * width + y1,world[z + thread_2D_pos.y * width + y1],
	// 							                z + x1 * width + y0,world[z + x1 * width + y0],                z + x1 * width + thread_2D_pos.x,world[z + x1 * width + thread_2D_pos.x],                z + x1 * width + y1,world[z + x1 * width + y1]);

	// if(threadIdx.x == 0 || threadIdx.x == (blockDim.x - 1) || threadIdx.y == 0 || threadIdx.y == (blockDim.y - 1) )
	// {
	// 	checker =                   world[z + x0 * width + y0] +  world[z + x0 * width + thread_2D_pos.x] +    world[z + x0 * width + y1] +
	// 			      world[z + thread_2D_pos.y * width + y0] +                                       world[z + thread_2D_pos.y * width + y1] +
	// 		                        world[z + x1 * width + y0] +  world[z + x1 * width + thread_2D_pos.x] +    world[z + x1 * width + y1] ;		
	// }
	// else
	// {	
	// 	checker =           sWorld[Sx0 * blockDim.x + Sy0] +  sWorld[Sx0 * blockDim.x + threadIdx.x] +      sWorld[Sx0 * blockDim.x + Sy1] +
	// 	           sWorld[threadIdx.y * blockDim.x + Sy0] +                                             sWorld[threadIdx.y * blockDim.x + Sy1] +
	//                         sWorld[Sx1 * blockDim.x + Sy0] +  sWorld[Sx1 * blockDim.x + threadIdx.x] +      sWorld[Sx1 * blockDim.x + Sy1] ;
	
	// }





	checker =              (int) world[z + x0 * width + y0] + (int) world[z + x0 * width + thread_2D_pos.x] +   (int) world[z + x0 * width + y1] +
		      (int )world[z + thread_2D_pos.y * width + y0] +                                (int) world[z + thread_2D_pos.y * width + y1] +
	                       (int) world[z + x1 * width + y0] + (int) world[z + x1 * width + thread_2D_pos.x] +   (int) world[z + x1 * width + y1] ;
	// //printf("%d\n",checker);
	if(checker == 3 || ( checker == 2 && world[(swap)*height*width +  thread_1D_pos] == 0))
		world[(!swap)*height*width +  thread_1D_pos] = 1;
	else
		world[(!swap)*height*width +  thread_1D_pos] = 0;          

}

// __global__ void worldGenerator(int height,int width)
// {
// 	printf("height:%d width:%d\n",height,width);
// }

int main(int argc, char const *argv[])
{
	if(argc != 3)
	{
		printf(" ./run [dataSet] [interations]\n");
		return -1;
	}
	int i,j,k,swap;
	int height = 0, width = 0;
	int iteration = atoi(argv[2]);
	char *world = NULL;
	char *d_world = NULL;
	char remark[50] = "No shared mem";

    float timez;

    hipEvent_t start, stop;

// Read the pattern

	FILE *fp = NULL;
	if((fp = fopen(argv[1],"r")) == NULL)
	{
		printf("Pattern file not opened\n");
		return -1;
	}


	fscanf(fp,"%d",&height);
	fscanf(fp,"%d",&width);

// allocate memory	
	world = (char *) calloc(nWorld*width*height,sizeof(char));
	for (i = 0; i < height; ++i)
	{
		for (j = 0; j < width; ++j)
		{
			fscanf(fp,"%d ",&world[0 * width * height + i * width + j]);
		}
	}
	fclose(fp);
// Getting the Data
	// for (k = 0; k < nWorld; ++k)
	// {
	// 	for (i = 0; i < height; ++i)
	// 	{
	// 		for (j = 0; j < width; ++j)
	// 		{
	// 			printf("%d ",world[k * width * height + i * width + j]);
	// 		}
	// 		printf("\n");
	// 	}
	// 	printf("\n");
	// }

// GPU sections
    dim3 grid(height/N,width/N);            // defines a grid of 256 x 1 x 1 blocks
    dim3 block(N,N); 	


    gpuErrchk( hipEventCreate(&start) );
    gpuErrchk( hipEventCreate(&stop) );
    gpuErrchk( hipEventRecord(start, 0) );

	gpuErrchk(hipMalloc((void**)&d_world, nWorld * width * height * sizeof(char)));
	gpuErrchk(hipMemcpy(d_world, world, nWorld * width * height * sizeof(char), hipMemcpyHostToDevice));

	for (i = 0,swap = 0; i < iteration; ++i)
	{
        worldGenerator<<< grid, block>>>(d_world,height,width,swap);
		swap = !swap;
	}

	gpuErrchk(hipMemcpy(world, d_world, nWorld * width * height * sizeof(char), hipMemcpyDeviceToHost));
	

    gpuErrchk( hipEventRecord(stop, 0) );
    gpuErrchk( hipEventSynchronize(stop) );
    gpuErrchk( hipEventElapsedTime(&timez, start, stop) );  
	
	if((fp = fopen("GPUOutputChar","w")) == NULL)
	{
		printf("GPUOutput file not opened\n");
		return -1;
	}
	for (k = 0; k < nWorld; ++k)
	{
		for (i = 0; i < height; ++i)
		{
			for (j = 0; j < width; ++j)
			{
				fprintf(fp,"%d ",world[k * width * height + i * width + j]);
			}
			fprintf(fp,"\n");
		}		
		fprintf(fp,"\n");
	}	
    printf("Time to generate using GPU:  %3.1f ms \n", timez);	
 	if((fp = fopen("timing","a+")) == NULL)
	{
		printf("GPUOutput file not opened\n");
		return -1;
	}   
	fprintf(fp, "GPU char access with %s- > Height: %d Width: %d Iteration: %d Time: %f\n",remark,height,width,iteration,timez);
	return 0;
}

// algorithm to try out
/*

Since int access takes in 4 bytes use that information to process 3 cells
ie push data to device as char but read them as int



*/
	.text
	.file	"gpuGameOfLifeCharAccess.hip"
	.globl	_Z7displayPPcii                 # -- Begin function _Z7displayPPcii
	.type	_Z7displayPPcii,@function
_Z7displayPPcii:                        # @_Z7displayPPcii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%esi, %esi
	jle	.LBB0_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %r15d
	movl	%edx, %r12d
	xorl	%r13d, %r13d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%ebp, %ebp
.LBB0_4:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r14,%r13,8), %rax
	movsbl	(%rax,%rbp), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	cmpq	%r15, %r13
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge11
	movl	$3, %edi
	callq	sleep
	movl	$.L.str.2, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	system                          # TAILCALL
.Lfunc_end0:
	.size	_Z7displayPPcii, .Lfunc_end0-_Z7displayPPcii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__worldGeneratorPciii # -- Begin function _Z29__device_stub__worldGeneratorPciii
	.type	_Z29__device_stub__worldGeneratorPciii,@function
_Z29__device_stub__worldGeneratorPciii: # @_Z29__device_stub__worldGeneratorPciii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14worldGeneratorPciii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__worldGeneratorPciii, .Lfunc_end1-_Z29__device_stub__worldGeneratorPciii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB2_1
# %bb.2:
	movq	%rsi, %r14
	xorl	%ebx, %ebx
	movl	%ebx, 8(%rsp)
	movl	%ebx, 12(%rsp)
	movq	16(%rsi), %rdi
	callq	atoi
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	movq	%rbx, 24(%rsp)
	movabsq	$7310012246411734862, %rax      # imm = 0x6572616873206F4E
	movq	%rax, 48(%rsp)
	movl	$1701650532, 56(%rsp)           # imm = 0x656D2064
	movb	$109, 60(%rsp)
	xorps	%xmm0, %xmm0
	movups	%xmm0, 61(%rsp)
	movups	%xmm0, 77(%rsp)
	movq	%rbx, 90(%rsp)
	movq	8(%r14), %rdi
	movl	$.L.str.4, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB2_3
# %bb.5:
	movq	%rax, %r15
	leaq	8(%rsp), %r14
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	12(%rsp), %r12
	movl	$.L.str.6, %esi
	movq	%r15, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r12), %ebp
	movl	(%r14), %r13d
	movl	%ebp, %eax
	imull	%r13d, %eax
	addl	%eax, %eax
	movslq	%eax, %rdi
	movl	$1, %esi
	callq	calloc
	movq	%rax, %r14
	testl	%r13d, %r13d
	jle	.LBB2_12
# %bb.6:                                # %.preheader81.preheader
	xorl	%r12d, %r12d
.LBB2_7:                                # %.preheader81
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_9 Depth 2
	testl	%ebp, %ebp
	jle	.LBB2_11
# %bb.8:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_7 Depth=1
	xorl	%ebx, %ebx
.LBB2_9:                                # %.lr.ph
                                        #   Parent Loop BB2_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%r12d, %ebp
	movslq	%ebp, %rdx
	addq	%r14, %rdx
	addq	%rbx, %rdx
	movl	$.L.str, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	12(%rsp), %ebp
	incq	%rbx
	cmpl	%ebp, %ebx
	jl	.LBB2_9
# %bb.10:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB2_7 Depth=1
	movl	8(%rsp), %r13d
.LBB2_11:                               # %._crit_edge
                                        #   in Loop: Header=BB2_7 Depth=1
	incl	%r12d
	cmpl	%r13d, %r12d
	jl	.LBB2_7
.LBB2_12:                               # %._crit_edge84
	movq	%r15, %rdi
	callq	fclose
	movslq	8(%rsp), %r12
	movslq	12(%rsp), %r15
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.15:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKcib.exit62
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKcib.exit64
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rsi
	imulq	%rax, %rsi
	addq	%rsi, %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.21:                               # %_Z9gpuAssert10hipError_tPKcib.exit66
	movq	24(%rsp), %rdi
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	addq	%rdx, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_48
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit68.preheader
	cmpl	$0, 16(%rsp)                    # 4-byte Folded Reload
	jle	.LBB2_27
# %bb.23:                               # %.lr.ph87.preheader
	imulq	$715827883, %r12, %rax          # imm = 0x2AAAAAAB
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	imulq	$715827883, %r15, %r15          # imm = 0x2AAAAAAB
	movq	%r15, %rcx
	shrq	$63, %rcx
	sarq	$34, %r15
	addl	%ecx, %r15d
	shlq	$32, %r15
	orq	%rax, %r15
	xorl	%r12d, %r12d
	movabsq	$103079215128, %r13             # imm = 0x1800000018
	movl	16(%rsp), %ebp                  # 4-byte Reload
.LBB2_24:                               # %.lr.ph87
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.25:                               #   in Loop: Header=BB2_24 Depth=1
	movq	24(%rsp), %rdi
	movl	8(%rsp), %esi
	movl	12(%rsp), %edx
	movl	%r12d, %ecx
	callq	_Z29__device_stub__worldGeneratorPciii
.LBB2_26:                               # %_Z9gpuAssert10hipError_tPKcib.exit68
                                        #   in Loop: Header=BB2_24 Depth=1
	xorl	$1, %r12d
	decl	%ebp
	jne	.LBB2_24
.LBB2_27:                               # %_Z9gpuAssert10hipError_tPKcib.exit68._crit_edge
	movq	24(%rsp), %rsi
	movslq	12(%rsp), %rax
	movslq	8(%rsp), %rdx
	imulq	%rax, %rdx
	addq	%rdx, %rdx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_28
# %bb.29:                               # %_Z9gpuAssert10hipError_tPKcib.exit70
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.31:                               # %_Z9gpuAssert10hipError_tPKcib.exit72
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	testl	%eax, %eax
	jne	.LBB2_32
# %bb.33:                               # %_Z9gpuAssert10hipError_tPKcib.exit74
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	20(%rsp), %rdi
	callq	hipEventElapsedTime
	testl	%eax, %eax
	jne	.LBB2_34
# %bb.35:                               # %_Z9gpuAssert10hipError_tPKcib.exit76
	movl	$.L.str.8, %edi
	movl	$.L.str.9, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB2_45
# %bb.36:                               # %.preheader79.preheader
	movq	%rax, %r15
	movb	$1, %bpl
	xorl	%r12d, %r12d
.LBB2_37:                               # %.preheader79
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_39 Depth 2
                                        #       Child Loop BB2_41 Depth 3
	cmpl	$0, 8(%rsp)
	jle	.LBB2_43
# %bb.38:                               # %.preheader.preheader
                                        #   in Loop: Header=BB2_37 Depth=1
	xorl	%r13d, %r13d
.LBB2_39:                               # %.preheader
                                        #   Parent Loop BB2_37 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_41 Depth 3
	movl	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB2_42
# %bb.40:                               # %.lr.ph89.preheader
                                        #   in Loop: Header=BB2_39 Depth=2
	xorl	%ebx, %ebx
.LBB2_41:                               # %.lr.ph89
                                        #   Parent Loop BB2_37 Depth=1
                                        #     Parent Loop BB2_39 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	8(%rsp), %ecx
	imull	%r12d, %ecx
	addl	%r13d, %ecx
	imull	%eax, %ecx
	addl	%ebx, %ecx
	movslq	%ecx, %rax
	movsbl	(%r14,%rax), %edx
	movl	$.L.str, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	fprintf
	incl	%ebx
	movl	12(%rsp), %eax
	cmpl	%eax, %ebx
	jl	.LBB2_41
.LBB2_42:                               # %._crit_edge90
                                        #   in Loop: Header=BB2_39 Depth=2
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	incl	%r13d
	cmpl	8(%rsp), %r13d
	jl	.LBB2_39
.LBB2_43:                               # %._crit_edge92
                                        #   in Loop: Header=BB2_37 Depth=1
	movl	$10, %edi
	movq	%r15, %rsi
	callq	fputc@PLT
	movl	$1, %r12d
	testb	$1, %bpl
	movl	$0, %ebp
	jne	.LBB2_37
# %bb.44:
	cvtss2sd	20(%rsp), %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.12, %edi
	movl	$.L.str.13, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB2_45
# %bb.46:
	movl	8(%rsp), %ecx
	movl	12(%rsp), %r8d
	xorps	%xmm0, %xmm0
	cvtss2sd	20(%rsp), %xmm0
	leaq	48(%rsp), %rdx
	movl	$.L.str.14, %esi
	movq	%rax, %rdi
	movl	16(%rsp), %r9d                  # 4-byte Reload
	movb	$1, %al
	callq	fprintf
	xorl	%eax, %eax
	jmp	.LBB2_47
.LBB2_1:
	movl	$.Lstr.3, %edi
	jmp	.LBB2_4
.LBB2_45:
	movl	$.Lstr.1, %edi
	jmp	.LBB2_4
.LBB2_3:
	movl	$.Lstr.2, %edi
.LBB2_4:
	callq	puts@PLT
	movl	$-1, %eax
.LBB2_47:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_13:
	.cfi_def_cfa_offset 160
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$161, %r8d
	jmp	.LBB2_14
.LBB2_16:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$162, %r8d
	jmp	.LBB2_14
.LBB2_18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$163, %r8d
	jmp	.LBB2_14
.LBB2_20:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$165, %r8d
	jmp	.LBB2_14
.LBB2_48:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$166, %r8d
	jmp	.LBB2_14
.LBB2_28:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$174, %r8d
	jmp	.LBB2_14
.LBB2_30:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$177, %r8d
	jmp	.LBB2_14
.LBB2_32:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$178, %r8d
	jmp	.LBB2_14
.LBB2_34:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.7, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$179, %r8d
.LBB2_14:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14worldGeneratorPciii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"clear"
	.size	.L.str.2, 6

	.type	_Z14worldGeneratorPciii,@object # @_Z14worldGeneratorPciii
	.section	.rodata,"a",@progbits
	.globl	_Z14worldGeneratorPciii
	.p2align	3, 0x0
_Z14worldGeneratorPciii:
	.quad	_Z29__device_stub__worldGeneratorPciii
	.size	_Z14worldGeneratorPciii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"r"
	.size	.L.str.4, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d"
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Pauly91/GPUgameOfLife/master/gpuGameOfLifeCharAccess.hip"
	.size	.L.str.7, 119

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPUOutputChar"
	.size	.L.str.8, 14

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"w"
	.size	.L.str.9, 2

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Time to generate using GPU:  %3.1f ms \n"
	.size	.L.str.11, 40

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"timing"
	.size	.L.str.12, 7

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"a+"
	.size	.L.str.13, 3

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"GPU char access with %s- > Height: %d Width: %d Iteration: %d Time: %f\n"
	.size	.L.str.14, 72

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.15, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14worldGeneratorPciii"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"GPUOutput file not opened"
	.size	.Lstr.1, 26

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Pattern file not opened"
	.size	.Lstr.2, 24

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	" ./run [dataSet] [interations]"
	.size	.Lstr.3, 31

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__worldGeneratorPciii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14worldGeneratorPciii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14worldGeneratorPciii ; -- Begin function _Z14worldGeneratorPciii
	.globl	_Z14worldGeneratorPciii
	.p2align	8
	.type	_Z14worldGeneratorPciii,@function
_Z14worldGeneratorPciii:                ; @_Z14worldGeneratorPciii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s4, 31
	s_ashr_i32 s8, s5, 31
	s_add_i32 s7, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, s7, s3
	s_add_i32 s7, s5, s8
	v_cvt_f32_u32_e32 v1, s3
	s_xor_b32 s7, s7, s8
	s_lshr_b32 s8, s2, 16
	v_cvt_f32_u32_e32 v5, s7
	s_and_b32 s2, s2, 0xffff
	v_rcp_iflag_f32_e32 v6, v1
	v_mad_u64_u32 v[3:4], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v5
	s_sub_i32 s8, 0, s7
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v2, 0x4f7ffffe, v6 :: v_dual_add_nc_u32 v1, s4, v3
	s_sub_i32 s2, 0, s3
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, -1, v1
	v_cvt_u32_f32_e32 v2, v2
	v_add_nc_u32_e32 v1, 1, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_u32_f32_e32 v4, v4
	v_ashrrev_i32_e32 v9, 31, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v8, s2, v2
	v_ashrrev_i32_e32 v11, 31, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_lo_u32 v10, s8, v4
	s_mul_i32 s8, s6, s4
	v_add_nc_u32_e32 v6, v6, v9
	s_mul_i32 s2, s8, s5
	v_add_nc_u32_e32 v1, v1, v11
	v_mul_hi_u32 v8, v2, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v6, v6, v9
	v_mul_hi_u32 v10, v4, v10
	v_xor_b32_e32 v1, v1, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, v2, v8
	v_add_nc_u32_e32 v4, v4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v8, v6, v2
	v_mul_hi_u32 v2, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v8, v8, s3
	v_mul_lo_u32 v2, v2, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v6, v8
	v_sub_nc_u32_e32 v1, v1, v2
	v_add_nc_u32_e32 v5, s5, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s3, v6
	v_add_nc_u32_e32 v7, -1, v5
	v_add_nc_u32_e32 v5, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v7
	v_ashrrev_i32_e32 v13, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v7, v12
	v_add_nc_u32_e32 v5, v5, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v7, v7, v12
	v_xor_b32_e32 v5, v5, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v7, v4
	v_mul_hi_u32 v4, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, s7
	v_mul_lo_u32 v4, v4, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v2, v7, v10
	v_sub_nc_u32_e32 v4, v5, v4
	v_subrev_nc_u32_e32 v5, s3, v6
	v_subrev_nc_u32_e32 v7, s3, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v8, s7, v2
	v_subrev_nc_u32_e32 v10, s7, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e32 v5, v6, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	v_cndmask_b32_e32 v6, v1, v7, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	v_mul_lo_u32 v1, v3, s5
	v_subrev_nc_u32_e32 v3, s3, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s3, v6
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v4
	v_subrev_nc_u32_e32 v8, s7, v2
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v10, s7, v4
	v_cndmask_b32_e32 v3, v5, v3, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v2
	v_xor_b32_e32 v3, v3, v9
	v_cndmask_b32_e32 v2, v2, v8, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v4
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v9
	v_xor_b32_e32 v2, v2, v12
	v_cndmask_b32_e32 v4, v4, v10, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v6
	s_mov_b32 s3, 0
	v_add_nc_u32_e32 v3, s8, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v4, v4, v13
	v_dual_cndmask_b32 v5, v6, v7 :: v_dual_add_nc_u32 v6, s2, v1
	v_sub_nc_u32_e32 v7, v2, v12
	v_sub_nc_u32_e32 v8, v4, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v5, v5, v11
	v_add_nc_u32_e32 v4, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_nc_u32_e32 v2, v5, v11
	v_add_nc_u32_e32 v5, v6, v8
	v_mul_lo_u32 v6, v3, s5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v4
	v_add_nc_u32_e32 v2, s8, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v5
	s_mov_b32 s8, 1
	v_mul_lo_u32 v10, v2, s5
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v9, vcc_lo
	v_add_nc_u32_e32 v9, v6, v7
	v_add_nc_u32_e32 v11, v6, v0
	v_add_nc_u32_e32 v13, v10, v7
	v_add_nc_u32_e32 v12, v8, v6
	v_add_nc_u32_e32 v14, v10, v0
	v_ashrrev_i32_e32 v7, 31, v9
	v_add_nc_u32_e32 v15, v10, v8
	v_ashrrev_i32_e32 v10, 31, v11
	v_add_co_u32 v6, vcc_lo, s0, v9
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_ashrrev_i32_e32 v16, 31, v12
	v_add_co_u32 v8, vcc_lo, s0, v11
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v10, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v12
	v_ashrrev_i32_e32 v17, 31, v13
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v16, vcc_lo
	v_ashrrev_i32_e32 v18, 31, v14
	v_add_co_u32 v12, vcc_lo, s0, v13
	s_clause 0x3
	global_load_i8 v16, v[6:7], off
	global_load_i8 v8, v[8:9], off
	global_load_i8 v9, v[10:11], off
	global_load_i8 v10, v[2:3], off
	v_add_co_ci_u32_e32 v13, vcc_lo, s1, v17, vcc_lo
	v_ashrrev_i32_e32 v7, 31, v15
	v_add_co_u32 v2, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v18, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v15
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_clause 0x3
	global_load_i8 v4, v[4:5], off
	global_load_i8 v5, v[12:13], off
	global_load_i8 v2, v[2:3], off
	global_load_i8 v3, v[6:7], off
	s_waitcnt vmcnt(6)
	v_add_nc_u32_e32 v6, v8, v16
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v6, v6, v9, v10
	s_waitcnt vmcnt(2)
	v_add3_u32 v4, v6, v4, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v4, v2, v3
	v_cmpx_lt_i32_e32 2, v2
	s_xor_b32 s7, exec_lo, s7
; %bb.1:                                ; %LeafBlock248
	v_cmp_ne_u32_e32 vcc_lo, 3, v2
                                        ; implicit-def: $vgpr2
	s_and_b32 s3, vcc_lo, exec_lo
; %bb.2:                                ; %Flow
	s_or_saveexec_b32 s7, s7
	v_dual_mov_b32 v1, s8 :: v_dual_add_nc_u32 v0, v1, v0
	s_xor_b32 exec_lo, exec_lo, s7
	s_cbranch_execz .LBB0_6
; %bb.3:                                ; %LeafBlock
	s_mov_b32 s9, -1
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $sgpr10
	v_cmpx_eq_u32_e32 2, v2
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_add_nc_u32_e32 v1, s2, v0
	s_mov_b32 s10, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_u8 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 0, v1
	s_or_not1_b32 s9, vcc_lo, exec_lo
.LBB0_5:                                ; %Flow251
	s_or_b32 exec_lo, exec_lo, s8
	v_mov_b32_e32 v1, s10
	s_and_not1_b32 s2, s3, exec_lo
	s_and_b32 s3, s9, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s3, s2, s3
.LBB0_6:                                ; %Flow250
	s_or_b32 exec_lo, exec_lo, s7
	s_and_saveexec_b32 s2, s3
; %bb.7:
	v_mov_b32_e32 v1, 0
; %bb.8:
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_eq_u32 s6, 0
	s_cselect_b32 s2, s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s2, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v0, 31, v2
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v0, vcc_lo
	global_store_b8 v[2:3], v1, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14worldGeneratorPciii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14worldGeneratorPciii, .Lfunc_end0-_Z14worldGeneratorPciii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1132
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14worldGeneratorPciii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14worldGeneratorPciii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
