#include <stdlib.h>
#include <stdio.h>
#include <time.h>

/* Every thread gets exactly one value in the unsorted array. */
#define THREADS 128 // 2^7
#define BLOCKS 1024 // 2^10
#define NUM_VALS THREADS*BLOCKS
#define MAX_VALUE 8196

void print_elapsed(clock_t start, clock_t stop)
{
  double elapsed = ((double) (stop - start)) / CLOCKS_PER_SEC;
  printf("Elapsed time: %.3fs\n", elapsed);
}

__global__ void count(int *A, int *B, int n) {

	int b_id 		= blockIdx.x,
			b_num 	= gridDim.x,
			b_size,
			b_offset,
			t_id 	= threadIdx.x,
			t_num 	= blockDim.x,
			t_size,
			t_offset,
			offset;

	// initialize a shared memory array to store the count for each block.
	__shared__ int count[MAX_VALUE];

	// set intial values to zeros. Each thread sets its own share to zero.
	t_size = (t_num > MAX_VALUE ? 1 : MAX_VALUE / t_num);
	offset = t_id * t_size;
	for (int i = offset; i < offset + t_size && i < MAX_VALUE; ++i)
		count[i] = 0;

	// wait until all threads have completed the initialization process.
	__syncthreads();

	// accumulate the counts of each value. Each thread counts a certain portain
	// of the unsorted array.
	b_size = (b_num > n ? 1 : n / b_num);
	b_offset = b_id * b_size;

	t_size = (t_num > b_size ? 1 : b_size / t_num);

	offset = b_offset + t_id * t_size;
	for (int i = offset; i < offset + t_size && i < b_offset + b_size && i < n; ++i)
		atomicAdd(&count[A[i]], 1);

	// wait until all threads have completed the couting phase.
	__syncthreads();

	// copy the block count into global memory. Each thread copies its portioin to 
	// the global memory.
	t_size = (t_num > MAX_VALUE ? 1 : MAX_VALUE / t_num);
	t_offset = t_id * t_size;
	offset = b_id * MAX_VALUE + t_offset;

	if (offset + t_size <= (b_id + 1) * MAX_VALUE)
		memcpy(&B[offset], &count[t_offset], sizeof(int) * t_size);

}

__global__ void merge(int *B) {

	int b_id	= blockIdx.x,
		b_num	= gridDim.x,
		b_size,
		b_offset,
		t_id	= threadIdx.x,
		t_num	= blockDim.x,
		t_size,
		offset;

	// loop through and merge until all arrays are merged.
	for (int i = b_num, j = 2; i != 1; i /= 2, j *= 2) {

		// each block will operate on b_size values which equal, the number of 
		// count arrays * size of count arrays / number of blocks / 2. The final 2
		// represents the merge process.
		b_size = i * MAX_VALUE / b_num / 2;
		b_offset = (b_id / j) * (j * MAX_VALUE) + b_size * (b_id % j);

		t_size = (t_num > b_size ? 1 : b_size / t_num);

		// calculate the offset that each thread will start at and sum counts.
		offset = b_offset + t_id * t_size;
		for (int k = offset, l = offset + (MAX_VALUE * (j / 2)); 
			k < offset + t_size && k < b_offset + b_size; ++k, ++l)
			B[k] += B[l];

		// wait untill all arrays are merged for every step.
		__syncthreads();

	}

}

void bitonic_sort(int *values)
{
    int *dev_values, *dev_ans;
    size_t size = NUM_VALS * sizeof(int);

    size_t size1 = MAX_VALUE * BLOCKS * sizeof(int);

    cudaMalloc((void**) &dev_values, size);
    cudaMalloc((void**) &dev_ans, size1);
    cudaMemcpy(dev_values, values, size, cudaMemcpyHostToDevice);

    dim3 blocks(BLOCKS,1);    
    dim3 threads(THREADS,1);  

    count<<<blocks, threads>>>(dev_values, dev_ans, NUM_VALS);
    merge<<<blocks, threads>>>(dev_ans);

    int ans[NUM_VALS];
    cudaMemcpy(ans, dev_ans, size, cudaMemcpyDeviceToHost);
    cudaFree(dev_values);

    // Construct sorted array
    for (int i = 0, j = 0; i < MAX_VALUE; ++i) {
		for (int k = 0; k < ans[i]; ++k, ++j) {
				values[j] = i;
		}
	}
}

int main(int argc, char const *argv[])
{
  clock_t start, stop;

  int *values = (int*)malloc(NUM_VALS * sizeof(int));

  FILE *f = fopen("reverse_dataset.txt", "r");

  for(int i=0;i< NUM_VALS; i++) {
    fscanf(f, "%d\n", &values[i]);
  }
      cudaEvent_t estart, estop;
    
    

  start  = clock();
  cudaEventCreate( &estart );
  cudaEventRecord( estart, 0 );
  bitonic_sort(values);
  cudaEventCreate( &estop );
  cudaEventRecord( estop, 0 ) ;
  cudaEventSynchronize( estop );
  stop = clock();
    float elapsedTime;
    cudaEventElapsedTime( &elapsedTime,
        estart, estop ) ;

  printf("Elapsed time: %f\n", elapsedTime);
  //print_elapsed(start, stop);
  return 0;
}

	.file	"tmpxft_0028c486_00000000-6_count_sort.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Elapsed time: %.3fs\n"
	.text
	.globl	_Z13print_elapsedll
	.type	_Z13print_elapsedll, @function
_Z13print_elapsedll:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	%rdi, %rsi
	movb	$1, %al
	movl	$2, %edi
	cvtsi2sdq	%rsi, %xmm0
	leaq	.LC1(%rip), %rsi
	divsd	.LC0(%rip), %xmm0
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z13print_elapsedll, .-_Z13print_elapsedll
	.globl	_Z27__device_stub__Z5countPiS_iPiS_i
	.type	_Z27__device_stub__Z5countPiS_iPiS_i, @function
_Z27__device_stub__Z5countPiS_iPiS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5countPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L3:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z27__device_stub__Z5countPiS_iPiS_i, .-_Z27__device_stub__Z5countPiS_iPiS_i
	.globl	_Z5countPiS_i
	.type	_Z5countPiS_i, @function
_Z5countPiS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z5countPiS_iPiS_i
	.cfi_endproc
.LFE2055:
	.size	_Z5countPiS_i, .-_Z5countPiS_i
	.globl	_Z24__device_stub__Z5mergePiPi
	.type	_Z24__device_stub__Z5mergePiPi, @function
_Z24__device_stub__Z5mergePiPi:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z5mergePi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L9:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z24__device_stub__Z5mergePiPi, .-_Z24__device_stub__Z5mergePiPi
	.globl	_Z5mergePi
	.type	_Z5mergePi, @function
_Z5mergePi:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z5mergePiPi
	.cfi_endproc
.LFE2057:
	.size	_Z5mergePi, .-_Z5mergePi
	.globl	_Z12bitonic_sortPi
	.type	_Z12bitonic_sortPi, @function
_Z12bitonic_sortPi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	-524288(%rsp), %r11
	.cfi_def_cfa 11, 524312
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$56, %rsp
	.cfi_def_cfa_offset 524368
	movl	$524288, %esi
	movq	%fs:40, %rax
	movq	%rax, 524328(%rsp)
	xorl	%eax, %eax
	movq	%rdi, %rbx
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$33570816, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$524288, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$33554433, %edx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	salq	$7, %rdx
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$131072, %edx
	call	_Z27__device_stub__Z5countPiS_iPiS_i
.L15:
	movl	36(%rsp), %ecx
	movq	28(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	8(%rsp), %rdi
	call	_Z24__device_stub__Z5mergePiPi
.L16:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rbp
	movl	$524288, %edx
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%edx, %edx
	xorl	%esi, %esi
.L17:
	movl	0(%rbp,%rdx,4), %eax
	movl	%edx, %edi
	movslq	%esi, %rcx
.L20:
	movl	%ecx, %r8d
	subl	%esi, %r8d
	cmpl	%r8d, %eax
	jle	.L23
	movl	%edi, (%rbx,%rcx,4)
	incq	%rcx
	jmp	.L20
.L23:
	xorl	%ecx, %ecx
	testl	%eax, %eax
	cmovs	%ecx, %eax
	incq	%rdx
	addl	%eax, %esi
	cmpq	$8196, %rdx
	jne	.L17
	movq	524328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$524344, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12bitonic_sortPi, .-_Z12bitonic_sortPi
	.section	.rodata.str1.1
.LC2:
	.string	"r"
.LC3:
	.string	"reverse_dataset.txt"
.LC4:
	.string	"%d\n"
.LC5:
	.string	"Elapsed time: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$524288, %edi
	leaq	.LC4(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	leaq	.LC2(%rip), %rsi
	leaq	.LC3(%rip), %rdi
	movq	%rax, %rbx
	call	fopen@PLT
	movq	%rbx, %rbp
	leaq	524288(%rbx), %r13
	movq	%rax, %r12
.L25:
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	addq	$4, %rbp
	cmpq	%r13, %rbp
	jne	.L25
	call	clock@PLT
	leaq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%rbx, %rdi
	call	_Z12bitonic_sortPi
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	16(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	clock@PLT
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z5mergePi"
.LC7:
	.string	"_Z5countPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z5mergePi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5countPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>

/* Every thread gets exactly one value in the unsorted array. */
#define THREADS 128 // 2^7
#define BLOCKS 1024 // 2^10
#define NUM_VALS THREADS*BLOCKS
#define MAX_VALUE 8196

void print_elapsed(clock_t start, clock_t stop)
{
  double elapsed = ((double) (stop - start)) / CLOCKS_PER_SEC;
  printf("Elapsed time: %.3fs\n", elapsed);
}

__global__ void count(int *A, int *B, int n) {

	int b_id 		= blockIdx.x,
			b_num 	= gridDim.x,
			b_size,
			b_offset,
			t_id 	= threadIdx.x,
			t_num 	= blockDim.x,
			t_size,
			t_offset,
			offset;

	// initialize a shared memory array to store the count for each block.
	__shared__ int count[MAX_VALUE];

	// set intial values to zeros. Each thread sets its own share to zero.
	t_size = (t_num > MAX_VALUE ? 1 : MAX_VALUE / t_num);
	offset = t_id * t_size;
	for (int i = offset; i < offset + t_size && i < MAX_VALUE; ++i)
		count[i] = 0;

	// wait until all threads have completed the initialization process.
	__syncthreads();

	// accumulate the counts of each value. Each thread counts a certain portain
	// of the unsorted array.
	b_size = (b_num > n ? 1 : n / b_num);
	b_offset = b_id * b_size;

	t_size = (t_num > b_size ? 1 : b_size / t_num);

	offset = b_offset + t_id * t_size;
	for (int i = offset; i < offset + t_size && i < b_offset + b_size && i < n; ++i)
		atomicAdd(&count[A[i]], 1);

	// wait until all threads have completed the couting phase.
	__syncthreads();

	// copy the block count into global memory. Each thread copies its portioin to 
	// the global memory.
	t_size = (t_num > MAX_VALUE ? 1 : MAX_VALUE / t_num);
	t_offset = t_id * t_size;
	offset = b_id * MAX_VALUE + t_offset;

	if (offset + t_size <= (b_id + 1) * MAX_VALUE)
		memcpy(&B[offset], &count[t_offset], sizeof(int) * t_size);

}

__global__ void merge(int *B) {

	int b_id	= blockIdx.x,
		b_num	= gridDim.x,
		b_size,
		b_offset,
		t_id	= threadIdx.x,
		t_num	= blockDim.x,
		t_size,
		offset;

	// loop through and merge until all arrays are merged.
	for (int i = b_num, j = 2; i != 1; i /= 2, j *= 2) {

		// each block will operate on b_size values which equal, the number of 
		// count arrays * size of count arrays / number of blocks / 2. The final 2
		// represents the merge process.
		b_size = i * MAX_VALUE / b_num / 2;
		b_offset = (b_id / j) * (j * MAX_VALUE) + b_size * (b_id % j);

		t_size = (t_num > b_size ? 1 : b_size / t_num);

		// calculate the offset that each thread will start at and sum counts.
		offset = b_offset + t_id * t_size;
		for (int k = offset, l = offset + (MAX_VALUE * (j / 2)); 
			k < offset + t_size && k < b_offset + b_size; ++k, ++l)
			B[k] += B[l];

		// wait untill all arrays are merged for every step.
		__syncthreads();

	}

}

void bitonic_sort(int *values)
{
    int *dev_values, *dev_ans;
    size_t size = NUM_VALS * sizeof(int);

    size_t size1 = MAX_VALUE * BLOCKS * sizeof(int);

    hipMalloc((void**) &dev_values, size);
    hipMalloc((void**) &dev_ans, size1);
    hipMemcpy(dev_values, values, size, hipMemcpyHostToDevice);

    dim3 blocks(BLOCKS,1);    
    dim3 threads(THREADS,1);  

    count<<<blocks, threads>>>(dev_values, dev_ans, NUM_VALS);
    merge<<<blocks, threads>>>(dev_ans);

    int ans[NUM_VALS];
    hipMemcpy(ans, dev_ans, size, hipMemcpyDeviceToHost);
    hipFree(dev_values);

    // Construct sorted array
    for (int i = 0, j = 0; i < MAX_VALUE; ++i) {
		for (int k = 0; k < ans[i]; ++k, ++j) {
				values[j] = i;
		}
	}
}

int main(int argc, char const *argv[])
{
  clock_t start, stop;

  int *values = (int*)malloc(NUM_VALS * sizeof(int));

  FILE *f = fopen("reverse_dataset.txt", "r");

  for(int i=0;i< NUM_VALS; i++) {
    fscanf(f, "%d\n", &values[i]);
  }
      hipEvent_t estart, estop;
    
    

  start  = clock();
  hipEventCreate( &estart );
  hipEventRecord( estart, 0 );
  bitonic_sort(values);
  hipEventCreate( &estop );
  hipEventRecord( estop, 0 ) ;
  hipEventSynchronize( estop );
  stop = clock();
    float elapsedTime;
    hipEventElapsedTime( &elapsedTime,
        estart, estop ) ;

  printf("Elapsed time: %f\n", elapsedTime);
  //print_elapsed(start, stop);
  return 0;
}

	.text
	.file	"count_sort.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13print_elapsedll
.LCPI0_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z13print_elapsedll
	.type	_Z13print_elapsedll,@function
_Z13print_elapsedll:                    # @_Z13print_elapsedll
	.cfi_startproc
# %bb.0:
	subq	%rdi, %rsi
	cvtsi2sd	%rsi, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	jmp	printf                          # TAILCALL
.Lfunc_end0:
	.size	_Z13print_elapsedll, .Lfunc_end0-_Z13print_elapsedll
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__countPiS_i   # -- Begin function _Z20__device_stub__countPiS_i
	.type	_Z20__device_stub__countPiS_i,@function
_Z20__device_stub__countPiS_i:          # @_Z20__device_stub__countPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5countPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__countPiS_i, .Lfunc_end1-_Z20__device_stub__countPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__mergePi      # -- Begin function _Z20__device_stub__mergePi
	.type	_Z20__device_stub__mergePi,@function
_Z20__device_stub__mergePi:             # @_Z20__device_stub__mergePi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5mergePi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20__device_stub__mergePi, .Lfunc_end2-_Z20__device_stub__mergePi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12bitonic_sortPi              # -- Begin function _Z12bitonic_sortPi
	.type	_Z12bitonic_sortPi,@function
_Z12bitonic_sortPi:                     # @_Z12bitonic_sortPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$524312, %rsp                   # imm = 0x80018
	.cfi_def_cfa_offset 524352
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movabsq	$4294967424, %r14               # imm = 0x100000080
	leaq	8(%rsp), %r15
	movl	$524288, %esi                   # imm = 0x80000
	movq	%r15, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$33570816, %esi                 # imm = 0x2004000
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	896(%r14), %r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$131072, %edx                   # imm = 0x20000
	callq	_Z20__device_stub__countPiS_i
.LBB3_2:
	xorl	%r12d, %r12d
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	(%rsp), %rdi
	callq	_Z20__device_stub__mergePi
.LBB3_4:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$524288, %edx                   # imm = 0x80000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
.LBB3_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_7 Depth 2
	movl	16(%rsp,%rax,4), %ecx
	testl	%ecx, %ecx
	jle	.LBB3_9
# %bb.6:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_5 Depth=1
	movslq	%r12d, %rdx
	leaq	(%rbx,%rdx,4), %rsi
	xorl	%edx, %edx
.LBB3_7:                                # %.lr.ph
                                        #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, (%rsi,%rdx,4)
	incq	%rdx
	cmpl	%edx, %ecx
	jne	.LBB3_7
# %bb.8:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB3_5 Depth=1
	addl	%edx, %r12d
.LBB3_9:                                # %._crit_edge
                                        #   in Loop: Header=BB3_5 Depth=1
	incq	%rax
	cmpq	$8196, %rax                     # imm = 0x2004
	jne	.LBB3_5
# %bb.10:
	addq	$524312, %rsp                   # imm = 0x80018
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z12bitonic_sortPi, .Lfunc_end3-_Z12bitonic_sortPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$524288, %edi                   # imm = 0x80000
	callq	malloc
	movq	%rax, %rbx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	leaq	(%rbx,%r15), %rdx
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	addq	$4, %r15
	cmpq	$524288, %r15                   # imm = 0x80000
	jne	.LBB4_1
# %bb.2:
	callq	clock
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbx, %rdi
	callq	_Z12bitonic_sortPi
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rbx), %rdi
	callq	hipEventSynchronize
	callq	clock
	movq	(%r14), %rsi
	movq	(%rbx), %rdx
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5countPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5mergePi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Elapsed time: %.3fs\n"
	.size	.L.str, 21

	.type	_Z5countPiS_i,@object           # @_Z5countPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z5countPiS_i
	.p2align	3, 0x0
_Z5countPiS_i:
	.quad	_Z20__device_stub__countPiS_i
	.size	_Z5countPiS_i, 8

	.type	_Z5mergePi,@object              # @_Z5mergePi
	.globl	_Z5mergePi
	.p2align	3, 0x0
_Z5mergePi:
	.quad	_Z20__device_stub__mergePi
	.size	_Z5mergePi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"reverse_dataset.txt"
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d\n"
	.size	.L.str.3, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Elapsed time: %f\n"
	.size	.L.str.4, 18

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5countPiS_i"
	.size	.L__unnamed_1, 14

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5mergePi"
	.size	.L__unnamed_2, 11

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__countPiS_i
	.addrsig_sym _Z20__device_stub__mergePi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5countPiS_i
	.addrsig_sym _Z5mergePi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5countPiS_i           ; -- Begin function _Z5countPiS_i
	.globl	_Z5countPiS_i
	.p2align	8
	.type	_Z5countPiS_i,@function
_Z5countPiS_i:                          ; @_Z5countPiS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_mov_b32_e32 v1, 1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v3, s2
	s_cmpk_lt_u32 s2, 0x2005
	s_cselect_b32 s4, -1, 0
	s_cmpk_gt_u32 s2, 0x2004
	v_rcp_iflag_f32_e32 v4, v3
	s_cbranch_scc1 .LBB0_2
; %bb.1:
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x46001000, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v1, v1
	v_fma_f32 v2, -v1, v3, 0x46001000
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 vcc_lo, |v2|, v3
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v1, 0xffff, v1
.LBB0_2:
	s_load_b32 s3, s[0:1], 0x18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v2, v1, v0, v1
	v_mul_u32_u24_e32 v1, v1, v0
	s_mov_b32 s5, exec_lo
	v_min_u32_e32 v2, 0x2004, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v1, v2
	s_cbranch_execz .LBB0_5
; %bb.3:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v5, 2, v1
	s_mov_b32 s6, 0
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v1, 1, v1
	ds_store_b32 v5, v6
	v_add_nc_u32_e32 v5, 4, v5
	v_cmp_ge_u32_e32 vcc_lo, v1, v2
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_4
.LBB0_5:                                ; %Flow85
	s_or_b32 exec_lo, exec_lo, s5
	s_load_b32 s5, s[0:1], 0x10
	s_mov_b32 s6, 1
	s_mov_b32 s7, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cmp_le_i32 s3, s5
	s_cbranch_scc0 .LBB0_7
; %bb.6:
	s_ashr_i32 s7, s3, 31
	s_ashr_i32 s10, s5, 31
	s_add_i32 s3, s3, s7
	s_add_i32 s11, s5, s10
	s_xor_b32 s3, s3, s7
	s_xor_b32 s11, s11, s10
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s9, 0, s3
	s_xor_b32 s7, s10, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s8, v1
	s_mul_i32 s9, s9, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s9, s8, s9
	s_add_i32 s8, s8, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s8, s11, s8
	s_mul_i32 s9, s8, s3
	s_add_i32 s10, s8, 1
	s_sub_i32 s9, s11, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s11, s9, s3
	s_cmp_ge_u32 s9, s3
	s_cselect_b32 s8, s10, s8
	s_cselect_b32 s9, s11, s9
	s_add_i32 s10, s8, 1
	s_cmp_ge_u32 s9, s3
	s_cselect_b32 s3, s10, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s7
	s_sub_i32 s7, s3, s7
.LBB0_7:
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s7, s2
	s_cbranch_scc1 .LBB0_9
; %bb.8:
	v_mul_f32_e32 v1, 0x4f7ffffe, v4
	s_sub_i32 s6, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s6, s3
	s_mul_hi_u32 s6, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s6
	s_mul_hi_u32 s3, s7, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s3, s2
	s_add_i32 s8, s3, 1
	s_sub_i32 s6, s7, s6
	s_sub_i32 s9, s6, s2
	s_cmp_ge_u32 s6, s2
	s_cselect_b32 s3, s8, s3
	s_cselect_b32 s6, s9, s6
	s_add_i32 s8, s3, 1
	s_cmp_ge_u32 s6, s2
	s_cselect_b32 s6, s8, s3
.LBB0_9:
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mul_lo_u32 v1, s6, v0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s8, s7, s15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v5, s8, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s6, v5
	s_add_i32 s6, s8, s7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_min3_i32 v6, s5, v2, s6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v5, v6
	s_cbranch_execz .LBB0_12
; %bb.10:                               ; %.lr.ph65.preheader
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s6, s8, 31
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_mov_b32_e32 v7, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s6, v2, vcc_lo
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s1, 0
.LBB0_11:                               ; %.lr.ph65
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[1:2], off
	v_add_nc_u32_e32 v5, 1, v5
	v_add_co_u32 v1, s0, v1, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v2, s0, 0, v2, s0
	v_cmp_ge_i32_e32 vcc_lo, v5, v6
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v8, 2, v8
	ds_add_u32 v8, v7
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_11
.LBB0_12:                               ; %Flow80
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s4
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s0, 1
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccz .LBB0_14
; %bb.13:
	v_mul_f32_e32 v1, 0x46001000, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v1, v1
	v_fma_f32 v2, -v1, v3, 0x46001000
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_f32_e64 s0, |v2|, v3
	v_readfirstlane_b32 s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0
	s_addc_u32 s0, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, 0xffff
.LBB0_14:
	s_mul_i32 s1, s15, 0x2004
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u32_u24 v1, s0, v0, s1
	s_addk_i32 s1, 0x2004
	v_add_nc_u32_e32 v2, s0, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, s1, v2
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_17
; %bb.15:
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_u32_u24_e32 v3, s0, v0
	s_lshl_b32 s0, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_sub_u32 s0, 0, s0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v2, 2, v3
	s_subb_u32 s1, 0, 0
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
.LBB0_16:                               ; %.lr.ph.i.i
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_u8 v3, v2 offset:1
	ds_load_u8 v4, v2 offset:3
	ds_load_u8 v5, v2
	ds_load_u8 v6, v2 offset:2
	v_add_nc_u32_e32 v2, 4, v2
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[0:1], 0
	s_waitcnt lgkmcnt(3)
	v_lshlrev_b16 v3, 8, v3
	s_waitcnt lgkmcnt(2)
	v_lshlrev_b16 v4, 8, v4
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or_b32_e32 v3, v5, v3
	s_waitcnt lgkmcnt(0)
	v_or_b32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, 0xffff, v3
	v_lshlrev_b32_e32 v4, 16, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v3, v3, v4
	global_store_b32 v[0:1], v3, off
	v_add_co_u32 v0, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cbranch_scc1 .LBB0_16
.LBB0_17:                               ; %_ZL6memcpyPvPKvm.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5countPiS_i
		.amdhsa_group_segment_fixed_size 32784
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5countPiS_i, .Lfunc_end0-_Z5countPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1076
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32784 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5mergePi              ; -- Begin function _Z5mergePi
	.globl	_Z5mergePi
	.p2align	8
	.type	_Z5mergePi,@function
_Z5mergePi:                             ; @_Z5mergePi
; %bb.0:
	s_load_b32 s4, s[0:1], 0x8
	s_add_u32 s2, s0, 8
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s4, 1
	s_cbranch_scc1 .LBB1_8
; %bb.1:                                ; %.lr.ph46.preheader
	s_load_b32 s2, s[2:3], 0xc
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s4, s5
	s_xor_b32 s6, s3, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s6
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_load_b64 s[2:3], s[0:1], 0x0
	v_cvt_f32_u32_e32 v2, s7
	s_ashr_i32 s1, s15, 31
	s_sub_i32 s11, 0, s7
	s_add_i32 s0, s15, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, s0, s1
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_sub_i32 s0, 0, s6
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v1, v1
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s9, v1
	v_readfirstlane_b32 s10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s0, s0, s9
	s_mul_hi_u32 s0, s9, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s11, s11, s10
	s_add_i32 s9, s9, s0
	s_mul_hi_u32 s11, s10, s11
	s_add_i32 s10, s10, s11
	s_mov_b32 s11, 2
.LBB1_2:                                ; %.lr.ph46
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
	s_mul_i32 s0, s4, 0x2004
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s12, s0, 31
	s_add_i32 s0, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, s12
	s_xor_b32 s12, s12, s5
	s_mul_hi_u32 s13, s0, s9
	s_mul_i32 s14, s13, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s0, s0, s14
	s_add_i32 s14, s13, 1
	s_sub_i32 s16, s0, s6
	s_cmp_ge_u32 s0, s6
	s_cselect_b32 s13, s14, s13
	s_cselect_b32 s0, s16, s0
	s_add_i32 s14, s13, 1
	s_cmp_ge_u32 s0, s6
	s_cselect_b32 s0, s14, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s0, s0, s12
	s_sub_i32 s0, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s12, s0, 31
	s_add_i32 s0, s0, s12
	s_mov_b32 s12, 1
	s_ashr_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s0, s7
	s_cbranch_scc1 .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mul_hi_u32 s12, s0, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s13, s12, s7
	s_add_i32 s14, s12, 1
	s_sub_i32 s13, s0, s13
	s_sub_i32 s16, s13, s7
	s_cmp_ge_u32 s13, s7
	s_cselect_b32 s12, s14, s12
	s_cselect_b32 s13, s16, s13
	s_add_i32 s14, s12, 1
	s_cmp_ge_u32 s13, s7
	s_cselect_b32 s12, s14, s12
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_ashr_i32 s13, s11, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s14, s11, s13
	s_xor_b32 s14, s14, s13
	s_xor_b32 s13, s1, s13
	v_cvt_f32_u32_e32 v1, s14
	s_sub_i32 s17, 0, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s16, v1
	s_mul_i32 s17, s17, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s17, s16, s17
	s_add_i32 s16, s16, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s16, s8, s16
	s_mul_i32 s17, s16, s14
	s_add_i32 s18, s16, 1
	s_sub_i32 s17, s8, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s19, s17, s14
	s_cmp_ge_u32 s17, s14
	s_cselect_b32 s16, s18, s16
	s_cselect_b32 s17, s19, s17
	s_add_i32 s18, s16, 1
	s_cmp_ge_u32 s17, s14
	s_cselect_b32 s14, s18, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s14, s14, s13
	s_sub_i32 s13, s14, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s13, s11, s13
	s_sub_i32 s14, s15, s13
	s_mulk_i32 s13, 0x2004
	s_mul_i32 s14, s14, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s14, s14, s13
	v_mad_u64_u32 v[1:2], null, s12, v0, s[14:15]
	s_add_i32 s0, s14, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s12, v1
	s_mov_b32 s12, exec_lo
	v_min_i32_e32 v6, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v1, v6
	s_cbranch_execz .LBB1_7
; %bb.5:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_lshr_b32 s0, s11, 1
	s_mov_b32 s13, 0
	v_mad_u64_u32 v[3:4], null, 0x2004, s0, v[1:2]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v8, vcc_lo
.LBB1_6:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v7, v[2:3], off
	global_load_b32 v8, v[4:5], off
	v_add_nc_u32_e32 v1, 1, v1
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v1, v6
	s_or_b32 s13, vcc_lo, s13
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v7, v8, v7
	global_store_b32 v[4:5], v7, off
	v_add_co_u32 v4, s0, v4, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_6
.LBB1_7:                                ; %Flow52
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_lshr_b32 s0, s4, 31
	s_lshl_b32 s11, s11, 1
	s_add_i32 s0, s4, s0
	s_and_b32 s4, s4, -2
	s_ashr_i32 s0, s0, 1
	s_cmp_eq_u32 s4, 2
	s_mov_b32 s4, s0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_8:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5mergePi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5mergePi, .Lfunc_end1-_Z5mergePi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 812
; NumSgprs: 22
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 32784
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5countPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5countPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5mergePi
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z5mergePi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
