#include <stdio.h>
#include <cuda.h>
#include <cuda_runtime.h>



void print_array(float *A, int N)
{
    for(int i=0;i<N;i++)
        printf("%.2f ",A[i]);
    printf("\n");
}


__global__ void
process_kernel1(float *input1, float *input2, float *output, int datasize)
{
    int numElements = datasize / sizeof(float);

    //Write code for i
    int blockNum = blockIdx.z * (gridDim.x * gridDim.y) + blockIdx.y * gridDim.x + blockIdx.x;
    int threadNum = threadIdx.z * (blockDim.x * blockDim.y) + threadIdx.y * (blockDim.x) + threadIdx.x;
    int i = blockNum * (blockDim.x * blockDim.y * blockDim.z) + threadNum;

    if (i < numElements)
    {
        output[i] = sinf(input1[i]) + cosf(input2[i]);
    }
}


__global__ void
process_kernel2(float *input, float *output, int datasize)
{
    int numElements = datasize / sizeof(float);

    //Write code for i
    int blockNum = blockIdx.z * (gridDim.x * gridDim.y) + blockIdx.y * gridDim.x + blockIdx.x;
    int threadNum = threadIdx.z * (blockDim.x * blockDim.y) + threadIdx.y * (blockDim.x) + threadIdx.x;
    int i = blockNum * (blockDim.x * blockDim.y * blockDim.z) + threadNum;

    if (i < numElements)
    {
        output[i] = logf(input[i]);
    }
}


__global__ void
process_kernel3(float *input, float *output, int datasize)
{
    int numElements = datasize / sizeof(float);

    //Write code for i
    int blockNum = blockIdx.z * (gridDim.x * gridDim.y) + blockIdx.y * gridDim.x + blockIdx.x;
    int threadNum = threadIdx.z * (blockDim.x * blockDim.y) + threadIdx.y * (blockDim.x) + threadIdx.x;
    int i = blockNum * (blockDim.x * blockDim.y * blockDim.z) + threadNum;
    
    if (i < numElements)
    {
        output[i] = sqrtf(input[i]);
    }
}



int main(void)
{
    cudaError_t err = cudaSuccess;

    int numElements = 16384;
    size_t size = numElements * sizeof(float);

    float *h_input1 = (float *)malloc(size);

    float *h_input2 = (float *)malloc(size);

    float *h_output1 = (float *)malloc(size);

    float *h_output2 = (float *)malloc(size);

    float *h_output3 = (float *)malloc(size);

    if (h_input1 == NULL || h_input2 == NULL || h_output1 == NULL || h_output2 == NULL || h_output3 == NULL)
    {
        fprintf(stderr, "Failed to allocate host vectors!\n");
        exit(EXIT_FAILURE);
    }


   
    for (int i = 0; i < numElements; ++i)
    {
        scanf("%f",&h_input1[i]);
        
    }
    for (int i = 0; i < numElements; ++i)
    {
        scanf("%f",&h_input2[i]);
        
    }
    


    float *d_input1 = NULL;
    err = cudaMalloc((void **)&d_input1, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector d_input1 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_input2 = NULL;
    err = cudaMalloc((void **)&d_input2, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector d_input2 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_output1 = NULL;
    err = cudaMalloc((void **)&d_output1, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector h_output1 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_output2 = NULL;
    err = cudaMalloc((void **)&d_output2, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector h_output2 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_output3 = NULL;
    err = cudaMalloc((void **)&d_output3, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector h_output3 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // printf("Copy input data from the host memory to the CUDA device\n");
    err = cudaMemcpy(d_input1, h_input1, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector h_input1 from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMemcpy(d_input2, h_input2, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector h_input2 from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

  //Complete Code for launching process_kernel1
    dim3 X1(4, 2, 2);
    dim3 Y1(32, 32, 1);

    process_kernel1<<<X1, Y1>>>(d_input1, d_input2, d_output1, size);
  
    err = cudaGetLastError();

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch process_kernel1 kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    //Complete Code for launching process_kernel2
    dim3 X2(2, 8, 1);
    dim3 Y2(8, 8, 16);

    process_kernel2<<<X2, Y2>>>(d_output1, d_output2, size);


    err = cudaGetLastError();

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch process_kernel2 kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    //Complete Code for launching process_kernel3 
    dim3 X3(16, 1, 1);
    dim3 Y3(128, 8, 1);

    process_kernel3<<<X3, Y3>>>(d_output2, d_output3, size);


    err = cudaGetLastError();

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch process_kernel3 kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    
    // printf("Copy output data from the CUDA device to the host memory\n");
    err = cudaMemcpy(h_output1, d_output1, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector d_output1 from device to host (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMemcpy(h_output2, d_output2, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector d_output2 from device to host (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMemcpy(h_output3, d_output3, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector d_output3 from device to host (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Verify that the result vectors are as expected

    for (int i = 0; i < numElements; ++i)
    {
        if (fabs(sinf(h_input1[i]) + cosf(h_input2[i]) - h_output1[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification for h_output1 failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }

    for (int i = 0; i < numElements; ++i)
    {
        if (fabs(logf(h_output1[i]) - h_output2[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification for h_output2 failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }

    for (int i = 0; i < numElements; ++i)
    {
        if (fabs(sqrtf(h_output2[i]) - h_output3[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification for h_output3 failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }

    print_array(h_output3,numElements);
    

    err = cudaFree(d_input1);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_input1 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaFree(d_input2);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_input2 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaFree(d_output1);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_output1 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaFree(d_output2);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_output2 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaFree(d_output3);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_output3 (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    free(h_input1);
    free(h_input2);
    free(h_output1);
    free(h_output2);
    free(h_output3);

    err = cudaDeviceReset();
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to deinitialize the device! error=%s\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

   
    return 0;
}


	.file	"tmpxft_00270806_00000000-6_multi_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%.2f "
.LC1:
	.string	"\n"
	.text
	.globl	_Z11print_arrayPfi
	.type	_Z11print_arrayPfi, @function
_Z11print_arrayPfi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11print_arrayPfi, .-_Z11print_arrayPfi
	.globl	_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i
	.type	_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i, @function
_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15process_kernel1PfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i, .-_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i
	.globl	_Z15process_kernel1PfS_S_i
	.type	_Z15process_kernel1PfS_S_i, @function
_Z15process_kernel1PfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z15process_kernel1PfS_S_i, .-_Z15process_kernel1PfS_S_i
	.globl	_Z38__device_stub__Z15process_kernel2PfS_iPfS_i
	.type	_Z38__device_stub__Z15process_kernel2PfS_iPfS_i, @function
_Z38__device_stub__Z15process_kernel2PfS_iPfS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15process_kernel2PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z38__device_stub__Z15process_kernel2PfS_iPfS_i, .-_Z38__device_stub__Z15process_kernel2PfS_iPfS_i
	.globl	_Z15process_kernel2PfS_i
	.type	_Z15process_kernel2PfS_i, @function
_Z15process_kernel2PfS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15process_kernel2PfS_iPfS_i
	.cfi_endproc
.LFE2056:
	.size	_Z15process_kernel2PfS_i, .-_Z15process_kernel2PfS_i
	.globl	_Z38__device_stub__Z15process_kernel3PfS_iPfS_i
	.type	_Z38__device_stub__Z15process_kernel3PfS_iPfS_i, @function
_Z38__device_stub__Z15process_kernel3PfS_iPfS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z15process_kernel3PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z38__device_stub__Z15process_kernel3PfS_iPfS_i, .-_Z38__device_stub__Z15process_kernel3PfS_iPfS_i
	.globl	_Z15process_kernel3PfS_i
	.type	_Z15process_kernel3PfS_i, @function
_Z15process_kernel3PfS_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15process_kernel3PfS_iPfS_i
	.cfi_endproc
.LFE2058:
	.size	_Z15process_kernel3PfS_i, .-_Z15process_kernel3PfS_i
	.section	.rodata.str1.1
.LC2:
	.string	"Failed to allocate host vectors!\n"
.LC3:
	.string	"%f"
.LC4:
	.string	"Failed to allocate device vector d_input1 (error code %s)!\n"
.LC5:
	.string	"Failed to allocate device vector d_input2 (error code %s)!\n"
.LC6:
	.string	"Failed to allocate device vector h_output1 (error code %s)!\n"
.LC7:
	.string	"Failed to allocate device vector h_output2 (error code %s)!\n"
.LC8:
	.string	"Failed to allocate device vector h_output3 (error code %s)!\n"
.LC9:
	.string	"Failed to copy vector h_input1 from host to device (error code %s)!\n"
.LC10:
	.string	"Failed to copy vector h_input2 from host to device (error code %s)!\n"
.LC11:
	.string	"Failed to launch process_kernel1 kernel (error code %s)!\n"
.LC12:
	.string	"Failed to launch process_kernel2 kernel (error code %s)!\n"
.LC13:
	.string	"Failed to launch process_kernel3 kernel (error code %s)!\n"
.LC14:
	.string	"Failed to copy vector d_output1 from device to host (error code %s)!\n"
.LC15:
	.string	"Failed to copy vector d_output2 from device to host (error code %s)!\n"
.LC16:
	.string	"Failed to copy vector d_output3 from device to host (error code %s)!\n"
.LC19:
	.string	"Result verification for h_output1 failed at element %d!\n"
.LC20:
	.string	"Result verification for h_output2 failed at element %d!\n"
.LC21:
	.string	"Result verification for h_output3 failed at element %d!\n"
.LC22:
	.string	"Failed to free device vector d_input1 (error code %s)!\n"
.LC23:
	.string	"Failed to free device vector d_input2 (error code %s)!\n"
.LC24:
	.string	"Failed to free device vector d_output1 (error code %s)!\n"
.LC25:
	.string	"Failed to free device vector d_output2 (error code %s)!\n"
.LC26:
	.string	"Failed to free device vector d_output3 (error code %s)!\n"
.LC27:
	.string	"Failed to deinitialize the device! error=%s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$65536, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r15
	call	malloc@PLT
	movl	$65536, %edi
	movq	%rax, %r14
	call	malloc@PLT
	testq	%r12, %r12
	je	.L24
	testq	%rbp, %rbp
	je	.L24
	testq	%r15, %r15
	movq	%rax, %r13
	sete	%al
	testq	%r14, %r14
	sete	%dl
	orb	%dl, %al
	jne	.L24
	testq	%r13, %r13
	movq	%r12, %rdx
	leaq	65536(%r12), %rbx
	sete	%al
	testb	%al, %al
	je	.L27
.L24:
	movq	stderr(%rip), %rdi
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L76
.L27:
	movq	%rdx, %rsi
	leaq	.LC3(%rip), %rdi
	xorl	%eax, %eax
	movq	%rdx, 8(%rsp)
	call	__isoc23_scanf@PLT
	movq	8(%rsp), %rdx
	addq	$4, %rdx
	cmpq	%rbx, %rdx
	jne	.L27
	movq	%rbp, %rdx
	leaq	65536(%rbp), %rbx
.L28:
	movq	%rdx, %rsi
	leaq	.LC3(%rip), %rdi
	xorl	%eax, %eax
	movq	%rdx, 8(%rsp)
	call	__isoc23_scanf@PLT
	movq	8(%rsp), %rdx
	addq	$4, %rdx
	cmpq	%rbx, %rdx
	jne	.L28
	xorl	%edi, %edi
	movl	$65536, %esi
	movq	%rdi, 24(%rsp)
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L29
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
.L77:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L76:
	movl	$1, %edi
	call	exit@PLT
.L29:
	xorl	%esi, %esi
	leaq	32(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	movl	$65536, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L30
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L30:
	xorl	%ecx, %ecx
	leaq	40(%rsp), %rdi
	movl	$65536, %esi
	movq	%rcx, 40(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L31
	call	cudaGetErrorString@PLT
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L31:
	xorl	%edx, %edx
	leaq	48(%rsp), %rdi
	movl	$65536, %esi
	movq	%rdx, 48(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L32
	call	cudaGetErrorString@PLT
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L32:
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	movl	$65536, %esi
	movq	%rax, 56(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L33
	call	cudaGetErrorString@PLT
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L33:
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$65536, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L34
	call	cudaGetErrorString@PLT
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L34:
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$65536, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L35
	call	cudaGetErrorString@PLT
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L35:
	movl	$2147483649, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdi
	movl	$2, %esi
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$65536, %ecx
	movq	24(%rsp), %rdi
	call	_Z40__device_stub__Z15process_kernel1PfS_S_iPfS_S_i
.L36:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L37
	call	cudaGetErrorString@PLT
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L37:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, %ecx
	movl	$1, %esi
	movabsq	$34359738376, %rdx
	movabsq	$34359738370, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$65536, %edx
	call	_Z38__device_stub__Z15process_kernel2PfS_iPfS_i
.L38:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L39
	call	cudaGetErrorString@PLT
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L39:
	movl	$268435457, %edx
	movl	$268435457, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	$65536, %edx
	call	_Z38__device_stub__Z15process_kernel3PfS_iPfS_i
.L40:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L41
	call	cudaGetErrorString@PLT
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L41:
	movq	40(%rsp), %rsi
	movq	%r15, %rdi
	movl	$2, %ecx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L42
	call	cudaGetErrorString@PLT
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L42:
	movq	48(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L43
	call	cudaGetErrorString@PLT
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L43:
	movq	56(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	xorl	%ebx, %ebx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L44
	call	cudaGetErrorString@PLT
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L44:
	movss	(%r12,%rbx,4), %xmm0
	call	sinf@PLT
	movss	%xmm0, 8(%rsp)
	movss	0(%rbp,%rbx,4), %xmm0
	call	cosf@PLT
	addss	8(%rsp), %xmm0
	subss	(%r15,%rbx,4), %xmm0
	andps	.LC17(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC18(%rip), %xmm0
	jbe	.L72
	movl	%ebx, %ecx
	leaq	.LC19(%rip), %rdx
	jmp	.L78
.L72:
	incq	%rbx
	cmpq	$16384, %rbx
	jne	.L44
	xorl	%ebx, %ebx
.L49:
	movss	(%r15,%rbx,4), %xmm0
	call	logf@PLT
	subss	(%r14,%rbx,4), %xmm0
	andps	.LC17(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC18(%rip), %xmm0
	jbe	.L73
	movl	%ebx, %ecx
	leaq	.LC20(%rip), %rdx
	jmp	.L78
.L73:
	incq	%rbx
	cmpq	$16384, %rbx
	jne	.L49
	xorl	%ebx, %ebx
.L52:
	movss	(%r14,%rbx,4), %xmm0
	call	sqrtf@PLT
	subss	0(%r13,%rbx,4), %xmm0
	andps	.LC17(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC18(%rip), %xmm0
	jbe	.L74
	movl	%ebx, %ecx
	leaq	.LC21(%rip), %rdx
.L78:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L76
.L74:
	incq	%rbx
	cmpq	$16384, %rbx
	jne	.L52
	movl	$16384, %esi
	movq	%r13, %rdi
	call	_Z11print_arrayPfi
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L53
	call	cudaGetErrorString@PLT
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L53:
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L54
	call	cudaGetErrorString@PLT
	leaq	.LC23(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L54:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L55
	call	cudaGetErrorString@PLT
	leaq	.LC24(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L55:
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L56
	call	cudaGetErrorString@PLT
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L56:
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L57
	call	cudaGetErrorString@PLT
	leaq	.LC26(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L57:
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r15, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	call	cudaDeviceReset@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L58
	call	cudaGetErrorString@PLT
	leaq	.LC27(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L77
.L58:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC28:
	.string	"_Z15process_kernel3PfS_i"
.LC29:
	.string	"_Z15process_kernel2PfS_i"
.LC30:
	.string	"_Z15process_kernel1PfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15process_kernel3PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15process_kernel2PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15process_kernel1PfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC17:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC18:
	.long	-1998362383
	.long	1055193269
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>




void print_array(float *A, int N)
{
    for(int i=0;i<N;i++)
        printf("%.2f ",A[i]);
    printf("\n");
}


__global__ void
process_kernel1(float *input1, float *input2, float *output, int datasize)
{
    int numElements = datasize / sizeof(float);

    //Write code for i
    int blockNum = blockIdx.z * (gridDim.x * gridDim.y) + blockIdx.y * gridDim.x + blockIdx.x;
    int threadNum = threadIdx.z * (blockDim.x * blockDim.y) + threadIdx.y * (blockDim.x) + threadIdx.x;
    int i = blockNum * (blockDim.x * blockDim.y * blockDim.z) + threadNum;

    if (i < numElements)
    {
        output[i] = sinf(input1[i]) + cosf(input2[i]);
    }
}


__global__ void
process_kernel2(float *input, float *output, int datasize)
{
    int numElements = datasize / sizeof(float);

    //Write code for i
    int blockNum = blockIdx.z * (gridDim.x * gridDim.y) + blockIdx.y * gridDim.x + blockIdx.x;
    int threadNum = threadIdx.z * (blockDim.x * blockDim.y) + threadIdx.y * (blockDim.x) + threadIdx.x;
    int i = blockNum * (blockDim.x * blockDim.y * blockDim.z) + threadNum;

    if (i < numElements)
    {
        output[i] = logf(input[i]);
    }
}


__global__ void
process_kernel3(float *input, float *output, int datasize)
{
    int numElements = datasize / sizeof(float);

    //Write code for i
    int blockNum = blockIdx.z * (gridDim.x * gridDim.y) + blockIdx.y * gridDim.x + blockIdx.x;
    int threadNum = threadIdx.z * (blockDim.x * blockDim.y) + threadIdx.y * (blockDim.x) + threadIdx.x;
    int i = blockNum * (blockDim.x * blockDim.y * blockDim.z) + threadNum;
    
    if (i < numElements)
    {
        output[i] = sqrtf(input[i]);
    }
}



int main(void)
{
    hipError_t err = hipSuccess;

    int numElements = 16384;
    size_t size = numElements * sizeof(float);

    float *h_input1 = (float *)malloc(size);

    float *h_input2 = (float *)malloc(size);

    float *h_output1 = (float *)malloc(size);

    float *h_output2 = (float *)malloc(size);

    float *h_output3 = (float *)malloc(size);

    if (h_input1 == NULL || h_input2 == NULL || h_output1 == NULL || h_output2 == NULL || h_output3 == NULL)
    {
        fprintf(stderr, "Failed to allocate host vectors!\n");
        exit(EXIT_FAILURE);
    }


   
    for (int i = 0; i < numElements; ++i)
    {
        scanf("%f",&h_input1[i]);
        
    }
    for (int i = 0; i < numElements; ++i)
    {
        scanf("%f",&h_input2[i]);
        
    }
    


    float *d_input1 = NULL;
    err = hipMalloc((void **)&d_input1, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector d_input1 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_input2 = NULL;
    err = hipMalloc((void **)&d_input2, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector d_input2 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_output1 = NULL;
    err = hipMalloc((void **)&d_output1, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector h_output1 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_output2 = NULL;
    err = hipMalloc((void **)&d_output2, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector h_output2 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    float *d_output3 = NULL;
    err = hipMalloc((void **)&d_output3, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector h_output3 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // printf("Copy input data from the host memory to the CUDA device\n");
    err = hipMemcpy(d_input1, h_input1, size, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector h_input1 from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMemcpy(d_input2, h_input2, size, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector h_input2 from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

  //Complete Code for launching process_kernel1
    dim3 X1(4, 2, 2);
    dim3 Y1(32, 32, 1);

    process_kernel1<<<X1, Y1>>>(d_input1, d_input2, d_output1, size);
  
    err = hipGetLastError();

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch process_kernel1 kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    //Complete Code for launching process_kernel2
    dim3 X2(2, 8, 1);
    dim3 Y2(8, 8, 16);

    process_kernel2<<<X2, Y2>>>(d_output1, d_output2, size);


    err = hipGetLastError();

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch process_kernel2 kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    //Complete Code for launching process_kernel3 
    dim3 X3(16, 1, 1);
    dim3 Y3(128, 8, 1);

    process_kernel3<<<X3, Y3>>>(d_output2, d_output3, size);


    err = hipGetLastError();

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch process_kernel3 kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    
    // printf("Copy output data from the CUDA device to the host memory\n");
    err = hipMemcpy(h_output1, d_output1, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector d_output1 from device to host (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMemcpy(h_output2, d_output2, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector d_output2 from device to host (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMemcpy(h_output3, d_output3, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector d_output3 from device to host (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Verify that the result vectors are as expected

    for (int i = 0; i < numElements; ++i)
    {
        if (fabs(sinf(h_input1[i]) + cosf(h_input2[i]) - h_output1[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification for h_output1 failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }

    for (int i = 0; i < numElements; ++i)
    {
        if (fabs(logf(h_output1[i]) - h_output2[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification for h_output2 failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }

    for (int i = 0; i < numElements; ++i)
    {
        if (fabs(sqrtf(h_output2[i]) - h_output3[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification for h_output3 failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }

    print_array(h_output3,numElements);
    

    err = hipFree(d_input1);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_input1 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipFree(d_input2);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_input2 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipFree(d_output1);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_output1 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipFree(d_output2);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_output2 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipFree(d_output3);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to free device vector d_output3 (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    free(h_input1);
    free(h_input2);
    free(h_output1);
    free(h_output2);
    free(h_output3);

    err = hipDeviceReset();
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to deinitialize the device! error=%s\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

   
    return 0;
}


	.text
	.file	"multi_kernel.hip"
	.globl	_Z11print_arrayPfi              # -- Begin function _Z11print_arrayPfi
	.type	_Z11print_arrayPfi,@function
_Z11print_arrayPfi:                     # @_Z11print_arrayPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z11print_arrayPfi, .Lfunc_end0-_Z11print_arrayPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__process_kernel1PfS_S_i # -- Begin function _Z30__device_stub__process_kernel1PfS_S_i
	.type	_Z30__device_stub__process_kernel1PfS_S_i,@function
_Z30__device_stub__process_kernel1PfS_S_i: # @_Z30__device_stub__process_kernel1PfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15process_kernel1PfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z30__device_stub__process_kernel1PfS_S_i, .Lfunc_end1-_Z30__device_stub__process_kernel1PfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__process_kernel2PfS_i # -- Begin function _Z30__device_stub__process_kernel2PfS_i
	.type	_Z30__device_stub__process_kernel2PfS_i,@function
_Z30__device_stub__process_kernel2PfS_i: # @_Z30__device_stub__process_kernel2PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15process_kernel2PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z30__device_stub__process_kernel2PfS_i, .Lfunc_end2-_Z30__device_stub__process_kernel2PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__process_kernel3PfS_i # -- Begin function _Z30__device_stub__process_kernel3PfS_i
	.type	_Z30__device_stub__process_kernel3PfS_i,@function
_Z30__device_stub__process_kernel3PfS_i: # @_Z30__device_stub__process_kernel3PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15process_kernel3PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__process_kernel3PfS_i, .Lfunc_end3-_Z30__device_stub__process_kernel3PfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_1:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r14
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r15
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %r12
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	testq	%rbx, %rbx
	je	.LBB4_52
# %bb.1:
	testq	%r14, %r14
	je	.LBB4_52
# %bb.2:
	testq	%r15, %r15
	je	.LBB4_52
# %bb.3:
	testq	%r12, %r12
	je	.LBB4_52
# %bb.4:
	movq	%rax, %r13
	testq	%rax, %rax
	je	.LBB4_52
# %bb.5:                                # %.preheader199.preheader
	xorl	%ebp, %ebp
.LBB4_6:                                # %.preheader199
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rbx,%rbp), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	$4, %rbp
	cmpq	$65536, %rbp                    # imm = 0x10000
	jne	.LBB4_6
# %bb.7:                                # %.preheader198.preheader
	xorl	%ebp, %ebp
.LBB4_8:                                # %.preheader198
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r14,%rbp), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	$4, %rbp
	cmpq	$65536, %rbp                    # imm = 0x10000
	jne	.LBB4_8
# %bb.9:
	leaq	40(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_53
# %bb.10:
	leaq	32(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_54
# %bb.11:
	leaq	16(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_55
# %bb.12:
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_56
# %bb.13:
	leaq	24(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_57
# %bb.14:
	movq	40(%rsp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_58
# %bb.15:
	movq	32(%rsp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_59
# %bb.16:
	movabsq	$8589934596, %rdi               # imm = 0x200000004
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$2, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_18
# %bb.17:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$65536, %ecx                    # imm = 0x10000
	callq	_Z30__device_stub__process_kernel1PfS_S_i
.LBB4_18:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_60
# %bb.19:
	movabsq	$34359738370, %rbp              # imm = 0x800000002
	leaq	6(%rbp), %rdx
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$16, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_21
# %bb.20:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	callq	_Z30__device_stub__process_kernel2PfS_i
.LBB4_21:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_61
# %bb.22:
	addq	$126, %rbp
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_24
# %bb.23:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	callq	_Z30__device_stub__process_kernel3PfS_i
.LBB4_24:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_62
# %bb.25:
	movq	16(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_63
# %bb.26:
	movq	8(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_64
# %bb.27:
	movq	24(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_65
# %bb.28:                               # %.preheader197.preheader
	xorl	%ebp, %ebp
.LBB4_29:                               # %.preheader197
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	callq	sinf
	movss	%xmm0, 52(%rsp)                 # 4-byte Spill
	movss	(%r14,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	callq	cosf
	addss	52(%rsp), %xmm0                 # 4-byte Folded Reload
	subss	(%r15,%rbp,4), %xmm0
	andps	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	ucomisd	.LCPI4_1(%rip), %xmm0
	ja	.LBB4_47
# %bb.30:                               #   in Loop: Header=BB4_29 Depth=1
	incq	%rbp
	cmpq	$16384, %rbp                    # imm = 0x4000
	jne	.LBB4_29
# %bb.31:                               # %.preheader196.preheader
	xorl	%ebp, %ebp
.LBB4_32:                               # %.preheader196
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	callq	logf
	subss	(%r12,%rbp,4), %xmm0
	andps	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	ucomisd	.LCPI4_1(%rip), %xmm0
	ja	.LBB4_48
# %bb.33:                               #   in Loop: Header=BB4_32 Depth=1
	incq	%rbp
	cmpq	$16384, %rbp                    # imm = 0x4000
	jne	.LBB4_32
# %bb.34:                               # %.preheader.preheader
	xorl	%ebp, %ebp
	xorps	%xmm1, %xmm1
.LBB4_35:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r12,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	%xmm1, %xmm0
	jb	.LBB4_37
# %bb.36:                               #   in Loop: Header=BB4_35 Depth=1
	sqrtss	%xmm0, %xmm0
	jmp	.LBB4_38
.LBB4_37:                               # %call.sqrt
                                        #   in Loop: Header=BB4_35 Depth=1
	callq	sqrtf
	xorps	%xmm1, %xmm1
.LBB4_38:                               # %.preheader.split
                                        #   in Loop: Header=BB4_35 Depth=1
	subss	(%r13,%rbp,4), %xmm0
	andps	.LCPI4_0(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	ucomisd	.LCPI4_1(%rip), %xmm0
	ja	.LBB4_49
# %bb.39:                               #   in Loop: Header=BB4_35 Depth=1
	incq	%rbp
	cmpq	$16384, %rbp                    # imm = 0x4000
	jne	.LBB4_35
# %bb.40:
	movq	%r13, %rdi
	movl	$16384, %esi                    # imm = 0x4000
	callq	_Z11print_arrayPfi
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_66
# %bb.41:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_67
# %bb.42:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_68
# %bb.43:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_69
# %bb.44:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB4_70
# %bb.45:
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB4_71
# %bb.46:
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_47:
	.cfi_def_cfa_offset 112
	movq	stderr(%rip), %rdi
	movl	$.L.str.17, %esi
	jmp	.LBB4_50
.LBB4_48:
	movq	stderr(%rip), %rdi
	movl	$.L.str.18, %esi
	jmp	.LBB4_50
.LBB4_49:
	movq	stderr(%rip), %rdi
	movl	$.L.str.19, %esi
.LBB4_50:
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	fprintf
.LBB4_51:
	movl	$1, %edi
	callq	exit
.LBB4_52:
	movq	stderr(%rip), %rcx
	movl	$.L.str.2, %edi
	movl	$33, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB4_51
.LBB4_53:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	jmp	.LBB4_72
.LBB4_54:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	jmp	.LBB4_72
.LBB4_55:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	jmp	.LBB4_72
.LBB4_56:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	jmp	.LBB4_72
.LBB4_57:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	jmp	.LBB4_72
.LBB4_58:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
	jmp	.LBB4_72
.LBB4_59:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
	jmp	.LBB4_72
.LBB4_60:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.11, %esi
	jmp	.LBB4_72
.LBB4_61:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	jmp	.LBB4_72
.LBB4_62:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	jmp	.LBB4_72
.LBB4_63:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.14, %esi
	jmp	.LBB4_72
.LBB4_64:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	jmp	.LBB4_72
.LBB4_65:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.16, %esi
	jmp	.LBB4_72
.LBB4_66:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.20, %esi
	jmp	.LBB4_72
.LBB4_67:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.21, %esi
	jmp	.LBB4_72
.LBB4_68:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	jmp	.LBB4_72
.LBB4_69:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.23, %esi
	jmp	.LBB4_72
.LBB4_70:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.24, %esi
	jmp	.LBB4_72
.LBB4_71:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.25, %esi
.LBB4_72:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_51
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15process_kernel1PfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15process_kernel2PfS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15process_kernel3PfS_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%.2f "
	.size	.L.str, 6

	.type	_Z15process_kernel1PfS_S_i,@object # @_Z15process_kernel1PfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z15process_kernel1PfS_S_i
	.p2align	3, 0x0
_Z15process_kernel1PfS_S_i:
	.quad	_Z30__device_stub__process_kernel1PfS_S_i
	.size	_Z15process_kernel1PfS_S_i, 8

	.type	_Z15process_kernel2PfS_i,@object # @_Z15process_kernel2PfS_i
	.globl	_Z15process_kernel2PfS_i
	.p2align	3, 0x0
_Z15process_kernel2PfS_i:
	.quad	_Z30__device_stub__process_kernel2PfS_i
	.size	_Z15process_kernel2PfS_i, 8

	.type	_Z15process_kernel3PfS_i,@object # @_Z15process_kernel3PfS_i
	.globl	_Z15process_kernel3PfS_i
	.p2align	3, 0x0
_Z15process_kernel3PfS_i:
	.quad	_Z30__device_stub__process_kernel3PfS_i
	.size	_Z15process_kernel3PfS_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Failed to allocate host vectors!\n"
	.size	.L.str.2, 34

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%f"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device vector d_input1 (error code %s)!\n"
	.size	.L.str.4, 60

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate device vector d_input2 (error code %s)!\n"
	.size	.L.str.5, 60

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device vector h_output1 (error code %s)!\n"
	.size	.L.str.6, 61

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to allocate device vector h_output2 (error code %s)!\n"
	.size	.L.str.7, 61

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to allocate device vector h_output3 (error code %s)!\n"
	.size	.L.str.8, 61

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy vector h_input1 from host to device (error code %s)!\n"
	.size	.L.str.9, 69

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to copy vector h_input2 from host to device (error code %s)!\n"
	.size	.L.str.10, 69

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to launch process_kernel1 kernel (error code %s)!\n"
	.size	.L.str.11, 58

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Failed to launch process_kernel2 kernel (error code %s)!\n"
	.size	.L.str.12, 58

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Failed to launch process_kernel3 kernel (error code %s)!\n"
	.size	.L.str.13, 58

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Failed to copy vector d_output1 from device to host (error code %s)!\n"
	.size	.L.str.14, 70

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Failed to copy vector d_output2 from device to host (error code %s)!\n"
	.size	.L.str.15, 70

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Failed to copy vector d_output3 from device to host (error code %s)!\n"
	.size	.L.str.16, 70

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Result verification for h_output1 failed at element %d!\n"
	.size	.L.str.17, 57

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Result verification for h_output2 failed at element %d!\n"
	.size	.L.str.18, 57

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Result verification for h_output3 failed at element %d!\n"
	.size	.L.str.19, 57

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Failed to free device vector d_input1 (error code %s)!\n"
	.size	.L.str.20, 56

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Failed to free device vector d_input2 (error code %s)!\n"
	.size	.L.str.21, 56

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"Failed to free device vector d_output1 (error code %s)!\n"
	.size	.L.str.22, 57

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"Failed to free device vector d_output2 (error code %s)!\n"
	.size	.L.str.23, 57

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"Failed to free device vector d_output3 (error code %s)!\n"
	.size	.L.str.24, 57

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"Failed to deinitialize the device! error=%s\n"
	.size	.L.str.25, 45

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15process_kernel1PfS_S_i"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15process_kernel2PfS_i"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15process_kernel3PfS_i"
	.size	.L__unnamed_3, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__process_kernel1PfS_S_i
	.addrsig_sym _Z30__device_stub__process_kernel2PfS_i
	.addrsig_sym _Z30__device_stub__process_kernel3PfS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15process_kernel1PfS_S_i
	.addrsig_sym _Z15process_kernel2PfS_i
	.addrsig_sym _Z15process_kernel3PfS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15process_kernel1PfS_S_i ; -- Begin function _Z15process_kernel1PfS_S_i
	.globl	_Z15process_kernel1PfS_S_i
	.p2align	8
	.type	_Z15process_kernel1PfS_S_i,@function
_Z15process_kernel1PfS_S_i:             ; @_Z15process_kernel1PfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x2c
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s3, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s14
	s_mul_i32 s2, s3, s2
	s_and_b32 s3, s5, 0xffff
	s_add_i32 s2, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_lshr_b32 s3, s4, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
	v_and_b32_e32 v2, 0x3ff, v0
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s2, 2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_10
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v1, 31, v0
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr4
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0x7fffffff, v2
	v_cmpx_ngt_f32_e64 0x48000000, |v2|
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_3
; %bb.2:
	s_mov_b32 s0, 0x7fffff
	v_mov_b32_e32 v6, 0
	v_and_or_b32 v14, v3, s0, 0x800000
	v_lshrrev_b32_e32 v11, 23, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[4:5], null, 0xfe5163ab, v14, 0
	v_add_nc_u32_e32 v12, 0xffffff88, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v12
	v_mad_u64_u32 v[7:8], null, 0x3c439041, v14, v[5:6]
	v_cndmask_b32_e64 v13, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v5, v8
	v_add_nc_u32_e32 v13, v13, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[8:9], null, 0xdb629599, v14, v[5:6]
	v_cmp_lt_u32_e64 s0, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v15, 0, 0xffffffe0, s0
	v_dual_mov_b32 v5, v9 :: v_dual_cndmask_b32 v4, v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v15, v15, v13
	v_mad_u64_u32 v[9:10], null, 0xf534ddc0, v14, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v15
	v_mov_b32_e32 v5, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v9, v7, vcc_lo
	v_mad_u64_u32 v[10:11], null, 0xfc2757d1, v14, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v7, v4, s0
	v_mov_b32_e32 v5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, 0x4e441529, v14, v[5:6]
	v_mov_b32_e32 v5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[12:13], null, 0xa2f9836e, v14, v[5:6]
	v_cndmask_b32_e64 v5, 0, 0xffffffe0, s1
	v_dual_cndmask_b32 v6, v11, v9 :: v_dual_add_nc_u32 v5, v5, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v12, v12, v10 :: v_dual_cndmask_b32 v11, v13, v11
	v_cndmask_b32_e32 v10, v10, v8, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, v12, v6, s0
	v_cndmask_b32_e64 v11, v11, v12, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v6, v6, v10, s0
	v_sub_nc_u32_e32 v12, 32, v5
	v_cndmask_b32_e64 v10, v10, v7, s0
	v_cndmask_b32_e64 v11, v11, v9, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v6, s1
	v_cndmask_b32_e64 v6, v6, v10, s1
	v_cndmask_b32_e64 v4, v10, v4, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v13, v11, v9, v12
	v_alignbit_b32 v8, v9, v6, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v5, v13, v11, vcc_lo
	v_alignbit_b32 v11, v6, v4, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v7, v8, v9, vcc_lo
	v_bfe_u32 v8, v5, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v6, v11, v6, vcc_lo
	v_alignbit_b32 v9, v5, v7, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v10, 0, v8
	v_alignbit_b32 v7, v7, v6, 30
	v_alignbit_b32 v4, v6, v4, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v9, v9, v10
	v_xor_b32_e32 v6, v7, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v4, v4, v10
	v_clz_i32_u32_e32 v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v11, 32, v11
	v_sub_nc_u32_e32 v7, 31, v11
	v_lshlrev_b32_e32 v13, 23, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_alignbit_b32 v9, v9, v6, v7
	v_alignbit_b32 v4, v6, v4, v7
	v_lshrrev_b32_e32 v7, 29, v5
	v_alignbit_b32 v6, v9, v4, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v7, 31, v7
	v_lshrrev_b32_e32 v9, 9, v9
	v_clz_i32_u32_e32 v10, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v12, 0.5, v7
	v_min_u32_e32 v10, 32, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v12, v12, v13
	v_sub_nc_u32_e32 v14, 31, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v4, v6, v4, v14
	v_or_b32_e32 v6, v9, v12
	v_add_lshl_u32 v9, v10, v11, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v4, 9, v4
	v_mul_f32_e32 v10, 0x3fc90fda, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v4, v4, v9
	v_fma_f32 v9, 0x3fc90fda, v6, -v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, 0x33000000, v4
	v_fmamk_f32 v6, v6, 0x33a22168, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v4, v4, v7
	v_fmac_f32_e32 v6, 0x3fc90fda, v4
	v_lshrrev_b32_e32 v5, 30, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v4, v10, v6 :: v_dual_add_nc_u32 v5, v8, v5
.LBB0_3:                                ; %Flow49
	s_and_not1_saveexec_b32 s0, s4
; %bb.4:
	v_mul_f32_e64 v4, 0x3f22f983, |v2|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v5, v4
	v_fma_f32 v4, 0xbfc90fda, v5, |v2|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v5, 0xb3a22168, v4
	v_fmamk_f32 v4, v5, 0xa7c234c4, v4
	v_cvt_i32_f32_e32 v5, v5
; %bb.5:                                ; %_ZL4sinff.exit
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v6, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
                                        ; implicit-def: $vgpr8
	s_mov_b32 s1, exec_lo
	global_load_b32 v6, v[6:7], off
                                        ; implicit-def: $vgpr7
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f32_e64 0x48000000, |v6|
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_dual_mov_b32 v9, 0 :: v_dual_and_b32 v14, 0x7fffffff, v6
	s_mov_b32 s0, 0x7fffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_and_or_b32 v17, v14, s0, 0x800000
	v_lshrrev_b32_e32 v14, 23, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, 0xfe5163ab, v17, 0
	v_add_nc_u32_e32 v15, 0xffffff88, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v15
	v_mad_u64_u32 v[10:11], null, 0x3c439041, v17, v[8:9]
	v_cndmask_b32_e64 v16, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v8, v11
	v_add_nc_u32_e32 v16, v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[11:12], null, 0xdb629599, v17, v[8:9]
	v_cmp_lt_u32_e64 s0, 31, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, 0, 0xffffffe0, s0
	v_dual_mov_b32 v8, v12 :: v_dual_cndmask_b32 v7, v11, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v18, v18, v16
	v_mad_u64_u32 v[12:13], null, 0xf534ddc0, v17, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v18
	v_mov_b32_e32 v8, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v10, v12, v10, vcc_lo
	v_mad_u64_u32 v[13:14], null, 0xfc2757d1, v17, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v7, v10, v7, s0
	v_mov_b32_e32 v8, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, 0x4e441529, v17, v[8:9]
	v_mov_b32_e32 v8, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0xa2f9836e, v17, v[8:9]
	v_cndmask_b32_e64 v8, 0, 0xffffffe0, s1
	v_dual_cndmask_b32 v9, v14, v12 :: v_dual_add_nc_u32 v8, v8, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v15, v15, v13 :: v_dual_cndmask_b32 v14, v16, v14
	v_cndmask_b32_e32 v13, v13, v11, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v12, v15, v9, s0
	v_cndmask_b32_e64 v14, v14, v15, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v9, v9, v13, s0
	v_sub_nc_u32_e32 v15, 32, v8
	v_cndmask_b32_e64 v13, v13, v10, s0
	v_cndmask_b32_e64 v14, v14, v12, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v12, v12, v9, s1
	v_cndmask_b32_e64 v9, v9, v13, s1
	v_cndmask_b32_e64 v7, v13, v7, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v16, v14, v12, v15
	v_alignbit_b32 v11, v12, v9, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v8, v16, v14, vcc_lo
	v_alignbit_b32 v14, v9, v7, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v11, v12, vcc_lo
	v_bfe_u32 v11, v8, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v9, v14, v9, vcc_lo
	v_alignbit_b32 v12, v8, v10, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v13, 0, v11
	v_alignbit_b32 v10, v10, v9, 30
	v_alignbit_b32 v7, v9, v7, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v12, v12, v13
	v_xor_b32_e32 v9, v10, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v7, v13
	v_clz_i32_u32_e32 v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v14, 32, v14
	v_sub_nc_u32_e32 v10, 31, v14
	v_lshlrev_b32_e32 v16, 23, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_alignbit_b32 v12, v12, v9, v10
	v_alignbit_b32 v7, v9, v7, v10
	v_lshrrev_b32_e32 v10, 29, v8
	v_alignbit_b32 v9, v12, v7, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v10, 31, v10
	v_lshrrev_b32_e32 v12, 9, v12
	v_clz_i32_u32_e32 v13, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v15, 0.5, v10
	v_min_u32_e32 v13, 32, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v15, v15, v16
	v_sub_nc_u32_e32 v17, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v7, v9, v7, v17
	v_or_b32_e32 v9, v12, v15
	v_add_lshl_u32 v12, v13, v14, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v7, 9, v7
	v_mul_f32_e32 v13, 0x3fc90fda, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v7, v7, v12
	v_fma_f32 v12, 0x3fc90fda, v9, -v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, 0x33000000, v7
	v_fmamk_f32 v9, v9, 0x33a22168, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v7, v7, v10
	v_fmac_f32_e32 v9, 0x3fc90fda, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v7, v13, v9
	v_lshrrev_b32_e32 v8, 30, v8
	v_add_nc_u32_e32 v8, v11, v8
.LBB0_7:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s4
; %bb.8:
	v_mul_f32_e64 v7, 0x3f22f983, |v6|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v8, v7
	v_fma_f32 v7, 0xbfc90fda, v8, |v6|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v7, v8, 0xb3a22168, v7
	v_fmamk_f32 v7, v8, 0xa7c234c4, v7
	v_cvt_i32_f32_e32 v8, v8
; %bb.9:                                ; %_ZL4cosff.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v9, v4, v4 :: v_dual_mul_f32 v10, v7, v7
	s_mov_b32 s0, 0xb94c1982
	s_mov_b32 s1, 0x37d75334
	v_xor_b32_e32 v3, v3, v2
	v_dual_fmaak_f32 v11, s0, v9, 0x3c0881c4 :: v_dual_fmaak_f32 v14, s0, v10, 0x3c0881c4
	v_dual_fmaak_f32 v12, s1, v9, 0xbab64f3b :: v_dual_fmaak_f32 v15, s1, v10, 0xbab64f3b
	v_and_b32_e32 v13, 1, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v11, v9, v11, 0xbe2aaa9d :: v_dual_fmaak_f32 v14, v10, v14, 0xbe2aaa9d
	v_dual_fmaak_f32 v12, v9, v12, 0x3d2aabf7 :: v_dual_lshlrev_b32 v5, 30, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v15, v10, v15, 0x3d2aabf7 :: v_dual_and_b32 v16, 1, v8
	v_dual_mul_f32 v11, v9, v11 :: v_dual_mul_f32 v14, v10, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmaak_f32 v12, v9, v12, 0xbf000004 :: v_dual_fmaak_f32 v15, v10, v15, 0xbf000004
	v_lshlrev_b32_e32 v8, 30, v8
	v_dual_fmac_f32 v4, v4, v11 :: v_dual_fmac_f32 v7, v7, v14
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f32 v9, v9, v12, 1.0
	v_cmp_eq_u32_e32 vcc_lo, 0, v13
	v_fma_f32 v10, v10, v15, 1.0
	v_and_b32_e32 v5, 0x80000000, v5
	v_and_b32_e32 v8, 0x80000000, v8
	v_cndmask_b32_e32 v4, v9, v4, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor3_b32 v3, v3, v5, v4
	v_cndmask_b32_e64 v7, -v7, v10, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x1f8
	v_xor_b32_e32 v4, v8, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, 0x7fc00000, v3, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v6, 0x1f8
	v_cndmask_b32_e32 v3, 0x7fc00000, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15process_kernel1PfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15process_kernel1PfS_S_i, .Lfunc_end0-_Z15process_kernel1PfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2116
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z15process_kernel2PfS_i ; -- Begin function _Z15process_kernel2PfS_i
	.globl	_Z15process_kernel2PfS_i
	.p2align	8
	.type	_Z15process_kernel2PfS_i,@function
_Z15process_kernel2PfS_i:               ; @_Z15process_kernel2PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[4:5], s[0:1], 0x24
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s3, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s14
	s_mul_i32 s2, s3, s2
	s_and_b32 s3, s5, 0xffff
	s_add_i32 s2, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	s_lshr_b32 s3, s4, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
	v_and_b32_e32 v2, 0x3ff, v0
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s2, 2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v2
	v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
	v_mul_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	v_fma_f32 v4, 0x3f317217, v2, -v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmamk_f32 v4, v2, 0x3377d1cf, v4
	v_add_f32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v2, v3, s0
	v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_sub_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15process_kernel2PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15process_kernel2PfS_i, .Lfunc_end1-_Z15process_kernel2PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 356
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z15process_kernel3PfS_i ; -- Begin function _Z15process_kernel3PfS_i
	.globl	_Z15process_kernel3PfS_i
	.p2align	8
	.type	_Z15process_kernel3PfS_i,@function
_Z15process_kernel3PfS_i:               ; @_Z15process_kernel3PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b64 s[4:5], s[0:1], 0x24
	v_bfe_u32 v1, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s3, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, s14
	s_mul_i32 s2, s3, s2
	s_and_b32 s3, s5, 0xffff
	s_add_i32 s2, s2, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	s_lshr_b32 s3, s4, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
	v_and_b32_e32 v2, 0x3ff, v0
	s_and_b32 s3, s4, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s2, 2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	v_fma_f32 v6, -v4, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v5, v3, v2
	v_cmp_ge_f32_e64 s0, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_cmp_lt_f32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s0
	v_mul_f32_e32 v4, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15process_kernel3PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15process_kernel3PfS_i, .Lfunc_end2-_Z15process_kernel3PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
