/**
 * Author:易培淮
 * Mail:yiph@ihep.ac.cn
 * Function:Accelerate simulation with Single GPU
 * 2018/11/27
 */

#include <cuda.h>
#include <cuda_runtime_api.h>
#include <curand.h>
#include <curand_kernel.h>
#include <stdio.h>
// #include <math.h>
// #include <math_constants.h>

// typedef struct arr
// {
//     double *pBase;//存储的是数组第一个元素的地址
//     int len;//数组能容纳的最大元素的个数
//     int cnt;//有效数组个数
//             //自动增长因子
// } Arr;

typedef struct res_arr
{
	double *arr;
	int *pmt_list;
	int index;
	int id;
	// int begin;
	// int len;
} Res_Arr;


__device__ double generateRandom(curandState *state);
__device__ void generateRandomInit(curandState *state,int seed);
__device__ int sampling(curandState state,double *histo,int max,int id);
__device__ int binarySearch(double *histo,double target,int max,int id);
__device__ double calculateAngle(double x,double y,double z,double a,double b,double c);
__device__ void generateHits(double r,double theta, double ratio,int pmtid,double start_time,double *hittime,double *npe,curandState state,Res_Arr r_arr);
__device__ void save_hits(Res_Arr *p,double val);
__device__ double get_hittime(double r, double theta, int mode, double *hittime, curandState state);
__device__ double get_hittime_bin(int binx, int biny, int mode, double *hittime, curandState state);
__device__ double get_hittime_all(int binx, int biny,double *hittime, curandState state);
__device__ int get_bin_x(double r);
__device__ int get_bin_y(double theta);
__device__ int r_findBin(double r);
__device__ int get_npe(double r,double theta,double *npe,curandState state);
__device__ int r3_findBin(double r3);
__device__ int theta_findBin(double theta);
__device__ int get_npe_num(int binx,int biny,double *npe,curandState state);
__device__ int generateRandomInt(curandState *state,int begin,int end);

__global__ void pmt_calculate(double r,double pos_x,double pos_y,double pos_z,double *pmt_x,double *pmt_y,double *pmt_z,double intPart,double fractionPart,double start_time,int numElements,double *hittime,double *npe,int *seed,double *result,int *pmt_res_list);
__host__ void step_calculate(double r,double pos_x,double pos_y,double pos_z,double intPart,double fractionPart,double start_time,double *pmt_x,double *pmt_y,double *pmt_z,double *hittime,double *npe,int *seed,double *result,int *pmt_list,int size);
// __device__ void init_arr(Arr *pArr, int length);//初始化数组
// __device__ bool append_arr(Arr *pArr, int val);//追加，可能成功，可能失败
// __device__ bool is_full_arr(Arr *pArr);//是否满了
__device__ void append_res_arr(Res_Arr *p, double val);
__device__ void init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size);

// float CDF_Sampling_Wrapping(double *h_pmt,double *h_hit,double *h_result, int *seed,int total_num, int nBytes,int max_n,int max_time);

#define CHECK(call) \
{\
	const cudaError_t error = call;\
	if (error != cudaSuccess)\
	{\
		printf("Error:%s:%d, ", __FILE__, __LINE__);\
		printf("code:%d, reason: %s\n", error, cudaGetErrorString(error));\
		exit(1);\
	}\
}
#define pmt_num 17746


__global__ void
pmt_calculate(double r,double pos_x,double pos_y,double pos_z,double *pmt_x,double *pmt_y,double *pmt_z,double intPart,double fractionPart,double start_time,int numElements,double *hittime,double *npe,int *seed,double *result,int *pmt_res_list,int size){
	int id = blockIdx.x*blockDim.x+threadIdx.x;
	//result[id*50*]
	// double hittime_single;
	//numElements = pmt numbers
	if (id < numElements){
		curandState state;
		generateRandomInit(&state, seed[id]);
		Res_Arr pmt_arr;
		init_res_arr(&pmt_arr,result,pmt_res_list,id,size);
		double theta = calculateAngle(pmt_x[id],pmt_y[id],pmt_z[id],pos_x,pos_y,pos_z);
		// for(int j = 0; j < intPart; ++j){
		// 	generateHits(r,theta,1,id,start_time,hittime,npe,state,pmt_arr);
		// 	// save_hit(&pmt_arr,hittime_single);
		// 	// save_hits_simple(hittime_single);
		// }
		generateHits(r,theta,fractionPart,id,start_time,hittime,npe,state,pmt_arr);
		// save_hits_simple(&pmt_arr,hittime_single);
	}
}


__host__ void
step_calculate(double r,double pos_x,double pos_y,double pos_z,double intPart,double fractionPart,double start_time,double *pmt_x,double *pmt_y,double *pmt_z,double *hittime,double *npe,int *seed,double *result,int *pmt_list,int size){
	//设置线程数量
	printf("[GPU]启动核函数\n");
	CHECK(cudaDeviceSynchronize());
	int threadPerBlock=1024;
	int blocksPerGrid = ceil(pmt_num/threadPerBlock);
	dim3 block(threadPerBlock);
	//设置块数量
	dim3 grid(blocksPerGrid);//blocksPerGrid
	printf("[GPU]网格，线程(%d,%d)\n",blocksPerGrid,threadPerBlock);
	CHECK(cudaDeviceSynchronize());
	pmt_calculate<<<grid, block>>>(r,pos_x,pos_y,pos_z,pmt_x,pmt_y,pmt_z,intPart,fractionPart,start_time,pmt_num,hittime,npe,seed,result,pmt_list,size);
}



__device__ double
calculateAngle(double x,double y,double z,double a,double b,double c)
{
	double result = 0;
	result = acos((a*x+b*y+c*z)/(norm3d(x,y,z)*norm3d(a,b,c)));
	return result;
}

__device__ void 
generateHits(double r,double theta, double ratio,int pmtid,double start_time,double *hittime,double *npe,curandState state,Res_Arr r_arr)
{
	int npe_histo_id = get_npe(r,theta,npe,state);
	if (npe_histo_id>0)
	{
		for (int hitj = 0; hitj < npe_histo_id; ++hitj) 
		{
            // skip the photon according to the energy deposit
			if (ratio<1 and generateRandom(&state)>ratio) 
			{
                continue;
            }
            double hittime_single = start_time;
            // (m_flag_time) 
        	hittime_single += get_hittime(r, theta, 0, hittime, state);
            // generated hit
			// (m_flag_savehits) 
			append_res_arr(&r_arr,hittime_single);
            // save_hits(pmtid, hittime_single,result);
        }
	}
}

// __device__ void 
// save_hits(Res_Arr *p,double val){
// 	append_res_arr(p,val);
// }

__device__ double///////////////
get_hittime(double r, double theta, int mode, double *hittime, curandState state) {
	int binx = get_bin_x(r);
	int biny = get_bin_y(theta);
	return get_hittime_bin(binx, biny, mode, hittime, state);
}

__device__ double 
get_hittime_bin(int binx, int biny, int mode, double *hittime, curandState state) {
	// hit time = tmean + tres
	double hittime_single = 0.0;
	if (mode == 0) {
		hittime_single = get_hittime_all(binx,biny,hittime,state);
	}
	return hittime_single;
}

__device__ double 
get_hittime_all(int binx, int biny,double *hittime, curandState state) {
	// TH1F* h = get_hist(binx, biny);
	int xbinnum = 200;
	int ybinnum = 180;
	if (binx<1) { binx = 1; }
    else if (binx > xbinnum) { binx = xbinnum;}
    if (biny<1) { biny = 1; }
    else if (biny > ybinnum) { biny = ybinnum;}

    int idx = (binx-1)*ybinnum+(biny-1);
	double hittime_single = sampling(state,hittime,3000,idx);
	return hittime_single;
}


__device__ int 
get_bin_x(double r) 
{
	int binx = 1;
	int xmode = 2;
	if (xmode == 2) //KR
	{
		binx = r_findBin(r);
	} 
	return binx;
}

__device__ int 
get_bin_y(double theta) {
	int biny = 1;
	int ymode = 4;
	if (ymode == 4) {
		biny = theta_findBin(theta);
	}
	return biny;
}

__device__ int 
r_findBin(double r)
{
	const int binnum = 200;
	const double begin = 0;
	const double end = 17.7;
	return (int)floor(r/(end-begin)*binnum);
}

__device__ int 
get_npe(double r,double theta,double *npe,curandState state)
{
	int binx = r3_findBin(pow(r,3));
	int biny = theta_findBin(theta);
	return get_npe_num(binx,biny,npe,state);
}

__device__ int 
r3_findBin(double r3)
{
	const int binnum = 100;
	const double begin = 0;
	const double end = 5600;
	return (int)floor(r3/(end-begin)*binnum);
}


__device__ int 
theta_findBin(double theta)
{
	const int binnum = 180;
	const double begin = 0;
	const double end = 180.01*acos(1.0)/180.0;
	return (int)floor(theta/(end-begin)*binnum);
}

__device__ int 
get_npe_num(int binx,int biny,double *npe,curandState state)
{
	int npe_from_single = 0;
	if (1 <= binx and binx <= 100 and 1 <= biny and biny <= 180) {
		npe_from_single = sampling(state,npe,50,(binx-1)*180+(biny-1));	
	} else if (binx==1 and (biny<1 or biny>180)) {
		biny = generateRandomInt(&state,1,180);
		npe_from_single = sampling(state,npe,50,(binx-1)*180+(biny-1));	
	} else if (binx>1 and (biny<1 or biny>180)) {
		if (biny>180) { biny = 180; }
		else if (biny<1){ biny = 1; }
		npe_from_single = sampling(state,npe,50,(binx-1)*180+(biny-1));
	} else {
		static long warning = 0;
		++warning;
		if (warning < 10) {
			printf("npe lost: %d/%d", binx,biny);
		} else if (warning == 10) {
			printf("too many npe lost complains.");
		}
	}
	return npe_from_single;
}

__device__ double
generateRandom(curandState *state)
{
    double result = abs(curand_uniform_double(state));
    return result;
}

__device__ int
generateRandomInt(curandState *state,int begin,int end)
{
    int result = begin+int(ceil(abs(curand_uniform_double(state))*(end-begin)));
    return result;
}

__device__ void
generateRandomInit(curandState *state,int seed)
{
    curand_init(seed, 0, 0, state);
}

__device__ int 
sampling(curandState state,double *histo,int max,int id)
{
    double prob; 
	prob = generateRandom(&state);
	return binarySearch(histo,prob,max,id);
}

__device__ int
binarySearch(double *histo,double target,int max,int id)
{
	int start = 0;
	int end = max-1;
	int mid;

	while(start+1<end){
		mid = start+(end-start)/2;
		if (histo[id*max+mid]==target){
			end = mid;
		} 
		else if (histo[id*max+mid] < target){
			start = mid;
		}
		else if (histo[id*max+mid] > target){
			end = mid;
		}
	}
	if (histo[id*max+start] == target){
		return start;
	}
	if (histo[id*max+end] == target){
		return end;
	}
	return -1;
}

// __device__ bool 
// is_full_arr(Arr *pArr)//是否满了
// {
//     if (pArr->cnt == pArr->len) {
//         return true;
//     }
//     else{
//         return false;
//     }
// }

// __device__ bool 
// append_arr(Arr *pArr, int val)//追加，可能成功，可能失败
// {
//     //满时返回false
//     if (is_full_arr(pArr))
//         return false;
//     //不满时追加
//     pArr->pBase[pArr->cnt] = val;
//     (pArr->cnt)++;
//     return true;
// }

__device__ void
append_res_arr(Res_Arr *p, double val)//追加，可能成功，可能失败
{
	p->arr[p->index+p->pmt_list[p->id]] = val;
	p->pmt_list[p->id] += 1;
	return;
	//满时返回false
	// int flag = 0;
	// for(int i = 0 ; i < p->num;i++){
	// 	if(!is_full_arr(&(p->arr[i]))){
	// 		flag = 1;
	// 		append_arr(&(p->arr[i]),val);
	// 	}
	// }
	// if (flag == 0){
	// 	init_arr(&(p->arr[p->num]),100);
	// 	p->num +=1;
	// }
}

// __device__ void 
// init_arr(Arr *pArr, int length) {
//     //分配初始化数组
//     pArr->pBase = (double*)malloc(sizeof(double)*length);
//     if (NULL == pArr->pBase)
//     {
//         printf("free error 动态内存分配失败！\n");
//         exit(-1);//终止整个程序
//     }
//     else
//     {
//         pArr->len = length;
//         pArr->cnt = 0;
//     }
//     return;
// }

__device__ void
init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size){
	p->arr = result;
	p->pmt_list = pmt_res_list;
	p->index = pmtid*size*50;//存储该pmt在数组中的起始存取点
	p->id = pmtid;
	// p->begin = begin;
	// p->len = len;
	return;
}

/*
extern "C" 
{
    float CDF_Sampling_wrapper(double *h_pmt,double *h_hit,double *h_result, int *seed, int total_num, int nBytes,int max_n,int max_time)
    {
		//GPU计时，设置开始和结束事件
		cudaEvent_t start, stop, gpu_start,gpu_stop;
		cudaEventCreate(&start);
		cudaEventCreate(&stop);
		cudaEventCreate(&gpu_start);
		cudaEventCreate(&gpu_stop);
		cudaEventRecord(start);
        //申请GPU内存
		double *d_pmt, *d_hit,*d_result;
		int *d_seed;
	    CHECK(cudaMalloc((double**)&d_pmt,nBytes));
	    CHECK(cudaMalloc((double**)&d_hit, nBytes));
		CHECK(cudaMalloc((double**)&d_result, nBytes));
		CHECK(cudaMalloc((int**)&d_seed,nBytes/2));
        //将CPU内存拷贝到GPU
	    CHECK(cudaMemcpy(d_pmt, h_pmt, nBytes, cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_hit, h_hit, nBytes, cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_seed,seed,nBytes/2,cudaMemcpyHostToDevice));
        //设置使用编号为0的GPU
	    CHECK(cudaSetDevice(0));
		//设置线程数量
		int threadPerBlock,blocksPerGrid;
		if (total_num<128)
		{
			threadPerBlock = 128;
			blocksPerGrid =1;
		}
		else if(total_num<1024)
		{
			threadPerBlock = 128;
			blocksPerGrid =int(ceil(total_num/(double)threadPerBlock));
		}
		else
		{
			threadPerBlock = 1024;
			blocksPerGrid =int(ceil(total_num/(double)threadPerBlock));
		}
		
	    dim3 block(threadPerBlock);
	    //设置块数量
		dim3 grid(blocksPerGrid);//blocksPerGrid
		
		cudaEventRecord(gpu_start);
        //调用核函数
		CDF_Sampling <<<grid, block >>>(d_pmt, d_hit, d_result, d_seed,total_num,max_n,max_time);
		
		cudaEventRecord(gpu_stop);
		cudaEventSynchronize(gpu_stop);//同步，强制CPU等待GPU event被设定

        CHECK(cudaDeviceSynchronize());
		CHECK(cudaMemcpy(h_result, d_result, nBytes, cudaMemcpyDeviceToHost));
		cudaEventRecord(stop);
		cudaEventSynchronize(stop);
		float time,total_time;
		//计算用时，精度0.5us
		cudaEventElapsedTime(&total_time, start, stop);
		cudaEventDestroy(start);
		cudaEventDestroy(stop);

		printf("threadPerBlock:%d\n",threadPerBlock);
		printf("blocksPerGrid；%d\n",blocksPerGrid);
		printf("total use time %f ms\n", total_time);
		cudaEventElapsedTime(&time, gpu_start, gpu_stop);
		cudaEventDestroy(gpu_start);
		cudaEventDestroy(gpu_stop);
		printf("gpu use time %f ms\n", time);
		printf("占用内存：%d B\n", nBytes);
		printf("占用内存：%d kB\n", nBytes / 1024);
        //释放GPU内存
	    CHECK(cudaFree(d_pmt));
	    CHECK(cudaFree(d_hit));
		CHECK(cudaFree(d_result));
		return total_time;
    }
}
*/
extern "C"
{
	float GPU_Sampling_wrapper(double *r,double *pos_x,double *pos_y,double *pos_z, double *intPart, double *fractionPart,double *start_time,double *pmt_x,double *pmt_y,double *pmt_z,double *data_hit,double *data_npe,int *seed,int *size,double* h_result)
    {
		//GPU计时，设置开始和结束事件
		cudaEvent_t start, stop;
		// cudaEvent_t gpu_start,gpu_stop;
		CHECK(cudaEventCreate(&start));
		CHECK(cudaEventCreate(&stop));
		// cudaEventCreate(&gpu_start);
		// cudaEventCreate(&gpu_stop);
		cudaEventRecord(start);
		CHECK(cudaDeviceSynchronize());
		printf("[GPU]GPU时间已记录\n");
        //申请GPU内存
		double *d_r, *d_pos_x,*d_pos_y,*d_pos_z,*d_intPart,*d_fractionPart,*d_start_time;
		double *d_pmt_x,*d_pmt_y,*d_pmt_z,*d_data_hit,*d_data_npe;
		double *d_result;
		int *d_seed;
		int pmt_res_list[pmt_num] = {0};
		CHECK(cudaMalloc((double**)&d_r,size[0]));
		CHECK(cudaMalloc((double**)&d_pos_x,size[0]));
		CHECK(cudaMalloc((double**)&d_pos_y,size[0]));
		CHECK(cudaMalloc((double**)&d_pos_z,size[0]));
		CHECK(cudaMalloc((double**)&d_intPart,size[0]));
		CHECK(cudaMalloc((double**)&d_fractionPart,size[0]));
		CHECK(cudaMalloc((double**)&d_start_time,size[0]));
		CHECK(cudaMalloc((double**)&d_pmt_x,size[1]));
		CHECK(cudaMalloc((double**)&d_pmt_y,size[1]));
		CHECK(cudaMalloc((double**)&d_pmt_z,size[1]));
		CHECK(cudaMalloc((double**)&d_data_hit,size[2]));
		CHECK(cudaMalloc((double**)&d_data_npe,size[3]));
		CHECK(cudaMalloc((int**)&d_seed,size[4]));
		CHECK(cudaMalloc((double**)&d_result,pmt_num*size[0]*50));
        //将CPU内存拷贝到GPU
	    CHECK(cudaMemcpy(d_r, r, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_pos_x, pos_x, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_pos_y, pos_y, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_pos_z, pos_z, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_intPart, intPart, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_fractionPart, fractionPart, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_start_time, start_time, size[0], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_pmt_x, pmt_x, size[1], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_pmt_y, pmt_y, size[1], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_pmt_z, pmt_z, size[1], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_data_hit, data_hit, size[2], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_data_npe, data_npe, size[3], cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_seed, seed, size[4], cudaMemcpyHostToDevice));
		
		printf("[GPU]GPU数据拷贝完成\n");
        //设置使用编号为0的GPU
	    CHECK(cudaSetDevice(0));
		// //设置线程数量
		// int threadPerBlock = 1024;
		// int blocksPerGrid =ceil(17746/1024);
		
	    // dim3 block(threadPerBlock);
	    // //设置块数量
		// dim3 grid(blocksPerGrid);//blocksPerGrid

		//调用核函数
		for(int i = 0;i<size[0]/8;i++) {
			printf("[GPU]开始运行核函数[%d]\n",i);
			CHECK(cudaDeviceSynchronize());
			step_calculate(d_r[i],d_pos_x[i],d_pos_y[i],d_pos_z[i],d_intPart[i],d_fractionPart[i],d_start_time[i],d_pmt_x,d_pmt_y,d_pmt_z,d_data_hit,d_data_npe,(int*)(d_seed+i*pmt_num),d_result,pmt_res_list,size[0]/8);
		}
		
		
		printf("[GPU]核函数运行完成\n");
		CHECK(cudaDeviceSynchronize());

		CHECK(cudaMemcpy(h_result, d_result, pmt_num*size[0]*50, cudaMemcpyDeviceToHost));
		cudaEventRecord(stop);
		cudaEventSynchronize(stop);
		float total_time;
		//计算用时，精度0.5us
		cudaEventElapsedTime(&total_time, start, stop);
		cudaEventDestroy(start);
		cudaEventDestroy(stop);
		printf("total use time %f ms\n", total_time);
		// printf("threadPerBlock:%d\n",threadPerBlock);
		// printf("blocksPerGrid；%d\n",blocksPerGrid);
		
		// cudaEventElapsedTime(&time, gpu_start, gpu_stop);
		// cudaEventDestroy(gpu_start);
		// cudaEventDestroy(gpu_stop);

        //释放GPU内存
	    CHECK(cudaFree(d_r));
		CHECK(cudaFree(d_pos_x));
		CHECK(cudaFree(d_pos_y));
		CHECK(cudaFree(d_pos_z));
		CHECK(cudaFree(d_intPart));
		CHECK(cudaFree(d_fractionPart));
		CHECK(cudaFree(d_data_hit));
		CHECK(cudaFree(d_data_npe));
		CHECK(cudaFree(d_start_time));
		CHECK(cudaFree(d_pmt_x));
		CHECK(cudaFree(d_pmt_y));
		CHECK(cudaFree(d_pmt_z));
		CHECK(cudaFree(d_seed));
		CHECK(cudaFree(d_result));
		printf("[GPU]GPU运行完成\n");
		return total_time;
		// return 0.0;
    }
}
	.file	"tmpxft_003a6b4a_00000000-6_simu_so_v2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2264:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2264:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14calculateAngledddddd
	.type	_Z14calculateAngledddddd, @function
_Z14calculateAngledddddd:
.LFB2242:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2242:
	.size	_Z14calculateAngledddddd, .-_Z14calculateAngledddddd
	.globl	_Z12generateHitsdddidPdS_17curandStateXORWOW7res_arr
	.type	_Z12generateHitsdddidPdS_17curandStateXORWOW7res_arr, @function
_Z12generateHitsdddidPdS_17curandStateXORWOW7res_arr:
.LFB2243:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2243:
	.size	_Z12generateHitsdddidPdS_17curandStateXORWOW7res_arr, .-_Z12generateHitsdddidPdS_17curandStateXORWOW7res_arr
	.globl	_Z11get_hittimeddiPd17curandStateXORWOW
	.type	_Z11get_hittimeddiPd17curandStateXORWOW, @function
_Z11get_hittimeddiPd17curandStateXORWOW:
.LFB2244:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2244:
	.size	_Z11get_hittimeddiPd17curandStateXORWOW, .-_Z11get_hittimeddiPd17curandStateXORWOW
	.globl	_Z15get_hittime_biniiiPd17curandStateXORWOW
	.type	_Z15get_hittime_biniiiPd17curandStateXORWOW, @function
_Z15get_hittime_biniiiPd17curandStateXORWOW:
.LFB2245:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2245:
	.size	_Z15get_hittime_biniiiPd17curandStateXORWOW, .-_Z15get_hittime_biniiiPd17curandStateXORWOW
	.globl	_Z15get_hittime_alliiPd17curandStateXORWOW
	.type	_Z15get_hittime_alliiPd17curandStateXORWOW, @function
_Z15get_hittime_alliiPd17curandStateXORWOW:
.LFB2246:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2246:
	.size	_Z15get_hittime_alliiPd17curandStateXORWOW, .-_Z15get_hittime_alliiPd17curandStateXORWOW
	.globl	_Z9get_bin_xd
	.type	_Z9get_bin_xd, @function
_Z9get_bin_xd:
.LFB2247:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2247:
	.size	_Z9get_bin_xd, .-_Z9get_bin_xd
	.globl	_Z9get_bin_yd
	.type	_Z9get_bin_yd, @function
_Z9get_bin_yd:
.LFB2409:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2409:
	.size	_Z9get_bin_yd, .-_Z9get_bin_yd
	.globl	_Z9r_findBind
	.type	_Z9r_findBind, @function
_Z9r_findBind:
.LFB2411:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2411:
	.size	_Z9r_findBind, .-_Z9r_findBind
	.globl	_Z7get_npeddPd17curandStateXORWOW
	.type	_Z7get_npeddPd17curandStateXORWOW, @function
_Z7get_npeddPd17curandStateXORWOW:
.LFB2250:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2250:
	.size	_Z7get_npeddPd17curandStateXORWOW, .-_Z7get_npeddPd17curandStateXORWOW
	.globl	_Z10r3_findBind
	.type	_Z10r3_findBind, @function
_Z10r3_findBind:
.LFB2413:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2413:
	.size	_Z10r3_findBind, .-_Z10r3_findBind
	.globl	_Z13theta_findBind
	.type	_Z13theta_findBind, @function
_Z13theta_findBind:
.LFB2415:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9get_bin_xd
	.cfi_endproc
.LFE2415:
	.size	_Z13theta_findBind, .-_Z13theta_findBind
	.globl	_Z11get_npe_numiiPd17curandStateXORWOW
	.type	_Z11get_npe_numiiPd17curandStateXORWOW, @function
_Z11get_npe_numiiPd17curandStateXORWOW:
.LFB2253:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2253:
	.size	_Z11get_npe_numiiPd17curandStateXORWOW, .-_Z11get_npe_numiiPd17curandStateXORWOW
	.globl	_Z14generateRandomP17curandStateXORWOW
	.type	_Z14generateRandomP17curandStateXORWOW, @function
_Z14generateRandomP17curandStateXORWOW:
.LFB2254:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2254:
	.size	_Z14generateRandomP17curandStateXORWOW, .-_Z14generateRandomP17curandStateXORWOW
	.globl	_Z17generateRandomIntP17curandStateXORWOWii
	.type	_Z17generateRandomIntP17curandStateXORWOWii, @function
_Z17generateRandomIntP17curandStateXORWOWii:
.LFB2255:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2255:
	.size	_Z17generateRandomIntP17curandStateXORWOWii, .-_Z17generateRandomIntP17curandStateXORWOWii
	.globl	_Z18generateRandomInitP17curandStateXORWOWi
	.type	_Z18generateRandomInitP17curandStateXORWOWi, @function
_Z18generateRandomInitP17curandStateXORWOWi:
.LFB2256:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2256:
	.size	_Z18generateRandomInitP17curandStateXORWOWi, .-_Z18generateRandomInitP17curandStateXORWOWi
	.globl	_Z8sampling17curandStateXORWOWPdii
	.type	_Z8sampling17curandStateXORWOWPdii, @function
_Z8sampling17curandStateXORWOWPdii:
.LFB2257:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2257:
	.size	_Z8sampling17curandStateXORWOWPdii, .-_Z8sampling17curandStateXORWOWPdii
	.globl	_Z12binarySearchPddii
	.type	_Z12binarySearchPddii, @function
_Z12binarySearchPddii:
.LFB2258:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2258:
	.size	_Z12binarySearchPddii, .-_Z12binarySearchPddii
	.globl	_Z14append_res_arrP7res_arrd
	.type	_Z14append_res_arrP7res_arrd, @function
_Z14append_res_arrP7res_arrd:
.LFB2259:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2259:
	.size	_Z14append_res_arrP7res_arrd, .-_Z14append_res_arrP7res_arrd
	.globl	_Z12init_res_arrP7res_arrPdPiii
	.type	_Z12init_res_arrP7res_arrPdPiii, @function
_Z12init_res_arrP7res_arrPdPiii:
.LFB2260:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2260:
	.size	_Z12init_res_arrP7res_arrPdPiii, .-_Z12init_res_arrP7res_arrPdPiii
	.globl	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	.type	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i, @function
_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i:
.LFB2286:
	.cfi_startproc
	endbr64
	subq	$344, %rsp
	.cfi_def_cfa_offset 352
	movq	352(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	144(%rsp), %rdi
	movq	%rsi, 80(%rsp)
	leaq	156(%rsp), %rsi
	movq	%rax, 16(%rsp)
	movq	360(%rsp), %rax
	movq	%rdx, 72(%rsp)
	leaq	128(%rsp), %rdx
	movq	%rax, 8(%rsp)
	movq	368(%rsp), %rax
	movl	%ecx, 44(%rsp)
	leaq	136(%rsp), %rcx
	movq	%r8, 32(%rsp)
	movq	%r9, 24(%rsp)
	movq	%rax, (%rsp)
	movsd	%xmm0, 120(%rsp)
	movsd	%xmm1, 112(%rsp)
	movsd	%xmm2, 104(%rsp)
	movsd	%xmm3, 96(%rsp)
	movsd	%xmm4, 64(%rsp)
	movsd	%xmm5, 56(%rsp)
	movsd	%xmm6, 48(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 328(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	112(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 288(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 296(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 304(%rsp)
	movq	%rsp, %rax
	movq	%rax, 312(%rsp)
	leaq	376(%rsp), %rax
	movq	%rax, 320(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 144(%rsp)
	movl	$1, 152(%rsp)
	movq	%rax, 156(%rsp)
	movl	$1, 164(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	136(%rsp)
	.cfi_def_cfa_offset 360
	leaq	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i(%rip), %rdi
	pushq	136(%rsp)
	.cfi_def_cfa_offset 368
	movq	172(%rsp), %rcx
	movl	180(%rsp), %r8d
	movq	160(%rsp), %rsi
	movl	168(%rsp), %edx
	leaq	208(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 360
	popq	%rdx
	.cfi_def_cfa_offset 352
.L40:
	movq	328(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$344, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2286:
	.size	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i, .-_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	.globl	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.type	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, @function
_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i:
.LFB2287:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	.cfi_endproc
.LFE2287:
	.size	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, .-_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"[GPU]\345\220\257\345\212\250\346\240\270\345\207\275\346\225\260\n"
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/advancc/gpulearn/master/MuonFastVoxel/simu_so_v2.cu"
.LC2:
	.string	"Error:%s:%d, "
.LC3:
	.string	"code:%d, reason: %s\n"
.LC4:
	.string	"[GPU]\347\275\221\346\240\274\357\274\214\347\272\277\347\250\213(%d,%d)\n"
	.text
	.globl	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	.type	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i, @function
_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i:
.LFB2241:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	movq	%r9, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 56(%rsp)
	movl	$2, %edi
	movsd	%xmm0, (%rsp)
	movsd	%xmm1, 8(%rsp)
	movsd	%xmm2, 16(%rsp)
	movsd	%xmm3, 24(%rsp)
	movsd	%xmm4, 32(%rsp)
	movsd	%xmm5, 40(%rsp)
	movsd	%xmm6, 48(%rsp)
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L47
	movl	%eax, %ebx
	movl	$104, %ecx
	jmp	.L51
.L47:
	movl	$4194305, %eax
	movl	$1024, %ecx
	movl	$17, %edx
	movl	$2, %edi
	salq	$10, %rax
	leaq	.LC4(%rip), %rsi
	movl	$1, 80(%rsp)
	movq	%rax, 72(%rsp)
	subq	$1007, %rax
	movq	%rax, 84(%rsp)
	xorl	%eax, %eax
	movl	$1, 92(%rsp)
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L48
	movl	$111, %ecx
.L51:
	leaq	.LC1(%rip), %rdx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	%ebx, %edx
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L48:
	movl	80(%rsp), %ecx
	movq	72(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	84(%rsp), %rdi
	movl	92(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movl	176(%rsp), %eax
	movq	%r14, %r9
	movq	%r13, %r8
	movq	%r12, %rdx
	movl	$17746, %ecx
	movq	%rbp, %rsi
	pushq	%rax
	.cfi_def_cfa_offset 168
	pushq	176(%rsp)
	.cfi_def_cfa_offset 176
	pushq	176(%rsp)
	.cfi_def_cfa_offset 184
	pushq	%r15
	.cfi_def_cfa_offset 192
	movsd	80(%rsp), %xmm6
	movsd	72(%rsp), %xmm5
	movsd	64(%rsp), %xmm4
	movq	88(%rsp), %rdi
	movsd	56(%rsp), %xmm3
	movsd	48(%rsp), %xmm2
	movsd	40(%rsp), %xmm1
	movsd	32(%rsp), %xmm0
	call	_Z57__device_stub__Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_iddddPdS_S_dddiS_S_PiS_S0_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 160
.L46:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2241:
	.size	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i, .-_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	.section	.rodata.str1.1
.LC5:
	.string	"[GPU]GPU\346\227\266\351\227\264\345\267\262\350\256\260\345\275\225\n"
.LC6:
	.string	"[GPU]GPU\346\225\260\346\215\256\346\213\267\350\264\235\345\256\214\346\210\220\n"
.LC7:
	.string	"[GPU]\345\274\200\345\247\213\350\277\220\350\241\214\346\240\270\345\207\275\346\225\260[%d]\n"
.LC8:
	.string	"[GPU]\346\240\270\345\207\275\346\225\260\350\277\220\350\241\214\345\256\214\346\210\220\n"
.LC9:
	.string	"total use time %f ms\n"
.LC10:
	.string	"[GPU]GPU\350\277\220\350\241\214\345\256\214\346\210\220\n"
	.text
	.globl	GPU_Sampling_wrapper
	.type	GPU_Sampling_wrapper, @function
GPU_Sampling_wrapper:
.LFB2261:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-69632(%rsp), %r11
	.cfi_def_cfa 11, 69688
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$1592, %rsp
	.cfi_def_cfa_offset 71280
	movq	71280(%rsp), %rax
	movq	71336(%rsp), %rbx
	movq	%rax, 16(%rsp)
	movq	%rdi, %r15
	leaq	96(%rsp), %rdi
	movq	%rsi, %r14
	movq	71288(%rsp), %rax
	movq	%r8, (%rsp)
	movq	%rdx, %r13
	movq	%rcx, %r12
	movq	%r9, 8(%rsp)
	movq	%rax, 24(%rsp)
	movq	71296(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	71304(%rsp), %rax
	movq	%rax, 40(%rsp)
	movq	71312(%rsp), %rax
	movq	%rax, 48(%rsp)
	movq	71320(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	71328(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	71344(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 71208(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	testl	%eax, %eax
	je	.L53
	movl	%eax, %ebp
	movl	$485, %ecx
	jmp	.L106
.L53:
	leaq	104(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L54
	movl	$486, %ecx
.L106:
	leaq	.LC1(%rip), %rdx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %edi
	call	cudaGetErrorString@PLT
	movl	%ebp, %edx
	movq	%rax, %rcx
.L107:
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L54:
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$490, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %eax
	movslq	(%rbx), %rsi
	movl	$17746, %ecx
	leaq	224(%rsp), %rdi
	rep stosl
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$498, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$499, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rsi
	leaq	128(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$500, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rsi
	leaq	136(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$501, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rsi
	leaq	144(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$502, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rsi
	leaq	152(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$503, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rsi
	leaq	160(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$504, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	4(%rbx), %rsi
	leaq	168(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$505, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	4(%rbx), %rsi
	leaq	176(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$506, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	4(%rbx), %rsi
	leaq	184(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$507, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	8(%rbx), %rsi
	leaq	192(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$508, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	12(%rbx), %rsi
	leaq	200(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$509, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	16(%rbx), %rsi
	leaq	216(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$510, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	imull	$887300, (%rbx), %esi
	leaq	208(%rsp), %rdi
	movslq	%esi, %rsi
	call	cudaMalloc@PLT
	movl	$511, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	112(%rsp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	$513, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	120(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	$514, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	128(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	$515, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	136(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	$516, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$517, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$518, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	(%rbx), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$519, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	4(%rbx), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$520, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	4(%rbx), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	176(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$521, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	4(%rbx), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	184(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$522, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	8(%rbx), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	192(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$523, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	12(%rbx), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	200(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$524, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	movslq	16(%rbx), %rdx
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	216(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$525, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	call	__printf_chk@PLT
	xorl	%edi, %edi
	leaq	.LC7(%rip), %r13
	call	cudaSetDevice@PLT
	movl	$529, %ecx
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L83
	jmp	.L109
.L84:
	movq	160(%rsp), %rax
	imulq	$70984, %rbp, %r9
	movsd	(%rax,%rbp,8), %xmm6
	movq	152(%rsp), %rax
	movsd	(%rax,%rbp,8), %xmm5
	movq	144(%rsp), %rax
	movsd	(%rax,%rbp,8), %xmm4
	movq	136(%rsp), %rax
	movsd	(%rax,%rbp,8), %xmm3
	movq	128(%rsp), %rax
	movsd	(%rax,%rbp,8), %xmm2
	movq	120(%rsp), %rax
	movsd	(%rax,%rbp,8), %xmm1
	movq	112(%rsp), %rax
	movsd	(%rax,%rbp,8), %xmm0
	pushq	%rax
	.cfi_def_cfa_offset 71288
	incq	%rbp
	movl	(%rbx), %eax
	cltd
	idivl	%r14d
	pushq	%rax
	.cfi_def_cfa_offset 71296
	leaq	240(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 71304
	pushq	232(%rsp)
	.cfi_def_cfa_offset 71312
	movq	232(%rsp), %r8
	movq	224(%rsp), %rcx
	movq	216(%rsp), %rdx
	movq	208(%rsp), %rsi
	movq	200(%rsp), %rdi
	addq	248(%rsp), %r9
	call	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	addq	$32, %rsp
	.cfi_def_cfa_offset 71280
.L83:
	movl	(%rbx), %eax
	movl	$8, %r14d
	movl	%ebp, %ecx
	cltd
	idivl	%r14d
	cmpl	%ebp, %eax
	jle	.L110
	movl	%ecx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %r12d
	testl	%eax, %eax
	je	.L84
	movl	$541, %ecx
.L109:
	leaq	.LC1(%rip), %rdx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r12d, %edi
	call	cudaGetErrorString@PLT
	movl	%r12d, %edx
	movq	%rax, %rcx
	jmp	.L107
.L110:
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$547, %ecx
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L106
	imull	$887300, (%rbx), %edx
	movq	72(%rsp), %rdi
	movl	$2, %ecx
	movq	208(%rsp), %rsi
	movslq	%edx, %rdx
	call	cudaMemcpy@PLT
	movl	$549, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	104(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	leaq	92(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	96(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	92(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movl	$566, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movl	$567, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movl	$568, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movl	$569, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movl	$570, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movl	$571, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	192(%rsp), %rdi
	call	cudaFree@PLT
	movl	$572, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	200(%rsp), %rdi
	call	cudaFree@PLT
	movl	$573, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
	movl	$574, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movl	$575, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	176(%rsp), %rdi
	call	cudaFree@PLT
	movl	$576, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	184(%rsp), %rdi
	call	cudaFree@PLT
	movl	$577, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	216(%rsp), %rdi
	call	cudaFree@PLT
	movl	$578, %ecx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L108
	movq	208(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L101
	movl	$579, %ecx
.L108:
	leaq	.LC1(%rip), %rdx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %edx
	movq	%rax, %rcx
	jmp	.L107
.L101:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	92(%rsp), %xmm0
	movq	71208(%rsp), %rax
	subq	%fs:40, %rax
	je	.L102
	call	__stack_chk_fail@PLT
.L102:
	addq	$71224, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2261:
	.size	GPU_Sampling_wrapper, .-GPU_Sampling_wrapper
	.section	.rodata.str1.1
.LC11:
	.string	"_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i"
.LC12:
	.string	"precalc_xorwow_matrix"
.LC13:
	.string	"precalc_xorwow_offset_matrix"
.LC14:
	.string	"mrg32k3aM1"
.LC15:
	.string	"mrg32k3aM2"
.LC16:
	.string	"mrg32k3aM1SubSeq"
.LC17:
	.string	"mrg32k3aM2SubSeq"
.LC18:
	.string	"mrg32k3aM1Seq"
.LC19:
	.string	"mrg32k3aM2Seq"
.LC20:
	.string	"__cr_lgamma_table"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2289:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2289:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Author:易培淮
 * Mail:yiph@ihep.ac.cn
 * Function:Accelerate simulation with Single GPU
 * 2018/11/27
 */

#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>
#include <stdio.h>
// #include <math.h>
// #include <math_constants.h>

// typedef struct arr
// {
//     double *pBase;//存储的是数组第一个元素的地址
//     int len;//数组能容纳的最大元素的个数
//     int cnt;//有效数组个数
//             //自动增长因子
// } Arr;

typedef struct res_arr
{
	double *arr;
	int *pmt_list;
	int index;
	int id;
	// int begin;
	// int len;
} Res_Arr;


__device__ double generateRandom(hiprandState *state);
__device__ void generateRandomInit(hiprandState *state,int seed);
__device__ int sampling(hiprandState state,double *histo,int max,int id);
__device__ int binarySearch(double *histo,double target,int max,int id);
__device__ double calculateAngle(double x,double y,double z,double a,double b,double c);
__device__ void generateHits(double r,double theta, double ratio,int pmtid,double start_time,double *hittime,double *npe,hiprandState state,Res_Arr r_arr);
__device__ void save_hits(Res_Arr *p,double val);
__device__ double get_hittime(double r, double theta, int mode, double *hittime, hiprandState state);
__device__ double get_hittime_bin(int binx, int biny, int mode, double *hittime, hiprandState state);
__device__ double get_hittime_all(int binx, int biny,double *hittime, hiprandState state);
__device__ int get_bin_x(double r);
__device__ int get_bin_y(double theta);
__device__ int r_findBin(double r);
__device__ int get_npe(double r,double theta,double *npe,hiprandState state);
__device__ int r3_findBin(double r3);
__device__ int theta_findBin(double theta);
__device__ int get_npe_num(int binx,int biny,double *npe,hiprandState state);
__device__ int generateRandomInt(hiprandState *state,int begin,int end);

__global__ void pmt_calculate(double r,double pos_x,double pos_y,double pos_z,double *pmt_x,double *pmt_y,double *pmt_z,double intPart,double fractionPart,double start_time,int numElements,double *hittime,double *npe,int *seed,double *result,int *pmt_res_list);
__host__ void step_calculate(double r,double pos_x,double pos_y,double pos_z,double intPart,double fractionPart,double start_time,double *pmt_x,double *pmt_y,double *pmt_z,double *hittime,double *npe,int *seed,double *result,int *pmt_list,int size);
// __device__ void init_arr(Arr *pArr, int length);//初始化数组
// __device__ bool append_arr(Arr *pArr, int val);//追加，可能成功，可能失败
// __device__ bool is_full_arr(Arr *pArr);//是否满了
__device__ void append_res_arr(Res_Arr *p, double val);
__device__ void init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size);

// float CDF_Sampling_Wrapping(double *h_pmt,double *h_hit,double *h_result, int *seed,int total_num, int nBytes,int max_n,int max_time);

#define CHECK(call) \
{\
	const hipError_t error = call;\
	if (error != hipSuccess)\
	{\
		printf("Error:%s:%d, ", __FILE__, __LINE__);\
		printf("code:%d, reason: %s\n", error, hipGetErrorString(error));\
		exit(1);\
	}\
}
#define pmt_num 17746


__global__ void
pmt_calculate(double r,double pos_x,double pos_y,double pos_z,double *pmt_x,double *pmt_y,double *pmt_z,double intPart,double fractionPart,double start_time,int numElements,double *hittime,double *npe,int *seed,double *result,int *pmt_res_list,int size){
	int id = blockIdx.x*blockDim.x+threadIdx.x;
	//result[id*50*]
	// double hittime_single;
	//numElements = pmt numbers
	if (id < numElements){
		hiprandState state;
		generateRandomInit(&state, seed[id]);
		Res_Arr pmt_arr;
		init_res_arr(&pmt_arr,result,pmt_res_list,id,size);
		double theta = calculateAngle(pmt_x[id],pmt_y[id],pmt_z[id],pos_x,pos_y,pos_z);
		// for(int j = 0; j < intPart; ++j){
		// 	generateHits(r,theta,1,id,start_time,hittime,npe,state,pmt_arr);
		// 	// save_hit(&pmt_arr,hittime_single);
		// 	// save_hits_simple(hittime_single);
		// }
		generateHits(r,theta,fractionPart,id,start_time,hittime,npe,state,pmt_arr);
		// save_hits_simple(&pmt_arr,hittime_single);
	}
}


__host__ void
step_calculate(double r,double pos_x,double pos_y,double pos_z,double intPart,double fractionPart,double start_time,double *pmt_x,double *pmt_y,double *pmt_z,double *hittime,double *npe,int *seed,double *result,int *pmt_list,int size){
	//设置线程数量
	printf("[GPU]启动核函数\n");
	CHECK(hipDeviceSynchronize());
	int threadPerBlock=1024;
	int blocksPerGrid = ceil(pmt_num/threadPerBlock);
	dim3 block(threadPerBlock);
	//设置块数量
	dim3 grid(blocksPerGrid);//blocksPerGrid
	printf("[GPU]网格，线程(%d,%d)\n",blocksPerGrid,threadPerBlock);
	CHECK(hipDeviceSynchronize());
	pmt_calculate<<<grid, block>>>(r,pos_x,pos_y,pos_z,pmt_x,pmt_y,pmt_z,intPart,fractionPart,start_time,pmt_num,hittime,npe,seed,result,pmt_list,size);
}



__device__ double
calculateAngle(double x,double y,double z,double a,double b,double c)
{
	double result = 0;
	result = acos((a*x+b*y+c*z)/(norm3d(x,y,z)*norm3d(a,b,c)));
	return result;
}

__device__ void 
generateHits(double r,double theta, double ratio,int pmtid,double start_time,double *hittime,double *npe,hiprandState state,Res_Arr r_arr)
{
	int npe_histo_id = get_npe(r,theta,npe,state);
	if (npe_histo_id>0)
	{
		for (int hitj = 0; hitj < npe_histo_id; ++hitj) 
		{
            // skip the photon according to the energy deposit
			if (ratio<1 and generateRandom(&state)>ratio) 
			{
                continue;
            }
            double hittime_single = start_time;
            // (m_flag_time) 
        	hittime_single += get_hittime(r, theta, 0, hittime, state);
            // generated hit
			// (m_flag_savehits) 
			append_res_arr(&r_arr,hittime_single);
            // save_hits(pmtid, hittime_single,result);
        }
	}
}

// __device__ void 
// save_hits(Res_Arr *p,double val){
// 	append_res_arr(p,val);
// }

__device__ double///////////////
get_hittime(double r, double theta, int mode, double *hittime, hiprandState state) {
	int binx = get_bin_x(r);
	int biny = get_bin_y(theta);
	return get_hittime_bin(binx, biny, mode, hittime, state);
}

__device__ double 
get_hittime_bin(int binx, int biny, int mode, double *hittime, hiprandState state) {
	// hit time = tmean + tres
	double hittime_single = 0.0;
	if (mode == 0) {
		hittime_single = get_hittime_all(binx,biny,hittime,state);
	}
	return hittime_single;
}

__device__ double 
get_hittime_all(int binx, int biny,double *hittime, hiprandState state) {
	// TH1F* h = get_hist(binx, biny);
	int xbinnum = 200;
	int ybinnum = 180;
	if (binx<1) { binx = 1; }
    else if (binx > xbinnum) { binx = xbinnum;}
    if (biny<1) { biny = 1; }
    else if (biny > ybinnum) { biny = ybinnum;}

    int idx = (binx-1)*ybinnum+(biny-1);
	double hittime_single = sampling(state,hittime,3000,idx);
	return hittime_single;
}


__device__ int 
get_bin_x(double r) 
{
	int binx = 1;
	int xmode = 2;
	if (xmode == 2) //KR
	{
		binx = r_findBin(r);
	} 
	return binx;
}

__device__ int 
get_bin_y(double theta) {
	int biny = 1;
	int ymode = 4;
	if (ymode == 4) {
		biny = theta_findBin(theta);
	}
	return biny;
}

__device__ int 
r_findBin(double r)
{
	const int binnum = 200;
	const double begin = 0;
	const double end = 17.7;
	return (int)floor(r/(end-begin)*binnum);
}

__device__ int 
get_npe(double r,double theta,double *npe,hiprandState state)
{
	int binx = r3_findBin(pow(r,3));
	int biny = theta_findBin(theta);
	return get_npe_num(binx,biny,npe,state);
}

__device__ int 
r3_findBin(double r3)
{
	const int binnum = 100;
	const double begin = 0;
	const double end = 5600;
	return (int)floor(r3/(end-begin)*binnum);
}


__device__ int 
theta_findBin(double theta)
{
	const int binnum = 180;
	const double begin = 0;
	const double end = 180.01*acos(1.0)/180.0;
	return (int)floor(theta/(end-begin)*binnum);
}

__device__ int 
get_npe_num(int binx,int biny,double *npe,hiprandState state)
{
	int npe_from_single = 0;
	if (1 <= binx and binx <= 100 and 1 <= biny and biny <= 180) {
		npe_from_single = sampling(state,npe,50,(binx-1)*180+(biny-1));	
	} else if (binx==1 and (biny<1 or biny>180)) {
		biny = generateRandomInt(&state,1,180);
		npe_from_single = sampling(state,npe,50,(binx-1)*180+(biny-1));	
	} else if (binx>1 and (biny<1 or biny>180)) {
		if (biny>180) { biny = 180; }
		else if (biny<1){ biny = 1; }
		npe_from_single = sampling(state,npe,50,(binx-1)*180+(biny-1));
	} else {
		static long warning = 0;
		++warning;
		if (warning < 10) {
			printf("npe lost: %d/%d", binx,biny);
		} else if (warning == 10) {
			printf("too many npe lost complains.");
		}
	}
	return npe_from_single;
}

__device__ double
generateRandom(hiprandState *state)
{
    double result = abs(hiprand_uniform_double(state));
    return result;
}

__device__ int
generateRandomInt(hiprandState *state,int begin,int end)
{
    int result = begin+int(ceil(abs(hiprand_uniform_double(state))*(end-begin)));
    return result;
}

__device__ void
generateRandomInit(hiprandState *state,int seed)
{
    hiprand_init(seed, 0, 0, state);
}

__device__ int 
sampling(hiprandState state,double *histo,int max,int id)
{
    double prob; 
	prob = generateRandom(&state);
	return binarySearch(histo,prob,max,id);
}

__device__ int
binarySearch(double *histo,double target,int max,int id)
{
	int start = 0;
	int end = max-1;
	int mid;

	while(start+1<end){
		mid = start+(end-start)/2;
		if (histo[id*max+mid]==target){
			end = mid;
		} 
		else if (histo[id*max+mid] < target){
			start = mid;
		}
		else if (histo[id*max+mid] > target){
			end = mid;
		}
	}
	if (histo[id*max+start] == target){
		return start;
	}
	if (histo[id*max+end] == target){
		return end;
	}
	return -1;
}

// __device__ bool 
// is_full_arr(Arr *pArr)//是否满了
// {
//     if (pArr->cnt == pArr->len) {
//         return true;
//     }
//     else{
//         return false;
//     }
// }

// __device__ bool 
// append_arr(Arr *pArr, int val)//追加，可能成功，可能失败
// {
//     //满时返回false
//     if (is_full_arr(pArr))
//         return false;
//     //不满时追加
//     pArr->pBase[pArr->cnt] = val;
//     (pArr->cnt)++;
//     return true;
// }

__device__ void
append_res_arr(Res_Arr *p, double val)//追加，可能成功，可能失败
{
	p->arr[p->index+p->pmt_list[p->id]] = val;
	p->pmt_list[p->id] += 1;
	return;
	//满时返回false
	// int flag = 0;
	// for(int i = 0 ; i < p->num;i++){
	// 	if(!is_full_arr(&(p->arr[i]))){
	// 		flag = 1;
	// 		append_arr(&(p->arr[i]),val);
	// 	}
	// }
	// if (flag == 0){
	// 	init_arr(&(p->arr[p->num]),100);
	// 	p->num +=1;
	// }
}

// __device__ void 
// init_arr(Arr *pArr, int length) {
//     //分配初始化数组
//     pArr->pBase = (double*)malloc(sizeof(double)*length);
//     if (NULL == pArr->pBase)
//     {
//         printf("free error 动态内存分配失败！\n");
//         exit(-1);//终止整个程序
//     }
//     else
//     {
//         pArr->len = length;
//         pArr->cnt = 0;
//     }
//     return;
// }

__device__ void
init_res_arr(Res_Arr *p,double *result,int *pmt_res_list,int pmtid,int size){
	p->arr = result;
	p->pmt_list = pmt_res_list;
	p->index = pmtid*size*50;//存储该pmt在数组中的起始存取点
	p->id = pmtid;
	// p->begin = begin;
	// p->len = len;
	return;
}

/*
extern "C" 
{
    float CDF_Sampling_wrapper(double *h_pmt,double *h_hit,double *h_result, int *seed, int total_num, int nBytes,int max_n,int max_time)
    {
		//GPU计时，设置开始和结束事件
		cudaEvent_t start, stop, gpu_start,gpu_stop;
		cudaEventCreate(&start);
		cudaEventCreate(&stop);
		cudaEventCreate(&gpu_start);
		cudaEventCreate(&gpu_stop);
		cudaEventRecord(start);
        //申请GPU内存
		double *d_pmt, *d_hit,*d_result;
		int *d_seed;
	    CHECK(cudaMalloc((double**)&d_pmt,nBytes));
	    CHECK(cudaMalloc((double**)&d_hit, nBytes));
		CHECK(cudaMalloc((double**)&d_result, nBytes));
		CHECK(cudaMalloc((int**)&d_seed,nBytes/2));
        //将CPU内存拷贝到GPU
	    CHECK(cudaMemcpy(d_pmt, h_pmt, nBytes, cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_hit, h_hit, nBytes, cudaMemcpyHostToDevice));
		CHECK(cudaMemcpy(d_seed,seed,nBytes/2,cudaMemcpyHostToDevice));
        //设置使用编号为0的GPU
	    CHECK(cudaSetDevice(0));
		//设置线程数量
		int threadPerBlock,blocksPerGrid;
		if (total_num<128)
		{
			threadPerBlock = 128;
			blocksPerGrid =1;
		}
		else if(total_num<1024)
		{
			threadPerBlock = 128;
			blocksPerGrid =int(ceil(total_num/(double)threadPerBlock));
		}
		else
		{
			threadPerBlock = 1024;
			blocksPerGrid =int(ceil(total_num/(double)threadPerBlock));
		}
		
	    dim3 block(threadPerBlock);
	    //设置块数量
		dim3 grid(blocksPerGrid);//blocksPerGrid
		
		cudaEventRecord(gpu_start);
        //调用核函数
		CDF_Sampling <<<grid, block >>>(d_pmt, d_hit, d_result, d_seed,total_num,max_n,max_time);
		
		cudaEventRecord(gpu_stop);
		cudaEventSynchronize(gpu_stop);//同步，强制CPU等待GPU event被设定

        CHECK(cudaDeviceSynchronize());
		CHECK(cudaMemcpy(h_result, d_result, nBytes, cudaMemcpyDeviceToHost));
		cudaEventRecord(stop);
		cudaEventSynchronize(stop);
		float time,total_time;
		//计算用时，精度0.5us
		cudaEventElapsedTime(&total_time, start, stop);
		cudaEventDestroy(start);
		cudaEventDestroy(stop);

		printf("threadPerBlock:%d\n",threadPerBlock);
		printf("blocksPerGrid；%d\n",blocksPerGrid);
		printf("total use time %f ms\n", total_time);
		cudaEventElapsedTime(&time, gpu_start, gpu_stop);
		cudaEventDestroy(gpu_start);
		cudaEventDestroy(gpu_stop);
		printf("gpu use time %f ms\n", time);
		printf("占用内存：%d B\n", nBytes);
		printf("占用内存：%d kB\n", nBytes / 1024);
        //释放GPU内存
	    CHECK(cudaFree(d_pmt));
	    CHECK(cudaFree(d_hit));
		CHECK(cudaFree(d_result));
		return total_time;
    }
}
*/
extern "C"
{
	float GPU_Sampling_wrapper(double *r,double *pos_x,double *pos_y,double *pos_z, double *intPart, double *fractionPart,double *start_time,double *pmt_x,double *pmt_y,double *pmt_z,double *data_hit,double *data_npe,int *seed,int *size,double* h_result)
    {
		//GPU计时，设置开始和结束事件
		hipEvent_t start, stop;
		// cudaEvent_t gpu_start,gpu_stop;
		CHECK(hipEventCreate(&start));
		CHECK(hipEventCreate(&stop));
		// cudaEventCreate(&gpu_start);
		// cudaEventCreate(&gpu_stop);
		hipEventRecord(start);
		CHECK(hipDeviceSynchronize());
		printf("[GPU]GPU时间已记录\n");
        //申请GPU内存
		double *d_r, *d_pos_x,*d_pos_y,*d_pos_z,*d_intPart,*d_fractionPart,*d_start_time;
		double *d_pmt_x,*d_pmt_y,*d_pmt_z,*d_data_hit,*d_data_npe;
		double *d_result;
		int *d_seed;
		int pmt_res_list[pmt_num] = {0};
		CHECK(hipMalloc((double**)&d_r,size[0]));
		CHECK(hipMalloc((double**)&d_pos_x,size[0]));
		CHECK(hipMalloc((double**)&d_pos_y,size[0]));
		CHECK(hipMalloc((double**)&d_pos_z,size[0]));
		CHECK(hipMalloc((double**)&d_intPart,size[0]));
		CHECK(hipMalloc((double**)&d_fractionPart,size[0]));
		CHECK(hipMalloc((double**)&d_start_time,size[0]));
		CHECK(hipMalloc((double**)&d_pmt_x,size[1]));
		CHECK(hipMalloc((double**)&d_pmt_y,size[1]));
		CHECK(hipMalloc((double**)&d_pmt_z,size[1]));
		CHECK(hipMalloc((double**)&d_data_hit,size[2]));
		CHECK(hipMalloc((double**)&d_data_npe,size[3]));
		CHECK(hipMalloc((int**)&d_seed,size[4]));
		CHECK(hipMalloc((double**)&d_result,pmt_num*size[0]*50));
        //将CPU内存拷贝到GPU
	    CHECK(hipMemcpy(d_r, r, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_pos_x, pos_x, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_pos_y, pos_y, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_pos_z, pos_z, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_intPart, intPart, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_fractionPart, fractionPart, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_start_time, start_time, size[0], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_pmt_x, pmt_x, size[1], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_pmt_y, pmt_y, size[1], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_pmt_z, pmt_z, size[1], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_data_hit, data_hit, size[2], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_data_npe, data_npe, size[3], hipMemcpyHostToDevice));
		CHECK(hipMemcpy(d_seed, seed, size[4], hipMemcpyHostToDevice));
		
		printf("[GPU]GPU数据拷贝完成\n");
        //设置使用编号为0的GPU
	    CHECK(hipSetDevice(0));
		// //设置线程数量
		// int threadPerBlock = 1024;
		// int blocksPerGrid =ceil(17746/1024);
		
	    // dim3 block(threadPerBlock);
	    // //设置块数量
		// dim3 grid(blocksPerGrid);//blocksPerGrid

		//调用核函数
		for(int i = 0;i<size[0]/8;i++) {
			printf("[GPU]开始运行核函数[%d]\n",i);
			CHECK(hipDeviceSynchronize());
			step_calculate(d_r[i],d_pos_x[i],d_pos_y[i],d_pos_z[i],d_intPart[i],d_fractionPart[i],d_start_time[i],d_pmt_x,d_pmt_y,d_pmt_z,d_data_hit,d_data_npe,(int*)(d_seed+i*pmt_num),d_result,pmt_res_list,size[0]/8);
		}
		
		
		printf("[GPU]核函数运行完成\n");
		CHECK(hipDeviceSynchronize());

		CHECK(hipMemcpy(h_result, d_result, pmt_num*size[0]*50, hipMemcpyDeviceToHost));
		hipEventRecord(stop);
		hipEventSynchronize(stop);
		float total_time;
		//计算用时，精度0.5us
		hipEventElapsedTime(&total_time, start, stop);
		hipEventDestroy(start);
		hipEventDestroy(stop);
		printf("total use time %f ms\n", total_time);
		// printf("threadPerBlock:%d\n",threadPerBlock);
		// printf("blocksPerGrid；%d\n",blocksPerGrid);
		
		// cudaEventElapsedTime(&time, gpu_start, gpu_stop);
		// cudaEventDestroy(gpu_start);
		// cudaEventDestroy(gpu_stop);

        //释放GPU内存
	    CHECK(hipFree(d_r));
		CHECK(hipFree(d_pos_x));
		CHECK(hipFree(d_pos_y));
		CHECK(hipFree(d_pos_z));
		CHECK(hipFree(d_intPart));
		CHECK(hipFree(d_fractionPart));
		CHECK(hipFree(d_data_hit));
		CHECK(hipFree(d_data_npe));
		CHECK(hipFree(d_start_time));
		CHECK(hipFree(d_pmt_x));
		CHECK(hipFree(d_pmt_y));
		CHECK(hipFree(d_pmt_z));
		CHECK(hipFree(d_seed));
		CHECK(hipFree(d_result));
		printf("[GPU]GPU运行完成\n");
		return total_time;
		// return 0.0;
    }
}
	.text
	.file	"simu_so_v2.hip"
	.globl	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i # -- Begin function _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.type	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@function
_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i: # @_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	120(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	112(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	104(%rsp), %r11
	movsd	%xmm2, (%r11)
	leaq	96(%rsp), %r14
	movsd	%xmm3, (%r14)
	leaq	88(%rsp), %r15
	movq	%rdi, (%r15)
	leaq	80(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	72(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	64(%rsp), %rdx
	movsd	%xmm4, (%rdx)
	leaq	56(%rsp), %r12
	movsd	%xmm5, (%r12)
	leaq	48(%rsp), %r13
	movsd	%xmm6, (%r13)
	leaq	12(%rsp), %rbp
	movl	%ecx, (%rbp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	160(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%r10, 8(%rbx)
	movq	%r11, 16(%rbx)
	movq	%r14, 24(%rbx)
	movq	%r15, 32(%rbx)
	movq	%rdi, 40(%rbx)
	movq	%rsi, 48(%rbx)
	movq	%rdx, 56(%rbx)
	movq	%r12, 64(%rbx)
	movq	%r13, 72(%rbx)
	movq	%rbp, 80(%rbx)
	movq	%rcx, 88(%rbx)
	movq	%r8, 96(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 120(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 128(%rbx)
	leaq	144(%rsp), %r14
	leaq	128(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$312, %rsp                      # imm = 0x138
	.cfi_adjust_cfa_offset -312
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, .Lfunc_end0-_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i # -- Begin function _Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	.type	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i,@function
_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i: # @_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 64(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movsd	%xmm6, 56(%rsp)                 # 8-byte Spill
	movsd	%xmm5, 48(%rsp)                 # 8-byte Spill
	movsd	%xmm4, 40(%rsp)                 # 8-byte Spill
	movsd	%xmm3, 32(%rsp)                 # 8-byte Spill
	movsd	%xmm2, 24(%rsp)                 # 8-byte Spill
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$.Lstr, %edi
	callq	puts@PLT
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:
	movl	$.L.str.4, %edi
	movl	$17, %esi
	movl	$1024, %edx                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:
	movabsq	$4294967313, %rdi               # imm = 0x100000011
	leaq	1007(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB1_6
# %bb.7:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	jmp	.LBB1_8
.LBB1_6:
	.cfi_def_cfa_offset 128
	movl	144(%rsp), %eax
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	24(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	movsd	32(%rsp), %xmm3                 # 8-byte Reload
                                        # xmm3 = mem[0],zero
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movsd	40(%rsp), %xmm4                 # 8-byte Reload
                                        # xmm4 = mem[0],zero
	movsd	48(%rsp), %xmm5                 # 8-byte Reload
                                        # xmm5 = mem[0],zero
	movsd	56(%rsp), %xmm6                 # 8-byte Reload
                                        # xmm6 = mem[0],zero
	movl	$17746, %ecx                    # imm = 0x4552
	movq	%r15, %r8
	movq	%r14, %r9
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	88(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	addq	$104, %rsp
	.cfi_adjust_cfa_offset -104
.LBB1_8:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 128
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$104, %edx
	jmp	.LBB1_2
.LBB1_4:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$111, %edx
.LBB1_2:
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i, .Lfunc_end1-_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	GPU_Sampling_wrapper            # -- Begin function GPU_Sampling_wrapper
	.type	GPU_Sampling_wrapper,@function
GPU_Sampling_wrapper:                   # @GPU_Sampling_wrapper
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$71144, %rsp                    # imm = 0x115E8
	.cfi_def_cfa_offset 71200
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r15
	movq	%r8, %r12
	movq	%rcx, 152(%rsp)                 # 8-byte Spill
	movq	%rdx, %r13
	movq	%rsi, %rbp
	movq	%rdi, %r14
	leaq	120(%rsp), %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.4:
	movq	%rsp, %rdi
	callq	hipEventCreate
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.6:
	movq	%r12, 144(%rsp)                 # 8-byte Spill
	movq	%r15, 136(%rsp)                 # 8-byte Spill
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.8:
	movq	71256(%rsp), %r12
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	160(%rsp), %rbx
	movl	$70984, %edx                    # imm = 0x11548
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movslq	(%r12), %rsi
	leaq	112(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_9
# %bb.11:
	movslq	(%r12), %rsi
	leaq	104(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.13:
	movslq	(%r12), %rsi
	leaq	96(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.15:
	movslq	(%r12), %rsi
	leaq	88(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.17:
	movslq	(%r12), %rsi
	leaq	80(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.19:
	movslq	(%r12), %rsi
	leaq	72(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.21:
	movslq	(%r12), %rsi
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.23:
	movslq	4(%r12), %rsi
	leaq	56(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.25:
	movslq	4(%r12), %rsi
	leaq	48(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.27:
	movslq	4(%r12), %rsi
	leaq	40(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_28
# %bb.29:
	movslq	8(%r12), %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.31:
	movslq	12(%r12), %rsi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_32
# %bb.33:
	movslq	16(%r12), %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_34
# %bb.35:
	imull	$887300, (%r12), %eax           # imm = 0xD8A04
	movslq	%eax, %rsi
	leaq	16(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_36
# %bb.37:
	movq	112(%rsp), %rdi
	movslq	(%r12), %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_38
# %bb.39:
	movq	104(%rsp), %rdi
	movslq	(%r12), %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_40
# %bb.42:
	movq	96(%rsp), %rdi
	movslq	(%r12), %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_43
# %bb.44:
	movq	88(%rsp), %rdi
	movslq	(%r12), %rdx
	movq	152(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_45
# %bb.46:
	movq	80(%rsp), %rdi
	movslq	(%r12), %rdx
	movq	144(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_47
# %bb.48:
	movq	72(%rsp), %rdi
	movslq	(%r12), %rdx
	movq	136(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_49
# %bb.50:
	movq	71200(%rsp), %rsi
	movq	64(%rsp), %rdi
	movslq	(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_51
# %bb.52:
	movq	71208(%rsp), %rsi
	movq	56(%rsp), %rdi
	movslq	4(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_53
# %bb.54:
	movq	71216(%rsp), %rsi
	movq	48(%rsp), %rdi
	movslq	4(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_55
# %bb.56:
	movq	71224(%rsp), %rsi
	movq	40(%rsp), %rdi
	movslq	4(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_57
# %bb.58:
	movq	71232(%rsp), %rsi
	movq	32(%rsp), %rdi
	movslq	8(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_59
# %bb.60:
	movq	71240(%rsp), %rsi
	movq	24(%rsp), %rdi
	movslq	12(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_61
# %bb.62:
	movq	71248(%rsp), %rsi
	movq	8(%rsp), %rdi
	movslq	16(%r12), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_63
# %bb.64:
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB2_69
# %bb.65:                               # %.preheader
	cmpl	$8, (%r12)
	jl	.LBB2_71
# %bb.66:                               # %.lr.ph.preheader
	xorl	%r15d, %r15d
	xorl	%r14d, %r14d
.LBB2_67:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_68
# %bb.70:                               #   in Loop: Header=BB2_67 Depth=1
	movq	112(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm0            # xmm0 = mem[0],zero
	movq	104(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm1            # xmm1 = mem[0],zero
	movq	96(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm2            # xmm2 = mem[0],zero
	movq	88(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm3            # xmm3 = mem[0],zero
	movq	80(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm4            # xmm4 = mem[0],zero
	movq	72(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm5            # xmm5 = mem[0],zero
	movq	64(%rsp), %rax
	movsd	(%rax,%r14,8), %xmm6            # xmm6 = mem[0],zero
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rcx
	movq	24(%rsp), %r8
	movq	8(%rsp), %r9
	addq	%r15, %r9
	movl	(%r12), %eax
	leal	7(%rax), %r10d
	testl	%eax, %eax
	cmovnsl	%eax, %r10d
	sarl	$3, %r10d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	40(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z14step_calculatedddddddPdS_S_S_S_PiS_S0_i
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	incq	%r14
	movl	(%r12), %eax
	leal	7(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$3, %ecx
	movslq	%ecx, %rax
	addq	$70984, %r15                    # imm = 0x11548
	cmpq	%rax, %r14
	jl	.LBB2_67
.LBB2_71:                               # %._crit_edge
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_72
# %bb.73:
	movq	71264(%rsp), %rdi
	movq	16(%rsp), %rsi
	imull	$887300, (%r12), %eax           # imm = 0xD8A04
	movslq	%eax, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_74
# %bb.75:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	120(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	132(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	120(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	112(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_76
# %bb.77:
	movq	104(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_78
# %bb.79:
	movq	96(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_80
# %bb.81:
	movq	88(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_82
# %bb.83:
	movq	80(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_84
# %bb.85:
	movq	72(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_86
# %bb.87:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_88
# %bb.89:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_90
# %bb.91:
	movq	64(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_92
# %bb.93:
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_94
# %bb.95:
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_96
# %bb.97:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_98
# %bb.99:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_100
# %bb.101:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_102
# %bb.103:
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movss	132(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	addq	$71144, %rsp                    # imm = 0x115E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_68:
	.cfi_def_cfa_offset 71200
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$541, %edx                      # imm = 0x21D
.LBB2_41:
	xorl	%eax, %eax
	callq	printf
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movl	%ebp, %esi
	jmp	.LBB2_3
.LBB2_1:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$485, %edx                      # imm = 0x1E5
	jmp	.LBB2_2
.LBB2_5:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$486, %edx                      # imm = 0x1E6
	jmp	.LBB2_2
.LBB2_7:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$490, %edx                      # imm = 0x1EA
	jmp	.LBB2_2
.LBB2_9:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$498, %edx                      # imm = 0x1F2
	jmp	.LBB2_10
.LBB2_12:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$499, %edx                      # imm = 0x1F3
	jmp	.LBB2_10
.LBB2_14:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$500, %edx                      # imm = 0x1F4
	jmp	.LBB2_10
.LBB2_16:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$501, %edx                      # imm = 0x1F5
	jmp	.LBB2_10
.LBB2_18:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$502, %edx                      # imm = 0x1F6
	jmp	.LBB2_10
.LBB2_20:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$503, %edx                      # imm = 0x1F7
	jmp	.LBB2_10
.LBB2_22:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$504, %edx                      # imm = 0x1F8
	jmp	.LBB2_10
.LBB2_24:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$505, %edx                      # imm = 0x1F9
	jmp	.LBB2_10
.LBB2_26:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$506, %edx                      # imm = 0x1FA
	jmp	.LBB2_10
.LBB2_28:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$507, %edx                      # imm = 0x1FB
	jmp	.LBB2_10
.LBB2_30:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$508, %edx                      # imm = 0x1FC
	jmp	.LBB2_10
.LBB2_32:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$509, %edx                      # imm = 0x1FD
	jmp	.LBB2_10
.LBB2_34:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$510, %edx                      # imm = 0x1FE
	jmp	.LBB2_10
.LBB2_36:
	movl	%eax, %r15d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$511, %edx                      # imm = 0x1FF
.LBB2_10:
	xorl	%eax, %eax
	callq	printf
	movl	%r15d, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movl	%r15d, %esi
	jmp	.LBB2_3
.LBB2_38:
	movl	%eax, %r14d
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$513, %edx                      # imm = 0x201
	xorl	%eax, %eax
	callq	printf
	movl	%r14d, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movl	%r14d, %esi
	jmp	.LBB2_3
.LBB2_40:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$514, %edx                      # imm = 0x202
	jmp	.LBB2_41
.LBB2_43:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$515, %edx                      # imm = 0x203
	jmp	.LBB2_41
.LBB2_45:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$516, %edx                      # imm = 0x204
	jmp	.LBB2_41
.LBB2_47:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$517, %edx                      # imm = 0x205
	jmp	.LBB2_41
.LBB2_49:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$518, %edx                      # imm = 0x206
	jmp	.LBB2_41
.LBB2_51:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$519, %edx                      # imm = 0x207
	jmp	.LBB2_41
.LBB2_53:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$520, %edx                      # imm = 0x208
	jmp	.LBB2_41
.LBB2_55:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$521, %edx                      # imm = 0x209
	jmp	.LBB2_41
.LBB2_57:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$522, %edx                      # imm = 0x20A
	jmp	.LBB2_41
.LBB2_59:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$523, %edx                      # imm = 0x20B
	jmp	.LBB2_41
.LBB2_61:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$524, %edx                      # imm = 0x20C
	jmp	.LBB2_41
.LBB2_63:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$525, %edx                      # imm = 0x20D
	jmp	.LBB2_41
.LBB2_69:
	movl	%eax, %ebp
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$529, %edx                      # imm = 0x211
	jmp	.LBB2_41
.LBB2_72:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$547, %edx                      # imm = 0x223
	jmp	.LBB2_2
.LBB2_74:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$549, %edx                      # imm = 0x225
	jmp	.LBB2_2
.LBB2_76:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$566, %edx                      # imm = 0x236
	jmp	.LBB2_2
.LBB2_78:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$567, %edx                      # imm = 0x237
	jmp	.LBB2_2
.LBB2_80:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$568, %edx                      # imm = 0x238
	jmp	.LBB2_2
.LBB2_82:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$569, %edx                      # imm = 0x239
	jmp	.LBB2_2
.LBB2_84:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$570, %edx                      # imm = 0x23A
	jmp	.LBB2_2
.LBB2_86:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$571, %edx                      # imm = 0x23B
	jmp	.LBB2_2
.LBB2_88:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$572, %edx                      # imm = 0x23C
	jmp	.LBB2_2
.LBB2_90:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$573, %edx                      # imm = 0x23D
	jmp	.LBB2_2
.LBB2_92:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$574, %edx                      # imm = 0x23E
	jmp	.LBB2_2
.LBB2_94:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$575, %edx                      # imm = 0x23F
	jmp	.LBB2_2
.LBB2_96:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$576, %edx                      # imm = 0x240
	jmp	.LBB2_2
.LBB2_98:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$577, %edx                      # imm = 0x241
	jmp	.LBB2_2
.LBB2_100:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$578, %edx                      # imm = 0x242
	jmp	.LBB2_2
.LBB2_102:
	movl	%eax, %ebx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	movl	$579, %edx                      # imm = 0x243
.LBB2_2:
	xorl	%eax, %eax
	callq	printf
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
.LBB2_3:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	GPU_Sampling_wrapper, .Lfunc_end2-GPU_Sampling_wrapper
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@object # @_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.section	.rodata,"a",@progbits
	.globl	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.p2align	3, 0x0
_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i:
	.quad	_Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.size	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Error:%s:%d, "
	.size	.L.str.1, 14

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/advancc/gpulearn/master/MuonFastVoxel/simu_so_v2.hip"
	.size	.L.str.2, 115

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"code:%d, reason: %s\n"
	.size	.L.str.3, 21

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"[GPU]\347\275\221\346\240\274\357\274\214\347\272\277\347\250\213(%d,%d)\n"
	.size	.L.str.4, 29

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"[GPU]\345\274\200\345\247\213\350\277\220\350\241\214\346\240\270\345\207\275\346\225\260[%d]\n"
	.size	.L.str.7, 32

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"total use time %f ms\n"
	.size	.L.str.9, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i"
	.size	.L__unnamed_1, 44

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"[GPU]\345\220\257\345\212\250\346\240\270\345\207\275\346\225\260"
	.size	.Lstr, 21

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"[GPU]GPU\346\227\266\351\227\264\345\267\262\350\256\260\345\275\225"
	.size	.Lstr.1, 24

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"[GPU]GPU\346\225\260\346\215\256\346\213\267\350\264\235\345\256\214\346\210\220"
	.size	.Lstr.2, 27

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"[GPU]\346\240\270\345\207\275\346\225\260\350\277\220\350\241\214\345\256\214\346\210\220"
	.size	.Lstr.3, 27

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"[GPU]GPU\350\277\220\350\241\214\345\256\214\346\210\220"
	.size	.Lstr.4, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	v_or_b32_e32 v2, 2, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v2, v0, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[7:8]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v11, 2 :: v_dual_and_b32 v6, 2, v10
	v_mov_b32_e32 v30, 0
	v_and_b32_e32 v0, -3, v10
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v12, 1
	s_mov_b32 s12, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_13 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
                                        ;     Child Loop BB0_29 Depth 2
                                        ;     Child Loop BB0_37 Depth 2
                                        ;     Child Loop BB0_45 Depth 2
                                        ;     Child Loop BB0_53 Depth 2
                                        ;     Child Loop BB0_61 Depth 2
                                        ;     Child Loop BB0_69 Depth 2
                                        ;     Child Loop BB0_75 Depth 2
                                        ;     Child Loop BB0_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v32, 0, v5 :: v_dual_cndmask_b32 v31, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v31
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v31
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[9:10], 3, v[31:32]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, v8
	v_mov_b32_e32 v13, v7
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB0_5:                                ; %.preheader31
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v10, v[13:14]
	v_mov_b32_e32 v16, s11
	v_add_co_u32 v13, vcc_lo, v13, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v15, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], s4, v[15:16]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v9
	v_or_b32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v15, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow232
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_7:                                ; %Flow234
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB0_8:                                ; %Flow236
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v7
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[7:8]
	flat_load_u8 v3, v[7:8] offset:1
	flat_load_u8 v9, v[7:8] offset:2
	flat_load_u8 v10, v[7:8] offset:3
	flat_load_u8 v13, v[7:8] offset:5
	flat_load_u8 v14, v[7:8] offset:4
	v_mov_b32_e32 v16, v30
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v2, 0xffff, v2
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 8, v3
	s_clause 0x1
	flat_load_u8 v15, v[7:8] offset:7
	flat_load_d16_hi_u8 v16, v[7:8] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v10, 24, v10
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v9, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v15
	v_add_nc_u32_e32 v15, -8, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v16, v9
	v_add_co_u32 v9, vcc_lo, v7, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
.LBB0_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v15
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v15
	s_cbranch_execz .LBB0_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_13:                               ; %.preheader29
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v16, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v15
	flat_load_u8 v16, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, s11 :: v_dual_and_b32 v16, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s0, v[16:17]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v16, v13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_13
; %bb.14:                               ; %Flow227
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_15:                               ; %Flow229
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr15
.LBB0_16:                               ; %Flow231
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v17, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v13, v[9:10]
	flat_load_u8 v14, v[9:10] offset:1
	flat_load_u8 v16, v[9:10] offset:2
	flat_load_u8 v17, v[9:10] offset:3
	flat_load_u8 v18, v[9:10] offset:5
	flat_load_u8 v19, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v20, v30 :: v_dual_and_b32 v13, 0xffff, v13
	s_clause 0x1
	flat_load_u8 v21, v[9:10] offset:7
	flat_load_d16_hi_u8 v20, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v14, 8, v14
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v16, 16, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 24, v17
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v13, v14, v13
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v14, 8, v18
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v13, v13, v16, v17
	s_waitcnt vmcnt(2)
	v_or3_b32 v14, 0, v19, v14
	v_add_nc_u32_e32 v17, -8, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v13, v13, 0, 0
	v_or3_b32 v13, v13, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v16, 24, v21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v14, v14, v20, v16
.LBB0_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v17
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.19:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v17
	s_cbranch_execz .LBB0_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_21:                               ; %.preheader27
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v17
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s11 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v18, v15
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_21
; %bb.22:                               ; %Flow222
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_23:                               ; %Flow224
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr17
.LBB0_24:                               ; %Flow226
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v19, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v15, v[9:10]
	flat_load_u8 v16, v[9:10] offset:1
	flat_load_u8 v18, v[9:10] offset:2
	flat_load_u8 v19, v[9:10] offset:3
	flat_load_u8 v20, v[9:10] offset:5
	flat_load_u8 v21, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v22, v30 :: v_dual_and_b32 v15, 0xffff, v15
	s_clause 0x1
	flat_load_u8 v23, v[9:10] offset:7
	flat_load_d16_hi_u8 v22, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v16, 8, v16
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v15, v16, v15
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v16, 8, v20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v15, v15, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v16, 0, v21, v16
	v_add_nc_u32_e32 v19, -8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v15, v15, 0, 0
	v_or3_b32 v15, v15, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v16, v16, v22, v18
.LBB0_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v19
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_32
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v19
	s_cbranch_execz .LBB0_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_29:                               ; %.preheader25
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v19
	flat_load_u8 v20, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v21, s11 :: v_dual_and_b32 v20, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s0, v[20:21]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v20, v17
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_29
; %bb.30:                               ; %Flow217
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_31:                               ; %Flow219
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr19
.LBB0_32:                               ; %Flow221
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v21, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v17, v[9:10]
	flat_load_u8 v18, v[9:10] offset:1
	flat_load_u8 v20, v[9:10] offset:2
	flat_load_u8 v21, v[9:10] offset:3
	flat_load_u8 v22, v[9:10] offset:5
	flat_load_u8 v23, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v30 :: v_dual_and_b32 v17, 0xffff, v17
	s_clause 0x1
	flat_load_u8 v25, v[9:10] offset:7
	flat_load_d16_hi_u8 v24, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v20, 16, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v17, v18, v17
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v17, v17, v20, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	v_add_nc_u32_e32 v21, -8, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v17, v17, 0, 0
	v_or3_b32 v17, v17, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v20, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v18, v18, v24, v20
.LBB0_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v21
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_40
; %bb.35:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v21
	s_cbranch_execz .LBB0_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_37:                               ; %.preheader23
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v21
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s11 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v22, v19
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_37
; %bb.38:                               ; %Flow212
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_39:                               ; %Flow214
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr21
.LBB0_40:                               ; %Flow216
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v23, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v19, v[9:10]
	flat_load_u8 v20, v[9:10] offset:1
	flat_load_u8 v22, v[9:10] offset:2
	flat_load_u8 v23, v[9:10] offset:3
	flat_load_u8 v24, v[9:10] offset:5
	flat_load_u8 v25, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v26, v30 :: v_dual_and_b32 v19, 0xffff, v19
	s_clause 0x1
	flat_load_u8 v27, v[9:10] offset:7
	flat_load_d16_hi_u8 v26, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v20, 8, v20
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v19, v20, v19
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v20, 8, v24
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v19, v19, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v20, 0, v25, v20
	v_add_nc_u32_e32 v23, -8, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v19, v19, 0, 0
	v_or3_b32 v19, v19, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v20, v20, v26, v22
.LBB0_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v23
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_48
; %bb.43:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v23
	s_cbranch_execz .LBB0_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_45:                               ; %.preheader21
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v24, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v23
	flat_load_u8 v24, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v25, s11 :: v_dual_and_b32 v24, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s0, v[24:25]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v24, v21
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_45
; %bb.46:                               ; %Flow207
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_47:                               ; %Flow209
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr23
.LBB0_48:                               ; %Flow211
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v25, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_50
; %bb.49:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v21, v[9:10]
	flat_load_u8 v22, v[9:10] offset:1
	flat_load_u8 v24, v[9:10] offset:2
	flat_load_u8 v25, v[9:10] offset:3
	flat_load_u8 v26, v[9:10] offset:5
	flat_load_u8 v27, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v30 :: v_dual_and_b32 v21, 0xffff, v21
	s_clause 0x1
	flat_load_u8 v29, v[9:10] offset:7
	flat_load_d16_hi_u8 v28, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v24, 16, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v21, v22, v21
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v21, v21, v24, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	v_add_nc_u32_e32 v25, -8, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v21, 0, 0
	v_or3_b32 v21, v21, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v24, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v22, v22, v28, v24
.LBB0_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v25
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB0_56
; %bb.51:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v25
	s_cbranch_execz .LBB0_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB0_53:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v26, v[9:10]
	v_mov_b32_e32 v27, s11
	v_add_nc_u32_e32 v25, -1, v25
	v_add_co_u32 v9, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v26, 0xffff, v26
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v24, v27, v24
	v_or_b32_e32 v23, v26, v23
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_53
; %bb.54:                               ; %Flow202
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_55:                               ; %Flow204
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr9_vgpr10
.LBB0_56:                               ; %Flow206
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v23, v[9:10]
	flat_load_u8 v24, v[9:10] offset:1
	flat_load_u8 v25, v[9:10] offset:2
	flat_load_u8 v26, v[9:10] offset:3
	flat_load_u8 v27, v[9:10] offset:5
	flat_load_u8 v28, v[9:10] offset:4
	v_mov_b32_e32 v29, v30
	s_clause 0x1
	flat_load_u8 v34, v[9:10] offset:7
	flat_load_d16_hi_u8 v29, v[9:10] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v9, 0xffff, v23
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v10, 8, v24
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v25
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v24, 8, v27
	v_or_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 24, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v9, v9, v23, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v10, 0, v28, v24
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v34
	v_or3_b32 v9, v9, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v24, v10, v29, v23
	v_or3_b32 v23, v9, 0, 0
.LBB0_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v29, v33
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v29
	v_cmp_eq_u32_e64 s0, s0, v29
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_64
; %bb.59:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[27:28], v30, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b64 v[25:26], v30, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v28
	v_and_b32_e32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v34, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v34, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v26, v10, vcc_lo
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[27:28]
	s_cbranch_execz .LBB0_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s5, 0
.LBB0_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[25:26], v30, s[2:3] offset:40
	global_load_b64 v[34:35], v30, s[2:3]
	v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v27, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, v25, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[34:35]
	v_and_b32_e32 v34, v26, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, v34, 24, v[10:11]
	v_mov_b32_e32 v10, v25
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[27:28]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_61
; %bb.62:                               ; %Flow199
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_63:                               ; %Flow201
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v30, s[2:3] offset:40
	global_load_b128 v[25:28], v30, s[2:3]
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_66
; %bb.65:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v26, vcc_lo
	v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v10, v30
	global_store_b128 v[34:35], v[9:12], off offset:8
.LBB0_66:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v9, 0, v1
	v_or_b32_e32 v10, v0, v6
	v_lshl_add_u32 v34, v31, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v9, v1 :: v_dual_cndmask_b32 v0, v10, v0
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v27, vcc_lo, v27, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v28, vcc_lo, s7, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v27, v9
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, v28, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[0:3], off
	global_store_b128 v[9:10], v[13:16], off offset:16
	global_store_b128 v[9:10], v[17:20], off offset:32
	global_store_b128 v[9:10], v[21:24], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_74
; %bb.67:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x1
	global_load_b64 v[17:18], v30, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v30, s[2:3] offset:40
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v16, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v13, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v26, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[13:14], v[17:18], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v30, v[15:18], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[17:18]
	s_cbranch_execz .LBB0_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
.LBB0_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[13:14], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v30, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_69
.LBB0_70:                               ; %Flow197
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v30, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_72
; %bb.71:                               ;   in Loop: Header=BB0_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v29, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[29:30], off offset:8
.LBB0_72:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v29, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v29
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[29:30], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_74:                               ; %Flow198
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_75:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_79
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_80
.LBB0_79:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, -1
.LBB0_80:                               ; %Flow192
                                        ;   in Loop: Header=BB0_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_75
; %bb.81:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b128 v[0:3], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_85
; %bb.82:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v30, s[2:3] offset:40
	global_load_b64 v[9:10], v30, s[2:3] offset:24 glc
	global_load_b64 v[15:16], v30, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v17, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v17, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_and_b32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v13, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v17, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v15, v2
	v_mov_b32_e32 v15, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, v16, v3, vcc_lo
	v_mov_b32_e32 v16, v10
	global_store_b64 v[2:3], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s0, 0
.LBB0_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[15:16]
	v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_84
.LBB0_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v31
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v32, vcc_lo
	v_add_co_u32 v7, s0, v7, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, v8, v32, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
; %bb.86:                               ; %Flow237
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr10
.LBB0_87:                               ; %Flow253
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB0_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[7:8], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB0_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v3, 24, v[11:12]
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_91
; %bb.92:                               ; %Flow249
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_93:                               ; %Flow251
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, v3
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[8:9], v[11:14], off offset:8
.LBB0_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB0_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_99
.LBB0_100:                              ; %Flow247
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_104:                              ; %Flow248
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_107
; %bb.106:                              ;   in Loop: Header=BB0_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_107:                              ;   in Loop: Header=BB0_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_110
.LBB0_109:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, -1
.LBB0_110:                              ; %Flow242
                                        ;   in Loop: Header=BB0_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_114
.LBB0_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_116:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5708
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i ; -- Begin function _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.globl	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
	.p2align	8
	.type	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i,@function
_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i: ; @_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	s_load_b32 s0, s[0:1], 0x94
	s_load_b32 s1, s[18:19], 0x50
	s_add_u32 s28, s18, 0x88
	s_addc_u32 s29, s19, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[40:41], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e64 s1, v40
	s_cbranch_execz .LBB1_175
; %bb.1:
	s_load_b256 s[0:7], s[18:19], 0x20
	v_ashrrev_i32_e32 v41, 31, v40
	s_clause 0x1
	s_load_b256 s[36:43], s[18:19], 0x0
	s_load_b256 s[20:27], s[18:19], 0x58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 3, v[40:41]
	v_lshlrev_b64 v[41:42], 2, v[40:41]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	v_max_f64 v[6:7], |s[40:41]|, |s[40:41]|
	v_max_f64 v[8:9], |s[38:39]|, |s[38:39]|
	v_max_f64 v[14:15], |s[42:43]|, |s[42:43]|
	global_load_b64 v[0:1], v[0:1], off
	v_cmp_class_f64_e64 s1, s[38:39], 0x204
	v_cmp_class_f64_e64 s2, s[40:41], 0x204
	v_cmp_u_f64_e64 s3, s[38:39], s[40:41]
	v_cmp_u_f64_e64 s4, s[42:43], s[42:43]
	v_cmp_class_f64_e64 s7, s[42:43], 0x204
	v_max_f64 v[16:17], v[8:9], v[6:7]
	v_min_f64 v[6:7], v[8:9], v[6:7]
	s_or_b32 s1, s1, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_b32 s2, s3, s4
	s_or_b32 s1, s1, s7
	s_mov_b32 s4, 0x336a0500
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_max_f64 v[22:23], v[16:17], v[14:15]
	v_min_f64 v[8:9], v[16:17], v[14:15]
	v_frexp_exp_i32_f64_e32 v26, v[22:23]
	s_delay_alu instid0(VALU_DEP_2)
	v_min_f64 v[14:15], v[6:7], v[8:9]
	v_max_f64 v[6:7], v[6:7], v[8:9]
	s_waitcnt vmcnt(2)
	v_max_f64 v[10:11], |v[2:3]|, |v[2:3]|
	s_waitcnt vmcnt(1)
	v_max_f64 v[12:13], |v[4:5]|, |v[4:5]|
	v_cmp_class_f64_e64 s5, v[4:5], 0x204
	v_cmp_class_f64_e64 s6, v[2:3], 0x204
	s_waitcnt vmcnt(0)
	v_max_f64 v[18:19], |v[0:1]|, |v[0:1]|
	v_cmp_class_f64_e64 s8, v[0:1], 0x204
	v_max_f64 v[20:21], v[12:13], v[10:11]
	v_min_f64 v[10:11], v[12:13], v[10:11]
	s_or_b32 s3, s5, s6
	s_mov_b32 s5, 0x3fedd9ad
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_max_f64 v[24:25], v[20:21], v[18:19]
	v_min_f64 v[12:13], v[20:21], v[18:19]
	v_sub_nc_u32_e32 v18, 0, v26
	v_ldexp_f64 v[8:9], v[14:15], v18
	v_ldexp_f64 v[6:7], v[6:7], v18
	v_ldexp_f64 v[14:15], v[22:23], v18
	v_frexp_exp_i32_f64_e32 v27, v[24:25]
	v_min_f64 v[16:17], v[10:11], v[12:13]
	v_max_f64 v[10:11], v[10:11], v[12:13]
	v_mul_f64 v[8:9], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v19, 0, v27
	v_ldexp_f64 v[12:13], v[16:17], v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[10:11], v[10:11], v19
	v_fma_f64 v[6:7], v[6:7], v[6:7], v[8:9]
	v_ldexp_f64 v[8:9], v[24:25], v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[12:13], v[12:13], v[12:13]
	v_fma_f64 v[6:7], v[14:15], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[10:11], v[10:11], v[12:13]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[8:9], v[10:11]
	v_rsq_f64_e32 v[10:11], v[6:7]
	v_rsq_f64_e32 v[12:13], v[8:9]
	v_cmp_eq_f64_e64 s0, 0, v[8:9]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[14:15], v[6:7], v[10:11]
	v_mul_f64 v[10:11], v[10:11], 0.5
	v_mul_f64 v[16:17], v[8:9], v[12:13]
	v_mul_f64 v[12:13], v[12:13], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[10:11], v[14:15], 0.5
	v_fma_f64 v[20:21], -v[12:13], v[16:17], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[18:19], v[14:15]
	v_fma_f64 v[10:11], v[10:11], v[18:19], v[10:11]
	v_fma_f64 v[16:17], v[16:17], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[14:15], v[14:15], v[6:7]
	v_fma_f64 v[12:13], v[12:13], v[20:21], v[12:13]
	v_fma_f64 v[20:21], -v[16:17], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[18:19], v[10:11], v[14:15]
	v_mul_f64 v[14:15], v[2:3], s[40:41]
	v_fma_f64 v[12:13], v[20:21], v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v7, v11, v7 :: v_dual_cndmask_b32 v6, v10, v6
	v_cmp_u_f64_e32 vcc_lo, v[4:5], v[2:3]
	v_fma_f64 v[4:5], v[4:5], s[38:39], v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[6:7], v[6:7], v26
	v_cndmask_b32_e64 v9, v13, v9, s0
	v_cndmask_b32_e64 v8, v12, v8, s0
	v_cmp_u_f64_e64 s0, v[0:1], v[0:1]
	v_fma_f64 v[0:1], v[0:1], s[42:43], v[4:5]
	v_ldexp_f64 v[2:3], v[8:9], v27
	v_cndmask_b32_e64 v7, v7, 0x7ff80000, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v7, v7, 0x7ff00000, s1
	s_or_b32 s1, s1, s2
	v_cndmask_b32_e64 v6, v6, 0, s1
	s_or_b32 s1, s3, s8
	s_mov_b32 s2, 0x9fea6a70
	s_mov_b32 s3, 0x3fa05985
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v3, v3, 0x7ff80000, s0
	s_or_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v2, v2, 0, s0
	v_cndmask_b32_e64 v3, v3, 0x7ff00000, s1
	s_mov_b32 s0, 0x78a05eaf
	s_mov_b32 s1, 0xbf90a5a3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], v[0:1]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	v_div_fixup_f64 v[2:3], v[4:5], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], |v[2:3]|, -0.5, 0.5
	v_mul_f64 v[0:1], v[2:3], v[2:3]
	v_cmp_ge_f64_e64 vcc_lo, |v[2:3]|, 0.5
	v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[0:1], s[2:3], s[0:1]
	s_mov_b32 s0, 0x37024d6a
	s_mov_b32 s1, 0x3f940521
	s_mov_b32 s2, 0xeeb562d6
	s_mov_b32 s3, 0x3ffaf154
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0x98a70509
	s_mov_b32 s1, 0x3f7ab3a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0xa300c8d2
	s_mov_b32 s1, 0x3f88ed60
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0x4b77012b
	s_mov_b32 s1, 0x3f8c6fa8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0x11dccb70
	s_mov_b32 s1, 0x3f91c6c1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	v_add_co_u32 v8, s0, s24, v41
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s25, v42, s0
	s_mov_b32 s0, 0xa0adacf
	s_mov_b32 s1, 0x3f96e89f
	s_load_b64 s[24:25], s[18:19], 0x78
	global_load_b32 v8, v[8:9], off
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0xc668963f
	s_mov_b32 s1, 0x3f9f1c72
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0xb41ce4bd
	s_mov_b32 s1, 0x3fa6db6d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s0, 0x3336fd5b
	s_mov_b32 s1, 0x3fb33333
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_mov_b32 s1, 0x3fc55555
	s_mov_b32 s0, 0x55555380
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[0:1], v[6:7], s[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[0:1], v[6:7]
	v_fma_f64 v[0:1], v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], s[4:5], s[2:3], -v[0:1]
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_rsq_f64_e32 v[0:1], v[4:5]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[4:5]
	s_mov_b32 s5, 0x3ffdd9ad
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[9:10], v[4:5], v[0:1]
	v_mul_f64 v[0:1], v[0:1], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[0:1], v[9:10], 0.5
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_fma_f64 v[0:1], v[0:1], v[11:12], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[9:10], v[9:10], v[4:5]
	v_fma_f64 v[0:1], v[11:12], v[0:1], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_add_f64 v[9:10], v[0:1], v[0:1]
	v_mul_f64 v[11:12], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[9:10]
	v_add_f64 v[15:16], v[4:5], -v[11:12]
	v_fma_f64 v[19:20], v[0:1], v[0:1], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[15:16]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[17:18], -v[9:10], v[13:14], 1.0
	v_add_f64 v[4:5], v[4:5], -v[11:12]
	v_fma_f64 v[11:12], v[17:18], v[13:14], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[19:20]
	v_fma_f64 v[13:14], -v[9:10], v[11:12], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[15:16], v[4:5]
	v_fma_f64 v[11:12], v[13:14], v[11:12], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[4:5], v[11:12]
	v_fma_f64 v[4:5], -v[9:10], v[13:14], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], v[11:12], v[13:14]
	v_cndmask_b32_e64 v5, v5, 0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v4, 0, vcc_lo
	v_cmp_gt_f64_e32 vcc_lo, 0, v[2:3]
	v_add_f64 v[9:10], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[9:10], -v[0:1]
	v_add_f64 v[0:1], v[4:5], -v[0:1]
	v_fma_f64 v[4:5], v[9:10], v[6:7], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], v[9:10], v[6:7], v[0:1]
	v_mul_f64 v[4:5], v[4:5], -2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[9:10], v[0:1]
	v_fma_f64 v[4:5], s[4:5], s[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[0:1]
	v_dual_cndmask_b32 v1, v1, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_cmp_neq_f64_e32 vcc_lo, -1.0, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v0, 0x54442d18, v0, vcc_lo
	v_cndmask_b32_e32 v1, 0x400921fb, v1, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 1.0, v[2:3]
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
.LBB1_3:                                ; %_Z14calculateAngledddddd.exit
	s_or_b32 exec_lo, exec_lo, s0
	v_frexp_mant_f64_e64 v[2:3], |s[36:37]|
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s4, 0x968915a9
	s_mov_b32 s6, 0x4222de17
	s_mov_b32 s5, 0x3fba6564
	s_mov_b32 s7, 0x3fbdee67
	s_mov_b32 s0, 0x55555511
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[11:12], v[2:3], -1.0
	v_rcp_f64_e32 v[6:7], v[4:5]
	v_add_f64 v[13:14], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[13:14]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[9:10], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[9:10], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[11:12], v[6:7]
	v_mul_f64 v[15:16], v[4:5], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[9:10], v[4:5], -v[15:16]
	v_fma_f64 v[2:3], v[9:10], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[15:16], v[2:3]
	v_add_f64 v[13:14], v[11:12], -v[4:5]
	v_add_f64 v[15:16], v[4:5], -v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_add_f64 v[2:3], v[15:16], -v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[11:12], -v[4:5]
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[13:14], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[9:10], v[2:3]
	v_add_f64 v[6:7], v[4:5], -v[9:10]
	v_mul_f64 v[9:10], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_fma_f64 v[6:7], v[4:5], v[4:5], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[2:3], v[2:3]
	v_fma_f64 v[6:7], v[4:5], v[11:12], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[9:10], v[6:7]
	v_fma_f64 v[13:14], v[11:12], s[6:7], s[4:5]
	s_mov_b32 s4, 0x3abe935a
	s_mov_b32 s5, 0x3fbe25e4
	v_add_f64 v[9:10], v[11:12], -v[9:10]
	v_mul_f64 v[19:20], v[4:5], v[11:12]
	s_mov_b32 s6, 0x652b82fe
	s_mov_b32 s7, 0x3ff71547
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s4, 0x47e6c9c2
	s_mov_b32 s5, 0x3fc110ef
	v_add_f64 v[6:7], v[6:7], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s4, 0xcfa74449
	s_mov_b32 s5, 0x3fc3b13b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s4, 0x71bf3c30
	s_mov_b32 s5, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s4, 0x1c7792ce
	s_mov_b32 s5, 0x3fcc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s4, 0x924920da
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s4, 0x9999999c
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[4:5]
	s_mov_b32 s5, 0x3c7abc9e
	s_mov_b32 s4, 0x3b39803f
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[11:12], v[13:14]
	v_fma_f64 v[9:10], v[11:12], v[13:14], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[6:7], v[13:14], v[9:10]
	v_add_f64 v[13:14], v[15:16], v[9:10]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[17:18], v[13:14], s[2:3]
	v_add_f64 v[15:16], v[13:14], -v[15:16]
	s_mov_b32 s3, 0xbfe55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[21:22], v[17:18], s[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], -v[15:16]
	v_fma_f64 v[15:16], v[11:12], v[4:5], -v[19:20]
	s_mov_b32 s2, 0xd5df274d
	s_mov_b32 s3, 0x3c8543b0
	v_add_f64 v[13:14], v[13:14], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], s[2:3]
	v_fma_f64 v[11:12], v[11:12], v[2:3], v[15:16]
	s_mov_b32 s3, 0x3fe62e42
	s_mov_b32 s2, 0xfefa39ef
	v_ldexp_f64 v[2:3], v[2:3], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[13:14]
	v_fma_f64 v[6:7], v[6:7], v[4:5], v[11:12]
	v_ldexp_f64 v[4:5], v[4:5], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[17:18], v[9:10]
	v_add_f64 v[13:14], v[19:20], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[17:18], -v[11:12]
	v_mul_f64 v[17:18], v[13:14], v[11:12]
	v_add_f64 v[19:20], v[13:14], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[15:16]
	v_fma_f64 v[15:16], v[13:14], v[11:12], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[19:20]
	v_fma_f64 v[9:10], v[13:14], v[9:10], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[11:12], v[9:10]
	v_frexp_exp_i32_f64_e32 v11, s[36:37]
	v_add_f64 v[9:10], v[17:18], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v11, vcc_lo
	v_cvt_f64_i32_e32 v[11:12], v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[4:5], v[9:10]
	v_add_f64 v[15:16], v[9:10], -v[17:18]
	v_mul_f64 v[17:18], v[11:12], s[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[13:14], -v[4:5]
	v_add_f64 v[6:7], v[6:7], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[11:12], s[2:3], -v[17:18]
	s_mov_b32 s3, 0xbfe62e42
	v_add_f64 v[4:5], v[9:10], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[11:12], s[4:5], v[15:16]
	s_mov_b32 s5, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], v[17:18], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[13:14], v[2:3]
	v_add_f64 v[17:18], v[4:5], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[4:5], v[9:10]
	v_add_f64 v[13:14], v[9:10], -v[13:14]
	v_add_f64 v[6:7], v[6:7], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[11:12], -v[4:5]
	v_add_f64 v[2:3], v[2:3], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[11:12], -v[15:16]
	v_add_f64 v[9:10], v[9:10], -v[15:16]
	v_add_f64 v[13:14], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[19:20]
	v_add_f64 v[4:5], v[9:10], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[13:14], -v[6:7]
	v_add_f64 v[4:5], v[13:14], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[13:14], -v[9:10]
	v_add_f64 v[2:3], v[2:3], -v[9:10]
	v_add_f64 v[15:16], v[11:12], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[13:14]
	v_add_f64 v[9:10], v[15:16], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], v[15:16], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], -v[15:16]
	v_mul_f64 v[9:10], 0x40080000, v[4:5]
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], 0x40080000, v[4:5], -v[9:10]
	v_cmp_class_f64_e64 vcc_lo, v[9:10], 0x204
	v_fma_f64 v[2:3], 0x40080000, v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[9:10], v[2:3]
	v_dual_cndmask_b32 v7, v5, v10 :: v_dual_cndmask_b32 v6, v4, v9
	v_add_f64 v[4:5], v[4:5], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[11:12], v[6:7], s[6:7]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[6:7]|
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rndne_f64_e32 v[11:12], v[11:12]
	v_dual_cndmask_b32 v3, 0, v3 :: v_dual_cndmask_b32 v2, 0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[11:12], s[2:3], v[6:7]
	s_mov_b32 s2, 0xfca7ab0c
	s_mov_b32 s3, 0x3e928af3
	v_cvt_i32_f64_e32 v17, v[11:12]
	v_fma_f64 v[13:14], v[11:12], s[4:5], v[13:14]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s5, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], s[4:5], s[2:3]
	s_mov_b32 s2, 0x623fde64
	s_mov_b32 s3, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x7c89e6b0
	s_mov_b32 s3, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	s_mov_b32 s3, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x1852b7b0
	s_mov_b32 s3, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x11122322
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_mov_b32 s2, 0x555502a1
	s_mov_b32 s3, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[15:16], v[13:14], v[15:16], s[0:1]
	v_cmp_nlt_f64_e64 s0, 0x40900000, v[6:7]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[15:16], v[13:14], v[15:16], 1.0
	s_and_b32 vcc_lo, s1, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[13:14], v[15:16], 1.0
	v_ldexp_f64 v[9:10], v[11:12], v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0x7ff00000, v10, s0
	v_cmp_class_f64_e64 s0, s[36:37], 0x204
	v_cndmask_b32_e64 v5, 0, v4, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0, v9, vcc_lo
	v_cmp_eq_f64_e64 s1, s[36:37], 0
	v_fma_f64 v[2:3], v[4:5], v[2:3], v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[4:5], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v6, s37 :: v_dual_cndmask_b32 v3, v3, v5
	v_cndmask_b32_e32 v2, v2, v4, vcc_lo
	s_or_b32 vcc_lo, s1, s0
	s_and_b32 s0, s1, exec_lo
	s_cselect_b32 s0, 0, 0x7ff00000
	v_bfi_b32 v3, 0x7fffffff, v3, s37
	v_bfi_b32 v4, 0x7fffffff, s0, v6
	v_cndmask_b32_e64 v2, v2, 0, vcc_lo
	v_div_scale_f64 v[6:7], null, 0, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_div_scale_f64 v[4:5], null, 0x40b5e000, 0x40b5e000, v[2:3]
	v_div_scale_f64 v[17:18], vcc_lo, v[2:3], 0x40b5e000, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[11:12], v[6:7]
	v_rcp_f64_e32 v[9:10], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[6:7], v[11:12], 1.0
	v_fma_f64 v[13:14], -v[4:5], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[11:12], v[15:16], v[11:12]
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[15:16], -v[6:7], v[11:12], 1.0
	v_fma_f64 v[13:14], -v[4:5], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[11:12], v[11:12], v[15:16], v[11:12]
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[9:10]
	v_div_scale_f64 v[13:14], s0, v[0:1], 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[15:16], v[17:18], v[9:10]
	v_mul_f64 v[19:20], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], -v[4:5], v[15:16], v[17:18]
	v_fma_f64 v[6:7], -v[6:7], v[19:20], v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[4:5], v[4:5], v[9:10], v[15:16]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[6:7], v[6:7], v[11:12], v[19:20]
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[2:3], v[4:5], 0x40b5e000, v[2:3]
	v_div_fixup_f64 v[0:1], v[6:7], 0, v[0:1]
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], 0x40590000, v[2:3]
	v_mul_f64 v[0:1], 0x40668000, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_floor_f64_e32 v[2:3], v[2:3]
	v_floor_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v2, v[2:3]
	v_cvt_i32_f64_e32 v38, v[0:1]
	v_xor_b32_e32 v0, 0x2c7f967f, v8
	v_mov_b32_e32 v1, 0x8a5d614f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, 0x493c4aa1, v0
	v_cndmask_b32_e32 v1, 0xfa091aa4, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v46, 0x1f123bb5, v1
	v_xor_b32_e32 v47, 0x5491333, v1
	v_add_nc_u32_e32 v50, 0x75bcd15, v0
	v_xor_b32_e32 v49, 0x159a55e5, v0
	v_add_nc_u32_e32 v45, 0x583f19, v0
	v_add3_u32 v48, v0, v1, 0x64f0c9
	v_readfirstlane_b32 s33, v2
	v_add_nc_u32_e32 v2, -1, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s33, -1
	s_cmpk_gt_u32 s0, 0x63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xb3, v2
	s_cselect_b32 s0, -1, 0
	s_or_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s34, exec_lo, s1
	s_cbranch_execz .LBB1_145
; %bb.4:
	v_add_nc_u32_e32 v0, 0xffffff4b, v38
	s_cmp_lg_u32 s33, 1
                                        ; implicit-def: $vgpr6
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s0, 0xffffff4b, v0
	v_cmp_gt_u32_e32 vcc_lo, 0xffffff4c, v0
	s_or_b32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s35, exec_lo, s1
	s_cbranch_execz .LBB1_132
; %bb.5:
	s_cmp_lt_i32 s33, 2
	s_mov_b32 s2, -1
	s_cselect_b32 s0, -1, 0
	s_xor_b32 s1, vcc_lo, -1
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
	s_and_saveexec_b32 s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s38, exec_lo, s1
	s_cbranch_execz .LBB1_119
; %bb.6:
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, _ZZ11get_npe_numiiPd12hiprandStateE7warning@rel32@lo+4
	s_addc_u32 s5, s5, _ZZ11get_npe_numiiPd12hiprandStateE7warning@rel32@hi+12
                                        ; implicit-def: $sgpr3
	s_load_b64 s[6:7], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s6, 1
	v_cmp_gt_i64_e64 s6, s[6:7], 8
	s_addc_u32 s1, s7, 0
	v_mov_b32_e32 v0, s0
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s1
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 vcc_lo, exec_lo, s6
	global_store_b64 v2, v[0:1], s[4:5]
	s_cbranch_vccz .LBB1_37
; %bb.7:
	s_cmp_lg_u64 s[0:1], 10
	s_cbranch_scc1 .LBB1_36
; %bb.8:
	s_load_b64 s[2:3], s[28:29], 0x50
	v_mbcnt_lo_u32_b32 v4, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v4
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_14
; %bb.9:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[5:6], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_13
; %bb.10:                               ; %.preheader3.i.i.i133.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB1_11:                               ; %.preheader3.i.i.i133.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3] offset:40
	global_load_b64 v[10:11], v0, s[2:3]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_11
; %bb.12:                               ; %Flow191
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_13:                               ; %Flow193
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_14:                               ; %.loopexit4.i.i.i128.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s10, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[2:3] offset:40
	global_load_b128 v[0:3], v5, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v8
	v_readfirstlane_b32 s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_16
; %bb.15:
	s_add_i32 s12, s8, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s12, v1, vcc_lo
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_16:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_24
; %bb.17:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[2:3], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_20
; %bb.18:                               ; %.preheader1.i.i.i131.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB1_19:                               ; %.preheader1.i.i.i131.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_19
.LBB1_20:                               ; %Flow189
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v5, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	global_load_b64 v[2:3], v5, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_22
; %bb.21:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_22:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_24
; %bb.23:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_24:                               ; %Flow190
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s1
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_25:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_27
; %bb.26:                               ;   in Loop: Header=BB1_25 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_27:                               ;   in Loop: Header=BB1_25 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_29
; %bb.28:                               ;   in Loop: Header=BB1_25 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_30
.LBB1_29:                               ;   in Loop: Header=BB1_25 Depth=1
	s_mov_b32 s1, -1
.LBB1_30:                               ; %Flow184
                                        ;   in Loop: Header=BB1_25 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_25
; %bb.31:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_35
; %bb.32:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_35
; %bb.33:                               ; %.preheader.i.i.i130.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_34:                               ; %.preheader.i.i.i130.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_34
.LBB1_35:                               ; %__ockl_printf_begin.exit134.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 1
	s_cselect_b32 s4, 29, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 0x88
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[2:3]
.LBB1_36:                               ; %Flow194
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
.LBB1_37:                               ; %Flow239
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_119
; %bb.38:
	s_load_b64 s[28:29], s[28:29], 0x50
	v_mbcnt_lo_u32_b32 v43, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v43
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_44
; %bb.39:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_43
; %bb.40:                               ; %.preheader3.i.i.i.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB1_41:                               ; %.preheader3.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_41
; %bb.42:                               ; %Flow235
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_43:                               ; %Flow237
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_44:                               ; %.loopexit4.i.i.i.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_46
; %bb.45:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_46:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_53
; %bb.47:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_49
.LBB1_48:                               ; %.preheader1.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_48
.LBB1_49:                               ; %Flow233
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_51
; %bb.50:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_51:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_53
; %bb.52:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_53:                               ; %Flow234
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_54:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_56
; %bb.55:                               ;   in Loop: Header=BB1_54 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_56:                               ;   in Loop: Header=BB1_54 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_58
; %bb.57:                               ;   in Loop: Header=BB1_54 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_59
.LBB1_58:                               ;   in Loop: Header=BB1_54 Depth=1
	s_mov_b32 s1, -1
.LBB1_59:                               ; %Flow228
                                        ;   in Loop: Header=BB1_54 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_54
; %bb.60:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_64
; %bb.61:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_64
; %bb.62:                               ; %.preheader.i.i.i.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_63:                               ; %.preheader.i.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_63
.LBB1_64:                               ; %__ockl_printf_begin.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v5, 0
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s2, -1, 0
	s_add_u32 s8, s18, 0x88
	v_cndmask_b32_e64 v2, 0, 1, s2
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s1 :: v_dual_lshlrev_b32 v4, 4, v2
	v_mov_b32_e32 v2, s0
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v2, v43
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v2
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_70
; %bb.65:
	global_load_b64 v[5:6], v36, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v36, s[28:29] offset:40
	global_load_b64 v[7:8], v36, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v36, v[3:6], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB1_69
; %bb.66:                               ; %.preheader3.i.i.i120.i.i.i.preheader
	v_mov_b32_e32 v3, 0
	s_mov_b32 s3, 0
.LBB1_67:                               ; %.preheader3.i.i.i120.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[28:29] offset:40
	global_load_b64 v[10:11], v3, s[28:29]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_67
; %bb.68:                               ; %Flow221
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_69:                               ; %Flow223
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_70:                               ; %.loopexit4.i.i.i115.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[10:11], v36, s[28:29] offset:40
	global_load_b128 v[4:7], v36, s[28:29]
	v_readfirstlane_b32 s2, v8
	v_readfirstlane_b32 s3, v9
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v10
	v_readfirstlane_b32 s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_72
; %bb.71:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v13, vcc_lo, s10, v5, vcc_lo
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, 0
	v_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB1_72:
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s8, 0
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	s_mov_b32 s9, s8
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_mov_b32 s10, s8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	v_mov_b32_e32 v2, s33
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	v_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, s11
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_80
; %bb.73:
	s_clause 0x1
	global_load_b64 v[14:15], v3, s[28:29] offset:32 glc
	global_load_b64 v[0:1], v3, s[28:29] offset:40
	v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v13, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v0, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[0:1], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v3, v[12:15], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[14:15]
	s_cbranch_execz .LBB1_76
; %bb.74:                               ; %.preheader1.i.i.i118.i.i.i.preheader
	s_mov_b32 s8, 0
.LBB1_75:                               ; %.preheader1.i.i.i118.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v6, s2 :: v_dual_mov_b32 v7, s3
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v3, v[6:9], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_75
.LBB1_76:                               ; %Flow219
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v2, s8, 0
	global_load_b64 v[0:1], v3, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_78
; %bb.77:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_78:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_80
; %bb.79:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_80:                               ; %Flow220
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v4, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_81:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_83
; %bb.82:                               ;   in Loop: Header=BB1_81 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_83:                               ;   in Loop: Header=BB1_81 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_85
; %bb.84:                               ;   in Loop: Header=BB1_81 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_86
.LBB1_85:                               ;   in Loop: Header=BB1_81 Depth=1
	s_mov_b32 s1, -1
.LBB1_86:                               ; %Flow214
                                        ;   in Loop: Header=BB1_81 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_81
; %bb.87:
	global_load_b64 v[36:37], v[10:11], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_91
; %bb.88:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[28:29] offset:40
	global_load_b64 v[7:8], v6, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v6, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_91
; %bb.89:                               ; %.preheader.i.i.i117.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_90:                               ; %.preheader.i.i.i117.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_90
.LBB1_91:                               ; %__ockl_printf_append_args.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v43
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v43
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_97
; %bb.92:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[3:4], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB1_96
; %bb.93:                               ; %.preheader3.i.i.i126.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB1_94:                               ; %.preheader3.i.i.i126.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[8:9], v0, s[28:29]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_94
; %bb.95:                               ; %Flow207
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_96:                               ; %Flow209
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_97:                               ; %.loopexit4.i.i.i121.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v44, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v44, s[28:29] offset:40
	global_load_b128 v[0:3], v44, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_99
; %bb.98:
	s_add_i32 s10, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v44
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB1_99:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[43:44]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v36, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v39, v44 :: v_dual_mov_b32 v2, s8
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	v_mov_b32_e32 v5, s11
	s_clause 0x3
	global_store_b128 v[6:7], v[36:39], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_107
; %bb.100:
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v8, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[9:12], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[11:12]
	s_cbranch_execz .LBB1_103
; %bb.101:                              ; %.preheader1.i.i.i124.i.i.i.preheader
	s_mov_b32 s8, 0
.LBB1_102:                              ; %.preheader1.i.i.i124.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_102
.LBB1_103:                              ; %Flow205
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_105
; %bb.104:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_105:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_107
; %bb.106:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_107:                              ; %Flow206
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_108:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_110
; %bb.109:                              ;   in Loop: Header=BB1_108 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_110:                              ;   in Loop: Header=BB1_108 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_112
; %bb.111:                              ;   in Loop: Header=BB1_108 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_113
.LBB1_112:                              ;   in Loop: Header=BB1_108 Depth=1
	s_mov_b32 s1, -1
.LBB1_113:                              ; %Flow200
                                        ;   in Loop: Header=BB1_108 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_108
; %bb.114:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_118
; %bb.115:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[28:29] offset:40
	global_load_b64 v[7:8], v6, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v6, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_118
; %bb.116:                              ; %.preheader.i.i.i123.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_117:                              ; %.preheader.i.i.i123.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_117
.LBB1_118:                              ; %Flow198
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
.LBB1_119:                              ; %Flow248
	s_or_saveexec_b32 s0, s38
	v_mov_b32_e32 v6, s3
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_131
; %bb.120:
	v_lshrrev_b32_e32 v0, 2, v50
	v_cmp_gt_i32_e32 vcc_lo, 0xb5, v38
	v_lshlrev_b32_e32 v1, 4, v45
	v_lshrrev_b32_e32 v3, 2, v49
	s_mov_b32 s1, 0
	v_xor_b32_e32 v0, v0, v50
	v_dual_mov_b32 v7, 49 :: v_dual_mov_b32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v1, v2
	v_xor_b32_e32 v2, v3, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v3, v1, v45, v0
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v3
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v0, v0, v2, v3
	v_add3_u32 v2, v48, v3, 0x587c5
	v_add3_u32 v0, v48, v0, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_max_i32_e32 v2, 1, v38
	v_add_nc_u32_e32 v2, 0xffffff4b, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, -1, v2, vcc_lo
	v_mad_u64_u32 v[3:4], null, 0xb4, s33, v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v4, v3, 50
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB1_121:                              ; %.lr.ph.i.i106.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_sub_nc_u32_e32 v2, v7, v6
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s22, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_127
; %bb.122:                              ;   in Loop: Header=BB1_121 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_126
; %bb.123:                              ;   in Loop: Header=BB1_121 Depth=1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.124:                              ;   in Loop: Header=BB1_121 Depth=1
	v_mov_b32_e32 v7, v5
; %bb.125:                              ; %Flow243
                                        ;   in Loop: Header=BB1_121 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v6
.LBB1_126:                              ; %Flow245
                                        ;   in Loop: Header=BB1_121 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v5, v7
.LBB1_127:                              ;   in Loop: Header=BB1_121 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v5 :: v_dual_add_nc_u32 v2, 1, v6
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_121
; %bb.128:                              ; %._crit_edge.i.i111.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, v6, v4
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_130
; %bb.129:
	v_add_nc_u32_e32 v2, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v6, -1, v5, vcc_lo
.LBB1_130:                              ; %Flow242
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_131:                              ; %Flow249
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_132:                              ; %Flow257
	s_and_not1_saveexec_b32 s0, s35
	s_cbranch_execz .LBB1_144
; %bb.133:
	v_lshrrev_b32_e32 v0, 2, v50
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v1, 4, v45
	v_lshrrev_b32_e32 v3, 2, v49
	v_lshrrev_b32_e32 v5, 2, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v0, v50
	s_mov_b32 s1, 0
	v_mov_b32_e32 v7, 49
	v_xor_b32_e32 v5, v5, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v2, 1, v0
	v_xor_b32_e32 v1, v1, v2
	v_xor_b32_e32 v2, v3, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v3, v1, v45, v0
	v_lshlrev_b32_e32 v0, 1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v1, 4, v3
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v4, v0, v2, v3
	v_add3_u32 v2, v48, v3, 0x587c5
	v_add3_u32 v0, v48, v4, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_lshrrev_b32_e32 v0, 11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[0:1], v0
	v_ldexp_f64 v[0:1], v[0:1], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_lshlrev_b32_e32 v2, 4, v4
	v_lshlrev_b32_e32 v3, 1, v5
	v_xor_b32_e32 v2, v3, v2
	v_lshrrev_b32_e32 v3, 2, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v4, v2, v5, v4
	v_xor_b32_e32 v2, v3, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v3, 4, v4
	v_lshlrev_b32_e32 v5, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v5, v3
	v_xor3_b32 v2, v3, v2, v4
	v_add3_u32 v4, v48, v4, 0x10974f
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v2, v48, v2, 0x161f14
	v_cvt_f64_u32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v2, 11, v2
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[0:1], 0x40666000, v[0:1]
	v_ldexp_f64 v[2:3], v[2:3], 32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ceil_f64_e32 v[0:1], v[0:1]
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v4, v[0:1]
	v_fma_f64 v[0:1], 0x3ca00000, v[2:3], 0x3ca00000
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 50
.LBB1_134:                              ; %.lr.ph.i.i89.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_sub_nc_u32_e32 v2, v7, v6
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, 31, v2
	v_add_nc_u32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 1, v2
	v_add_nc_u32_e32 v5, v2, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v5, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_add_co_u32 v2, vcc_lo, s22, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_140
; %bb.135:                              ;   in Loop: Header=BB1_134 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_139
; %bb.136:                              ;   in Loop: Header=BB1_134 Depth=1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[2:3], v[0:1]
; %bb.137:                              ;   in Loop: Header=BB1_134 Depth=1
	v_mov_b32_e32 v7, v5
; %bb.138:                              ; %Flow252
                                        ;   in Loop: Header=BB1_134 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v6
.LBB1_139:                              ; %Flow254
                                        ;   in Loop: Header=BB1_134 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v5, v7
.LBB1_140:                              ;   in Loop: Header=BB1_134 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, v5 :: v_dual_add_nc_u32 v2, 1, v6
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_134
; %bb.141:                              ; %._crit_edge.i.i94.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, v6, v4
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[2:3], v[0:1]
	s_cbranch_execz .LBB1_143
; %bb.142:
	v_add_nc_u32_e32 v2, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v6, -1, v5, vcc_lo
.LBB1_143:                              ; %Flow251
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_144:                              ; %Flow258
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_145:                              ; %Flow266
	s_and_not1_saveexec_b32 s0, s34
	s_cbranch_execz .LBB1_157
; %bb.146:
	v_lshrrev_b32_e32 v0, 2, v50
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v1, 4, v45
	v_lshrrev_b32_e32 v3, 2, v49
	v_mad_u64_u32 v[4:5], null, 0xb4, s33, v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v50
	s_mov_b32 s1, 0
	v_dual_mov_b32 v7, 49 :: v_dual_lshlrev_b32 v2, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v1, v2
	v_xor_b32_e32 v2, v3, v49
	v_xor3_b32 v3, v1, v45, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 1, v2
	v_lshlrev_b32_e32 v1, 4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_xor3_b32 v0, v0, v2, v3
	v_add3_u32 v2, v48, v3, 0x587c5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v0, v48, v0, 0xb0f8a
	v_cvt_f64_u32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 11, v0
	v_cvt_f64_u32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_mad_u64_u32 v[2:3], null, v4, 50, 0xffffffffffffdca6
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[0:1], 0x3ca00000, v[0:1], 0x3ca00000
.LBB1_147:                              ; %.lr.ph.i.i.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_sub_nc_u32_e32 v3, v7, v6
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v4, 31, v3
	v_add_nc_u32_e32 v3, v3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 1, v3
	v_add_nc_u32_e32 v5, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v5, v2
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v3, vcc_lo, s22, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s23, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB1_153
; %bb.148:                              ;   in Loop: Header=BB1_147 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_nlt_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB1_152
; %bb.149:                              ;   in Loop: Header=BB1_147 Depth=1
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_f64_e32 v[3:4], v[0:1]
; %bb.150:                              ;   in Loop: Header=BB1_147 Depth=1
	v_mov_b32_e32 v7, v5
; %bb.151:                              ; %Flow261
                                        ;   in Loop: Header=BB1_147 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v5, v6
.LBB1_152:                              ; %Flow263
                                        ;   in Loop: Header=BB1_147 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v5, v7
.LBB1_153:                              ;   in Loop: Header=BB1_147 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v6
	v_mov_b32_e32 v7, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v3, v5
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_147
; %bb.154:                              ; %._crit_edge.i.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v3, v6, v2
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s22, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s23, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[3:4], v[0:1]
	s_cbranch_execz .LBB1_156
; %bb.155:
	v_add_nc_u32_e32 v2, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s22, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, v[2:3], v[0:1]
	v_cndmask_b32_e32 v6, -1, v5, vcc_lo
.LBB1_156:                              ; %Flow260
	s_or_b32 exec_lo, exec_lo, s1
.LBB1_157:                              ; %Flow267
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_lt_i32_e32 vcc_lo, 0, v6
	s_mov_b32 s4, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_175
; %bb.158:                              ; %.preheader.i
	s_mov_b32 s0, 0x33333333
	s_mov_b32 s1, 0x4031b333
	s_movk_i32 s7, 0xbb8
	v_div_scale_f64 v[0:1], null, s[0:1], s[0:1], s[36:37]
	v_div_scale_f64 v[7:8], vcc_lo, s[36:37], s[0:1], s[36:37]
	s_load_b32 s6, s[18:19], 0x80
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s6, s6, 50
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[2:3], v[0:1]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[7:8], v[2:3]
	v_fma_f64 v[0:1], -v[0:1], v[4:5], v[7:8]
	v_mul_lo_u32 v7, s6, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5]
	v_min_u32_e32 v2, 0xb4, v38
	v_cmp_lt_i32_e32 vcc_lo, 0, v38
	v_cndmask_b32_e32 v2, 1, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[0:1], v[0:1], s[0:1], s[36:37]
	s_load_b128 s[0:3], s[18:19], 0x40
	s_waitcnt lgkmcnt(0)
	v_cmp_nlt_f64_e64 s5, s[0:1], 1.0
	v_cmp_lt_f64_e64 s6, s[0:1], 1.0
	v_mul_f64 v[0:1], 0x40690000, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_floor_f64_e32 v[0:1], v[0:1]
	v_cvt_i32_f64_e32 v0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, 0xc8, v0
	v_cmp_lt_i32_e32 vcc_lo, 0, v0
	v_mul_lo_u32 v1, 0xb4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, 0xb4, v1, vcc_lo
	v_add_nc_u32_e32 v2, v2, v0
	v_add_co_u32 v0, vcc_lo, s24, v41
	v_add_co_ci_u32_e32 v1, vcc_lo, s25, v42, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_mad_u32_u24 v8, v2, s7, 0xfff7b6e8
	s_mov_b32 s7, 0
.LBB1_159:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_164 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_161
; %bb.160:                              ;   in Loop: Header=BB1_159 Depth=1
	v_lshrrev_b32_e32 v2, 2, v50
	v_add_nc_u32_e32 v10, 0xb0f8a, v48
	v_lshlrev_b32_e32 v3, 4, v45
	v_lshrrev_b32_e32 v5, 2, v49
	v_mov_b32_e32 v14, v47
	v_xor_b32_e32 v2, v2, v50
	s_and_not1_b32 s8, s5, exec_lo
	v_dual_mov_b32 v13, v46 :: v_dual_mov_b32 v12, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 1, v2
	v_xor_b32_e32 v3, v3, v4
	v_xor_b32_e32 v4, v5, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v9, v3, v45, v2
	v_lshlrev_b32_e32 v2, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v9
	v_xor_b32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor3_b32 v11, v2, v4, v9
	v_add3_u32 v4, v48, v9, 0x587c5
	v_mov_b32_e32 v48, v10
	v_add_nc_u32_e32 v2, v11, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[4:5], v4
	v_lshrrev_b32_e32 v2, 11, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_ldexp_f64 v[2:3], v[2:3], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[2:3], 0x3ca00000, v[2:3], 0x3ca00000
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_nlt_f64_e32 vcc_lo, s[0:1], v[2:3]
	s_and_b32 s9, vcc_lo, exec_lo
	s_or_b32 s9, s8, s9
	s_branch .LBB1_162
.LBB1_161:                              ;   in Loop: Header=BB1_159 Depth=1
	v_dual_mov_b32 v11, v45 :: v_dual_mov_b32 v12, v46
	v_dual_mov_b32 v9, v47 :: v_dual_mov_b32 v14, v49
	v_dual_mov_b32 v10, v48 :: v_dual_mov_b32 v13, v50
	s_mov_b32 s9, s5
.LBB1_162:                              ; %Flow177
                                        ;   in Loop: Header=BB1_159 Depth=1
	v_dual_mov_b32 v50, v46 :: v_dual_mov_b32 v49, v47
	v_dual_mov_b32 v46, v45 :: v_dual_mov_b32 v45, v11
	v_mov_b32_e32 v47, v9
	s_and_saveexec_b32 s8, s9
	s_cbranch_execz .LBB1_174
; %bb.163:                              ;   in Loop: Header=BB1_159 Depth=1
	v_lshrrev_b32_e32 v2, 2, v13
	v_lshlrev_b32_e32 v3, 4, v11
	v_lshrrev_b32_e32 v5, 2, v14
	s_mov_b32 s9, 0
	v_mov_b32_e32 v17, 0xbb7
	v_xor_b32_e32 v2, v2, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v15, 0 :: v_dual_lshlrev_b32 v4, 1, v2
	v_xor_b32_e32 v3, v4, v3
	v_xor_b32_e32 v4, v5, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor3_b32 v5, v3, v2, v11
	v_lshlrev_b32_e32 v2, 1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v3, 4, v5
	v_xor_b32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor3_b32 v2, v2, v4, v5
	v_add3_u32 v4, v10, v5, 0x587c5
	v_add3_u32 v2, v10, v2, 0xb0f8a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_u32_e32 v[4:5], v4
	v_lshrrev_b32_e32 v2, 11, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_u32_e32 v[2:3], v2
	v_ldexp_f64 v[2:3], v[2:3], 32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[2:3], 0x3ca00000, v[2:3], 0x3ca00000
.LBB1_164:                              ; %.lr.ph.i.i.i.i.i.i
                                        ;   Parent Loop BB1_159 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u32_e32 v4, v17, v15
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v5, 31, v4
	v_add_nc_u32_e32 v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 1, v4
	v_add_nc_u32_e32 v16, v4, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v16, v8
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v4, vcc_lo, s20, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[4:5], v[2:3]
	s_cbranch_execz .LBB1_170
; %bb.165:                              ;   in Loop: Header=BB1_164 Depth=2
	s_mov_b32 s11, exec_lo
	v_cmpx_nlt_f64_e32 v[4:5], v[2:3]
	s_cbranch_execz .LBB1_169
; %bb.166:                              ;   in Loop: Header=BB1_164 Depth=2
	s_mov_b32 s12, exec_lo
	v_cmpx_gt_f64_e32 v[4:5], v[2:3]
; %bb.167:                              ;   in Loop: Header=BB1_164 Depth=2
	v_mov_b32_e32 v17, v16
; %bb.168:                              ; %Flow
                                        ;   in Loop: Header=BB1_164 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	v_mov_b32_e32 v16, v15
.LBB1_169:                              ; %Flow175
                                        ;   in Loop: Header=BB1_164 Depth=2
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v16 :: v_dual_mov_b32 v16, v17
.LBB1_170:                              ;   in Loop: Header=BB1_164 Depth=2
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v17, v16 :: v_dual_add_nc_u32 v4, 1, v15
	v_cmp_ge_i32_e32 vcc_lo, v4, v16
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB1_164
; %bb.171:                              ; %._crit_edge.i.i.i.i.i.i
                                        ;   in Loop: Header=BB1_159 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v4, v15, v8
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s20, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f64_e32 v[4:5], v[2:3]
	s_cbranch_execz .LBB1_173
; %bb.172:                              ;   in Loop: Header=BB1_159 Depth=1
	v_add_nc_u32_e32 v4, v16, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s20, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s21, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_f64_e32 vcc_lo, v[4:5], v[2:3]
	v_cndmask_b32_e32 v15, -1, v16, vcc_lo
.LBB1_173:                              ; %_Z11get_hittimeddiPd12hiprandState.exit.i
                                        ;   in Loop: Header=BB1_159 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	global_load_b32 v16, v[0:1], off
	v_cvt_f64_i32_e32 v[2:3], v15
	v_dual_mov_b32 v47, v9 :: v_dual_mov_b32 v46, v12
	v_dual_mov_b32 v49, v14 :: v_dual_mov_b32 v50, v13
	v_dual_mov_b32 v48, v10 :: v_dual_mov_b32 v45, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], s[2:3]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, 1, v16
	v_add_nc_u32_e32 v4, v16, v7
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v4, vcc_lo, s26, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s27, v5, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	global_store_b32 v[0:1], v9, off
.LBB1_174:                              ; %Flow178
                                        ;   in Loop: Header=BB1_159 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s7, v6
	s_or_b32 s4, vcc_lo, s4
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB1_159
.LBB1_175:                              ; %_Z12generateHitsdddidPdS_12hiprandState7res_arr.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 392
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 51
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i, .Lfunc_end1-_Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 13040
; NumSgprs: 46
; NumVgprs: 51
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 51
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	_ZZ11get_npe_numiiPd12hiprandStateE7warning,@object ; @_ZZ11get_npe_numiiPd12hiprandStateE7warning
	.local	_ZZ11get_npe_numiiPd12hiprandStateE7warning
	.comm	_ZZ11get_npe_numiiPd12hiprandStateE7warning,8,3
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"npe lost: %d/%d"
	.size	.str, 16

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"too many npe lost complains."
	.size	.str.1, 29

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           8
        .value_kind:     by_value
      - .offset:         64
        .size:           8
        .value_kind:     by_value
      - .offset:         72
        .size:           8
        .value_kind:     by_value
      - .offset:         80
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         96
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         104
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         112
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         120
        .size:           8
        .value_kind:     global_buffer
      - .offset:         128
        .size:           4
        .value_kind:     by_value
      - .offset:         136
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         140
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         144
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         148
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         150
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         152
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         154
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         156
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         158
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         184
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         192
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         200
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         216
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 392
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     46
    .sgpr_spill_count: 0
    .symbol:         _Z13pmt_calculateddddPdS_S_dddiS_S_PiS_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     51
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
