#include <iostream>
#include <math.h>

__global__ void reduce0(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
    sdata[tid] = d_in[i];
    __syncthreads();
    
    for (unsigned int s=1; s<blockDim.x; s*=2){
        if (tid % (2*s) == 0){
            sdata[tid] += sdata[tid+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce0(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    cudaMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    
    reduce0<<<numBlocks, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    cudaDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 1){
        ret += reduce0(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    cudaFree(d_out);
    return ret;
}

__global__ void reduce1(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
    sdata[tid] = d_in[i];
    __syncthreads();
    
    for (unsigned int s=1; s<blockDim.x; s*=2){
        int index = 2 * s * tid;
        if (index < blockDim.x){
            sdata[index] += sdata[index+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce1(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    cudaMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    
    reduce1<<<numBlocks, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    cudaDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 1){
        ret += reduce1(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    cudaFree(d_out);
    return ret;
}

__global__ void reduce2(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
    sdata[tid] = d_in[i];
    __syncthreads();
    
    for (unsigned int s=blockDim.x/2; s>0; s>>=1){
        if (tid < s){
            sdata[tid] += sdata[tid+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce2(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    cudaMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    
    reduce2<<<numBlocks, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    cudaDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 1){
        ret += reduce2(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    cudaFree(d_out);
    return ret;
}

__global__ void reduce3(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * (blockDim.x*2) + threadIdx.x;
    sdata[tid] = d_in[i] + d_in[i+blockDim.x];
    __syncthreads();
    
    for (unsigned int s=blockDim.x/2; s>0; s>>=1){
        if (tid < s){
            sdata[tid] += sdata[tid+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce3(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    cudaMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    if (numBlocks > 1){
        reduce3<<<numBlocks/2, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    } else {
        reduce3<<<numBlocks, blockSize/2, (blockSize/2)*sizeof(int)>>>(d_in, d_out);
    }
    cudaDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 2){
        ret += reduce3(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    cudaFree(d_out);
    return ret;
}

int main(){
    int N = 1<<26;
    int blockSize = 512;
    
    int *d_in;
    cudaMallocManaged(&d_in, N*sizeof(int));
    for (int i=0; i<N; i++){
        d_in[i] = 10;
    }

    std::cout << "Reduce 0: " << reduce0(N, blockSize, d_in) << std::endl;
    std::cout << "Reduce 1: " << reduce1(N, blockSize, d_in) << std::endl;
    std::cout << "Reduce 2: " << reduce2(N, blockSize, d_in) << std::endl;
    std::cout << "Reduce 3: " << reduce3(N, blockSize, d_in) << std::endl;
    
    /*
     GPU activities:   46.31%  22.244ms         3  7.4145ms  4.5440us  22.190ms  reduce0(int*, int*)
                   24.47%  11.752ms         3  3.9173ms  3.4880us  11.721ms  reduce1(int*, int*)
                   19.71%  9.4677ms         3  3.1559ms  3.2640us  9.4417ms  reduce2(int*, int*)
                    9.51%  4.5690ms         3  1.5230ms  3.2000us  4.5509ms  reduce3(int*, int*)
    */

    cudaFree(d_in);

    return 0;
}

	.file	"tmpxft_0031cf8f_00000000-6_cuda_reduce.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z7reduce0PiS_PiS_
	.type	_Z28__device_stub__Z7reduce0PiS_PiS_, @function
_Z28__device_stub__Z7reduce0PiS_PiS_:
.LFB3664:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce0PiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_Z28__device_stub__Z7reduce0PiS_PiS_, .-_Z28__device_stub__Z7reduce0PiS_PiS_
	.globl	_Z7reduce0PiS_
	.type	_Z7reduce0PiS_, @function
_Z7reduce0PiS_:
.LFB3665:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce0PiS_PiS_
	.cfi_endproc
.LFE3665:
	.size	_Z7reduce0PiS_, .-_Z7reduce0PiS_
	.globl	_Z7reduce0iiPi
	.type	_Z7reduce0iiPi, @function
_Z7reduce0iiPi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdx, %r12
	movl	$1, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%edi, %rbx
	movslq	%ebx, %rsi
	salq	$2, %rsi
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	cmpl	%ebp, %ebx
	movslq	%ebp, %rcx
	cmovle	%rbx, %rcx
	xorl	%r9d, %r9d
	leal	-1(%rcx,%rbx), %eax
	movl	%ecx, 28(%rsp)
	leaq	0(,%rcx,4), %r8
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movl	24(%rsp), %esi
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %eax
	movl	%ebx, 16(%rsp)
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rax, %rcx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z28__device_stub__Z7reduce0PiS_PiS_
.L9:
	call	cudaDeviceSynchronize@PLT
	cmpl	$1, %ebx
	movq	8(%rsp), %rdx
	jle	.L10
	movl	%ebx, %edi
	movl	%ebp, %esi
	call	_Z7reduce0iiPi
	movl	%eax, %ebx
	jmp	.L11
.L10:
	movl	(%rdx), %ebx
.L11:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z7reduce0iiPi, .-_Z7reduce0iiPi
	.globl	_Z28__device_stub__Z7reduce1PiS_PiS_
	.type	_Z28__device_stub__Z7reduce1PiS_PiS_, @function
_Z28__device_stub__Z7reduce1PiS_PiS_:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce1PiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L14:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z28__device_stub__Z7reduce1PiS_PiS_, .-_Z28__device_stub__Z7reduce1PiS_PiS_
	.globl	_Z7reduce1PiS_
	.type	_Z7reduce1PiS_, @function
_Z7reduce1PiS_:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce1PiS_PiS_
	.cfi_endproc
.LFE3667:
	.size	_Z7reduce1PiS_, .-_Z7reduce1PiS_
	.globl	_Z7reduce1iiPi
	.type	_Z7reduce1iiPi, @function
_Z7reduce1iiPi:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdx, %r12
	movl	$1, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%edi, %rbx
	movslq	%ebx, %rsi
	salq	$2, %rsi
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	cmpl	%ebp, %ebx
	movslq	%ebp, %rcx
	cmovle	%rbx, %rcx
	xorl	%r9d, %r9d
	leal	-1(%rcx,%rbx), %eax
	movl	%ecx, 28(%rsp)
	leaq	0(,%rcx,4), %r8
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movl	24(%rsp), %esi
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %eax
	movl	%ebx, 16(%rsp)
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rax, %rcx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z28__device_stub__Z7reduce1PiS_PiS_
.L20:
	call	cudaDeviceSynchronize@PLT
	cmpl	$1, %ebx
	movq	8(%rsp), %rdx
	jle	.L21
	movl	%ebx, %edi
	movl	%ebp, %esi
	call	_Z7reduce1iiPi
	movl	%eax, %ebx
	jmp	.L22
.L21:
	movl	(%rdx), %ebx
.L22:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z7reduce1iiPi, .-_Z7reduce1iiPi
	.globl	_Z28__device_stub__Z7reduce2PiS_PiS_
	.type	_Z28__device_stub__Z7reduce2PiS_PiS_, @function
_Z28__device_stub__Z7reduce2PiS_PiS_:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce2PiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L25:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z28__device_stub__Z7reduce2PiS_PiS_, .-_Z28__device_stub__Z7reduce2PiS_PiS_
	.globl	_Z7reduce2PiS_
	.type	_Z7reduce2PiS_, @function
_Z7reduce2PiS_:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce2PiS_PiS_
	.cfi_endproc
.LFE3669:
	.size	_Z7reduce2PiS_, .-_Z7reduce2PiS_
	.globl	_Z7reduce2iiPi
	.type	_Z7reduce2iiPi, @function
_Z7reduce2iiPi:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdx, %r12
	movl	$1, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%edi, %rbx
	movslq	%ebx, %rsi
	salq	$2, %rsi
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	cmpl	%ebp, %ebx
	movslq	%ebp, %rcx
	cmovle	%rbx, %rcx
	xorl	%r9d, %r9d
	leal	-1(%rcx,%rbx), %eax
	movl	%ecx, 28(%rsp)
	leaq	0(,%rcx,4), %r8
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movl	24(%rsp), %esi
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %eax
	movl	%ebx, 16(%rsp)
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rax, %rcx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	call	_Z28__device_stub__Z7reduce2PiS_PiS_
.L31:
	call	cudaDeviceSynchronize@PLT
	cmpl	$1, %ebx
	movq	8(%rsp), %rdx
	jle	.L32
	movl	%ebx, %edi
	movl	%ebp, %esi
	call	_Z7reduce2iiPi
	movl	%eax, %ebx
	jmp	.L33
.L32:
	movl	(%rdx), %ebx
.L33:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z7reduce2iiPi, .-_Z7reduce2iiPi
	.globl	_Z28__device_stub__Z7reduce3PiS_PiS_
	.type	_Z28__device_stub__Z7reduce3PiS_PiS_, @function
_Z28__device_stub__Z7reduce3PiS_PiS_:
.LFB3670:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7reduce3PiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_Z28__device_stub__Z7reduce3PiS_PiS_, .-_Z28__device_stub__Z7reduce3PiS_PiS_
	.globl	_Z7reduce3PiS_
	.type	_Z7reduce3PiS_, @function
_Z7reduce3PiS_:
.LFB3671:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7reduce3PiS_PiS_
	.cfi_endproc
.LFE3671:
	.size	_Z7reduce3PiS_, .-_Z7reduce3PiS_
	.globl	_Z7reduce3iiPi
	.type	_Z7reduce3iiPi, @function
_Z7reduce3iiPi:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	movl	$1, %edx
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%edi, %rbx
	movslq	%ebx, %rsi
	salq	$2, %rsi
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMallocManaged@PLT
	cmpl	%r12d, %ebx
	movslq	%r12d, %rcx
	cmovle	%rbx, %rcx
	leal	-1(%rcx,%rbx), %eax
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	decl	%eax
	jle	.L42
	movabsq	$4294967297, %rax
	movl	%ebx, %edx
	movl	%ecx, 28(%rsp)
	xorl	%r9d, %r9d
	movq	%rax, 20(%rsp)
	sarl	%edx
	movl	24(%rsp), %esi
	leaq	0(,%rcx,4), %r8
	movq	%rax, 32(%rsp)
	movl	36(%rsp), %eax
	movl	%edx, 16(%rsp)
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rax, %rcx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	call	_Z28__device_stub__Z7reduce3PiS_PiS_
.L43:
	call	cudaDeviceSynchronize@PLT
	cmpl	$2, %ebx
	je	.L45
	movq	8(%rsp), %rdx
	movl	%ebx, %edi
	movl	%r12d, %esi
	call	_Z7reduce3iiPi
	movl	%eax, %ebx
	jmp	.L47
.L42:
	movl	%ecx, %eax
	movl	$2, %esi
	movl	%ebx, 16(%rsp)
	xorl	%r9d, %r9d
	cltd
	idivl	%esi
	movabsq	$4294967297, %rdx
	movq	%rdx, 20(%rsp)
	movq	16(%rsp), %rdi
	movq	%rdx, 32(%rsp)
	movl	24(%rsp), %esi
	movl	36(%rsp), %ecx
	movl	%eax, 28(%rsp)
	cltq
	movq	28(%rsp), %rdx
	leaq	0(,%rax,4), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	8(%rsp), %rsi
	movq	%rbp, %rdi
	call	_Z28__device_stub__Z7reduce3PiS_PiS_
.L46:
	call	cudaDeviceSynchronize@PLT
.L45:
	movq	8(%rsp), %rax
	movl	(%rax), %ebx
.L47:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z7reduce3iiPi, .-_Z7reduce3iiPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Reduce 0: "
.LC1:
	.string	"Reduce 1: "
.LC2:
	.string	"Reduce 2: "
.LC3:
	.string	"Reduce 3: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$1, %edx
	movl	$268435456, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rdx
	xorl	%eax, %eax
.L51:
	movl	$10, (%rdx,%rax,4)
	incq	%rax
	cmpq	$67108864, %rax
	jne	.L51
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC0(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rdx
	movl	$512, %esi
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	_Z7reduce0iiPi
	movq	%rbp, %rdi
	movl	%eax, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbx, %rdi
	leaq	.LC1(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rdx
	movl	$512, %esi
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	_Z7reduce1iiPi
	movq	%rbp, %rdi
	movl	%eax, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbx, %rdi
	leaq	.LC2(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rdx
	movl	$512, %esi
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	_Z7reduce2iiPi
	movq	%rbp, %rdi
	movl	%eax, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbx, %rdi
	leaq	.LC3(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rdx
	movl	$512, %esi
	movl	$67108864, %edi
	movq	%rax, %rbx
	call	_Z7reduce3iiPi
	movq	%rbx, %rdi
	movl	%eax, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z7reduce3PiS_"
.LC5:
	.string	"_Z7reduce2PiS_"
.LC6:
	.string	"_Z7reduce1PiS_"
.LC7:
	.string	"_Z7reduce0PiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3673:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7reduce3PiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce2PiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce1PiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7reduce0PiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3673:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>

__global__ void reduce0(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
    sdata[tid] = d_in[i];
    __syncthreads();
    
    for (unsigned int s=1; s<blockDim.x; s*=2){
        if (tid % (2*s) == 0){
            sdata[tid] += sdata[tid+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce0(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    hipMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    
    reduce0<<<numBlocks, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    hipDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 1){
        ret += reduce0(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    hipFree(d_out);
    return ret;
}

__global__ void reduce1(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
    sdata[tid] = d_in[i];
    __syncthreads();
    
    for (unsigned int s=1; s<blockDim.x; s*=2){
        int index = 2 * s * tid;
        if (index < blockDim.x){
            sdata[index] += sdata[index+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce1(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    hipMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    
    reduce1<<<numBlocks, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    hipDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 1){
        ret += reduce1(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    hipFree(d_out);
    return ret;
}

__global__ void reduce2(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
    sdata[tid] = d_in[i];
    __syncthreads();
    
    for (unsigned int s=blockDim.x/2; s>0; s>>=1){
        if (tid < s){
            sdata[tid] += sdata[tid+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce2(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    hipMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    
    reduce2<<<numBlocks, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    hipDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 1){
        ret += reduce2(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    hipFree(d_out);
    return ret;
}

__global__ void reduce3(int *d_in, int *d_out){
    extern __shared__ int sdata[];
    unsigned int tid = threadIdx.x;
    unsigned int i = blockIdx.x * (blockDim.x*2) + threadIdx.x;
    sdata[tid] = d_in[i] + d_in[i+blockDim.x];
    __syncthreads();
    
    for (unsigned int s=blockDim.x/2; s>0; s>>=1){
        if (tid < s){
            sdata[tid] += sdata[tid+s];
        }
        __syncthreads();
    }
    
    if (tid == 0){
        d_out[blockIdx.x] = sdata[0];
    }
}

int reduce3(int n, int numThread, int *d_in){
    int ret = 0;

    int *d_out;
    hipMallocManaged(&d_out, n*sizeof(int));

    int blockSize = numThread;
    if (n < blockSize){
        blockSize = n;
    }
    int numBlocks = (n + blockSize - 1) / blockSize;
    if (numBlocks > 1){
        reduce3<<<numBlocks/2, blockSize, blockSize*sizeof(int)>>>(d_in, d_out);
    } else {
        reduce3<<<numBlocks, blockSize/2, (blockSize/2)*sizeof(int)>>>(d_in, d_out);
    }
    hipDeviceSynchronize();
//    std::cout << "Reduce 0: " << d_out[0] << std::endl;

    if (numBlocks > 2){
        ret += reduce3(numBlocks, numThread, d_out);
    } else {
        ret += d_out[0];
    }

    hipFree(d_out);
    return ret;
}

int main(){
    int N = 1<<26;
    int blockSize = 512;
    
    int *d_in;
    hipMallocManaged(&d_in, N*sizeof(int));
    for (int i=0; i<N; i++){
        d_in[i] = 10;
    }

    std::cout << "Reduce 0: " << reduce0(N, blockSize, d_in) << std::endl;
    std::cout << "Reduce 1: " << reduce1(N, blockSize, d_in) << std::endl;
    std::cout << "Reduce 2: " << reduce2(N, blockSize, d_in) << std::endl;
    std::cout << "Reduce 3: " << reduce3(N, blockSize, d_in) << std::endl;
    
    /*
     GPU activities:   46.31%  22.244ms         3  7.4145ms  4.5440us  22.190ms  reduce0(int*, int*)
                   24.47%  11.752ms         3  3.9173ms  3.4880us  11.721ms  reduce1(int*, int*)
                   19.71%  9.4677ms         3  3.1559ms  3.2640us  9.4417ms  reduce2(int*, int*)
                    9.51%  4.5690ms         3  1.5230ms  3.2000us  4.5509ms  reduce3(int*, int*)
    */

    hipFree(d_in);

    return 0;
}

	.text
	.file	"cuda_reduce.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__reduce0PiS_  # -- Begin function _Z22__device_stub__reduce0PiS_
	.type	_Z22__device_stub__reduce0PiS_,@function
_Z22__device_stub__reduce0PiS_:         # @_Z22__device_stub__reduce0PiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce0PiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__reduce0PiS_, .Lfunc_end0-_Z22__device_stub__reduce0PiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7reduce0iiPi                  # -- Begin function _Z7reduce0iiPi
	.type	_Z7reduce0iiPi,@function
_Z7reduce0iiPi:                         # @_Z7reduce0iiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movl	%esi, %ebx
	movslq	%edi, %r15
	leaq	(,%r15,4), %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	%ebx, %r15d
	movl	%ebx, %ecx
	cmovll	%r15d, %ecx
	leal	(%r15,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %r15d
	movslq	%ecx, %r8
	shlq	$2, %r8
	movq	%r15, %rdi
	btsq	$32, %rdi
	btsq	$32, %rcx
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	callq	_Z22__device_stub__reduce0PiS_
.LBB1_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdx
	cmpl	$2, %r15d
	jl	.LBB1_4
# %bb.3:
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_Z7reduce0iiPi
	movl	%eax, %ebx
	movq	8(%rsp), %rdx
	jmp	.LBB1_5
.LBB1_4:
	movl	(%rdx), %ebx
.LBB1_5:
	movq	%rdx, %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z7reduce0iiPi, .Lfunc_end1-_Z7reduce0iiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce1PiS_  # -- Begin function _Z22__device_stub__reduce1PiS_
	.type	_Z22__device_stub__reduce1PiS_,@function
_Z22__device_stub__reduce1PiS_:         # @_Z22__device_stub__reduce1PiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce1PiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z22__device_stub__reduce1PiS_, .Lfunc_end2-_Z22__device_stub__reduce1PiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7reduce1iiPi                  # -- Begin function _Z7reduce1iiPi
	.type	_Z7reduce1iiPi,@function
_Z7reduce1iiPi:                         # @_Z7reduce1iiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movl	%esi, %ebx
	movslq	%edi, %r15
	leaq	(,%r15,4), %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	%ebx, %r15d
	movl	%ebx, %ecx
	cmovll	%r15d, %ecx
	leal	(%r15,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %r15d
	movslq	%ecx, %r8
	shlq	$2, %r8
	movq	%r15, %rdi
	btsq	$32, %rdi
	btsq	$32, %rcx
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	callq	_Z22__device_stub__reduce1PiS_
.LBB3_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdx
	cmpl	$2, %r15d
	jl	.LBB3_4
# %bb.3:
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_Z7reduce1iiPi
	movl	%eax, %ebx
	movq	8(%rsp), %rdx
	jmp	.LBB3_5
.LBB3_4:
	movl	(%rdx), %ebx
.LBB3_5:
	movq	%rdx, %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z7reduce1iiPi, .Lfunc_end3-_Z7reduce1iiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce2PiS_  # -- Begin function _Z22__device_stub__reduce2PiS_
	.type	_Z22__device_stub__reduce2PiS_,@function
_Z22__device_stub__reduce2PiS_:         # @_Z22__device_stub__reduce2PiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce2PiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z22__device_stub__reduce2PiS_, .Lfunc_end4-_Z22__device_stub__reduce2PiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7reduce2iiPi                  # -- Begin function _Z7reduce2iiPi
	.type	_Z7reduce2iiPi,@function
_Z7reduce2iiPi:                         # @_Z7reduce2iiPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movl	%esi, %ebx
	movslq	%edi, %r15
	leaq	(,%r15,4), %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	%ebx, %r15d
	movl	%ebx, %ecx
	cmovll	%r15d, %ecx
	leal	(%r15,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %r15d
	movslq	%ecx, %r8
	shlq	$2, %r8
	movq	%r15, %rdi
	btsq	$32, %rdi
	btsq	$32, %rcx
	movl	$1, %esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	callq	_Z22__device_stub__reduce2PiS_
.LBB5_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdx
	cmpl	$2, %r15d
	jl	.LBB5_4
# %bb.3:
	movl	%r15d, %edi
	movl	%ebx, %esi
	callq	_Z7reduce2iiPi
	movl	%eax, %ebx
	movq	8(%rsp), %rdx
	jmp	.LBB5_5
.LBB5_4:
	movl	(%rdx), %ebx
.LBB5_5:
	movq	%rdx, %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z7reduce2iiPi, .Lfunc_end5-_Z7reduce2iiPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__reduce3PiS_  # -- Begin function _Z22__device_stub__reduce3PiS_
	.type	_Z22__device_stub__reduce3PiS_,@function
_Z22__device_stub__reduce3PiS_:         # @_Z22__device_stub__reduce3PiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce3PiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z22__device_stub__reduce3PiS_, .Lfunc_end6-_Z22__device_stub__reduce3PiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7reduce3iiPi                  # -- Begin function _Z7reduce3iiPi
	.type	_Z7reduce3iiPi,@function
_Z7reduce3iiPi:                         # @_Z7reduce3iiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movl	%esi, %ebp
	movabsq	$4294967296, %r15               # imm = 0x100000000
	movslq	%edi, %r14
	leaq	(,%r14,4), %rsi
	movq	%rsp, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	%ebp, %r14d
	movl	%ebp, %ecx
	cmovll	%r14d, %ecx
	leal	(%r14,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %r14d
	cmpl	$2, %eax
	jl	.LBB7_5
# %bb.1:
	movl	%r14d, %edi
	shrl	%edi
	movslq	%ecx, %r8
	shlq	$2, %r8
	orq	%r15, %rdi
	movl	%ecx, %edx
	orq	%r15, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_3
# %bb.2:
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_Z22__device_stub__reduce3PiS_
.LBB7_3:
	callq	hipDeviceSynchronize
	cmpl	$2, %r14d
	je	.LBB7_8
# %bb.4:
	movq	(%rsp), %rdx
	movl	%r14d, %edi
	movl	%ebp, %esi
	callq	_Z7reduce3iiPi
	movl	%eax, %ebx
	movq	(%rsp), %rdi
	jmp	.LBB7_9
.LBB7_5:
	movl	%ecx, %edx
	shrl	$31, %edx
	addl	%ecx, %edx
	sarl	%edx
	movslq	%edx, %r8
	shlq	$2, %r8
	movl	%r14d, %edi
	orq	%r15, %rdi
	orq	%r15, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.6:
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	callq	_Z22__device_stub__reduce3PiS_
.LBB7_7:                                # %.thread
	callq	hipDeviceSynchronize
.LBB7_8:
	movq	(%rsp), %rdi
	movl	(%rdi), %ebx
.LBB7_9:
	callq	hipFree
	movl	%ebx, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z7reduce3iiPi, .Lfunc_end7-_Z7reduce3iiPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	leaq	8(%rsp), %rbx
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%eax, %eax
	movq	(%rbx), %rcx
.LBB8_1:                                # =>This Inner Loop Header: Depth=1
	movl	$10, (%rcx,%rax,4)
	incq	%rax
	cmpq	$67108864, %rax                 # imm = 0x4000000
	jne	.LBB8_1
# %bb.2:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rsp), %rdx
	movl	$67108864, %edi                 # imm = 0x4000000
	movl	$512, %esi                      # imm = 0x200
	callq	_Z7reduce0iiPi
	movl	$_ZSt4cout, %edi
	movl	%eax, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rsp), %rdx
	movl	$67108864, %edi                 # imm = 0x4000000
	movl	$512, %esi                      # imm = 0x200
	callq	_Z7reduce1iiPi
	movl	$_ZSt4cout, %edi
	movl	%eax, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rsp), %rdx
	movl	$67108864, %edi                 # imm = 0x4000000
	movl	$512, %esi                      # imm = 0x200
	callq	_Z7reduce2iiPi
	movl	$_ZSt4cout, %edi
	movl	%eax, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	8(%rsp), %rdx
	movl	$67108864, %edi                 # imm = 0x4000000
	movl	$512, %esi                      # imm = 0x200
	callq	_Z7reduce3iiPi
	movl	$_ZSt4cout, %edi
	movl	%eax, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce0PiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce1PiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce2PiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce3PiS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7reduce0PiS_,@object          # @_Z7reduce0PiS_
	.section	.rodata,"a",@progbits
	.globl	_Z7reduce0PiS_
	.p2align	3, 0x0
_Z7reduce0PiS_:
	.quad	_Z22__device_stub__reduce0PiS_
	.size	_Z7reduce0PiS_, 8

	.type	_Z7reduce1PiS_,@object          # @_Z7reduce1PiS_
	.globl	_Z7reduce1PiS_
	.p2align	3, 0x0
_Z7reduce1PiS_:
	.quad	_Z22__device_stub__reduce1PiS_
	.size	_Z7reduce1PiS_, 8

	.type	_Z7reduce2PiS_,@object          # @_Z7reduce2PiS_
	.globl	_Z7reduce2PiS_
	.p2align	3, 0x0
_Z7reduce2PiS_:
	.quad	_Z22__device_stub__reduce2PiS_
	.size	_Z7reduce2PiS_, 8

	.type	_Z7reduce3PiS_,@object          # @_Z7reduce3PiS_
	.globl	_Z7reduce3PiS_
	.p2align	3, 0x0
_Z7reduce3PiS_:
	.quad	_Z22__device_stub__reduce3PiS_
	.size	_Z7reduce3PiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Reduce 0: "
	.size	.L.str, 11

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Reduce 1: "
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Reduce 2: "
	.size	.L.str.2, 11

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Reduce 3: "
	.size	.L.str.3, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7reduce0PiS_"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7reduce1PiS_"
	.size	.L__unnamed_2, 15

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z7reduce2PiS_"
	.size	.L__unnamed_3, 15

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z7reduce3PiS_"
	.size	.L__unnamed_4, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__reduce0PiS_
	.addrsig_sym _Z22__device_stub__reduce1PiS_
	.addrsig_sym _Z22__device_stub__reduce2PiS_
	.addrsig_sym _Z22__device_stub__reduce3PiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7reduce0PiS_
	.addrsig_sym _Z7reduce1PiS_
	.addrsig_sym _Z7reduce2PiS_
	.addrsig_sym _Z7reduce3PiS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7reduce0PiS_          ; -- Begin function _Z7reduce0PiS_
	.globl	_Z7reduce0PiS_
	.p2align	8
	.type	_Z7reduce0PiS_,@function
_Z7reduce0PiS_:                         ; @_Z7reduce0PiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s1, 1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s0, s1, 1
	s_add_i32 s6, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, s6, v0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v2, s1, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_ge_u32 s0, s5
	s_mov_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce0PiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7reduce0PiS_, .Lfunc_end0-_Z7reduce0PiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce1PiS_          ; -- Begin function _Z7reduce1PiS_
	.globl	_Z7reduce1PiS_
	.p2align	8
	.type	_Z7reduce1PiS_,@function
_Z7reduce1PiS_:                         ; @_Z7reduce1PiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s1, 1
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s0, s1, 1
	s_mov_b32 s6, exec_lo
	v_mul_lo_u32 v1, s0, v0
	v_cmpx_gt_u32_e64 s5, v1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshl_add_u32 v1, v1, 2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, s1, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_ge_u32 s0, s5
	s_mov_b32 s1, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB1_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce1PiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7reduce1PiS_, .Lfunc_end1-_Z7reduce1PiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 316
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce2PiS_          ; -- Begin function _Z7reduce2PiS_
	.globl	_Z7reduce2PiS_
	.p2align	8
	.type	_Z7reduce2PiS_,@function
_Z7reduce2PiS_:                         ; @_Z7reduce2PiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_4:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB2_1
.LBB2_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce2PiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z7reduce2PiS_, .Lfunc_end2-_Z7reduce2PiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7reduce3PiS_          ; -- Begin function _Z7reduce3PiS_
	.globl	_Z7reduce3PiS_
	.p2align	8
	.type	_Z7reduce3PiS_,@function
_Z7reduce3PiS_:                         ; @_Z7reduce3PiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_mul_i32 s6, s15, s5
	s_cmp_lt_u32 s5, 2
	v_lshl_add_u32 v1, s6, 1, v0
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v3
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB3_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_1 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB3_4
; %bb.3:                                ;   in Loop: Header=BB3_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB3_4:                                ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB3_1
.LBB3_5:                                ; %._crit_edge
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	ds_load_b32 v1, v0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB3_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce3PiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z7reduce3PiS_, .Lfunc_end3-_Z7reduce3PiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce0PiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce0PiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce1PiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce1PiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce2PiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce2PiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce3PiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce3PiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
