#include <stdio.h>
#include <stdlib.h>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>
#include <time.h>

#define AND 0
#define OR 1
#define NAND 2
#define NOR 3
#define XOR 4
#define XNOR 5

__global__ void computeLogicGates(char* d_input, char* d_output, int size) {
    // calculate the index of the thread
    int index = threadIdx.x + blockIdx.x * blockDim.x;
    int input_index = index * 3;
    // if the index is inside the range of the array
    if (input_index < size) {
        int output;
        switch (d_input[input_index+2] - '0') {
            case AND:
                if (d_input[input_index] == '1' && d_input[input_index+1] == '1') output = 1;
                else output = 0;
                break;
            case OR:
                if (d_input[input_index] == '0' && d_input[input_index+1] == '0') output = 0;
                else output = 1;
                break;
            case NAND:
                if (d_input[input_index] == '1' && d_input[input_index+1] == '1') output = 0;
                else output = 1;                
                break;
            case NOR:
                if (d_input[input_index] == '0' && d_input[input_index+1] == '0') output = 1;
                else output = 0;                
                break;
            case XOR:
                if (d_input[input_index] == d_input[input_index+1]) output = 0;
                else output = 1;
                break;
            case XNOR:
                if (d_input[input_index] == d_input[input_index+1]) output = 1;
                else output = 0;                
                break;                
        }
        d_output[index] = output + '0';
    }
}

int main(int argc, char* argv[]) {
    // check if necessary arguments are provided
    if (argc == 1) {
        return printf("No arguments are provided! Please provide the input file path, input file length and the output file path!");
    }
    else if (argc == 2) {
        return printf("Input file length and output file path are not provided!");
    }
    else if (argc == 3) {
        return printf("Output file path is not provided!");
    }

    char* input_file = argv[1];
    int input_size = atoi(argv[2]);
    char* output_file = argv[3];

    // read the input file
    FILE* input_fptr;
    input_fptr = fopen(input_file, "r");
    if (!input_fptr) return printf("Error opening the input file!");

    // read the file line by line and populate input_data array
    char line[10];

    // allocate CUDA variables
    char* d_input;
    char* d_output;
    int input_array_size = input_size * 3 * sizeof(char);
    int output_array_size = input_size * sizeof(char);
    
    cudaMallocManaged(&d_input, input_array_size);
    cudaMallocManaged(&d_output, output_array_size);

    for (int i = 0; i < input_size; i++) {
        fgets(line, 9, input_fptr);
        d_input[i*3] = line[0];
        d_input[i*3+1] = line[2];
        d_input[i*3+2] = line[4];
    }

    // close file pointer
    fclose(input_fptr);

    clock_t start = clock();

    // call device kernel
    computeLogicGates<<<input_size, 1>>>(d_input, d_output, input_array_size);

    // synchronize threads
    cudaDeviceSynchronize();

    clock_t end = clock();

    // write the results into the output file
    FILE* output_fptr;
    output_fptr = fopen(output_file, "w");
    if(!output_fptr) return printf("Error opening output file!");
    for (int i = 0; i < input_size; i++) {
        char data[3];
        sprintf(data, "%c\n", d_output[i]);
        fputs(data, output_fptr);
    }

    // close file pointer
    fclose(output_fptr);

    // free up device memory
    cudaFree(d_input);
    cudaFree(d_output);

    // calculate execution time
    double runtime = (double) (end-start) / CLOCKS_PER_SEC;
    printf("Execution time: %f ms\n", runtime * 1000);

    return 0;
}
	.file	"tmpxft_00246706_00000000-6_parallelal_unified.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i
	.type	_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i, @function
_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z17computeLogicGatesPcS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i, .-_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i
	.globl	_Z17computeLogicGatesPcS_i
	.type	_Z17computeLogicGatesPcS_i, @function
_Z17computeLogicGatesPcS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i
	.cfi_endproc
.LFE2053:
	.size	_Z17computeLogicGatesPcS_i, .-_Z17computeLogicGatesPcS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"No arguments are provided! Please provide the input file path, input file length and the output file path!"
.LC1:
	.string	"Input file length and output file path are not provided!"
.LC2:
	.string	"Output file path is not provided!"
.LC3:
	.string	"r"
.LC4:
	.string	"Error opening the input file!"
.LC5:
	.string	"w"
.LC6:
	.string	"Error opening output file!"
.LC7:
	.string	"%c\n"
.LC10:
	.string	"Execution time: %f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$1, %edi
	jne	.L9
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	leaq	.LC0(%rip), %rsi
	je	.L27
	jmp	.L28
.L9:
	cmpl	$2, %edi
	jne	.L11
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	leaq	.LC1(%rip), %rsi
	je	.L27
	jmp	.L28
.L11:
	cmpl	$3, %edi
	jne	.L13
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	leaq	.LC2(%rip), %rsi
	je	.L27
	jmp	.L28
.L13:
	movq	16(%rsi), %rdi
	movq	8(%rsi), %r12
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	%r12, %rdi
	leaq	.LC3(%rip), %rsi
	movl	%eax, %ebx
	movq	24(%rbp), %rax
	movq	%rax, 8(%rsp)
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L15
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	leaq	.LC4(%rip), %rsi
	jne	.L28
.L27:
	addq	$88, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L15:
	.cfi_restore_state
	leal	(%rbx,%rbx,2), %r15d
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	xorl	%ebp, %ebp
	movslq	%r15d, %rsi
	xorl	%r13d, %r13d
	leaq	62(%rsp), %r14
	call	cudaMallocManaged@PLT
	movslq	%ebx, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
.L17:
	cmpl	%ebx, %r13d
	jge	.L29
	movl	$9, %edx
	movq	%r12, %rcx
	movl	$10, %esi
	movq	%r14, %rdi
	call	__fgets_chk@PLT
	movb	62(%rsp), %dl
	movq	16(%rsp), %rax
	incl	%r13d
	movb	%dl, (%rax,%rbp)
	movb	64(%rsp), %dl
	movq	16(%rsp), %rax
	movb	%dl, 1(%rax,%rbp)
	movb	66(%rsp), %dl
	movq	16(%rsp), %rax
	movb	%dl, 2(%rax,%rbp)
	addq	$3, %rbp
	jmp	.L17
.L29:
	movq	%r12, %rdi
	call	fclose@PLT
	call	clock@PLT
	movl	%ebx, 32(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, 52(%rsp)
	movq	%rax, %r14
	movabsq	$4294967297, %rdx
	movq	%rdx, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	movq	%rdx, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	%r15d, %edx
	call	_Z40__device_stub__Z17computeLogicGatesPcS_iPcS_i
.L19:
	call	cudaDeviceSynchronize@PLT
	xorl	%r13d, %r13d
	leaq	.LC7(%rip), %r15
	call	clock@PLT
	movq	8(%rsp), %rdi
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rbp
	call	fopen@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	jne	.L20
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L8
.L20:
	cmpl	%r13d, %ebx
	jle	.L30
	movq	24(%rsp), %rax
	leaq	59(%rsp), %rdi
	movq	%r15, %rcx
	movl	$3, %edx
	movl	$2, %esi
	movq	%rdi, 8(%rsp)
	movsbl	(%rax,%r13), %r8d
	xorl	%eax, %eax
	incq	%r13
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	fputs@PLT
	jmp	.L20
.L30:
	movq	%r12, %rdi
	subq	%r14, %rbp
	call	fclose@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	cvtsi2sdq	%rbp, %xmm0
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	divsd	.LC8(%rip), %xmm0
	mulsd	.LC9(%rip), %xmm0
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L8:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
.L28:
	call	__stack_chk_fail@PLT
.L23:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z17computeLogicGatesPcS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17computeLogicGatesPcS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.align 8
.LC9:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>

#include <time.h>

#define AND 0
#define OR 1
#define NAND 2
#define NOR 3
#define XOR 4
#define XNOR 5

__global__ void computeLogicGates(char* d_input, char* d_output, int size) {
    // calculate the index of the thread
    int index = threadIdx.x + blockIdx.x * blockDim.x;
    int input_index = index * 3;
    // if the index is inside the range of the array
    if (input_index < size) {
        int output;
        switch (d_input[input_index+2] - '0') {
            case AND:
                if (d_input[input_index] == '1' && d_input[input_index+1] == '1') output = 1;
                else output = 0;
                break;
            case OR:
                if (d_input[input_index] == '0' && d_input[input_index+1] == '0') output = 0;
                else output = 1;
                break;
            case NAND:
                if (d_input[input_index] == '1' && d_input[input_index+1] == '1') output = 0;
                else output = 1;                
                break;
            case NOR:
                if (d_input[input_index] == '0' && d_input[input_index+1] == '0') output = 1;
                else output = 0;                
                break;
            case XOR:
                if (d_input[input_index] == d_input[input_index+1]) output = 0;
                else output = 1;
                break;
            case XNOR:
                if (d_input[input_index] == d_input[input_index+1]) output = 1;
                else output = 0;                
                break;                
        }
        d_output[index] = output + '0';
    }
}

int main(int argc, char* argv[]) {
    // check if necessary arguments are provided
    if (argc == 1) {
        return printf("No arguments are provided! Please provide the input file path, input file length and the output file path!");
    }
    else if (argc == 2) {
        return printf("Input file length and output file path are not provided!");
    }
    else if (argc == 3) {
        return printf("Output file path is not provided!");
    }

    char* input_file = argv[1];
    int input_size = atoi(argv[2]);
    char* output_file = argv[3];

    // read the input file
    FILE* input_fptr;
    input_fptr = fopen(input_file, "r");
    if (!input_fptr) return printf("Error opening the input file!");

    // read the file line by line and populate input_data array
    char line[10];

    // allocate CUDA variables
    char* d_input;
    char* d_output;
    int input_array_size = input_size * 3 * sizeof(char);
    int output_array_size = input_size * sizeof(char);
    
    hipMallocManaged(&d_input, input_array_size);
    hipMallocManaged(&d_output, output_array_size);

    for (int i = 0; i < input_size; i++) {
        fgets(line, 9, input_fptr);
        d_input[i*3] = line[0];
        d_input[i*3+1] = line[2];
        d_input[i*3+2] = line[4];
    }

    // close file pointer
    fclose(input_fptr);

    clock_t start = clock();

    // call device kernel
    computeLogicGates<<<input_size, 1>>>(d_input, d_output, input_array_size);

    // synchronize threads
    hipDeviceSynchronize();

    clock_t end = clock();

    // write the results into the output file
    FILE* output_fptr;
    output_fptr = fopen(output_file, "w");
    if(!output_fptr) return printf("Error opening output file!");
    for (int i = 0; i < input_size; i++) {
        char data[3];
        sprintf(data, "%c\n", d_output[i]);
        fputs(data, output_fptr);
    }

    // close file pointer
    fclose(output_fptr);

    // free up device memory
    hipFree(d_input);
    hipFree(d_output);

    // calculate execution time
    double runtime = (double) (end-start) / CLOCKS_PER_SEC;
    printf("Execution time: %f ms\n", runtime * 1000);

    return 0;
}
	.text
	.file	"parallelal_unified.hip"
	.globl	_Z32__device_stub__computeLogicGatesPcS_i # -- Begin function _Z32__device_stub__computeLogicGatesPcS_i
	.type	_Z32__device_stub__computeLogicGatesPcS_i,@function
_Z32__device_stub__computeLogicGatesPcS_i: # @_Z32__device_stub__computeLogicGatesPcS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17computeLogicGatesPcS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__computeLogicGatesPcS_i, .Lfunc_end0-_Z32__device_stub__computeLogicGatesPcS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	je	.LBB1_6
# %bb.1:
	cmpl	$2, %edi
	je	.LBB1_5
# %bb.2:
	cmpl	$1, %edi
	jne	.LBB1_7
# %bb.3:
	movl	$.L.str, %edi
	jmp	.LBB1_4
.LBB1_5:
	movl	$.L.str.1, %edi
	jmp	.LBB1_4
.LBB1_6:
	movl	$.L.str.2, %edi
	jmp	.LBB1_4
.LBB1_7:
	movq	%rsi, %r14
	movq	8(%rsi), %r15
	movq	16(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	24(%r14), %r14
	movl	$.L.str.3, %esi
	movq	%r15, %rdi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_8
# %bb.9:
	movq	%rax, %r15
	leal	(%rbx,%rbx,2), %ebp
	movslq	%ebp, %rsi
	movslq	%ebx, %r12
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%r12d, %r12d
	jle	.LBB1_10
# %bb.18:                               # %.lr.ph
	movl	%ebp, 28(%rsp)                  # 4-byte Spill
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movl	%ebx, %r13d
	leaq	(,%r13,2), %r14
	addq	%r13, %r14
	xorl	%ebp, %ebp
	leaq	35(%rsp), %r12
.LBB1_19:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$9, %esi
	movq	%r15, %rdx
	callq	fgets
	movb	35(%rsp), %al
	movq	8(%rsp), %rcx
	movb	%al, (%rcx,%rbp)
	movb	37(%rsp), %al
	movq	8(%rsp), %rcx
	movb	%al, 1(%rcx,%rbp)
	movb	39(%rsp), %al
	movq	8(%rsp), %rcx
	movb	%al, 2(%rcx,%rbp)
	addq	$3, %rbp
	cmpq	%rbp, %r14
	jne	.LBB1_19
# %bb.20:
	movq	48(%rsp), %r14                  # 8-byte Reload
	movl	28(%rsp), %ebp                  # 4-byte Reload
	jmp	.LBB1_11
.LBB1_8:
	movl	$.L.str.4, %edi
.LBB1_4:
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB1_10:                               # %.._crit_edge_crit_edge
	.cfi_def_cfa_offset 112
	movl	%ebx, %r13d
.LBB1_11:                               # %._crit_edge
	movq	%r15, %rdi
	callq	fclose
	callq	clock
	movq	%rax, %r15
	movq	%r13, %rdi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$1, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z32__device_stub__computeLogicGatesPcS_i
.LBB1_13:
	callq	hipDeviceSynchronize
	callq	clock
	movq	%rax, %r12
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	callq	fopen
	testq	%rax, %rax
	je	.LBB1_21
# %bb.14:                               # %.preheader
	movq	%rax, %r14
	testl	%ebx, %ebx
	jle	.LBB1_17
# %bb.15:                               # %.lr.ph48.preheader
	leaq	45(%rsp), %rbx
	xorl	%ebp, %ebp
.LBB1_16:                               # %.lr.ph48
                                        # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rax
	movsbl	(%rax,%rbp), %edx
	movl	$.L.str.7, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	sprintf
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	fputs
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB1_16
.LBB1_17:                               # %._crit_edge49
	movq	%r14, %rdi
	callq	fclose
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	subq	%r15, %r12
	cvtsi2sd	%r12, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	mulsd	.LCPI1_1(%rip), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	jmp	.LBB1_22
.LBB1_21:
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
.LBB1_22:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17computeLogicGatesPcS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17computeLogicGatesPcS_i,@object # @_Z17computeLogicGatesPcS_i
	.section	.rodata,"a",@progbits
	.globl	_Z17computeLogicGatesPcS_i
	.p2align	3, 0x0
_Z17computeLogicGatesPcS_i:
	.quad	_Z32__device_stub__computeLogicGatesPcS_i
	.size	_Z17computeLogicGatesPcS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"No arguments are provided! Please provide the input file path, input file length and the output file path!"
	.size	.L.str, 107

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Input file length and output file path are not provided!"
	.size	.L.str.1, 57

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Output file path is not provided!"
	.size	.L.str.2, 34

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"r"
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Error opening the input file!"
	.size	.L.str.4, 30

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"w"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Error opening output file!"
	.size	.L.str.6, 27

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%c\n"
	.size	.L.str.7, 4

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Execution time: %f ms\n"
	.size	.L.str.8, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17computeLogicGatesPcS_i"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__computeLogicGatesPcS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17computeLogicGatesPcS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17computeLogicGatesPcS_i ; -- Begin function _Z17computeLogicGatesPcS_i
	.globl	_Z17computeLogicGatesPcS_i
	.p2align	8
	.type	_Z17computeLogicGatesPcS_i,@function
_Z17computeLogicGatesPcS_i:             ; @_Z17computeLogicGatesPcS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_lshl_add_u32 v0, v1, 1, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB0_42
; %bb.1:                                ; %NodeBlock102
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr0
	global_load_u8 v4, v[2:3], off offset:2
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i16_e32 50, v4
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_17
; %bb.2:                                ; %NodeBlock100
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_lt_i16_e32 51, v4
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_10
; %bb.3:                                ; %NodeBlock98
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_lt_i16_e32 52, v4
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %LeafBlock96
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_eq_u16_e32 53, v4
	s_cbranch_execz .LBB0_6
; %bb.5:
	global_load_u16 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v2, 0xff, v0
	v_lshrrev_b16 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u16_e32 vcc_lo, v2, v0
	v_cndmask_b32_e64 v0, 48, 49, vcc_lo
.LBB0_6:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_7:                                ; %Flow104
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_9
; %bb.8:
	global_load_u16 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v2, 0xff, v0
	v_lshrrev_b16 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u16_e32 vcc_lo, v2, v0
	v_cndmask_b32_e64 v0, 49, 48, vcc_lo
.LBB0_9:                                ; %Flow105
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_10:                               ; %Flow109
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_16
; %bb.11:
	global_load_u8 v0, v[2:3], off
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $sgpr6
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s4, 48, v0
	v_cmpx_eq_u16_e32 48, v0
	s_cbranch_execz .LBB0_13
; %bb.12:
	global_load_u8 v0, v[2:3], off offset:1
	s_and_not1_b32 s4, s4, exec_lo
	s_mov_b32 s6, 49
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 48, v0
	s_and_b32 s7, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, s7
.LBB0_13:                               ; %Flow107
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, s6
	s_and_saveexec_b32 s5, s4
; %bb.14:
	v_mov_b32_e32 v0, 48
; %bb.15:                               ; %Flow108
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_16:                               ; %Flow110
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_17:                               ; %Flow125
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_41
; %bb.18:                               ; %NodeBlock94
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_lt_i16_e32 48, v4
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_32
; %bb.19:                               ; %NodeBlock
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_lt_i16_e32 49, v4
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB0_25
; %bb.20:
	global_load_u8 v0, v[2:3], off
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $sgpr7
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s5, 49, v0
	v_cmpx_eq_u16_e32 49, v0
	s_cbranch_execz .LBB0_22
; %bb.21:
	global_load_u8 v0, v[2:3], off offset:1
	s_and_not1_b32 s5, s5, exec_lo
	s_mov_b32 s7, 48
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 49, v0
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s5, s8
.LBB0_22:                               ; %Flow112
	s_or_b32 exec_lo, exec_lo, s6
	v_mov_b32_e32 v0, s7
	s_and_saveexec_b32 s6, s5
; %bb.23:
	v_mov_b32_e32 v0, 49
; %bb.24:                               ; %Flow113
	s_or_b32 exec_lo, exec_lo, s6
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_25:                               ; %Flow117
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB0_31
; %bb.26:
	global_load_u8 v0, v[2:3], off
	s_mov_b32 s6, 48
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s5, 48, v0
	v_cmpx_eq_u16_e32 48, v0
	s_cbranch_execz .LBB0_28
; %bb.27:
	global_load_u8 v0, v[2:3], off offset:1
	s_and_not1_b32 s5, s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 48, v0
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s5, s8
.LBB0_28:                               ; %Flow115
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v0, s6
	s_and_saveexec_b32 s6, s5
; %bb.29:
	v_mov_b32_e32 v0, 49
; %bb.30:                               ; %Flow116
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_31:                               ; %Flow118
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_32:                               ; %Flow123
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB0_40
; %bb.33:                               ; %LeafBlock
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr0
	v_cmpx_eq_u16_e32 48, v4
	s_cbranch_execz .LBB0_39
; %bb.34:
	global_load_u8 v0, v[2:3], off
	s_mov_b32 s6, 49
	s_mov_b32 s7, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e64 s5, 49, v0
	v_cmpx_eq_u16_e32 49, v0
	s_cbranch_execz .LBB0_36
; %bb.35:
	global_load_u8 v0, v[2:3], off offset:1
	s_and_not1_b32 s5, s5, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ne_u16_e32 vcc_lo, 49, v0
	s_and_b32 s8, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s5, s8
.LBB0_36:                               ; %Flow120
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v0, s6
	s_and_saveexec_b32 s6, s5
; %bb.37:
	v_mov_b32_e32 v0, 48
; %bb.38:                               ; %Flow121
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_39:                               ; %Flow122
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_40:                               ; %Flow124
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_41:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b8 v[1:2], v0, off
.LBB0_42:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17computeLogicGatesPcS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17computeLogicGatesPcS_i, .Lfunc_end0-_Z17computeLogicGatesPcS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 784
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17computeLogicGatesPcS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17computeLogicGatesPcS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
