#define TILE_DIM 32

template<typename T>
__device__ void vectorDotVector(const T* A, const T* B, T* result, const int length) {
  __shared__ T a_tile[TILE_DIM];
  __shared__ T b_tile[TILE_DIM];

  __shared__ T result_tile[TILE_DIM];
  for (int i = 0; i < TILE_DIM; i++) {
    result_tile[i] = 0;
  }

  int tx = threadIdx.x;

  for (int t = 0; t < (length - 1) / TILE_DIM + 1; t++) {
    int index = t * TILE_DIM + tx;
    if (index < length) {
      a_tile[tx] = A[index];
      b_tile[tx] = B[index];
    } else {
      a_tile[tx] = 0;
      b_tile[tx] = 0;
    }
    __syncthreads();

    result_tile[tx] += a_tile[tx] * b_tile[tx];
    __syncthreads();
  }

  T resultValue = 0;
  if (tx == 0) {
    for (int i = 0; i < TILE_DIM; i++) {
      resultValue += result_tile[i];
    }
    result[0] = resultValue;
  }
}

template<typename T>
__device__ void columnDotRow(const T* vectorA, const T* vectorB, T* resultMatrix,
                             const int lengthA, const int lengthB) {
  __shared__ T vectorA_tile[TILE_DIM];
  __shared__ T vectorB_tile[TILE_DIM];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int row = by * blockDim.y + ty;
  int col = bx * blockDim.x + tx;

  if (ty == 0) {
    if (row + tx < lengthA) {
      vectorA_tile[tx] = vectorA[row + tx];
    }
    if (col < lengthB) {
      vectorB_tile[tx] = vectorB[col];
    }
  }
  __syncthreads();

  if (row < lengthA && col < lengthB) {
    resultMatrix[row * lengthB + col] = vectorA_tile[ty] * vectorB_tile[tx];
  }
}
	.file	"tmpxft_002298ff_00000000-6_Vector2VectorTensor.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define TILE_DIM 32

template<typename T>
__device__ void vectorDotVector(const T* A, const T* B, T* result, const int length) {
  __shared__ T a_tile[TILE_DIM];
  __shared__ T b_tile[TILE_DIM];

  __shared__ T result_tile[TILE_DIM];
  for (int i = 0; i < TILE_DIM; i++) {
    result_tile[i] = 0;
  }

  int tx = threadIdx.x;

  for (int t = 0; t < (length - 1) / TILE_DIM + 1; t++) {
    int index = t * TILE_DIM + tx;
    if (index < length) {
      a_tile[tx] = A[index];
      b_tile[tx] = B[index];
    } else {
      a_tile[tx] = 0;
      b_tile[tx] = 0;
    }
    __syncthreads();

    result_tile[tx] += a_tile[tx] * b_tile[tx];
    __syncthreads();
  }

  T resultValue = 0;
  if (tx == 0) {
    for (int i = 0; i < TILE_DIM; i++) {
      resultValue += result_tile[i];
    }
    result[0] = resultValue;
  }
}

template<typename T>
__device__ void columnDotRow(const T* vectorA, const T* vectorB, T* resultMatrix,
                             const int lengthA, const int lengthB) {
  __shared__ T vectorA_tile[TILE_DIM];
  __shared__ T vectorB_tile[TILE_DIM];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int row = by * blockDim.y + ty;
  int col = bx * blockDim.x + tx;

  if (ty == 0) {
    if (row + tx < lengthA) {
      vectorA_tile[tx] = vectorA[row + tx];
    }
    if (col < lengthB) {
      vectorB_tile[tx] = vectorB[col];
    }
  }
  __syncthreads();

  if (row < lengthA && col < lengthB) {
    resultMatrix[row * lengthB + col] = vectorA_tile[ty] * vectorB_tile[tx];
  }
}
	.text
	.file	"Vector2VectorTensor.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
