#include "cuda_runtime.h"
#include <stdio.h>

#include <time.h>

//#define SIZE  1000

using namespace std;

__global__ void Convolution1(int *a,int *filter,int *result,int size_a,int size_filter,int size_result)

{

        int i=blockIdx.x;
		int j=blockIdx.y;

        if(i<size_result||j<size_result)
        {
                for(int k=0;k<size_filter;k++)
                        for(int l=0;l<size_filter;l++)
                                result[i*size_result+j] += filter[k*size_filter+l]*a[(2*i+k)*size_a+2*j+l];
		}

}

__global__ void Convolution3(int *a,int *filter,int *result,int size_a,int size_filter,int size_result)
{
	int i=blockIdx.x;
	int j=blockIdx.y;
	int k=threadIdx.x;
	int l=threadIdx.y;
	
    if(i<size_result||j<size_result||k<size_filter||l<size_filter)
    {
        atomicAdd(&result[i*size_result+j],filter[k*size_filter+l]*a[(2*i+k)*size_a+2*j+l]);
	}
}


void Convolution2(int *a,int *filter,int *result,int size_a,int size_filter,int size_result)
{
        for(int i=0;i<size_result;i++)
        {
                for(int j=0;j<size_result;j++)
					for(int k=0;k<size_filter;k++)
						for(int l=0;l<size_filter;l++)
                                result[i*size_result+j] += filter[k*size_filter+l]*a[(2*i+k)*size_a+2*j+l];
        }
}




int main()
{

        int *a,*filter,*result,*result_serial,*result_optimal;

        int size_a,size_filter,size_result;

        clock_t t;

        double time_taken;



        x: printf("\nEnter size of array:");

        scanf("%d",&size_a);

        printf("\nEnter size of filter:");

        scanf("%d",&size_filter);

        if(size_a%2==0||size_filter%2==0)

        {

                printf("\nEnter odd numbers for sizes.");

                goto x;

        }

        if((size_a-size_filter)<0)

        {
                printf("\nEnter larger matrix size or smaller filter size.");

                goto x;

        }

        size_result=(size_a-size_filter)/2 +1;

        printf("Size of Matrix after Convolution with stride = (2) will be: %d \n",size_result);



        cudaMallocManaged(&a,size_a*size_a*sizeof(int));

        cudaMallocManaged(&filter,size_filter*size_filter*sizeof(int));

        cudaMallocManaged(&result,size_result*size_result*sizeof(int));
		
		cudaMallocManaged(&result_optimal,size_result*size_result*sizeof(int));

        cudaMallocManaged(&result_serial,size_result*size_result*sizeof(int));

        srand(0);



        for(int i=0;i<size_a*size_a;i++)
        {
                a[i]=rand()%100;
				//printf("Enter a[%d]",i);
				//scanf("%d",&a[i]);
        }

        for(int i=0;i<size_filter*size_filter;i++)
        {
                filter[i]=rand()%100;
				//printf("Enter filter[%d]",i);
				//scanf("%d",&filter[i]);
        }
        for(int i=0;i<size_result*size_result;i++)

        {

                result[i]=0;
                result_serial[i]=0;
				result_optimal[i]=0;

        }

		dim3 res(size_result,size_result);
		dim3 fil(size_filter,size_filter);
        t=clock();

        Convolution1<<<res,1>>>(a,filter,result,size_a,size_filter,size_result);

        cudaDeviceSynchronize();

        t=clock()-t;

        time_taken=((double)t)/CLOCKS_PER_SEC;

        printf("Time for Convolution with %d threads: %f \n",size_result*size_result,time_taken);


		t=clock();

        Convolution3<<<res,fil>>>(a,filter,result_optimal,size_a,size_filter,size_result);

        cudaDeviceSynchronize();

        t=clock()-t;

        time_taken=((double)t)/CLOCKS_PER_SEC;

        printf("Time for Convolution with %d x %d threads: %f \n",size_result*size_result,size_filter*size_filter,time_taken);


        t=clock();

        Convolution2(a,filter,result_serial,size_a,size_filter,size_result);

        t=clock()-t;

        time_taken=((double)t)/CLOCKS_PER_SEC;

        printf("Time for Convolution using serial:%f \n",time_taken);
		
		
		printf("\nSanity Check:");
		if(size_filter*size_filter>11)
			for(int i=0;i<10;i++)
			{
				printf("\nresult[%d]=%d \nresult_serial[%d]=%d \nresult_optimal[%d]=%d\n",i,result[i],i,result_serial[i],i,result_optimal[i]);
			}
		else
			for(int i=0;i<size_filter*size_filter;i++)
			{
				printf("\nresult[%d]=%d \nresult_serial[%d]=%d \nresult_optimal[%d]=%d\n",i,result[i],i,result_serial[i],i,result_optimal[i]);
			}
		

        cudaFree(a);

        cudaFree(filter);

        cudaFree(result);

        cudaFree(result_serial);

        return 0;

}




/***********************OUTPUT*************************
[user10@linux-teslagpu ~]$ ./a.out

 Enter size of array:10001

 Enter size of filter:3
Size of Matrix after Convolution with stride = (2) will be: 5000 
Time for Convolution with 25000000 threads: 0.000000 
Time for Convolution using serial:1.990000 

On Gtx 1050:
E:\!KUNAL\MIT\BE\HPC\MiniProject>a.exe
Enter size of array:10001

Enter size of filter:3
Size of Matrix after Convolution with stride = (2) will be: 5000
Time for Convolution with 25000000 threads: 2.210000
Time for Convolution with 25000000 x 9 threads: 0.134000
Time for Convolution using serial:3.210000

Sanity Check:
result[0]=12792
result_serial[0]=12792
result_optimal[0]=12792

result[1]=14060
result_serial[1]=14060
result_optimal[1]=14060

result[2]=20138
result_serial[2]=20138
result_optimal[2]=20138

result[3]=19328
result_serial[3]=19328
result_optimal[3]=19328

result[4]=20288
result_serial[4]=20288
result_optimal[4]=20288

result[5]=14252
result_serial[5]=14252
result_optimal[5]=14252

result[6]=16804
result_serial[6]=16804
result_optimal[6]=16804

result[7]=20854
result_serial[7]=20854
result_optimal[7]=20854

result[8]=24886
result_serial[8]=24886
result_optimal[8]=24886

******************************************************/

	.file	"tmpxft_002f8670_00000000-6_convolution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12Convolution2PiS_S_iii
	.type	_Z12Convolution2PiS_S_iii, @function
_Z12Convolution2PiS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leal	(%rcx,%rcx), %eax
	movslq	%ecx, %rcx
	movq	%rdi, %r10
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r11
	xorl	%edi, %edi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%eax, -12(%rsp)
	movslq	%r8d, %rax
	salq	$2, %rax
	movq	%rsi, -8(%rsp)
	xorl	%esi, %esi
	movq	%rax, -32(%rsp)
	leaq	0(,%rcx,4), %rax
	xorl	%ecx, %ecx
	movq	%rax, -24(%rsp)
.L3:
	cmpl	%r9d, %ecx
	jge	.L13
	xorl	%eax, %eax
	movslq	%esi, %r15
.L7:
	leal	(%rax,%rdi), %edx
	movq	-8(%rsp), %r12
	xorl	%ebx, %ebx
	movslq	%edx, %rdx
	leaq	(%r11,%rdx,4), %r14
	leal	(%rax,%rax), %edx
	movslq	%edx, %rdx
	addq	%r15, %rdx
	leaq	(%r10,%rdx,4), %rbp
.L6:
	cmpl	%r8d, %ebx
	jge	.L14
	xorl	%edx, %edx
.L4:
	movl	(%r12,%rdx,4), %r13d
	imull	0(%rbp,%rdx,4), %r13d
	incq	%rdx
	addl	%r13d, (%r14)
	cmpl	%edx, %r8d
	jg	.L4
	movq	-32(%rsp), %rdx
	incl	%ebx
	addq	%rdx, %r12
	movq	-24(%rsp), %rdx
	addq	%rdx, %rbp
	jmp	.L6
.L14:
	incl	%eax
	cmpl	%eax, %r9d
	jne	.L7
	movl	-12(%rsp), %eax
	incl	%ecx
	addl	%r9d, %edi
	addl	%eax, %esi
	jmp	.L3
.L13:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12Convolution2PiS_S_iii, .-_Z12Convolution2PiS_S_iii
	.globl	_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii
	.type	_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii, @function
_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12Convolution1PiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii, .-_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii
	.globl	_Z12Convolution1PiS_S_iii
	.type	_Z12Convolution1PiS_S_iii, @function
_Z12Convolution1PiS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2054:
	.size	_Z12Convolution1PiS_S_iii, .-_Z12Convolution1PiS_S_iii
	.globl	_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii
	.type	_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii, @function
_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12Convolution3PiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L20:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii, .-_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii
	.globl	_Z12Convolution3PiS_S_iii
	.type	_Z12Convolution3PiS_S_iii, @function
_Z12Convolution3PiS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2056:
	.size	_Z12Convolution3PiS_S_iii, .-_Z12Convolution3PiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\nEnter size of array:"
.LC1:
	.string	"%d"
.LC2:
	.string	"\nEnter size of filter:"
.LC3:
	.string	"\nEnter odd numbers for sizes."
.LC4:
	.string	"\nEnter larger matrix size or smaller filter size."
.LC5:
	.string	"Size of Matrix after Convolution with stride = (2) will be: %d \n"
.LC7:
	.string	"Time for Convolution with %d threads: %f \n"
.LC8:
	.string	"Time for Convolution with %d x %d threads: %f \n"
.LC9:
	.string	"Time for Convolution using serial:%f \n"
.LC10:
	.string	"\nSanity Check:"
.LC11:
	.string	"\nresult[%d]=%d \nresult_serial[%d]=%d \nresult_optimal[%d]=%d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	.LC0(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
.L26:
	leaq	.LC1(%rip), %rbx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	movq	%rsp, %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	leaq	4(%rsp), %rsi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	(%rsp), %ebx
	testb	$1, %bl
	je	.L27
	movl	4(%rsp), %eax
	testb	$1, %al
	jne	.L28
.L27:
	leaq	.LC3(%rip), %rsi
	jmp	.L59
.L28:
	subl	%eax, %ebx
	jns	.L30
	leaq	.LC4(%rip), %rsi
.L59:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L26
.L30:
	sarl	%ebx
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	movl	$100, %r13d
	movl	%ebx, %edx
	movl	%ebx, %ebp
	call	__printf_chk@PLT
	movl	(%rsp), %esi
	movl	$1, %edx
	imull	%ebx, %ebp
	leaq	8(%rsp), %rdi
	imull	%esi, %esi
	movslq	%ebp, %r12
	salq	$2, %r12
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movl	4(%rsp), %esi
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	imull	%esi, %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movq	%r12, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movq	%r12, %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	movq	%r12, %rsi
	leaq	32(%rsp), %rdi
	xorl	%r12d, %r12d
	movl	$1, %edx
	call	cudaMallocManaged@PLT
	xorl	%edi, %edi
	call	srand@PLT
.L31:
	movl	(%rsp), %eax
	imull	%eax, %eax
	cmpl	%r12d, %eax
	jle	.L60
	call	rand@PLT
	cltd
	idivl	%r13d
	movq	8(%rsp), %rax
	movl	%edx, (%rax,%r12,4)
	incq	%r12
	jmp	.L31
.L60:
	xorl	%r12d, %r12d
	movl	$100, %r13d
.L33:
	movl	4(%rsp), %eax
	imull	%eax, %eax
	cmpl	%r12d, %eax
	jle	.L61
	call	rand@PLT
	cltd
	idivl	%r13d
	movq	16(%rsp), %rax
	movl	%edx, (%rax,%r12,4)
	incq	%r12
	jmp	.L33
.L61:
	movq	32(%rsp), %r8
	movl	%ebp, %edx
	movq	24(%rsp), %r9
	salq	$2, %rdx
	movq	40(%rsp), %rsi
	leaq	(%r8,%rdx), %r10
	leaq	(%r9,%rdx), %rax
	cmpq	%r10, %r9
	leaq	(%rsi,%rdx), %rdi
	setnb	%cl
	cmpq	%rax, %r8
	setnb	%r11b
	orl	%r11d, %ecx
	cmpq	%rax, %rsi
	setnb	%al
	cmpq	%rdi, %r9
	setnb	%r11b
	orl	%r11d, %eax
	testb	%al, %cl
	je	.L44
	cmpq	%r10, %rsi
	setnb	%al
	cmpq	%rdi, %r8
	setnb	%cl
	orb	%cl, %al
	je	.L44
	xorl	%eax, %eax
	movq	%r9, %rdi
	movq	%rdx, %rcx
	rep stosb
	movq	%r8, %rdi
	movq	%rdx, %rcx
	rep stosb
	movq	%rsi, %rdi
	movq	%rdx, %rcx
	rep stosb
	jmp	.L36
.L44:
	xorl	%eax, %eax
.L35:
	xorl	%edi, %edi
	movl	%edi, (%r9,%rax,4)
	movl	%edi, (%r8,%rax,4)
	movl	%edi, (%rsi,%rax,4)
	incq	%rax
	cmpl	%eax, %ebp
	jg	.L35
.L36:
	movl	4(%rsp), %eax
	movl	%ebx, 52(%rsp)
	movl	%ebx, 56(%rsp)
	movl	$1, 60(%rsp)
	movl	%eax, 64(%rsp)
	movl	%eax, 68(%rsp)
	movl	$1, 72(%rsp)
	call	clock@PLT
	movq	52(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	60(%rsp), %esi
	movl	$1, %ecx
	movq	%rax, %r12
	movabsq	$4294967297, %rdx
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movl	4(%rsp), %r8d
	movl	(%rsp), %ecx
	movl	%ebx, %r9d
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z39__device_stub__Z12Convolution1PiS_S_iiiPiS_S_iii
.L37:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movl	%ebp, %edx
	movl	$2, %edi
	leaq	.LC7(%rip), %rsi
	subq	%r12, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC6(%rip), %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movl	72(%rsp), %ecx
	movl	60(%rsp), %esi
	xorl	%r9d, %r9d
	movq	64(%rsp), %rdx
	movq	52(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r12
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movl	4(%rsp), %r8d
	movl	(%rsp), %ecx
	movl	%ebx, %r9d
	movq	40(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z39__device_stub__Z12Convolution3PiS_S_iiiPiS_S_iii
.L38:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movl	4(%rsp), %ecx
	movl	%ebp, %edx
	movl	$2, %edi
	subq	%r12, %rax
	leaq	.LC8(%rip), %rsi
	imull	%ecx, %ecx
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC6(%rip), %xmm0
	call	__printf_chk@PLT
	call	clock@PLT
	movl	4(%rsp), %r8d
	movl	(%rsp), %ecx
	movl	%ebx, %r9d
	movq	32(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rax, %rbp
	xorl	%ebx, %ebx
	movq	8(%rsp), %rdi
	call	_Z12Convolution2PiS_S_iii
	call	clock@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	subq	%rbp, %rax
	leaq	.LC11(%rip), %rbp
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC6(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	4(%rsp), %eax
	imull	%eax, %eax
	cmpl	$11, %eax
	jle	.L39
.L40:
	movq	32(%rsp), %rax
	movl	%ebx, %edx
	movl	%ebx, %r8d
	movq	%rbp, %rsi
	movl	$2, %edi
	movl	(%rax,%rbx,4), %r9d
	movq	24(%rsp), %rax
	movl	(%rax,%rbx,4), %ecx
	movq	40(%rsp), %rax
	movl	(%rax,%rbx,4), %eax
	pushq	%rax
	.cfi_def_cfa_offset 152
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 160
	incq	%rbx
	call	__printf_chk@PLT
	popq	%rcx
	.cfi_def_cfa_offset 152
	popq	%rsi
	.cfi_def_cfa_offset 144
	cmpq	$10, %rbx
	jne	.L40
.L42:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L39:
	movl	4(%rsp), %eax
	movl	%ebx, %edx
	imull	%eax, %eax
	cmpl	%ebx, %eax
	jle	.L42
	movq	32(%rsp), %rax
	movl	%ebx, %r8d
	movq	%rbp, %rsi
	movl	$2, %edi
	movl	(%rax,%rbx,4), %r9d
	movq	24(%rsp), %rax
	movl	(%rax,%rbx,4), %ecx
	movq	40(%rsp), %rax
	movl	(%rax,%rbx,4), %eax
	pushq	%rax
	.cfi_def_cfa_offset 152
	xorl	%eax, %eax
	pushq	%rbx
	.cfi_def_cfa_offset 160
	incq	%rbx
	call	__printf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
	jmp	.L39
.L43:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z12Convolution3PiS_S_iii"
.LC13:
	.string	"_Z12Convolution1PiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12Convolution3PiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12Convolution1PiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"
#include <stdio.h>

#include <time.h>

//#define SIZE  1000

using namespace std;

__global__ void Convolution1(int *a,int *filter,int *result,int size_a,int size_filter,int size_result)

{

        int i=blockIdx.x;
		int j=blockIdx.y;

        if(i<size_result||j<size_result)
        {
                for(int k=0;k<size_filter;k++)
                        for(int l=0;l<size_filter;l++)
                                result[i*size_result+j] += filter[k*size_filter+l]*a[(2*i+k)*size_a+2*j+l];
		}

}

__global__ void Convolution3(int *a,int *filter,int *result,int size_a,int size_filter,int size_result)
{
	int i=blockIdx.x;
	int j=blockIdx.y;
	int k=threadIdx.x;
	int l=threadIdx.y;
	
    if(i<size_result||j<size_result||k<size_filter||l<size_filter)
    {
        atomicAdd(&result[i*size_result+j],filter[k*size_filter+l]*a[(2*i+k)*size_a+2*j+l]);
	}
}


void Convolution2(int *a,int *filter,int *result,int size_a,int size_filter,int size_result)
{
        for(int i=0;i<size_result;i++)
        {
                for(int j=0;j<size_result;j++)
					for(int k=0;k<size_filter;k++)
						for(int l=0;l<size_filter;l++)
                                result[i*size_result+j] += filter[k*size_filter+l]*a[(2*i+k)*size_a+2*j+l];
        }
}




int main()
{

        int *a,*filter,*result,*result_serial,*result_optimal;

        int size_a,size_filter,size_result;

        clock_t t;

        double time_taken;



        x: printf("\nEnter size of array:");

        scanf("%d",&size_a);

        printf("\nEnter size of filter:");

        scanf("%d",&size_filter);

        if(size_a%2==0||size_filter%2==0)

        {

                printf("\nEnter odd numbers for sizes.");

                goto x;

        }

        if((size_a-size_filter)<0)

        {
                printf("\nEnter larger matrix size or smaller filter size.");

                goto x;

        }

        size_result=(size_a-size_filter)/2 +1;

        printf("Size of Matrix after Convolution with stride = (2) will be: %d \n",size_result);



        hipMallocManaged(&a,size_a*size_a*sizeof(int));

        hipMallocManaged(&filter,size_filter*size_filter*sizeof(int));

        hipMallocManaged(&result,size_result*size_result*sizeof(int));
		
		hipMallocManaged(&result_optimal,size_result*size_result*sizeof(int));

        hipMallocManaged(&result_serial,size_result*size_result*sizeof(int));

        srand(0);



        for(int i=0;i<size_a*size_a;i++)
        {
                a[i]=rand()%100;
				//printf("Enter a[%d]",i);
				//scanf("%d",&a[i]);
        }

        for(int i=0;i<size_filter*size_filter;i++)
        {
                filter[i]=rand()%100;
				//printf("Enter filter[%d]",i);
				//scanf("%d",&filter[i]);
        }
        for(int i=0;i<size_result*size_result;i++)

        {

                result[i]=0;
                result_serial[i]=0;
				result_optimal[i]=0;

        }

		dim3 res(size_result,size_result);
		dim3 fil(size_filter,size_filter);
        t=clock();

        Convolution1<<<res,1>>>(a,filter,result,size_a,size_filter,size_result);

        hipDeviceSynchronize();

        t=clock()-t;

        time_taken=((double)t)/CLOCKS_PER_SEC;

        printf("Time for Convolution with %d threads: %f \n",size_result*size_result,time_taken);


		t=clock();

        Convolution3<<<res,fil>>>(a,filter,result_optimal,size_a,size_filter,size_result);

        hipDeviceSynchronize();

        t=clock()-t;

        time_taken=((double)t)/CLOCKS_PER_SEC;

        printf("Time for Convolution with %d x %d threads: %f \n",size_result*size_result,size_filter*size_filter,time_taken);


        t=clock();

        Convolution2(a,filter,result_serial,size_a,size_filter,size_result);

        t=clock()-t;

        time_taken=((double)t)/CLOCKS_PER_SEC;

        printf("Time for Convolution using serial:%f \n",time_taken);
		
		
		printf("\nSanity Check:");
		if(size_filter*size_filter>11)
			for(int i=0;i<10;i++)
			{
				printf("\nresult[%d]=%d \nresult_serial[%d]=%d \nresult_optimal[%d]=%d\n",i,result[i],i,result_serial[i],i,result_optimal[i]);
			}
		else
			for(int i=0;i<size_filter*size_filter;i++)
			{
				printf("\nresult[%d]=%d \nresult_serial[%d]=%d \nresult_optimal[%d]=%d\n",i,result[i],i,result_serial[i],i,result_optimal[i]);
			}
		

        hipFree(a);

        hipFree(filter);

        hipFree(result);

        hipFree(result_serial);

        return 0;

}




/***********************OUTPUT*************************
[user10@linux-teslagpu ~]$ ./a.out

 Enter size of array:10001

 Enter size of filter:3
Size of Matrix after Convolution with stride = (2) will be: 5000 
Time for Convolution with 25000000 threads: 0.000000 
Time for Convolution using serial:1.990000 

On Gtx 1050:
E:\!KUNAL\MIT\BE\HPC\MiniProject>a.exe
Enter size of array:10001

Enter size of filter:3
Size of Matrix after Convolution with stride = (2) will be: 5000
Time for Convolution with 25000000 threads: 2.210000
Time for Convolution with 25000000 x 9 threads: 0.134000
Time for Convolution using serial:3.210000

Sanity Check:
result[0]=12792
result_serial[0]=12792
result_optimal[0]=12792

result[1]=14060
result_serial[1]=14060
result_optimal[1]=14060

result[2]=20138
result_serial[2]=20138
result_optimal[2]=20138

result[3]=19328
result_serial[3]=19328
result_optimal[3]=19328

result[4]=20288
result_serial[4]=20288
result_optimal[4]=20288

result[5]=14252
result_serial[5]=14252
result_optimal[5]=14252

result[6]=16804
result_serial[6]=16804
result_optimal[6]=16804

result[7]=20854
result_serial[7]=20854
result_optimal[7]=20854

result[8]=24886
result_serial[8]=24886
result_optimal[8]=24886

******************************************************/

	.text
	.file	"convolution.hip"
	.globl	_Z27__device_stub__Convolution1PiS_S_iii # -- Begin function _Z27__device_stub__Convolution1PiS_S_iii
	.type	_Z27__device_stub__Convolution1PiS_S_iii,@function
_Z27__device_stub__Convolution1PiS_S_iii: # @_Z27__device_stub__Convolution1PiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Convolution1PiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__Convolution1PiS_S_iii, .Lfunc_end0-_Z27__device_stub__Convolution1PiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__Convolution3PiS_S_iii # -- Begin function _Z27__device_stub__Convolution3PiS_S_iii
	.type	_Z27__device_stub__Convolution3PiS_S_iii,@function
_Z27__device_stub__Convolution3PiS_S_iii: # @_Z27__device_stub__Convolution3PiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Convolution3PiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__Convolution3PiS_S_iii, .Lfunc_end1-_Z27__device_stub__Convolution3PiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12Convolution2PiS_S_iii       # -- Begin function _Z12Convolution2PiS_S_iii
	.type	_Z12Convolution2PiS_S_iii,@function
_Z12Convolution2PiS_S_iii:              # @_Z12Convolution2PiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -32(%rsp)                 # 8-byte Spill
	movq	%rsi, -8(%rsp)                  # 8-byte Spill
	movq	%rdi, -40(%rsp)                 # 8-byte Spill
	testl	%r9d, %r9d
	jle	.LBB2_10
# %bb.1:                                # %.preheader31.lr.ph
	movslq	%r8d, %rax
	movslq	%ecx, %rcx
	movl	%r9d, %r9d
	movl	%eax, %r10d
	shlq	$2, %rax
	shlq	$2, %rcx
	xorl	%edx, %edx
	xorl	%esi, %esi
.LBB2_2:                                # %.preheader30.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
                                        #       Child Loop BB2_5 Depth 3
                                        #         Child Loop BB2_6 Depth 4
	movq	%rdx, -16(%rsp)                 # 8-byte Spill
	movslq	%edx, %r14
	imulq	%rcx, %r14
	movq	%rsi, -24(%rsp)                 # 8-byte Spill
	imulq	%r9, %rsi
	movq	-32(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rsi,4), %r15
	addq	-40(%rsp), %r14                 # 8-byte Folded Reload
	xorl	%ebp, %ebp
	xorl	%r12d, %r12d
.LBB2_3:                                # %.preheader30
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_5 Depth 3
                                        #         Child Loop BB2_6 Depth 4
	testl	%r8d, %r8d
	jle	.LBB2_8
# %bb.4:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_3 Depth=2
	movslq	%ebp, %rsi
	leaq	(%r14,%rsi,4), %r13
	movl	(%r15,%r12,4), %r11d
	movq	-8(%rsp), %rsi                  # 8-byte Reload
	xorl	%edi, %edi
.LBB2_5:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_3 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB2_6 Depth 4
	xorl	%ebx, %ebx
.LBB2_6:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_3 Depth=2
                                        #       Parent Loop BB2_5 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	movl	(%r13,%rbx,4), %edx
	imull	(%rsi,%rbx,4), %edx
	addl	%edx, %r11d
	movl	%r11d, (%r15,%r12,4)
	incq	%rbx
	cmpq	%rbx, %r10
	jne	.LBB2_6
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_5 Depth=3
	incq	%rdi
	addq	%rax, %rsi
	addq	%rcx, %r13
	cmpq	%r10, %rdi
	jne	.LBB2_5
.LBB2_8:                                # %._crit_edge34
                                        #   in Loop: Header=BB2_3 Depth=2
	incq	%r12
	addl	$2, %ebp
	cmpq	%r9, %r12
	jne	.LBB2_3
# %bb.9:                                # %._crit_edge36
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	-24(%rsp), %rsi                 # 8-byte Reload
	incq	%rsi
	movq	-16(%rsp), %rdx                 # 8-byte Reload
	addl	$2, %edx
	cmpq	%r9, %rsi
	jne	.LBB2_2
.LBB2_10:                               # %._crit_edge38
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12Convolution2PiS_S_iii, .Lfunc_end2-_Z12Convolution2PiS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %r14
	leaq	16(%rsp), %r15
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.1, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	20(%rsp), %ebx
	movl	$.L.str.3, %edi
	testb	$1, %bl
	je	.LBB3_3
# %bb.2:                                #   in Loop: Header=BB3_1 Depth=1
	movl	16(%rsp), %eax
	testb	$1, %al
	je	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_1 Depth=1
	subl	%eax, %ebx
	movl	$.L.str.4, %edi
	jns	.LBB3_5
.LBB3_3:                                # %.backedge
                                        #   in Loop: Header=BB3_1 Depth=1
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_1
.LBB3_5:
	shrl	%ebx
	incl	%ebx
	movl	$.L.str.5, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	20(%rsp), %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	48(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	16(%rsp), %esi
	imull	%esi, %esi
	shlq	$2, %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%ebx, %r14d
	imull	%r14d, %r14d
	leaq	(,%r14,4), %r15
	leaq	32(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	56(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%edi, %edi
	callq	srand
	cmpl	$0, 20(%rsp)
	je	.LBB3_8
# %bb.6:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB3_7:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movq	48(%rsp), %rcx
	movl	%eax, (%rcx,%r15,4)
	incq	%r15
	movl	20(%rsp), %eax
	imull	%eax, %eax
	cmpq	%rax, %r15
	jb	.LBB3_7
.LBB3_8:                                # %.preheader79
	cmpl	$0, 16(%rsp)
	je	.LBB3_11
# %bb.9:                                # %.lr.ph82.preheader
	xorl	%r15d, %r15d
.LBB3_10:                               # %.lr.ph82
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	subl	%ecx, %eax
	movq	40(%rsp), %rcx
	movl	%eax, (%rcx,%r15,4)
	incq	%r15
	movl	16(%rsp), %eax
	imull	%eax, %eax
	cmpq	%rax, %r15
	jb	.LBB3_10
.LBB3_11:                               # %.preheader78
	movq	32(%rsp), %rax
	movq	24(%rsp), %rcx
	cmpl	$1, %r14d
	movl	%r14d, %edx
	adcl	$0, %edx
	movq	56(%rsp), %rsi
	shlq	$2, %rdx
	xorl	%edi, %edi
	xorl	%r8d, %r8d
.LBB3_12:                               # =>This Inner Loop Header: Depth=1
	movl	%edi, (%rax,%r8)
	movl	%edi, (%rcx,%r8)
	movl	%edi, (%rsi,%r8)
	addq	$4, %r8
	cmpq	%r8, %rdx
	jne	.LBB3_12
# %bb.13:
	movl	%ebx, %eax
	movq	%rax, %r15
	shlq	$32, %r15
	orq	%rax, %r15
	movl	16(%rsp), %eax
	movq	%rax, %r12
	shlq	$32, %r12
	orq	%rax, %r12
	callq	clock
	movq	%rax, %r13
	movabsq	$4294967297, %rdx               # imm = 0x100000001
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.14:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	20(%rsp), %ecx
	movl	16(%rsp), %r8d
	movl	%ebx, %r9d
	callq	_Z27__device_stub__Convolution1PiS_S_iii
.LBB3_15:
	callq	hipDeviceSynchronize
	callq	clock
	subq	%r13, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str.6, %edi
	movl	%r14d, %esi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %r13
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_17
# %bb.16:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	56(%rsp), %rdx
	movl	20(%rsp), %ecx
	movl	16(%rsp), %r8d
	movl	%ebx, %r9d
	callq	_Z27__device_stub__Convolution3PiS_S_iii
.LBB3_17:
	callq	hipDeviceSynchronize
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	16(%rsp), %edx
	imull	%edx, %edx
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %r14
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	20(%rsp), %ecx
	movl	16(%rsp), %r8d
	movl	%ebx, %r9d
	callq	_Z12Convolution2PiS_S_iii
	callq	clock
	subq	%r14, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	16(%rsp), %eax
	movl	%eax, %ecx
	imull	%eax, %ecx
	cmpl	$12, %ecx
	jb	.LBB3_20
# %bb.18:                               # %.preheader.preheader
	xorl	%ebx, %ebx
.LBB3_19:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	32(%rsp), %rax
	movl	(%rax,%rbx,4), %edx
	movq	24(%rsp), %rax
	movl	(%rax,%rbx,4), %r8d
	movq	56(%rsp), %rax
	movl	(%rax,%rbx,4), %eax
	movl	%eax, (%rsp)
	movl	$.L.str.10, %edi
	movl	%ebx, %esi
	movl	%ebx, %ecx
	movl	%ebx, %r9d
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB3_19
	jmp	.LBB3_23
.LBB3_20:                               # %.preheader76
	testl	%eax, %eax
	je	.LBB3_23
# %bb.21:                               # %.lr.ph85.preheader
	xorl	%ebx, %ebx
.LBB3_22:                               # %.lr.ph85
                                        # =>This Inner Loop Header: Depth=1
	movq	32(%rsp), %rax
	movl	(%rax,%rbx,4), %edx
	movq	24(%rsp), %rax
	movl	(%rax,%rbx,4), %r8d
	movq	56(%rsp), %rax
	movl	(%rax,%rbx,4), %eax
	movl	%eax, (%rsp)
	movl	$.L.str.10, %edi
	movl	%ebx, %esi
	movl	%ebx, %ecx
	movl	%ebx, %r9d
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	movl	16(%rsp), %eax
	imull	%eax, %eax
	cmpq	%rax, %rbx
	jb	.LBB3_22
.LBB3_23:                               # %.loopexit
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Convolution1PiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Convolution3PiS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12Convolution1PiS_S_iii,@object # @_Z12Convolution1PiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z12Convolution1PiS_S_iii
	.p2align	3, 0x0
_Z12Convolution1PiS_S_iii:
	.quad	_Z27__device_stub__Convolution1PiS_S_iii
	.size	_Z12Convolution1PiS_S_iii, 8

	.type	_Z12Convolution3PiS_S_iii,@object # @_Z12Convolution3PiS_S_iii
	.globl	_Z12Convolution3PiS_S_iii
	.p2align	3, 0x0
_Z12Convolution3PiS_S_iii:
	.quad	_Z27__device_stub__Convolution3PiS_S_iii
	.size	_Z12Convolution3PiS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nEnter size of array:"
	.size	.L.str, 22

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\nEnter size of filter:"
	.size	.L.str.2, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\nEnter odd numbers for sizes."
	.size	.L.str.3, 30

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nEnter larger matrix size or smaller filter size."
	.size	.L.str.4, 50

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Size of Matrix after Convolution with stride = (2) will be: %d \n"
	.size	.L.str.5, 65

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Time for Convolution with %d threads: %f \n"
	.size	.L.str.6, 43

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Time for Convolution with %d x %d threads: %f \n"
	.size	.L.str.7, 48

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Time for Convolution using serial:%f \n"
	.size	.L.str.8, 39

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"\nSanity Check:"
	.size	.L.str.9, 15

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"\nresult[%d]=%d \nresult_serial[%d]=%d \nresult_optimal[%d]=%d\n"
	.size	.L.str.10, 61

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12Convolution1PiS_S_iii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12Convolution3PiS_S_iii"
	.size	.L__unnamed_2, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__Convolution1PiS_S_iii
	.addrsig_sym _Z27__device_stub__Convolution3PiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12Convolution1PiS_S_iii
	.addrsig_sym _Z12Convolution3PiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12Convolution1PiS_S_iii ; -- Begin function _Z12Convolution1PiS_S_iii
	.globl	_Z12Convolution1PiS_S_iii
	.p2align	8
	.type	_Z12Convolution1PiS_S_iii,@function
_Z12Convolution1PiS_S_iii:              ; @_Z12Convolution1PiS_S_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	s_min_i32 s2, s14, s15
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s2, s6
	s_cselect_b32 s2, -1, 0
	s_cmp_lt_i32 s5, 1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_5
; %bb.1:                                ; %.preheader.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mul_i32 s6, s14, s6
	s_lshl_b32 s8, s15, 1
	s_add_i32 s6, s6, s15
	s_mul_i32 s14, s14, s4
	s_ashr_i32 s7, s6, 31
	s_mov_b32 s10, s5
	s_lshl_b64 s[6:7], s[6:7], 2
	s_mov_b32 s16, 0
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s2, s6
	s_addc_u32 s7, s3, s7
	s_load_b32 s9, s[6:7], 0x0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_lshl_b32 s12, s14, 1
	s_ashr_i32 s11, s5, 31
	s_add_i32 s8, s12, s8
	s_lshl_b64 s[10:11], s[10:11], 2
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v0, s9
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_ashr_i32 s9, s8, 31
	s_mov_b64 s[12:13], s[2:3]
	s_lshl_b64 s[14:15], s[8:9], 2
	s_mov_b32 s9, s5
	s_add_u32 s14, s0, s14
	s_addc_u32 s15, s1, s15
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x1
	global_load_b32 v2, v1, s[12:13]
	global_load_b32 v3, v1, s[14:15]
	s_add_i32 s9, s9, -1
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s9, 0
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	global_store_b32 v1, v0, s[6:7]
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s16, s16, 1
	s_add_i32 s8, s8, s4
	s_add_u32 s2, s2, s10
	s_addc_u32 s3, s3, s11
	s_cmp_eq_u32 s16, s5
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Convolution1PiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12Convolution1PiS_S_iii, .Lfunc_end0-_Z12Convolution1PiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 19
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12Convolution3PiS_S_iii ; -- Begin function _Z12Convolution3PiS_S_iii
	.globl	_Z12Convolution3PiS_S_iii
	.p2align	8
	.type	_Z12Convolution3PiS_S_iii,@function
_Z12Convolution3PiS_S_iii:              ; @_Z12Convolution3PiS_S_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_min_i32 s2, s14, s15
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v1
	s_cmp_lt_i32 s2, s6
	v_cmp_gt_i32_e64 s2, s5, v0
	s_cselect_b32 s3, -1, 0
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_5
; %bb.1:
	v_lshl_add_u32 v2, s14, 1, v1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_lshl_b32 s3, s15, 1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, exec_lo
	v_mul_lo_u32 v4, v2, s4
	v_mad_u64_u32 v[2:3], null, v1, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v0, s3, v0, v4
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s10, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v0, v0, v2
.LBB1_2:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s4, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s5, v0, s4
	s_lshl_b32 s4, 1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_not1_b32 s2, s2, s4
	s_add_i32 s3, s3, s5
	s_cmp_lg_u32 s2, 0
	s_cbranch_scc1 .LBB1_2
; %bb.3:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB1_5
; %bb.4:
	s_mul_i32 s2, s14, s6
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s3
	s_add_i32 s4, s2, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s5, s4, 31
	s_lshl_b64 s[4:5], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	global_atomic_add_u32 v0, v1, s[0:1]
.LBB1_5:                                ; %Flow44
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Convolution3PiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12Convolution3PiS_S_iii, .Lfunc_end1-_Z12Convolution3PiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 368
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Convolution1PiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z12Convolution1PiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Convolution3PiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12Convolution3PiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
