// This example demonstrates parallel floating point vector
// addition with a simple __global__ function.

#include <stdlib.h>
#include <stdio.h>
#include <iostream>
#include <time.h>
#include <unistd.h>
#include <sys/time.h>
#include <cuda_runtime.h>

#define BLOCK_SIZE 512

// this kernel computes the vector sum c = a + b
// each thread performs one pair-wise addition
void vector_reduction_seq(const float *a,
                          float *c,
                          const size_t n){
	for(int i = 0; i < n; i++){
		c[0] += a[i];
	}
}

__device__ void warp_reduce(volatile float* sD, int tid) { //unroll last warp (32 threads)
    sD[tid] += sD[tid + 32];
    sD[tid] += sD[tid + 16];
    sD[tid] += sD[tid + 8];
    sD[tid] += sD[tid + 4];
    sD[tid] += sD[tid + 2];
    sD[tid] += sD[tid + 1];
}

__global__ void vector_reduction(float *a,
                                 float *c,
                                 const size_t n){
  // compute the global element index this thread should process
  unsigned int tid = threadIdx.x;
  unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;

  for(unsigned int s=blockDim.x/2; s > 0; s >>= 1) { //binary reduction
      if (tid < s) {
          a[i] += a[i + s];
      }
      __syncthreads();
  }

  if (tid == 0) atomicAdd(c, a[i]);
}

__global__ void vector_reduction_shared(const float* a, float* c, const size_t n) {
    extern __shared__ float sD[];
    unsigned int tid = threadIdx.x;
    unsigned int blockSize = blockDim.x;
    unsigned int i = blockIdx.x*(blockSize*2) + tid;
    sD[tid] = a[i] + a[i+blockSize]; //add on first load
    __syncthreads();

    for(unsigned int s=blockSize/2; s > 32; s >>= 1) { //binary reduction
        if (tid < s) {
            sD[tid] += sD[tid + s];
        }
        __syncthreads();
    }

    if (tid < 32) warp_reduce(sD, tid); //unroll last warp for block

    if (tid == 0) atomicAdd(c,sD[0]); //add each block value to final value
}

int main(void){
  // create arrays of 1M elements
  const int num_elements = 1<<20;

  // compute the size of the arrays in bytes
  const int num_bytes = num_elements * sizeof(int);

  // points to host & device arrays
  float *device_array_a = 0;
  float *device_c = 0;
  float *host_array_a   = 0;
  float *host_c   = 0;

  // malloc the host arrays
  host_array_a = (float*)malloc(num_bytes);
  host_c = (float*)malloc(sizeof(float));

  // cudaMalloc the device arrays
  cudaMalloc((void**)&device_array_a, num_bytes);
  cudaMalloc((void**)&device_c, sizeof(float));

  // if any memory allocation failed, report an error message
  if(host_array_a == 0  || host_c == 0 ||
     device_array_a == 0 || device_c == 0){
    printf("couldn't allocate memory\n");
    return 1;
  }

  // initialize host_array_a & host_array_b
  for(int i = 0; i < num_elements; ++i){
    // make array a a linear ramp
    host_array_a[i] = 1;
  }
  // copy arrays a & b to the device memory space
  cudaMemcpy(device_array_a, host_array_a, num_bytes, cudaMemcpyHostToDevice);

  const size_t num_launches = 1;
  double average_seq_time;
  struct timespec start, end;
  std::cout << "Timing sequential implementation...";
  if( clock_gettime( CLOCK_REALTIME, &start) == -1 ) {
      perror( "clock gettime" );
      exit( EXIT_FAILURE );
  }

  for(int i = 0; i < num_launches; i++){
	vector_reduction_seq(host_array_a, host_c, num_elements);
  }

  if( clock_gettime( CLOCK_REALTIME, &end) == -1 ) {
      perror( "clock gettime" );
      exit( EXIT_FAILURE );
  }
  float serialAns = host_c[0];
  //compute the time in s
  average_seq_time = ( end.tv_sec - start.tv_sec )
		+ (double)( end.tv_nsec - start.tv_nsec ) / 1e+9;
  //take the average
  average_seq_time /= num_launches;
  std::cout << " done." << std::endl;
  std::cout << average_seq_time << "s" << std::endl;
  // compute c = a + b on the device
  const size_t block_size = BLOCK_SIZE;
  size_t grid_size = num_elements / block_size;

  // deal with a possible partial final block
  if(num_elements % block_size) ++grid_size;

  // time the kernel launches using CUDA events
  cudaEvent_t launch_begin, launch_end;
  cudaEventCreate(&launch_begin);
  cudaEventCreate(&launch_end);

  float average_time_simple = 0.0;
  std::cout << "Timing simple implementation...";
  for(int i = 0; i < num_launches; ++i){
	  // record a CUDA event immediately before and after the kernel launch
	  cudaEventRecord(launch_begin,0);
	  // launch the kernel
	  vector_reduction<<<grid_size, block_size>>>(device_array_a, device_c, num_elements);
	  cudaEventRecord(launch_end,0);
	  cudaEventSynchronize(launch_end);
	  float time = 0.0;
	  // measure the time (ms) spent in the kernel
	  cudaEventElapsedTime(&time, launch_begin, launch_end);
	  average_time_simple += time;
  }
  // copy the result back to the host memory space
  cudaMemcpy(host_c, device_c, sizeof(float), cudaMemcpyDeviceToHost);
  std::cout << serialAns << " " << host_c[0] << std::endl;
  if (serialAns != host_c[0]) return 0;
  average_time_simple /= num_launches;
  std::cout << " done." << std::endl;
  std::cout << average_time_simple << "ms" << std::endl;
  cudaMemcpy(device_array_a, host_array_a, num_bytes, cudaMemcpyHostToDevice);
  host_c[0] = 0;
  cudaMemcpy(device_c, host_c, sizeof(float), cudaMemcpyHostToDevice);
  float average_time_shared = 0.0;
  std::cout << "Timing shared implementation...";
  for(int i = 0; i < num_launches; ++i){
	  // record a CUDA event immediately before and after the kernel launch
	  cudaEventRecord(launch_begin,0);
	  // launch the kernel
	  vector_reduction_shared<<<grid_size, block_size/2, (block_size/2)*sizeof(float)>>>(device_array_a, device_c, num_elements);
	  cudaEventRecord(launch_end,0);
	  cudaEventSynchronize(launch_end);
	  float time = 0.0;
	  // measure the time (ms) spent in the kernel
	  cudaEventElapsedTime(&time, launch_begin, launch_end);
	  average_time_shared += time;
  }
  // copy the result back to the host memory space
  cudaMemcpy(host_c, device_c, sizeof(float), cudaMemcpyDeviceToHost);
  std::cout << serialAns << " " << host_c[0] << std::endl;
  if (serialAns != host_c[0]) return 0;
  average_time_shared /= num_launches;
  std::cout << " done." << std::endl;
  std::cout << average_time_shared << "ms" << std::endl;
  float num_ops=num_elements;
  float seq_throughput = num_ops / (average_seq_time) / 1000000000.0f;
  float simple_throughput = num_ops / (average_time_simple / 1000.0f) / 1000000000.0f;
  float shared_throughput = num_ops / (average_time_shared / 1000.0f) / 1000000000.0f;
  std::cout << "Throughput of sequential: " << seq_throughput << " GB/s" << std::endl;
  std::cout << "Throughput of simple kernel: " << simple_throughput << " GB/s" << std::endl;
  std::cout << "Simple performance improvement: " << simple_throughput / seq_throughput << "x" << std::endl;
  std::cout << "Throughput of shared kernel: " << shared_throughput << " GB/s" << std::endl;
  std::cout << "Shared performance improvement: " << shared_throughput / seq_throughput << "x" << std::endl;
  std::cout << "Shared performance over simple improvement: " << shared_throughput / simple_throughput << "x" << std::endl;

  cudaEventDestroy(launch_begin);
  cudaEventDestroy(launch_end);

  // deallocate memory
  free(host_array_a);
  free(host_c);

  cudaFree(device_array_a);
  cudaFree(device_c);
}

	.file	"tmpxft_003b4a6c_00000000-6_vector_reduction.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3653:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3653:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4311:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4311:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z20vector_reduction_seqPKfPfm
	.type	_Z20vector_reduction_seqPKfPfm, @function
_Z20vector_reduction_seqPKfPfm:
.LFB3648:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L4:
	cmpq	%rax, %rdx
	je	.L7
	movss	(%rsi), %xmm0
	addss	(%rdi,%rax,4), %xmm0
	incq	%rax
	movss	%xmm0, (%rsi)
	jmp	.L4
.L7:
	ret
	.cfi_endproc
.LFE3648:
	.size	_Z20vector_reduction_seqPKfPfm, .-_Z20vector_reduction_seqPKfPfm
	.globl	_Z11warp_reducePVfi
	.type	_Z11warp_reducePVfi, @function
_Z11warp_reducePVfi:
.LFB3649:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3649:
	.size	_Z11warp_reducePVfi, .-_Z11warp_reducePVfi
	.globl	_Z39__device_stub__Z16vector_reductionPfS_mPfS_m
	.type	_Z39__device_stub__Z16vector_reductionPfS_mPfS_m, @function
_Z39__device_stub__Z16vector_reductionPfS_mPfS_m:
.LFB3675:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16vector_reductionPfS_m(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3675:
	.size	_Z39__device_stub__Z16vector_reductionPfS_mPfS_m, .-_Z39__device_stub__Z16vector_reductionPfS_mPfS_m
	.globl	_Z16vector_reductionPfS_m
	.type	_Z16vector_reductionPfS_m, @function
_Z16vector_reductionPfS_m:
.LFB3676:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16vector_reductionPfS_mPfS_m
	.cfi_endproc
.LFE3676:
	.size	_Z16vector_reductionPfS_m, .-_Z16vector_reductionPfS_m
	.globl	_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm
	.type	_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm, @function
_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm:
.LFB3677:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23vector_reduction_sharedPKfPfm(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L15:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3677:
	.size	_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm, .-_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm
	.globl	_Z23vector_reduction_sharedPKfPfm
	.type	_Z23vector_reduction_sharedPKfPfm, @function
_Z23vector_reduction_sharedPKfPfm:
.LFB3678:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm
	.cfi_endproc
.LFE3678:
	.size	_Z23vector_reduction_sharedPKfPfm, .-_Z23vector_reduction_sharedPKfPfm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"couldn't allocate memory\n"
.LC2:
	.string	"Timing sequential implementation..."
.LC3:
	.string	"clock gettime"
.LC5:
	.string	" done."
.LC6:
	.string	"s"
.LC7:
	.string	"Timing simple implementation..."
.LC9:
	.string	" "
.LC10:
	.string	"ms"
.LC11:
	.string	"Timing shared implementation..."
.LC16:
	.string	"Throughput of sequential: "
.LC17:
	.string	" GB/s"
.LC18:
	.string	"Throughput of simple kernel: "
.LC19:
	.string	"Simple performance improvement: "
.LC20:
	.string	"x"
.LC21:
	.string	"Throughput of shared kernel: "
.LC22:
	.string	"Shared performance improvement: "
.LC23:
	.string	"Shared performance over simple improvement: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3650:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movl	$4, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	testq	%r12, %r12
	je	.L21
	testq	%rbp, %rbp
	je	.L21
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.L21
	xorl	%eax, %eax
	cmpq	$0, 40(%rsp)
	movss	.LC1(%rip), %xmm0
	jne	.L22
.L21:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L20
.L22:
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$1048576, %rax
	jne	.L22
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%edi, %edi
	leaq	88(%rsp), %rsi
	call	clock_gettime@PLT
	incl	%eax
	jne	.L24
.L25:
	leaq	.LC3(%rip), %rdi
	call	perror@PLT
	movl	$1, %edi
	call	exit@PLT
.L24:
	movl	$1048576, %edx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_Z20vector_reduction_seqPKfPfm
	xorl	%edi, %edi
	leaq	104(%rsp), %rsi
	call	clock_gettime@PLT
	incl	%eax
	je	.L25
	movq	112(%rsp), %rax
	subq	96(%rsp), %rax
	leaq	.LC5(%rip), %r13
	movq	%rbx, %rdi
	cvtsi2sdq	%rax, %xmm0
	movq	104(%rsp), %rax
	subq	88(%rsp), %rax
	movq	%r13, %rsi
	cvtsi2sdq	%rax, %xmm1
	divsd	.LC4(%rip), %xmm0
	movss	0(%rbp), %xmm5
	movss	%xmm5, 4(%rsp)
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movsd	8(%rsp), %xmm0
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2097153, %edi
	salq	$9, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$11, %rdi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1048576, %edx
	call	_Z39__device_stub__Z16vector_reductionPfS_mPfS_m
.L26:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	leaq	76(%rsp), %r15
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	%r15, %rdi
	movq	48(%rsp), %rsi
	movl	$0x00000000, 76(%rsp)
	call	cudaEventElapsedTime@PLT
	movss	76(%rsp), %xmm6
	movq	40(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$4, %edx
	movss	%xmm6, 24(%rsp)
	call	cudaMemcpy@PLT
	cvtss2sd	4(%rsp), %xmm7
	movq	%rbx, %rdi
	movaps	%xmm7, %xmm0
	movsd	%xmm7, 16(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movss	4(%rsp), %xmm5
	ucomiss	0(%rbp), %xmm5
	jp	.L29
	jne	.L29
	xorps	%xmm0, %xmm0
	addss	24(%rsp), %xmm0
	movq	%r13, %rsi
	movq	%rbx, %rdi
	leaq	.LC10(%rip), %r14
	movss	%xmm0, 24(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbx, %rdi
	cvtss2sd	24(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$0x00000000, 0(%rbp)
	movq	40(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$16777217, %edx
	movl	$2097153, %edi
	xorl	%r9d, %r9d
	salq	$8, %rdx
	salq	$11, %rdi
	movl	$1024, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1048576, %edx
	call	_Z47__device_stub__Z23vector_reduction_sharedPKfPfmPKfPfm
.L30:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	%r15, %rdi
	movq	48(%rsp), %rsi
	movl	$0x00000000, 76(%rsp)
	call	cudaEventElapsedTime@PLT
	movss	76(%rsp), %xmm7
	movq	40(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$4, %edx
	movss	%xmm7, 28(%rsp)
	call	cudaMemcpy@PLT
	movsd	16(%rsp), %xmm0
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC9(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movss	4(%rsp), %xmm2
	ucomiss	0(%rbp), %xmm2
	jp	.L29
	jne	.L29
	xorps	%xmm0, %xmm0
	addss	28(%rsp), %xmm0
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movd	%xmm0, %r15d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movd	%r15d, %xmm5
	movq	%rbx, %rdi
	cvtss2sd	%xmm5, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	leaq	.LC20(%rip), %r14
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movss	.LC13(%rip), %xmm3
	movq	%rbx, %rdi
	movss	24(%rsp), %xmm1
	movsd	.LC12(%rip), %xmm0
	divsd	8(%rsp), %xmm0
	divsd	.LC4(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm7
	divss	%xmm3, %xmm1
	movss	.LC14(%rip), %xmm0
	movss	.LC15(%rip), %xmm2
	leaq	.LC16(%rip), %rsi
	movss	%xmm7, 4(%rsp)
	movaps	%xmm0, %xmm4
	divss	%xmm1, %xmm4
	movd	%r15d, %xmm1
	leaq	.LC17(%rip), %r15
	divss	%xmm3, %xmm1
	divss	%xmm2, %xmm4
	divss	%xmm1, %xmm0
	movss	%xmm4, 8(%rsp)
	divss	%xmm2, %xmm0
	movd	%xmm0, %r13d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	4(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC18(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC19(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	8(%rsp), %xmm0
	divss	4(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC21(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r13d, %xmm3
	movq	%rax, %rdi
	cvtss2sd	%xmm3, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC22(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r13d, %xmm0
	divss	4(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC23(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r13d, %xmm0
	divss	8(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	56(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.L29:
	xorl	%eax, %eax
.L20:
	movq	120(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3650:
	.size	main, .-main
	.section	.rodata.str1.1
.LC24:
	.string	"_Z23vector_reduction_sharedPKfPfm"
.LC25:
	.string	"_Z16vector_reductionPfS_m"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3680:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z23vector_reduction_sharedPKfPfm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16vector_reductionPfS_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3680:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1104006501
	.align 8
.LC12:
	.long	0
	.long	1093664768
	.section	.rodata.cst4
	.align 4
.LC13:
	.long	1148846080
	.align 4
.LC14:
	.long	1233125376
	.align 4
.LC15:
	.long	1315859240
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// This example demonstrates parallel floating point vector
// addition with a simple __global__ function.

#include <stdlib.h>
#include <stdio.h>
#include <iostream>
#include <time.h>
#include <unistd.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

#define BLOCK_SIZE 512

// this kernel computes the vector sum c = a + b
// each thread performs one pair-wise addition
void vector_reduction_seq(const float *a,
                          float *c,
                          const size_t n){
	for(int i = 0; i < n; i++){
		c[0] += a[i];
	}
}

__device__ void warp_reduce(volatile float* sD, int tid) { //unroll last warp (32 threads)
    sD[tid] += sD[tid + 32];
    sD[tid] += sD[tid + 16];
    sD[tid] += sD[tid + 8];
    sD[tid] += sD[tid + 4];
    sD[tid] += sD[tid + 2];
    sD[tid] += sD[tid + 1];
}

__global__ void vector_reduction(float *a,
                                 float *c,
                                 const size_t n){
  // compute the global element index this thread should process
  unsigned int tid = threadIdx.x;
  unsigned int i = blockIdx.x*blockDim.x + threadIdx.x;

  for(unsigned int s=blockDim.x/2; s > 0; s >>= 1) { //binary reduction
      if (tid < s) {
          a[i] += a[i + s];
      }
      __syncthreads();
  }

  if (tid == 0) atomicAdd(c, a[i]);
}

__global__ void vector_reduction_shared(const float* a, float* c, const size_t n) {
    extern __shared__ float sD[];
    unsigned int tid = threadIdx.x;
    unsigned int blockSize = blockDim.x;
    unsigned int i = blockIdx.x*(blockSize*2) + tid;
    sD[tid] = a[i] + a[i+blockSize]; //add on first load
    __syncthreads();

    for(unsigned int s=blockSize/2; s > 32; s >>= 1) { //binary reduction
        if (tid < s) {
            sD[tid] += sD[tid + s];
        }
        __syncthreads();
    }

    if (tid < 32) warp_reduce(sD, tid); //unroll last warp for block

    if (tid == 0) atomicAdd(c,sD[0]); //add each block value to final value
}

int main(void){
  // create arrays of 1M elements
  const int num_elements = 1<<20;

  // compute the size of the arrays in bytes
  const int num_bytes = num_elements * sizeof(int);

  // points to host & device arrays
  float *device_array_a = 0;
  float *device_c = 0;
  float *host_array_a   = 0;
  float *host_c   = 0;

  // malloc the host arrays
  host_array_a = (float*)malloc(num_bytes);
  host_c = (float*)malloc(sizeof(float));

  // cudaMalloc the device arrays
  hipMalloc((void**)&device_array_a, num_bytes);
  hipMalloc((void**)&device_c, sizeof(float));

  // if any memory allocation failed, report an error message
  if(host_array_a == 0  || host_c == 0 ||
     device_array_a == 0 || device_c == 0){
    printf("couldn't allocate memory\n");
    return 1;
  }

  // initialize host_array_a & host_array_b
  for(int i = 0; i < num_elements; ++i){
    // make array a a linear ramp
    host_array_a[i] = 1;
  }
  // copy arrays a & b to the device memory space
  hipMemcpy(device_array_a, host_array_a, num_bytes, hipMemcpyHostToDevice);

  const size_t num_launches = 1;
  double average_seq_time;
  struct timespec start, end;
  std::cout << "Timing sequential implementation...";
  if( clock_gettime( CLOCK_REALTIME, &start) == -1 ) {
      perror( "clock gettime" );
      exit( EXIT_FAILURE );
  }

  for(int i = 0; i < num_launches; i++){
	vector_reduction_seq(host_array_a, host_c, num_elements);
  }

  if( clock_gettime( CLOCK_REALTIME, &end) == -1 ) {
      perror( "clock gettime" );
      exit( EXIT_FAILURE );
  }
  float serialAns = host_c[0];
  //compute the time in s
  average_seq_time = ( end.tv_sec - start.tv_sec )
		+ (double)( end.tv_nsec - start.tv_nsec ) / 1e+9;
  //take the average
  average_seq_time /= num_launches;
  std::cout << " done." << std::endl;
  std::cout << average_seq_time << "s" << std::endl;
  // compute c = a + b on the device
  const size_t block_size = BLOCK_SIZE;
  size_t grid_size = num_elements / block_size;

  // deal with a possible partial final block
  if(num_elements % block_size) ++grid_size;

  // time the kernel launches using CUDA events
  hipEvent_t launch_begin, launch_end;
  hipEventCreate(&launch_begin);
  hipEventCreate(&launch_end);

  float average_time_simple = 0.0;
  std::cout << "Timing simple implementation...";
  for(int i = 0; i < num_launches; ++i){
	  // record a CUDA event immediately before and after the kernel launch
	  hipEventRecord(launch_begin,0);
	  // launch the kernel
	  vector_reduction<<<grid_size, block_size>>>(device_array_a, device_c, num_elements);
	  hipEventRecord(launch_end,0);
	  hipEventSynchronize(launch_end);
	  float time = 0.0;
	  // measure the time (ms) spent in the kernel
	  hipEventElapsedTime(&time, launch_begin, launch_end);
	  average_time_simple += time;
  }
  // copy the result back to the host memory space
  hipMemcpy(host_c, device_c, sizeof(float), hipMemcpyDeviceToHost);
  std::cout << serialAns << " " << host_c[0] << std::endl;
  if (serialAns != host_c[0]) return 0;
  average_time_simple /= num_launches;
  std::cout << " done." << std::endl;
  std::cout << average_time_simple << "ms" << std::endl;
  hipMemcpy(device_array_a, host_array_a, num_bytes, hipMemcpyHostToDevice);
  host_c[0] = 0;
  hipMemcpy(device_c, host_c, sizeof(float), hipMemcpyHostToDevice);
  float average_time_shared = 0.0;
  std::cout << "Timing shared implementation...";
  for(int i = 0; i < num_launches; ++i){
	  // record a CUDA event immediately before and after the kernel launch
	  hipEventRecord(launch_begin,0);
	  // launch the kernel
	  vector_reduction_shared<<<grid_size, block_size/2, (block_size/2)*sizeof(float)>>>(device_array_a, device_c, num_elements);
	  hipEventRecord(launch_end,0);
	  hipEventSynchronize(launch_end);
	  float time = 0.0;
	  // measure the time (ms) spent in the kernel
	  hipEventElapsedTime(&time, launch_begin, launch_end);
	  average_time_shared += time;
  }
  // copy the result back to the host memory space
  hipMemcpy(host_c, device_c, sizeof(float), hipMemcpyDeviceToHost);
  std::cout << serialAns << " " << host_c[0] << std::endl;
  if (serialAns != host_c[0]) return 0;
  average_time_shared /= num_launches;
  std::cout << " done." << std::endl;
  std::cout << average_time_shared << "ms" << std::endl;
  float num_ops=num_elements;
  float seq_throughput = num_ops / (average_seq_time) / 1000000000.0f;
  float simple_throughput = num_ops / (average_time_simple / 1000.0f) / 1000000000.0f;
  float shared_throughput = num_ops / (average_time_shared / 1000.0f) / 1000000000.0f;
  std::cout << "Throughput of sequential: " << seq_throughput << " GB/s" << std::endl;
  std::cout << "Throughput of simple kernel: " << simple_throughput << " GB/s" << std::endl;
  std::cout << "Simple performance improvement: " << simple_throughput / seq_throughput << "x" << std::endl;
  std::cout << "Throughput of shared kernel: " << shared_throughput << " GB/s" << std::endl;
  std::cout << "Shared performance improvement: " << shared_throughput / seq_throughput << "x" << std::endl;
  std::cout << "Shared performance over simple improvement: " << shared_throughput / simple_throughput << "x" << std::endl;

  hipEventDestroy(launch_begin);
  hipEventDestroy(launch_end);

  // deallocate memory
  free(host_array_a);
  free(host_c);

  hipFree(device_array_a);
  hipFree(device_c);
}

	.text
	.file	"vector_reduction.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20vector_reduction_seqPKfPfm  # -- Begin function _Z20vector_reduction_seqPKfPfm
	.type	_Z20vector_reduction_seqPKfPfm,@function
_Z20vector_reduction_seqPKfPfm:         # @_Z20vector_reduction_seqPKfPfm
	.cfi_startproc
# %bb.0:
	testq	%rdx, %rdx
	je	.LBB0_3
# %bb.1:                                # %.lr.ph
	movss	(%rsi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	xorl	%eax, %eax
.LBB0_2:                                # =>This Inner Loop Header: Depth=1
	addss	(%rdi,%rax,4), %xmm0
	movss	%xmm0, (%rsi)
	incq	%rax
	cmpq	%rax, %rdx
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z20vector_reduction_seqPKfPfm, .Lfunc_end0-_Z20vector_reduction_seqPKfPfm
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__vector_reductionPfS_m # -- Begin function _Z31__device_stub__vector_reductionPfS_m
	.type	_Z31__device_stub__vector_reductionPfS_m,@function
_Z31__device_stub__vector_reductionPfS_m: # @_Z31__device_stub__vector_reductionPfS_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16vector_reductionPfS_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__vector_reductionPfS_m, .Lfunc_end1-_Z31__device_stub__vector_reductionPfS_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__vector_reduction_sharedPKfPfm # -- Begin function _Z38__device_stub__vector_reduction_sharedPKfPfm
	.type	_Z38__device_stub__vector_reduction_sharedPKfPfm,@function
_Z38__device_stub__vector_reduction_sharedPKfPfm: # @_Z38__device_stub__vector_reduction_sharedPKfPfm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23vector_reduction_sharedPKfPfm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z38__device_stub__vector_reduction_sharedPKfPfm, .Lfunc_end2-_Z38__device_stub__vector_reduction_sharedPKfPfm
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
.LCPI3_1:
	.quad	0x4130000000000000              # double 1048576
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_2:
	.long	0x447a0000                      # float 1000
.LCPI3_3:
	.long	0x49800000                      # float 1048576
.LCPI3_4:
	.long	0x4e6e6b28                      # float 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	leaq	40(%rsp), %r15
	movq	%rax, (%r15)
	leaq	16(%rsp), %r12
	movq	%rax, (%r12)
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$4, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	testq	%rbx, %rbx
	je	.LBB3_19
# %bb.1:
	testq	%r14, %r14
	je	.LBB3_19
# %bb.2:
	movq	40(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB3_19
# %bb.3:
	cmpq	$0, 16(%rsp)
	je	.LBB3_19
# %bb.4:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB3_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB3_5
# %bb.6:
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$35, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	88(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	cmpl	$-1, %eax
	je	.LBB3_18
# %bb.7:                                # %.critedge.preheader
	xorl	%eax, %eax
                                        # implicit-def: $xmm0
.LBB3_8:                                # %.critedge
                                        # =>This Inner Loop Header: Depth=1
	addss	(%rbx,%rax,4), %xmm0
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB3_8
# %bb.9:                                # %_Z20vector_reduction_seqPKfPfm.exit
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movss	%xmm0, (%r14)
	leaq	72(%rsp), %rsi
	xorl	%edi, %edi
	callq	clock_gettime
	cmpl	$-1, %eax
	je	.LBB3_18
# %bb.10:
	movq	72(%rsp), %rax
	movq	80(%rsp), %rcx
	subq	88(%rsp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	subq	96(%rsp), %rcx
	cvtsi2sd	%rcx, %xmm1
	movabsq	$4294969344, %r12               # imm = 0x100000800
	divsd	.LCPI3_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	56(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	-1536(%r12), %rdx
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.11:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z31__device_stub__vector_reductionPfS_m
.LBB3_12:
	movq	8(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	68(%rsp), %r13
	movl	$0, (%r13)
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	addss	(%r13), %xmm0
	movss	%xmm0, 52(%rsp)                 # 4-byte Spill
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$_ZSt4cout, %ebp
	movl	$_ZSt4cout, %edi
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r14), %xmm0
	jne	.LBB3_17
	jp	.LBB3_17
# %bb.13:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorps	%xmm0, %xmm0
	cvtss2sd	52(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.7, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	40(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$0, (%r14)
	movq	16(%rsp), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	-1792(%r12), %rdx
	movl	$1024, %r8d                     # imm = 0x400
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.14:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$1048576, %edx                  # imm = 0x100000
	callq	_Z38__device_stub__vector_reduction_sharedPKfPfm
.LBB3_15:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	68(%rsp), %r12
	movl	$0, (%r12)
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	(%r12), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	16(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %r13d
	movl	$_ZSt4cout, %edi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.6, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r14), %xmm0
	jne	.LBB3_17
	jp	.LBB3_17
# %bb.16:
	xorps	%xmm0, %xmm0
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm1
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0                  # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	divsd	.LCPI3_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 32(%rsp)                 # 4-byte Spill
	movss	.LCPI3_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	52(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	movss	.LCPI3_3(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm3
	divss	%xmm1, %xmm3
	movss	.LCPI3_4(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm3
	movss	%xmm3, (%rsp)                   # 4-byte Spill
	movss	4(%rsp), %xmm3                  # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm3
	divss	%xmm3, %xmm2
	divss	%xmm1, %xmm2
	movss	%xmm2, 24(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	32(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.10, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.10, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.13, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.14, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	24(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.10, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	32(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.13, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$44, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	(%rsp), %xmm0                   # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.13, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	56(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	jmp	.LBB3_17
.LBB3_19:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %r15d
.LBB3_17:
	movl	%r15d, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_18:
	.cfi_def_cfa_offset 160
	movl	$.L.str.2, %edi
	callq	perror
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16vector_reductionPfS_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23vector_reduction_sharedPKfPfm, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16vector_reductionPfS_m,@object # @_Z16vector_reductionPfS_m
	.section	.rodata,"a",@progbits
	.globl	_Z16vector_reductionPfS_m
	.p2align	3, 0x0
_Z16vector_reductionPfS_m:
	.quad	_Z31__device_stub__vector_reductionPfS_m
	.size	_Z16vector_reductionPfS_m, 8

	.type	_Z23vector_reduction_sharedPKfPfm,@object # @_Z23vector_reduction_sharedPKfPfm
	.globl	_Z23vector_reduction_sharedPKfPfm
	.p2align	3, 0x0
_Z23vector_reduction_sharedPKfPfm:
	.quad	_Z38__device_stub__vector_reduction_sharedPKfPfm
	.size	_Z23vector_reduction_sharedPKfPfm, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Timing sequential implementation..."
	.size	.L.str.1, 36

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"clock gettime"
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" done."
	.size	.L.str.3, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"s"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Timing simple implementation..."
	.size	.L.str.5, 32

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" "
	.size	.L.str.6, 2

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"ms"
	.size	.L.str.7, 3

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Timing shared implementation..."
	.size	.L.str.8, 32

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Throughput of sequential: "
	.size	.L.str.9, 27

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	" GB/s"
	.size	.L.str.10, 6

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Throughput of simple kernel: "
	.size	.L.str.11, 30

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Simple performance improvement: "
	.size	.L.str.12, 33

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"x"
	.size	.L.str.13, 2

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Throughput of shared kernel: "
	.size	.L.str.14, 30

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Shared performance improvement: "
	.size	.L.str.15, 33

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"Shared performance over simple improvement: "
	.size	.L.str.16, 45

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16vector_reductionPfS_m"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z23vector_reduction_sharedPKfPfm"
	.size	.L__unnamed_2, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"couldn't allocate memory"
	.size	.Lstr, 25

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__vector_reductionPfS_m
	.addrsig_sym _Z38__device_stub__vector_reduction_sharedPKfPfm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16vector_reductionPfS_m
	.addrsig_sym _Z23vector_reduction_sharedPKfPfm
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16vector_reductionPfS_m ; -- Begin function _Z16vector_reductionPfS_m
	.globl	_Z16vector_reductionPfS_m
	.p2align	8
	.type	_Z16vector_reductionPfS_m,@function
_Z16vector_reductionPfS_m:              ; @_Z16vector_reductionPfS_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cmp_lt_u32 s4, 2
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v3
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s5, s4, 1
	s_mov_b32 s6, exec_lo
	v_cmpx_gt_u32_e64 s5, v0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[6:7], off
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v6
	global_store_b32 v[4:5], v2, off
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s4, 4
	s_mov_b32 s4, s5
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_11
; %bb.6:
	v_mov_b32_e32 v2, 0
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_bfrev_b32_e32 v2, 1
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
.LBB0_7:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s0, s4
	s_waitcnt vmcnt(0)
	v_readlane_b32 s1, v0, s0
	s_lshl_b32 s0, 1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s4, s4, s0
	s_cmp_lg_u32 s4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, s1, v2
	s_cbranch_scc1 .LBB0_7
; %bb.8:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s0, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_11
; %bb.9:
	v_mov_b32_e32 v3, 0
	global_load_b32 v1, v3, s[2:3]
.LBB0_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v1, v2
	global_atomic_cmpswap_b32 v0, v3, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_10
.LBB0_11:                               ; %Flow23
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16vector_reductionPfS_m
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16vector_reductionPfS_m, .Lfunc_end0-_Z16vector_reductionPfS_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23vector_reduction_sharedPKfPfm ; -- Begin function _Z23vector_reduction_sharedPKfPfm
	.globl	_Z23vector_reduction_sharedPKfPfm
	.p2align	8
	.type	_Z23vector_reduction_sharedPKfPfm,@function
_Z23vector_reduction_sharedPKfPfm:      ; @_Z23vector_reduction_sharedPKfPfm
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s4
	s_cmpk_lt_u32 s4, 0x42
	v_lshl_add_u32 v1, s15, 1, v0
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v1, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_clause 0x1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v2
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_lshr_b32 s0, s4, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_1 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB1_4:                                ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmpk_lt_u32 s4, 0x84
	s_mov_b32 s4, s0
	s_branch .LBB1_1
.LBB1_5:                                ; %._crit_edge
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB1_7
; %bb.6:
	v_add_nc_u32_e32 v2, 0x80, v1
	v_cmp_ne_u32_e64 s0, -1, v1
	s_mov_b64 s[4:5], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v2
	v_cndmask_b32_e64 v3, 0, s5, s0
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	v_cndmask_b32_e64 v2, 0, v1, s0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 64, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 32, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 16, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 8, v1
	v_add_nc_u32_e32 v1, 4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v6, v5, v6
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	flat_store_b32 v[2:3], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_cndmask_b32 v4, 0, v1 :: v_dual_add_f32 v1, v5, v6
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v1, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v1, v1, v4
	flat_store_b32 v[2:3], v1 dlc
	s_waitcnt_vscnt null, 0x0
.LBB1_7:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_11
; %bb.8:
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s0, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s1, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s1
	s_cbranch_execz .LBB1_11
; %bb.9:
	s_bcnt1_i32_b32 s0, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f32_ubyte0_e32 v3, s0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s0, 0
	global_load_b32 v1, v2, s[2:3]
	ds_load_b32 v0, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v3, v0, v3
.LBB1_10:                               ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v1, v3
	global_atomic_cmpswap_b32 v0, v2, v[0:1], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v0, v1
	v_mov_b32_e32 v1, v0
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_10
.LBB1_11:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23vector_reduction_sharedPKfPfm
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z23vector_reduction_sharedPKfPfm, .Lfunc_end1-_Z23vector_reduction_sharedPKfPfm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 852
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym sD
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16vector_reductionPfS_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16vector_reductionPfS_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23vector_reduction_sharedPKfPfm
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23vector_reduction_sharedPKfPfm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
