#include <stdlib.h>
#include <stdio.h>
#include <iostream>
#include <fstream>
#include <string>
#include <cmath>

#define N 1024 
#define BLOCK_SIZE 16 

typedef struct
{
        float           *elements;
        int                 width;
        int                height;
} Matrix;


void cpu_gj(Matrix A, float *x, float *b, float eps)
{
	float res = 1.0f; 
	float summ1, summ2;
	float *temp;
	temp = new float[A.width]; 
	int counter = 0; 
	while(res > eps)
	{
		summ2 = 0.0f; 
		for(int i = 0; i < A.width; i++)
		{
			summ1 = 0.0f; 
			for(int k =0; k < A.width; k++)
				if(k!=i)
					summ1 += A.elements[k + i*A.width]*x[k]; 
			temp[i] = 1/A.elements[i+i*A.width]*(b[i] - summ1); 
			summ2 += abs(temp[i] - x[i]);  
		}
		for(int i = 0; i < A.width; i++)
			x[i] = temp[i]; 
		res = summ2; 
		counter++; 
		if(counter==A.width)
			break; 
	}
	delete[] temp; 
	std::cout<<"Steps Taken to Convergence = "<< counter<<std::endl;
}

void load_Matrix(std::string file, Matrix A)
{
        std::ifstream f;
        f.open(file);
        for( int i = 0; i <A.height; i++)
                for(int j = 0; j < A.width; j++)
                {
                        f >> A.elements[j + A.width*i];
                }
        f.close();
}


__global__ void naive_gj(Matrix A, float *x, float *xout, float *b) //Computes one iteration of GJ
{
	int gid = threadIdx.x + blockIdx.x*blockDim.x; 
	float summ1 = 0.0f; 
	float temp; 
	for (int k =0; k < A.width; k++)
	{
		if(k!= gid)
			summ1 += A.elements[k + gid*A.width]*x[k]; 
	} 
	temp = 1.0f/A.elements[gid + gid*A.width]*(b[gid] - summ1);
	xout[gid] = temp; 
}

__global__ void compute_r(float *xold, const float *xnew) //store abs(diff) in xold
{
	int gid = threadIdx.x + blockDim.x*blockIdx.x; 
	float temp = fabs(xnew[gid] - xold[gid]); 
	xold[gid] = temp; 
}

__global__ void reduce_r(float * d_out, const float *d_in)
{
        // sdata is allocated in the kernel call: via dynamic shared memeory
        extern __shared__ float sdata[];

        int myId = threadIdx.x + blockDim.x*blockIdx.x;
        int tid = threadIdx.x;

        //load shared mem from global mem
        sdata[tid] = d_in[myId];
        __syncthreads(); // always sync before using sdata

        //do reduction over shared memory
        for(int s = blockDim.x/2; s>0; s >>=1)
        {
                if(tid < s)
                {
                        sdata[tid] += sdata[tid + s];
                }
                __syncthreads(); //make sure all additions are finished
        }

        //only tid 0 writes out result!
        if(tid == 0)
        {
                d_out[blockIdx.x] = sdata[0];
        }
}

__global__ void fill(float *xout, float *xin)
{
	int gid = threadIdx.x + blockDim.x*blockIdx.x; 
	xout[gid] = xin[gid];
}

void par_gj(Matrix A, float *x, float *b, float eps)
{
        float res = 1.0f;
        int counter = 0;
        Matrix d_A;
        d_A.width = A.width;
        d_A.height = A.height;
        float *d_x, *d_b, *d_xnew;
	float *dres; 
	dres = (float*)malloc(sizeof(float));
        cudaMalloc((void**)&d_A.elements, A.width*A.height*sizeof(float));
        cudaMalloc((void**)&d_x, A.width*sizeof(float));
        cudaMalloc((void**)&d_b, A.height*sizeof(float));
        cudaMalloc((void**)&d_xnew, A.width*sizeof(float));

        cudaMemcpy(d_A.elements,A.elements,A.width*A.height*sizeof(float),cudaMemcpyHostToDevice);
        cudaMemcpy(d_x, x, A.width*sizeof(float),cudaMemcpyHostToDevice);
        cudaMemcpy(d_b, b, A.height*sizeof(float),cudaMemcpyHostToDevice);

        dim3 dimBlock(16);
        dim3 dimGrid((A.width+ dimBlock.x - 1)/dimBlock.x);
        while(res>eps)
        {
                //Compute x^{n+1}
                naive_gj<<<dimGrid,dimBlock>>>(d_A, d_x, d_xnew, d_b);
                cudaDeviceSynchronize();

                //Compute vector of residuals
                compute_r<<<dimGrid,dimBlock>>>(d_x,d_xnew); //Store r in d_x
                cudaDeviceSynchronize();

                //Reduce vector of residuals to find norm
                reduce_r<<<1,N, N*sizeof(float)>>>(d_x, d_x);
                cudaMemcpy(dres, d_x, sizeof(float), cudaMemcpyDeviceToHost);
		res = dres[0]; 
		std::cout<<res<<std::endl;

                //X = Xnew
                fill<<<dimGrid,dimBlock>>>(d_x, d_xnew);
                cudaDeviceSynchronize();
                counter++;
                if(counter==A.width)
                        break;
        }
        	
	std::cout<<"Steps Taken to Convergence = "<< counter<<std::endl;
	//export X
        cudaMemcpy(x, d_x, A.width*sizeof(float), cudaMemcpyDeviceToHost);
        cudaFree(d_x);
        cudaFree(d_A.elements);
        cudaFree(d_xnew);
        cudaFree(d_b);
}

int main()
{

// Matrix stuff! 
	Matrix A; 
	A.width = N; 
	A.height = N;
	A.elements = (float*)malloc(N*N*sizeof(float)); 
	load_Matrix("matrix.dat", A);

// Vector stuff! 
	float *x, *b; 
	x = (float*)malloc(N*sizeof(float));
	b = (float*)malloc(N*sizeof(float)); 

	for(int i =0; i < N; i++)
	{
		b[i] = 1.0f; 
		x[i] = 0.0f;
	}

// Gauss-Jacobi Parameters
	float eps = 1e-7; 	

// Call the Gauss-Jacobi algorithms
	par_gj(A, x, b, eps); 

	std::cout<<"Soln X = "<<std::endl;
	for(int i = 0; i <10; i++)
		std::cout<< x[i] <<std::endl; //  */
	free(x); 
	free(b);
	free(A.elements); 
}


	.file	"tmpxft_00307dbb_00000000-6_gj.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3772:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3772:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4491:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4491:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Steps Taken to Convergence = "
	.text
	.globl	_Z6cpu_gj6MatrixPfS0_f
	.type	_Z6cpu_gj6MatrixPfS0_f, @function
_Z6cpu_gj6MatrixPfS0_f:
.LFB3766:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	movslq	%esi, %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movss	%xmm0, 12(%rsp)
	cmpq	%rsi, %rax
	jb	.L4
	movq	%rdi, %rbp
	movq	%rdx, %r13
	movq	%rcx, %r14
	xorl	%r15d, %r15d
	leaq	0(,%rsi,4), %rbx
	movq	%rbx, %rdi
	addq	$4, %rbx
	call	_Znam@PLT
	movss	.LC1(%rip), %xmm1
	movss	.LC2(%rip), %xmm5
	movq	%rax, %rdi
	movaps	%xmm1, %xmm4
	jmp	.L5
.L4:
	call	__cxa_throw_bad_array_new_length@PLT
.L19:
	incl	%r15d
	cmpl	%r15d, %r12d
	je	.L10
.L5:
	comiss	12(%rsp), %xmm1
	jbe	.L10
	movq	%rbp, %rsi
	xorl	%ecx, %ecx
	xorps	%xmm1, %xmm1
	xorl	%eax, %eax
.L12:
	movl	%eax, %r9d
	cmpl	%eax, %r12d
	jle	.L18
	xorl	%edx, %edx
	xorps	%xmm3, %xmm3
.L7:
	cmpl	%edx, %r9d
	je	.L6
	leal	(%rcx,%rdx), %r8d
	movslq	%r8d, %r8
	movss	0(%rbp,%r8,4), %xmm0
	mulss	0(%r13,%rdx,4), %xmm0
	addss	%xmm0, %xmm3
.L6:
	incq	%rdx
	cmpl	%edx, %r12d
	jg	.L7
	movss	(%r14,%rax,4), %xmm2
	movaps	%xmm4, %xmm0
	divss	(%rsi), %xmm0
	addl	%r12d, %ecx
	addq	%rbx, %rsi
	subss	%xmm3, %xmm2
	mulss	%xmm2, %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	subss	0(%r13,%rax,4), %xmm0
	incq	%rax
	andps	%xmm5, %xmm0
	addss	%xmm0, %xmm1
	jmp	.L12
.L18:
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %r12d
	jle	.L19
	movss	(%rdi,%rax,4), %xmm0
	movss	%xmm0, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L8
.L10:
	call	_ZdaPv@PLT
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r15d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%rax, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE3766:
	.size	_Z6cpu_gj6MatrixPfS0_f, .-_Z6cpu_gj6MatrixPfS0_f
	.globl	_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_
	.type	_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_, @function
_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_:
.LFB3794:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rsi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8naive_gj6MatrixPfS0_S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3794:
	.size	_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_, .-_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_
	.globl	_Z8naive_gj6MatrixPfS0_S0_
	.type	_Z8naive_gj6MatrixPfS0_S0_, @function
_Z8naive_gj6MatrixPfS0_S0_:
.LFB3795:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, (%rsp)
	movq	%rsp, %rdi
	movq	%rsi, 8(%rsp)
	movq	%rdx, %rsi
	movq	%rcx, %rdx
	movq	%r8, %rcx
	call	_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3795:
	.size	_Z8naive_gj6MatrixPfS0_S0_, .-_Z8naive_gj6MatrixPfS0_S0_
	.globl	_Z31__device_stub__Z9compute_rPfPKfPfPKf
	.type	_Z31__device_stub__Z9compute_rPfPKfPfPKf, @function
_Z31__device_stub__Z9compute_rPfPKfPfPKf:
.LFB3796:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9compute_rPfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L26:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3796:
	.size	_Z31__device_stub__Z9compute_rPfPKfPfPKf, .-_Z31__device_stub__Z9compute_rPfPKfPfPKf
	.globl	_Z9compute_rPfPKf
	.type	_Z9compute_rPfPKf, @function
_Z9compute_rPfPKf:
.LFB3797:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9compute_rPfPKfPfPKf
	.cfi_endproc
.LFE3797:
	.size	_Z9compute_rPfPKf, .-_Z9compute_rPfPKf
	.globl	_Z30__device_stub__Z8reduce_rPfPKfPfPKf
	.type	_Z30__device_stub__Z8reduce_rPfPKfPfPKf, @function
_Z30__device_stub__Z8reduce_rPfPKfPfPKf:
.LFB3798:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8reduce_rPfPKf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L31:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3798:
	.size	_Z30__device_stub__Z8reduce_rPfPKfPfPKf, .-_Z30__device_stub__Z8reduce_rPfPKfPfPKf
	.globl	_Z8reduce_rPfPKf
	.type	_Z8reduce_rPfPKf, @function
_Z8reduce_rPfPKf:
.LFB3799:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8reduce_rPfPKfPfPKf
	.cfi_endproc
.LFE3799:
	.size	_Z8reduce_rPfPKf, .-_Z8reduce_rPfPKf
	.globl	_Z25__device_stub__Z4fillPfS_PfS_
	.type	_Z25__device_stub__Z4fillPfS_PfS_, @function
_Z25__device_stub__Z4fillPfS_PfS_:
.LFB3800:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4fillPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3800:
	.size	_Z25__device_stub__Z4fillPfS_PfS_, .-_Z25__device_stub__Z4fillPfS_PfS_
	.globl	_Z4fillPfS_
	.type	_Z4fillPfS_, @function
_Z4fillPfS_:
.LFB3801:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z4fillPfS_PfS_
	.cfi_endproc
.LFE3801:
	.size	_Z4fillPfS_, .-_Z4fillPfS_
	.globl	_Z6par_gj6MatrixPfS0_f
	.type	_Z6par_gj6MatrixPfS0_f, @function
_Z6par_gj6MatrixPfS0_f:
.LFB3768:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	sarq	$32, %r14
	movq	%rdi, %r13
	movl	$4, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdx, 8(%rsp)
	movss	%xmm0, 20(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	movl	%esi, 112(%rsp)
	movl	%r14d, 116(%rsp)
	call	malloc@PLT
	movl	%r14d, %edx
	leaq	104(%rsp), %rdi
	salq	$2, %r14
	imull	%ebx, %edx
	movq	%rax, %rbp
	movslq	%edx, %rdx
	salq	$2, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	movslq	%ebx, %rax
	leaq	40(%rsp), %rdi
	addl	$15, %ebx
	salq	$2, %rax
	shrl	$4, %ebx
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	leaq	_ZSt4cout(%rip), %r13
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	.LC1(%rip), %r12d
	movl	%ebx, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	xorl	%ebx, %ebx
	movq	%rax, 84(%rsp)
.L42:
	movd	%r12d, %xmm3
	comiss	20(%rsp), %xmm3
	jbe	.L47
	movl	76(%rsp), %ecx
	movq	80(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, 68(%rsp)
	movl	88(%rsp), %esi
	movq	68(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movups	104(%rsp), %xmm1
	movq	48(%rsp), %rcx
	leaq	120(%rsp), %rdi
	movq	56(%rsp), %rdx
	movq	40(%rsp), %rsi
	movups	%xmm1, 120(%rsp)
	call	_Z40__device_stub__Z8naive_gj6MatrixPfS0_S0_R6MatrixPfS1_S1_
.L43:
	call	cudaDeviceSynchronize@PLT
	movl	76(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	56(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z31__device_stub__Z9compute_rPfPKfPfPKf
.L44:
	call	cudaDeviceSynchronize@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	movl	$4096, %r8d
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 120(%rsp)
	movl	$1, 128(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	40(%rsp), %rdi
	movq	%rdi, %rsi
	call	_Z30__device_stub__Z8reduce_rPfPKfPfPKf
.L45:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	0(%rbp), %r12d
	movq	%r13, %rdi
	movd	%r12d, %xmm2
	cvtss2sd	%xmm2, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	76(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	56(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z25__device_stub__Z4fillPfS_PfS_
.L46:
	call	cudaDeviceSynchronize@PLT
	incl	%ebx
	cmpl	%ebx, %r15d
	jne	.L42
.L47:
	leaq	.LC3(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.size	_Z6par_gj6MatrixPfS0_f, .-_Z6par_gj6MatrixPfS0_f
	.section	.rodata.str1.1
.LC4:
	.string	"_Z4fillPfS_"
.LC5:
	.string	"_Z8reduce_rPfPKf"
.LC6:
	.string	"_Z9compute_rPfPKf"
.LC7:
	.string	"_Z8naive_gj6MatrixPfS0_S0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3803:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z4fillPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8reduce_rPfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9compute_rPfPKf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8naive_gj6MatrixPfS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3803:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.text
	.globl	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
	.type	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix, @function
_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix:
.LFB3767:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3767
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$568, %rsp
	.cfi_def_cfa_offset 624
	movq	%fs:40, %rax
	movq	%rax, 552(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movl	%edx, 20(%rsp)
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	0(%rbp), %rsi
	leaq	48(%rsp), %rdi
	movl	$8, %edx
.LEHB1:
	call	_ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	32(%rsp), %rdx
	movq	8(%rsp), %rdi
	addq	-24(%rdx), %rdi
	testq	%rax, %rax
	jne	.L54
	movl	$4, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@PLT
.L56:
	movl	%ebx, %r15d
	sarq	$32, %rbx
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	movq	%rbx, 24(%rsp)
	jmp	.L55
.L54:
	xorl	%esi, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
	jmp	.L56
.L57:
	movq	8(%rsp), %rdi
	leaq	(%rbx,%r14), %rsi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
	incl	%ebp
	addq	$4, %rbx
.L59:
	movl	20(%rsp), %eax
	cmpl	%eax, %ebp
	jl	.L57
	incl	%r13d
	addl	%r15d, %r12d
.L55:
	movl	24(%rsp), %eax
	cmpl	%eax, %r13d
	jge	.L58
	movslq	%r12d, %rbx
	xorl	%ebp, %ebp
	salq	$2, %rbx
	jmp	.L59
.L58:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE1:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	552(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	jmp	.L64
.L63:
	endbr64
	movq	%rax, %rbx
.L60:
	movq	8(%rsp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	552(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L64
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L64:
	call	__stack_chk_fail@PLT
.L62:
	addq	$568, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA3767:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3767-.LLSDACSB3767
.LLSDACSB3767:
	.uleb128 .LEHB0-.LFB3767
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3767
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L63-.LFB3767
	.uleb128 0
	.uleb128 .LEHB2-.LFB3767
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE3767:
	.text
	.size	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix, .-_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
	.section	.rodata.str1.1
.LC8:
	.string	"matrix.dat"
.LC10:
	.string	"Soln X = "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3769:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3769
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$4194304, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movabsq	$4398046512128, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %r12
	call	malloc@PLT
	leaq	10+.LC8(%rip), %rdx
	leaq	24(%rsp), %rdi
	leaq	-10(%rdx), %rsi
	movq	%rax, %rbp
	movq	%rdi, 8(%rsp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	8(%rsp), %rax
	movq	%rbp, %rsi
	movq	%r13, %rdx
	movq	$10, 16(%rsp)
	movq	%r12, %rdi
	movb	$0, 10(%rax)
.LEHB3:
	call	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
.LEHE3:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movl	$4096, %edi
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movss	.LC1(%rip), %xmm0
	xorl	%ecx, %ecx
	movq	%rax, %r12
.L67:
	movss	%xmm0, (%r12,%rcx,4)
	incq	%rcx
	cmpq	$1024, %rcx
	jne	.L67
	xorl	%eax, %eax
	movq	%rbx, %rdi
	movss	.LC9(%rip), %xmm0
	movq	%rbx, %rdx
	rep stosl
	movq	%r13, %rsi
	movq	%r12, %rcx
	movq	%rbp, %rdi
	leaq	_ZSt4cout(%rip), %r14
	xorl	%r13d, %r13d
.LEHB4:
	call	_Z6par_gj6MatrixPfS0_f
	leaq	.LC10(%rip), %rsi
	movq	%r14, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L68:
	movq	%r14, %rdi
	cvtss2sd	(%rbx,%r13,4), %xmm0
	incq	%r13
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$10, %r13
	jne	.L68
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	jmp	.L75
.L72:
	endbr64
	movq	%rax, %rbx
.L69:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L75
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE4:
.L75:
	call	__stack_chk_fail@PLT
.L71:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3769:
	.section	.gcc_except_table
.LLSDA3769:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3769-.LLSDACSB3769
.LLSDACSB3769:
	.uleb128 .LEHB3-.LFB3769
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L72-.LFB3769
	.uleb128 0
	.uleb128 .LEHB4-.LFB3769
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE3769:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC9:
	.long	869711765
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <iostream>
#include <fstream>
#include <string>
#include <cmath>

#define N 1024 
#define BLOCK_SIZE 16 

typedef struct
{
        float           *elements;
        int                 width;
        int                height;
} Matrix;


void cpu_gj(Matrix A, float *x, float *b, float eps)
{
	float res = 1.0f; 
	float summ1, summ2;
	float *temp;
	temp = new float[A.width]; 
	int counter = 0; 
	while(res > eps)
	{
		summ2 = 0.0f; 
		for(int i = 0; i < A.width; i++)
		{
			summ1 = 0.0f; 
			for(int k =0; k < A.width; k++)
				if(k!=i)
					summ1 += A.elements[k + i*A.width]*x[k]; 
			temp[i] = 1/A.elements[i+i*A.width]*(b[i] - summ1); 
			summ2 += abs(temp[i] - x[i]);  
		}
		for(int i = 0; i < A.width; i++)
			x[i] = temp[i]; 
		res = summ2; 
		counter++; 
		if(counter==A.width)
			break; 
	}
	delete[] temp; 
	std::cout<<"Steps Taken to Convergence = "<< counter<<std::endl;
}

void load_Matrix(std::string file, Matrix A)
{
        std::ifstream f;
        f.open(file);
        for( int i = 0; i <A.height; i++)
                for(int j = 0; j < A.width; j++)
                {
                        f >> A.elements[j + A.width*i];
                }
        f.close();
}


__global__ void naive_gj(Matrix A, float *x, float *xout, float *b) //Computes one iteration of GJ
{
	int gid = threadIdx.x + blockIdx.x*blockDim.x; 
	float summ1 = 0.0f; 
	float temp; 
	for (int k =0; k < A.width; k++)
	{
		if(k!= gid)
			summ1 += A.elements[k + gid*A.width]*x[k]; 
	} 
	temp = 1.0f/A.elements[gid + gid*A.width]*(b[gid] - summ1);
	xout[gid] = temp; 
}

__global__ void compute_r(float *xold, const float *xnew) //store abs(diff) in xold
{
	int gid = threadIdx.x + blockDim.x*blockIdx.x; 
	float temp = fabs(xnew[gid] - xold[gid]); 
	xold[gid] = temp; 
}

__global__ void reduce_r(float * d_out, const float *d_in)
{
        // sdata is allocated in the kernel call: via dynamic shared memeory
        extern __shared__ float sdata[];

        int myId = threadIdx.x + blockDim.x*blockIdx.x;
        int tid = threadIdx.x;

        //load shared mem from global mem
        sdata[tid] = d_in[myId];
        __syncthreads(); // always sync before using sdata

        //do reduction over shared memory
        for(int s = blockDim.x/2; s>0; s >>=1)
        {
                if(tid < s)
                {
                        sdata[tid] += sdata[tid + s];
                }
                __syncthreads(); //make sure all additions are finished
        }

        //only tid 0 writes out result!
        if(tid == 0)
        {
                d_out[blockIdx.x] = sdata[0];
        }
}

__global__ void fill(float *xout, float *xin)
{
	int gid = threadIdx.x + blockDim.x*blockIdx.x; 
	xout[gid] = xin[gid];
}

void par_gj(Matrix A, float *x, float *b, float eps)
{
        float res = 1.0f;
        int counter = 0;
        Matrix d_A;
        d_A.width = A.width;
        d_A.height = A.height;
        float *d_x, *d_b, *d_xnew;
	float *dres; 
	dres = (float*)malloc(sizeof(float));
        hipMalloc((void**)&d_A.elements, A.width*A.height*sizeof(float));
        hipMalloc((void**)&d_x, A.width*sizeof(float));
        hipMalloc((void**)&d_b, A.height*sizeof(float));
        hipMalloc((void**)&d_xnew, A.width*sizeof(float));

        hipMemcpy(d_A.elements,A.elements,A.width*A.height*sizeof(float),hipMemcpyHostToDevice);
        hipMemcpy(d_x, x, A.width*sizeof(float),hipMemcpyHostToDevice);
        hipMemcpy(d_b, b, A.height*sizeof(float),hipMemcpyHostToDevice);

        dim3 dimBlock(16);
        dim3 dimGrid((A.width+ dimBlock.x - 1)/dimBlock.x);
        while(res>eps)
        {
                //Compute x^{n+1}
                naive_gj<<<dimGrid,dimBlock>>>(d_A, d_x, d_xnew, d_b);
                hipDeviceSynchronize();

                //Compute vector of residuals
                compute_r<<<dimGrid,dimBlock>>>(d_x,d_xnew); //Store r in d_x
                hipDeviceSynchronize();

                //Reduce vector of residuals to find norm
                reduce_r<<<1,N, N*sizeof(float)>>>(d_x, d_x);
                hipMemcpy(dres, d_x, sizeof(float), hipMemcpyDeviceToHost);
		res = dres[0]; 
		std::cout<<res<<std::endl;

                //X = Xnew
                fill<<<dimGrid,dimBlock>>>(d_x, d_xnew);
                hipDeviceSynchronize();
                counter++;
                if(counter==A.width)
                        break;
        }
        	
	std::cout<<"Steps Taken to Convergence = "<< counter<<std::endl;
	//export X
        hipMemcpy(x, d_x, A.width*sizeof(float), hipMemcpyDeviceToHost);
        hipFree(d_x);
        hipFree(d_A.elements);
        hipFree(d_xnew);
        hipFree(d_b);
}

int main()
{

// Matrix stuff! 
	Matrix A; 
	A.width = N; 
	A.height = N;
	A.elements = (float*)malloc(N*N*sizeof(float)); 
	load_Matrix("matrix.dat", A);

// Vector stuff! 
	float *x, *b; 
	x = (float*)malloc(N*sizeof(float));
	b = (float*)malloc(N*sizeof(float)); 

	for(int i =0; i < N; i++)
	{
		b[i] = 1.0f; 
		x[i] = 0.0f;
	}

// Gauss-Jacobi Parameters
	float eps = 1e-7; 	

// Call the Gauss-Jacobi algorithms
	par_gj(A, x, b, eps); 

	std::cout<<"Soln X = "<<std::endl;
	for(int i = 0; i <10; i++)
		std::cout<< x[i] <<std::endl; //  */
	free(x); 
	free(b);
	free(A.elements); 
}


	.text
	.file	"gj.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6cpu_gj6MatrixPfS0_f
.LCPI0_0:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI0_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z6cpu_gj6MatrixPfS0_f
	.type	_Z6cpu_gj6MatrixPfS0_f,@function
_Z6cpu_gj6MatrixPfS0_f:                 # @_Z6cpu_gj6MatrixPfS0_f
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movq	%rdx, %r15
	movq	%rsi, %r14
	movq	%rdi, %r12
	movq	%rsi, %rax
	shlq	$32, %rax
	movq	%rax, %rcx
	sarq	$30, %rcx
	testq	%rax, %rax
	movq	$-1, %rdi
	cmovnsq	%rcx, %rdi
	callq	_Znam
	movss	8(%rsp), %xmm3                  # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movq	%rax, %rbp
	movq	%r14, %r13
	incq	%r13
	movl	%r14d, %ebx
	leaq	(,%rbx,4), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%r8d, %r8d
	movss	.LCPI0_0(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movaps	.LCPI0_1(%rip), %xmm5           # xmm5 = [NaN,NaN,NaN,NaN]
	movaps	%xmm4, %xmm6
.LBB0_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_6 Depth 2
                                        #       Child Loop BB0_7 Depth 3
	ucomiss	%xmm3, %xmm6
	jbe	.LBB0_2
# %bb.4:                                # %.preheader52
                                        #   in Loop: Header=BB0_1 Depth=1
	xorps	%xmm6, %xmm6
	testl	%r14d, %r14d
	jle	.LBB0_13
# %bb.5:                                # %.preheader.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	movq	24(%rsp), %rdi                  # 8-byte Reload
.LBB0_6:                                # %.preheader
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_7 Depth 3
	movl	%eax, %edx
	leaq	(%r12,%rdx,4), %rdx
	xorl	%esi, %esi
	xorps	%xmm0, %xmm0
.LBB0_7:                                #   Parent Loop BB0_1 Depth=1
                                        #     Parent Loop BB0_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpq	%rsi, %rcx
	je	.LBB0_9
# %bb.8:                                #   in Loop: Header=BB0_7 Depth=3
	movss	(%rdx,%rsi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r15,%rsi,4), %xmm1
	addss	%xmm1, %xmm0
.LBB0_9:                                #   in Loop: Header=BB0_7 Depth=3
	incq	%rsi
	cmpq	%rsi, %rbx
	jne	.LBB0_7
# %bb.10:                               # %._crit_edge
                                        #   in Loop: Header=BB0_6 Depth=2
	movl	%r13d, %edx
	imull	%ecx, %edx
	movslq	%edx, %rdx
	movaps	%xmm4, %xmm1
	divss	(%r12,%rdx,4), %xmm1
	movss	(%rdi,%rcx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	%xmm0, %xmm2
	mulss	%xmm1, %xmm2
	movss	%xmm2, (%rbp,%rcx,4)
	subss	(%r15,%rcx,4), %xmm2
	andps	%xmm5, %xmm2
	addss	%xmm2, %xmm6
	incq	%rcx
	addl	%r14d, %eax
	cmpq	%rbx, %rcx
	jne	.LBB0_6
# %bb.11:                               # %.preheader51
                                        #   in Loop: Header=BB0_1 Depth=1
	testl	%r14d, %r14d
	jle	.LBB0_13
# %bb.12:                               # %.lr.ph59.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	movq	%r15, %rdi
	movq	%rbp, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	%r8, 32(%rsp)                   # 8-byte Spill
	movss	%xmm6, 12(%rsp)                 # 4-byte Spill
	callq	memcpy@PLT
	movss	12(%rsp), %xmm6                 # 4-byte Reload
                                        # xmm6 = mem[0],zero,zero,zero
	movaps	.LCPI0_1(%rip), %xmm5           # xmm5 = [NaN,NaN,NaN,NaN]
	movss	.LCPI0_0(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movq	32(%rsp), %r8                   # 8-byte Reload
	movss	8(%rsp), %xmm3                  # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
.LBB0_13:                               # %._crit_edge60
                                        #   in Loop: Header=BB0_1 Depth=1
	incl	%r8d
	cmpl	%r14d, %r8d
	jne	.LBB0_1
# %bb.14:
                                        # kill: def $r14d killed $r14d killed $r14 def $r14
	jmp	.LBB0_3
.LBB0_2:
	movq	%r8, %r14
.LBB0_3:
	movq	%rbp, %rdi
	callq	_ZdaPv
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end0:
	.size	_Z6cpu_gj6MatrixPfS0_f, .Lfunc_end0-_Z6cpu_gj6MatrixPfS0_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix # -- Begin function _Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
	.type	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix,@function
_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix: # @_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 608
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, %r15
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode
.Ltmp1:
# %bb.1:                                # %.preheader12
	movq	%rbx, %rax
	shrq	$32, %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	testl	%eax, %eax
	jle	.LBB1_8
# %bb.2:                                # %.preheader.lr.ph
	movl	%ebx, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	xorl	%r14d, %r14d
	leaq	32(%rsp), %r15
	xorl	%ebp, %ebp
.LBB1_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	testl	%ebx, %ebx
	jle	.LBB1_7
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=1
	movl	%r14d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	movq	8(%rsp), %r13                   # 8-byte Reload
.LBB1_5:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp2:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp3:
# %bb.6:                                # %_ZNSirsERf.exit
                                        #   in Loop: Header=BB1_5 Depth=2
	addq	$4, %r12
	decq	%r13
	jne	.LBB1_5
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=1
	incq	%rbp
	addl	%ebx, %r14d
	cmpq	24(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB1_3
.LBB1_8:                                # %._crit_edge15
.Ltmp5:
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp6:
# %bb.9:
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	addq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_10:
	.cfi_def_cfa_offset 608
.Ltmp7:
	jmp	.LBB1_11
.LBB1_12:
.Ltmp4:
.LBB1_11:
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix, .Lfunc_end1-_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp2-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp2                  #   Call between .Ltmp2 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp6-.Ltmp5                  #   Call between .Ltmp5 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Lfunc_end1-.Ltmp6             #   Call between .Ltmp6 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z23__device_stub__naive_gj6MatrixPfS0_S0_ # -- Begin function _Z23__device_stub__naive_gj6MatrixPfS0_S0_
	.type	_Z23__device_stub__naive_gj6MatrixPfS0_S0_,@function
_Z23__device_stub__naive_gj6MatrixPfS0_S0_: # @_Z23__device_stub__naive_gj6MatrixPfS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsi, 8(%rax)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rsi, 8(%rbx)
	movq	%rdx, 16(%rbx)
	movq	%rcx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8naive_gj6MatrixPfS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__naive_gj6MatrixPfS0_S0_, .Lfunc_end2-_Z23__device_stub__naive_gj6MatrixPfS0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__compute_rPfPKf # -- Begin function _Z24__device_stub__compute_rPfPKf
	.type	_Z24__device_stub__compute_rPfPKf,@function
_Z24__device_stub__compute_rPfPKf:      # @_Z24__device_stub__compute_rPfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9compute_rPfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__compute_rPfPKf, .Lfunc_end3-_Z24__device_stub__compute_rPfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__reduce_rPfPKf # -- Begin function _Z23__device_stub__reduce_rPfPKf
	.type	_Z23__device_stub__reduce_rPfPKf,@function
_Z23__device_stub__reduce_rPfPKf:       # @_Z23__device_stub__reduce_rPfPKf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8reduce_rPfPKf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z23__device_stub__reduce_rPfPKf, .Lfunc_end4-_Z23__device_stub__reduce_rPfPKf
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__fillPfS_     # -- Begin function _Z19__device_stub__fillPfS_
	.type	_Z19__device_stub__fillPfS_,@function
_Z19__device_stub__fillPfS_:            # @_Z19__device_stub__fillPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4fillPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z19__device_stub__fillPfS_, .Lfunc_end5-_Z19__device_stub__fillPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6par_gj6MatrixPfS0_f
.LCPI6_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z6par_gj6MatrixPfS0_f
	.type	_Z6par_gj6MatrixPfS0_f,@function
_Z6par_gj6MatrixPfS0_f:                 # @_Z6par_gj6MatrixPfS0_f
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 44(%rsp)                 # 4-byte Spill
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, %r14
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movabsq	$4294967312, %r12               # imm = 0x100000010
	movq	%rsi, %r15
	shrq	$32, %r15
	leaq	56(%rsp), %rbx
	movq	%rsi, 8(%rbx)
	movl	$4, %edi
	callq	malloc
	movq	%rax, %r13
	movq	%r14, %rbp
	shlq	$32, %rbp
	imulq	%rbp, %r15
	sarq	$30, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	sarq	$30, %rbp
	movq	%rsp, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	%r14, %rbx
	sarq	$30, %rbx
	andq	$-4, %rbx
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, 72(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r14, %rax
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	leal	15(%r14), %eax
	shrl	$4, %eax
	leaq	(%rax,%r12), %rbx
	addq	$-16, %rbx
	movss	.LCPI6_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	xorl	%ebp, %ebp
	leaq	-15(%r12), %rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leaq	1008(%r12), %r15
.LBB6_1:                                # =>This Inner Loop Header: Depth=1
	ucomiss	44(%rsp), %xmm0                 # 4-byte Folded Reload
	jbe	.LBB6_12
# %bb.2:                                #   in Loop: Header=BB6_1 Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_4
# %bb.3:                                #   in Loop: Header=BB6_1 Depth=1
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	(%rsp), %rdx
	movq	16(%rsp), %rcx
	movq	32(%rsp), %r8
	callq	_Z23__device_stub__naive_gj6MatrixPfS0_S0_
.LBB6_4:                                #   in Loop: Header=BB6_1 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_6
# %bb.5:                                #   in Loop: Header=BB6_1 Depth=1
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z24__device_stub__compute_rPfPKf
.LBB6_6:                                #   in Loop: Header=BB6_1 Depth=1
	callq	hipDeviceSynchronize
	movl	$4096, %r8d                     # imm = 0x1000
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_8
# %bb.7:                                #   in Loop: Header=BB6_1 Depth=1
	movq	(%rsp), %rdi
	movq	%rdi, %rsi
	callq	_Z23__device_stub__reduce_rPfPKf
.LBB6_8:                                #   in Loop: Header=BB6_1 Depth=1
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movss	(%r13), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 24(%rsp)                 # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_10
# %bb.9:                                #   in Loop: Header=BB6_1 Depth=1
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z19__device_stub__fillPfS_
.LBB6_10:                               #   in Loop: Header=BB6_1 Depth=1
	callq	hipDeviceSynchronize
	incl	%ebp
	cmpl	%ebp, 8(%rsp)                   # 4-byte Folded Reload
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	jne	.LBB6_1
# %bb.11:
	movq	8(%rsp), %rbp                   # 8-byte Reload
                                        # kill: def $ebp killed $ebp killed $rbp def $rbp
.LBB6_12:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z6par_gj6MatrixPfS0_f, .Lfunc_end6-_Z6par_gj6MatrixPfS0_f
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x33d6bf95                      # float 1.00000001E-7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	leaq	16(%rsp), %r15
	movq	%r15, -16(%r15)
	movq	%rsp, %r14
	movl	$.L.str.1, %esi
	movl	$.L.str.1+10, %edx
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp8:
	movabsq	$4398046512128, %rdx            # imm = 0x40000000400
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_Z11load_MatrixNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE6Matrix
.Ltmp9:
# %bb.1:
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB7_3
# %bb.2:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB7_3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movl	$1, %edi
	movl	$4096, %esi                     # imm = 0x1000
	callq	calloc@PLT
	movq	%rax, %r14
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB7_4:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r15,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB7_4
# %bb.5:
	movabsq	$4398046512128, %rsi            # imm = 0x40000000400
	movss	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movq	%r15, %rcx
	callq	_Z6par_gj6MatrixPfS0_f
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$9, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%r13d, %r13d
.LBB7_6:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	cmpq	$10, %r13
	jne	.LBB7_6
# %bb.7:
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB7_8:
	.cfi_def_cfa_offset 80
.Ltmp10:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB7_10
# %bb.9:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i25
	callq	_ZdlPv
.LBB7_10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit27
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table7:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp8-.Lfunc_begin1           #   Call between .Lfunc_begin1 and .Ltmp8
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin1           # >> Call Site 2 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin1          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin1           # >> Call Site 3 <<
	.uleb128 .Lfunc_end7-.Ltmp9             #   Call between .Ltmp9 and .Lfunc_end7
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB8_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB8_3
.LBB8_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB8_3:
	testq	%r14, %r14
	je	.LBB8_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB8_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB8_7
.LBB8_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB8_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end8-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8naive_gj6MatrixPfS0_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9compute_rPfPKf, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8reduce_rPfPKf, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4fillPfS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Steps Taken to Convergence = "
	.size	.L.str, 30

	.type	_Z8naive_gj6MatrixPfS0_S0_,@object # @_Z8naive_gj6MatrixPfS0_S0_
	.section	.rodata,"a",@progbits
	.globl	_Z8naive_gj6MatrixPfS0_S0_
	.p2align	3, 0x0
_Z8naive_gj6MatrixPfS0_S0_:
	.quad	_Z23__device_stub__naive_gj6MatrixPfS0_S0_
	.size	_Z8naive_gj6MatrixPfS0_S0_, 8

	.type	_Z9compute_rPfPKf,@object       # @_Z9compute_rPfPKf
	.globl	_Z9compute_rPfPKf
	.p2align	3, 0x0
_Z9compute_rPfPKf:
	.quad	_Z24__device_stub__compute_rPfPKf
	.size	_Z9compute_rPfPKf, 8

	.type	_Z8reduce_rPfPKf,@object        # @_Z8reduce_rPfPKf
	.globl	_Z8reduce_rPfPKf
	.p2align	3, 0x0
_Z8reduce_rPfPKf:
	.quad	_Z23__device_stub__reduce_rPfPKf
	.size	_Z8reduce_rPfPKf, 8

	.type	_Z4fillPfS_,@object             # @_Z4fillPfS_
	.globl	_Z4fillPfS_
	.p2align	3, 0x0
_Z4fillPfS_:
	.quad	_Z19__device_stub__fillPfS_
	.size	_Z4fillPfS_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"matrix.dat"
	.size	.L.str.1, 11

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Soln X = "
	.size	.L.str.2, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8naive_gj6MatrixPfS0_S0_"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9compute_rPfPKf"
	.size	.L__unnamed_2, 18

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8reduce_rPfPKf"
	.size	.L__unnamed_3, 17

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z4fillPfS_"
	.size	.L__unnamed_4, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z23__device_stub__naive_gj6MatrixPfS0_S0_
	.addrsig_sym _Z24__device_stub__compute_rPfPKf
	.addrsig_sym _Z23__device_stub__reduce_rPfPKf
	.addrsig_sym _Z19__device_stub__fillPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z8naive_gj6MatrixPfS0_S0_
	.addrsig_sym _Z9compute_rPfPKf
	.addrsig_sym _Z8reduce_rPfPKf
	.addrsig_sym _Z4fillPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8naive_gj6MatrixPfS0_S0_ ; -- Begin function _Z8naive_gj6MatrixPfS0_S0_
	.globl	_Z8naive_gj6MatrixPfS0_S0_
	.p2align	8
	.type	_Z8naive_gj6MatrixPfS0_S0_,@function
_Z8naive_gj6MatrixPfS0_S0_:             ; @_Z8naive_gj6MatrixPfS0_S0_
; %bb.0:
	s_clause 0x4
	s_load_b32 s9, s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	s_cmp_lt_i32 s8, 1
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v2, v1, s8
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v4, v1
	s_mov_b32 s9, s8
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b32 s11, s[4:5], 0x0
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v3, v[5:6], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s11, v3
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s9, s9, -1
	v_add_nc_u32_e32 v4, -1, v4
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	s_cmp_eq_u32 s9, 0
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v0, 0
.LBB0_6:                                ; %Flow39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v1, s8, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v5, v[2:3], off
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v4, null, v5, v5, 1.0
	v_div_scale_f32 v8, vcc_lo, 1.0, v5, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v6, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v4, v6, 1.0
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v0, v3, v0
	v_fmac_f32_e32 v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v8, v6
	v_fma_f32 v9, -v4, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v9, v6
	v_fma_f32 v4, -v4, v7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v6, v7
	v_div_fixup_f32 v3, v4, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v3, v3, v0
	v_add_co_u32 v0, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v2, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8naive_gj6MatrixPfS0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8naive_gj6MatrixPfS0_S0_, .Lfunc_end0-_Z8naive_gj6MatrixPfS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 440
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9compute_rPfPKf       ; -- Begin function _Z9compute_rPfPKf
	.globl	_Z9compute_rPfPKf
	.p2align	8
	.type	_Z9compute_rPfPKf,@function
_Z9compute_rPfPKf:                      ; @_Z9compute_rPfPKf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_and_b32_e32 v2, 0x7fffffff, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9compute_rPfPKf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9compute_rPfPKf, .Lfunc_end1-_Z9compute_rPfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8reduce_rPfPKf        ; -- Begin function _Z8reduce_rPfPKf
	.globl	_Z8reduce_rPfPKf
	.p2align	8
	.type	_Z8reduce_rPfPKf,@function
_Z8reduce_rPfPKf:                       ; @_Z8reduce_rPfPKf
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	s_cmp_lt_u32 s5, 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshl_add_u32 v1, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_lshr_b32 s2, s5, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_1 Depth=1
	v_lshl_add_u32 v2, s2, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB2_4:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s2
	s_branch .LBB2_1
.LBB2_5:                                ; %._crit_edge
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[4:5], 2
	s_add_u32 s0, s0, s2
	ds_load_b32 v1, v0
	s_addc_u32 s1, s1, s3
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8reduce_rPfPKf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8reduce_rPfPKf, .Lfunc_end2-_Z8reduce_rPfPKf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4fillPfS_             ; -- Begin function _Z4fillPfS_
	.globl	_Z4fillPfS_
	.p2align	8
	.type	_Z4fillPfS_,@function
_Z4fillPfS_:                            ; @_Z4fillPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4fillPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z4fillPfS_, .Lfunc_end3-_Z4fillPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           16
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8naive_gj6MatrixPfS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8naive_gj6MatrixPfS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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  - 2
...

	.end_amdgpu_metadata
