#include <stdio.h>

template <unsigned int blockSize>
__device__ void warpReduce(volatile int* sdata, int tid) {
      if (blockSize >= 64) sdata[tid] += sdata[tid + 32];
      if (blockSize >= 32) sdata[tid] += sdata[tid + 16];
      if (blockSize >= 16) sdata[tid] += sdata[tid + 8];
      if (blockSize >= 8) sdata[tid] += sdata[tid + 4];
      if (blockSize >= 4) sdata[tid] += sdata[tid + 2];
      if (blockSize >= 2) sdata[tid] += sdata[tid + 1];
}

template <unsigned int blockSize>
__global__ void reduce6(int *g_idata, int *g_odata, int n) {

      extern __shared__ int sdata[];
      // perform first level of reduction, reading from global memory, writing to shared memory
      unsigned int tid = threadIdx.x;
      unsigned int i = blockIdx.x*(blockSize*2) + threadIdx.x;
      unsigned int gridSize = blockSize*2*gridDim.x;
      sdata[tid] = 0;
      while (i < n) {
            sdata[tid] += g_idata[i] + g_idata[i+blockSize];
            i += gridSize;
      }
      __syncthreads();

      // do reduction in shared mem
      if (blockSize >= 512) {
            if (tid < 256) { sdata[tid] += sdata[tid + 256]; } __syncthreads();
      }
      if (blockSize >= 256) {
            if (tid < 128) { sdata[tid] += sdata[tid + 128]; } __syncthreads();
      }
      if (blockSize >= 128) {
            if (tid < 64) { sdata[tid] += sdata[tid + 64]; } __syncthreads();
      }

      if (tid < 32) warpReduce<blockSize>(sdata, tid);

      // write result for this block to global mem
      if (tid == 0) g_odata[blockIdx.x] = sdata[0];
}



int main(void)
{
  long int size = 1 << 26;
  long int s;
  int sizeByte = size*sizeof(int);
  int* h_data = (int*) malloc(sizeByte);

  for(int i = 0; i < size; i++) {
    // h_data[i] = rand() & 0xFF;
    h_data[i] = i % 10;
  }

  long long int sum = 0;
  for(int i = 0; i < size; i++) sum += h_data[i];
  printf("CPU results = %lld \n", sum);

  int* d_idata = NULL;
  int* d_odata = NULL;
  cudaMalloc(&d_idata, sizeByte);
  cudaMalloc(&d_odata, sizeByte);

  cudaMemcpy(d_idata, h_data, sizeByte, cudaMemcpyHostToDevice);

  s = size >>  6;
  int blocks = (s+512-1)/512;
  reduce6<512><<<blocks/2, 512, 512*sizeof(int)>>>(d_idata, d_odata, size);
  cudaDeviceSynchronize();
  printf("The size of array is %ld and it is processed on # of Blocks: %d \n", size, blocks/2);
  s = blocks/2;
  blocks = (s+512-1)/512;
  reduce6<512><<<blocks/2, 512, 512*sizeof(int)>>>(d_odata, d_idata, s);
  cudaDeviceSynchronize();

  cudaMemcpy(h_data, d_idata, sizeof(int), cudaMemcpyDeviceToHost);
  printf("GPU result = %d\n", h_data[0]);

  cudaFree(d_idata);
  cudaFree(d_odata);
  free(h_data);
}

	.file	"tmpxft_003b9084_00000000-6_00_reduction_final.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0, @function
_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0:
.LFB2176:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	leaq	32(%rsp), %rdx
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7reduce6ILj512EEvPiS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2176:
	.size	_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0, .-_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0
	.section	.text._Z7reduce6ILj512EEvPiS0_i,"axG",@progbits,_Z7reduce6ILj512EEvPiS0_i,comdat
	.weak	_Z7reduce6ILj512EEvPiS0_i
	.type	_Z7reduce6ILj512EEvPiS0_i, @function
_Z7reduce6ILj512EEvPiS0_i:
.LFB2105:
	.cfi_startproc
	endbr64
	jmp	_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0
	.cfi_endproc
.LFE2105:
	.size	_Z7reduce6ILj512EEvPiS0_i, .-_Z7reduce6ILj512EEvPiS0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CPU results = %lld \n"
.LC1:
	.string	"The size of array is %ld and it is processed on # of Blocks: %d \n"
.LC2:
	.string	"GPU result = %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	$268435456, %edi
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	xorl	%ecx, %ecx
	movl	$10, %esi
	movq	%rax, %rbx
.L9:
	movl	%ecx, %eax
	cltd
	idivl	%esi
	movl	%edx, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	$67108864, %rcx
	jne	.L9
	xorl	%eax, %eax
	xorl	%edx, %edx
.L10:
	movslq	(%rbx,%rax,4), %rcx
	incq	%rax
	addq	%rcx, %rdx
	cmpq	$67108864, %rax
	jne	.L10
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movq	%rsp, %rdi
	movl	$268435456, %esi
	movq	%rax, (%rsp)
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
	movl	$8388609, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	salq	$9, %rdx
	salq	$10, %rdi
	movl	$2048, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$67108864, %edx
	call	_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0
.L11:
	call	cudaDeviceSynchronize@PLT
	movl	$1024, %ecx
	movl	$67108864, %edx
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rdi
	salq	$9, %rdx
	movl	$2048, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$1024, %edx
	call	_Z30__wrapper__device_stub_reduce6ILj512EEvRPiS1_Ri.isra.0
.L12:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	(%rbx), %edx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z7reduce6ILj512EEvPiS0_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7reduce6ILj512EEvPiS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

template <unsigned int blockSize>
__device__ void warpReduce(volatile int* sdata, int tid) {
      if (blockSize >= 64) sdata[tid] += sdata[tid + 32];
      if (blockSize >= 32) sdata[tid] += sdata[tid + 16];
      if (blockSize >= 16) sdata[tid] += sdata[tid + 8];
      if (blockSize >= 8) sdata[tid] += sdata[tid + 4];
      if (blockSize >= 4) sdata[tid] += sdata[tid + 2];
      if (blockSize >= 2) sdata[tid] += sdata[tid + 1];
}

template <unsigned int blockSize>
__global__ void reduce6(int *g_idata, int *g_odata, int n) {

      extern __shared__ int sdata[];
      // perform first level of reduction, reading from global memory, writing to shared memory
      unsigned int tid = threadIdx.x;
      unsigned int i = blockIdx.x*(blockSize*2) + threadIdx.x;
      unsigned int gridSize = blockSize*2*gridDim.x;
      sdata[tid] = 0;
      while (i < n) {
            sdata[tid] += g_idata[i] + g_idata[i+blockSize];
            i += gridSize;
      }
      __syncthreads();

      // do reduction in shared mem
      if (blockSize >= 512) {
            if (tid < 256) { sdata[tid] += sdata[tid + 256]; } __syncthreads();
      }
      if (blockSize >= 256) {
            if (tid < 128) { sdata[tid] += sdata[tid + 128]; } __syncthreads();
      }
      if (blockSize >= 128) {
            if (tid < 64) { sdata[tid] += sdata[tid + 64]; } __syncthreads();
      }

      if (tid < 32) warpReduce<blockSize>(sdata, tid);

      // write result for this block to global mem
      if (tid == 0) g_odata[blockIdx.x] = sdata[0];
}



int main(void)
{
  long int size = 1 << 26;
  long int s;
  int sizeByte = size*sizeof(int);
  int* h_data = (int*) malloc(sizeByte);

  for(int i = 0; i < size; i++) {
    // h_data[i] = rand() & 0xFF;
    h_data[i] = i % 10;
  }

  long long int sum = 0;
  for(int i = 0; i < size; i++) sum += h_data[i];
  printf("CPU results = %lld \n", sum);

  int* d_idata = NULL;
  int* d_odata = NULL;
  hipMalloc(&d_idata, sizeByte);
  hipMalloc(&d_odata, sizeByte);

  hipMemcpy(d_idata, h_data, sizeByte, hipMemcpyHostToDevice);

  s = size >>  6;
  int blocks = (s+512-1)/512;
  reduce6<512><<<blocks/2, 512, 512*sizeof(int)>>>(d_idata, d_odata, size);
  hipDeviceSynchronize();
  printf("The size of array is %ld and it is processed on # of Blocks: %d \n", size, blocks/2);
  s = blocks/2;
  blocks = (s+512-1)/512;
  reduce6<512><<<blocks/2, 512, 512*sizeof(int)>>>(d_odata, d_idata, s);
  hipDeviceSynchronize();

  hipMemcpy(h_data, d_idata, sizeof(int), hipMemcpyDeviceToHost);
  printf("GPU result = %d\n", h_data[0]);

  hipFree(d_idata);
  hipFree(d_odata);
  free(h_data);
}

	.text
	.file	"00_reduction_final.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$268435456, %edi                # imm = 0x10000000
	callq	malloc
	movq	%rax, %rbx
	xorl	%eax, %eax
	movl	$3435973837, %ecx               # imm = 0xCCCCCCCD
	xorl	%edx, %edx
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %esi
	imulq	%rcx, %rsi
	shrq	$35, %rsi
	addl	%esi, %esi
	leal	(%rsi,%rsi,4), %esi
	movl	%eax, %edi
	subl	%esi, %edi
	movl	%edi, (%rbx,%rdx)
	addq	$4, %rdx
	incl	%eax
	cmpq	$268435456, %rdx                # imm = 0x10000000
	jne	.LBB0_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
	xorl	%esi, %esi
.LBB0_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%rbx,%rax,4), %rcx
	addq	%rcx, %rsi
	incq	%rax
	cmpq	$67108864, %rax                 # imm = 0x4000000
	jne	.LBB0_3
# %bb.4:
	movabsq	$4294967808, %r14               # imm = 0x100000200
	xorl	%r13d, %r13d
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rsp, %r15
	movq	%r13, (%r15)
	leaq	8(%rsp), %r12
	movq	%r13, (%r12)
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%r15, %rdi
	callq	hipMalloc
	movl	$268435456, %esi                # imm = 0x10000000
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	512(%r14), %rdi
	movl	$2048, %r8d                     # imm = 0x800
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.5:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	callq	_Z22__device_stub__reduce6ILj512EEvPiS0_i
.LBB0_6:
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %edi
	movl	$67108864, %esi                 # imm = 0x4000000
	movl	$1024, %edx                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	leaq	-511(%r14), %rdi
	movl	$2048, %r8d                     # imm = 0x800
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_8
# %bb.7:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z22__device_stub__reduce6ILj512EEvPiS0_i
.LBB0_8:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movl	$4, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%rbx), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z22__device_stub__reduce6ILj512EEvPiS0_i,"axG",@progbits,_Z22__device_stub__reduce6ILj512EEvPiS0_i,comdat
	.weak	_Z22__device_stub__reduce6ILj512EEvPiS0_i # -- Begin function _Z22__device_stub__reduce6ILj512EEvPiS0_i
	.type	_Z22__device_stub__reduce6ILj512EEvPiS0_i,@function
_Z22__device_stub__reduce6ILj512EEvPiS0_i: # @_Z22__device_stub__reduce6ILj512EEvPiS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7reduce6ILj512EEvPiS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__reduce6ILj512EEvPiS0_i, .Lfunc_end1-_Z22__device_stub__reduce6ILj512EEvPiS0_i
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7reduce6ILj512EEvPiS0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CPU results = %lld \n"
	.size	.L.str, 21

	.type	_Z7reduce6ILj512EEvPiS0_i,@object # @_Z7reduce6ILj512EEvPiS0_i
	.section	.rodata._Z7reduce6ILj512EEvPiS0_i,"aG",@progbits,_Z7reduce6ILj512EEvPiS0_i,comdat
	.weak	_Z7reduce6ILj512EEvPiS0_i
	.p2align	3, 0x0
_Z7reduce6ILj512EEvPiS0_i:
	.quad	_Z22__device_stub__reduce6ILj512EEvPiS0_i
	.size	_Z7reduce6ILj512EEvPiS0_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"The size of array is %ld and it is processed on # of Blocks: %d \n"
	.size	.L.str.1, 66

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"GPU result = %d\n"
	.size	.L.str.2, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7reduce6ILj512EEvPiS0_i"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__reduce6ILj512EEvPiS0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7reduce6ILj512EEvPiS0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z7reduce6ILj512EEvPiS0_i,"axG",@progbits,_Z7reduce6ILj512EEvPiS0_i,comdat
	.protected	_Z7reduce6ILj512EEvPiS0_i ; -- Begin function _Z7reduce6ILj512EEvPiS0_i
	.globl	_Z7reduce6ILj512EEvPiS0_i
	.p2align	8
	.type	_Z7reduce6ILj512EEvPiS0_i,@function
_Z7reduce6ILj512EEvPiS0_i:              ; @_Z7reduce6ILj512EEvPiS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	v_lshl_add_u32 v3, v0, 2, 0
	v_lshl_or_b32 v1, s2, 10, v0
	v_mov_b32_e32 v2, 0
	s_mov_b32 s9, 0
	s_mov_b32 s8, exec_lo
	ds_store_b32 v3, v2
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x18
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b32 s0, s0, 10
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v6, v2 :: v_dual_add_nc_u32 v5, 0x200, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s0, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	s_clause 0x1
	global_load_b32 v7, v[7:8], off
	global_load_b32 v5, v[5:6], off
	s_or_b32 s9, vcc_lo, s9
	s_waitcnt vmcnt(0)
	v_add3_u32 v4, v5, v7, v4
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
; %bb.3:                                ; %._crit_edge
	s_or_b32 exec_lo, exec_lo, s9
	ds_store_b32 v3, v4
.LBB0_4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB0_6
; %bb.5:
	ds_load_b32 v1, v3 offset:1024
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v3, v1
.LBB0_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB0_8
; %bb.7:
	ds_load_b32 v1, v3 offset:512
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v3, v1
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	ds_load_b32 v1, v3 offset:256
	ds_load_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	ds_store_b32 v3, v1
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_add_nc_u32_e32 v1, 0x80, v3
	v_cmp_ne_u32_e64 s0, -1, v3
	s_mov_b64 s[4:5], src_shared_base
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	v_cndmask_b32_e64 v2, 0, s5, s0
	v_cndmask_b32_e32 v4, 0, v1, vcc_lo
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	v_cndmask_b32_e64 v1, 0, v3, s0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 64, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[1:2], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 32, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[1:2], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 16, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	flat_store_b32 v[1:2], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v5, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v6, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 8, v3
	v_add_nc_u32_e32 v3, 4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, -1, v4
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v6, v5
	v_cndmask_b32_e64 v5, 0, s5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, -1, v3
	flat_store_b32 v[1:2], v6 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v4, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v5, v[1:2] glc dlc
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e32 v3, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v5, v5, v4
	v_cndmask_b32_e64 v4, 0, s5, vcc_lo
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v3, v[3:4] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v4, v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v3, v4, v3
	flat_store_b32 v[1:2], v3 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB0_14:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7reduce6ILj512EEvPiS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z7reduce6ILj512EEvPiS0_i,"axG",@progbits,_Z7reduce6ILj512EEvPiS0_i,comdat
.Lfunc_end0:
	.size	_Z7reduce6ILj512EEvPiS0_i, .Lfunc_end0-_Z7reduce6ILj512EEvPiS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 968
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym sdata
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7reduce6ILj512EEvPiS0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7reduce6ILj512EEvPiS0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
