#include <iostream>
#include <math.h>
#include <functional>
#include <stdlib.h>     /* srand, rand */
#include <time.h>       /* time */
#include <chrono>

#define ROW_TILE_WIDTH  32
#define COL_TILE_WIDTH  32

#define EPSILON         (1e-6)

template<typename T>
__global__
void naive_matrix_multiply(T *A, T *B, T* C, int width, int cRows, int cCols)
{
  __shared__ T shATile[ROW_TILE_WIDTH][COL_TILE_WIDTH];
  __shared__ T shBTile[ROW_TILE_WIDTH][COL_TILE_WIDTH];

  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;
  T pValue = 0;

  // iterate for width/COL_TILE_WIDTH number of times
  // to compute the C tile
  for(int p = 0; p < width/COL_TILE_WIDTH; p++) {
    //load values to tiles from A and B
    shATile[threadIdx.y][threadIdx.x] = A[row * width + p * ROW_TILE_WIDTH + threadIdx.x];
    shBTile[threadIdx.y][threadIdx.x] = B[(p * COL_TILE_WIDTH + threadIdx.y) * cCols + col];

    // wait until all threads finish loading values
    __syncthreads();
    // update pValue for this thread
    for(int i = 0; i < COL_TILE_WIDTH;  i++) pValue += shATile[threadIdx.y][i] * shBTile[i][threadIdx.x];
    // wait until all threads finish computing pValue before overwriting
    __syncthreads();

  }
  
  C[row * cCols + col] = pValue;

}

template<typename T>
void initialize_matrix(T* M, int rows, int cols, std::function<float()> F) {
  for(int i = 0; i < rows; i++){
    for(int j = 0; j < cols; j++){
      M[i * cols + j] = F();
    }
  }
}

template<typename T>
void initialize_matrix(T* M, int rows, int cols, std::function<float(int, int)> F) {
  for(int i = 0; i < rows; i++){
    for(int j = 0; j < cols; j++){
      M[i * cols + j] = F(i, j);
    }
  }
}

template<typename T>
void print_matrix(T* M, int rows, int cols) {
  for(int i = 0; i < rows; i++){
    for(int j = 0; j < cols; j++){
        std::cout << M[i * cols + j] << " ";
    }
    std::cout << "\n";
  }
}



template<typename T>
void naive_matrix_multiply_cpu(T *A, T *B, T* C, int width, int C_rows, int C_cols){
  
  for(int i = 0; i < C_rows; i++)
    for(int j = 0; j < C_cols; j++){
      T value = 0.0f;
      for(int k = 0; k < width; k++){
        value += A[i * width + k] * B[k * C_cols + j];
      }

     
      C[i * C_cols + j] = value;
    }
}

template<typename T>
T maxDiff(T* A1, T* A2, int rows, int cols){
  T maxDiff = A1[0] - A2[0];
  for(int i = 0; i < rows; i++) {
    for(int j = 0; j < cols; j++){
      T diff = abs(A1[i * cols + j] - A2[i * cols + j]);
      if( diff > maxDiff) {
          maxDiff = diff;
      }
    }
  }

  
  return maxDiff;
}


int main(void)
{
  int A_rows = 1 << 9;
  int A_cols = 1 << 10;
  int B_rows = A_cols;
  int B_cols = 1 << 11;
  int C_rows = A_rows;
  int C_cols = B_cols;
  int A_size = A_rows * A_cols;
  int B_size = B_rows * B_cols;
  int C_size = C_rows * C_cols;
  float *A, *B, *C, *C_cpu;
    
  // timing
  cudaEvent_t start_gpu, stop_gpu;
  float gpu_time_ms = 0;
  cudaEventCreate(&start_gpu);
  cudaEventCreate(&stop_gpu);
  
  // Allocate Unified Memory – accessible from CPU or GPU
  cudaMallocManaged(&A, A_size*sizeof(float));
  cudaMallocManaged(&B, B_size*sizeof(float));
  cudaMallocManaged(&C, C_size*sizeof(float));
  cudaMallocManaged(&C_cpu, C_size*sizeof(float));

  // initialize A and B matrices
  auto all_ones = []() -> float {
    return 1.0f;
  };

  srand (time(NULL));
  auto rand_numbers = []() -> float {
    return static_cast<float>(rand())/(static_cast<float>(RAND_MAX/1000));
  };

  auto index_based = [](int i, int j) -> float {
    return j;
  };

  initialize_matrix<float>(A, A_rows, A_cols, rand_numbers);
  initialize_matrix<float>(B, B_rows, B_cols, rand_numbers);


  // launch kernel

  dim3 dim_grid(C_cols/COL_TILE_WIDTH, C_rows/ROW_TILE_WIDTH, 1);
  dim3 dim_block(COL_TILE_WIDTH, ROW_TILE_WIDTH, 1);

  cudaEventRecord(start_gpu);
  naive_matrix_multiply<float><<<dim_grid, dim_block>>>(A, B, C, A_cols, C_rows, C_cols);
  cudaEventRecord(stop_gpu);

  // Wait for GPU to finish before accessing on host
  cudaDeviceSynchronize();
  
  cudaEventSynchronize(stop_gpu);
  cudaEventElapsedTime(&gpu_time_ms, start_gpu, stop_gpu);
  

  // check results on CPU
  auto t1 = std::chrono::system_clock::now();
  naive_matrix_multiply_cpu<float>(A, B, C_cpu, A_cols, C_rows, C_cols);
  auto t2 = std::chrono::system_clock::now();

  if(fabsf(maxDiff<float>(C, C_cpu, C_rows, C_cols)) <= (float)EPSILON )
     std::cout << "PASS" << std::endl;
  else
     std::cout << "FAIL" << std::endl;

  auto cpu_time_ms = std::chrono::duration_cast<std::chrono::microseconds>(t2 - t1).count()/1000.0f;
  std::cout << "GPU time = " << gpu_time_ms << "ms" << std::endl;
  std::cout << "CPU time = " << cpu_time_ms << "ms" << std::endl;
  std::cout << "Speedup = " << cpu_time_ms/gpu_time_ms << std::endl;
  
  // Free memory
  cudaFree(A);
  cudaFree(B);
  cudaFree(C);
  
  return 0; 
}


	.file	"tmpxft_002502d7_00000000-6_tiled_matrix_multiply.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4999:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4999:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL55__device_stub__Z21naive_matrix_multiplyIfEvPT_S1_S1_iiiPfS_S_iii, @function
_ZL55__device_stub__Z21naive_matrix_multiplyIfEvPT_S1_S1_iiiPfS_S_iii:
.LFB5021:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5021:
	.size	_ZL55__device_stub__Z21naive_matrix_multiplyIfEvPT_S1_S1_iiiPfS_S_iii, .-_ZL55__device_stub__Z21naive_matrix_multiplyIfEvPT_S1_S1_iiiPfS_S_iii
	.type	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation, @function
_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation:
.LFB5538:
	.cfi_startproc
	endbr64
	testl	%edx, %edx
	je	.L8
	decl	%edx
	jne	.L10
	movq	%rsi, (%rdi)
	jmp	.L10
.L8:
	leaq	_ZTIZ4mainEUlvE0_(%rip), %rax
	movq	%rax, (%rdi)
.L10:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5538:
	.size	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation, .-_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB5753:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE5753:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.type	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data, @function
_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data:
.LFB5534:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	divss	.LC0(%rip), %xmm0
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5534:
	.size	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data, .-_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data
	.section	.text._Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,"axG",@progbits,_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,comdat
	.weak	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.type	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii, @function
_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii:
.LFB5366:
	.cfi_startproc
	endbr64
	jmp	_ZL55__device_stub__Z21naive_matrix_multiplyIfEvPT_S1_S1_iiiPfS_S_iii
	.cfi_endproc
.LFE5366:
	.size	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii, .-_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.section	.text._ZNSt14_Function_baseD2Ev,"axG",@progbits,_ZNSt14_Function_baseD5Ev,comdat
	.align 2
	.weak	_ZNSt14_Function_baseD2Ev
	.type	_ZNSt14_Function_baseD2Ev, @function
_ZNSt14_Function_baseD2Ev:
.LFB3651:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3651
	endbr64
	movq	16(%rdi), %rax
	testq	%rax, %rax
	je	.L21
	movq	%rdi, %rsi
	pushq	%rdx
	.cfi_def_cfa_offset 16
	movl	$3, %edx
	call	*%rax
	popq	%rcx
	.cfi_def_cfa_offset 8
	ret
.L21:
	ret
	.cfi_endproc
.LFE3651:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZNSt14_Function_baseD2Ev,"aG",@progbits,_ZNSt14_Function_baseD5Ev,comdat
.LLSDA3651:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3651-.LLSDACSB3651
.LLSDACSB3651:
.LLSDACSE3651:
	.section	.text._ZNSt14_Function_baseD2Ev,"axG",@progbits,_ZNSt14_Function_baseD5Ev,comdat
	.size	_ZNSt14_Function_baseD2Ev, .-_ZNSt14_Function_baseD2Ev
	.weak	_ZNSt14_Function_baseD1Ev
	.set	_ZNSt14_Function_baseD1Ev,_ZNSt14_Function_baseD2Ev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB5024:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE5024:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE,"axG",@progbits,_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE,comdat
	.weak	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
	.type	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE, @function
_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE:
.LFB5365:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rcx, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L27:
	cmpl	%esi, %r15d
	jge	.L26
	movslq	%r14d, %rax
	xorl	%ebp, %ebp
	leaq	0(%r13,%rax,4), %rax
.L31:
	cmpl	%ebp, %r12d
	jle	.L33
	cmpq	$0, 16(%rbx)
	jne	.L28
	call	_ZSt25__throw_bad_function_callv@PLT
.L28:
	movl	%esi, 12(%rsp)
	movq	%rbx, %rdi
	movq	%rax, (%rsp)
	call	*24(%rbx)
	movq	(%rsp), %rax
	movl	12(%rsp), %esi
	movss	%xmm0, (%rax,%rbp,4)
	incq	%rbp
	jmp	.L31
.L33:
	incl	%r15d
	addl	%r12d, %r14d
	jmp	.L27
.L26:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5365:
	.size	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE, .-_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
	.section	.rodata.str1.1
.LC5:
	.string	"PASS"
.LC6:
	.string	"FAIL"
.LC8:
	.string	"GPU time = "
.LC9:
	.string	"ms"
.LC10:
	.string	"CPU time = "
.LC11:
	.string	"Speedup = "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4980:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4980
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	leaq	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	addq	$-128, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	leaq	88(%rsp), %rbx
.LEHB0:
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$2097152, %esi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$8388608, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$4194304, %esi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	movl	$4194304, %esi
	leaq	40(%rsp), %rdi
	call	cudaMallocManaged@PLT
.LEHE0:
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movq	16(%rsp), %rdi
	xorps	%xmm0, %xmm0
	movq	%rbx, %rcx
	movl	$1024, %edx
	movl	$512, %esi
	movq	%r12, 112(%rsp)
	movq	%rbp, 104(%rsp)
	movups	%xmm0, 88(%rsp)
.LEHB1:
	call	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
.LEHE1:
	movq	%rbx, %rdi
	call	_ZNSt14_Function_baseD2Ev
	movq	24(%rsp), %rdi
	xorps	%xmm0, %xmm0
	movq	%rbx, %rcx
	movl	$2048, %edx
	movl	$1024, %esi
	movq	%r12, 112(%rsp)
	movq	%rbp, 104(%rsp)
	movups	%xmm0, 88(%rsp)
.LEHB2:
	call	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
.LEHE2:
	movq	%rbx, %rdi
	call	_ZNSt14_Function_baseD2Ev
	movl	$1073741825, %eax
	xorl	%esi, %esi
	movq	48(%rsp), %rdi
	salq	$6, %rax
	movl	$1, 72(%rsp)
	movq	%rax, 64(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
.LEHB3:
	call	cudaEventRecord@PLT
	movl	84(%rsp), %ecx
	movl	72(%rsp), %esi
	xorl	%r9d, %r9d
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$2048, %r9d
	movl	$512, %r8d
	movq	16(%rsp), %rdi
	movl	$1024, %ecx
	call	_ZL55__device_stub__Z21naive_matrix_multiplyIfEvPT_S1_S1_iiiPfS_S_iii
.L35:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	call	cudaDeviceSynchronize@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rsi
	movq	56(%rsp), %rdx
	leaq	12(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %r9
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	movq	16(%rsp), %rcx
	movq	%rax, %r12
.L36:
	xorl	%eax, %eax
.L40:
	leaq	(%r9,%rax,4), %r8
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L37:
	movss	(%rcx,%rdx,4), %xmm1
	mulss	(%r8), %xmm1
	incq	%rdx
	addq	$8192, %r8
	addss	%xmm1, %xmm0
	cmpq	$1024, %rdx
	jne	.L37
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	cmpq	$2048, %rax
	jne	.L40
	addl	$1024, %esi
	addq	$8192, %rdi
	addq	$4096, %rcx
	cmpl	$524288, %esi
	jne	.L36
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	40(%rsp), %rsi
	xorl	%edx, %edx
	movq	32(%rsp), %rdi
	movq	%rax, %rbx
	movss	.LC3(%rip), %xmm2
	movss	(%rdi), %xmm0
	subss	(%rsi), %xmm0
.L41:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.L43:
	movss	(%rdi,%rax), %xmm1
	subss	(%rsi,%rax), %xmm1
	incl	%ecx
	addq	$4, %rax
	andps	%xmm2, %xmm1
	maxss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	cmpl	$2048, %ecx
	jne	.L43
	addq	$8192, %rdx
	cmpq	$4194304, %rdx
	jne	.L41
	movss	.LC4(%rip), %xmm1
	andps	%xmm2, %xmm0
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rbp
	comiss	%xmm0, %xmm1
	jnb	.L62
	leaq	.LC6(%rip), %rsi
.L62:
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbx, %rax
	movl	$1000, %ecx
	movq	%rbp, %rdi
	subq	%r12, %rax
	leaq	.LC8(%rip), %rsi
	leaq	.LC9(%rip), %rbx
	cqto
	idivq	%rcx
	cvtsi2ssq	%rax, %xmm0
	divss	.LC7(%rip), %xmm0
	movd	%xmm0, %r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC10(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r12d, %xmm3
	movq	%rax, %rdi
	cvtss2sd	%xmm3, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC11(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r12d, %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	jmp	.L60
.L54:
	endbr64
	jmp	.L64
.L55:
	endbr64
.L64:
	movq	%rax, %rbp
.L50:
	movq	%rbx, %rdi
	call	_ZNSt14_Function_baseD2Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L60
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE3:
.L60:
	call	__stack_chk_fail@PLT
.L52:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4980:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4980:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4980-.LLSDACSB4980
.LLSDACSB4980:
	.uleb128 .LEHB0-.LFB4980
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4980
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L54-.LFB4980
	.uleb128 0
	.uleb128 .LEHB2-.LFB4980
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L55-.LFB4980
	.uleb128 0
	.uleb128 .LEHB3-.LFB4980
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4980:
	.section	.text.startup
	.size	main, .-main
	.section	.data.rel.ro,"aw"
	.align 8
	.type	_ZTIZ4mainEUlvE0_, @object
	.size	_ZTIZ4mainEUlvE0_, 16
_ZTIZ4mainEUlvE0_:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSZ4mainEUlvE0_
	.section	.rodata
	.align 8
	.type	_ZTSZ4mainEUlvE0_, @object
	.size	_ZTSZ4mainEUlvE0_, 15
_ZTSZ4mainEUlvE0_:
	.string	"*Z4mainEUlvE0_"
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1241715308
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC4:
	.long	897988541
	.align 4
.LC7:
	.long	1148846080
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>
#include <functional>
#include <stdlib.h>     /* srand, rand */
#include <time.h>       /* time */
#include <chrono>

#define ROW_TILE_WIDTH  32
#define COL_TILE_WIDTH  32

#define EPSILON         (1e-6)

template<typename T>
__global__
void naive_matrix_multiply(T *A, T *B, T* C, int width, int cRows, int cCols)
{
  __shared__ T shATile[ROW_TILE_WIDTH][COL_TILE_WIDTH];
  __shared__ T shBTile[ROW_TILE_WIDTH][COL_TILE_WIDTH];

  int row = blockIdx.y * blockDim.y + threadIdx.y;
  int col = blockIdx.x * blockDim.x + threadIdx.x;
  T pValue = 0;

  // iterate for width/COL_TILE_WIDTH number of times
  // to compute the C tile
  for(int p = 0; p < width/COL_TILE_WIDTH; p++) {
    //load values to tiles from A and B
    shATile[threadIdx.y][threadIdx.x] = A[row * width + p * ROW_TILE_WIDTH + threadIdx.x];
    shBTile[threadIdx.y][threadIdx.x] = B[(p * COL_TILE_WIDTH + threadIdx.y) * cCols + col];

    // wait until all threads finish loading values
    __syncthreads();
    // update pValue for this thread
    for(int i = 0; i < COL_TILE_WIDTH;  i++) pValue += shATile[threadIdx.y][i] * shBTile[i][threadIdx.x];
    // wait until all threads finish computing pValue before overwriting
    __syncthreads();

  }
  
  C[row * cCols + col] = pValue;

}

template<typename T>
void initialize_matrix(T* M, int rows, int cols, std::function<float()> F) {
  for(int i = 0; i < rows; i++){
    for(int j = 0; j < cols; j++){
      M[i * cols + j] = F();
    }
  }
}

template<typename T>
void initialize_matrix(T* M, int rows, int cols, std::function<float(int, int)> F) {
  for(int i = 0; i < rows; i++){
    for(int j = 0; j < cols; j++){
      M[i * cols + j] = F(i, j);
    }
  }
}

template<typename T>
void print_matrix(T* M, int rows, int cols) {
  for(int i = 0; i < rows; i++){
    for(int j = 0; j < cols; j++){
        std::cout << M[i * cols + j] << " ";
    }
    std::cout << "\n";
  }
}



template<typename T>
void naive_matrix_multiply_cpu(T *A, T *B, T* C, int width, int C_rows, int C_cols){
  
  for(int i = 0; i < C_rows; i++)
    for(int j = 0; j < C_cols; j++){
      T value = 0.0f;
      for(int k = 0; k < width; k++){
        value += A[i * width + k] * B[k * C_cols + j];
      }

     
      C[i * C_cols + j] = value;
    }
}

template<typename T>
T maxDiff(T* A1, T* A2, int rows, int cols){
  T maxDiff = A1[0] - A2[0];
  for(int i = 0; i < rows; i++) {
    for(int j = 0; j < cols; j++){
      T diff = abs(A1[i * cols + j] - A2[i * cols + j]);
      if( diff > maxDiff) {
          maxDiff = diff;
      }
    }
  }

  
  return maxDiff;
}


int main(void)
{
  int A_rows = 1 << 9;
  int A_cols = 1 << 10;
  int B_rows = A_cols;
  int B_cols = 1 << 11;
  int C_rows = A_rows;
  int C_cols = B_cols;
  int A_size = A_rows * A_cols;
  int B_size = B_rows * B_cols;
  int C_size = C_rows * C_cols;
  float *A, *B, *C, *C_cpu;
    
  // timing
  hipEvent_t start_gpu, stop_gpu;
  float gpu_time_ms = 0;
  hipEventCreate(&start_gpu);
  hipEventCreate(&stop_gpu);
  
  // Allocate Unified Memory – accessible from CPU or GPU
  hipMallocManaged(&A, A_size*sizeof(float));
  hipMallocManaged(&B, B_size*sizeof(float));
  hipMallocManaged(&C, C_size*sizeof(float));
  hipMallocManaged(&C_cpu, C_size*sizeof(float));

  // initialize A and B matrices
  auto all_ones = []() -> float {
    return 1.0f;
  };

  srand (time(NULL));
  auto rand_numbers = []() -> float {
    return static_cast<float>(rand())/(static_cast<float>(RAND_MAX/1000));
  };

  auto index_based = [](int i, int j) -> float {
    return j;
  };

  initialize_matrix<float>(A, A_rows, A_cols, rand_numbers);
  initialize_matrix<float>(B, B_rows, B_cols, rand_numbers);


  // launch kernel

  dim3 dim_grid(C_cols/COL_TILE_WIDTH, C_rows/ROW_TILE_WIDTH, 1);
  dim3 dim_block(COL_TILE_WIDTH, ROW_TILE_WIDTH, 1);

  hipEventRecord(start_gpu);
  naive_matrix_multiply<float><<<dim_grid, dim_block>>>(A, B, C, A_cols, C_rows, C_cols);
  hipEventRecord(stop_gpu);

  // Wait for GPU to finish before accessing on host
  hipDeviceSynchronize();
  
  hipEventSynchronize(stop_gpu);
  hipEventElapsedTime(&gpu_time_ms, start_gpu, stop_gpu);
  

  // check results on CPU
  auto t1 = std::chrono::system_clock::now();
  naive_matrix_multiply_cpu<float>(A, B, C_cpu, A_cols, C_rows, C_cols);
  auto t2 = std::chrono::system_clock::now();

  if(fabsf(maxDiff<float>(C, C_cpu, C_rows, C_cols)) <= (float)EPSILON )
     std::cout << "PASS" << std::endl;
  else
     std::cout << "FAIL" << std::endl;

  auto cpu_time_ms = std::chrono::duration_cast<std::chrono::microseconds>(t2 - t1).count()/1000.0f;
  std::cout << "GPU time = " << gpu_time_ms << "ms" << std::endl;
  std::cout << "CPU time = " << cpu_time_ms << "ms" << std::endl;
  std::cout << "Speedup = " << cpu_time_ms/gpu_time_ms << std::endl;
  
  // Free memory
  hipFree(A);
  hipFree(B);
  hipFree(C);
  
  return 0; 
}


	.text
	.file	"tiled_matrix_multiply.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI0_1:
	.long	0x358637bd                      # float 9.99999997E-7
.LCPI0_2:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$128, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$0, 8(%rsp)
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rbx
	movl	$2097152, %esi                  # imm = 0x200000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$8388608, %esi                  # imm = 0x800000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	56(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	movl	$1, %edx
	callq	hipMallocManaged
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	(%rbx), %rdi
	xorps	%xmm0, %xmm0
	leaq	96(%rsp), %rcx
	movaps	%xmm0, (%rcx)
	movq	$_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data, 24(%rcx)
	movq	$_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation, 16(%rcx)
.Ltmp0:
	movl	$512, %esi                      # imm = 0x200
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
.Ltmp1:
# %bb.1:
	movq	112(%rsp), %rax
	testq	%rax, %rax
	je	.LBB0_3
# %bb.2:
.Ltmp6:
	leaq	96(%rsp), %rdi
	movq	%rdi, %rsi
	movl	$3, %edx
	callq	*%rax
.Ltmp7:
.LBB0_3:                                # %_ZNSt14_Function_baseD2Ev.exit
	movq	16(%rsp), %rdi
	xorps	%xmm0, %xmm0
	leaq	64(%rsp), %rcx
	movaps	%xmm0, (%rcx)
	movq	$_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data, 24(%rcx)
	movq	$_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation, 16(%rcx)
.Ltmp9:
	movl	$1024, %esi                     # imm = 0x400
	movl	$2048, %edx                     # imm = 0x800
	callq	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
.Ltmp10:
# %bb.4:
	movq	80(%rsp), %rax
	testq	%rax, %rax
	je	.LBB0_6
# %bb.5:
.Ltmp15:
	leaq	64(%rsp), %rdi
	movq	%rdi, %rsi
	movl	$3, %edx
	callq	*%rax
.Ltmp16:
.LBB0_6:                                # %_ZNSt14_Function_baseD2Ev.exit41
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$68719476800, %rdi              # imm = 0x1000000040
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_8
# %bb.7:
	movq	40(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	$1024, %ecx                     # imm = 0x400
	movl	$512, %r8d                      # imm = 0x200
	movl	$2048, %r9d                     # imm = 0x800
	callq	_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii
.LBB0_8:
	movq	24(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	8(%rsp), %rdi
	callq	hipEventElapsedTime
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
	movq	40(%rsp), %rax
	movq	16(%rsp), %rcx
	movq	56(%rsp), %rdx
.LBB0_9:                                # %.preheader27.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_10 Depth 2
                                        #       Child Loop BB0_11 Depth 3
	movq	%r14, %rsi
	shlq	$13, %rsi
	addq	%rdx, %rsi
	movq	%rcx, %rdi
	xorl	%r8d, %r8d
.LBB0_10:                               # %.preheader.i
                                        #   Parent Loop BB0_9 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_11 Depth 3
	xorps	%xmm0, %xmm0
	movq	%rdi, %r9
	xorl	%r10d, %r10d
.LBB0_11:                               # %.lr.ph.i
                                        #   Parent Loop BB0_9 Depth=1
                                        #     Parent Loop BB0_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	addq	$8192, %r9                      # imm = 0x2000
	cmpq	$1024, %r10                     # imm = 0x400
	jne	.LBB0_11
# %bb.12:                               # %._crit_edge.i
                                        #   in Loop: Header=BB0_10 Depth=2
	movss	%xmm0, (%rsi,%r8,4)
	incq	%r8
	addq	$4, %rdi
	cmpq	$2048, %r8                      # imm = 0x800
	jne	.LBB0_10
# %bb.13:                               # %._crit_edge31.i
                                        #   in Loop: Header=BB0_9 Depth=1
	incq	%r14
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$512, %r14                      # imm = 0x200
	jne	.LBB0_9
# %bb.14:                               # %_Z25naive_matrix_multiply_cpuIfEvPT_S1_S1_iii.exit
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	32(%rsp), %rcx
	movq	56(%rsp), %rdx
	movss	(%rcx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	subss	(%rdx), %xmm0
	movq	%rax, %r14
	xorl	%eax, %eax
	movaps	.LCPI0_0(%rip), %xmm1           # xmm1 = [NaN,NaN,NaN,NaN]
	movl	$8192, %esi                     # imm = 0x2000
.LBB0_15:                               # %.preheader.i46
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_16 Depth 2
	xorl	%edi, %edi
.LBB0_16:                               #   Parent Loop BB0_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movaps	%xmm0, %xmm2
	movss	(%rcx,%rdi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	subss	(%rdx,%rdi,4), %xmm0
	andps	%xmm1, %xmm0
	maxss	%xmm2, %xmm0
	incq	%rdi
	cmpq	$2048, %rdi                     # imm = 0x800
	jne	.LBB0_16
# %bb.17:                               # %._crit_edge.i51
                                        #   in Loop: Header=BB0_15 Depth=1
	incq	%rax
	addq	%rsi, %rdx
	addq	%rsi, %rcx
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB0_15
# %bb.18:                               # %_Z7maxDiffIfET_PS0_S1_ii.exit
	andps	.LCPI0_0(%rip), %xmm0
	movss	.LCPI0_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	movl	$.L.str.1, %eax
	movl	$.L.str, %esi
	cmovbq	%rax, %rsi
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$4, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	subq	%rbx, %r14
	movabsq	$2361183241434822607, %rcx      # imm = 0x20C49BA5E353F7CF
	movq	%r14, %rax
	imulq	%rcx
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %rdx
	addq	%rax, %rdx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rdx, %xmm0
	divss	.LCPI0_2(%rip), %xmm0
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	8(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$128, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB0_19:
	.cfi_def_cfa_offset 160
.Ltmp17:
	jmp	.LBB0_28
.LBB0_20:
.Ltmp8:
	jmp	.LBB0_28
.LBB0_21:
.Ltmp11:
	movq	%rax, %rbx
	movq	80(%rsp), %rax
	testq	%rax, %rax
	je	.LBB0_26
# %bb.22:
.Ltmp12:
	leaq	64(%rsp), %rdi
	movq	%rdi, %rsi
	movl	$3, %edx
	callq	*%rax
.Ltmp13:
	jmp	.LBB0_26
.LBB0_23:
.Ltmp14:
	jmp	.LBB0_28
.LBB0_24:
.Ltmp2:
	movq	%rax, %rbx
	movq	112(%rsp), %rax
	testq	%rax, %rax
	je	.LBB0_26
# %bb.25:
.Ltmp3:
	leaq	96(%rsp), %rdi
	movq	%rdi, %rsi
	movl	$3, %edx
	callq	*%rax
.Ltmp4:
.LBB0_26:                               # %_ZNSt14_Function_baseD2Ev.exit43
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB0_27:
.Ltmp5:
.LBB0_28:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp12-.Ltmp16                #   Call between .Ltmp16 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 8 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 9 <<
	.uleb128 .Lfunc_end0-.Ltmp4             #   Call between .Ltmp4 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE,"axG",@progbits,_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE,comdat
	.weak	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE # -- Begin function _Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
	.type	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE,@function
_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE: # @_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB1_7
# %bb.1:                                # %.preheader.lr.ph
	movq	%rcx, %rbx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	movl	%edx, 4(%rsp)                   # 4-byte Spill
.LBB1_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%edx, %edx
	jle	.LBB1_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%ebp, %ebp
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	$0, 16(%rbx)
	je	.LBB1_8
# %bb.5:                                # %_ZNKSt8functionIFfvEEclEv.exit
                                        #   in Loop: Header=BB1_4 Depth=2
	movq	%rbx, %rdi
	callq	*24(%rbx)
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB1_4
.LBB1_6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r14
	movl	4(%rsp), %edx                   # 4-byte Reload
	addl	%edx, %r13d
	cmpq	16(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_8:
	.cfi_def_cfa_offset 80
	callq	_ZSt25__throw_bad_function_callv
.Lfunc_end1:
	.size	_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE, .Lfunc_end1-_Z17initialize_matrixIfEvPT_iiSt8functionIFfvEE
	.cfi_endproc
                                        # -- End function
	.section	.text._Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii,"axG",@progbits,_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii,comdat
	.weak	_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii # -- Begin function _Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii
	.type	_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii,@function
_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii: # @_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii, .Lfunc_end2-_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end3:
	.size	__clang_call_terminate, .Lfunc_end3-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data
.LCPI4_0:
	.long	0x4a03126c                      # float 2147483
	.text
	.p2align	1, 0x90
	.type	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data,@function
_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data: # @_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	rand
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI4_0(%rip), %xmm0
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data, .Lfunc_end4-_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data
	.cfi_endproc
                                        # -- End function
	.p2align	1, 0x90                         # -- Begin function _ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation
	.type	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation,@function
_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation: # @_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	je	.LBB5_1
# %bb.2:
	cmpl	$1, %edx
	je	.LBB5_3
	jmp	.LBB5_4
.LBB5_1:
	movl	$_ZTIZ4mainEUlvE0_, %esi
.LBB5_3:                                # %_ZNSt14_Function_base13_Base_managerIZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation.exit.sink.split
	movq	%rsi, (%rdi)
.LBB5_4:                                # %_ZNSt14_Function_base13_Base_managerIZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation.exit
	xorl	%eax, %eax
	retq
.Lfunc_end5:
	.size	_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation, .Lfunc_end5-_ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,@object # @_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.section	.rodata._Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,"aG",@progbits,_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,comdat
	.weak	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.p2align	3, 0x0
_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii:
	.quad	_Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii
	.size	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"PASS"
	.size	.L.str, 5

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"FAIL"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"GPU time = "
	.size	.L.str.2, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"ms"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU time = "
	.size	.L.str.4, 12

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Speedup = "
	.size	.L.str.5, 11

	.type	_ZTSZ4mainEUlvE0_,@object       # @_ZTSZ4mainEUlvE0_
	.section	.rodata,"a",@progbits
_ZTSZ4mainEUlvE0_:
	.asciz	"Z4mainEUlvE0_"
	.size	_ZTSZ4mainEUlvE0_, 14

	.type	_ZTIZ4mainEUlvE0_,@object       # @_ZTIZ4mainEUlvE0_
	.p2align	3, 0x0
_ZTIZ4mainEUlvE0_:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTSZ4mainEUlvE0_
	.size	_ZTIZ4mainEUlvE0_, 16

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii"
	.size	.L__unnamed_1, 42

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z36__device_stub__naive_matrix_multiplyIfEvPT_S1_S1_iii
	.addrsig_sym _ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E9_M_invokeERKSt9_Any_data
	.addrsig_sym _ZNSt17_Function_handlerIFfvEZ4mainEUlvE0_E10_M_managerERSt9_Any_dataRKS3_St18_Manager_operation
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTSZ4mainEUlvE0_
	.addrsig_sym _ZTIZ4mainEUlvE0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,"axG",@progbits,_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,comdat
	.protected	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii ; -- Begin function _Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.globl	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
	.p2align	8
	.type	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,@function
_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii: ; @_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
; %bb.0:
	s_clause 0x4
	s_load_b32 s8, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x18
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v6, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s8, 16
	s_and_b32 s8, s8, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s9, v[3:4]
	v_mad_u64_u32 v[1:2], null, s14, s8, v[6:7]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_i32 s3, 32
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v9, 2, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[4:5], null, v0, s3, v[6:7]
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 7, v3
	v_or_b32_e32 v8, 0x1000, v9
	s_ashr_i32 s8, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_lshr_b32 s8, s8, 27
	v_add_nc_u32_e32 v9, v7, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v8, v7
	s_add_i32 s3, s3, s8
	s_mov_b32 s8, 0
	s_ashr_i32 s3, s3, 5
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_lshl_b32 s9, s8, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, s9, v3
	v_add_nc_u32_e32 v5, s9, v4
	s_mov_b32 s9, 0
	v_mad_u64_u32 v[11:12], null, v13, s2, v[1:2]
	v_mov_b32_e32 v12, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[13:14], 2, v[5:6]
	v_mov_b32_e32 v5, v8
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v13, vcc_lo, s4, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s9, v7
	s_add_i32 s9, s9, 4
	ds_load_b32 v12, v5
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v5, 0x80, v5
	s_cmpk_eq_i32 s9, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v11, v12
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %Flow49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,"axG",@progbits,_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii,comdat
.Lfunc_end0:
	.size	_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii, .Lfunc_end0-_Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21naive_matrix_multiplyIfEvPT_S1_S1_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21naive_matrix_multiplyIfEvPT_S1_S1_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
