/********************************************************
* life_seq_cuda.cu
* Modifed BY Thomas Kinch
* Date: 5/14/18
*******************************************************/

/* Compile with `gcc life.c`.
 * When CUDA-fied, compile with `nvcc life.cu`
 */

#include <cuda.h>
#include <stdlib.h> // for rand
#include <string.h> // for memcpy
#include <stdio.h> // for printf
#include <time.h> // for nanosleep

#define WIDTH 60
#define HEIGHT 40
#define threads 256

void fill_board(int *board, int width, int height) {
    int i;
    for (i=0; i<width*height; i++)
        board[i] = rand() % 2;
}

void print_board(int *board) {
    int x, y;
    for (y=0; y<HEIGHT; y++) {
        for (x=0; x<WIDTH; x++) {
            char c = board[y * WIDTH + x] ? '#':' ';
            printf("%c", c);
        }
        printf("\n");
    }
    printf("-----\n");
}


__global__ void step(int *current, int *next, int width, int height) {
	 
	 //Offset
	 const int offsets[8][2] = {{-1, 1},{0, 1},{1, 1},
										 {-1, 0},       {1, 0},
										 {-1,-1},{0,-1},{1,-1}};


	 // coordinates of the cell we're currently evaluating
	 int x = blockIdx.x * width + threadIdx.x;
	 int y = blockIdx.y * height + threadIdx.y;
      
    // offset index, neighbor coordinates, alive neighbor count
    int i, nx, ny, num_neighbors;

    // write the next board state
    for (y=0; y<height; y++) {
        for (x=0; x<width; x++) {

            // count this cell's alive neighbors
            num_neighbors = 0;
            for (i=0; i<8; i++) {
                // To make the board torroidal, we use modular arithmetic to
                // wrap neighbor coordinates around to the other side of the
                // board if they fall off.
                nx = (x + offsets[i][0] + width) % width;
                ny = (y + offsets[i][1] + height) % height;
                if (current[ny * width + nx]) {
                    num_neighbors++;
                }
            }

            // apply the Game of Life rules to this cell
            next[y * width + x] = 0;
            if ((current[y * width + x] && num_neighbors==2) ||
                    num_neighbors==3) {
                next[y * width + x] = 1;
            }
        }
    }
}

int main(int argc, const char *argv[]) {
    // parse the width and height command line arguments, if provided
    int width, height, iters, out;
    if (argc < 3) {
        printf("usage: life iterations 1=print\n"); 
        exit(1);
    }
    iters = atoi(argv[1]);
    out = atoi(argv[2]);
    if (argc == 5) {
        width = atoi(argv[3]);
        height = atoi(argv[4]);
        printf("Running %d iterarions at %d by %d pixels.\n", iters, width, height);
    } else {
        width = WIDTH;
        height = HEIGHT;
    }

    struct timespec delay = {0, 125000000}; // 0.125 seconds
    struct timespec remaining;
    // The two boards 
    int *current, *next, many=0;
	 int *gpu_curr, *gpu_next;

    size_t board_size = sizeof(int) * width * height;
    current = (int *) malloc(board_size); // same as: int current[width * height];
    next = (int *) malloc(board_size);    // same as: int next[width *height];
 

    // Initialize the global "current".
    fill_board(current, width, height);
	 
	 /**************
	 * Cuda Malloc
	 **************/
	 cudaMalloc((void**)&gpu_curr, board_size);
	 cudaMalloc((void**)&gpu_next, board_size);

	 //Begin Iterations
	 clock_t begin, end;
	 double time_spent = 0;
    while (many<iters) {
        many++;
        if (out==1)
			   //Print Current Board
            print_board(current);
 
				/************
				* Cuda memcpy - copy cpu variables to gpu
				*************/
				cudaMemcpy(gpu_curr, current, board_size, cudaMemcpyHostToDevice);
				cudaMemcpy(gpu_next, next, board_size, cudaMemcpyHostToDevice);

				//Utilize Step On GPU
				begin = clock();
				step<<<1, threads>>>(gpu_curr, gpu_next, width, height);
				//cudaThreadSynchronize();
				end = clock();
				time_spent += (double)(end - begin) / CLOCKS_PER_SEC;
				cudaThreadSynchronize();
				//Copy GPU values back to CPU
				cudaMemcpy(current, gpu_curr, board_size, cudaMemcpyDeviceToHost);
				cudaMemcpy(next, gpu_next, board_size, cudaMemcpyDeviceToHost);
				
				memcpy(current, next, board_size);
/*
        //evaluate the `current` board, writing the next generation into `next`.
        step(current, next, width, height);
        // Copy the next state, that step() just wrote into, to current state
        memcpy(current, next, board_size);

        // copy the `next` to CPU and into `current` to be ready to repeat the process

*/
        // We sleep only because textual output is slow and the console needs
        // time to catch up. We don't sleep in the graphical X11 version.
        if (out==1)
            nanosleep(&delay, &remaining);
    }
	 printf("Runtime: %f Seconds\n", time_spent); 

	 //Free Cuda Memory
	 cudaFree(gpu_curr);
	 cudaFree(gpu_next);

    return 0;
}

	.file	"tmpxft_00365ec0_00000000-6_life_seq_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10fill_boardPiii
	.type	_Z10fill_boardPiii, @function
_Z10fill_boardPiii:
.LFB2027:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$2, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%esi, %ebp
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cltd
	idivl	%r13d
	movl	%edx, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10fill_boardPiii, .-_Z10fill_boardPiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%c"
.LC1:
	.string	"\n"
.LC2:
	.string	"-----\n"
	.text
	.globl	_Z11print_boardPi
	.type	_Z11print_boardPi, @function
_Z11print_boardPi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
.L9:
	imulq	$240, %rbx, %rbp
	xorl	%r14d, %r14d
	addq	%r12, %rbp
.L11:
	cmpl	$1, 0(%rbp,%r14,4)
	movq	%r13, %rsi
	movl	$2, %edi
	sbbl	%edx, %edx
	xorl	%eax, %eax
	incq	%r14
	andl	$-3, %edx
	addl	$35, %edx
	movsbl	%dl, %edx
	call	__printf_chk@PLT
	cmpq	$60, %r14
	jne	.L11
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$40, %rbx
	jne	.L9
	popq	%rbx
	.cfi_def_cfa_offset 40
	leaq	.LC2(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11print_boardPi, .-_Z11print_boardPi
	.globl	_Z27__device_stub__Z4stepPiS_iiPiS_ii
	.type	_Z27__device_stub__Z4stepPiS_iiPiS_ii, @function
_Z27__device_stub__Z4stepPiS_iiPiS_ii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4stepPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z27__device_stub__Z4stepPiS_iiPiS_ii, .-_Z27__device_stub__Z4stepPiS_iiPiS_ii
	.globl	_Z4stepPiS_ii
	.type	_Z4stepPiS_ii, @function
_Z4stepPiS_ii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z4stepPiS_iiPiS_ii
	.cfi_endproc
.LFE2055:
	.size	_Z4stepPiS_ii, .-_Z4stepPiS_ii
	.section	.rodata.str1.1
.LC4:
	.string	"usage: life iterations 1=print\n"
.LC5:
	.string	"Running %d iterarions at %d by %d pixels.\n"
.LC7:
	.string	"Runtime: %f Seconds\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	jg	.L22
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L22:
	movl	%edi, %ebx
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movl	%eax, %r13d
	cmpl	$5, %ebx
	jne	.L30
	movq	24(%rbp), %rdi
	call	atoi@PLT
	movq	32(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%ebx, %ecx
	movl	%r12d, %edx
	movl	$2, %edi
	movl	%eax, %ebp
	movl	%eax, %r8d
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L23
.L30:
	movl	$40, %ebp
	movl	$60, %ebx
.L23:
	xorl	%eax, %eax
	movslq	%ebp, %rdx
	xorl	%r14d, %r14d
	movq	$125000000, 80(%rsp)
	movq	%rax, 72(%rsp)
	movslq	%ebx, %rax
	imulq	%rdx, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movl	%ebp, %edx
	movl	%ebx, %esi
	movq	%rax, 24(%rsp)
	call	_Z10fill_boardPiii
	movq	(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	$0x000000000, 16(%rsp)
.L24:
	cmpl	%r12d, %r14d
	jge	.L32
	incl	%r14d
	cmpl	$1, %r13d
	jne	.L25
	movq	8(%rsp), %rdi
	call	_Z11print_boardPi
.L25:
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rax, %r15
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%ebx, %edx
	call	_Z27__device_stub__Z4stepPiS_iiPiS_ii
.L26:
	call	clock@PLT
	subq	%r15, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC6(%rip), %xmm0
	addsd	16(%rsp), %xmm0
	movsd	%xmm0, 16(%rsp)
	call	cudaThreadSynchronize@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rcx
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movq	%rcx, %rdx
	call	__memcpy_chk@PLT
	cmpl	$1, %r13d
	jne	.L24
	leaq	88(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	nanosleep@PLT
	jmp	.L24
.L32:
	movsd	16(%rsp), %xmm0
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z4stepPiS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4stepPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/********************************************************
* life_seq_cuda.cu
* Modifed BY Thomas Kinch
* Date: 5/14/18
*******************************************************/

/* Compile with `gcc life.c`.
 * When CUDA-fied, compile with `nvcc life.cu`
 */

#include <hip/hip_runtime.h>
#include <stdlib.h> // for rand
#include <string.h> // for memcpy
#include <stdio.h> // for printf
#include <time.h> // for nanosleep

#define WIDTH 60
#define HEIGHT 40
#define threads 256

void fill_board(int *board, int width, int height) {
    int i;
    for (i=0; i<width*height; i++)
        board[i] = rand() % 2;
}

void print_board(int *board) {
    int x, y;
    for (y=0; y<HEIGHT; y++) {
        for (x=0; x<WIDTH; x++) {
            char c = board[y * WIDTH + x] ? '#':' ';
            printf("%c", c);
        }
        printf("\n");
    }
    printf("-----\n");
}


__global__ void step(int *current, int *next, int width, int height) {
	 
	 //Offset
	 const int offsets[8][2] = {{-1, 1},{0, 1},{1, 1},
										 {-1, 0},       {1, 0},
										 {-1,-1},{0,-1},{1,-1}};


	 // coordinates of the cell we're currently evaluating
	 int x = blockIdx.x * width + threadIdx.x;
	 int y = blockIdx.y * height + threadIdx.y;
      
    // offset index, neighbor coordinates, alive neighbor count
    int i, nx, ny, num_neighbors;

    // write the next board state
    for (y=0; y<height; y++) {
        for (x=0; x<width; x++) {

            // count this cell's alive neighbors
            num_neighbors = 0;
            for (i=0; i<8; i++) {
                // To make the board torroidal, we use modular arithmetic to
                // wrap neighbor coordinates around to the other side of the
                // board if they fall off.
                nx = (x + offsets[i][0] + width) % width;
                ny = (y + offsets[i][1] + height) % height;
                if (current[ny * width + nx]) {
                    num_neighbors++;
                }
            }

            // apply the Game of Life rules to this cell
            next[y * width + x] = 0;
            if ((current[y * width + x] && num_neighbors==2) ||
                    num_neighbors==3) {
                next[y * width + x] = 1;
            }
        }
    }
}

int main(int argc, const char *argv[]) {
    // parse the width and height command line arguments, if provided
    int width, height, iters, out;
    if (argc < 3) {
        printf("usage: life iterations 1=print\n"); 
        exit(1);
    }
    iters = atoi(argv[1]);
    out = atoi(argv[2]);
    if (argc == 5) {
        width = atoi(argv[3]);
        height = atoi(argv[4]);
        printf("Running %d iterarions at %d by %d pixels.\n", iters, width, height);
    } else {
        width = WIDTH;
        height = HEIGHT;
    }

    struct timespec delay = {0, 125000000}; // 0.125 seconds
    struct timespec remaining;
    // The two boards 
    int *current, *next, many=0;
	 int *gpu_curr, *gpu_next;

    size_t board_size = sizeof(int) * width * height;
    current = (int *) malloc(board_size); // same as: int current[width * height];
    next = (int *) malloc(board_size);    // same as: int next[width *height];
 

    // Initialize the global "current".
    fill_board(current, width, height);
	 
	 /**************
	 * Cuda Malloc
	 **************/
	 hipMalloc((void**)&gpu_curr, board_size);
	 hipMalloc((void**)&gpu_next, board_size);

	 //Begin Iterations
	 clock_t begin, end;
	 double time_spent = 0;
    while (many<iters) {
        many++;
        if (out==1)
			   //Print Current Board
            print_board(current);
 
				/************
				* Cuda memcpy - copy cpu variables to gpu
				*************/
				hipMemcpy(gpu_curr, current, board_size, hipMemcpyHostToDevice);
				hipMemcpy(gpu_next, next, board_size, hipMemcpyHostToDevice);

				//Utilize Step On GPU
				begin = clock();
				step<<<1, threads>>>(gpu_curr, gpu_next, width, height);
				//cudaThreadSynchronize();
				end = clock();
				time_spent += (double)(end - begin) / CLOCKS_PER_SEC;
				hipDeviceSynchronize();
				//Copy GPU values back to CPU
				hipMemcpy(current, gpu_curr, board_size, hipMemcpyDeviceToHost);
				hipMemcpy(next, gpu_next, board_size, hipMemcpyDeviceToHost);
				
				memcpy(current, next, board_size);
/*
        //evaluate the `current` board, writing the next generation into `next`.
        step(current, next, width, height);
        // Copy the next state, that step() just wrote into, to current state
        memcpy(current, next, board_size);

        // copy the `next` to CPU and into `current` to be ready to repeat the process

*/
        // We sleep only because textual output is slow and the console needs
        // time to catch up. We don't sleep in the graphical X11 version.
        if (out==1)
            nanosleep(&delay, &remaining);
    }
	 printf("Runtime: %f Seconds\n", time_spent); 

	 //Free Cuda Memory
	 hipFree(gpu_curr);
	 hipFree(gpu_next);

    return 0;
}

	.text
	.file	"life_seq_cuda.hip"
	.globl	_Z10fill_boardPiii              # -- Begin function _Z10fill_boardPiii
	.type	_Z10fill_boardPiii,@function
_Z10fill_boardPiii:                     # @_Z10fill_boardPiii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z10fill_boardPiii, .Lfunc_end0-_Z10fill_boardPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11print_boardPi               # -- Begin function _Z11print_boardPi
	.type	_Z11print_boardPi,@function
_Z11print_boardPi:                      # @_Z11print_boardPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%eax, %eax
	cmpl	$0, (%rbx,%r15,4)
	setne	%al
	leal	(%rax,%rax,2), %edi
	addl	$32, %edi
	callq	putchar@PLT
	incq	%r15
	cmpq	$60, %r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$240, %rbx
	cmpq	$40, %r14
	jne	.LBB1_1
# %bb.4:
	movl	$.Lstr, %edi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end1:
	.size	_Z11print_boardPi, .Lfunc_end1-_Z11print_boardPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__stepPiS_ii   # -- Begin function _Z19__device_stub__stepPiS_ii
	.type	_Z19__device_stub__stepPiS_ii,@function
_Z19__device_stub__stepPiS_ii:          # @_Z19__device_stub__stepPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4stepPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z19__device_stub__stepPiS_ii, .Lfunc_end2-_Z19__device_stub__stepPiS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jle	.LBB3_17
# %bb.1:
	movq	%rsi, %r14
	movl	%edi, %r15d
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	cmpl	$5, %r15d
	jne	.LBB3_2
# %bb.3:
	movq	24(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	32(%r14), %rdi
	callq	atoi
	movl	%eax, %r15d
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	movl	%ebp, %edx
	movl	%eax, %ecx
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_4
.LBB3_2:
	movl	$60, %ebp
	movl	$40, %r15d
.LBB3_4:
	movq	$0, 56(%rsp)
	movq	$125000000, 64(%rsp)            # imm = 0x7735940
	movslq	%ebp, %rax
	movslq	%r15d, %r12
	imulq	%rax, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%ebp, 28(%rsp)                  # 4-byte Spill
	movl	%r15d, 24(%rsp)                 # 4-byte Spill
	imull	%r15d, %ebp
	testl	%ebp, %ebp
	jle	.LBB3_7
# %bb.5:                                # %.lr.ph.preheader.i
	movl	%ebp, %r15d
	xorl	%ebp, %ebp
.LBB3_6:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r13,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r15
	jne	.LBB3_6
.LBB3_7:                                # %_Z10fill_boardPiii.exit
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	xorpd	%xmm0, %xmm0
	testl	%ebx, %ebx
	jle	.LBB3_16
# %bb.8:                                # %.lr.ph
	movabsq	$4294967297, %rax               # imm = 0x100000001
	addq	$255, %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
.LBB3_9:                                # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	cmpl	$1, 4(%rsp)                     # 4-byte Folded Reload
	jne	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_9 Depth=1
	movq	%r13, %rdi
	callq	_Z11print_boardPi
.LBB3_11:                               #   in Loop: Header=BB3_9 Depth=1
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r15
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_13
# %bb.12:                               #   in Loop: Header=BB3_9 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	28(%rsp), %edx                  # 4-byte Reload
	movl	24(%rsp), %ecx                  # 4-byte Reload
	callq	_Z19__device_stub__stepPiS_ii
.LBB3_13:                               #   in Loop: Header=BB3_9 Depth=1
	callq	clock
	movq	%rax, %rbp
	subq	%r15, %rbp
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	%r13, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	callq	memcpy@PLT
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rbp, %xmm1
	divsd	.LCPI3_0(%rip), %xmm1
	cmpl	$1, 4(%rsp)                     # 4-byte Folded Reload
	jne	.LBB3_15
# %bb.14:                               #   in Loop: Header=BB3_9 Depth=1
	leaq	56(%rsp), %rdi
	leaq	72(%rsp), %rsi
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	callq	nanosleep
	movsd	32(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
.LBB3_15:                               #   in Loop: Header=BB3_9 Depth=1
	movsd	48(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
	decl	%ebx
	jne	.LBB3_9
.LBB3_16:                               # %._crit_edge
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_17:
	.cfi_def_cfa_offset 144
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4stepPiS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4stepPiS_ii,@object           # @_Z4stepPiS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z4stepPiS_ii
	.p2align	3, 0x0
_Z4stepPiS_ii:
	.quad	_Z19__device_stub__stepPiS_ii
	.size	_Z4stepPiS_ii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Running %d iterarions at %d by %d pixels.\n"
	.size	.L.str.4, 43

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Runtime: %f Seconds\n"
	.size	.L.str.5, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4stepPiS_ii"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"-----"
	.size	.Lstr, 6

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"usage: life iterations 1=print"
	.size	.Lstr.1, 31

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__stepPiS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4stepPiS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4stepPiS_ii           ; -- Begin function _Z4stepPiS_ii
	.globl	_Z4stepPiS_ii
	.p2align	8
	.type	_Z4stepPiS_ii,@function
_Z4stepPiS_ii:                          ; @_Z4stepPiS_ii
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x4
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v4, 0x3ff, v0
	s_load_b64 s[10:11], s[2:3], 0x10
	v_bfe_u32 v10, v0, 10, 10
	v_dual_mov_b32 v1, -1 :: v_dual_mov_b32 v2, 1
	v_bfe_u32 v0, v0, 20, 10
	v_mov_b32_e32 v8, v3
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v12, v1 :: v_dual_mov_b32 v13, v3
	v_mov_b32_e32 v5, v2
	v_mov_b32_e32 v6, v2
	v_dual_mov_b32 v9, v2 :: v_dual_mov_b32 v16, v1
	v_mov_b32_e32 v7, v1
	v_mov_b32_e32 v15, v2
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s0, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_mul_i32 s0, s0, s1
	s_cmp_lt_i32 s11, 1
	v_mul_lo_u32 v11, s0, v4
	v_mov_b32_e32 v4, v2
	v_mad_u32_u24 v14, v10, s1, v11
	v_dual_mov_b32 v10, v3 :: v_dual_mov_b32 v11, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_lshl_u32 v0, v14, v0, 6
	v_mov_b32_e32 v14, v1
	ds_store_b128 v0, v[1:4]
	ds_store_b128 v0, v[5:8] offset:16
	ds_store_b128 v0, v[9:12] offset:32
	ds_store_b128 v0, v[13:16] offset:48
	s_cbranch_scc1 .LBB0_8
; %bb.1:                                ; %.preheader46.lr.ph
	s_cmp_gt_i32 s10, 0
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s1, s10, 31
	s_ashr_i32 s4, s11, 31
	s_add_i32 s5, s10, s1
	s_add_i32 s6, s11, s4
	s_xor_b32 s12, s5, s1
	s_xor_b32 s13, s6, s4
	v_cvt_f32_u32_e32 v1, s12
	v_cvt_f32_u32_e32 v2, s13
	s_sub_i32 s1, 0, s12
	s_sub_i32 s4, 0, s13
	v_cndmask_b32_e64 v6, 0, 1, s0
	v_rcp_iflag_f32_e32 v1, v1
	v_rcp_iflag_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v6
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v2, v2
	v_mul_lo_u32 v4, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, s4, v2
	s_load_b128 s[4:7], s[2:3], 0x0
	s_mov_b32 s3, 0
	v_mul_hi_u32 v4, v1, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v2, v5
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v5
.LBB0_2:                                ; %.preheader46
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s14, s3, s11
	s_mul_i32 s15, s3, s10
	s_mov_b32 s16, 0
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	v_mov_b32_e32 v4, 0
	s_add_i32 s2, s16, s10
	s_mov_b32 s8, 0
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v5, s8, v0
	s_add_i32 s8, s8, 8
	s_cmp_lg_u32 s8, 64
	ds_load_b64 v[5:6], v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, s14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v8, 31, v6
	v_add_nc_u32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v6, v6, v8
	v_mul_hi_u32 v10, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v10, v10, s13
	v_sub_nc_u32_e32 v6, v6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v10, s13, v6
	v_cmp_le_u32_e32 vcc_lo, s13, v6
	v_cndmask_b32_e32 v6, v6, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v10, s13, v6
	v_cmp_le_u32_e32 vcc_lo, s13, v6
	v_dual_cndmask_b32 v6, v6, v10 :: v_dual_add_nc_u32 v5, s2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v5
	v_xor_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v5, v7
	v_sub_nc_u32_e32 v8, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v7
	v_mul_hi_u32 v9, v5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v9, s12
	v_sub_nc_u32_e32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v9, s12, v5
	v_cmp_le_u32_e64 s1, s12, v5
	v_cndmask_b32_e64 v5, v5, v9, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v9, s12, v5
	v_cmp_le_u32_e64 s1, s12, v5
	v_cndmask_b32_e64 v5, v5, v9, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v7
	v_sub_nc_u32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v8, s10, v[5:6]
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[6:7]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_cbranch_scc1 .LBB0_5
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s8, s16, s15
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 2, v4
	s_lshl_b64 s[18:19], s[8:9], 2
	v_cmp_eq_u32_e64 s2, 3, v4
	s_add_u32 s20, s6, s18
	s_addc_u32 s21, s7, s19
	s_add_u32 s18, s4, s18
	s_addc_u32 s19, s5, s19
	global_store_b32 v3, v3, s[20:21]
	global_load_b32 v5, v3, s[18:19]
	s_add_i32 s16, s16, 1
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e64 s1, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, vcc_lo
	s_or_b32 s1, s1, s2
	s_cmp_lg_u32 s16, s10
	v_cndmask_b32_e64 v4, 0, 1, s1
	global_store_b32 v3, v4, s[20:21]
	s_cbranch_scc1 .LBB0_4
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, s11
	s_cbranch_scc1 .LBB0_2
.LBB0_8:                                ; %._crit_edge51
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4stepPiS_ii
		.amdhsa_group_segment_fixed_size 65536
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 1
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4stepPiS_ii, .Lfunc_end0-_Z4stepPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 828
; NumSgprs: 24
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 65536 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 65536
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4stepPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z4stepPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
