/**
 * classifier_blk.cu
 * 
 * A CUDA kernel for accelerating a fully-connected neural network layer.
 *
 * This kernel treats the inputs, weights, and outputs of the layer as
 * block matrices in order to facilitate better data reuse.
 */

#include <iostream>
#include <string>

using namespace std;

#ifndef Ni
  #define Ni 4096  
#endif
#ifndef Nn
  #define Nn 1024  
#endif
#ifndef Nb
  #define Nb 1
#endif

#define DEBUG (false)

/* The weights of the layer*/
__device__ float d_weights[Nn][Ni];
__device__ float d_inputs[Ni][Nb];
__device__ float d_outputs[Nn][Nb];

#define BLK_SZ (16)

/* Performs a matrix multiply. Assumes kernel block size is (BLK_SZ, BLK_SZ, 1)*/
__device__ void matmul_blk(float a[BLK_SZ][BLK_SZ], float b[BLK_SZ][BLK_SZ], float c[BLK_SZ][BLK_SZ])
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

	for(int i = 0; i < BLK_SZ; i++)
	{
		c[row][col] += a[row][i] * b[i][col];
	}
}

/* Performs C = A + B. Assumes kernel block size is (BLK_SZ, BLK_SZ, 1)*/
__device__ void matadd_blk(float a[BLK_SZ][BLK_SZ], float b[BLK_SZ][BLK_SZ], float c[BLK_SZ][BLK_SZ])
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    c[row][col] = a[row][col] + b[row][col];
}

/* Atomically adds the matrix mat into dst. dst should be a pointer to a block matrix whose elements are square matrices of size BLK_SZ*/
__device__ void matadd_blk_global(float *dst, int2 dstDim, float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    atomicAdd(&dst[dstDim.y*(BLK_SZ*blkX + row) + (BLK_SZ*blkY + col)], mat[row][col]);
}

/* Reads the matrix mat from src. src should be a pointer to a block matrix whose elements are square matrices of size BLK_SZ*/
__device__ void matread_blk(float *src, int2 srcDim, float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    mat[row][col] = src[srcDim.y*(BLK_SZ*blkX + row) + (BLK_SZ*blkY + col)];
}

/* Writes the matrix mat into dst. dst should be a pointer to a block matrix whose elements are square matrices of size BLK_SZ*/
__device__ void matwrite_blk(float *dst, int2 srcDim, float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    dst[srcDim.y*(BLK_SZ*blkX + row) + (BLK_SZ*blkY + col)] = mat[row][col];
}

/* Sets all elements of mat to 0 */
__device__ void blk_zero(float mat[BLK_SZ][BLK_SZ])
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    mat[row][col] = 0;
}

__device__ void printBlock(float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
	if(blockIdx.x == blkX && blockIdx.y == blkY)
	{
		printf("mat[%d][%d] = %f\n", threadIdx.x, threadIdx.y, mat[threadIdx.x][threadIdx.y]);
	}
}

__global__ void classify()
{
    const int2 weightDim = make_int2(Nn, Ni);
    const int2 inDim = make_int2(Ni, Nb);
    const int2 outDim = make_int2(Nn, Nb);

    const int blkX = blockIdx.x;
    const int blkY = blockIdx.y;

    __shared__ float weightBlk[BLK_SZ][BLK_SZ];
    __shared__ float inBlk[BLK_SZ][BLK_SZ];
    __shared__ float outBlk[BLK_SZ][BLK_SZ];

    matread_blk((float*)d_inputs, inDim, inBlk, blkX, blkY);

    for(int i = 0; i < (weightDim.x / BLK_SZ); i++)
    {
        matread_blk((float*)d_weights, weightDim, weightBlk, i, blkX);
        blk_zero(outBlk);

        __threadfence();

        matmul_blk(weightBlk, inBlk, outBlk);

        matadd_blk_global((float*)d_outputs, outDim, outBlk, i, blkY);

    }
}

void randomizeArray(float *data, int len)
{
	for(int i = 0; i < len; i++)
	{
		data[i] = static_cast <float> (rand()) / static_cast <float> (RAND_MAX) * 16.0f - 8.0f;
	}
}

int main(int argc, char **argv) 
{
     const int2 in_dim = make_int2(Ni, Nb);    					// The dimensions of the input matrix
     const int in_size = sizeof(float) * in_dim.x * in_dim.y;   // Total size of input buffer in bytes

     const int2 out_dim = make_int2(Nn, Nb);               // The dimensions of the output matrix
     const int out_size = sizeof(float) * out_dim.x * out_dim.y; // Total size of output buffer in bytes

     const dim3 grid_size(in_dim.x/16,in_dim.y/16,1);
     const dim3 block_size(16,16,1);

     float *h_in_data = new float[in_dim.x * in_dim.y]; // Input data on host
     float *h_out_data = new float[out_dim.x * out_dim.y];    // Output on device
     float *h_random_weights = new float[Ni*Nn];

     // Make some random data.

     randomizeArray(h_random_weights, Ni*Nn);
     randomizeArray(h_in_data, in_dim.x * in_dim.y);

     cudaMemcpyToSymbol(d_weights, h_random_weights, Nn*Ni*sizeof(float));

     cudaMemcpyToSymbol(d_inputs, h_in_data, in_size); // Give the GPU our input data.

     classify<<<grid_size, block_size>>>();
     cudaDeviceSynchronize();

     cudaMemcpyFromSymbol(h_out_data, d_outputs, out_size); // Retrieve the neuron outputs.


     if(DEBUG)
     {
		 for(int i = 0; i < Nn; i++)
		 {
			 for(int j = 0; j < Ni; j++)
			 {
				 printf("%f ", h_random_weights[i*Ni + j]);
			 }
			 printf("\n");
		 }
		 printf("\n");

		 for(int i = 0; i < in_dim.x; i++)
		 {
			 for(int j = 0; j < in_dim.y; j++)
			 {
				 printf("%f ", h_in_data[i*in_dim.y + j]);
			 }
			 printf("\n");
		 }
		 printf("\n");

		 for(int i = 0; i < out_dim.x; i++)
		 {
			 for(int j = 0; j < out_dim.y; j++)
			 {
				 printf("%f ", h_out_data[i*out_dim.y + j]);
			 }
			 printf("\n");
		 }
     }

    return 0;
}


	.file	"tmpxft_00212a09_00000000-6_classifier_blk.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3646:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3646:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10matmul_blkPA16_fS0_S0_
	.type	_Z10matmul_blkPA16_fS0_S0_, @function
_Z10matmul_blkPA16_fS0_S0_:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z10matmul_blkPA16_fS0_S0_, .-_Z10matmul_blkPA16_fS0_S0_
	.globl	_Z10matadd_blkPA16_fS0_S0_
	.type	_Z10matadd_blkPA16_fS0_S0_, @function
_Z10matadd_blkPA16_fS0_S0_:
.LFB4294:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4294:
	.size	_Z10matadd_blkPA16_fS0_S0_, .-_Z10matadd_blkPA16_fS0_S0_
	.globl	_Z17matadd_blk_globalPf4int2PA16_fii
	.type	_Z17matadd_blk_globalPf4int2PA16_fii, @function
_Z17matadd_blk_globalPf4int2PA16_fii:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z17matadd_blk_globalPf4int2PA16_fii, .-_Z17matadd_blk_globalPf4int2PA16_fii
	.globl	_Z11matread_blkPf4int2PA16_fii
	.type	_Z11matread_blkPf4int2PA16_fii, @function
_Z11matread_blkPf4int2PA16_fii:
.LFB4296:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4296:
	.size	_Z11matread_blkPf4int2PA16_fii, .-_Z11matread_blkPf4int2PA16_fii
	.globl	_Z12matwrite_blkPf4int2PA16_fii
	.type	_Z12matwrite_blkPf4int2PA16_fii, @function
_Z12matwrite_blkPf4int2PA16_fii:
.LFB4298:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4298:
	.size	_Z12matwrite_blkPf4int2PA16_fii, .-_Z12matwrite_blkPf4int2PA16_fii
	.globl	_Z8blk_zeroPA16_f
	.type	_Z8blk_zeroPA16_f, @function
_Z8blk_zeroPA16_f:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3640:
	.size	_Z8blk_zeroPA16_f, .-_Z8blk_zeroPA16_f
	.globl	_Z10printBlockPA16_fii
	.type	_Z10printBlockPA16_fii, @function
_Z10printBlockPA16_fii:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3641:
	.size	_Z10printBlockPA16_fii, .-_Z10printBlockPA16_fii
	.globl	_Z14randomizeArrayPfi
	.type	_Z14randomizeArrayPfi, @function
_Z14randomizeArrayPfi:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L17:
	cmpl	%ebx, %ebp
	jle	.L21
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	subss	.LC2(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L17
.L21:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	_Z14randomizeArrayPfi, .-_Z14randomizeArrayPfi
	.globl	_Z26__device_stub__Z8classifyvv
	.type	_Z26__device_stub__Z8classifyvv, @function
_Z26__device_stub__Z8classifyvv:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z8classifyv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L22:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z26__device_stub__Z8classifyvv, .-_Z26__device_stub__Z8classifyvv
	.globl	_Z8classifyv
	.type	_Z8classifyv, @function
_Z8classifyv:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z8classifyvv
	.cfi_endproc
.LFE3669:
	.size	_Z8classifyv, .-_Z8classifyv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3643:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$16384, %edi
	movabsq	$68719476752, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	$256, 8(%rsp)
	movl	$1, 16(%rsp)
	movq	%rax, 20(%rsp)
	movl	$1, 28(%rsp)
	call	_Znam@PLT
	movl	$4096, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$16777216, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$4194304, %esi
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	_Z14randomizeArrayPfi
	movl	$4096, %esi
	movq	%rbx, %rdi
	call	_Z14randomizeArrayPfi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%rbp, %rsi
	movl	$16777216, %edx
	leaq	_ZL9d_weights(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%rbx, %rsi
	movl	$16384, %edx
	leaq	_ZL8d_inputs(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	28(%rsp), %ecx
	movl	16(%rsp), %esi
	xorl	%r9d, %r9d
	movq	20(%rsp), %rdx
	movq	8(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	call	_Z26__device_stub__Z8classifyvv
.L28:
	call	cudaDeviceSynchronize@PLT
	movq	%r12, %rdi
	movl	$2, %r8d
	xorl	%ecx, %ecx
	movl	$4096, %edx
	leaq	_ZL9d_outputs(%rip), %rsi
	call	cudaMemcpyFromSymbol@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3643:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"_Z8classifyv"
.LC4:
	.string	"d_weights"
.LC5:
	.string	"d_inputs"
.LC6:
	.string	"d_outputs"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8classifyv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movl	$16777216, %r9d
	leaq	_ZL9d_weights(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$16384, %r9d
	leaq	_ZL8d_inputs(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$4096, %r9d
	movq	%rdx, %rcx
	leaq	_ZL9d_outputs(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL9d_outputs
	.comm	_ZL9d_outputs,4096,32
	.local	_ZL8d_inputs
	.comm	_ZL8d_inputs,16384,32
	.local	_ZL9d_weights
	.comm	_ZL9d_weights,16777216,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC1:
	.long	1098907648
	.align 4
.LC2:
	.long	1090519040
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * classifier_blk.cu
 * 
 * A CUDA kernel for accelerating a fully-connected neural network layer.
 *
 * This kernel treats the inputs, weights, and outputs of the layer as
 * block matrices in order to facilitate better data reuse.
 */


#include <hip/hip_runtime.h>
#include <iostream>
#include <string>

using namespace std;

#ifndef Ni
  #define Ni 4096  
#endif
#ifndef Nn
  #define Nn 1024  
#endif
#ifndef Nb
  #define Nb 1
#endif

#define DEBUG (false)

/* The weights of the layer*/
__device__ float d_weights[Nn][Ni];
__device__ float d_inputs[Ni][Nb];
__device__ float d_outputs[Nn][Nb];

#define BLK_SZ (16)

/* Performs a matrix multiply. Assumes kernel block size is (BLK_SZ, BLK_SZ, 1)*/
__device__ void matmul_blk(float a[BLK_SZ][BLK_SZ], float b[BLK_SZ][BLK_SZ], float c[BLK_SZ][BLK_SZ])
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

	for(int i = 0; i < BLK_SZ; i++)
	{
		c[row][col] += a[row][i] * b[i][col];
	}
}

/* Performs C = A + B. Assumes kernel block size is (BLK_SZ, BLK_SZ, 1)*/
__device__ void matadd_blk(float a[BLK_SZ][BLK_SZ], float b[BLK_SZ][BLK_SZ], float c[BLK_SZ][BLK_SZ])
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    c[row][col] = a[row][col] + b[row][col];
}

/* Atomically adds the matrix mat into dst. dst should be a pointer to a block matrix whose elements are square matrices of size BLK_SZ*/
__device__ void matadd_blk_global(float *dst, int2 dstDim, float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    atomicAdd(&dst[dstDim.y*(BLK_SZ*blkX + row) + (BLK_SZ*blkY + col)], mat[row][col]);
}

/* Reads the matrix mat from src. src should be a pointer to a block matrix whose elements are square matrices of size BLK_SZ*/
__device__ void matread_blk(float *src, int2 srcDim, float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    mat[row][col] = src[srcDim.y*(BLK_SZ*blkX + row) + (BLK_SZ*blkY + col)];
}

/* Writes the matrix mat into dst. dst should be a pointer to a block matrix whose elements are square matrices of size BLK_SZ*/
__device__ void matwrite_blk(float *dst, int2 srcDim, float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    dst[srcDim.y*(BLK_SZ*blkX + row) + (BLK_SZ*blkY + col)] = mat[row][col];
}

/* Sets all elements of mat to 0 */
__device__ void blk_zero(float mat[BLK_SZ][BLK_SZ])
{
    const int row = threadIdx.x;
    const int col = threadIdx.y;

    mat[row][col] = 0;
}

__device__ void printBlock(float mat[BLK_SZ][BLK_SZ], int blkX, int blkY)
{
	if(blockIdx.x == blkX && blockIdx.y == blkY)
	{
		printf("mat[%d][%d] = %f\n", threadIdx.x, threadIdx.y, mat[threadIdx.x][threadIdx.y]);
	}
}

__global__ void classify()
{
    const int2 weightDim = make_int2(Nn, Ni);
    const int2 inDim = make_int2(Ni, Nb);
    const int2 outDim = make_int2(Nn, Nb);

    const int blkX = blockIdx.x;
    const int blkY = blockIdx.y;

    __shared__ float weightBlk[BLK_SZ][BLK_SZ];
    __shared__ float inBlk[BLK_SZ][BLK_SZ];
    __shared__ float outBlk[BLK_SZ][BLK_SZ];

    matread_blk((float*)d_inputs, inDim, inBlk, blkX, blkY);

    for(int i = 0; i < (weightDim.x / BLK_SZ); i++)
    {
        matread_blk((float*)d_weights, weightDim, weightBlk, i, blkX);
        blk_zero(outBlk);

        __threadfence();

        matmul_blk(weightBlk, inBlk, outBlk);

        matadd_blk_global((float*)d_outputs, outDim, outBlk, i, blkY);

    }
}

void randomizeArray(float *data, int len)
{
	for(int i = 0; i < len; i++)
	{
		data[i] = static_cast <float> (rand()) / static_cast <float> (RAND_MAX) * 16.0f - 8.0f;
	}
}

int main(int argc, char **argv) 
{
     const int2 in_dim = make_int2(Ni, Nb);    					// The dimensions of the input matrix
     const int in_size = sizeof(float) * in_dim.x * in_dim.y;   // Total size of input buffer in bytes

     const int2 out_dim = make_int2(Nn, Nb);               // The dimensions of the output matrix
     const int out_size = sizeof(float) * out_dim.x * out_dim.y; // Total size of output buffer in bytes

     const dim3 grid_size(in_dim.x/16,in_dim.y/16,1);
     const dim3 block_size(16,16,1);

     float *h_in_data = new float[in_dim.x * in_dim.y]; // Input data on host
     float *h_out_data = new float[out_dim.x * out_dim.y];    // Output on device
     float *h_random_weights = new float[Ni*Nn];

     // Make some random data.

     randomizeArray(h_random_weights, Ni*Nn);
     randomizeArray(h_in_data, in_dim.x * in_dim.y);

     hipMemcpyToSymbol(HIP_SYMBOL(d_weights), h_random_weights, Nn*Ni*sizeof(float));

     hipMemcpyToSymbol(HIP_SYMBOL(d_inputs), h_in_data, in_size); // Give the GPU our input data.

     classify<<<grid_size, block_size>>>();
     hipDeviceSynchronize();

     hipMemcpyFromSymbol(h_out_data, HIP_SYMBOL(d_outputs), out_size); // Retrieve the neuron outputs.


     if(DEBUG)
     {
		 for(int i = 0; i < Nn; i++)
		 {
			 for(int j = 0; j < Ni; j++)
			 {
				 printf("%f ", h_random_weights[i*Ni + j]);
			 }
			 printf("\n");
		 }
		 printf("\n");

		 for(int i = 0; i < in_dim.x; i++)
		 {
			 for(int j = 0; j < in_dim.y; j++)
			 {
				 printf("%f ", h_in_data[i*in_dim.y + j]);
			 }
			 printf("\n");
		 }
		 printf("\n");

		 for(int i = 0; i < out_dim.x; i++)
		 {
			 for(int j = 0; j < out_dim.y; j++)
			 {
				 printf("%f ", h_out_data[i*out_dim.y + j]);
			 }
			 printf("\n");
		 }
     }

    return 0;
}


	.text
	.file	"classifier_blk.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__classifyv    # -- Begin function _Z23__device_stub__classifyv
	.type	_Z23__device_stub__classifyv,@function
_Z23__device_stub__classifyv:           # @_Z23__device_stub__classifyv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z8classifyv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__classifyv, .Lfunc_end0-_Z23__device_stub__classifyv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z14randomizeArrayPfi
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI1_1:
	.long	0x41800000                      # float 16
.LCPI1_2:
	.long	0xc1000000                      # float -8
	.text
	.globl	_Z14randomizeArrayPfi
	.type	_Z14randomizeArrayPfi,@function
_Z14randomizeArrayPfi:                  # @_Z14randomizeArrayPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	mulss	.LCPI1_1(%rip), %xmm0
	addss	.LCPI1_2(%rip), %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z14randomizeArrayPfi, .Lfunc_end1-_Z14randomizeArrayPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI2_1:
	.long	0x41800000                      # float 16
.LCPI2_2:
	.long	0xc1000000                      # float -8
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$16384, %edi                    # imm = 0x4000
	callq	_Znam
	movq	%rax, %r14
	movl	$4096, %edi                     # imm = 0x1000
	callq	_Znam
	movq	%rax, %rbx
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB2_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	$4194304, %r12                  # imm = 0x400000
	jne	.LBB2_1
# %bb.2:                                # %.lr.ph.i26.preheader
	xorl	%r12d, %r12d
.LBB2_3:                                # %.lr.ph.i26
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	mulss	.LCPI2_1(%rip), %xmm0
	addss	.LCPI2_2(%rip), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$4096, %r12                     # imm = 0x1000
	jne	.LBB2_3
# %bb.4:                                # %_Z14randomizeArrayPfi.exit30
	movl	$d_weights, %edi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movl	$d_inputs, %edi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r14, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$256, %edi                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	callq	_Z23__device_stub__classifyv
.LBB2_6:
	callq	hipDeviceSynchronize
	movl	$d_outputs, %esi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8classifyv, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$d_weights, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$16777216, %r9d                 # imm = 0x1000000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_inputs, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$16384, %r9d                    # imm = 0x4000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$d_outputs, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$4096, %r9d                     # imm = 0x1000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$0
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_weights,@object               # @d_weights
	.local	d_weights
	.comm	d_weights,16777216,16
	.type	d_inputs,@object                # @d_inputs
	.local	d_inputs
	.comm	d_inputs,16384,16
	.type	d_outputs,@object               # @d_outputs
	.local	d_outputs
	.comm	d_outputs,4096,16
	.type	_Z8classifyv,@object            # @_Z8classifyv
	.section	.rodata,"a",@progbits
	.globl	_Z8classifyv
	.p2align	3, 0x0
_Z8classifyv:
	.quad	_Z23__device_stub__classifyv
	.size	_Z8classifyv, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z8classifyv"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"d_weights"
	.size	.L__unnamed_2, 10

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"d_inputs"
	.size	.L__unnamed_3, 9

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"d_outputs"
	.size	.L__unnamed_4, 10

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__classifyv
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_weights
	.addrsig_sym d_inputs
	.addrsig_sym d_outputs
	.addrsig_sym _Z8classifyv
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8classifyv            ; -- Begin function _Z8classifyv
	.globl	_Z8classifyv
	.p2align	8
	.type	_Z8classifyv,@function
_Z8classifyv:                           ; @_Z8classifyv
; %bb.0:
	v_bfe_u32 v2, v0, 10, 10
	v_dual_mov_b32 v11, 0 :: v_dual_and_b32 v4, 0x3ff, v0
	s_lshl_b32 s2, s14, 4
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_inputs@rel32@lo+4
	s_addc_u32 s1, s1, d_inputs@rel32@hi+12
	v_lshl_add_u32 v5, s15, 4, v2
	v_lshlrev_b32_e32 v6, 2, v2
	v_add_nc_u32_e32 v8, s2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s2, v4, v5
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v0, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, 0
	global_load_b32 v0, v[0:1], off
	v_lshlrev_b32_e32 v1, 6, v4
	v_add_nc_u32_e32 v7, 0x800, v1
	v_add_nc_u32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v7, v6
	v_add_nc_u32_e32 v10, 0x400, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v0
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_2 Depth 2
                                        ;     Child Loop BB0_4 Depth 2
	v_lshl_add_u32 v0, s0, 4, v4
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_weights@rel32@lo+4
	s_addc_u32 s3, s3, d_weights@rel32@hi+12
	s_mov_b32 s1, 0
	v_lshl_add_u32 v1, v0, 12, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, v1, s2
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v1
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	ds_load_b32 v12, v10
	v_mov_b32_e32 v1, v6
.LBB0_2:                                ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v2, s1, v7
	s_add_i32 s1, s1, 4
	ds_load_b32 v3, v1
	ds_load_b32 v2, v2
	v_add_nc_u32_e32 v1, 64, v1
	s_cmp_lg_u32 s1, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v12, v2, v3
	s_cbranch_scc1 .LBB0_2
; %bb.3:                                ; %_Z10matmul_blkPA16_fS0_S0_.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v0, v0, v5
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_outputs@rel32@lo+4
	s_addc_u32 s3, s3, d_outputs@rel32@hi+12
	s_mov_b32 s1, 0
	ds_store_b32 v10, v12
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, v0, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v3, v[0:1], off
.LBB0_4:                                ; %atomicrmw.start
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v12
	global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_4
; %bb.5:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 64
	s_cbranch_scc0 .LBB0_1
; %bb.6:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8classifyv
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8classifyv, .Lfunc_end0-_Z8classifyv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_weights               ; @d_weights
	.type	d_weights,@object
	.section	.bss,"aw",@nobits
	.globl	d_weights
	.p2align	4, 0x0
d_weights:
	.zero	16777216
	.size	d_weights, 16777216

	.protected	d_inputs                ; @d_inputs
	.type	d_inputs,@object
	.globl	d_inputs
	.p2align	4, 0x0
d_inputs:
	.zero	16384
	.size	d_inputs, 16384

	.protected	d_outputs               ; @d_outputs
	.type	d_outputs,@object
	.globl	d_outputs
	.p2align	4, 0x0
d_outputs:
	.zero	4096
	.size	d_outputs, 4096

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_weights
	.addrsig_sym d_inputs
	.addrsig_sym d_outputs
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:           []
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8classifyv
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8classifyv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
