#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <climits>
#include <fstream>
#include <iostream>
#include <string>
#include <vector>
#include <chrono>

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true)
{
	if (code != cudaSuccess)
	{
		fprintf(stderr, "GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
		if (abort) exit(code);
	}
}

// Struct containing edge outputs computed in parallel
// One produced per thread, aggregated after GPU computation
struct EDGE_OUTPUT {
	// 3-node graphlet counts
	unsigned long long g31;
	unsigned long long g32;
	unsigned long long g33;

	// 4-node cliques and cycles
	unsigned long long g41;
	unsigned long long g44;

	// Unrestricted counts for 4-node connected graphlets
	unsigned long long T_T;
	unsigned long long Su_Sv;
	unsigned long long T_SuVSv;
	unsigned long long S_S;

	// Unrestricted counts for 4-node disconnected graphlets
	unsigned long long T_I;
	unsigned long long SuVSv_I;
	unsigned long long I_I;
	unsigned long long I_I_1;
};

struct GRAPHLET_COUNTS {
	// 3-node graphlet counts
	unsigned long long g31;
	unsigned long long g32;
	unsigned long long g33;
	unsigned long long g34;

	// 4-node connected graphlet counts
	unsigned long long g41;
	unsigned long long g42;
	unsigned long long g43;
	unsigned long long g44;
	unsigned long long g45;
	unsigned long long g46;

	// 4-node disconnected graphlet counts
	unsigned long long g47;
	unsigned long long g48;
	unsigned long long g49;
	unsigned long long g410;
	unsigned long long g411;
};

// CUDA kernel used to count graphlets of size k=4
// Each thread processes a single edge
__global__
void graphlets(int* V, unsigned long long V_num, int* E, unsigned long long E_num, int* E_u, int* E_v, EDGE_OUTPUT* outputs)
{
	// Calculate global thread index in 1D grid of 1D blocks
	// Used as the undirected edge number to compute
	int edge = (blockIdx.y * gridDim.x + blockIdx.x) * blockDim.x + threadIdx.x;

	// Return immediately if thread index is greater than maximum edge index
	if (edge >= E_num) return;

	// Using thread number, look up directed edge number in array of undirected edges
	int ei = E[edge];

	// Lookup the endpoints of the current edge
	// TODO: Dynamically choose u to be the node with smallest neighborhood
	int u = E_u[ei];
	int v = E_v[ei];

	// Array length is 1 less because v is omitted
	int arr_len = V[u + 1] - V[u] - 1;
	// Array holding current index of edges in E_v of each of u's neighbors
	int* inds = new int[arr_len];
	// Array holding maximum index of edges in E_v of each of u's neighbors
	int* ends = new int[arr_len];
	// Array indicating whether each of u's neighbors neighbors v
	bool* neighbors_v = new bool[arr_len];

	// To count graphlets, nodes are advanced in ascending order concurrently across u, v,
	// and all of u's neighbors. Through this walk, counts can be gathered by checking
	// which nodes have identical neighbors after each step
	int tri_e = 0, star_u = 0, star_v = 0;
	int iu = V[u], iv = V[v], arr_i = 0;
	while (iu < V[u + 1] || iv < V[v + 1]) {
		int cu = iu < V[u + 1] ? E_v[iu] : INT_MAX;
		int cv = iv < V[v + 1] ? E_v[iv] : INT_MAX;

		if (cu < cv) {
			if (cu != v) {
				// A star with u is found when the current node in the walk is a neighbor of u
				// but not a neighbor of v
				star_u++;

				inds[arr_i] = V[cu];
				ends[arr_i] = V[cu + 1];
				neighbors_v[arr_i] = false;
				arr_i++;
			}

			iu++;
		}
		else if (cv < cu) {
			if (cv != u) {
				// A star with v is found when the current node in the walk is a neighbor of v
				// but not a neighbor of u
				star_v++;
			}

			iv++;
		}
		else {
			// A triangle is found when the current node in the walk is both a neighbor of
			// u and a neighbor of v
			tri_e++;

			inds[arr_i] = V[cu];
			ends[arr_i] = V[cu + 1];
			neighbors_v[arr_i] = true;
			arr_i++;

			iu++;
			iv++;
		}
	}

	int cliq_e = 0, cyc_e = 0;
	iu = V[u];
	iv = V[v];
	while (iu < V[u + 1] || iv < V[v + 1]) {
		int cu = iu < V[u + 1] ? E_v[iu] : INT_MAX;
		int cv = iv < V[v + 1] ? E_v[iv] : INT_MAX;

		// Cycles and cliques can only occur when current node is in N(v) \ {u}
		if (cv <= cu && cv != u) {
			for (int arr_i = 0; arr_i < arr_len; arr_i++) {
				// Before checking for cliques or cycles, the edge index is advanced to the current
				// location in the walk
				while (inds[arr_i] < ends[arr_i] && E_v[inds[arr_i]] < cv) {
					inds[arr_i]++;
				}

				// If u's neighbor neighbors v's neighbor, a clique or cycle may be found
				if (inds[arr_i] < ends[arr_i] && E_v[inds[arr_i]] == cv) {
					if (cu == cv && neighbors_v[arr_i]) {
						// If u's neighbor and v's neighbor form triangles with e, a clique is found
						cliq_e++;
					}
					else if (cu != cv && !neighbors_v[arr_i]) {
						// If neither u's neighbor or v's neighbor form triangles with e, a cycle is found
						cyc_e++;
					}
				}
			}
		}

		if (cu <= cv) iu++;
		if (cv <= cu) iv++;
	}

    delete(inds);
    delete(ends);
    delete(neighbors_v);

	// 3-node graphlet and 4-node unrestricted counts calculated as described
	// in http://nesreenahmed.com/publications/ahmed-et-al-icdm2015.pdf
	outputs[edge].g31 = tri_e;
	outputs[edge].g32 = star_u + star_v;
	outputs[edge].g33 = V_num - (tri_e + star_u + star_v + 2);
	outputs[edge].g41 = cliq_e / 2;
	outputs[edge].g44 = cyc_e;

	outputs[edge].T_T = (tri_e * (tri_e - 1)) / 2;
	outputs[edge].Su_Sv = star_u * star_v;
	outputs[edge].T_SuVSv = tri_e * (star_u + star_v);
	outputs[edge].S_S = ((star_u * (star_u - 1)) / 2) + ((star_v * (star_v - 1)) / 2);

	outputs[edge].T_I = tri_e * outputs[edge].g33;
	outputs[edge].SuVSv_I = (star_u + star_v) * outputs[edge].g33;
	outputs[edge].I_I = (outputs[edge].g33 * (outputs[edge].g33 - 1)) / 2;
	outputs[edge].I_I_1 = E_num - (V[u + 1] - V[u] - 1) - (V[v + 1] - V[v] - 1) - 1;
}

int main(int argc, char *argv[])
{
	if (argc != 3) {
		std::cout << "usage: " << argv[0] << " <input_file> <block_size>" << std::endl;
		return EXIT_FAILURE;
	}

	// Number of threads in each block
	// Should be a multiple of GPU warp size (32 in recent architectures)
	int blocksize = atoi(argv[2]);

	// Nested vector used to store read file into adjacency list
	std::vector< std::vector<int> > adj_list;

	// Input network file provided by user
	// File format assume to be edge list
	std::ifstream infile(argv[1]);

	std::string su, sv;
	int u, v, edge_count = 0, max = -1;
	while (getline(infile, su, '\t') && getline(infile, sv)) {
		// Node ids assumed to be 1-indexed and decremented to be 0-indexed
		u = std::atoi(su.c_str()) - 1;
		v = std::atoi(sv.c_str()) - 1;

		// Dynamically add empty vectors as nodes are found in edge list
		int new_max = u > v ? u : v;
		if (new_max > max) {
			for (int i = max + 1; i <= new_max; i++) {
				adj_list.push_back(std::vector<int>(0));
			}
			max = new_max;
		}

		// Add both directions of edge to adjacency list
		adj_list[u].push_back(v);
		adj_list[v].push_back(u);

		edge_count++;
	}

	int V_num = adj_list.size();
	int E_num = edge_count;

	std::cout << "Graph found with " << V_num << " nodes and " << E_num << " edges" << std::endl;

	// Value of V[i] is index of E_u and E_v where vertex i's edges begin
	// Value of V[i+1] is index of E_u and E_v where vertex i's edges end
	std::vector<int> V;

	// Value of E[i] is the directed edge index in E_u and E_v associated with
	// the undirected edge at index i in E
	std::vector<int> E;

	// Value of E_u[i] is the source vertex id (as used in V) associated with edge i
	std::vector<int> E_u;

	// Value of E_v[i] is the destination vertex id of edge i
	std::vector<int> E_v;

	V.reserve(V_num + 1);
	E.reserve(E_num);
	E_u.reserve(E_num * 2);
	E_v.reserve(E_num * 2);

	// Build V, E_u, and E_v from adjacency list representation
	int edge_index = 0;
	for (int i = 0; i < (int) adj_list.size(); i++) {
		V.push_back(edge_index);

		for (int j = 0; j < (int) adj_list[i].size(); j++) {
			E_u.push_back(i);
			E_v.push_back(adj_list[i][j]);

			if (i < adj_list[i][j]) {
				E.push_back(E_u.size() - 1);
			}
		}

		edge_index += adj_list[i].size();
	}
	V.push_back(edge_index);

	int max_degree = 0;
	for (int i = 1; i < (int) E.size(); i++) {
		int degree = E[i] - E[i - 1];
		if (degree > max_degree) {
			max_degree = degree;
		}
	}

	// Create and initialize CUDA thread output structs
	std::vector<EDGE_OUTPUT> outputs(E_num);
	outputs.resize(E_num);

	// Pointers of V, E_u, E_v, and edge outputs in GPU memory
	int* V_ptr;
	int* E_ptr;
	int* E_u_ptr;
	int* E_v_ptr;
	EDGE_OUTPUT* outputs_ptr;

	int V_size = (V_num + 1) * sizeof(int);
	int E_size = E_num * sizeof(int);
	int outputs_size = E_num * sizeof(EDGE_OUTPUT);

	std::chrono::steady_clock::time_point begin = std::chrono::steady_clock::now();

	// Malloc GPU memory and store location in pointers
	gpuErrchk(cudaMalloc((void**)&V_ptr, V_size));
	gpuErrchk(cudaMalloc((void**)&E_ptr, E_size));
	gpuErrchk(cudaMalloc((void**)&E_u_ptr, E_size * 2));
	gpuErrchk(cudaMalloc((void**)&E_v_ptr, E_size * 2));
	gpuErrchk(cudaMalloc((void**)&outputs_ptr, outputs_size));
	cudaDeviceSynchronize();

	std::chrono::steady_clock::time_point malloc_end = std::chrono::steady_clock::now();

	// Copy data structures from main memory to allocated GPU memory
	gpuErrchk(cudaMemcpy(V_ptr, V.data(), V_size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(E_ptr, E.data(), E_size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(E_u_ptr, E_u.data(), E_size * 2, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(E_v_ptr, E_v.data(), E_size * 2, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(outputs_ptr, outputs.data(), outputs_size, cudaMemcpyHostToDevice));
	cudaDeviceSynchronize();

	std::chrono::steady_clock::time_point memcpy_input_end = std::chrono::steady_clock::now();

	// Calculate number of blocks in CUDA grid based upon number of edges in graph
	int gridsize = E_num / blocksize;
	int gridlength = 1;
	if (E_num % blocksize > 0) {
		gridsize++;
		if (gridsize > 65535) {
			gridsize -= 65535;
			gridlength++;
		}
	}

	if (gridlength > 1) {
		gridsize = 65535;
	}

	// Create one-dimensional blocks and grids based upon blocksize and gridsize
	// TODO: Increase dimensionality in order to support larger networks
	dim3 dimBlock(blocksize, 1);
	dim3 dimGrid(gridsize, gridlength);

	int heap_size = (2 * sizeof(int) + sizeof(bool)) * max_degree * E_num;
	gpuErrchk(cudaDeviceSetLimit(cudaLimitMallocHeapSize, heap_size));
	cudaDeviceSynchronize();

	std::chrono::steady_clock::time_point kernel_begin = std::chrono::steady_clock::now();

	// Execute CUDA kernel
	// TODO: Add timing to kernel execution and count aggregation below
	graphlets<<<dimGrid, dimBlock>>>(V_ptr, V_num, E_ptr, E_num, E_u_ptr, E_v_ptr, outputs_ptr);
	gpuErrchk(cudaGetLastError());
	cudaDeviceSynchronize();

	std::chrono::steady_clock::time_point kernel_end = std::chrono::steady_clock::now();

	// Copy output data from GPU memory back into main memory
	gpuErrchk(cudaMemcpy(outputs.data(), outputs_ptr, outputs_size, cudaMemcpyDeviceToHost));
	cudaDeviceSynchronize();

	std::chrono::steady_clock::time_point memcpy_output_end = std::chrono::steady_clock::now();

	// Free memory in GPU
	gpuErrchk(cudaFree(V_ptr));
	gpuErrchk(cudaFree(E_ptr));
	gpuErrchk(cudaFree(E_u_ptr));
	gpuErrchk(cudaFree(E_v_ptr));
	gpuErrchk(cudaFree(outputs_ptr));
	cudaDeviceSynchronize();

	std::chrono::steady_clock::time_point free_end = std::chrono::steady_clock::now();

	// Compute aggregate outputs based upon individual edge outputs
	EDGE_OUTPUT aggregates = { 0 };

	for (int i = 0; i < E_num; i++) {
		aggregates.g31 += outputs[i].g31;
		aggregates.g32 += outputs[i].g32;
		aggregates.g33 += outputs[i].g33;

		aggregates.g41 += outputs[i].g41;
		aggregates.g44 += outputs[i].g44;

		aggregates.T_T += outputs[i].T_T;
		aggregates.Su_Sv += outputs[i].Su_Sv;
		aggregates.T_SuVSv += outputs[i].T_SuVSv;
		aggregates.S_S += outputs[i].S_S;

		aggregates.T_I += outputs[i].T_I;
		aggregates.SuVSv_I += outputs[i].SuVSv_I;
		aggregates.I_I += outputs[i].I_I;
		aggregates.I_I_1 += outputs[i].I_I_1;
	}

	// 3-nodeand 4-node graphlet counts calculated as described
	// in http://nesreenahmed.com/publications/ahmed-et-al-icdm2015.pdf
	GRAPHLET_COUNTS counts = { 0 };

	counts.g31 = aggregates.g31 / 3;
	counts.g32 = aggregates.g32 / 2;
	counts.g33 = aggregates.g33;
	counts.g34 = ((V_num * (V_num - 1) * (V_num - 2)) / (3 * 2)) - counts.g31 - counts.g32 - counts.g33;

	counts.g41 = aggregates.g41 / 6;
	counts.g42 = aggregates.T_T - 6 * counts.g41;
	counts.g43 = (aggregates.T_SuVSv - 4 * counts.g42) / 2;
	counts.g44 = aggregates.g44 / 4;
	counts.g45 = (aggregates.S_S - counts.g43) / 3;
	counts.g46 = aggregates.Su_Sv - 4 * counts.g44;

	counts.g47 = (aggregates.T_I - counts.g43) / 3;
	counts.g48 = (aggregates.SuVSv_I - 2 * counts.g46) / 2;
	counts.g49 = (aggregates.I_I_1 - (6 * counts.g41) - (4 * counts.g42) - (2 * counts.g43) - (4 * counts.g44) - (2 * counts.g46)) / 2;
	counts.g410 = aggregates.I_I - 2 * counts.g49;
	counts.g411 = ((V_num * (V_num - 1) * (V_num - 2) * (V_num - 3)) / (4 * 3 * 2)) - counts.g41 - counts.g42 - counts.g43 - counts.g44 - counts.g45 - counts.g46 - counts.g47 - counts.g48 - counts.g49 - counts.g410;

	std::chrono::steady_clock::time_point end = std::chrono::steady_clock::now();

	std::cout << std::endl;
	std::cout << "      Graphlet Counts" << std::endl;
	std::cout << "===========================" << std::endl;
	std::cout << std::endl;
	std::cout << "k=4 Connected Graphlets" << std::endl;
	std::cout << "---------------------------" << std::endl;
	std::cout << "4-clique           (g41)  : " << counts.g41 << std::endl;
	std::cout << "4-chordalcycle     (g42)  : " << counts.g42 << std::endl;
	std::cout << "4-tailedtriangle   (g43)  : " << counts.g43 << std::endl;
	std::cout << "4-cycle            (g44)  : " << counts.g44 << std::endl;
	std::cout << "3-star             (g45)  : " << counts.g45 << std::endl;
	std::cout << "4-path             (g46)  : " << counts.g46 << std::endl;
	std::cout << std::endl;
	std::cout << "k=4 Disconnected Graphlets" << std::endl;
	std::cout << "---------------------------" << std::endl;
	std::cout << "4-node-1-triangle  (g47)  : " << counts.g47 << std::endl;
	std::cout << "4-node-2-star      (g48)  : " << counts.g48 << std::endl;
	std::cout << "4-node-2-edge      (g49)  : " << counts.g49 << std::endl;
	std::cout << "4-node-1-edge      (g410) : " << counts.g410 << std::endl;
	std::cout << "4-node-independent (g411) : " << counts.g411 << std::endl;
	std::cout << std::endl;
	std::cout << "k=3 Graphlets" << std::endl;
	std::cout << "---------------------------" << std::endl;
	std::cout << "triangle           (g31)  : " << counts.g31 << std::endl;
	std::cout << "2-star             (g32)  : " << counts.g32 << std::endl;
	std::cout << "3-node-1-edge      (g33)  : " << counts.g33 << std::endl;
	std::cout << "3-node-independent (g34)  : " << counts.g34 << std::endl;

	std::cout << std::endl;
	std::cout << "    Timing (us)" << std::endl;
	std::cout << "====================" << std::endl;
	std::cout << "total elapsed      : " << std::chrono::duration_cast<std::chrono::microseconds>(end - begin).count() << std::endl;
	std::cout << "cudaMalloc         : " << std::chrono::duration_cast<std::chrono::microseconds>(malloc_end - begin).count() << std::endl;
	std::cout << "cudaMemcpy (input) : " << std::chrono::duration_cast<std::chrono::microseconds>(memcpy_input_end - malloc_end).count() << std::endl;
	std::cout << "kernel (graphlets) : " << std::chrono::duration_cast<std::chrono::microseconds>(kernel_end - kernel_begin).count() << std::endl;
	std::cout << "cudaMemcpy (output): " << std::chrono::duration_cast<std::chrono::microseconds>(memcpy_output_end - kernel_end).count() << std::endl;
	std::cout << "cudaFree           : " << std::chrono::duration_cast<std::chrono::microseconds>(free_end - memcpy_output_end).count() << std::endl;
	std::cout << "aggregate          : " << std::chrono::duration_cast<std::chrono::microseconds>(end - memcpy_output_end).count() << std::endl;

	return EXIT_SUCCESS;
}

	.file	"tmpxft_002f95a1_00000000-6_graphlets.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4255:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4255:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0:
.LFB5310:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L3
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L4
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4611686018427387903, %rax
	cmpq	%rdi, %rax
	jnb	.L5
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L5:
	call	_ZSt17__throw_bad_allocv@PLT
.L4:
	.cfi_def_cfa_offset 8
	salq	$2, %rdi
	jmp	_Znwm@PLT
.L3:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5310:
	.size	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB5314:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE5314:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB4228:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L17
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L11
	movl	%ebx, %edi
	call	exit@PLT
.L11:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L17:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4228:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT
	.type	_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT, @function
_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT:
.LFB4277:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L20:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4277:
	.size	_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT, .-_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT
	.globl	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.type	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT, @function
_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT:
.LFB4278:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT
	.cfi_endproc
.LFE4278:
	.size	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT, .-_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4280:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4280:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4661:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L27
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L27:
	ret
	.cfi_endproc
.LFE4661:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.text._ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_IiSaIiEESaIS1_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	.type	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev, @function
_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev:
.LFB4637:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	8(%rdi), %r12
	movq	%rdi, %rbx
	movq	(%rdi), %rbp
.L30:
	cmpq	%rbp, %r12
	je	.L34
	movq	%rbp, %rdi
	addq	$24, %rbp
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L30
.L34:
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.L29
	movq	16(%rbx), %rsi
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	subq	%rdi, %rsi
	jmp	_ZdlPvm@PLT
.L29:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4637:
	.size	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev, .-_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	.weak	_ZNSt6vectorIS_IiSaIiEESaIS1_EED1Ev
	.set	_ZNSt6vectorIS_IiSaIiEESaIS1_EED1Ev,_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	.section	.rodata._ZNSt6vectorIiSaIiEE7reserveEm.str1.1,"aMS",@progbits,1
.LC2:
	.string	"vector::reserve"
	.section	.text._ZNSt6vectorIiSaIiEE7reserveEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE7reserveEm,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEE7reserveEm
	.type	_ZNSt6vectorIiSaIiEE7reserveEm, @function
_ZNSt6vectorIiSaIiEE7reserveEm:
.LFB4674:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	cmpq	%rsi, %rax
	jnb	.L36
	leaq	.LC2(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L36:
	movq	(%rdi), %rdx
	movq	16(%rdi), %rax
	movq	%rdi, %rbx
	movq	%rsi, %r12
	subq	%rdx, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jnb	.L35
	movq	8(%rdi), %r13
	movq	%rsi, %rdi
	subq	%rdx, %r13
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	(%rbx), %r14
	movq	8(%rbx), %rdx
	movq	%rax, %rbp
	subq	%r14, %rdx
	testq	%rdx, %rdx
	jle	.L38
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	memmove@PLT
	jmp	.L39
.L38:
	testq	%r14, %r14
	je	.L40
.L39:
	movq	16(%rbx), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L40:
	addq	%rbp, %r13
	leaq	0(%rbp,%r12,4), %rax
	movq	%rbp, (%rbx)
	movq	%r13, 8(%rbx)
	movq	%rax, 16(%rbx)
.L35:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4674:
	.size	_ZNSt6vectorIiSaIiEE7reserveEm, .-_ZNSt6vectorIiSaIiEE7reserveEm
	.section	.text._ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev
	.type	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev, @function
_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev:
.LFB4691:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L45
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L45:
	ret
	.cfi_endproc
.LFE4691:
	.size	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev, .-_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev
	.weak	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED1Ev
	.set	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED1Ev,_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev
	.section	.rodata._ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.str1.1,"aMS",@progbits,1
.LC3:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.type	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, @function
_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_:
.LFB5065:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rsi, 8(%rsp)
	movabsq	$384307168202282325, %rsi
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	movabsq	$-6148914691236517205, %rax
	subq	%r14, %rbx
	sarq	$3, %rbx
	imulq	%rax, %rbx
	cmpq	%rsi, %rbx
	jne	.L48
	leaq	.LC3(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L48:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rdi, %r13
	movq	%rdx, %r12
	cmovne	%rbx, %rax
	movq	8(%rsp), %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %rbp
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L60
	xorl	%r15d, %r15d
	testq	%rbx, %rbx
	je	.L53
	movabsq	$384307168202282325, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L52
.L60:
	movq	%rsi, %rbx
.L52:
	imulq	$24, %rbx, %rdi
	call	_Znwm@PLT
	movq	%rax, %r15
.L53:
	movq	(%r12), %rax
	addq	%r15, %rbp
	xorl	%ecx, %ecx
	movq	%rcx, (%r12)
	movq	%rax, 0(%rbp)
	movq	8(%r12), %rax
	movq	%rcx, 8(%r12)
	movq	%rax, 8(%rbp)
	movq	16(%r12), %rax
	movq	%rcx, 16(%r12)
	movq	%r15, %r12
	movq	%rax, 16(%rbp)
	movq	%r14, %rbp
.L54:
	addq	$24, %r12
	cmpq	%rbp, 8(%rsp)
	je	.L56
	movq	0(%rbp), %rax
	xorl	%edx, %edx
	movq	%rbp, %rdi
	addq	$24, %rbp
	movq	%rdx, -24(%rbp)
	movq	%rax, -24(%r12)
	movq	-16(%rbp), %rax
	movq	%rdx, -16(%rbp)
	movq	%rax, -16(%r12)
	movq	-8(%rbp), %rax
	movq	%rdx, -8(%rbp)
	movq	%rax, -8(%r12)
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L54
.L56:
	movq	(%rsp), %rax
	cmpq	%rax, %rbp
	je	.L67
	movq	0(%rbp), %rax
	movq	%rbp, %rdi
	addq	$24, %r12
	addq	$24, %rbp
	movq	%rax, -24(%r12)
	movq	-16(%rbp), %rax
	movq	%rax, -16(%r12)
	movq	-8(%rbp), %rax
	movq	%rax, -8(%r12)
	xorl	%eax, %eax
	movq	%rax, -8(%rbp)
	movq	%rax, -16(%rbp)
	movq	%rax, -24(%rbp)
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L56
.L67:
	testq	%r14, %r14
	je	.L58
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L58:
	imulq	$24, %rbx, %rbx
	movq	%r15, 0(%r13)
	movq	%r12, 8(%r13)
	addq	%rbx, %r15
	movq	%r15, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5065:
	.size	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .-_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.align 2
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, @function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc:
.LFB5075:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movq	%rdx, %rdi
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	movabsq	$2305843009213693951, %rax
	sarq	$2, %rcx
	movq	%rax, %rdx
	subq	%rcx, %rdx
	cmpq	%rsi, %rdx
	jnb	.L69
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt20__throw_length_errorPKc@PLT
.L69:
	.cfi_def_cfa_offset 8
	cmpq	%rcx, %rsi
	cmovb	%rcx, %rsi
	addq	%rsi, %rcx
	jc	.L68
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rcx
	cmovbe	%rcx, %rax
.L68:
	ret
	.cfi_endproc
.LFE5075:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.section	.text._ZNSt6vectorIiSaIiEE9push_backERKi,"axG",@progbits,_ZNSt6vectorIiSaIiEE9push_backERKi,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEE9push_backERKi
	.type	_ZNSt6vectorIiSaIiEE9push_backERKi, @function
_ZNSt6vectorIiSaIiEE9push_backERKi:
.LFB4665:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbx
	cmpq	16(%rdi), %rbx
	je	.L78
	movl	(%rsi), %eax
	addq	$4, %rbx
	movl	%eax, -4(%rbx)
	movq	%rbx, 8(%rdi)
	jmp	.L77
.L78:
	movq	%rsi, 8(%rsp)
	leaq	.LC3(%rip), %rdx
	movl	$1, %esi
	movq	%rbx, %r15
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%r14), %r12
	movq	8(%r14), %r13
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	8(%rsp), %r8
	subq	%r12, %r15
	movq	%rax, %rbp
	movl	(%r8), %eax
	movl	%eax, 0(%rbp,%r15)
	testq	%r15, %r15
	jle	.L80
	movq	%r15, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	memmove@PLT
.L80:
	subq	%rbx, %r13
	leaq	4(%rbp,%r15), %rdi
	testq	%r13, %r13
	jle	.L81
	movq	%r13, %rdx
	movq	%rbx, %rsi
	call	memmove@PLT
	movq	%rax, %rdi
.L81:
	addq	%rdi, %r13
	testq	%r12, %r12
	je	.L82
	movq	16(%r14), %rsi
	movq	%r12, %rdi
	subq	%r12, %rsi
	call	_ZdlPvm@PLT
.L82:
	movq	(%rsp), %rax
	movq	%rbp, (%r14)
	movq	%r13, 8(%r14)
	leaq	0(%rbp,%rax,4), %rax
	movq	%rax, 16(%r14)
.L77:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4665:
	.size	_ZNSt6vectorIiSaIiEE9push_backERKi, .-_ZNSt6vectorIiSaIiEE9push_backERKi
	.section	.text._ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_,"axG",@progbits,_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_,comdat
	.weak	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_
	.type	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_, @function
_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_:
.LFB5250:
	.cfi_startproc
	endbr64
	movq	%rdi, %rdx
	movq	%rdi, %r8
	testq	%rsi, %rsi
	je	.L87
	movl	$26, %ecx
	xorl	%eax, %eax
	leaq	104(%rdx), %r8
	rep stosl
	decq	%rsi
	je	.L87
	imulq	$104, %rsi, %rax
	movq	%r8, %r9
	addq	%r8, %rax
.L89:
	cmpq	%r9, %rax
	je	.L96
	movq	%r9, %rdi
	movl	$26, %ecx
	movq	%rdx, %rsi
	addq	$104, %r9
	rep movsl
	jmp	.L89
.L96:
	subq	%rdx, %rax
	movabsq	$1064235235021704901, %rdx
	subq	$104, %rax
	shrq	$3, %rax
	imulq	%rdx, %rax
	movabsq	$2305843009213693951, %rdx
	andq	%rdx, %rax
	imulq	$104, %rax, %rax
	addq	%rax, %r8
.L87:
	movq	%r8, %rax
	ret
	.cfi_endproc
.LFE5250:
	.size	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_, .-_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_
	.section	.rodata._ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm.str1.1,"aMS",@progbits,1
.LC4:
	.string	"vector::_M_default_append"
	.section	.text._ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm,comdat
	.align 2
	.weak	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm
	.type	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm, @function
_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm:
.LFB4940:
	.cfi_startproc
	endbr64
	testq	%rsi, %rsi
	je	.L111
	movabsq	$5675921253449092805, %rdx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rdi
	movq	16(%r13), %rax
	movq	0(%r13), %r14
	subq	%rdi, %rax
	sarq	$3, %rax
	imulq	%rdx, %rax
	cmpq	%rsi, %rax
	jb	.L99
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_
	movq	%rax, 8(%r13)
	jmp	.L97
.L99:
	movabsq	$88686269585142075, %rax
	subq	%r14, %rdi
	movq	%rdi, %r15
	movq	%rdi, 8(%rsp)
	sarq	$3, %r15
	imulq	%rdx, %r15
	subq	%r15, %rax
	cmpq	%rsi, %rax
	jnb	.L100
	leaq	.LC4(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L100:
	movabsq	$88686269585142075, %rax
	cmpq	%r15, %rsi
	movq	%r15, %r12
	cmovnb	%rsi, %r12
	addq	%r15, %r12
	cmpq	%rax, %r12
	cmova	%rax, %r12
	imulq	$104, %r12, %r12
	movq	%r12, %rdi
	call	_Znwm@PLT
	movq	%rbx, %rsi
	movq	%rax, %rbp
	movq	8(%rsp), %rax
	leaq	0(%rbp,%rax), %rdi
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_
	cmpq	$0, 8(%rsp)
	je	.L101
	movq	8(%rsp), %rdx
	movq	%r14, %rsi
	movq	%rbp, %rdi
	call	memmove@PLT
	jmp	.L102
.L101:
	testq	%r14, %r14
	je	.L103
.L102:
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L103:
	addq	%r15, %rbx
	movq	%rbp, 0(%r13)
	imulq	$104, %rbx, %rbx
	addq	%rbp, %rbx
	addq	%r12, %rbp
	movq	%rbx, 8(%r13)
	movq	%rbp, 16(%r13)
.L97:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L111:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	.cfi_restore 15
	ret
	.cfi_endproc
.LFE4940:
	.size	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm, .-_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm
	.section	.rodata.str1.1
.LC5:
	.string	"usage: "
.LC6:
	.string	" <input_file> <block_size>"
.LC7:
	.string	"Graph found with "
.LC8:
	.string	" nodes and "
.LC9:
	.string	" edges"
.LC10:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/mgarrettm/graphlet-counting/master/graphlets.cu"
.LC11:
	.string	"      Graphlet Counts"
.LC12:
	.string	"==========================="
.LC13:
	.string	"k=4 Connected Graphlets"
.LC14:
	.string	"---------------------------"
.LC15:
	.string	"4-clique           (g41)  : "
.LC16:
	.string	"4-chordalcycle     (g42)  : "
.LC17:
	.string	"4-tailedtriangle   (g43)  : "
.LC18:
	.string	"4-cycle            (g44)  : "
.LC19:
	.string	"3-star             (g45)  : "
.LC20:
	.string	"4-path             (g46)  : "
.LC21:
	.string	"k=4 Disconnected Graphlets"
.LC22:
	.string	"4-node-1-triangle  (g47)  : "
.LC23:
	.string	"4-node-2-star      (g48)  : "
.LC24:
	.string	"4-node-2-edge      (g49)  : "
.LC25:
	.string	"4-node-1-edge      (g410) : "
.LC26:
	.string	"4-node-independent (g411) : "
.LC27:
	.string	"k=3 Graphlets"
.LC28:
	.string	"triangle           (g31)  : "
.LC29:
	.string	"2-star             (g32)  : "
.LC30:
	.string	"3-node-1-edge      (g33)  : "
.LC31:
	.string	"3-node-independent (g34)  : "
.LC32:
	.string	"    Timing (us)"
.LC33:
	.string	"===================="
.LC34:
	.string	"total elapsed      : "
.LC35:
	.string	"cudaMalloc         : "
.LC36:
	.string	"cudaMemcpy (input) : "
.LC37:
	.string	"kernel (graphlets) : "
.LC38:
	.string	"cudaMemcpy (output): "
.LC39:
	.string	"cudaFree           : "
.LC40:
	.string	"aggregate          : "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4229:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4229
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$1000, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L115
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.LEHE0:
	movl	$1, %eax
	jmp	.L114
.L115:
	movq	16(%rsi), %rdi
	leaq	-576(%rbp), %r14
	call	atoi@PLT
	movq	8(%rbx), %rsi
	movl	$8, %edx
	movq	%r14, %rdi
	movl	%eax, -912(%rbp)
	xorl	%eax, %eax
	movq	%rax, -784(%rbp)
	movq	%rax, -776(%rbp)
	movq	%rax, -768(%rbp)
.LEHB1:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE1:
	leaq	-624(%rbp), %rax
	movb	$0, -624(%rbp)
	orl	$-1, %r12d
	xorl	%r15d, %r15d
	movq	%rax, -640(%rbp)
	xorl	%eax, %eax
	movq	%rax, -632(%rbp)
	leaq	-592(%rbp), %rax
	movq	%rax, -608(%rbp)
	xorl	%eax, %eax
	movq	%rax, -600(%rbp)
	leaq	-640(%rbp), %rax
	movb	$0, -592(%rbp)
	movq	%rax, -888(%rbp)
.L117:
	movq	-888(%rbp), %rsi
	movl	$9, %edx
	movq	%r14, %rdi
.LEHB2:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L123
	leaq	-608(%rbp), %rsi
	movq	%r14, %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
.LEHE2:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L123
	movq	-640(%rbp), %rdi
	call	atoi@PLT
	movq	-608(%rbp), %rdi
	leal	-1(%rax), %ebx
	movl	%eax, %r13d
	movl	%ebx, -860(%rbp)
	call	atoi@PLT
	leal	-1(%rax), %ecx
	cmpl	%eax, %r13d
	movl	%ecx, %r13d
	movl	%ecx, -880(%rbp)
	cmovg	%ebx, %r13d
	movl	%ecx, -856(%rbp)
	cmpl	%r13d, %r12d
	jge	.L118
	leaq	-664(%rbp), %rax
	incl	%r12d
	movq	%rax, -872(%rbp)
.L119:
	cmpl	%r13d, %r12d
	jg	.L175
	xorl	%eax, %eax
	movq	-776(%rbp), %rsi
	movq	%rax, -664(%rbp)
	movq	%rax, -648(%rbp)
	movq	%rax, -656(%rbp)
	cmpq	-768(%rbp), %rsi
	je	.L120
	xorl	%eax, %eax
	addq	$24, %rsi
	movq	%rax, -24(%rsi)
	movq	%rax, -16(%rsi)
	movq	%rax, -8(%rsi)
	movq	%rsi, -776(%rbp)
	jmp	.L121
.L120:
	movq	-872(%rbp), %rdx
	leaq	-784(%rbp), %rdi
.LEHB3:
	call	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
.LEHE3:
.L121:
	movq	-872(%rbp), %rdi
	incl	%r12d
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L119
.L175:
	movl	%r13d, %r12d
.L118:
	movslq	%ebx, %rdi
	movq	-784(%rbp), %r13
	leaq	-856(%rbp), %rsi
	imulq	$24, %rdi, %rdi
	addq	%r13, %rdi
.LEHB4:
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	movslq	-880(%rbp), %rax
	leaq	-860(%rbp), %rsi
	imulq	$24, %rax, %rax
	leaq	0(%r13,%rax), %rdi
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	incl	%r15d
	jmp	.L117
.L123:
	movq	-784(%rbp), %rax
	leaq	.LC7(%rip), %rsi
	movabsq	$-6148914691236517205, %rdx
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rax, -928(%rbp)
	movq	-776(%rbp), %rax
	movq	-928(%rbp), %rbx
	subq	%rbx, %rax
	sarq	$3, %rax
	imulq	%rdx, %rax
	movq	%rax, -880(%rbp)
	movl	-880(%rbp), %eax
	movl	%eax, -920(%rbp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	-920(%rbp), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r15d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.LEHE4:
	movl	-880(%rbp), %eax
	xorl	%r11d, %r11d
	leaq	-760(%rbp), %rdi
	movq	%r11, -760(%rbp)
	incl	%eax
	movq	%r11, -752(%rbp)
	movslq	%eax, %rsi
	movq	%r11, -744(%rbp)
	movq	%r11, -736(%rbp)
	movq	%r11, -728(%rbp)
	movq	%r11, -720(%rbp)
	movq	%r11, -712(%rbp)
	movq	%r11, -704(%rbp)
	movq	%r11, -696(%rbp)
	movq	%r11, -688(%rbp)
	movq	%r11, -680(%rbp)
	movq	%r11, -672(%rbp)
	movl	%eax, -896(%rbp)
.LEHB5:
	call	_ZNSt6vectorIiSaIiEE7reserveEm
	movslq	%r15d, %rax
	leaq	-736(%rbp), %rdi
	movq	%rax, %rsi
	movq	%rax, -872(%rbp)
	call	_ZNSt6vectorIiSaIiEE7reserveEm
	leal	(%r15,%r15), %ebx
	leaq	-712(%rbp), %rdi
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	_ZNSt6vectorIiSaIiEE7reserveEm
	leaq	-688(%rbp), %rdi
	movq	%rbx, %rsi
	call	_ZNSt6vectorIiSaIiEE7reserveEm
	xorl	%r10d, %r10d
	xorl	%r12d, %r12d
	movl	%r10d, -952(%rbp)
.L125:
	movl	-952(%rbp), %eax
	movl	%r12d, -664(%rbp)
	leaq	-760(%rbp), %rdi
	leaq	-852(%rbp), %rsi
	movl	%eax, -852(%rbp)
	movl	-920(%rbp), %eax
	cmpl	%eax, %r12d
	jge	.L176
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	movslq	%r12d, %rax
	xorl	%r13d, %r13d
	imulq	$24, %rax, %rax
	movq	%rax, %rbx
	movq	-928(%rbp), %rax
	addq	%rbx, %rax
	movq	%rax, -888(%rbp)
	leaq	-664(%rbp), %rax
	movq	%rax, -960(%rbp)
.L126:
	movq	-888(%rbp), %rax
	movq	-888(%rbp), %rbx
	movq	8(%rax), %rax
	subq	(%rbx), %rax
	sarq	$2, %rax
	cmpl	%r13d, %eax
	jle	.L177
	movq	-960(%rbp), %rsi
	leaq	-712(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	movq	-888(%rbp), %rax
	leaq	-688(%rbp), %rdi
	movq	(%rax), %rax
	leaq	(%rax,%r13,4), %rsi
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	movq	-888(%rbp), %rax
	movq	(%rax), %rax
	cmpl	%r12d, (%rax,%r13,4)
	jle	.L127
	movq	-704(%rbp), %rax
	subq	-712(%rbp), %rax
	sarq	$2, %rax
	movq	-728(%rbp), %rbx
	decl	%eax
	movl	%eax, -904(%rbp)
	movq	-720(%rbp), %rax
	movq	%rax, -936(%rbp)
	cmpq	%rax, %rbx
	je	.L128
	movl	-904(%rbp), %eax
	addq	$4, %rbx
	movl	%eax, -4(%rbx)
	movq	%rbx, -728(%rbp)
	jmp	.L127
.L128:
	leaq	-736(%rbp), %rdi
	leaq	.LC3(%rip), %rdx
	movl	$1, %esi
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	-736(%rbp), %r14
	movq	%rax, %rdi
	movq	%rax, -944(%rbp)
	subq	%r14, %rbx
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	%rax, %rcx
	movl	-904(%rbp), %eax
	movl	%eax, (%rcx,%rbx)
	testq	%rbx, %rbx
	jle	.L129
	movq	%rcx, %rdi
	movq	%rbx, %rdx
	movq	%r14, %rsi
	call	memmove@PLT
	movq	%rax, %rcx
.L129:
	leaq	4(%rcx,%rbx), %rbx
	testq	%r14, %r14
	je	.L130
	movq	-936(%rbp), %rsi
	movq	%r14, %rdi
	movq	%rcx, -904(%rbp)
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
	movq	-904(%rbp), %rcx
.L130:
	movq	-944(%rbp), %rax
	movq	%rcx, -736(%rbp)
	movq	%rbx, -728(%rbp)
	leaq	(%rcx,%rax,4), %rax
	movq	%rax, -720(%rbp)
.L127:
	incq	%r13
	jmp	.L126
.L177:
	addl	%eax, -952(%rbp)
	incl	%r12d
	jmp	.L125
.L176:
	call	_ZNSt6vectorIiSaIiEE9push_backERKi
	movq	-736(%rbp), %r14
	movq	-728(%rbp), %rax
	xorl	%edx, %edx
	xorl	%ebx, %ebx
	subq	%r14, %rax
	sarq	$2, %rax
.L133:
	incq	%rdx
	cmpl	%edx, %eax
	jle	.L178
	movl	(%r14,%rdx,4), %ecx
	subl	-4(%r14,%rdx,4), %ecx
	cmpl	%ecx, %ebx
	cmovl	%ecx, %ebx
	jmp	.L133
.L178:
	imulq	$104, -872(%rbp), %rax
	xorl	%r9d, %r9d
	movq	%r9, -664(%rbp)
	movq	%r9, -656(%rbp)
	movq	%r9, -648(%rbp)
	movq	%rax, %r13
	testl	%r15d, %r15d
	je	.L152
	movq	%rax, %rdi
	call	_Znwm@PLT
.LEHE5:
	movq	%rax, %r12
	jmp	.L135
.L152:
	xorl	%r12d, %r12d
.L135:
	movq	%r13, %rax
	movq	-872(%rbp), %rsi
	movq	%r12, %rdi
	movq	%r12, -664(%rbp)
	addq	%r12, %rax
	movq	%rax, -648(%rbp)
	movq	%rax, %r13
	call	_ZNSt27__uninitialized_default_n_1ILb1EE18__uninit_default_nIP11EDGE_OUTPUTmEET_S4_T0_
	movabsq	$5675921253449092805, %rcx
	movq	%rax, %rdx
	movq	%rax, -656(%rbp)
	subq	%r12, %rdx
	sarq	$3, %rdx
	imulq	%rcx, %rdx
	movq	-872(%rbp), %rcx
	cmpq	%rcx, %rdx
	jnb	.L136
	movq	%rcx, %rsi
	leaq	-664(%rbp), %rdi
	subq	%rdx, %rsi
.LEHB6:
	call	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm
	jmp	.L137
.L136:
	cmpq	%rdx, -872(%rbp)
	jnb	.L137
	cmpq	%rax, %r13
	je	.L137
	movq	%r13, -656(%rbp)
.L137:
	imull	$104, %r15d, %r13d
	leal	0(,%r15,4), %eax
	movl	%eax, -888(%rbp)
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	-896(%rbp), %r12d
	leaq	-848(%rbp), %rdi
	movq	%rax, -968(%rbp)
	sall	$2, %r12d
	movslq	%r12d, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$311, %edx
	leaq	.LC10(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	-888(%rbp), %rax
	leaq	-840(%rbp), %rdi
	movq	%rax, %rsi
	movq	%rax, -896(%rbp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$312, %edx
	leaq	.LC10(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	-888(%rbp), %eax
	leaq	-832(%rbp), %rdi
	addl	%eax, %eax
	cltq
	movq	%rax, %rsi
	movq	%rax, -888(%rbp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$313, %edx
	leaq	.LC10(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-888(%rbp), %rsi
	leaq	-824(%rbp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$314, %edx
	leaq	.LC10(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movslq	%r13d, %r13
	leaq	-816(%rbp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$315, %edx
	leaq	.LC10(%rip), %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movq	-760(%rbp), %rsi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	-848(%rbp), %rdi
	movq	%rax, -920(%rbp)
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %r12
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$321, %edx
	movq	%r12, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-896(%rbp), %rdx
	movq	-840(%rbp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$322, %edx
	movq	%r12, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-888(%rbp), %rdx
	movq	-712(%rbp), %rsi
	movl	$1, %ecx
	movq	-832(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$323, %edx
	movq	%r12, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-888(%rbp), %rdx
	movq	-688(%rbp), %rsi
	movl	$1, %ecx
	movq	-824(%rbp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$324, %edx
	movq	%r12, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-664(%rbp), %r14
	movq	-816(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rdx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$325, %edx
	movq	%r12, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$1, %ecx
	movq	%rax, -1016(%rbp)
	movl	%r15d, %eax
	cltd
	idivl	-912(%rbp)
	testl	%edx, %edx
	je	.L139
	incl	%eax
	cmpl	$65535, %eax
	jle	.L139
	movl	$2, %ecx
	movl	$65535, %eax
.L139:
	imull	%r15d, %ebx
	movl	-912(%rbp), %edx
	movl	$2, %edi
	movl	%eax, -796(%rbp)
	movl	%ecx, -792(%rbp)
	movl	%edx, -808(%rbp)
	movabsq	$4294967297, %rdx
	leal	(%rbx,%rbx,8), %esi
	movq	%rdx, -804(%rbp)
	movl	$1, -788(%rbp)
	movslq	%esi, %rsi
	call	cudaDeviceSetLimit@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$351, %edx
	movq	%r12, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	-800(%rbp), %ecx
	xorl	%r9d, %r9d
	movq	-808(%rbp), %rdx
	movq	-796(%rbp), %rdi
	movl	-788(%rbp), %esi
	xorl	%r8d, %r8d
	movq	%rax, -1024(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L140
	movslq	-880(%rbp), %rsi
	pushq	%r8
	pushq	-816(%rbp)
	movq	-824(%rbp), %r9
	movq	-832(%rbp), %r8
	movq	-872(%rbp), %rcx
	movq	-840(%rbp), %rdx
	movq	-848(%rbp), %rdi
	.cfi_escape 0x2e,0x10
	call	_Z50__device_stub__Z9graphletsPiyS_yS_S_P11EDGE_OUTPUTPiyS_yS_S_P11EDGE_OUTPUT
	popq	%rsi
	popq	%rdi
.L140:
	.cfi_escape 0x2e,0
	call	cudaGetLastError@PLT
	leaq	.LC10(%rip), %rbx
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$359, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movl	$2, %ecx
	movq	%r13, %rdx
	movq	%r14, %rdi
	movq	-816(%rbp), %rsi
	movq	%rax, -976(%rbp)
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$365, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movq	-848(%rbp), %rdi
	movq	%rax, -896(%rbp)
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$371, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-840(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$372, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-832(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$373, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-824(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$374, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	-816(%rbp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$375, %edx
	movq	%rbx, %rsi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movslq	%r15d, %rdx
	xorl	%ecx, %ecx
	xorl	%ebx, %ebx
	imulq	$104, %rdx, %rdx
	movq	%rcx, -888(%rbp)
	xorl	%r11d, %r11d
	xorl	%edi, %edi
	movq	%rax, -1032(%rbp)
	xorl	%eax, %eax
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
	movq	%r14, -872(%rbp)
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	movq	%rax, -912(%rbp)
	addq	%r14, %rdx
	xorl	%r8d, %r8d
	xorl	%r14d, %r14d
	xorl	%eax, %eax
.L141:
	movq	-872(%rbp), %rcx
	cmpq	%rcx, %rdx
	je	.L179
	movq	-872(%rbp), %r15
	addq	$104, -872(%rbp)
	movq	16(%r15), %rcx
	addq	(%r15), %rax
	addq	%rcx, -888(%rbp)
	addq	8(%r15), %r8
	movq	96(%r15), %rcx
	addq	24(%r15), %r14
	addq	%rcx, -912(%rbp)
	addq	32(%r15), %rsi
	addq	40(%r15), %r13
	addq	48(%r15), %r12
	addq	56(%r15), %rdi
	addq	64(%r15), %r10
	addq	72(%r15), %r9
	addq	80(%r15), %r11
	addq	88(%r15), %rbx
	jmp	.L141
.L179:
	movl	$3, %r15d
	xorl	%edx, %edx
	shrq	%r8
	movl	$6, %ecx
	divq	%r15
	movq	%r8, -928(%rbp)
	movq	%rax, -984(%rbp)
	movl	-880(%rbp), %eax
	leal	-1(%rax), %r8d
	imull	%eax, %r8d
	subl	$2, %eax
	imull	%eax, %r8d
	movl	%r8d, %eax
	cltd
	idivl	%ecx
	movq	-888(%rbp), %rdx
	movl	$6, %ecx
	cltq
	subq	%rdx, %rax
	movq	-984(%rbp), %rdx
	subq	%rdx, %rax
	movq	-928(%rbp), %rdx
	subq	%rdx, %rax
	xorl	%edx, %edx
	movq	%rax, -1008(%rbp)
	movq	%r14, %rax
	divq	%rcx
	movq	-912(%rbp), %rcx
	imulq	$6, %rax, %r14
	movq	%rax, -904(%rbp)
	movq	%r13, %rax
	subq	%r14, %rax
	movq	%rax, -936(%rbp)
	salq	$2, %rax
	subq	%rax, %rdi
	movq	%rax, -944(%rbp)
	movq	%rdi, %rax
	shrq	%rax
	movq	%rax, -872(%rbp)
	movq	%rsi, %rax
	movq	-872(%rbp), %rdx
	andq	$-4, %rsi
	shrq	$2, %rax
	subq	%rsi, %rcx
	movq	%rax, -952(%rbp)
	movq	%r10, %rax
	subq	%r14, %rcx
	subq	%rdx, %rax
	xorl	%edx, %edx
	divq	%r15
	movq	-872(%rbp), %rdx
	movq	%rax, -992(%rbp)
	movq	%r12, %rax
	subq	%rsi, %rax
	movq	%rax, -960(%rbp)
	movq	%r9, %rax
	subq	%rdx, %rax
	xorl	%edx, %edx
	divq	%r15
	movq	%rax, -1000(%rbp)
	movq	-960(%rbp), %rax
	addq	%rax, %rax
	subq	%rax, %r11
	shrq	%r11
	subq	%rax, %rcx
	movq	-944(%rbp), %rax
	subq	%r13, %rsi
	andq	$-2, %rdi
	movq	%r11, %r15
	subq	%rax, %rcx
	subq	%rdi, %rcx
	movl	$24, %edi
	movq	%rcx, %rax
	andq	$-2, %rcx
	shrq	%rax
	movq	%rax, -912(%rbp)
	movq	%rbx, %rax
	subq	%rcx, %rax
	movq	%rax, -944(%rbp)
	movl	-880(%rbp), %eax
	subl	$3, %eax
	imull	%r8d, %eax
	cltd
	idivl	%edi
	cltq
	addq	%rsi, %rax
	subq	%r12, %rax
	subq	%rbx, %rax
	movq	-904(%rbp), %rbx
	addq	%r14, %rax
	subq	%rbx, %rax
	movq	-952(%rbp), %rbx
	subq	%rbx, %rax
	movq	-872(%rbp), %rbx
	subq	%r11, %rax
	subq	%rbx, %rax
	movq	-992(%rbp), %rbx
	addq	%rcx, %rax
	subq	%rbx, %rax
	movq	-1000(%rbp), %rbx
	subq	%rbx, %rax
	movq	-912(%rbp), %rbx
	subq	%rbx, %rax
	movq	%rax, %r12
	call	_ZNSt6chrono3_V212steady_clock3nowEv@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rax, %rbx
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC12(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC13(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC14(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC15(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-904(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC16(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-936(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC17(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-872(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC18(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-952(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC19(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-992(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC20(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-960(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC21(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC14(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC22(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-1000(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC23(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r15, %rsi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC24(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-912(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC25(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-944(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC26(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r12, %rsi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC27(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC14(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC28(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-984(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC29(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-928(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC30(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-888(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC31(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-1008(%rbp), %rsi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIyEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC32(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC33(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC34(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-968(%rbp), %rdx
	movq	%rax, %rdi
	movq	%rbx, %rax
	movl	$1000, %ecx
	subq	%rdx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC35(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-968(%rbp), %rdx
	movq	%rax, %rdi
	movl	$1000, %ecx
	movq	-920(%rbp), %rax
	subq	%rdx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC36(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-920(%rbp), %rdx
	movq	%rax, %rdi
	movl	$1000, %ecx
	movq	-1016(%rbp), %rax
	subq	%rdx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC37(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-1024(%rbp), %rdx
	movq	%rax, %rdi
	movl	$1000, %ecx
	movq	-976(%rbp), %rax
	subq	%rdx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC38(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-976(%rbp), %rdx
	movq	%rax, %rdi
	movl	$1000, %ecx
	movq	-896(%rbp), %rax
	subq	%rdx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC39(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	-896(%rbp), %rdx
	movq	%rax, %rdi
	movl	$1000, %ecx
	movq	-1032(%rbp), %rax
	subq	%rdx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC40(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%rbx, %rax
	movq	-896(%rbp), %rbx
	movl	$1000, %ecx
	subq	%rbx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.LEHE6:
	leaq	-664(%rbp), %rdi
	call	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED1Ev
	leaq	-688(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-712(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-736(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-760(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-608(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-640(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-576(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	-784(%rbp), %rdi
	call	_ZNSt6vectorIS_IiSaIiEESaIS1_EED1Ev
	xorl	%eax, %eax
	jmp	.L114
.L156:
	endbr64
	movq	%rax, %rbx
.L143:
	movq	-872(%rbp), %rdi
	jmp	.L173
.L159:
	endbr64
	movq	%rax, %rbx
.L145:
	leaq	-664(%rbp), %rdi
	call	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED1Ev
	jmp	.L146
.L158:
	endbr64
	movq	%rax, %rbx
.L146:
	leaq	-688(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-712(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-736(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-760(%rbp), %rdi
.L173:
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L144
.L157:
	endbr64
	movq	%rax, %rbx
.L144:
	leaq	-608(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-640(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-576(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L147
.L155:
	endbr64
	movq	%rax, %rbx
.L147:
	leaq	-784(%rbp), %rdi
	call	_ZNSt6vectorIS_IiSaIiEESaIS1_EED1Ev
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L174
	movq	%rbx, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L114:
	movq	-56(%rbp), %rdx
	subq	%fs:40, %rdx
	je	.L149
.L174:
	call	__stack_chk_fail@PLT
.L149:
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4229:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4229:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4229-.LLSDACSB4229
.LLSDACSB4229:
	.uleb128 .LEHB0-.LFB4229
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4229
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L155-.LFB4229
	.uleb128 0
	.uleb128 .LEHB2-.LFB4229
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L157-.LFB4229
	.uleb128 0
	.uleb128 .LEHB3-.LFB4229
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L156-.LFB4229
	.uleb128 0
	.uleb128 .LEHB4-.LFB4229
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L157-.LFB4229
	.uleb128 0
	.uleb128 .LEHB5-.LFB4229
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L158-.LFB4229
	.uleb128 0
	.uleb128 .LEHB6-.LFB4229
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L159-.LFB4229
	.uleb128 0
	.uleb128 .LEHB7-.LFB4229
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE4229:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"


#include <climits>
#include <fstream>
#include <iostream>
#include <string>
#include <vector>
#include <chrono>

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort = true)
{
	if (code != hipSuccess)
	{
		fprintf(stderr, "GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
		if (abort) exit(code);
	}
}

// Struct containing edge outputs computed in parallel
// One produced per thread, aggregated after GPU computation
struct EDGE_OUTPUT {
	// 3-node graphlet counts
	unsigned long long g31;
	unsigned long long g32;
	unsigned long long g33;

	// 4-node cliques and cycles
	unsigned long long g41;
	unsigned long long g44;

	// Unrestricted counts for 4-node connected graphlets
	unsigned long long T_T;
	unsigned long long Su_Sv;
	unsigned long long T_SuVSv;
	unsigned long long S_S;

	// Unrestricted counts for 4-node disconnected graphlets
	unsigned long long T_I;
	unsigned long long SuVSv_I;
	unsigned long long I_I;
	unsigned long long I_I_1;
};

struct GRAPHLET_COUNTS {
	// 3-node graphlet counts
	unsigned long long g31;
	unsigned long long g32;
	unsigned long long g33;
	unsigned long long g34;

	// 4-node connected graphlet counts
	unsigned long long g41;
	unsigned long long g42;
	unsigned long long g43;
	unsigned long long g44;
	unsigned long long g45;
	unsigned long long g46;

	// 4-node disconnected graphlet counts
	unsigned long long g47;
	unsigned long long g48;
	unsigned long long g49;
	unsigned long long g410;
	unsigned long long g411;
};

// CUDA kernel used to count graphlets of size k=4
// Each thread processes a single edge
__global__
void graphlets(int* V, unsigned long long V_num, int* E, unsigned long long E_num, int* E_u, int* E_v, EDGE_OUTPUT* outputs)
{
	// Calculate global thread index in 1D grid of 1D blocks
	// Used as the undirected edge number to compute
	int edge = (blockIdx.y * gridDim.x + blockIdx.x) * blockDim.x + threadIdx.x;

	// Return immediately if thread index is greater than maximum edge index
	if (edge >= E_num) return;

	// Using thread number, look up directed edge number in array of undirected edges
	int ei = E[edge];

	// Lookup the endpoints of the current edge
	// TODO: Dynamically choose u to be the node with smallest neighborhood
	int u = E_u[ei];
	int v = E_v[ei];

	// Array length is 1 less because v is omitted
	int arr_len = V[u + 1] - V[u] - 1;
	// Array holding current index of edges in E_v of each of u's neighbors
	int* inds = new int[arr_len];
	// Array holding maximum index of edges in E_v of each of u's neighbors
	int* ends = new int[arr_len];
	// Array indicating whether each of u's neighbors neighbors v
	bool* neighbors_v = new bool[arr_len];

	// To count graphlets, nodes are advanced in ascending order concurrently across u, v,
	// and all of u's neighbors. Through this walk, counts can be gathered by checking
	// which nodes have identical neighbors after each step
	int tri_e = 0, star_u = 0, star_v = 0;
	int iu = V[u], iv = V[v], arr_i = 0;
	while (iu < V[u + 1] || iv < V[v + 1]) {
		int cu = iu < V[u + 1] ? E_v[iu] : INT_MAX;
		int cv = iv < V[v + 1] ? E_v[iv] : INT_MAX;

		if (cu < cv) {
			if (cu != v) {
				// A star with u is found when the current node in the walk is a neighbor of u
				// but not a neighbor of v
				star_u++;

				inds[arr_i] = V[cu];
				ends[arr_i] = V[cu + 1];
				neighbors_v[arr_i] = false;
				arr_i++;
			}

			iu++;
		}
		else if (cv < cu) {
			if (cv != u) {
				// A star with v is found when the current node in the walk is a neighbor of v
				// but not a neighbor of u
				star_v++;
			}

			iv++;
		}
		else {
			// A triangle is found when the current node in the walk is both a neighbor of
			// u and a neighbor of v
			tri_e++;

			inds[arr_i] = V[cu];
			ends[arr_i] = V[cu + 1];
			neighbors_v[arr_i] = true;
			arr_i++;

			iu++;
			iv++;
		}
	}

	int cliq_e = 0, cyc_e = 0;
	iu = V[u];
	iv = V[v];
	while (iu < V[u + 1] || iv < V[v + 1]) {
		int cu = iu < V[u + 1] ? E_v[iu] : INT_MAX;
		int cv = iv < V[v + 1] ? E_v[iv] : INT_MAX;

		// Cycles and cliques can only occur when current node is in N(v) \ {u}
		if (cv <= cu && cv != u) {
			for (int arr_i = 0; arr_i < arr_len; arr_i++) {
				// Before checking for cliques or cycles, the edge index is advanced to the current
				// location in the walk
				while (inds[arr_i] < ends[arr_i] && E_v[inds[arr_i]] < cv) {
					inds[arr_i]++;
				}

				// If u's neighbor neighbors v's neighbor, a clique or cycle may be found
				if (inds[arr_i] < ends[arr_i] && E_v[inds[arr_i]] == cv) {
					if (cu == cv && neighbors_v[arr_i]) {
						// If u's neighbor and v's neighbor form triangles with e, a clique is found
						cliq_e++;
					}
					else if (cu != cv && !neighbors_v[arr_i]) {
						// If neither u's neighbor or v's neighbor form triangles with e, a cycle is found
						cyc_e++;
					}
				}
			}
		}

		if (cu <= cv) iu++;
		if (cv <= cu) iv++;
	}

    delete(inds);
    delete(ends);
    delete(neighbors_v);

	// 3-node graphlet and 4-node unrestricted counts calculated as described
	// in http://nesreenahmed.com/publications/ahmed-et-al-icdm2015.pdf
	outputs[edge].g31 = tri_e;
	outputs[edge].g32 = star_u + star_v;
	outputs[edge].g33 = V_num - (tri_e + star_u + star_v + 2);
	outputs[edge].g41 = cliq_e / 2;
	outputs[edge].g44 = cyc_e;

	outputs[edge].T_T = (tri_e * (tri_e - 1)) / 2;
	outputs[edge].Su_Sv = star_u * star_v;
	outputs[edge].T_SuVSv = tri_e * (star_u + star_v);
	outputs[edge].S_S = ((star_u * (star_u - 1)) / 2) + ((star_v * (star_v - 1)) / 2);

	outputs[edge].T_I = tri_e * outputs[edge].g33;
	outputs[edge].SuVSv_I = (star_u + star_v) * outputs[edge].g33;
	outputs[edge].I_I = (outputs[edge].g33 * (outputs[edge].g33 - 1)) / 2;
	outputs[edge].I_I_1 = E_num - (V[u + 1] - V[u] - 1) - (V[v + 1] - V[v] - 1) - 1;
}

int main(int argc, char *argv[])
{
	if (argc != 3) {
		std::cout << "usage: " << argv[0] << " <input_file> <block_size>" << std::endl;
		return EXIT_FAILURE;
	}

	// Number of threads in each block
	// Should be a multiple of GPU warp size (32 in recent architectures)
	int blocksize = atoi(argv[2]);

	// Nested vector used to store read file into adjacency list
	std::vector< std::vector<int> > adj_list;

	// Input network file provided by user
	// File format assume to be edge list
	std::ifstream infile(argv[1]);

	std::string su, sv;
	int u, v, edge_count = 0, max = -1;
	while (getline(infile, su, '\t') && getline(infile, sv)) {
		// Node ids assumed to be 1-indexed and decremented to be 0-indexed
		u = std::atoi(su.c_str()) - 1;
		v = std::atoi(sv.c_str()) - 1;

		// Dynamically add empty vectors as nodes are found in edge list
		int new_max = u > v ? u : v;
		if (new_max > max) {
			for (int i = max + 1; i <= new_max; i++) {
				adj_list.push_back(std::vector<int>(0));
			}
			max = new_max;
		}

		// Add both directions of edge to adjacency list
		adj_list[u].push_back(v);
		adj_list[v].push_back(u);

		edge_count++;
	}

	int V_num = adj_list.size();
	int E_num = edge_count;

	std::cout << "Graph found with " << V_num << " nodes and " << E_num << " edges" << std::endl;

	// Value of V[i] is index of E_u and E_v where vertex i's edges begin
	// Value of V[i+1] is index of E_u and E_v where vertex i's edges end
	std::vector<int> V;

	// Value of E[i] is the directed edge index in E_u and E_v associated with
	// the undirected edge at index i in E
	std::vector<int> E;

	// Value of E_u[i] is the source vertex id (as used in V) associated with edge i
	std::vector<int> E_u;

	// Value of E_v[i] is the destination vertex id of edge i
	std::vector<int> E_v;

	V.reserve(V_num + 1);
	E.reserve(E_num);
	E_u.reserve(E_num * 2);
	E_v.reserve(E_num * 2);

	// Build V, E_u, and E_v from adjacency list representation
	int edge_index = 0;
	for (int i = 0; i < (int) adj_list.size(); i++) {
		V.push_back(edge_index);

		for (int j = 0; j < (int) adj_list[i].size(); j++) {
			E_u.push_back(i);
			E_v.push_back(adj_list[i][j]);

			if (i < adj_list[i][j]) {
				E.push_back(E_u.size() - 1);
			}
		}

		edge_index += adj_list[i].size();
	}
	V.push_back(edge_index);

	int max_degree = 0;
	for (int i = 1; i < (int) E.size(); i++) {
		int degree = E[i] - E[i - 1];
		if (degree > max_degree) {
			max_degree = degree;
		}
	}

	// Create and initialize CUDA thread output structs
	std::vector<EDGE_OUTPUT> outputs(E_num);
	outputs.resize(E_num);

	// Pointers of V, E_u, E_v, and edge outputs in GPU memory
	int* V_ptr;
	int* E_ptr;
	int* E_u_ptr;
	int* E_v_ptr;
	EDGE_OUTPUT* outputs_ptr;

	int V_size = (V_num + 1) * sizeof(int);
	int E_size = E_num * sizeof(int);
	int outputs_size = E_num * sizeof(EDGE_OUTPUT);

	std::chrono::steady_clock::time_point begin = std::chrono::steady_clock::now();

	// Malloc GPU memory and store location in pointers
	gpuErrchk(hipMalloc((void**)&V_ptr, V_size));
	gpuErrchk(hipMalloc((void**)&E_ptr, E_size));
	gpuErrchk(hipMalloc((void**)&E_u_ptr, E_size * 2));
	gpuErrchk(hipMalloc((void**)&E_v_ptr, E_size * 2));
	gpuErrchk(hipMalloc((void**)&outputs_ptr, outputs_size));
	hipDeviceSynchronize();

	std::chrono::steady_clock::time_point malloc_end = std::chrono::steady_clock::now();

	// Copy data structures from main memory to allocated GPU memory
	gpuErrchk(hipMemcpy(V_ptr, V.data(), V_size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(E_ptr, E.data(), E_size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(E_u_ptr, E_u.data(), E_size * 2, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(E_v_ptr, E_v.data(), E_size * 2, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(outputs_ptr, outputs.data(), outputs_size, hipMemcpyHostToDevice));
	hipDeviceSynchronize();

	std::chrono::steady_clock::time_point memcpy_input_end = std::chrono::steady_clock::now();

	// Calculate number of blocks in CUDA grid based upon number of edges in graph
	int gridsize = E_num / blocksize;
	int gridlength = 1;
	if (E_num % blocksize > 0) {
		gridsize++;
		if (gridsize > 65535) {
			gridsize -= 65535;
			gridlength++;
		}
	}

	if (gridlength > 1) {
		gridsize = 65535;
	}

	// Create one-dimensional blocks and grids based upon blocksize and gridsize
	// TODO: Increase dimensionality in order to support larger networks
	dim3 dimBlock(blocksize, 1);
	dim3 dimGrid(gridsize, gridlength);

	int heap_size = (2 * sizeof(int) + sizeof(bool)) * max_degree * E_num;
	gpuErrchk(hipDeviceSetLimit(hipLimitMallocHeapSize, heap_size));
	hipDeviceSynchronize();

	std::chrono::steady_clock::time_point kernel_begin = std::chrono::steady_clock::now();

	// Execute CUDA kernel
	// TODO: Add timing to kernel execution and count aggregation below
	graphlets<<<dimGrid, dimBlock>>>(V_ptr, V_num, E_ptr, E_num, E_u_ptr, E_v_ptr, outputs_ptr);
	gpuErrchk(hipGetLastError());
	hipDeviceSynchronize();

	std::chrono::steady_clock::time_point kernel_end = std::chrono::steady_clock::now();

	// Copy output data from GPU memory back into main memory
	gpuErrchk(hipMemcpy(outputs.data(), outputs_ptr, outputs_size, hipMemcpyDeviceToHost));
	hipDeviceSynchronize();

	std::chrono::steady_clock::time_point memcpy_output_end = std::chrono::steady_clock::now();

	// Free memory in GPU
	gpuErrchk(hipFree(V_ptr));
	gpuErrchk(hipFree(E_ptr));
	gpuErrchk(hipFree(E_u_ptr));
	gpuErrchk(hipFree(E_v_ptr));
	gpuErrchk(hipFree(outputs_ptr));
	hipDeviceSynchronize();

	std::chrono::steady_clock::time_point free_end = std::chrono::steady_clock::now();

	// Compute aggregate outputs based upon individual edge outputs
	EDGE_OUTPUT aggregates = { 0 };

	for (int i = 0; i < E_num; i++) {
		aggregates.g31 += outputs[i].g31;
		aggregates.g32 += outputs[i].g32;
		aggregates.g33 += outputs[i].g33;

		aggregates.g41 += outputs[i].g41;
		aggregates.g44 += outputs[i].g44;

		aggregates.T_T += outputs[i].T_T;
		aggregates.Su_Sv += outputs[i].Su_Sv;
		aggregates.T_SuVSv += outputs[i].T_SuVSv;
		aggregates.S_S += outputs[i].S_S;

		aggregates.T_I += outputs[i].T_I;
		aggregates.SuVSv_I += outputs[i].SuVSv_I;
		aggregates.I_I += outputs[i].I_I;
		aggregates.I_I_1 += outputs[i].I_I_1;
	}

	// 3-nodeand 4-node graphlet counts calculated as described
	// in http://nesreenahmed.com/publications/ahmed-et-al-icdm2015.pdf
	GRAPHLET_COUNTS counts = { 0 };

	counts.g31 = aggregates.g31 / 3;
	counts.g32 = aggregates.g32 / 2;
	counts.g33 = aggregates.g33;
	counts.g34 = ((V_num * (V_num - 1) * (V_num - 2)) / (3 * 2)) - counts.g31 - counts.g32 - counts.g33;

	counts.g41 = aggregates.g41 / 6;
	counts.g42 = aggregates.T_T - 6 * counts.g41;
	counts.g43 = (aggregates.T_SuVSv - 4 * counts.g42) / 2;
	counts.g44 = aggregates.g44 / 4;
	counts.g45 = (aggregates.S_S - counts.g43) / 3;
	counts.g46 = aggregates.Su_Sv - 4 * counts.g44;

	counts.g47 = (aggregates.T_I - counts.g43) / 3;
	counts.g48 = (aggregates.SuVSv_I - 2 * counts.g46) / 2;
	counts.g49 = (aggregates.I_I_1 - (6 * counts.g41) - (4 * counts.g42) - (2 * counts.g43) - (4 * counts.g44) - (2 * counts.g46)) / 2;
	counts.g410 = aggregates.I_I - 2 * counts.g49;
	counts.g411 = ((V_num * (V_num - 1) * (V_num - 2) * (V_num - 3)) / (4 * 3 * 2)) - counts.g41 - counts.g42 - counts.g43 - counts.g44 - counts.g45 - counts.g46 - counts.g47 - counts.g48 - counts.g49 - counts.g410;

	std::chrono::steady_clock::time_point end = std::chrono::steady_clock::now();

	std::cout << std::endl;
	std::cout << "      Graphlet Counts" << std::endl;
	std::cout << "===========================" << std::endl;
	std::cout << std::endl;
	std::cout << "k=4 Connected Graphlets" << std::endl;
	std::cout << "---------------------------" << std::endl;
	std::cout << "4-clique           (g41)  : " << counts.g41 << std::endl;
	std::cout << "4-chordalcycle     (g42)  : " << counts.g42 << std::endl;
	std::cout << "4-tailedtriangle   (g43)  : " << counts.g43 << std::endl;
	std::cout << "4-cycle            (g44)  : " << counts.g44 << std::endl;
	std::cout << "3-star             (g45)  : " << counts.g45 << std::endl;
	std::cout << "4-path             (g46)  : " << counts.g46 << std::endl;
	std::cout << std::endl;
	std::cout << "k=4 Disconnected Graphlets" << std::endl;
	std::cout << "---------------------------" << std::endl;
	std::cout << "4-node-1-triangle  (g47)  : " << counts.g47 << std::endl;
	std::cout << "4-node-2-star      (g48)  : " << counts.g48 << std::endl;
	std::cout << "4-node-2-edge      (g49)  : " << counts.g49 << std::endl;
	std::cout << "4-node-1-edge      (g410) : " << counts.g410 << std::endl;
	std::cout << "4-node-independent (g411) : " << counts.g411 << std::endl;
	std::cout << std::endl;
	std::cout << "k=3 Graphlets" << std::endl;
	std::cout << "---------------------------" << std::endl;
	std::cout << "triangle           (g31)  : " << counts.g31 << std::endl;
	std::cout << "2-star             (g32)  : " << counts.g32 << std::endl;
	std::cout << "3-node-1-edge      (g33)  : " << counts.g33 << std::endl;
	std::cout << "3-node-independent (g34)  : " << counts.g34 << std::endl;

	std::cout << std::endl;
	std::cout << "    Timing (us)" << std::endl;
	std::cout << "====================" << std::endl;
	std::cout << "total elapsed      : " << std::chrono::duration_cast<std::chrono::microseconds>(end - begin).count() << std::endl;
	std::cout << "hipMalloc         : " << std::chrono::duration_cast<std::chrono::microseconds>(malloc_end - begin).count() << std::endl;
	std::cout << "hipMemcpy (input) : " << std::chrono::duration_cast<std::chrono::microseconds>(memcpy_input_end - malloc_end).count() << std::endl;
	std::cout << "kernel (graphlets) : " << std::chrono::duration_cast<std::chrono::microseconds>(kernel_end - kernel_begin).count() << std::endl;
	std::cout << "hipMemcpy (output): " << std::chrono::duration_cast<std::chrono::microseconds>(memcpy_output_end - kernel_end).count() << std::endl;
	std::cout << "hipFree           : " << std::chrono::duration_cast<std::chrono::microseconds>(free_end - memcpy_output_end).count() << std::endl;
	std::cout << "aggregate          : " << std::chrono::duration_cast<std::chrono::microseconds>(end - memcpy_output_end).count() << std::endl;

	return EXIT_SUCCESS;
}

	.text
	.file	"graphlets.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT # -- Begin function _Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.type	_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT,@function
_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT: # @_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT, .Lfunc_end0-_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI1_0:
	.zero	16
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$984, %rsp                      # imm = 0x3D8
	.cfi_def_cfa_offset 1040
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$3, %edi
	jne	.LBB1_22
# %bb.1:
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, 48(%rsp)                  # 4-byte Spill
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 96(%rsp)
	movq	$0, 112(%rsp)
	movq	8(%rbx), %rsi
.Ltmp0:
	leaq	464(%rsp), %rbx
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp1:
# %bb.2:
	leaq	448(%rsp), %rax
	movq	%rax, -16(%rax)
	xorl	%r15d, %r15d
	movq	%r15, -8(%rax)
	movb	%r15b, (%rax)
	leaq	416(%rsp), %rax
	movq	%rax, -16(%rax)
	movq	%r15, -8(%rax)
	movb	%r15b, (%rax)
	movl	$-1, 8(%rsp)                    # 4-byte Folded Spill
	leaq	96(%rsp), %r13
	leaq	64(%rsp), %rbp
.LBB1_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_9 Depth 2
.Ltmp3:
	movq	%rbx, %rdi
	leaq	432(%rsp), %rsi
	movl	$9, %edx
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp4:
# %bb.4:                                #   in Loop: Header=BB1_3 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	jne	.LBB1_24
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	movq	464(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp5:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp6:
# %bb.6:                                # %.noexc
                                        #   in Loop: Header=BB1_3 Depth=1
.Ltmp7:
	movsbl	%al, %edx
	movq	%rbx, %rdi
	leaq	400(%rsp), %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp8:
# %bb.7:                                #   in Loop: Header=BB1_3 Depth=1
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB1_24
# %bb.8:                                #   in Loop: Header=BB1_3 Depth=1
	movq	432(%rsp), %rdi
	callq	atoi
	movl	%eax, %r14d
	decl	%r14d
	movl	%r14d, 44(%rsp)
	movq	400(%rsp), %rdi
	callq	atoi
	movl	%eax, %r15d
	decl	%r15d
	movl	%r15d, 40(%rsp)
	cmpl	%r15d, %r14d
	cmovgl	%r14d, %r15d
	movl	%r15d, %r12d
	subl	8(%rsp), %r12d                  # 4-byte Folded Reload
	jle	.LBB1_14
.LBB1_9:                                # %.preheader
                                        #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 64(%rsp)
	movq	$0, 80(%rsp)
.Ltmp488:
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
.Ltmp489:
# %bb.10:                               # %_ZNSt6vectorIS_IiSaIiEESaIS1_EE9push_backEOS1_.exit
                                        #   in Loop: Header=BB1_9 Depth=2
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_12
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=2
	callq	_ZdlPv
.LBB1_12:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit
                                        #   in Loop: Header=BB1_9 Depth=2
	decl	%r12d
	jne	.LBB1_9
# %bb.13:                               # %.loopexit.loopexit
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	44(%rsp), %r14d
	movl	%r15d, 8(%rsp)                  # 4-byte Spill
.LBB1_14:                               # %.loopexit
                                        #   in Loop: Header=BB1_3 Depth=1
	movslq	%r14d, %rcx
	movq	96(%rsp), %rax
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%rax,%rcx,8), %rdi
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	movq	32(%rsp), %r15                  # 8-byte Reload
	je	.LBB1_16
# %bb.15:                               #   in Loop: Header=BB1_3 Depth=1
	movl	40(%rsp), %ecx
	movl	%ecx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rdi)
	jmp	.LBB1_18
.LBB1_16:                               #   in Loop: Header=BB1_3 Depth=1
.Ltmp491:
	leaq	40(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp492:
# %bb.17:                               # %._ZNSt6vectorIiSaIiEE9push_backERKi.exit_crit_edge
                                        #   in Loop: Header=BB1_3 Depth=1
	movl	40(%rsp), %ecx
	movq	96(%rsp), %rax
.LBB1_18:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit
                                        #   in Loop: Header=BB1_3 Depth=1
	movslq	%ecx, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	leaq	(%rax,%rcx,8), %rdi
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB1_20
# %bb.19:                               #   in Loop: Header=BB1_3 Depth=1
	movl	44(%rsp), %eax
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 8(%rdi)
	jmp	.LBB1_21
.LBB1_20:                               #   in Loop: Header=BB1_3 Depth=1
.Ltmp493:
	leaq	44(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp494:
.LBB1_21:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit247
                                        #   in Loop: Header=BB1_3 Depth=1
	incq	%r15
	jmp	.LBB1_3
.LBB1_22:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rbx
	testq	%rbx, %rbx
	je	.LBB1_63
# %bb.23:
	movq	%rbx, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB1_64
.LBB1_24:                               # %.critedge
	movq	104(%rsp), %r14
	subq	96(%rsp), %r14
.Ltmp10:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp11:
# %bb.25:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit249
.Ltmp12:
	sarq	$3, %r14
	movabsq	$-6148914691236517205, %rax     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %r14
	movl	$_ZSt4cout, %edi
	movl	%r14d, %esi
	callq	_ZNSolsEi
.Ltmp13:
# %bb.26:
.Ltmp14:
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$11, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
# %bb.27:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit251
.Ltmp16:
	movq	%rbx, %rdi
	movl	%r15d, %esi
	callq	_ZNSolsEi
.Ltmp17:
# %bb.28:
.Ltmp18:
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$6, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp19:
# %bb.29:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit253
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp20:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp21:
# %bb.30:                               # %.noexc541
.Ltmp22:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp23:
# %bb.31:                               # %.noexc542
.Ltmp24:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp25:
# %bb.32:                               # %_ZNSolsEPFRSoS_E.exit
	movabsq	$4294967296, %rcx               # imm = 0x100000000
	xorps	%xmm0, %xmm0
	leaq	64(%rsp), %rdi
	movaps	%xmm0, (%rdi)
	xorl	%eax, %eax
	movq	%rax, 16(%rdi)
	movq	%rax, 208(%rsp)
	movaps	%xmm0, 192(%rsp)
	movq	%rax, 176(%rsp)
	movaps	%xmm0, 160(%rsp)
	movq	%rax, 272(%rsp)
	movaps	%xmm0, 256(%rsp)
	movq	%r14, 392(%rsp)                 # 8-byte Spill
	shlq	$32, %r14
	movq	%r14, 120(%rsp)                 # 8-byte Spill
	leaq	(%r14,%rcx), %rsi
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	sarq	$32, %rsi
.Ltmp27:
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp28:
# %bb.33:
	movl	%r15d, %esi
.Ltmp29:
	leaq	192(%rsp), %rdi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp30:
# %bb.34:
	leal	(%r15,%r15), %ebx
.Ltmp31:
	leaq	160(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp32:
# %bb.35:
.Ltmp33:
	leaq	256(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSt6vectorIiSaIiEE7reserveEm
.Ltmp34:
# %bb.36:
	xorl	%edx, %edx
	movl	%edx, 20(%rsp)
	movl	%edx, 136(%rsp)
	movq	96(%rsp), %rax
	movq	104(%rsp), %rcx
	subq	%rax, %rcx
	shrq	$3, %rcx
	imull	$-1431655765, %ecx, %ecx        # imm = 0xAAAAAAAB
	testl	%ecx, %ecx
	jle	.LBB1_61
# %bb.37:                               # %.lr.ph772
	xorl	%edx, %edx
	leaq	160(%rsp), %rbx
	leaq	136(%rsp), %r12
	leaq	256(%rsp), %r14
	leaq	56(%rsp), %rbp
.LBB1_38:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_44 Depth 2
	movq	72(%rsp), %rsi
	cmpq	80(%rsp), %rsi
	je	.LBB1_40
# %bb.39:                               #   in Loop: Header=BB1_38 Depth=1
	movl	%edx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 72(%rsp)
	jmp	.LBB1_42
.LBB1_40:                               #   in Loop: Header=BB1_38 Depth=1
.Ltmp36:
	leaq	64(%rsp), %rdi
	leaq	20(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp37:
# %bb.41:                               # %._ZNSt6vectorIiSaIiEE9push_backERKi.exit260_crit_edge
                                        #   in Loop: Header=BB1_38 Depth=1
	movq	96(%rsp), %rax
.LBB1_42:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit260
                                        #   in Loop: Header=BB1_38 Depth=1
	movslq	136(%rsp), %rcx
	leaq	(%rcx,%rcx,2), %rsi
	movq	8(%rax,%rsi,8), %rdx
	subq	(%rax,%rsi,8), %rdx
	shrq	$2, %rdx
	testl	%edx, %edx
	jle	.LBB1_60
# %bb.43:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_38 Depth=1
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
.LBB1_44:                               # %.lr.ph
                                        #   Parent Loop BB1_38 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	168(%rsp), %rsi
	cmpq	176(%rsp), %rsi
	je	.LBB1_46
# %bb.45:                               #   in Loop: Header=BB1_44 Depth=2
	movl	%ecx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 168(%rsp)
	jmp	.LBB1_48
.LBB1_46:                               #   in Loop: Header=BB1_44 Depth=2
.Ltmp39:
	movq	%rbx, %rdi
	movq	%r12, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp40:
# %bb.47:                               # %._ZNSt6vectorIiSaIiEE9push_backERKi.exit263_crit_edge
                                        #   in Loop: Header=BB1_44 Depth=2
	movq	96(%rsp), %rax
.LBB1_48:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit263
                                        #   in Loop: Header=BB1_44 Depth=2
	movslq	136(%rsp), %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movq	(%rax,%rcx,8), %rdx
	addq	%r15, %rdx
	movq	264(%rsp), %rsi
	cmpq	272(%rsp), %rsi
	je	.LBB1_50
# %bb.49:                               #   in Loop: Header=BB1_44 Depth=2
	movl	(%rdx), %ecx
	movl	%ecx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 264(%rsp)
	jmp	.LBB1_52
.LBB1_50:                               #   in Loop: Header=BB1_44 Depth=2
.Ltmp41:
	movq	%r14, %rdi
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp42:
# %bb.51:                               # %._ZNSt6vectorIiSaIiEE9push_backERKi.exit266_crit_edge
                                        #   in Loop: Header=BB1_44 Depth=2
	movq	96(%rsp), %rax
.LBB1_52:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit266
                                        #   in Loop: Header=BB1_44 Depth=2
	movl	136(%rsp), %ecx
	movslq	%ecx, %rdx
	leaq	(%rdx,%rdx,2), %rsi
	movq	(%rax,%rsi,8), %rsi
	cmpl	(%rsi,%r15), %edx
	jge	.LBB1_58
# %bb.53:                               #   in Loop: Header=BB1_44 Depth=2
	movq	168(%rsp), %rcx
	subq	160(%rsp), %rcx
	shrq	$2, %rcx
	decl	%ecx
	movl	%ecx, 56(%rsp)
	movq	200(%rsp), %rsi
	cmpq	208(%rsp), %rsi
	je	.LBB1_55
# %bb.54:                               #   in Loop: Header=BB1_44 Depth=2
	movl	%ecx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 200(%rsp)
	jmp	.LBB1_57
.LBB1_55:                               #   in Loop: Header=BB1_44 Depth=2
.Ltmp44:
	leaq	192(%rsp), %rdi
	movq	%rbp, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp45:
# %bb.56:                               # %._ZNSt6vectorIiSaIiEE9push_backEOi.exit_crit_edge
                                        #   in Loop: Header=BB1_44 Depth=2
	movq	96(%rsp), %rax
.LBB1_57:                               # %_ZNSt6vectorIiSaIiEE9push_backEOi.exit
                                        #   in Loop: Header=BB1_44 Depth=2
	movl	136(%rsp), %ecx
	movslq	%ecx, %rdx
	leaq	(%rdx,%rdx,2), %rsi
	movq	(%rax,%rsi,8), %rsi
.LBB1_58:                               #   in Loop: Header=BB1_44 Depth=2
	incq	%r13
	leaq	(%rdx,%rdx,2), %rdx
	movq	8(%rax,%rdx,8), %rdx
	subq	%rsi, %rdx
	shrq	$2, %rdx
	movslq	%edx, %rsi
	addq	$4, %r15
	cmpq	%rsi, %r13
	jl	.LBB1_44
# %bb.59:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_38 Depth=1
	movq	32(%rsp), %r15                  # 8-byte Reload
.LBB1_60:                               # %._crit_edge
                                        #   in Loop: Header=BB1_38 Depth=1
	addl	20(%rsp), %edx
	movl	%edx, 20(%rsp)
	incl	%ecx
	movl	%ecx, 136(%rsp)
	movq	104(%rsp), %rsi
	subq	%rax, %rsi
	shrq	$3, %rsi
	imull	$-1431655765, %esi, %esi        # imm = 0xAAAAAAAB
	cmpl	%esi, %ecx
	jl	.LBB1_38
.LBB1_61:                               # %._crit_edge773
	movq	72(%rsp), %rsi
	cmpq	80(%rsp), %rsi
	je	.LBB1_65
# %bb.62:
	movl	%edx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 72(%rsp)
	movq	8(%rsp), %rbx                   # 8-byte Reload
	jmp	.LBB1_66
.LBB1_63:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB1_64:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$1, %eax
	jmp	.LBB1_300
.LBB1_65:
.Ltmp47:
	leaq	64(%rsp), %rdi
	leaq	20(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp48:
	movq	8(%rsp), %rbx                   # 8-byte Reload
.LBB1_66:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit257
	movq	192(%rsp), %rax
	movq	200(%rsp), %rcx
	subq	%rax, %rcx
	shrq	$2, %rcx
	xorl	%r13d, %r13d
	cmpl	$2, %ecx
	jl	.LBB1_69
# %bb.67:                               # %.lr.ph776.preheader
	movl	%ecx, %ecx
	xorl	%esi, %esi
	movl	$1, %edx
.LBB1_68:                               # %.lr.ph776
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rax,%rdx,4), %r13d
	subl	-4(%rax,%rdx,4), %r13d
	cmpl	%esi, %r13d
	cmovlel	%esi, %r13d
	incq	%rdx
	movl	%r13d, %esi
	cmpq	%rdx, %rcx
	jne	.LBB1_68
.LBB1_69:                               # %._crit_edge777
.Ltmp50:
	leaq	136(%rsp), %rdi
	leaq	56(%rsp), %rdx
	movq	%rbx, %rsi
	callq	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_
.Ltmp51:
# %bb.70:
.Ltmp53:
	leaq	136(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm
.Ltmp54:
# %bb.71:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 320(%rsp)                 # 8-byte Spill
	movq	24(%rsp), %rax                  # 8-byte Reload
	shrq	$30, %rax
	movslq	%eax, %r12
.Ltmp56:
	leaq	56(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
.Ltmp57:
# %bb.72:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_301
# %bb.73:                               # %_Z9gpuAssert10hipError_tPKcib.exit
	leal	(,%r15,4), %eax
	movslq	%eax, %rsi
.Ltmp60:
	leaq	248(%rsp), %rdi
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	callq	hipMalloc
.Ltmp61:
# %bb.74:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_303
# %bb.75:                               # %_Z9gpuAssert10hipError_tPKcib.exit272
	leal	(,%r15,8), %eax
	movslq	%eax, %r14
.Ltmp64:
	leaq	240(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
.Ltmp65:
# %bb.76:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_305
# %bb.77:                               # %_Z9gpuAssert10hipError_tPKcib.exit275
.Ltmp68:
	leaq	232(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
.Ltmp69:
# %bb.78:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_307
# %bb.79:                               # %_Z9gpuAssert10hipError_tPKcib.exit278
	imull	$104, %r15d, %eax
	movslq	%eax, %rbx
.Ltmp72:
	leaq	128(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp73:
# %bb.80:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_309
# %bb.81:                               # %_Z9gpuAssert10hipError_tPKcib.exit281
.Ltmp76:
	callq	hipDeviceSynchronize
.Ltmp77:
# %bb.82:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 304(%rsp)                 # 8-byte Spill
	movq	56(%rsp), %rdi
	movq	64(%rsp), %rsi
.Ltmp79:
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp80:
# %bb.83:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_311
# %bb.84:                               # %_Z9gpuAssert10hipError_tPKcib.exit284
	movq	248(%rsp), %rdi
	movq	192(%rsp), %rsi
.Ltmp83:
	movq	24(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp84:
# %bb.85:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_313
# %bb.86:                               # %_Z9gpuAssert10hipError_tPKcib.exit287
	movq	240(%rsp), %rdi
	movq	160(%rsp), %rsi
.Ltmp87:
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp88:
# %bb.87:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_315
# %bb.88:                               # %_Z9gpuAssert10hipError_tPKcib.exit290
	movq	232(%rsp), %rdi
	movq	256(%rsp), %rsi
.Ltmp91:
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp92:
# %bb.89:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_317
# %bb.90:                               # %_Z9gpuAssert10hipError_tPKcib.exit293
	movq	128(%rsp), %rdi
	movq	136(%rsp), %rsi
.Ltmp95:
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp96:
# %bb.91:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_319
# %bb.92:                               # %_Z9gpuAssert10hipError_tPKcib.exit296
.Ltmp99:
	callq	hipDeviceSynchronize
.Ltmp100:
# %bb.93:                               # %.thread
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 360(%rsp)                 # 8-byte Spill
	movl	%r15d, %eax
	cltd
	idivl	48(%rsp)                        # 4-byte Folded Reload
                                        # kill: def $eax killed $eax def $rax
	movq	%r15, %rsi
	leal	1(%rax), %r15d
	movl	$65535, %ecx                    # imm = 0xFFFF
	cmpl	%ecx, %eax
	movabsq	$8589934592, %r14               # imm = 0x200000000
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	cmovlq	%rdi, %r14
	cmovgel	%ecx, %r15d
	testl	%edx, %edx
	cmoveq	%rdi, %r14
	cmovel	%eax, %r15d
	imull	%esi, %r13d
	leal	(%r13,%r13,8), %eax
	movslq	%eax, %rsi
.Ltmp102:
	movl	$2, %edi
	callq	hipDeviceSetLimit
.Ltmp103:
# %bb.94:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_321
# %bb.95:                               # %_Z9gpuAssert10hipError_tPKcib.exit299
.Ltmp106:
	callq	hipDeviceSynchronize
.Ltmp107:
# %bb.96:
	movl	48(%rsp), %r12d                 # 4-byte Reload
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r12
	orq	%r15, %r14
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 344(%rsp)                 # 8-byte Spill
.Ltmp109:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp110:
	movq	32(%rsp), %r15                  # 8-byte Reload
# %bb.97:
	testl	%eax, %eax
	jne	.LBB1_99
# %bb.98:
	movq	56(%rsp), %rdi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	sarq	$32, %rsi
	movq	248(%rsp), %rdx
	movq	240(%rsp), %r8
	movq	232(%rsp), %r9
	movq	128(%rsp), %rax
.Ltmp111:
	movq	%rax, (%rsp)
	movq	8(%rsp), %rcx                   # 8-byte Reload
	callq	_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT
.Ltmp112:
.LBB1_99:
.Ltmp113:
	callq	hipGetLastError
.Ltmp114:
# %bb.100:
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.LBB1_323
# %bb.101:                              # %_Z9gpuAssert10hipError_tPKcib.exit302
.Ltmp117:
	callq	hipDeviceSynchronize
.Ltmp118:
# %bb.102:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 296(%rsp)                 # 8-byte Spill
	movq	136(%rsp), %rdi
	movq	128(%rsp), %rsi
.Ltmp120:
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp121:
# %bb.103:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_326
# %bb.104:                              # %_Z9gpuAssert10hipError_tPKcib.exit305
.Ltmp124:
	callq	hipDeviceSynchronize
.Ltmp125:
# %bb.105:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	56(%rsp), %rdi
.Ltmp127:
	callq	hipFree
.Ltmp128:
# %bb.106:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_328
# %bb.107:                              # %_Z9gpuAssert10hipError_tPKcib.exit308
	movq	248(%rsp), %rdi
.Ltmp131:
	callq	hipFree
.Ltmp132:
# %bb.108:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_330
# %bb.109:                              # %_Z9gpuAssert10hipError_tPKcib.exit311
	movq	240(%rsp), %rdi
.Ltmp135:
	callq	hipFree
.Ltmp136:
# %bb.110:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_332
# %bb.111:                              # %_Z9gpuAssert10hipError_tPKcib.exit314
	movq	232(%rsp), %rdi
.Ltmp139:
	callq	hipFree
.Ltmp140:
# %bb.112:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_334
# %bb.113:                              # %_Z9gpuAssert10hipError_tPKcib.exit317
	movq	128(%rsp), %rdi
.Ltmp143:
	callq	hipFree
.Ltmp144:
# %bb.114:
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_336
# %bb.115:                              # %_Z9gpuAssert10hipError_tPKcib.exit320
.Ltmp147:
	callq	hipDeviceSynchronize
.Ltmp148:
# %bb.116:
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 336(%rsp)                 # 8-byte Spill
	testl	%r15d, %r15d
	je	.LBB1_119
# %bb.117:                              # %.lr.ph794
	movq	136(%rsp), %rdx
	addq	$96, %rdx
	xorl	%r12d, %r12d
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
	xorl	%edi, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	xorl	%eax, %eax
.LBB1_118:                              # =>This Inner Loop Header: Depth=1
	addq	-96(%rdx), %rax
	addq	-88(%rdx), %r8
	addq	-80(%rdx), %r9
	addq	-72(%rdx), %rdi
	addq	-64(%rdx), %rbp
	addq	-56(%rdx), %r13
	addq	-48(%rdx), %r14
	addq	-40(%rdx), %rbx
	addq	-32(%rdx), %rsi
	addq	-24(%rdx), %rcx
	addq	-16(%rdx), %r11
	addq	-8(%rdx), %r10
	addq	(%rdx), %r12
	addq	$104, %rdx
	decq	%r15
	jne	.LBB1_118
	jmp	.LBB1_120
.LBB1_119:
	xorl	%eax, %eax
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	xorl	%edi, %edi
	xorl	%ebp, %ebp
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	xorl	%ecx, %ecx
	xorl	%r11d, %r11d
	xorl	%r10d, %r10d
	xorl	%r12d, %r12d
.LBB1_120:                              # %._crit_edge795
	movq	%r11, 48(%rsp)                  # 8-byte Spill
	movq	%r10, 384(%rsp)                 # 8-byte Spill
	movq	%r9, 312(%rsp)                  # 8-byte Spill
	movq	%r8, 368(%rsp)                  # 8-byte Spill
	movabsq	$-6148914691236517205, %r8      # imm = 0xAAAAAAAAAAAAAAAB
	mulq	%r8
	movq	%rdx, 376(%rsp)                 # 8-byte Spill
	movq	%rdi, %rax
	mulq	%r8
	shrq	$2, %rdx
	movq	%rdx, 120(%rsp)                 # 8-byte Spill
	leaq	(%rdx,%rdx), %rax
	leaq	(%rax,%rax,2), %rax
	movq	%rax, 224(%rsp)                 # 8-byte Spill
	subq	%rax, %r13
	leaq	(,%r13,4), %rax
	subq	%rax, %rbx
	movq	%rbx, %rdi
	shrq	%rdi
	subq	%rdi, %rsi
	movq	%rsi, %rax
	mulq	%r8
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, 328(%rsp)                 # 8-byte Spill
	subq	%rdi, %rcx
	movq	%rcx, %rax
	mulq	%r8
	movq	%rdx, 8(%rsp)                   # 8-byte Spill
	callq	_ZNSt6chrono3_V212steady_clock3nowEv
	movq	%rax, 288(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rdi
.Ltmp150:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp151:
# %bb.121:                              # %.noexc544
.Ltmp152:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp153:
# %bb.122:                              # %.noexc545
.Ltmp154:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp155:
# %bb.123:                              # %_ZNSolsEPFRSoS_E.exit322
.Ltmp156:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp157:
# %bb.124:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit324
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp158:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp159:
# %bb.125:                              # %.noexc548
.Ltmp160:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp161:
# %bb.126:                              # %.noexc549
.Ltmp162:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp163:
# %bb.127:                              # %_ZNSolsEPFRSoS_E.exit326
.Ltmp164:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp165:
# %bb.128:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit328
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp166:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp167:
# %bb.129:                              # %.noexc552
.Ltmp168:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp169:
# %bb.130:                              # %.noexc553
.Ltmp170:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp171:
# %bb.131:                              # %_ZNSolsEPFRSoS_E.exit330
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp172:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp173:
# %bb.132:                              # %.noexc556
.Ltmp174:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp175:
# %bb.133:                              # %.noexc557
.Ltmp176:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp177:
# %bb.134:                              # %_ZNSolsEPFRSoS_E.exit332
.Ltmp178:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp179:
# %bb.135:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit334
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp180:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp181:
# %bb.136:                              # %.noexc560
.Ltmp182:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp183:
# %bb.137:                              # %.noexc561
.Ltmp184:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp185:
# %bb.138:                              # %_ZNSolsEPFRSoS_E.exit336
.Ltmp186:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp187:
# %bb.139:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit338
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp188:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp189:
# %bb.140:                              # %.noexc564
.Ltmp190:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp191:
# %bb.141:                              # %.noexc565
.Ltmp192:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp193:
# %bb.142:                              # %_ZNSolsEPFRSoS_E.exit340
.Ltmp194:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp195:
# %bb.143:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit342
.Ltmp196:
	movl	$_ZSt4cout, %edi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp197:
# %bb.144:                              # %_ZNSolsEy.exit
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp198:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp199:
# %bb.145:                              # %.noexc568
.Ltmp200:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp201:
# %bb.146:                              # %.noexc569
.Ltmp202:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp203:
# %bb.147:                              # %_ZNSolsEPFRSoS_E.exit345
.Ltmp204:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp205:
# %bb.148:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit347
.Ltmp206:
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp207:
# %bb.149:                              # %_ZNSolsEy.exit349
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp208:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp209:
# %bb.150:                              # %.noexc572
.Ltmp210:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp211:
# %bb.151:                              # %.noexc573
.Ltmp212:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp213:
# %bb.152:                              # %_ZNSolsEPFRSoS_E.exit351
.Ltmp214:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.12, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp215:
# %bb.153:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit353
.Ltmp216:
	movl	$_ZSt4cout, %edi
	movq	328(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp217:
# %bb.154:                              # %_ZNSolsEy.exit355
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp218:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp219:
# %bb.155:                              # %.noexc576
.Ltmp220:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp221:
# %bb.156:                              # %.noexc577
.Ltmp222:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp223:
# %bb.157:                              # %_ZNSolsEPFRSoS_E.exit357
.Ltmp224:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp225:
# %bb.158:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit359
.Ltmp226:
	movq	%rbp, %rsi
	shrq	$2, %rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, 352(%rsp)                 # 8-byte Spill
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp227:
# %bb.159:                              # %_ZNSolsEy.exit361
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp228:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp229:
# %bb.160:                              # %.noexc580
.Ltmp230:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp231:
# %bb.161:                              # %.noexc581
.Ltmp232:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp233:
# %bb.162:                              # %_ZNSolsEPFRSoS_E.exit363
.Ltmp234:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.14, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp235:
# %bb.163:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit365
.Ltmp236:
	movq	32(%rsp), %rsi                  # 8-byte Reload
	shrq	%rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp237:
# %bb.164:                              # %_ZNSolsEy.exit367
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp238:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp239:
# %bb.165:                              # %.noexc584
.Ltmp240:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp241:
# %bb.166:                              # %.noexc585
.Ltmp242:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp243:
# %bb.167:                              # %_ZNSolsEPFRSoS_E.exit369
.Ltmp244:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.15, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp245:
# %bb.168:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit371
.Ltmp246:
	andq	$-4, %rbp
	subq	%rbp, %r14
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp247:
# %bb.169:                              # %_ZNSolsEy.exit373
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp248:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp249:
# %bb.170:                              # %.noexc588
.Ltmp250:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp251:
# %bb.171:                              # %.noexc589
.Ltmp252:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp253:
# %bb.172:                              # %_ZNSolsEPFRSoS_E.exit375
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp254:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp255:
# %bb.173:                              # %.noexc592
.Ltmp256:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp257:
# %bb.174:                              # %.noexc593
.Ltmp258:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp259:
# %bb.175:                              # %_ZNSolsEPFRSoS_E.exit377
.Ltmp260:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.16, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp261:
# %bb.176:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit379
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp262:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp263:
# %bb.177:                              # %.noexc596
.Ltmp264:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp265:
# %bb.178:                              # %.noexc597
.Ltmp266:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp267:
# %bb.179:                              # %_ZNSolsEPFRSoS_E.exit381
.Ltmp268:
	movl	$_ZSt4cout, %r15d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp269:
# %bb.180:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit383
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %r15
.Ltmp270:
	movq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp271:
# %bb.181:                              # %.noexc600
.Ltmp272:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp273:
# %bb.182:                              # %.noexc601
.Ltmp274:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp275:
# %bb.183:                              # %_ZNSolsEPFRSoS_E.exit385
.Ltmp276:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.17, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp277:
# %bb.184:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit387
.Ltmp278:
	movq	8(%rsp), %rsi                   # 8-byte Reload
	shrq	%rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp279:
# %bb.185:                              # %_ZNSolsEy.exit389
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp280:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp281:
# %bb.186:                              # %.noexc604
.Ltmp282:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp283:
# %bb.187:                              # %.noexc605
.Ltmp284:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp285:
# %bb.188:                              # %_ZNSolsEPFRSoS_E.exit391
.Ltmp286:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.18, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp287:
# %bb.189:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit393
.Ltmp288:
	movq	48(%rsp), %rsi                  # 8-byte Reload
	subq	%r14, %rsi
	subq	%r14, %rsi
	shrq	%rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp289:
# %bb.190:                              # %_ZNSolsEy.exit395
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp290:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp291:
# %bb.191:                              # %.noexc608
.Ltmp292:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp293:
# %bb.192:                              # %.noexc609
.Ltmp294:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp295:
# %bb.193:                              # %_ZNSolsEPFRSoS_E.exit397
.Ltmp296:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.19, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp297:
# %bb.194:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit399
.Ltmp298:
	andq	$-2, %rbx
	addq	224(%rsp), %rbp                 # 8-byte Folded Reload
	leaq	(,%r13,4), %rax
	addq	%rbp, %rax
	leaq	(%rax,%r14,2), %rax
	addq	%rbx, %rax
	subq	%rax, %r12
	movq	%r12, %rsi
	shrq	%rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, 224(%rsp)                 # 8-byte Spill
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp299:
# %bb.195:                              # %_ZNSolsEy.exit401
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp300:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp301:
# %bb.196:                              # %.noexc612
.Ltmp302:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp303:
# %bb.197:                              # %.noexc613
.Ltmp304:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp305:
# %bb.198:                              # %_ZNSolsEPFRSoS_E.exit403
.Ltmp306:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.20, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp307:
# %bb.199:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit405
.Ltmp308:
	andq	$-2, %r12
	movq	384(%rsp), %rsi                 # 8-byte Reload
	subq	%r12, %rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, %rbx
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp309:
# %bb.200:                              # %_ZNSolsEy.exit407
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp310:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp311:
# %bb.201:                              # %.noexc616
.Ltmp312:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp313:
# %bb.202:                              # %.noexc617
.Ltmp314:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp315:
# %bb.203:                              # %_ZNSolsEPFRSoS_E.exit409
.Ltmp316:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.21, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp317:
# %bb.204:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit411
.Ltmp318:
	movq	392(%rsp), %rcx                 # 8-byte Reload
	leal	-1(%rcx), %eax
	imull	%ecx, %eax
	leal	-2(%rcx), %ebp
	imull	%eax, %ebp
	leal	-3(%rcx), %eax
	imull	%ebp, %eax
	cltq
	imulq	$715827883, %rax, %rax          # imm = 0x2AAAAAAB
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	movslq	%eax, %rsi
	movq	120(%rsp), %rax                 # 8-byte Reload
	addq	352(%rsp), %rax                 # 8-byte Folded Reload
	addq	%r14, %rax
	addq	%r13, %rax
	addq	328(%rsp), %rax                 # 8-byte Folded Reload
	addq	32(%rsp), %rax                  # 8-byte Folded Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
	addq	48(%rsp), %rcx                  # 8-byte Folded Reload
	addq	%rax, %rcx
	movq	224(%rsp), %rax                 # 8-byte Reload
	addq	%rbx, %rax
	addq	%rcx, %rax
	subq	%rax, %rsi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp319:
# %bb.205:                              # %_ZNSolsEy.exit413
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp320:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp321:
# %bb.206:                              # %.noexc620
.Ltmp322:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp323:
# %bb.207:                              # %.noexc621
.Ltmp324:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp325:
# %bb.208:                              # %_ZNSolsEPFRSoS_E.exit415
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp326:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp327:
# %bb.209:                              # %.noexc624
.Ltmp328:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp329:
# %bb.210:                              # %.noexc625
.Ltmp330:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp331:
# %bb.211:                              # %_ZNSolsEPFRSoS_E.exit417
.Ltmp332:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.22, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp333:
# %bb.212:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit419
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp334:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp335:
# %bb.213:                              # %.noexc628
.Ltmp336:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp337:
# %bb.214:                              # %.noexc629
.Ltmp338:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp339:
# %bb.215:                              # %_ZNSolsEPFRSoS_E.exit421
.Ltmp340:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp341:
# %bb.216:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit423
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp342:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp343:
# %bb.217:                              # %.noexc632
.Ltmp344:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp345:
# %bb.218:                              # %.noexc633
.Ltmp346:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp347:
# %bb.219:                              # %_ZNSolsEPFRSoS_E.exit425
.Ltmp348:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.23, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp349:
# %bb.220:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit427
.Ltmp350:
	movq	376(%rsp), %rsi                 # 8-byte Reload
	shrq	%rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, %r15
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp351:
# %bb.221:                              # %_ZNSolsEy.exit429
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp352:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp353:
# %bb.222:                              # %.noexc636
.Ltmp354:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp355:
# %bb.223:                              # %.noexc637
.Ltmp356:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp357:
# %bb.224:                              # %_ZNSolsEPFRSoS_E.exit431
.Ltmp358:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.24, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp359:
# %bb.225:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit433
.Ltmp360:
	movq	368(%rsp), %rsi                 # 8-byte Reload
	shrq	%rsi
	movl	$_ZSt4cout, %edi
	movq	%rsi, %r14
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp361:
# %bb.226:                              # %_ZNSolsEy.exit435
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp362:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp363:
# %bb.227:                              # %.noexc640
.Ltmp364:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp365:
# %bb.228:                              # %.noexc641
.Ltmp366:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp367:
# %bb.229:                              # %_ZNSolsEPFRSoS_E.exit437
.Ltmp368:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.25, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp369:
# %bb.230:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit439
.Ltmp370:
	movl	$_ZSt4cout, %edi
	movq	312(%rsp), %rsi                 # 8-byte Reload
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp371:
# %bb.231:                              # %_ZNSolsEy.exit441
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp372:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp373:
# %bb.232:                              # %.noexc644
.Ltmp374:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp375:
# %bb.233:                              # %.noexc645
.Ltmp376:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp377:
# %bb.234:                              # %_ZNSolsEPFRSoS_E.exit443
.Ltmp378:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.26, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp379:
# %bb.235:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit445
.Ltmp380:
	movslq	%ebp, %rax
	imulq	$715827883, %rax, %rax          # imm = 0x2AAAAAAB
	movq	%rax, %rcx
	shrq	$63, %rcx
	shrq	$32, %rax
	addl	%ecx, %eax
	movslq	%eax, %rsi
	addq	312(%rsp), %r14                 # 8-byte Folded Reload
	addq	%r14, %r15
	subq	%r15, %rsi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIyEERSoT_
.Ltmp381:
# %bb.236:                              # %_ZNSolsEy.exit447
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp382:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp383:
# %bb.237:                              # %.noexc648
.Ltmp384:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp385:
# %bb.238:                              # %.noexc649
.Ltmp386:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp387:
# %bb.239:                              # %_ZNSolsEPFRSoS_E.exit449
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp388:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp389:
# %bb.240:                              # %.noexc652
.Ltmp390:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp391:
# %bb.241:                              # %.noexc653
.Ltmp392:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp393:
# %bb.242:                              # %_ZNSolsEPFRSoS_E.exit451
.Ltmp394:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.27, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp395:
# %bb.243:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit453
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp396:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp397:
# %bb.244:                              # %.noexc656
.Ltmp398:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp399:
# %bb.245:                              # %.noexc657
.Ltmp400:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp401:
# %bb.246:                              # %_ZNSolsEPFRSoS_E.exit455
.Ltmp402:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.28, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp403:
# %bb.247:                              # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit457
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp404:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp405:
# %bb.248:                              # %.noexc660
.Ltmp406:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp407:
# %bb.249:                              # %.noexc661
.Ltmp408:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp409:
# %bb.250:                              # %_ZNSolsEPFRSoS_E.exit459
.Ltmp410:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.29, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp411:
# %bb.251:
	movq	288(%rsp), %rax                 # 8-byte Reload
	subq	320(%rsp), %rax                 # 8-byte Folded Reload
	movabsq	$2361183241434822607, %r14      # imm = 0x20C49BA5E353F7CF
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp412:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp413:
# %bb.252:                              # %_ZNSolsEl.exit
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp414:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp415:
# %bb.253:                              # %.noexc664
.Ltmp416:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp417:
# %bb.254:                              # %.noexc665
.Ltmp418:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp419:
# %bb.255:                              # %_ZNSolsEPFRSoS_E.exit464
.Ltmp421:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.30, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp422:
# %bb.256:
	movq	304(%rsp), %rax                 # 8-byte Reload
	subq	320(%rsp), %rax                 # 8-byte Folded Reload
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp423:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp424:
# %bb.257:                              # %_ZNSolsEl.exit470
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp425:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp426:
# %bb.258:                              # %.noexc668
.Ltmp427:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp428:
# %bb.259:                              # %.noexc669
.Ltmp429:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp430:
# %bb.260:                              # %_ZNSolsEPFRSoS_E.exit472
.Ltmp432:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.31, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp433:
# %bb.261:
	movq	360(%rsp), %rax                 # 8-byte Reload
	subq	304(%rsp), %rax                 # 8-byte Folded Reload
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp434:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp435:
# %bb.262:                              # %_ZNSolsEl.exit478
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp436:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp437:
# %bb.263:                              # %.noexc672
.Ltmp438:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp439:
# %bb.264:                              # %.noexc673
.Ltmp440:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp441:
# %bb.265:                              # %_ZNSolsEPFRSoS_E.exit480
.Ltmp443:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.32, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp444:
# %bb.266:
	movq	296(%rsp), %rax                 # 8-byte Reload
	subq	344(%rsp), %rax                 # 8-byte Folded Reload
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp445:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp446:
# %bb.267:                              # %_ZNSolsEl.exit486
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp447:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp448:
# %bb.268:                              # %.noexc676
.Ltmp449:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp450:
# %bb.269:                              # %.noexc677
.Ltmp451:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp452:
# %bb.270:                              # %_ZNSolsEPFRSoS_E.exit488
.Ltmp454:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.33, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp455:
# %bb.271:
	movq	24(%rsp), %rax                  # 8-byte Reload
	subq	296(%rsp), %rax                 # 8-byte Folded Reload
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp456:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp457:
# %bb.272:                              # %_ZNSolsEl.exit494
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp458:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp459:
# %bb.273:                              # %.noexc680
.Ltmp460:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp461:
# %bb.274:                              # %.noexc681
.Ltmp462:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp463:
# %bb.275:                              # %_ZNSolsEPFRSoS_E.exit496
.Ltmp465:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.34, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp466:
# %bb.276:
	movq	336(%rsp), %rax                 # 8-byte Reload
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp467:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp468:
# %bb.277:                              # %_ZNSolsEl.exit502
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp469:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp470:
# %bb.278:                              # %.noexc684
.Ltmp471:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp472:
# %bb.279:                              # %.noexc685
.Ltmp473:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp474:
# %bb.280:                              # %_ZNSolsEPFRSoS_E.exit504
.Ltmp476:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.35, %esi
	movl	$21, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp477:
# %bb.281:
	movq	288(%rsp), %rax                 # 8-byte Reload
	subq	24(%rsp), %rax                  # 8-byte Folded Reload
	imulq	%r14
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$7, %rdx
	addq	%rdx, %rsi
.Ltmp479:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp480:
# %bb.282:                              # %_ZNSolsEl.exit510
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp481:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp482:
# %bb.283:                              # %.noexc688
.Ltmp483:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp484:
# %bb.284:                              # %.noexc689
.Ltmp485:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp486:
# %bb.285:                              # %_ZNSolsEPFRSoS_E.exit512
	movq	136(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_287
# %bb.286:
	callq	_ZdlPv
.LBB1_287:                              # %_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EED2Ev.exit
	movq	256(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_289
# %bb.288:
	callq	_ZdlPv
.LBB1_289:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit515
	movq	160(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_291
# %bb.290:
	callq	_ZdlPv
.LBB1_291:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit517
	movq	192(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_293
# %bb.292:
	callq	_ZdlPv
.LBB1_293:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit519
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_295
# %bb.294:
	callq	_ZdlPv
.LBB1_295:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit521
	movq	400(%rsp), %rdi
	leaq	416(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_297
# %bb.296:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB1_297:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	432(%rsp), %rdi
	leaq	448(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_299
# %bb.298:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i522
	callq	_ZdlPv
.LBB1_299:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit524
	leaq	464(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	leaq	96(%rsp), %rdi
	callq	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	xorl	%eax, %eax
.LBB1_300:
	addq	$984, %rsp                      # imm = 0x3D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_301:
	.cfi_def_cfa_offset 1040
	movq	stderr(%rip), %r14
.Ltmp58:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp59:
# %bb.302:                              # %.noexc269
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$311, %r8d                      # imm = 0x137
	jmp	.LBB1_338
.LBB1_303:
	movq	stderr(%rip), %r14
.Ltmp62:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp63:
# %bb.304:                              # %.noexc271
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$312, %r8d                      # imm = 0x138
	jmp	.LBB1_338
.LBB1_305:
	movq	stderr(%rip), %r14
.Ltmp66:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp67:
# %bb.306:                              # %.noexc274
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$313, %r8d                      # imm = 0x139
	jmp	.LBB1_338
.LBB1_307:
	movq	stderr(%rip), %r14
.Ltmp70:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp71:
# %bb.308:                              # %.noexc277
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$314, %r8d                      # imm = 0x13A
	jmp	.LBB1_338
.LBB1_309:
	movq	stderr(%rip), %rbx
.Ltmp74:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp75:
# %bb.310:                              # %.noexc280
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$315, %r8d                      # imm = 0x13B
	jmp	.LBB1_325
.LBB1_311:
	movq	stderr(%rip), %rbx
.Ltmp81:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp82:
# %bb.312:                              # %.noexc283
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$321, %r8d                      # imm = 0x141
	jmp	.LBB1_325
.LBB1_313:
	movq	stderr(%rip), %rbx
.Ltmp85:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp86:
# %bb.314:                              # %.noexc286
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$322, %r8d                      # imm = 0x142
	jmp	.LBB1_325
.LBB1_315:
	movq	stderr(%rip), %rbx
.Ltmp89:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp90:
# %bb.316:                              # %.noexc289
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$323, %r8d                      # imm = 0x143
	jmp	.LBB1_325
.LBB1_317:
	movq	stderr(%rip), %rbx
.Ltmp93:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp94:
# %bb.318:                              # %.noexc292
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$324, %r8d                      # imm = 0x144
	jmp	.LBB1_325
.LBB1_319:
	movq	stderr(%rip), %rbx
.Ltmp97:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp98:
# %bb.320:                              # %.noexc295
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$325, %r8d                      # imm = 0x145
	jmp	.LBB1_325
.LBB1_321:
	movq	stderr(%rip), %rbx
.Ltmp104:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp105:
# %bb.322:                              # %.noexc298
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$351, %r8d                      # imm = 0x15F
	jmp	.LBB1_325
.LBB1_323:
	movq	stderr(%rip), %rbx
.Ltmp115:
	movl	%ebp, %edi
	callq	hipGetErrorString
.Ltmp116:
# %bb.324:                              # %.noexc301
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$359, %r8d                      # imm = 0x167
.LBB1_325:                              # %.noexc280
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB1_326:
	movq	stderr(%rip), %r14
.Ltmp122:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp123:
# %bb.327:                              # %.noexc304
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$365, %r8d                      # imm = 0x16D
	jmp	.LBB1_338
.LBB1_328:
	movq	stderr(%rip), %r14
.Ltmp129:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp130:
# %bb.329:                              # %.noexc307
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$371, %r8d                      # imm = 0x173
	jmp	.LBB1_338
.LBB1_330:
	movq	stderr(%rip), %r14
.Ltmp133:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp134:
# %bb.331:                              # %.noexc310
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$372, %r8d                      # imm = 0x174
	jmp	.LBB1_338
.LBB1_332:
	movq	stderr(%rip), %r14
.Ltmp137:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp138:
# %bb.333:                              # %.noexc313
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$373, %r8d                      # imm = 0x175
	jmp	.LBB1_338
.LBB1_334:
	movq	stderr(%rip), %r14
.Ltmp141:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp142:
# %bb.335:                              # %.noexc316
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$374, %r8d                      # imm = 0x176
	jmp	.LBB1_338
.LBB1_336:
	movq	stderr(%rip), %r14
.Ltmp145:
	movl	%ebx, %edi
	callq	hipGetErrorString
.Ltmp146:
# %bb.337:                              # %.noexc319
	movl	$.L.str.36, %esi
	movl	$.L.str.5, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$375, %r8d                      # imm = 0x177
.LBB1_338:                              # %.noexc269
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB1_339:
.Ltmp49:
	jmp	.LBB1_368
.LBB1_340:
.Ltmp55:
	jmp	.LBB1_364
.LBB1_341:
.Ltmp52:
	jmp	.LBB1_368
.LBB1_342:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB1_382
.LBB1_343:
.Ltmp126:
	jmp	.LBB1_364
.LBB1_344:
.Ltmp108:
	jmp	.LBB1_364
.LBB1_345:
.Ltmp119:
	jmp	.LBB1_364
.LBB1_346:
.Ltmp487:
	jmp	.LBB1_364
.LBB1_347:
.Ltmp475:
	jmp	.LBB1_364
.LBB1_348:
.Ltmp464:
	jmp	.LBB1_364
.LBB1_349:
.Ltmp453:
	jmp	.LBB1_364
.LBB1_350:
.Ltmp442:
	jmp	.LBB1_364
.LBB1_351:
.Ltmp431:
	jmp	.LBB1_364
.LBB1_352:
.Ltmp420:
	jmp	.LBB1_364
.LBB1_353:
.Ltmp35:
	jmp	.LBB1_368
.LBB1_354:
.Ltmp38:
	jmp	.LBB1_368
.LBB1_355:
.Ltmp26:
	jmp	.LBB1_361
.LBB1_356:
.Ltmp149:
	jmp	.LBB1_364
.LBB1_357:
.Ltmp101:
	jmp	.LBB1_364
.LBB1_358:
.Ltmp78:
	jmp	.LBB1_364
.LBB1_359:
.Ltmp495:
	jmp	.LBB1_361
.LBB1_360:
.Ltmp9:
.LBB1_361:
	movq	%rax, %rbx
	jmp	.LBB1_377
.LBB1_362:
.Ltmp46:
	jmp	.LBB1_368
.LBB1_363:
.Ltmp478:
.LBB1_364:
	movq	%rax, %rbx
	movq	136(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_369
# %bb.365:
	callq	_ZdlPv
	jmp	.LBB1_369
.LBB1_366:
.Ltmp490:
	movq	%rax, %rbx
	jmp	.LBB1_375
.LBB1_367:
.Ltmp43:
.LBB1_368:
	movq	%rax, %rbx
.LBB1_369:
	movq	256(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_371
# %bb.370:
	callq	_ZdlPv
.LBB1_371:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit528
	movq	160(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_373
# %bb.372:
	callq	_ZdlPv
.LBB1_373:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit530
	movq	192(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_375
# %bb.374:
	callq	_ZdlPv
.LBB1_375:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit532
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB1_377
# %bb.376:
	callq	_ZdlPv
.LBB1_377:
	movq	400(%rsp), %rdi
	leaq	416(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_379
# %bb.378:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i535
	callq	_ZdlPv
.LBB1_379:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit537
	movq	432(%rsp), %rdi
	leaq	448(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_381
# %bb.380:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i538
	callq	_ZdlPv
.LBB1_381:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit540
	leaq	464(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
.LBB1_382:
	leaq	96(%rsp), %rdi
	callq	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp8-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp8
	.uleb128 .Ltmp9-.Lfunc_begin0           #     jumps to .Ltmp9
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp488-.Lfunc_begin0         # >> Call Site 3 <<
	.uleb128 .Ltmp489-.Ltmp488              #   Call between .Ltmp488 and .Ltmp489
	.uleb128 .Ltmp490-.Lfunc_begin0         #     jumps to .Ltmp490
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp491-.Lfunc_begin0         # >> Call Site 4 <<
	.uleb128 .Ltmp494-.Ltmp491              #   Call between .Ltmp491 and .Ltmp494
	.uleb128 .Ltmp495-.Lfunc_begin0         #     jumps to .Ltmp495
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp494-.Lfunc_begin0         # >> Call Site 5 <<
	.uleb128 .Ltmp10-.Ltmp494               #   Call between .Ltmp494 and .Ltmp10
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp10-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp25-.Ltmp10                #   Call between .Ltmp10 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin0          #     jumps to .Ltmp26
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp34-.Ltmp27                #   Call between .Ltmp27 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin0          #     jumps to .Ltmp35
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin0          #     jumps to .Ltmp38
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp42-.Ltmp39                #   Call between .Ltmp39 and .Ltmp42
	.uleb128 .Ltmp43-.Lfunc_begin0          #     jumps to .Ltmp43
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp44-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp45-.Ltmp44                #   Call between .Ltmp44 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp45-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp47-.Ltmp45                #   Call between .Ltmp45 and .Ltmp47
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp48-.Ltmp47                #   Call between .Ltmp47 and .Ltmp48
	.uleb128 .Ltmp49-.Lfunc_begin0          #     jumps to .Ltmp49
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp51-.Ltmp50                #   Call between .Ltmp50 and .Ltmp51
	.uleb128 .Ltmp52-.Lfunc_begin0          #     jumps to .Ltmp52
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp53-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp54-.Ltmp53                #   Call between .Ltmp53 and .Ltmp54
	.uleb128 .Ltmp55-.Lfunc_begin0          #     jumps to .Ltmp55
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp77-.Ltmp56                #   Call between .Ltmp56 and .Ltmp77
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp79-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp100-.Ltmp79               #   Call between .Ltmp79 and .Ltmp100
	.uleb128 .Ltmp101-.Lfunc_begin0         #     jumps to .Ltmp101
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp102-.Lfunc_begin0         # >> Call Site 17 <<
	.uleb128 .Ltmp107-.Ltmp102              #   Call between .Ltmp102 and .Ltmp107
	.uleb128 .Ltmp108-.Lfunc_begin0         #     jumps to .Ltmp108
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp109-.Lfunc_begin0         # >> Call Site 18 <<
	.uleb128 .Ltmp118-.Ltmp109              #   Call between .Ltmp109 and .Ltmp118
	.uleb128 .Ltmp119-.Lfunc_begin0         #     jumps to .Ltmp119
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp120-.Lfunc_begin0         # >> Call Site 19 <<
	.uleb128 .Ltmp125-.Ltmp120              #   Call between .Ltmp120 and .Ltmp125
	.uleb128 .Ltmp126-.Lfunc_begin0         #     jumps to .Ltmp126
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp127-.Lfunc_begin0         # >> Call Site 20 <<
	.uleb128 .Ltmp148-.Ltmp127              #   Call between .Ltmp127 and .Ltmp148
	.uleb128 .Ltmp149-.Lfunc_begin0         #     jumps to .Ltmp149
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp150-.Lfunc_begin0         # >> Call Site 21 <<
	.uleb128 .Ltmp411-.Ltmp150              #   Call between .Ltmp150 and .Ltmp411
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp412-.Lfunc_begin0         # >> Call Site 22 <<
	.uleb128 .Ltmp419-.Ltmp412              #   Call between .Ltmp412 and .Ltmp419
	.uleb128 .Ltmp420-.Lfunc_begin0         #     jumps to .Ltmp420
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp421-.Lfunc_begin0         # >> Call Site 23 <<
	.uleb128 .Ltmp422-.Ltmp421              #   Call between .Ltmp421 and .Ltmp422
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp423-.Lfunc_begin0         # >> Call Site 24 <<
	.uleb128 .Ltmp430-.Ltmp423              #   Call between .Ltmp423 and .Ltmp430
	.uleb128 .Ltmp431-.Lfunc_begin0         #     jumps to .Ltmp431
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp432-.Lfunc_begin0         # >> Call Site 25 <<
	.uleb128 .Ltmp433-.Ltmp432              #   Call between .Ltmp432 and .Ltmp433
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp434-.Lfunc_begin0         # >> Call Site 26 <<
	.uleb128 .Ltmp441-.Ltmp434              #   Call between .Ltmp434 and .Ltmp441
	.uleb128 .Ltmp442-.Lfunc_begin0         #     jumps to .Ltmp442
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp443-.Lfunc_begin0         # >> Call Site 27 <<
	.uleb128 .Ltmp444-.Ltmp443              #   Call between .Ltmp443 and .Ltmp444
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp445-.Lfunc_begin0         # >> Call Site 28 <<
	.uleb128 .Ltmp452-.Ltmp445              #   Call between .Ltmp445 and .Ltmp452
	.uleb128 .Ltmp453-.Lfunc_begin0         #     jumps to .Ltmp453
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp454-.Lfunc_begin0         # >> Call Site 29 <<
	.uleb128 .Ltmp455-.Ltmp454              #   Call between .Ltmp454 and .Ltmp455
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp456-.Lfunc_begin0         # >> Call Site 30 <<
	.uleb128 .Ltmp463-.Ltmp456              #   Call between .Ltmp456 and .Ltmp463
	.uleb128 .Ltmp464-.Lfunc_begin0         #     jumps to .Ltmp464
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp465-.Lfunc_begin0         # >> Call Site 31 <<
	.uleb128 .Ltmp466-.Ltmp465              #   Call between .Ltmp465 and .Ltmp466
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp467-.Lfunc_begin0         # >> Call Site 32 <<
	.uleb128 .Ltmp474-.Ltmp467              #   Call between .Ltmp467 and .Ltmp474
	.uleb128 .Ltmp475-.Lfunc_begin0         #     jumps to .Ltmp475
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp476-.Lfunc_begin0         # >> Call Site 33 <<
	.uleb128 .Ltmp477-.Ltmp476              #   Call between .Ltmp476 and .Ltmp477
	.uleb128 .Ltmp478-.Lfunc_begin0         #     jumps to .Ltmp478
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp479-.Lfunc_begin0         # >> Call Site 34 <<
	.uleb128 .Ltmp486-.Ltmp479              #   Call between .Ltmp479 and .Ltmp486
	.uleb128 .Ltmp487-.Lfunc_begin0         #     jumps to .Ltmp487
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin0          # >> Call Site 35 <<
	.uleb128 .Ltmp75-.Ltmp58                #   Call between .Ltmp58 and .Ltmp75
	.uleb128 .Ltmp78-.Lfunc_begin0          #     jumps to .Ltmp78
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp81-.Lfunc_begin0          # >> Call Site 36 <<
	.uleb128 .Ltmp98-.Ltmp81                #   Call between .Ltmp81 and .Ltmp98
	.uleb128 .Ltmp101-.Lfunc_begin0         #     jumps to .Ltmp101
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp104-.Lfunc_begin0         # >> Call Site 37 <<
	.uleb128 .Ltmp105-.Ltmp104              #   Call between .Ltmp104 and .Ltmp105
	.uleb128 .Ltmp108-.Lfunc_begin0         #     jumps to .Ltmp108
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp115-.Lfunc_begin0         # >> Call Site 38 <<
	.uleb128 .Ltmp116-.Ltmp115              #   Call between .Ltmp115 and .Ltmp116
	.uleb128 .Ltmp119-.Lfunc_begin0         #     jumps to .Ltmp119
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp122-.Lfunc_begin0         # >> Call Site 39 <<
	.uleb128 .Ltmp123-.Ltmp122              #   Call between .Ltmp122 and .Ltmp123
	.uleb128 .Ltmp126-.Lfunc_begin0         #     jumps to .Ltmp126
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp129-.Lfunc_begin0         # >> Call Site 40 <<
	.uleb128 .Ltmp146-.Ltmp129              #   Call between .Ltmp129 and .Ltmp146
	.uleb128 .Ltmp149-.Lfunc_begin0         #     jumps to .Ltmp149
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp146-.Lfunc_begin0         # >> Call Site 41 <<
	.uleb128 .Lfunc_end1-.Ltmp146           #   Call between .Ltmp146 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE7reserveEm,"axG",@progbits,_ZNSt6vectorIiSaIiEE7reserveEm,comdat
	.weak	_ZNSt6vectorIiSaIiEE7reserveEm  # -- Begin function _ZNSt6vectorIiSaIiEE7reserveEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE7reserveEm,@function
_ZNSt6vectorIiSaIiEE7reserveEm:         # @_ZNSt6vectorIiSaIiEE7reserveEm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB2_8
# %bb.1:
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	(%rdi), %r13
	movq	16(%rdi), %rax
	subq	%r13, %rax
	sarq	$2, %rax
	cmpq	%rsi, %rax
	jae	.LBB2_7
# %bb.2:                                # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	8(%rbx), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %r15
	movq	(%rbx), %rsi
	movq	8(%rbx), %rdx
	subq	%rsi, %rdx
	testq	%rdx, %rdx
	jle	.LBB2_4
# %bb.3:
	movq	%r15, %rdi
	callq	memmove@PLT
	movq	(%rbx), %rsi
.LBB2_4:                                # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	subq	%r13, %r12
	testq	%rsi, %rsi
	je	.LBB2_6
# %bb.5:
	movq	%rsi, %rdi
	callq	_ZdlPv
.LBB2_6:                                # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	movq	%r15, (%rbx)
	addq	%r15, %r12
	movq	%r12, 8(%rbx)
	leaq	(%r15,%r14,4), %rax
	movq	%rax, 16(%rbx)
.LBB2_7:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_8:
	.cfi_def_cfa_offset 48
	movl	$.L.str.39, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end2:
	.size	_ZNSt6vectorIiSaIiEE7reserveEm, .Lfunc_end2-_ZNSt6vectorIiSaIiEE7reserveEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_,"axG",@progbits,_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_,comdat
	.weak	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_ # -- Begin function _ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_,@function
_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_: # @_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movabsq	$88686269585142076, %rax        # imm = 0x13B13B13B13B13C
	cmpq	%rax, %rsi
	jae	.LBB3_8
# %bb.1:                                # %_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_S_check_init_lenEmRKS1_.exit
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB3_2
# %bb.3:
	movq	%r14, %rdi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv
	movq	%rax, (%r14)
	leaq	8(%r14), %rdx
	movq	%rax, 8(%r14)
	imulq	$104, %rbx, %r9
	leaq	(%rax,%r9), %r8
	movq	%r8, 16(%r14)
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rax)
	movups	%xmm0, 16(%rax)
	movups	%xmm0, 32(%rax)
	movups	%xmm0, 48(%rax)
	movups	%xmm0, 64(%rax)
	movups	%xmm0, 80(%rax)
	movq	$0, 96(%rax)
	cmpq	$1, %rbx
	jne	.LBB3_5
# %bb.4:
	addq	$104, %rax
	movq	%rax, %r8
	jmp	.LBB3_7
.LBB3_2:                                # %_ZNSt12_Vector_baseI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_.exit.thread
	leaq	8(%r14), %rdx
	movups	%xmm0, (%r14)
	movq	$0, 16(%r14)
	xorl	%r8d, %r8d
	jmp	.LBB3_7
.LBB3_5:                                # %.lr.ph.i.i.i.i.i.i.i.i.preheader
	movl	$104, %r10d
.LBB3_6:                                # %.lr.ph.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rax,%r10), %rdi
	movl	$13, %ecx
	movq	%rax, %rsi
	rep;movsq (%rsi), %es:(%rdi)
	addq	$104, %r10
	cmpq	%r10, %r9
	jne	.LBB3_6
.LBB3_7:                                # %.loopexit
	movq	%r8, (%rdx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB3_8:
	.cfi_def_cfa_offset 32
	movl	$.L.str.37, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end3:
	.size	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_, .Lfunc_end3-_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EEC2EmRKS1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm,"axG",@progbits,_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm,comdat
	.weak	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm # -- Begin function _ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm,@function
_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm: # @_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm
	.cfi_startproc
# %bb.0:
	movq	(%rdi), %rcx
	movq	8(%rdi), %rdx
	movq	%rdx, %rax
	subq	%rcx, %rax
	sarq	$3, %rax
	movabsq	$5675921253449092805, %r8       # imm = 0x4EC4EC4EC4EC4EC5
	imulq	%rax, %r8
	movq	%rsi, %rax
	subq	%r8, %rax
	jbe	.LBB4_1
# %bb.5:
	movq	%rax, %rsi
	jmp	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm # TAILCALL
.LBB4_1:
	jae	.LBB4_4
# %bb.2:
	imulq	$104, %rsi, %rax
	addq	%rax, %rcx
	cmpq	%rcx, %rdx
	je	.LBB4_4
# %bb.3:
	movq	%rcx, 8(%rdi)
.LBB4_4:                                # %_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE15_M_erase_at_endEPS0_.exit
	retq
.Lfunc_end4:
	.size	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm, .Lfunc_end4-_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE6resizeEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev,comdat
	.weak	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev # -- Begin function _ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev,@function
_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev:    # @_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	(%rdi), %rbx
	movq	8(%rdi), %r15
	cmpq	%r15, %rbx
	je	.LBB5_6
# %bb.1:                                # %.lr.ph.i.i.i.preheader
	movq	%rdi, %r14
.LBB5_2:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB5_4
# %bb.3:                                #   in Loop: Header=BB5_2 Depth=1
	callq	_ZdlPv
.LBB5_4:                                # %_ZSt8_DestroyISt6vectorIiSaIiEEEvPT_.exit.i.i.i
                                        #   in Loop: Header=BB5_2 Depth=1
	addq	$24, %rbx
	cmpq	%r15, %rbx
	jne	.LBB5_2
# %bb.5:                                # %_ZSt8_DestroyIPSt6vectorIiSaIiEES2_EvT_S4_RSaIT0_E.exitthread-pre-split
	movq	(%r14), %rbx
.LBB5_6:                                # %_ZSt8_DestroyIPSt6vectorIiSaIiEES2_EvT_S4_RSaIT0_E.exit
	testq	%rbx, %rbx
	je	.LBB5_7
# %bb.8:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.LBB5_7:                                # %_ZNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EED2Ev.exit
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev, .Lfunc_end5-_ZNSt6vectorIS_IiSaIiEESaIS1_EED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB6_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB6_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB6_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB6_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end6:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end6-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,"axG",@progbits,_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,comdat
	.weak	_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_ # -- Begin function _ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,@function
_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_: # @_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB7_2
# %bb.1:
	movq	(%rdx), %rax
	movq	%rax, (%rsi)
	movq	8(%rdx), %rax
	movq	%rax, 8(%rsi)
	movq	16(%rdx), %rax
	movq	%rax, 16(%rsi)
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdx)
	movq	$0, 16(%rdx)
	movq	8(%rbx), %rax
	addq	$24, %rax
	movq	%rax, 8(%rbx)
	jmp	.LBB7_3
.LBB7_2:
	movq	%rbx, %rdi
	callq	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	movq	8(%rbx), %rax
.LBB7_3:
	addq	$-24, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_, .Lfunc_end7-_ZNSt6vectorIS_IiSaIiEESaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.weak	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_ # -- Begin function _ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,@function
_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_: # @_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbp
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.38, %edx
	callq	_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc
	movq	%rax, %rsi
	movq	(%rbx), %rdi
	movq	8(%rbx), %r14
	movq	%r12, %rax
	subq	%rdi, %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %r15     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %r15
	testq	%rsi, %rsi
	movq	%rsi, (%rsp)                    # 8-byte Spill
	je	.LBB8_1
# %bb.2:
	movq	%rdi, %r13
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv
	movq	%r13, %rdi
	movq	%rax, %r13
	jmp	.LBB8_3
.LBB8_1:
	xorl	%r13d, %r13d
.LBB8_3:                                # %_ZNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE11_M_allocateEm.exit
	leaq	(%r15,%r15,2), %rax
	movq	(%rbp), %rcx
	movq	%rcx, (%r13,%rax,8)
	movq	8(%rbp), %rcx
	movq	%rcx, 8(%r13,%rax,8)
	movq	16(%rbp), %rcx
	movq	%rcx, 16(%r13,%rax,8)
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbp)
	movq	$0, 16(%rbp)
	movq	%r13, %rbp
	cmpq	%r12, %rdi
	je	.LBB8_6
# %bb.4:                                # %.lr.ph.i.i.i.preheader
	movq	%r13, %rbp
	movq	%rdi, %rax
.LBB8_5:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rax), %rcx
	movq	%rcx, (%rbp)
	movq	8(%rax), %rcx
	movq	%rcx, 8(%rbp)
	movq	16(%rax), %rcx
	movq	%rcx, 16(%rbp)
	movups	%xmm0, (%rax)
	movq	$0, 16(%rax)
	addq	$24, %rbp
	addq	$24, %rax
	cmpq	%r12, %rax
	jne	.LBB8_5
.LBB8_6:                                # %_ZNSt6vectorIS_IiSaIiEESaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit
	addq	$24, %rbp
	cmpq	%r12, %r14
	je	.LBB8_9
# %bb.7:                                # %.lr.ph.i.i.i17.preheader
	xorps	%xmm0, %xmm0
.LBB8_8:                                # %.lr.ph.i.i.i17
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r12), %rax
	movq	%rax, (%rbp)
	movq	8(%r12), %rax
	movq	%rax, 8(%rbp)
	movq	16(%r12), %rax
	movq	%rax, 16(%rbp)
	movups	%xmm0, (%r12)
	movq	$0, 16(%r12)
	addq	$24, %rbp
	addq	$24, %r12
	cmpq	%r14, %r12
	jne	.LBB8_8
.LBB8_9:                                # %_ZNSt6vectorIS_IiSaIiEESaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit22
	testq	%rdi, %rdi
	je	.LBB8_11
# %bb.10:
	callq	_ZdlPv
.LBB8_11:                               # %_ZNSt12_Vector_baseISt6vectorIiSaIiEESaIS2_EE13_M_deallocateEPS2_m.exit
	movq	%r13, (%rbx)
	movq	%rbp, 8(%rbx)
	movq	(%rsp), %rax                    # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(,%rax,8), %rax
	addq	%r13, %rax
	movq	%rax, 16(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .Lfunc_end8-_ZNSt6vectorIS_IiSaIiEESaIS1_EE17_M_realloc_insertIJS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$384307168202282325, %rcx       # imm = 0x555555555555555
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB9_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB9_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end9:
	.size	_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc, .Lfunc_end9-_ZNKSt6vectorIS_IiSaIiEESaIS1_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv: # @_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB10_1
# %bb.3:
	shlq	$3, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB10_1:
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jb	.LBB10_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB10_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end10:
	.size	_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv, .Lfunc_end10-_ZNSt15__new_allocatorISt6vectorIiSaIiEEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.38, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB11_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB11_3
.LBB11_1:
	xorl	%ebp, %ebp
.LBB11_3:                               # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB11_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB11_5:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB11_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB11_7:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB11_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB11_9:                               # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end11-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB12_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB12_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end12:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .Lfunc_end12-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.38, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB13_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB13_3
.LBB13_1:
	xorl	%ebp, %ebp
.LBB13_3:                               # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB13_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB13_5:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB13_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB13_7:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB13_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB13_9:                               # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end13-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv,@function
_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv: # @_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$88686269585142076, %rax        # imm = 0x13B13B13B13B13C
	cmpq	%rax, %rsi
	jae	.LBB14_1
# %bb.3:
	imulq	$104, %rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB14_1:
	.cfi_def_cfa_offset 16
	movabsq	$177372539170284151, %rax       # imm = 0x276276276276277
	cmpq	%rax, %rsi
	jb	.LBB14_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB14_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end14:
	.size	_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv, .Lfunc_end14-_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm,"axG",@progbits,_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm,comdat
	.weak	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm # -- Begin function _ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm
	.p2align	1, 0x90
	.type	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm,@function
_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm: # @_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm
	.cfi_startproc
# %bb.0:
	testq	%rsi, %rsi
	je	.LBB15_19
# %bb.1:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movq	8(%rdi), %r14
	movabsq	$5675921253449092805, %rax      # imm = 0x4EC4EC4EC4EC4EC5
	movq	16(%rdi), %rcx
	subq	%r14, %rcx
	sarq	$3, %rcx
	imulq	%rax, %rcx
	cmpq	%rsi, %rcx
	jae	.LBB15_2
# %bb.7:
	movq	(%rbx), %r12
	subq	%r12, %r14
	movq	%r14, %r13
	sarq	$3, %r13
	imulq	%rax, %r13
	movl	$.L.str.40, %edx
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc
	testq	%rax, %rax
	movq	%rax, (%rsp)                    # 8-byte Spill
	je	.LBB15_8
# %bb.9:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorI11EDGE_OUTPUTE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB15_10
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 80(%r14)
	movups	%xmm0, 64(%r14)
	movups	%xmm0, 48(%r14)
	movups	%xmm0, 32(%r14)
	movups	%xmm0, 16(%r14)
	movups	%xmm0, (%r14)
	movq	$0, 96(%r14)
	cmpq	$1, %r15
	jne	.LBB15_4
# %bb.3:
	addq	$104, %r14
	movq	%r14, %rax
	jmp	.LBB15_6
.LBB15_4:
	imulq	$104, %r15, %rdx
	leaq	(%r14,%rdx), %rax
	movl	$104, %r8d
.LBB15_5:                               # %.lr.ph.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%r14,%r8), %rdi
	movl	$13, %ecx
	movq	%r14, %rsi
	rep;movsq (%rsi), %es:(%rdi)
	addq	$104, %r8
	cmpq	%r8, %rdx
	jne	.LBB15_5
.LBB15_6:                               # %_ZSt27__uninitialized_default_n_aIP11EDGE_OUTPUTmS0_ET_S2_T0_RSaIT1_E.exit
	movq	%rax, 8(%rbx)
	jmp	.LBB15_18
.LBB15_8:
	xorl	%ebp, %ebp
.LBB15_10:
	imulq	$104, %r13, %rax
	leaq	(%rax,%rbp), %r13
	xorps	%xmm0, %xmm0
	movups	%xmm0, 80(%rbp,%rax)
	movups	%xmm0, 64(%rbp,%rax)
	movups	%xmm0, 48(%rbp,%rax)
	movups	%xmm0, 32(%rbp,%rax)
	movups	%xmm0, 16(%rbp,%rax)
	movups	%xmm0, (%rbp,%rax)
	movq	$0, 96(%rbp,%rax)
	cmpq	$1, %r15
	je	.LBB15_13
# %bb.11:
	imulq	$104, %r15, %rax
	movl	$104, %edx
.LBB15_12:                              # %.lr.ph.i.i.i.i.i.i.i30
                                        # =>This Inner Loop Header: Depth=1
	leaq	(%rdx,%r13), %rdi
	movl	$13, %ecx
	movq	%r13, %rsi
	rep;movsq (%rsi), %es:(%rdi)
	addq	$104, %rdx
	cmpq	%rdx, %rax
	jne	.LBB15_12
.LBB15_13:                              # %_ZSt27__uninitialized_default_n_aIP11EDGE_OUTPUTmS0_ET_S2_T0_RSaIT1_E.exit34
	testq	%r14, %r14
	jle	.LBB15_15
# %bb.14:
	movq	%rbp, %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	callq	memmove@PLT
.LBB15_15:                              # %_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	testq	%r12, %r12
	je	.LBB15_17
# %bb.16:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB15_17:                              # %_ZNSt12_Vector_baseI11EDGE_OUTPUTSaIS0_EE13_M_deallocateEPS0_m.exit37
	movq	%rbp, (%rbx)
	imulq	$104, %r15, %rax
	addq	%rax, %r13
	movq	%r13, 8(%rbx)
	imulq	$104, (%rsp), %rax              # 8-byte Folded Reload
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
.LBB15_18:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB15_19:
	retq
.Lfunc_end15:
	.size	_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm, .Lfunc_end15-_ZNSt6vectorI11EDGE_OUTPUTSaIS0_EE17_M_default_appendEm
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$88686269585142075, %rcx        # imm = 0x13B13B13B13B13B
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$3, %rax
	movabsq	$5675921253449092805, %rdi      # imm = 0x4EC4EC4EC4EC4EC5
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB16_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB16_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end16:
	.size	_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc, .Lfunc_end16-_ZNKSt6vectorI11EDGE_OUTPUTSaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB17_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB17_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end17:
	.size	__hip_module_ctor, .Lfunc_end17-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB18_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB18_2:
	retq
.Lfunc_end18:
	.size	__hip_module_dtor, .Lfunc_end18-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT,@object # @_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.section	.rodata,"a",@progbits
	.globl	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.p2align	3, 0x0
_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT:
	.quad	_Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.size	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" <input_file> <block_size>"
	.size	.L.str.1, 27

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Graph found with "
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" nodes and "
	.size	.L.str.3, 12

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" edges"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/mgarrettm/graphlet-counting/master/graphlets.hip"
	.size	.L.str.5, 111

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"      Graphlet Counts"
	.size	.L.str.6, 22

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"==========================="
	.size	.L.str.7, 28

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"k=4 Connected Graphlets"
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"---------------------------"
	.size	.L.str.9, 28

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"4-clique           (g41)  : "
	.size	.L.str.10, 29

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"4-chordalcycle     (g42)  : "
	.size	.L.str.11, 29

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"4-tailedtriangle   (g43)  : "
	.size	.L.str.12, 29

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"4-cycle            (g44)  : "
	.size	.L.str.13, 29

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"3-star             (g45)  : "
	.size	.L.str.14, 29

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"4-path             (g46)  : "
	.size	.L.str.15, 29

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"k=4 Disconnected Graphlets"
	.size	.L.str.16, 27

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"4-node-1-triangle  (g47)  : "
	.size	.L.str.17, 29

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"4-node-2-star      (g48)  : "
	.size	.L.str.18, 29

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"4-node-2-edge      (g49)  : "
	.size	.L.str.19, 29

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"4-node-1-edge      (g410) : "
	.size	.L.str.20, 29

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"4-node-independent (g411) : "
	.size	.L.str.21, 29

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"k=3 Graphlets"
	.size	.L.str.22, 14

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"triangle           (g31)  : "
	.size	.L.str.23, 29

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"2-star             (g32)  : "
	.size	.L.str.24, 29

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"3-node-1-edge      (g33)  : "
	.size	.L.str.25, 29

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"3-node-independent (g34)  : "
	.size	.L.str.26, 29

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"    Timing (us)"
	.size	.L.str.27, 16

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"===================="
	.size	.L.str.28, 21

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"total elapsed      : "
	.size	.L.str.29, 22

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"hipMalloc         : "
	.size	.L.str.30, 21

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"hipMemcpy (input) : "
	.size	.L.str.31, 21

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"kernel (graphlets) : "
	.size	.L.str.32, 22

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"hipMemcpy (output): "
	.size	.L.str.33, 21

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"hipFree           : "
	.size	.L.str.34, 21

	.type	.L.str.35,@object               # @.str.35
.L.str.35:
	.asciz	"aggregate          : "
	.size	.L.str.35, 22

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.36, 21

	.type	.L.str.37,@object               # @.str.37
.L.str.37:
	.asciz	"cannot create std::vector larger than max_size()"
	.size	.L.str.37, 49

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.38, 26

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	"vector::reserve"
	.size	.L.str.39, 16

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	"vector::_M_default_append"
	.size	.L.str.40, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_alloc
	.type	__ockl_dm_alloc,@function
__ockl_dm_alloc:                        ; @__ockl_dm_alloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_or_saveexec_b32 s0, -1
	scratch_store_b32 off, v40, s32         ; 4-byte Folded Spill
	s_mov_b32 exec_lo, s0
	v_writelane_b32 v40, s34, 0
	v_writelane_b32 v40, s35, 1
	v_writelane_b32 v40, s36, 2
	v_writelane_b32 v40, s37, 3
	v_writelane_b32 v40, s38, 4
	v_writelane_b32 v40, s39, 5
	v_writelane_b32 v40, s40, 6
	v_writelane_b32 v40, s41, 7
	v_writelane_b32 v40, s42, 8
	v_writelane_b32 v40, s43, 9
	v_writelane_b32 v40, s44, 10
	v_writelane_b32 v40, s30, 11
	v_writelane_b32 v40, s31, 12
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_ne_u64_e32 0, v[4:5]
	s_cbranch_execz .LBB0_702
; %bb.1:
	v_mbcnt_lo_u32_b32 v2, -1, 0
                                        ; implicit-def: $vgpr0_vgpr1
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u64_e32 0xc01, v[4:5]
	s_xor_b32 s23, exec_lo, s0
	s_cbranch_execz .LBB0_668
; %bb.2:
	v_max_u32_e32 v0, 16, v4
	v_mov_b32_e32 v5, 0
	s_load_b64 s[10:11], s[8:9], 0x60
	v_dual_mov_b32 v118, 1 :: v_dual_mov_b32 v17, 0x1800
	s_delay_alu instid0(VALU_DEP_3)
	v_clz_i32_u32_e32 v1, v0
	v_mov_b32_e32 v20, 0x200000
	v_mov_b32_e32 v8, v5
	v_mov_b32_e32 v14, 1
	v_mov_b32_e32 v68, 0x100
	v_not_b32_e32 v3, v1
	v_lshlrev_b32_e32 v1, 1, v1
	v_mov_b32_e32 v13, 3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 15, v3
	v_lshlrev_b32_e64 v3, v3, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s10, 0x1a800
	s_addc_u32 s13, s11, 0
	s_add_u32 s14, s10, 0x1a808
	v_lshrrev_b32_e32 v4, 1, v3
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	s_addc_u32 s15, s11, 0
	s_add_u32 s4, s10, 0x800
	s_addc_u32 s5, s11, 0
	v_or_b32_e32 v3, v4, v3
	v_cndmask_b32_e64 v6, 0, 1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+12
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+20
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+4
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+12
	s_add_u32 s6, s10, 0x1000
	v_cmp_gt_u32_e32 vcc_lo, v0, v3
	v_sub_nc_u32_e32 v1, v6, v1
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, 54, v1, vcc_lo
	v_lshlrev_b64 v[0:1], 7, v[7:8]
	v_lshlrev_b64 v[3:4], 5, v[7:8]
	v_lshrrev_b64 v[8:9], v7, 0xbf
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v32, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v33, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v1, vcc_lo
	v_add_co_u32 v36, vcc_lo, v3, s0
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v38, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v48, vcc_lo, s6, v0
	s_add_u32 s0, s10, 0x2000
	v_add_co_ci_u32_e32 v49, vcc_lo, s7, v1, vcc_lo
	s_addc_u32 s1, s11, 0
	v_add_co_u32 v50, vcc_lo, s0, v0
	s_add_u32 s2, s10, 0x1800
	v_add_co_ci_u32_e32 v51, vcc_lo, s1, v1, vcc_lo
	s_addc_u32 s3, s11, 0
	v_add_co_u32 v52, vcc_lo, s2, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __unnamed_1@rel32@lo+24
	s_addc_u32 s1, s1, __unnamed_1@rel32@hi+32
	v_add_co_ci_u32_e32 v53, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v54, vcc_lo, v3, s0
	v_and_b32_e32 v0, 1, v8
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+20
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+28
	v_add_co_ci_u32_e32 v55, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v64, vcc_lo, v3, s2
	v_mov_b32_e32 v9, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, __unnamed_1@rel32@lo+28
	s_addc_u32 s5, s5, __unnamed_1@rel32@hi+36
	v_add_co_ci_u32_e32 v65, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v66, vcc_lo, v3, s4
	v_cmp_eq_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
	v_add_co_ci_u32_e32 v67, vcc_lo, s5, v4, vcc_lo
	v_mov_b32_e32 v8, v5
	v_dual_mov_b32 v10, v5 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v3, v14
	s_add_u32 s24, s10, 0x100
	s_mov_b32 s4, 0
	s_addc_u32 s25, s11, 0
.LBB0_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
                                        ;       Child Loop BB0_347 Depth 3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
                                        ;       Child Loop BB0_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v119, v3
	v_mov_b32_e32 v3, v5
	s_mov_b32 s26, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v119
	s_cbranch_execz .LBB0_666
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s27, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e64 s1, v7
	s_cbranch_execz .LBB0_665
; %bb.5:                                ; %.preheader196.preheader
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_mov_b32_e32 v3, 1
.LBB0_6:                                ; %.preheader196
                                        ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
                                        ;       Child Loop BB0_347 Depth 3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
                                        ;       Child Loop BB0_649 Depth 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v128, v3 :: v_dual_mov_b32 v3, 0
	s_mov_b32 s28, exec_lo
	;;#ASMSTART
	;;#ASMEND
	v_cmpx_ne_u32_e32 0, v128
	s_cbranch_execz .LBB0_664
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_6 Depth=2
	global_load_b32 v3, v[32:33], off glc
.LBB0_9:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_gt_u32 s29, 0x100ff
	s_cbranch_scc0 .LBB0_344
; %bb.10:                               ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v129, exec_lo, 0
	v_mov_b32_e32 v4, v7
	s_mov_b32 s30, 0
	s_bcnt1_i32_b32 s31, exec_lo
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_11:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_14 Depth 4
                                        ;         Child Loop BB0_43 Depth 4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], 7, v[4:5]
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v129
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=3
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
	global_load_b32 v6, v[18:19], off glc
.LBB0_13:                               ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	v_lshlrev_b64 v[18:19], 5, v[4:5]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+8
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, v18, s2
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v6
	global_load_b32 v3, v[18:19], off
	v_add_nc_u32_e32 v6, s2, v129
	s_mov_b32 s2, 0x10100
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, 0xff00ff01, v6
	v_lshrrev_b32_e32 v18, 16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v18, 0x10100, v18
	v_sub_nc_u32_e32 v6, v6, v18
	v_add_co_u32 v18, vcc_lo, s10, v15
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v16, vcc_lo
.LBB0_14:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr15_vgpr16
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_u32_e32 0x100, v6
	s_xor_b32 s3, exec_lo, s3
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[15:16], null, v6, 24, v[21:22]
; %bb.16:                               ; %Flow1135
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v21, 0xffffff00, v6
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_lshrrev_b32_e32 v23, 8, v21
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, v23, 24, v[15:16]
	v_and_b32_e32 v23, 0xff, v6
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, v23, 24, v[21:22]
.LBB0_18:                               ;   in Loop: Header=BB0_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v15, v[15:16], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v15, v3
	s_cbranch_vccz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_14 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v15, s3
	ds_bpermute_b32 v15, v15, v6
	s_branch .LBB0_21
.LBB0_20:                               ;   in Loop: Header=BB0_14 Depth=4
	v_mov_b32_e32 v15, -1
.LBB0_21:                               ;   in Loop: Header=BB0_14 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v15
	s_cmp_eq_u32 s5, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_24
; %bb.22:                               ;   in Loop: Header=BB0_14 Depth=4
	s_cmpk_lt_u32 s5, 0x100
	s_cbranch_scc0 .LBB0_25
; %bb.23:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[21:22], null, 0x1800, v4, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
	s_branch .LBB0_26
.LBB0_24:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB0_29
.LBB0_25:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_26:                               ; %Flow1128
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_28
; %bb.27:                               ;   in Loop: Header=BB0_14 Depth=4
	s_add_i32 s6, s5, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s16, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_and_b32 s5, s5, 0xff
	v_mad_u64_u32 v[15:16], null, 0x1800, v4, s[6:7]
	v_mad_u64_u32 v[21:22], null, s16, 24, v[15:16]
	global_load_b64 v[21:22], v[21:22], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s5, 24, v[21:22]
.LBB0_28:                               ; %Flow1129
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s5, 0
.LBB0_29:                               ; %Flow1131
                                        ;   in Loop: Header=BB0_14 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_33
; %bb.30:                               ;   in Loop: Header=BB0_14 Depth=4
	v_add_nc_u32_e32 v6, s31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, 0xff00ff01, v6
	v_lshrrev_b32_e32 v15, 16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_u32_u24_e32 v15, 0x10100, v15
	v_sub_nc_u32_e32 v6, v6, v15
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_32
; %bb.31:                               ;   in Loop: Header=BB0_14 Depth=4
	global_store_b32 v[18:19], v6, off
.LBB0_32:                               ;   in Loop: Header=BB0_14 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
	s_sub_i32 s2, s2, s31
.LBB0_33:                               ;   in Loop: Header=BB0_14 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_35
; %bb.34:                               ;   in Loop: Header=BB0_14 Depth=4
	s_mov_b32 s3, 0
	s_mov_b32 s5, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr6
	s_branch .LBB0_36
.LBB0_35:                               ;   in Loop: Header=BB0_14 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s5, 0
	s_cselect_b32 s6, -1, 0
                                        ; implicit-def: $sgpr3
.LBB0_36:                               ; %Flow1137
                                        ;   in Loop: Header=BB0_14 Depth=4
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_14
; %bb.37:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_342
; %bb.38:                               ;   in Loop: Header=BB0_11 Depth=3
	v_and_b32_e32 v3, -2, v4
	v_mov_b32_e32 v11, 0
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e32 vcc_lo, v4, v7
	s_mov_b32 s3, 0
	v_cmp_gt_u32_e64 s2, 14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s34, s2
	s_cbranch_execz .LBB0_341
; %bb.39:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_41
; %bb.40:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_add_co_u32 v11, vcc_lo, s24, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, s25, v12, vcc_lo
	global_load_b32 v4, v[11:12], off offset:2048 glc
.LBB0_41:                               ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v4
	v_add_nc_u32_e32 v22, 2, v3
	s_mov_b32 s6, -1
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_gt_u32 s36, 0x100ff
	s_cbranch_scc1 .LBB0_340
; %bb.42:                               ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v4, v5
	s_bcnt1_i32_b32 s35, exec_lo
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+76
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+84
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+68
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+76
	s_add_u32 s1, s24, 0x800
	v_lshlrev_b64 v[11:12], 7, v[3:4]
	v_lshlrev_b64 v[3:4], 5, v[3:4]
	v_lshrrev_b64 v[15:16], v22, 0xbf
	v_mbcnt_lo_u32_b32 v130, exec_lo, 0
	v_mov_b32_e32 v23, v5
	v_mov_b32_e32 v24, v5
	v_add_co_u32 v70, vcc_lo, s24, v11
	v_add_co_ci_u32_e32 v71, vcc_lo, s25, v12, vcc_lo
	v_add_co_u32 v80, vcc_lo, v3, s2
	v_add_co_ci_u32_e32 v81, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v82, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v83, vcc_lo, s7, v4, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v84, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1000
	v_add_co_ci_u32_e32 v85, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v86, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x2000
	v_add_co_ci_u32_e32 v87, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s2, s25, 0
	v_add_co_u32 v96, vcc_lo, s1, v11
	s_add_u32 s1, s24, 0x1800
	v_add_co_ci_u32_e32 v97, vcc_lo, s2, v12, vcc_lo
	s_addc_u32 s5, s25, 0
	v_add_co_u32 v98, vcc_lo, s1, v11
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+88
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+96
	v_add_co_ci_u32_e32 v99, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v100, vcc_lo, v3, s2
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, __unnamed_1@rel32@lo+84
	s_addc_u32 s7, s7, __unnamed_1@rel32@hi+92
	v_add_co_ci_u32_e32 v101, vcc_lo, s3, v4, vcc_lo
	v_and_b32_e32 v6, 1, v15
	v_add_co_u32 v102, vcc_lo, v3, s6
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+92
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+100
	v_add_co_ci_u32_e32 v103, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v112, vcc_lo, v3, s2
	v_cmp_eq_u32_e64 s1, 1, v6
	v_add_co_ci_u32_e32 v113, vcc_lo, s3, v4, vcc_lo
	v_mov_b32_e32 v25, v5
                                        ; implicit-def: $vgpr114_vgpr115
.LBB0_43:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_47 Depth 5
                                        ;           Child Loop BB0_75 Depth 5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
                                        ;           Child Loop BB0_320 Depth 5
                                        ;           Child Loop BB0_323 Depth 5
                                        ;           Child Loop BB0_325 Depth 5
                                        ;           Child Loop BB0_327 Depth 5
                                        ;           Child Loop BB0_329 Depth 5
                                        ;           Child Loop BB0_331 Depth 5
                                        ;           Child Loop BB0_333 Depth 5
	s_cmp_eq_u32 s36, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB0_72
; %bb.44:                               ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_eq_u32_e64 s2, 0, v130
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_46
; %bb.45:                               ;   in Loop: Header=BB0_43 Depth=4
	global_load_b32 v3, v[70:71], off glc
.LBB0_46:                               ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v6, v[80:81], off
	v_cvt_f32_u32_e32 v4, s36
	s_sub_i32 s3, 0, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s3, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s3, v3
	v_add_nc_u32_e32 v3, s3, v130
	s_mov_b32 s3, s36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
.LBB0_47:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_mov_b32 s6, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v12
	s_xor_b32 s6, exec_lo, s6
; %bb.48:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[3:4], null, v12, 24, v[15:16]
; %bb.49:                               ; %Flow952
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_and_not1_saveexec_b32 s6, s6
	s_cbranch_execz .LBB0_51
; %bb.50:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	v_add_nc_u32_e32 v15, 0xffffff00, v12
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_lshrrev_b32_e32 v18, 8, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v12
	global_load_b64 v[15:16], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[15:16]
.LBB0_51:                               ;   in Loop: Header=BB0_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB0_53
; %bb.52:                               ;   in Loop: Header=BB0_47 Depth=5
	s_ctz_i32_b32 s6, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s6, s6, 2
	v_mov_b32_e32 v3, s6
	ds_bpermute_b32 v3, v3, v12
	s_branch .LBB0_54
.LBB0_53:                               ;   in Loop: Header=BB0_47 Depth=5
	v_mov_b32_e32 v3, -1
.LBB0_54:                               ;   in Loop: Header=BB0_47 Depth=5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v3
	s_cmp_eq_u32 s7, -1
	s_cselect_b32 s6, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_57
; %bb.55:                               ;   in Loop: Header=BB0_47 Depth=5
	s_cmpk_lt_u32 s7, 0x100
	s_cbranch_scc0 .LBB0_58
; %bb.56:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	s_mov_b32 s16, 0
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
	s_branch .LBB0_59
.LBB0_57:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr15_vgpr16
	s_branch .LBB0_62
.LBB0_58:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr15_vgpr16
.LBB0_59:                               ; %Flow946
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_61
; %bb.60:                               ;   in Loop: Header=BB0_47 Depth=5
	s_add_i32 s16, s7, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s18, s16, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s7, s7, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[15:16], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[15:16], null, s7, 24, v[3:4]
.LBB0_61:                               ; %Flow947
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s7, 0
.LBB0_62:                               ; %Flow948
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_66
; %bb.63:                               ;   in Loop: Header=BB0_47 Depth=5
	v_add_nc_u32_e32 v3, s35, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v11
	v_mul_lo_u32 v4, v4, s36
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s36, v3
	v_cmp_le_u32_e32 vcc_lo, s36, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v12, v3, v4, vcc_lo
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_65
; %bb.64:                               ;   in Loop: Header=BB0_47 Depth=5
	global_store_b32 v[70:71], v12, off
.LBB0_65:                               ;   in Loop: Header=BB0_47 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_sub_i32 s3, s3, s35
.LBB0_66:                               ;   in Loop: Header=BB0_47 Depth=5
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccz .LBB0_68
; %bb.67:                               ;   in Loop: Header=BB0_47 Depth=5
	s_mov_b32 s6, 0
	s_mov_b32 s7, -1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr12
	s_branch .LBB0_69
.LBB0_68:                               ;   in Loop: Header=BB0_47 Depth=5
	s_cmp_lt_i32 s3, 1
	s_mov_b32 s7, 0
	s_cselect_b32 s16, -1, 0
                                        ; implicit-def: $sgpr6
.LBB0_69:                               ; %Flow954
                                        ;   in Loop: Header=BB0_47 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_71
; %bb.70:                               ;   in Loop: Header=BB0_47 Depth=5
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_branch .LBB0_47
.LBB0_71:                               ; %loop.exit.guard903
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_dual_mov_b32 v115, v16 :: v_dual_mov_b32 v114, v15
	s_xor_b32 s2, s7, -1
	s_branch .LBB0_73
.LBB0_72:                               ;   in Loop: Header=BB0_43 Depth=4
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr15_vgpr16
                                        ; implicit-def: $sgpr6
.LBB0_73:                               ; %Flow1121
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_314
; %bb.74:                               ; %.loopexit188
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_mbcnt_lo_u32_b32 v131, exec_lo, 0
                                        ; implicit-def: $vgpr116_vgpr117
.LBB0_75:                               ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB0_93 Depth 6
                                        ;             Child Loop BB0_101 Depth 6
                                        ;             Child Loop BB0_107 Depth 6
                                        ;             Child Loop BB0_116 Depth 6
                                        ;             Child Loop BB0_121 Depth 6
                                        ;             Child Loop BB0_123 Depth 6
                                        ;             Child Loop BB0_144 Depth 6
                                        ;             Child Loop BB0_152 Depth 6
                                        ;             Child Loop BB0_158 Depth 6
                                        ;             Child Loop BB0_167 Depth 6
                                        ;             Child Loop BB0_175 Depth 6
                                        ;             Child Loop BB0_178 Depth 6
                                        ;             Child Loop BB0_180 Depth 6
                                        ;             Child Loop BB0_182 Depth 6
                                        ;             Child Loop BB0_184 Depth 6
                                        ;             Child Loop BB0_186 Depth 6
                                        ;             Child Loop BB0_188 Depth 6
                                        ;             Child Loop BB0_210 Depth 6
                                        ;             Child Loop BB0_218 Depth 6
                                        ;             Child Loop BB0_224 Depth 6
                                        ;             Child Loop BB0_233 Depth 6
                                        ;             Child Loop BB0_240 Depth 6
                                        ;             Child Loop BB0_243 Depth 6
                                        ;             Child Loop BB0_248 Depth 6
                                        ;             Child Loop BB0_255 Depth 6
                                        ;             Child Loop BB0_288 Depth 6
                                        ;             Child Loop BB0_296 Depth 6
                                        ;             Child Loop BB0_302 Depth 6
                                        ;             Child Loop BB0_311 Depth 6
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v3, v[84:85], off glc
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB0_137
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_80
; %bb.79:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[86:87], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB0_80:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s38, v3
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc1 .LBB0_138
; %bb.81:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v21, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_83
; %bb.82:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v3, v[86:87], off glc
.LBB0_83:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s5, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB0_171
; %bb.84:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_88
; %bb.85:                               ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[28:29], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s3, s6, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s3, s7, v29, s3
	v_cmp_lt_u64_e64 s3, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s16, s3
	s_cbranch_execz .LBB0_87
; %bb.86:                               ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[96:97], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, v[3:4], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s3
.LBB0_87:                               ; %Flow1110
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_88:                               ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s39, v3
	s_mov_b32 s5, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s39, 1
	s_cbranch_scc1 .LBB0_171
; %bb.89:                               ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB0_118
; %bb.90:                               ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_96
; %bb.91:                               ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_95
; %bb.92:                               ; %.preheader3.i.i.i117.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_93:                               ; %.preheader3.i.i.i117
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_93
; %bb.94:                               ; %Flow1104
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_95:                               ; %Flow1106
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_96:                               ; %.loopexit4.i.i.i112
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s40, s7, 24
	s_mul_hi_u32 s41, s6, 24
	s_mul_i32 s42, s6, 24
	s_and_saveexec_b32 s43, s3
	s_cbranch_execz .LBB0_98
; %bb.97:                               ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s41, s40
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_98:                               ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s43
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_mov_b32_e32 v15, v5
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v29, s5
	v_mov_b32_e32 v30, s6
	v_mov_b32_e32 v28, s4
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_106
; %bb.99:                               ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_102
; %bb.100:                              ; %.preheader1.i.i.i115.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_101:                              ; %.preheader1.i.i.i115
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[30:31]
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_101
.LBB0_102:                              ; %Flow1102
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_104
; %bb.103:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB0_104:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB0_106
; %bb.105:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_106:                              ; %Flow1103
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s41, s41, s40
	v_add_co_u32 v3, vcc_lo, v26, s42
	v_add_co_ci_u32_e32 v4, vcc_lo, s41, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_107:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_107 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_109:                              ;   in Loop: Header=BB0_107 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_111
; %bb.110:                              ;   in Loop: Header=BB0_107 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_112
.LBB0_111:                              ;   in Loop: Header=BB0_107 Depth=6
	s_mov_b32 s5, -1
.LBB0_112:                              ; %Flow1097
                                        ;   in Loop: Header=BB0_107 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_107
; %bb.113:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_117
; %bb.114:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v28, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v29, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v28 :: v_dual_cndmask_b32 v26, v26, v6
	v_mov_b32_e32 v28, v15
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_117
; %bb.115:                              ; %.preheader.i.i.i114.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, 0
.LBB0_116:                              ; %.preheader.i.i.i114
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[28:29]
	v_dual_mov_b32 v29, v16 :: v_dual_mov_b32 v28, v15
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_116
.LBB0_117:                              ; %Flow1095
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_118:                              ; %Flow1107
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB0_170
; %bb.119:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB0_122
; %bb.120:                              ; %.preheader175.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s3
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s3, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s3
.LBB0_121:                              ; %.preheader175
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s3, v3, s7
	v_add_co_ci_u32_e64 v4, s3, 0, v4, s3
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_121
.LBB0_122:                              ; %Flow1089
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB0_123:                              ; %.loopexit176
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v21
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_125
; %bb.124:                              ;   in Loop: Header=BB0_123 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB0_125:                              ;   in Loop: Header=BB0_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB0_132
; %bb.126:                              ;   in Loop: Header=BB0_123 Depth=6
	v_mov_b32_e32 v3, s39
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_130
; %bb.127:                              ;   in Loop: Header=BB0_123 Depth=6
	s_add_i32 s3, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s3, s3, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[16:17]
	v_mad_u64_u32 v[11:12], null, s3, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s3, 0, v[3:4]
	v_mov_b32_e32 v3, s39
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s3
	s_cbranch_execz .LBB0_129
; %bb.128:                              ;   in Loop: Header=BB0_123 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[86:87], v68, off
	v_mov_b32_e32 v3, 0
.LBB0_129:                              ; %Flow1082
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_130:                              ;   in Loop: Header=BB0_123 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB0_133
; %bb.131:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr39
	s_branch .LBB0_134
.LBB0_132:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $sgpr7
	s_branch .LBB0_135
.LBB0_133:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr3
.LBB0_134:                              ; %Flow1086
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB0_135:                              ; %Flow1085
                                        ;   in Loop: Header=BB0_123 Depth=6
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_139
; %bb.136:                              ;   in Loop: Header=BB0_123 Depth=6
	s_mov_b32 s39, s3
	s_branch .LBB0_123
.LBB0_137:                              ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v4 :: v_dual_mov_b32 v116, v3
	s_branch .LBB0_199
.LBB0_138:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB0_191
.LBB0_139:                              ; %loop.exit.guard909
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_169
; %bb.140:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s40, s5
	s_cbranch_execz .LBB0_168
; %bb.141:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s3, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s3, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_147
; %bb.142:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_146
; %bb.143:                              ; %.preheader3.i.i.i124.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_144:                              ; %.preheader3.i.i.i124
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_144
; %bb.145:                              ; %Flow1077
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_146:                              ; %Flow1079
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_147:                              ; %.loopexit4.i.i.i119
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s41, s7, 24
	s_mul_hi_u32 s42, s6, 24
	s_mul_i32 s43, s6, 24
	s_and_saveexec_b32 s44, s3
	s_cbranch_execz .LBB0_149
; %bb.148:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s42, s41
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_149:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s44
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_157
; %bb.150:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s20 :: v_dual_mov_b32 v133, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_153
; %bb.151:                              ; %.preheader1.i.i.i122.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_152:                              ; %.preheader1.i.i.i122
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_152
.LBB0_153:                              ; %Flow1075
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_155
; %bb.154:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_155:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_157
; %bb.156:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_157:                              ; %Flow1076
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s42, s42, s41
	v_add_co_u32 v3, vcc_lo, v26, s43
	v_add_co_ci_u32_e32 v4, vcc_lo, s42, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_158:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s3
	s_cbranch_execz .LBB0_160
; %bb.159:                              ;   in Loop: Header=BB0_158 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_160:                              ;   in Loop: Header=BB0_158 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_162
; %bb.161:                              ;   in Loop: Header=BB0_158 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_163
.LBB0_162:                              ;   in Loop: Header=BB0_158 Depth=6
	s_mov_b32 s5, -1
.LBB0_163:                              ; %Flow1070
                                        ;   in Loop: Header=BB0_158 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_158
; %bb.164:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB0_168
; %bb.165:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_168
; %bb.166:                              ; %.preheader.i.i.i121.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s3, 0
.LBB0_167:                              ; %.preheader.i.i.i121
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_167
.LBB0_168:                              ; %Flow1080
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_mov_b32 s7, s39
.LBB0_169:                              ; %Flow1081
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s39, s7
.LBB0_170:                              ; %Flow1091
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s5, s39
.LBB0_171:                              ; %__ockl_devmem_request.exit125
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s5, 0
	s_cselect_b32 s3, -1, 0
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_190
; %bb.172:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_189
; %bb.173:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[96:97], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_189
; %bb.174:                              ;   in Loop: Header=BB0_75 Depth=5
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s7, s6, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s6, s16, s6
	s_addc_u32 s7, s17, s7
.LBB0_175:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x659
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_178
; %bb.176:                              ; %.preheader11.i138
                                        ;   in Loop: Header=BB0_175 Depth=6
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_175
.LBB0_177:                              ; %.preheader9.i137
                                        ;   in Loop: Header=BB0_178 Depth=6
	s_sleep 63
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_178:                              ; %Flow1061
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x326
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_177
; %bb.179:                              ; %Flow1058
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_182
.LBB0_180:                              ; %.preheader7.i136
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 31
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x18c
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_180
	s_branch .LBB0_182
.LBB0_181:                              ; %.preheader5.i135
                                        ;   in Loop: Header=BB0_182 Depth=6
	s_sleep 15
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_182:                              ; %.loopexit8.i128
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0xc0
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_181
	s_branch .LBB0_184
.LBB0_183:                              ; %.preheader3.i134
                                        ;   in Loop: Header=BB0_184 Depth=6
	s_sleep 7
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_184:                              ; %Flow1052
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 0x59
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_183
	s_branch .LBB0_186
.LBB0_185:                              ; %.preheader1.i133
                                        ;   in Loop: Header=BB0_186 Depth=6
	s_sleep 3
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_186:                              ; %Flow1049
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s16, 38
	s_addc_u32 s21, s17, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s19, s[6:7], s[20:21]
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_185
; %bb.187:                              ; %Flow1046
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_cmp_le_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_189
.LBB0_188:                              ; %.preheader.i132
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_sendmsg_rtn_b64 s[16:17], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s16, s[6:7], s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_188
.LBB0_189:                              ; %__ockl_rtcwait_u32.exit139
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	s_cmp_lg_u32 s5, 2
	v_mov_b32_e32 v117, s4
	s_cselect_b32 s5, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v116, 0, 1, s5
.LBB0_190:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
.LBB0_191:                              ; %Flow1113
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_199
; %bb.192:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_196
; %bb.193:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[28:29], v[98:99], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s6, v28
	v_sub_co_ci_u32_e32 v4, vcc_lo, s7, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_195
; %bb.194:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v26, s6 :: v_dual_mov_b32 v27, s7
	global_atomic_cmpswap_b64 v[3:4], v[98:99], v[26:29], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[28:29]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB0_195:                              ; %Flow1040
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_196:                              ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	v_readfirstlane_b32 s7, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_200
; %bb.197:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
.LBB0_198:                              ; %Flow1039
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v117, v16 :: v_dual_mov_b32 v116, v15
.LBB0_199:                              ; %Flow1116
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_75
	s_branch .LBB0_315
.LBB0_200:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_236
; %bb.201:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB0_205
; %bb.202:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s5, exec_lo
	s_mov_b32 s2, exec_lo
	v_mbcnt_lo_u32_b32 v6, s5, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_204
; %bb.203:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s5, s5, 21
	v_mov_b32_e32 v4, s5
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB0_204:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v4
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[6:7]
	v_cmp_ge_u64_e64 s2, v[3:4], v[11:12]
	s_branch .LBB0_206
.LBB0_205:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_206:                              ; %Flow1037
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s20, s2
	s_cbranch_execz .LBB0_235
; %bb.207:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_213
; %bb.208:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_212
; %bb.209:                              ; %.preheader3.i.i.i145.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_210:                              ; %.preheader3.i.i.i145
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b64 v[26:27], v5, s[16:17]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v28
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v29
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_210
; %bb.211:                              ; %Flow1033
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_212:                              ; %Flow1035
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_213:                              ; %.loopexit4.i.i.i140
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[16:17] offset:40
	global_load_b128 v[26:29], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s39, s6, 24
	s_mul_i32 s40, s6, 24
	s_and_saveexec_b32 s41, s2
	s_cbranch_execz .LBB0_215
; %bb.214:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s39, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB0_215:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s41
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v31, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v29, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[28:31], off offset:16
	global_store_b128 v[11:12], v[28:31], off offset:32
	global_store_b128 v[11:12], v[28:31], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_223
; %bb.216:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[134:135], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v132, s18 :: v_dual_mov_b32 v133, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[134:135], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[132:135], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[134:135]
	s_cbranch_execz .LBB0_219
; %bb.217:                              ; %.preheader1.i.i.i143.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_218:                              ; %.preheader1.i.i.i143
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s18 :: v_dual_mov_b32 v29, s19
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[28:31], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[30:31]
	v_dual_mov_b32 v31, v19 :: v_dual_mov_b32 v30, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_218
.LBB0_219:                              ; %Flow1031
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_221
; %bb.220:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB0_221:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[28:29], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[28:29]
	s_cbranch_vccnz .LBB0_223
; %bb.222:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[28:29], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_223:                              ; %Flow1032
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s39, s39, s21
	v_add_co_u32 v3, vcc_lo, v26, s40
	v_add_co_ci_u32_e32 v4, vcc_lo, s39, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_224:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_226
; %bb.225:                              ;   in Loop: Header=BB0_224 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_226:                              ;   in Loop: Header=BB0_224 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_228
; %bb.227:                              ;   in Loop: Header=BB0_224 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_229
.LBB0_228:                              ;   in Loop: Header=BB0_224 Depth=6
	s_mov_b32 s5, -1
.LBB0_229:                              ; %Flow1026
                                        ;   in Loop: Header=BB0_224 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_224
; %bb.230:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_234
; %bb.231:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17] offset:24 glc
	global_load_b64 v[28:29], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v26, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v27, vcc_lo, s19, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[26:27]
	v_dual_cndmask_b32 v27, v27, v21 :: v_dual_cndmask_b32 v26, v26, v6
	v_and_b32_e32 v6, v27, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v26, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v28, v11
	v_mov_b32_e32 v28, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v29, v6, vcc_lo
	v_mov_b32_e32 v29, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_234
; %bb.232:                              ; %.preheader.i.i.i142.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, 0
.LBB0_233:                              ; %.preheader.i.i.i142
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[11:12], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[26:29], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[28:29]
	v_dual_mov_b32 v29, v19 :: v_dual_mov_b32 v28, v18
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_233
.LBB0_234:                              ; %Flow1024
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_235:                              ; %Flow1038
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s20
.LBB0_236:                              ; %__ockl_devmem_request.exit146
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v3
	v_readfirstlane_b32 s17, v4
	s_cmp_eq_u64 s[16:17], 0
	s_cbranch_scc1 .LBB0_281
; %bb.237:                              ;   in Loop: Header=BB0_75 Depth=5
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[82:83], off
	s_bcnt1_i32_b32 s3, exec_lo
	s_add_u32 s6, s16, 16
	s_addc_u32 s7, s17, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_245
; %bb.238:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v15, v[100:101], off
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_241
; %bb.239:                              ; %.preheader172.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_240:                              ; %.preheader172
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_240
.LBB0_241:                              ; %Flow1013
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
	global_load_b32 v16, v[102:103], off
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB0_244
; %bb.242:                              ; %.preheader170.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_mul_lo_u32 v12, v15, s3
	s_mov_b32 s18, 0
.LBB0_243:                              ; %.preheader170
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_243
.LBB0_244:                              ; %Flow1010
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_245:                              ; %Flow1018
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_and_not1_saveexec_b32 s5, s5
	s_cbranch_execz .LBB0_250
; %bb.246:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_249
; %bb.247:                              ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v15, v[112:113], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s19, s3, 2
	s_mov_b32 s20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_248:                              ; %.preheader
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_add_nc_u32_e32 v16, s3, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s2, v11, s19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s2, 0, v12, s2
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s20, vcc_lo, s20
	s_and_not1_b32 exec_lo, exec_lo, s20
	s_cbranch_execnz .LBB0_248
.LBB0_249:                              ; %Flow1016
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s18
.LBB0_250:                              ; %.loopexit
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_254
; %bb.251:                              ;   in Loop: Header=BB0_75 Depth=5
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_253
; %bb.252:                              ;   in Loop: Header=BB0_75 Depth=5
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB0_253:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	global_store_b128 v5, v[22:25], s[16:17]
.LBB0_254:                              ; %Flow1007
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $sgpr5
.LBB0_255:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s2, 0, v131
	v_mov_b32_e32 v3, s37
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_257
; %bb.256:                              ;   in Loop: Header=BB0_255 Depth=6
	global_load_b32 v3, v[84:85], off glc
.LBB0_257:                              ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s37, v3
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s5, s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s3, s5
	s_cmp_eq_u32 s37, 0x10100
	s_cbranch_scc1 .LBB0_264
; %bb.258:                              ;   in Loop: Header=BB0_255 Depth=6
	v_mov_b32_e32 v3, s38
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_260
; %bb.259:                              ;   in Loop: Header=BB0_255 Depth=6
	global_load_b32 v3, v[86:87], off glc
.LBB0_260:                              ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s38, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s37, s38
	s_cbranch_scc0 .LBB0_265
; %bb.261:                              ;   in Loop: Header=BB0_255 Depth=6
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_272
; %bb.262:                              ;   in Loop: Header=BB0_255 Depth=6
	s_cmpk_lt_u32 s37, 0x100
	s_cbranch_scc0 .LBB0_266
; %bb.263:                              ;   in Loop: Header=BB0_255 Depth=6
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_mov_b32 s6, 0
	v_mad_u64_u32 v[11:12], null, s37, 24, v[3:4]
	s_branch .LBB0_267
.LBB0_264:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b64 s[2:3], 0
	s_mov_b32 s20, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_277
.LBB0_265:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_276
.LBB0_266:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_267:                              ; %Flow999
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_269
; %bb.268:                              ;   in Loop: Header=BB0_255 Depth=6
	s_add_i32 s6, s37, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s18, s6, 8
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v22, s[6:7]
	s_and_b32 s6, s37, 0xff
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s18, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB0_269:                              ;   in Loop: Header=BB0_255 Depth=6
	v_dual_mov_b32 v15, s37 :: v_dual_mov_b32 v4, s17
	v_dual_mov_b32 v3, s16 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[16:17] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_271
; %bb.270:                              ;   in Loop: Header=BB0_255 Depth=6
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[84:85], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB0_271:                              ; %Flow997
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_272:                              ; %Flow1000
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_274
; %bb.273:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr37
                                        ; implicit-def: $sgpr38
	s_branch .LBB0_275
.LBB0_274:                              ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s19, 0
	s_and_not1_b32 s2, s2, exec_lo
	s_sleep 2
.LBB0_275:                              ; %Flow1005
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_mov_b32 s18, 0
.LBB0_276:                              ; %Flow1004
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_and_not1_b32 s3, s5, exec_lo
	s_and_b32 s2, s2, exec_lo
	s_mov_b32 s20, 0
	s_or_b32 s5, s3, s2
                                        ; implicit-def: $sgpr2_sgpr3
.LBB0_277:                              ; %Flow1003
                                        ;   in Loop: Header=BB0_255 Depth=6
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_255
; %bb.278:                              ; %loop.exit.guard913
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
	s_and_b32 vcc_lo, exec_lo, s20
	s_cbranch_vccnz .LBB0_198
; %bb.279:                              ; %loop.exit.guard914
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_xor_b32 s2, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB0_282
; %bb.280:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB0_283
.LBB0_281:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, 0
	s_branch .LBB0_198
.LBB0_282:                              ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB0_283:                              ; %Flow994
                                        ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_198
; %bb.284:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s3, s5
	s_cbranch_execz .LBB0_313
; %bb.285:                              ;   in Loop: Header=BB0_75 Depth=5
	s_load_b64 s[18:19], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_291
; %bb.286:                              ;   in Loop: Header=BB0_75 Depth=5
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[28:29], v5, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[18:19] offset:40
	global_load_b64 v[15:16], v5, s[18:19]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v29
	v_and_b32_e32 v6, v11, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[28:29]
	s_cbranch_execz .LBB0_290
; %bb.287:                              ; %.preheader3.i.i.i152.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_288:                              ; %.preheader3.i.i.i152
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b64 v[18:19], v5, s[18:19]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v28
	v_and_b32_e32 v6, v16, v29
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[26:27], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_288
; %bb.289:                              ; %Flow990
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_290:                              ; %Flow992
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_291:                              ; %.loopexit4.i.i.i147
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[18:19] offset:40
	global_load_b128 v[26:29], v5, s[18:19]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s37, s7, 24
	s_mul_hi_u32 s38, s6, 24
	s_mul_i32 s39, s6, 24
	s_and_saveexec_b32 s40, s2
	s_cbranch_execz .LBB0_293
; %bb.292:                              ;   in Loop: Header=BB0_75 Depth=5
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s38, s37
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v27, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_293:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s40
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v28, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v29, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, s17
	v_dual_mov_b32 v31, s7 :: v_dual_mov_b32 v30, s6
	v_dual_mov_b32 v29, s5 :: v_dual_mov_b32 v28, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[28:31], off offset:8
	global_store_b128 v[3:4], v[28:31], off offset:24
	global_store_b128 v[3:4], v[28:31], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_301
; %bb.294:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x1
	global_load_b64 v[133:134], v5, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v131, s20 :: v_dual_mov_b32 v132, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v26, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v27, v4, vcc_lo
	global_store_b64 v[3:4], v[133:134], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[30:31], v5, v[131:134], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[30:31], v[133:134]
	s_cbranch_execz .LBB0_297
; %bb.295:                              ; %.preheader1.i.i.i150.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s7, 0
.LBB0_296:                              ; %.preheader1.i.i.i150
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_dual_mov_b32 v28, s20 :: v_dual_mov_b32 v29, s21
	s_sleep 1
	global_store_b64 v[3:4], v[30:31], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[28:31], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[30:31]
	v_dual_mov_b32 v31, v12 :: v_dual_mov_b32 v30, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_296
.LBB0_297:                              ; %Flow988
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[18:19] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_299
; %bb.298:                              ;   in Loop: Header=BB0_75 Depth=5
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_299:                              ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_301
; %bb.300:                              ;   in Loop: Header=BB0_75 Depth=5
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_301:                              ; %Flow989
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s38, s38, s37
	v_add_co_u32 v3, vcc_lo, v26, s39
	v_add_co_ci_u32_e32 v4, vcc_lo, s38, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_302:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_304
; %bb.303:                              ;   in Loop: Header=BB0_302 Depth=6
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_304:                              ;   in Loop: Header=BB0_302 Depth=6
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_306
; %bb.305:                              ;   in Loop: Header=BB0_302 Depth=6
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_307
.LBB0_306:                              ;   in Loop: Header=BB0_302 Depth=6
	s_mov_b32 s5, -1
.LBB0_307:                              ; %Flow983
                                        ;   in Loop: Header=BB0_302 Depth=6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_302
; %bb.308:                              ;   in Loop: Header=BB0_75 Depth=5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_312
; %bb.309:                              ;   in Loop: Header=BB0_75 Depth=5
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[18:19] offset:40
	global_load_b64 v[11:12], v5, s[18:19] offset:24 glc
	global_load_b64 v[15:16], v5, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v28, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v29, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v27, v19, v21 :: v_dual_cndmask_b32 v26, v18, v6
	v_and_b32_e32 v4, v27, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v26, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[28:29], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[28:29], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_312
; %bb.310:                              ; %.preheader.i.i.i149.preheader
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_mov_b32 s2, 0
.LBB0_311:                              ; %.preheader.i.i.i149
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ;           Parent Loop BB0_75 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_sleep 1
	global_store_b64 v[3:4], v[28:29], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[26:29], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[28:29]
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_311
.LBB0_312:                              ; %Flow981
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v131, 0
.LBB0_313:                              ; %Flow993
                                        ;   in Loop: Header=BB0_75 Depth=5
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v15, v116 :: v_dual_mov_b32 v16, v117
	s_mov_b32 s18, -1
	s_branch .LBB0_198
.LBB0_314:                              ;   in Loop: Header=BB0_43 Depth=4
                                        ; implicit-def: $vgpr114_vgpr115
                                        ; implicit-def: $sgpr36
                                        ; implicit-def: $vgpr130
	s_branch .LBB0_338
.LBB0_315:                              ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_ne_u64_e64 s5, 1, v[116:117]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_317
; %bb.316:                              ;   in Loop: Header=BB0_43 Depth=4
	v_dual_mov_b32 v114, v116 :: v_dual_mov_b32 v115, v117
	s_branch .LBB0_337
.LBB0_317:                              ;   in Loop: Header=BB0_43 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_334
; %bb.318:                              ;   in Loop: Header=BB0_43 Depth=4
	global_load_b64 v[3:4], v[98:99], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_334
; %bb.319:                              ;   in Loop: Header=BB0_43 Depth=4
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_320:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_323
; %bb.321:                              ; %.preheader11.i166
                                        ;   in Loop: Header=BB0_320 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_320
.LBB0_322:                              ; %.preheader9.i165
                                        ;   in Loop: Header=BB0_323 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_323:                              ; %Flow975
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_322
; %bb.324:                              ; %Flow972
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_327
.LBB0_325:                              ; %.preheader7.i164
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB0_325
	s_branch .LBB0_327
.LBB0_326:                              ; %.preheader5.i163
                                        ;   in Loop: Header=BB0_327 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_327:                              ; %.loopexit8.i156
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_326
	s_branch .LBB0_329
.LBB0_328:                              ; %.preheader3.i162
                                        ;   in Loop: Header=BB0_329 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_329:                              ; %Flow966
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_328
	s_branch .LBB0_331
.LBB0_330:                              ; %.preheader1.i161
                                        ;   in Loop: Header=BB0_331 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_331:                              ; %Flow963
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s17, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccz .LBB0_330
; %bb.332:                              ; %Flow960
                                        ;   in Loop: Header=BB0_43 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_334
.LBB0_333:                              ; %.preheader.i160
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_43 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_333
.LBB0_334:                              ; %__ockl_rtcwait_u32.exit167
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s16
	v_mov_b32_e32 v3, s36
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v130
	s_cbranch_execz .LBB0_336
; %bb.335:                              ;   in Loop: Header=BB0_43 Depth=4
	global_load_b32 v3, v[84:85], off glc
.LBB0_336:                              ;   in Loop: Header=BB0_43 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s36, v3
.LBB0_337:                              ;   in Loop: Header=BB0_43 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v114 :: v_dual_mov_b32 v16, v115
	s_mov_b32 s6, 0
.LBB0_338:                              ; %Flow1122
                                        ;   in Loop: Header=BB0_43 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_43
; %bb.339:                              ; %Flow1123
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_mov_b32_e32 v22, v7
.LBB0_340:                              ; %Flow1124
                                        ;   in Loop: Header=BB0_11 Depth=3
	v_dual_mov_b32 v11, v15 :: v_dual_mov_b32 v12, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v4, v22
	s_and_b32 s3, s6, exec_lo
.LBB0_341:                              ; %Flow1126
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_or_b32 exec_lo, exec_lo, s34
.LBB0_342:                              ; %.loopexit187
                                        ;   in Loop: Header=BB0_11 Depth=3
	s_xor_b32 s1, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s1
	s_or_b32 s30, s1, s30
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB0_11
; %bb.343:                              ; %Flow1139
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_mov_b32 s1, 0
	s_branch .LBB0_345
.LBB0_344:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_345:                              ; %Flow1321
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_642
; %bb.346:                              ;   in Loop: Header=BB0_6 Depth=2
	v_mbcnt_lo_u32_b32 v70, exec_lo, 0
	s_bcnt1_i32_b32 s30, exec_lo
                                        ; implicit-def: $vgpr28_vgpr29
.LBB0_347:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_351 Depth 4
                                        ;         Child Loop BB0_378 Depth 4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
                                        ;         Child Loop BB0_623 Depth 4
                                        ;         Child Loop BB0_626 Depth 4
                                        ;         Child Loop BB0_628 Depth 4
                                        ;         Child Loop BB0_630 Depth 4
                                        ;         Child Loop BB0_632 Depth 4
                                        ;         Child Loop BB0_634 Depth 4
                                        ;         Child Loop BB0_636 Depth 4
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u32 s29, 0
	s_mov_b32 s5, -1
	;;#ASMSTART
	;;#ASMEND
	s_cbranch_scc1 .LBB0_375
; %bb.348:                              ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_eq_u32_e64 s1, 0, v70
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_350
; %bb.349:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b32 v3, v[34:35], off glc
.LBB0_350:                              ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s2
	global_load_b32 v6, v[36:37], off
	v_cvt_f32_u32_e32 v4, s29
	s_sub_i32 s2, 0, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, s2, v4
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s2, v3
	v_add_nc_u32_e32 v3, s2, v70
	s_mov_b32 s2, s29
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v11, v4, v11
	v_add_nc_u32_e32 v15, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
.LBB0_351:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100, v16
	s_xor_b32 s3, exec_lo, s3
; %bb.352:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, 0x1800, v7, s[6:7]
	v_mad_u64_u32 v[3:4], null, v16, 24, v[11:12]
; %bb.353:                              ; %Flow1148
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_and_not1_saveexec_b32 s3, s3
	s_cbranch_execz .LBB0_355
; %bb.354:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s6, s10, 0x2800
	v_add_nc_u32_e32 v11, 0xffffff00, v16
	s_addc_u32 s7, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[6:7]
	v_lshrrev_b32_e32 v18, 8, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v18, 24, v[3:4]
	v_and_b32_e32 v18, 0xff, v16
	global_load_b64 v[11:12], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v18, 24, v[11:12]
.LBB0_355:                              ;   in Loop: Header=BB0_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v3, v[3:4], off offset:16 glc
	s_waitcnt vmcnt(0)
	v_cmp_lt_u32_e32 vcc_lo, v3, v6
	s_cbranch_vccz .LBB0_357
; %bb.356:                              ;   in Loop: Header=BB0_351 Depth=4
	s_ctz_i32_b32 s3, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s3, s3, 2
	v_mov_b32_e32 v3, s3
	ds_bpermute_b32 v3, v3, v16
	s_branch .LBB0_358
.LBB0_357:                              ;   in Loop: Header=BB0_351 Depth=4
	v_mov_b32_e32 v3, -1
.LBB0_358:                              ;   in Loop: Header=BB0_351 Depth=4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v3
	s_cmp_eq_u32 s6, -1
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB0_361
; %bb.359:                              ;   in Loop: Header=BB0_351 Depth=4
	s_cmpk_lt_u32 s6, 0x100
	s_cbranch_scc0 .LBB0_362
; %bb.360:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
	s_branch .LBB0_363
.LBB0_361:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB0_366
.LBB0_362:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_363:                              ; %Flow1141
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_365
; %bb.364:                              ;   in Loop: Header=BB0_351 Depth=4
	s_add_i32 s7, s6, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_and_b32 s6, s6, 0xff
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s6, 24, v[3:4]
.LBB0_365:                              ; %Flow1142
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s6, 0
.LBB0_366:                              ; %Flow1144
                                        ;   in Loop: Header=BB0_351 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_370
; %bb.367:                              ;   in Loop: Header=BB0_351 Depth=4
	v_add_nc_u32_e32 v3, s30, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v3, v15
	v_mul_lo_u32 v4, v4, s29
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v4
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s29, v3
	v_cmp_le_u32_e32 vcc_lo, s29, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v3, v4, vcc_lo
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_369
; %bb.368:                              ;   in Loop: Header=BB0_351 Depth=4
	global_store_b32 v[34:35], v16, off
.LBB0_369:                              ;   in Loop: Header=BB0_351 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
	s_sub_i32 s2, s2, s30
.LBB0_370:                              ;   in Loop: Header=BB0_351 Depth=4
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccz .LBB0_372
; %bb.371:                              ;   in Loop: Header=BB0_351 Depth=4
	s_mov_b32 s3, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $vgpr16
	s_branch .LBB0_373
.LBB0_372:                              ;   in Loop: Header=BB0_351 Depth=4
	s_cmp_lt_i32 s2, 1
	s_mov_b32 s3, 0
	s_cselect_b32 s6, -1, 0
.LBB0_373:                              ; %Flow1150
                                        ;   in Loop: Header=BB0_351 Depth=4
	v_dual_mov_b32 v29, v12 :: v_dual_mov_b32 v28, v11
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_351
; %bb.374:                              ; %loop.exit.guard922
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_xor_b32 s1, s3, -1
	s_branch .LBB0_376
.LBB0_375:                              ;   in Loop: Header=BB0_347 Depth=3
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_376:                              ; %Flow1317
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_617
; %bb.377:                              ; %.loopexit190
                                        ;   in Loop: Header=BB0_347 Depth=3
	v_mbcnt_lo_u32_b32 v71, exec_lo, 0
                                        ; implicit-def: $vgpr30_vgpr31
.LBB0_378:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_396 Depth 5
                                        ;           Child Loop BB0_404 Depth 5
                                        ;           Child Loop BB0_410 Depth 5
                                        ;           Child Loop BB0_419 Depth 5
                                        ;           Child Loop BB0_424 Depth 5
                                        ;           Child Loop BB0_426 Depth 5
                                        ;           Child Loop BB0_447 Depth 5
                                        ;           Child Loop BB0_455 Depth 5
                                        ;           Child Loop BB0_461 Depth 5
                                        ;           Child Loop BB0_470 Depth 5
                                        ;           Child Loop BB0_478 Depth 5
                                        ;           Child Loop BB0_481 Depth 5
                                        ;           Child Loop BB0_483 Depth 5
                                        ;           Child Loop BB0_485 Depth 5
                                        ;           Child Loop BB0_487 Depth 5
                                        ;           Child Loop BB0_489 Depth 5
                                        ;           Child Loop BB0_491 Depth 5
                                        ;           Child Loop BB0_513 Depth 5
                                        ;           Child Loop BB0_521 Depth 5
                                        ;           Child Loop BB0_527 Depth 5
                                        ;           Child Loop BB0_536 Depth 5
                                        ;           Child Loop BB0_543 Depth 5
                                        ;           Child Loop BB0_546 Depth 5
                                        ;           Child Loop BB0_551 Depth 5
                                        ;           Child Loop BB0_558 Depth 5
                                        ;           Child Loop BB0_591 Depth 5
                                        ;           Child Loop BB0_599 Depth 5
                                        ;           Child Loop BB0_605 Depth 5
                                        ;           Child Loop BB0_614 Depth 5
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, 0
	s_mov_b32 s18, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_380
; %bb.379:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v3, v[32:33], off glc
.LBB0_380:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3)
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB0_440
; %bb.381:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_383
; %bb.382:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v69, v5
	global_atomic_cmpswap_b32 v3, v[48:49], v[68:69], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 0, v3
	v_cndmask_b32_e32 v3, 0x100, v3, vcc_lo
.LBB0_383:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s34, v3
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc1 .LBB0_441
; %bb.384:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v27, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_386
; %bb.385:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v3, v[48:49], off glc
.LBB0_386:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_mov_b32 s16, 2
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s20, 0x10100
	s_cbranch_scc1 .LBB0_474
; %bb.387:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_391
; %bb.388:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[23:24], v[50:51], off glc
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, s2, s6, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v4, s2, s7, v24, s2
	v_cmp_lt_u64_e64 s2, 0x752f, v[3:4]
	v_mov_b32_e32 v3, 1
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_390
; %bb.389:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v21, s6 :: v_dual_mov_b32 v22, s7
	global_atomic_cmpswap_b64 v[3:4], v[50:51], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, v[3:4], v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, 1, 2, s2
.LBB0_390:                              ; %Flow1306
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_391:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_readfirstlane_b32 s3, v3
	s_mov_b32 s16, 1
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s3, 1
	s_cbranch_scc1 .LBB0_474
; %bb.392:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s21, vcc_lo
	s_cbranch_execz .LBB0_421
; %bb.393:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_399
; %bb.394:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_398
; %bb.395:                              ; %.preheader3.i.i.i75.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_396:                              ; %.preheader3.i.i.i75
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_396
; %bb.397:                              ; %Flow1300
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_398:                              ; %Flow1302
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_399:                              ; %.loopexit4.i.i.i70
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s35, s7, 24
	s_mul_hi_u32 s36, s6, 24
	s_mul_i32 s37, s6, 24
	s_and_saveexec_b32 s38, s2
	s_cbranch_execz .LBB0_401
; %bb.400:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s36, s35
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_401:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s38
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v15, v5 :: v_dual_mov_b32 v26, s7
	v_dual_mov_b32 v16, v5 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v24, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[15:18], off
	global_store_b128 v[11:12], v[23:26], off offset:16
	global_store_b128 v[11:12], v[23:26], off offset:32
	global_store_b128 v[11:12], v[23:26], off offset:48
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_409
; %bb.402:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_405
; %bb.403:                              ; %.preheader1.i.i.i73.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_404:                              ; %.preheader1.i.i.i73
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[25:26]
	v_dual_mov_b32 v26, v16 :: v_dual_mov_b32 v25, v15
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_404
.LBB0_405:                              ; %Flow1298
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[15:16], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_407
; %bb.406:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[15:16], v[4:5], off offset:8
.LBB0_407:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[18:19], v[15:16], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	s_cbranch_vccnz .LBB0_409
; %bb.408:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[15:16], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[18:19], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_409:                              ; %Flow1299
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s36, s36, s35
	v_add_co_u32 v3, vcc_lo, v21, s37
	v_add_co_ci_u32_e32 v4, vcc_lo, s36, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_410:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_412
; %bb.411:                              ;   in Loop: Header=BB0_410 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_412:                              ;   in Loop: Header=BB0_410 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_414
; %bb.413:                              ;   in Loop: Header=BB0_410 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_415
.LBB0_414:                              ;   in Loop: Header=BB0_410 Depth=5
	s_mov_b32 s5, -1
.LBB0_415:                              ; %Flow1293
                                        ;   in Loop: Header=BB0_410 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_410
; %bb.416:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_420
; %bb.417:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17] offset:24 glc
	global_load_b64 v[18:19], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v12, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v24, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v21, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v22, vcc_lo, s19, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v23 :: v_dual_cndmask_b32 v21, v21, v6
	v_dual_mov_b32 v23, v15 :: v_dual_and_b32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v18, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v6, vcc_lo
	global_store_b64 v[11:12], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[15:16]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_420
; %bb.418:                              ; %.preheader.i.i.i72.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, 0
.LBB0_419:                              ; %.preheader.i.i.i72
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[15:16], v[23:24]
	v_dual_mov_b32 v24, v16 :: v_dual_mov_b32 v23, v15
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_419
.LBB0_420:                              ; %Flow1291
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_421:                              ; %Flow1303
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s18, v3
	v_readfirstlane_b32 s19, v4
	s_cmp_eq_u64 s[18:19], 0
	s_cbranch_scc1 .LBB0_473
; %bb.422:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v11, s2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x300, v11
	s_cbranch_execz .LBB0_425
; %bb.423:                              ; %.preheader185.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_lshlrev_b32_e32 v3, 3, v11
	s_bcnt1_i32_b32 s6, s2
	s_mov_b32 s16, 0
	s_lshl_b32 s7, s6, 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s2, s18, v3
	v_add_co_ci_u32_e64 v4, null, s19, 0, s2
.LBB0_424:                              ; %.preheader185
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v11, s6, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x2ff, v11
	global_store_b64 v[3:4], v[5:6], off
	v_add_co_u32 v3, s2, v3, s7
	v_add_co_ci_u32_e64 v4, s2, 0, v4, s2
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_424
.LBB0_425:                              ; %Flow1285
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $sgpr5
.LBB0_426:                              ; %.loopexit186
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e32 vcc_lo, 0, v27
	v_mov_b32_e32 v3, s20
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_428
; %bb.427:                              ;   in Loop: Header=BB0_426 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB0_428:                              ;   in Loop: Header=BB0_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s20, v3
	s_and_not1_b32 s2, s5, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s2, s5
	s_cmp_lg_u32 s20, 0x10100
	s_cbranch_scc0 .LBB0_435
; %bb.429:                              ;   in Loop: Header=BB0_426 Depth=5
	v_mov_b32_e32 v3, s3
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_433
; %bb.430:                              ;   in Loop: Header=BB0_426 Depth=5
	s_add_i32 s2, s20, 0xffffff00
	v_mov_b32_e32 v6, v5
	s_lshr_b32 s2, s2, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	v_mad_u64_u32 v[11:12], null, s2, 24, v[3:4]
	v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v4, s19
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e64 s2, 0, v[3:4]
	v_mov_b32_e32 v3, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_432
; %bb.431:                              ;   in Loop: Header=BB0_426 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[48:49], v68, off
	v_mov_b32_e32 v3, 0
.LBB0_432:                              ; %Flow1278
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_433:                              ;   in Loop: Header=BB0_426 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_436
; %bb.434:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s6, 0
	s_and_not1_b32 vcc_lo, vcc_lo, exec_lo
	s_sleep 2
                                        ; implicit-def: $sgpr3
	s_branch .LBB0_437
.LBB0_435:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s16, -1
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
                                        ; implicit-def: $sgpr7
	s_branch .LBB0_438
.LBB0_436:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr27
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr2
.LBB0_437:                              ; %Flow1282
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s17, vcc_lo, exec_lo
	s_mov_b32 s7, 0
	s_mov_b32 s16, 0
	s_or_b32 s5, s5, s17
.LBB0_438:                              ; %Flow1281
                                        ;   in Loop: Header=BB0_426 Depth=5
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_442
; %bb.439:                              ;   in Loop: Header=BB0_426 Depth=5
	s_mov_b32 s3, s2
	s_branch .LBB0_426
.LBB0_440:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v4 :: v_dual_mov_b32 v30, v3
	s_branch .LBB0_502
.LBB0_441:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s5, -1
                                        ; implicit-def: $sgpr18
	s_branch .LBB0_494
.LBB0_442:                              ; %loop.exit.guard925
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_472
; %bb.443:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s35, s5
	s_cbranch_execz .LBB0_471
; %bb.444:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_450
; %bb.445:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_449
; %bb.446:                              ; %.preheader3.i.i.i82.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_447:                              ; %.preheader3.i.i.i82
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_447
; %bb.448:                              ; %Flow1273
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_449:                              ; %Flow1275
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_450:                              ; %.loopexit4.i.i.i77
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s20, v11
	v_readfirstlane_b32 s21, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[20:21], s[6:7]
	s_mul_i32 s36, s7, 24
	s_mul_hi_u32 s37, s6, 24
	s_mul_i32 s38, s6, 24
	s_and_saveexec_b32 s39, s2
	s_cbranch_execz .LBB0_452
; %bb.451:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s37, s36
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_452:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s39
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v11, s18 :: v_dual_mov_b32 v12, s19
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_460
; %bb.453:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s20 :: v_dual_mov_b32 v81, s21
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s21, v4
	v_and_b32_e32 v3, s20, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_456
; %bb.454:                              ; %.preheader1.i.i.i80.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_455:                              ; %.preheader1.i.i.i80
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s20 :: v_dual_mov_b32 v24, s21
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_455
.LBB0_456:                              ; %Flow1271
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_458
; %bb.457:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_458:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_460
; %bb.459:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_460:                              ; %Flow1272
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s37, s37, s36
	v_add_co_u32 v3, vcc_lo, v21, s38
	v_add_co_ci_u32_e32 v4, vcc_lo, s37, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_461:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_463
; %bb.462:                              ;   in Loop: Header=BB0_461 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_463:                              ;   in Loop: Header=BB0_461 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_465
; %bb.464:                              ;   in Loop: Header=BB0_461 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_466
.LBB0_465:                              ;   in Loop: Header=BB0_461 Depth=5
	s_mov_b32 s5, -1
.LBB0_466:                              ; %Flow1266
                                        ;   in Loop: Header=BB0_461 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_461
; %bb.467:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_471
; %bb.468:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s20
	v_add_co_ci_u32_e32 v19, vcc_lo, s21, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_471
; %bb.469:                              ; %.preheader.i.i.i79.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, 0
.LBB0_470:                              ; %.preheader.i.i.i79
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_470
.LBB0_471:                              ; %Flow1276
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_mov_b32 s7, s3
.LBB0_472:                              ; %Flow1277
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s3, s7
.LBB0_473:                              ; %Flow1287
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s16, s3
.LBB0_474:                              ; %__ockl_devmem_request.exit83
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_cmp_eq_u32 s16, 0
	s_cselect_b32 s5, -1, 0
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_493
; %bb.475:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_492
; %bb.476:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[50:51], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x7530, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_492
; %bb.477:                              ;   in Loop: Header=BB0_378 Depth=4
	v_sub_nc_u32_e32 v3, 0x7530, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_478:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x659
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_481
; %bb.479:                              ; %.preheader11.i
                                        ;   in Loop: Header=BB0_478 Depth=5
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_478
.LBB0_480:                              ; %.preheader9.i
                                        ;   in Loop: Header=BB0_481 Depth=5
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_481:                              ; %Flow1257
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x326
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_480
; %bb.482:                              ; %Flow1254
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_485
.LBB0_483:                              ; %.preheader7.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x18c
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_483
	s_branch .LBB0_485
.LBB0_484:                              ; %.preheader5.i
                                        ;   in Loop: Header=BB0_485 Depth=5
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_485:                              ; %.loopexit8.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0xc0
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_484
	s_branch .LBB0_487
.LBB0_486:                              ; %.preheader3.i
                                        ;   in Loop: Header=BB0_487 Depth=5
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_487:                              ; %Flow1248
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 0x59
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_486
	s_branch .LBB0_489
.LBB0_488:                              ; %.preheader1.i
                                        ;   in Loop: Header=BB0_489 Depth=5
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_489:                              ; %Flow1245
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s6, 38
	s_addc_u32 s19, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s18, s[2:3], s[18:19]
	s_and_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccz .LBB0_488
; %bb.490:                              ; %Flow1242
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_492
.LBB0_491:                              ; %.preheader.i
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_491
.LBB0_492:                              ; %__ockl_rtcwait_u32.exit
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	s_cmp_lg_u32 s16, 2
	v_mov_b32_e32 v31, s4
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v30, 0, 1, s2
.LBB0_493:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
.LBB0_494:                              ; %Flow1309
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_502
; %bb.495:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_499
; %bb.496:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[23:24], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v23
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_u64_e32 vcc_lo, 0x4e1f, v[3:4]
	v_mov_b32_e32 v3, 1
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_498
; %bb.497:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v21, s2 :: v_dual_mov_b32 v22, s3
	global_atomic_cmpswap_b64 v[3:4], v[52:53], v[21:24], off glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[3:4], v[23:24]
	v_mov_b32_e32 v4, s4
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB0_498:                              ; %Flow1236
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_499:                              ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u64 s[2:3], 0
	s_cbranch_scc0 .LBB0_503
; %bb.500:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
.LBB0_501:                              ; %Flow1235
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v31, v16 :: v_dual_mov_b32 v30, v15
.LBB0_502:                              ; %Flow1312
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_378
	s_branch .LBB0_618
.LBB0_503:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v15 :: v_dual_mov_b32 v4, v16
	s_and_saveexec_b32 s18, s1
	s_cbranch_execz .LBB0_539
; %bb.504:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[3:4], v5, s[12:13] glc
	global_load_b64 v[11:12], v5, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ge_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_cbranch_vccnz .LBB0_508
; %bb.505:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s2, exec_lo
	s_mov_b32 s1, exec_lo
	v_mbcnt_lo_u32_b32 v6, s2, 0
                                        ; implicit-def: $vgpr3_vgpr4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_507
; %bb.506:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s2, s2, 21
	v_mov_b32_e32 v4, s2
	global_atomic_add_u64 v[3:4], v5, v[4:5], s[12:13] glc
.LBB0_507:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, 0x200000, v6, s[2:3]
	v_cmp_ge_u64_e64 s1, v[3:4], v[11:12]
	s_branch .LBB0_509
.LBB0_508:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, -1
                                        ; implicit-def: $vgpr3_vgpr4
.LBB0_509:                              ; %Flow1233
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB0_538
; %bb.510:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_516
; %bb.511:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v18, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v19, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_515
; %bb.512:                              ; %.preheader3.i.i.i89.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_513:                              ; %.preheader3.i.i.i89
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b64 v[21:22], v5, s[2:3]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v18, v23
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v12 :: v_dual_and_b32 v6, v19, v24
	v_mad_u64_u32 v[18:19], null, v6, 24, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v12, v18
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_513
; %bb.514:                              ; %Flow1229
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_515:                              ; %Flow1231
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_516:                              ; %.loopexit4.i.i.i84
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[18:19], v5, s[2:3] offset:40
	global_load_b128 v[22:25], v5, s[2:3]
	v_readfirstlane_b32 s16, v11
	v_readfirstlane_b32 s17, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v18
	v_readfirstlane_b32 s7, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[16:17], s[6:7]
	s_mul_i32 s20, s7, 24
	s_mul_hi_u32 s21, s6, 24
	s_mul_i32 s35, s6, 24
	s_and_saveexec_b32 s36, s1
	s_cbranch_execz .LBB0_518
; %bb.517:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s21, s20
	s_waitcnt vmcnt(0)
	v_add_co_u32 v18, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v23, vcc_lo
	global_store_b128 v[18:19], v[11:14], off offset:8
.LBB0_518:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s36
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v24, s6
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v25, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v12, vcc_lo, v12, v4, vcc_lo
	v_dual_mov_b32 v18, v5 :: v_dual_mov_b32 v27, s7
	v_dual_mov_b32 v19, v5 :: v_dual_mov_b32 v26, s6
	v_dual_mov_b32 v21, v5 :: v_dual_mov_b32 v24, s4
	v_mov_b32_e32 v25, s5
	s_clause 0x3
	global_store_b128 v[11:12], v[18:21], off
	global_store_b128 v[11:12], v[24:27], off offset:16
	global_store_b128 v[11:12], v[24:27], off offset:32
	global_store_b128 v[11:12], v[24:27], off offset:48
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_526
; %bb.519:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[2:3] offset:32 glc
	global_load_b64 v[3:4], v5, s[2:3] offset:40
	s_mov_b32 s6, exec_lo
	v_dual_mov_b32 v80, s16 :: v_dual_mov_b32 v81, s17
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s17, v4
	v_and_b32_e32 v3, s16, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v22, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v23, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[26:27], v5, v[80:83], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[26:27], v[82:83]
	s_cbranch_execz .LBB0_522
; %bb.520:                              ; %.preheader1.i.i.i87.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_521:                              ; %.preheader1.i.i.i87
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v24, s16 :: v_dual_mov_b32 v25, s17
	s_sleep 1
	global_store_b64 v[3:4], v[26:27], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[24:27], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[26:27]
	v_dual_mov_b32 v27, v19 :: v_dual_mov_b32 v26, v18
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_521
.LBB0_522:                              ; %Flow1227
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	global_load_b64 v[18:19], v5, s[2:3] offset:16
	s_mov_b32 s7, exec_lo
	s_mov_b32 s6, exec_lo
	v_mbcnt_lo_u32_b32 v3, s7, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_524
; %bb.523:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s7, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s7
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[18:19], v[4:5], off offset:8
.LBB0_524:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	global_load_b64 v[24:25], v[18:19], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[24:25]
	s_cbranch_vccnz .LBB0_526
; %bb.525:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[18:19], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[24:25], v[4:5], off
	s_and_b32 m0, s6, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_526:                              ; %Flow1228
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	s_add_i32 s21, s21, s20
	v_add_co_u32 v3, vcc_lo, v22, s35
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v23, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_527:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_529
; %bb.528:                              ;   in Loop: Header=BB0_527 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_529:                              ;   in Loop: Header=BB0_527 Depth=5
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s5, v6
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc1 .LBB0_531
; %bb.530:                              ;   in Loop: Header=BB0_527 Depth=5
	s_mov_b32 s5, 0
	s_sleep 1
	s_branch .LBB0_532
.LBB0_531:                              ;   in Loop: Header=BB0_527 Depth=5
	s_mov_b32 s5, -1
.LBB0_532:                              ; %Flow1222
                                        ;   in Loop: Header=BB0_527 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_527
; %bb.533:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b64 v[3:4], v[11:12], off
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_537
; %bb.534:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[11:12], v5, s[2:3] offset:40
	global_load_b64 v[18:19], v5, s[2:3] offset:24 glc
	global_load_b64 v[23:24], v5, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v25, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v21, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v22, vcc_lo, s17, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[21:22]
	v_dual_cndmask_b32 v22, v22, v25 :: v_dual_cndmask_b32 v21, v21, v6
	v_and_b32_e32 v6, v22, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v11, v21, v11
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v12, v11, 24
	v_mul_lo_u32 v11, v11, 24
	v_add_nc_u32_e32 v6, v12, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v23, v11
	v_mov_b32_e32 v23, v18
	v_add_co_ci_u32_e32 v12, vcc_lo, v24, v6, vcc_lo
	v_mov_b32_e32 v24, v19
	global_store_b64 v[11:12], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_537
; %bb.535:                              ; %.preheader.i.i.i86.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, 0
.LBB0_536:                              ; %.preheader.i.i.i86
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[11:12], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v5, v[21:24], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[23:24]
	v_dual_mov_b32 v24, v19 :: v_dual_mov_b32 v23, v18
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_536
.LBB0_537:                              ; %Flow1220
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_538:                              ; %Flow1234
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
.LBB0_539:                              ; %__ockl_devmem_request.exit90
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v3
	v_readfirstlane_b32 s3, v4
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc1 .LBB0_584
; %bb.540:                              ;   in Loop: Header=BB0_378 Depth=4
	v_mbcnt_lo_u32_b32 v4, exec_lo, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b32 v6, v[38:39], off
	s_bcnt1_i32_b32 s5, exec_lo
	s_add_u32 s6, s2, 16
	s_addc_u32 s7, s3, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v3, 5, v3
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s16, exec_lo, s1
	s_cbranch_execz .LBB0_548
; %bb.541:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v15, v[54:55], off
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_544
; %bb.542:                              ; %.preheader182.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_543:                              ; %.preheader182
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	global_store_b32 v[11:12], v5, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_543
.LBB0_544:                              ; %Flow1209
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
	global_load_b32 v16, v[64:65], off
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v15, v4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_u32_e64 v11, v6
	s_cbranch_execz .LBB0_547
; %bb.545:                              ; %.preheader180.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_mul_lo_u32 v12, v15, s5
	s_mov_b32 s17, 0
.LBB0_546:                              ; %.preheader180
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_lshlrev_b32_e64 v15, v11, 1
	v_lshrrev_b32_e32 v16, 3, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v11, v12
	v_and_b32_e32 v16, 0x1ffffffc, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, v11, v6
	global_store_b32 v16, v15, s[6:7]
	s_or_b32 s17, vcc_lo, s17
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_546
.LBB0_547:                              ; %Flow1206
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_548:                              ; %Flow1214
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB0_553
; %bb.549:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s17, exec_lo
	v_cmpx_lt_u32_e64 v4, v3
	s_cbranch_execz .LBB0_552
; %bb.550:                              ; %.preheader178.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v15, v[66:67], off
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_mov_b32_e32 v16, v4
	s_lshl_b32 s18, s5, 2
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
.LBB0_551:                              ; %.preheader178
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_add_nc_u32_e32 v16, s5, v16
	s_waitcnt vmcnt(0)
	global_store_b32 v[11:12], v15, off
	v_add_co_u32 v11, s1, v11, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v12, s1, 0, v12, s1
	v_cmp_ge_u32_e32 vcc_lo, v16, v3
	s_or_b32 s19, vcc_lo, s19
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB0_551
.LBB0_552:                              ; %Flow1212
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_553:                              ; %.loopexit179
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_557
; %bb.554:                              ;   in Loop: Header=BB0_378 Depth=4
	v_and_b32_e32 v6, 31, v6
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v6
	s_cbranch_execz .LBB0_556
; %bb.555:                              ;   in Loop: Header=BB0_378 Depth=4
	v_add_nc_u32_e32 v4, -1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[4:5]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_lshl_or_b32 v6, -1, v6, v11
	global_store_b32 v[3:4], v6, off
.LBB0_556:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s5
	global_store_b128 v5, v[7:10], s[2:3]
.LBB0_557:                              ; %Flow1203
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $sgpr5
.LBB0_558:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	;;#ASMSTART
	;;#ASMEND
	v_cmp_eq_u32_e64 s1, 0, v71
	v_mov_b32_e32 v3, s31
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_560
; %bb.559:                              ;   in Loop: Header=BB0_558 Depth=5
	global_load_b32 v3, v[32:33], off glc
.LBB0_560:                              ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s31, v3
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s6, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s5, s5, s6
	s_cmp_eq_u32 s31, 0x10100
	s_cbranch_scc1 .LBB0_567
; %bb.561:                              ;   in Loop: Header=BB0_558 Depth=5
	v_mov_b32_e32 v3, s34
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_563
; %bb.562:                              ;   in Loop: Header=BB0_558 Depth=5
	global_load_b32 v3, v[48:49], off glc
.LBB0_563:                              ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s6
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s34, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_cmp_lg_u32 s31, s34
	s_cbranch_scc0 .LBB0_568
; %bb.564:                              ;   in Loop: Header=BB0_558 Depth=5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_575
; %bb.565:                              ;   in Loop: Header=BB0_558 Depth=5
	s_cmpk_lt_u32 s31, 0x100
	s_cbranch_scc0 .LBB0_569
; %bb.566:                              ;   in Loop: Header=BB0_558 Depth=5
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	s_mov_b32 s7, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s31, 24, v[3:4]
	s_branch .LBB0_570
.LBB0_567:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b64 s[16:17], 0
	s_mov_b32 s1, -1
	s_mov_b32 s18, 0
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_580
.LBB0_568:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s18, -1
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
                                        ; implicit-def: $sgpr6_sgpr7
	s_branch .LBB0_579
.LBB0_569:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s7, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_570:                              ; %Flow1195
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_572
; %bb.571:                              ;   in Loop: Header=BB0_558 Depth=5
	s_add_i32 s7, s31, 0xffffff00
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s7, 8
	s_add_u32 s16, s10, 0x2800
	s_addc_u32 s17, s11, 0
	v_mad_u64_u32 v[3:4], null, 0x1800, v7, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
	s_and_b32 s7, s31, 0xff
	global_load_b64 v[3:4], v[11:12], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, s7, 24, v[3:4]
.LBB0_572:                              ;   in Loop: Header=BB0_558 Depth=5
	v_dual_mov_b32 v15, s31 :: v_dual_mov_b32 v4, s3
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v6, v5
	global_store_b32 v5, v15, s[2:3] offset:4
	global_atomic_cmpswap_b64 v[3:4], v[11:12], v[3:6], off offset:8 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB0_574
; %bb.573:                              ;   in Loop: Header=BB0_558 Depth=5
	s_waitcnt_vscnt null, 0x0
	global_atomic_add_u32 v[32:33], v118, off
	v_dual_mov_b32 v3, v11 :: v_dual_mov_b32 v4, v12
.LBB0_574:                              ; %Flow1193
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_575:                              ; %Flow1196
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s6
	v_readfirstlane_b32 s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s7, v4
	s_cmp_lg_u64 s[6:7], 0
	s_cbranch_scc0 .LBB0_577
; %bb.576:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s19, -1
                                        ; implicit-def: $sgpr31
                                        ; implicit-def: $sgpr34
	s_branch .LBB0_578
.LBB0_577:                              ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s19, 0
	s_and_not1_b32 s1, s1, exec_lo
	s_sleep 2
.LBB0_578:                              ; %Flow1201
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_mov_b32 s18, 0
.LBB0_579:                              ; %Flow1200
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_and_not1_b32 s5, s5, exec_lo
	s_and_b32 s16, s1, exec_lo
	s_mov_b32 s1, 0
	s_or_b32 s5, s5, s16
                                        ; implicit-def: $sgpr16_sgpr17
.LBB0_580:                              ; %Flow1199
                                        ;   in Loop: Header=BB0_558 Depth=5
	s_and_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccz .LBB0_558
; %bb.581:                              ; %loop.exit.guard930
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v15, s16 :: v_dual_mov_b32 v16, s17
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_501
; %bb.582:                              ; %loop.exit.guard931
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_xor_b32 s1, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccz .LBB0_585
; %bb.583:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB0_586
.LBB0_584:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, 0
	s_branch .LBB0_501
.LBB0_585:                              ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s18, -1
                                        ; implicit-def: $sgpr6_sgpr7
.LBB0_586:                              ; %Flow1190
                                        ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v16, s7 :: v_dual_mov_b32 v15, s6
	s_and_not1_b32 vcc_lo, exec_lo, s18
	s_cbranch_vccnz .LBB0_501
; %bb.587:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s20, s5
	s_cbranch_execz .LBB0_616
; %bb.588:                              ;   in Loop: Header=BB0_378 Depth=4
	s_load_b64 s[16:17], s[8:9], 0x50
	v_dual_mov_b32 v4, v2 :: v_dual_mov_b32 v11, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s1, v4
	v_mov_b32_e32 v12, 0
	v_cmp_eq_u32_e64 s1, s1, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_594
; %bb.589:                              ;   in Loop: Header=BB0_378 Depth=4
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[23:24], v5, s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[11:12], v5, s[16:17] offset:40
	global_load_b64 v[15:16], v5, s[16:17]
	s_mov_b32 s6, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v12, v24
	v_and_b32_e32 v6, v11, v23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v11, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v3, vcc_lo
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[11:12], v[23:24]
	s_cbranch_execz .LBB0_593
; %bb.590:                              ; %.preheader3.i.i.i96.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s7, 0
.LBB0_591:                              ; %.preheader3.i.i.i96
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b64 v[18:19], v5, s[16:17]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v15, v23
	v_and_b32_e32 v6, v16, v24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v3, 24, v[18:19]
	v_mov_b32_e32 v3, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[15:16], null, v6, 24, v[3:4]
	v_mov_b32_e32 v12, v15
	global_load_b64 v[21:22], v[11:12], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_591
; %bb.592:                              ; %Flow1186
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_593:                              ; %Flow1188
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_594:                              ; %.loopexit4.i.i.i91
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[15:16], v5, s[16:17] offset:40
	global_load_b128 v[21:24], v5, s[16:17]
	v_readfirstlane_b32 s18, v11
	v_readfirstlane_b32 s19, v12
	s_mov_b32 s5, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v15
	v_readfirstlane_b32 s7, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[18:19], s[6:7]
	s_mul_i32 s21, s7, 24
	s_mul_hi_u32 s31, s6, 24
	s_mul_i32 s34, s6, 24
	s_and_saveexec_b32 s35, s1
	s_cbranch_execz .LBB0_596
; %bb.595:                              ;   in Loop: Header=BB0_378 Depth=4
	v_dual_mov_b32 v11, s5 :: v_dual_mov_b32 v12, v5
	s_add_i32 s5, s31, s21
	s_waitcnt vmcnt(0)
	v_add_co_u32 v15, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v22, vcc_lo
	global_store_b128 v[15:16], v[11:14], off offset:8
.LBB0_596:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s35
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[3:4], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v23, s6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v24, vcc_lo
	s_mov_b32 s7, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_mov_b32 s5, s4
	s_mov_b32 s6, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_dual_mov_b32 v12, s3 :: v_dual_mov_b32 v11, s2
	v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
	v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
	v_mov_b32_e32 v6, v5
	s_clause 0x4
	global_store_b64 v[3:4], v[11:12], off
	global_store_b128 v[3:4], v[23:26], off offset:8
	global_store_b128 v[3:4], v[23:26], off offset:24
	global_store_b128 v[3:4], v[23:26], off offset:40
	global_store_b64 v[3:4], v[5:6], off offset:56
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_604
; %bb.597:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x1
	global_load_b64 v[82:83], v5, s[16:17] offset:32 glc
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	s_mov_b32 s3, exec_lo
	v_dual_mov_b32 v80, s18 :: v_dual_mov_b32 v81, s19
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, s19, v4
	v_and_b32_e32 v3, s18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v6, v4
	v_add_co_u32 v3, vcc_lo, v21, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v22, v4, vcc_lo
	global_store_b64 v[3:4], v[82:83], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[25:26], v5, v[80:83], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[25:26], v[82:83]
	s_cbranch_execz .LBB0_600
; %bb.598:                              ; %.preheader1.i.i.i94.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s5, 0
.LBB0_599:                              ; %.preheader1.i.i.i94
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_dual_mov_b32 v23, s18 :: v_dual_mov_b32 v24, s19
	s_sleep 1
	global_store_b64 v[3:4], v[25:26], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[23:26], s[16:17] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[25:26]
	v_dual_mov_b32 v26, v12 :: v_dual_mov_b32 v25, v11
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_599
.LBB0_600:                              ; %Flow1184
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b64 v[11:12], v5, s[16:17] offset:16
	s_mov_b32 s5, exec_lo
	s_mov_b32 s3, exec_lo
	v_mbcnt_lo_u32_b32 v3, s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_602
; %bb.601:                              ;   in Loop: Header=BB0_378 Depth=4
	s_bcnt1_i32_b32 s5, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s5
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[11:12], v[4:5], off offset:8
.LBB0_602:                              ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	global_load_b64 v[15:16], v[11:12], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[15:16]
	s_cbranch_vccnz .LBB0_604
; %bb.603:                              ;   in Loop: Header=BB0_378 Depth=4
	global_load_b32 v4, v[11:12], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s3, v4
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[15:16], v[4:5], off
	s_and_b32 m0, s3, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_604:                              ; %Flow1185
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s31, s31, s21
	v_add_co_u32 v3, vcc_lo, v21, s34
	v_add_co_ci_u32_e32 v4, vcc_lo, s31, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
.LBB0_605:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_607
; %bb.606:                              ;   in Loop: Header=BB0_605 Depth=5
	global_load_b32 v6, v[3:4], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_607:                              ;   in Loop: Header=BB0_605 Depth=5
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v6
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_609
; %bb.608:                              ;   in Loop: Header=BB0_605 Depth=5
	s_mov_b32 s2, 0
	s_sleep 1
	s_branch .LBB0_610
.LBB0_609:                              ;   in Loop: Header=BB0_605 Depth=5
	s_mov_b32 s2, -1
.LBB0_610:                              ; %Flow1179
                                        ;   in Loop: Header=BB0_605 Depth=5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_605
; %bb.611:                              ;   in Loop: Header=BB0_378 Depth=4
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_615
; %bb.612:                              ;   in Loop: Header=BB0_378 Depth=4
	s_clause 0x2
	global_load_b64 v[3:4], v5, s[16:17] offset:40
	global_load_b64 v[11:12], v5, s[16:17] offset:24 glc
	global_load_b64 v[15:16], v5, s[16:17]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v6, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v21, vcc_lo, 0, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v23, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, v6, s18
	v_add_co_ci_u32_e32 v19, vcc_lo, s19, v21, vcc_lo
	v_mov_b32_e32 v24, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[18:19]
	v_dual_cndmask_b32 v22, v19, v21 :: v_dual_cndmask_b32 v21, v18, v6
	v_and_b32_e32 v4, v22, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v21, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v6, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v15, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, v16, v4, vcc_lo
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[23:24], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[23:24], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_615
; %bb.613:                              ; %.preheader.i.i.i93.preheader
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_mov_b32 s1, 0
.LBB0_614:                              ; %.preheader.i.i.i93
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ;         Parent Loop BB0_378 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_sleep 1
	global_store_b64 v[3:4], v[23:24], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v5, v[21:24], s[16:17] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[23:24]
	v_dual_mov_b32 v24, v12 :: v_dual_mov_b32 v23, v11
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_614
.LBB0_615:                              ; %Flow1177
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v71, 0
.LBB0_616:                              ; %Flow1189
                                        ;   in Loop: Header=BB0_378 Depth=4
	s_or_b32 exec_lo, exec_lo, s20
	v_dual_mov_b32 v15, v30 :: v_dual_mov_b32 v16, v31
	s_mov_b32 s18, -1
	s_branch .LBB0_501
.LBB0_617:                              ;   in Loop: Header=BB0_347 Depth=3
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $sgpr29
                                        ; implicit-def: $vgpr70
	s_branch .LBB0_641
.LBB0_618:                              ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_ne_u64_e64 s5, 1, v[30:31]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_620
; %bb.619:                              ;   in Loop: Header=BB0_347 Depth=3
	v_dual_mov_b32 v28, v30 :: v_dual_mov_b32 v29, v31
	s_branch .LBB0_640
.LBB0_620:                              ;   in Loop: Header=BB0_347 Depth=3
	v_mbcnt_lo_u32_b32 v3, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_637
; %bb.621:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b64 v[3:4], v[52:53], off glc
	s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_sub_co_u32 v3, vcc_lo, s2, v3
	v_sub_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u64_e32 vcc_lo, 0x4e20, v[3:4]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_637
; %bb.622:                              ;   in Loop: Header=BB0_347 Depth=3
	v_sub_nc_u32_e32 v3, 0x4e20, v3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	v_readfirstlane_b32 s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_ashr_i32 s3, s2, 31
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s2
	s_addc_u32 s3, s7, s3
.LBB0_623:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x659
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_626
; %bb.624:                              ; %.preheader11.i110
                                        ;   in Loop: Header=BB0_623 Depth=4
	s_sleep 0x7f
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_branch .LBB0_623
.LBB0_625:                              ; %.preheader9.i109
                                        ;   in Loop: Header=BB0_626 Depth=4
	s_sleep 63
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_626:                              ; %Flow1171
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x326
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_625
; %bb.627:                              ; %Flow1168
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_630
.LBB0_628:                              ; %.preheader7.i108
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 31
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x18c
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_628
	s_branch .LBB0_630
.LBB0_629:                              ; %.preheader5.i107
                                        ;   in Loop: Header=BB0_630 Depth=4
	s_sleep 15
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_630:                              ; %.loopexit8.i100
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0xc0
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_629
	s_branch .LBB0_632
.LBB0_631:                              ; %.preheader3.i106
                                        ;   in Loop: Header=BB0_632 Depth=4
	s_sleep 7
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_632:                              ; %Flow1162
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 0x59
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_631
	s_branch .LBB0_634
.LBB0_633:                              ; %.preheader1.i105
                                        ;   in Loop: Header=BB0_634 Depth=4
	s_sleep 3
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
.LBB0_634:                              ; %Flow1159
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s6, 38
	s_addc_u32 s17, s7, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_u64_e64 s16, s[2:3], s[16:17]
	s_and_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccz .LBB0_633
; %bb.635:                              ; %Flow1156
                                        ;   in Loop: Header=BB0_347 Depth=3
	v_cmp_le_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_637
.LBB0_636:                              ; %.preheader.i104
                                        ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ;       Parent Loop BB0_347 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_sleep 1
	s_sendmsg_rtn_b64 s[6:7], sendmsg(MSG_RTN_GET_REALTIME)
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u64_e64 s6, s[2:3], s[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_636
.LBB0_637:                              ; %__ockl_rtcwait_u32.exit111
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v3, s29
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v70
	s_cbranch_execz .LBB0_639
; %bb.638:                              ;   in Loop: Header=BB0_347 Depth=3
	global_load_b32 v3, v[32:33], off glc
.LBB0_639:                              ;   in Loop: Header=BB0_347 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v3
.LBB0_640:                              ; %Flow1173
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v11, v28 :: v_dual_mov_b32 v12, v29
.LBB0_641:                              ; %Flow1318
                                        ;   in Loop: Header=BB0_347 Depth=3
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB0_347
.LBB0_642:                              ; %.loopexit189
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	s_cmp_eq_u64 s[6:7], 0
	s_cbranch_scc1 .LBB0_663
; %bb.643:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mbcnt_lo_u32_b32 v3, s5, 0
	;;#ASMSTART
	;;#ASMEND
	global_load_b64 v[0:1], v5, s[6:7] offset:8 glc
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_waitcnt vmcnt(0)
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v4
	v_mov_b32_e32 v4, 0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_647
; %bb.644:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s17, exec_lo
	s_bcnt1_i32_b32 s5, s5
	v_mbcnt_lo_u32_b32 v4, s17, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $vgpr6
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_646
; %bb.645:                              ;   in Loop: Header=BB0_6 Depth=2
	s_bcnt1_i32_b32 s1, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s5, s1
	v_mov_b32_e32 v6, s1
	global_atomic_add_u32 v6, v[0:1], v6, off offset:8 glc
.LBB0_646:                              ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s16
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u32_u24 v4, s5, v4, s1
.LBB0_647:                              ; %Flow944
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_mov_b32 s3, s4
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+4
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+12
	s_lshl_b64 s[16:17], s[2:3], 5
	v_mov_b32_e32 v11, 0
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_readfirstlane_b32 s1, v4
	s_load_b32 s5, s[18:19], 0x0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s3, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s3, 32
	s_cbranch_scc1 .LBB0_657
; %bb.648:                              ;   in Loop: Header=BB0_6 Depth=2
	v_cvt_f32_u32_e32 v4, s5
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+32
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+40
	s_lshr_b32 s3, s3, 5
	s_add_u32 s18, s16, s18
	s_addc_u32 s19, s17, s19
	v_rcp_iflag_f32_e32 v4, v4
	s_load_b32 s18, s[18:19], 0x0
	s_sub_i32 s19, 0, s5
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v4, 0x4f7ffffe, v4 :: v_dual_add_nc_u32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v4, v4
	v_mul_lo_u32 v6, s19, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v3, s18, v3
	s_getpc_b64 s[18:19]
	s_add_u32 s18, s18, __unnamed_1@rel32@lo+16
	s_addc_u32 s19, s19, __unnamed_1@rel32@hi+24
	s_add_u32 s16, s16, s18
	s_addc_u32 s17, s17, s19
	s_lshr_b32 s18, s2, 1
	s_add_i32 s19, s3, -1
	s_add_i32 s18, s18, 4
	v_mul_hi_u32 v6, v4, v6
	s_lshl_b32 s18, 1, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v6
	v_cvt_f32_u32_e32 v6, s3
	v_mul_hi_u32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	v_mul_lo_u32 v4, v4, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v3, v3, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v6
	v_subrev_nc_u32_e32 v6, s5, v3
	v_cmp_le_u32_e64 s1, s5, v3
	v_cvt_u32_f32_e32 v15, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v3, v6, s1
	s_sub_i32 s1, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v11, s1, v15
	v_add_co_u32 v3, s1, v0, 16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v6, s1, 0, v1, s1
	v_subrev_nc_u32_e32 v12, s5, v4
	v_cmp_le_u32_e64 s1, s5, v4
	s_mov_b32 s5, 0
	v_mul_hi_u32 v16, v15, v11
	v_cndmask_b32_e64 v4, v4, v12, s1
	v_mov_b32_e32 v11, 0
	s_bfe_i32 s1, s2, 0x10000
	s_lshr_b32 s2, s18, 1
	v_mov_b32_e32 v12, 0
	v_lshrrev_b32_e32 v4, 5, v4
	v_add_nc_u32_e32 v18, v15, v16
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s18, s1, s18
.LBB0_649:                              ;   Parent Loop BB0_3 Depth=1
                                        ;     Parent Loop BB0_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], 2, v[4:5]
	s_mov_b32 s2, -1
	s_mov_b32 s20, exec_lo
                                        ; implicit-def: $vgpr19
	v_add_co_u32 v15, s1, v3, v15
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v16, s1, v6, v16, s1
	global_load_b32 v21, v[15:16], off glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 -1, v21
	s_cbranch_execz .LBB0_653
; %bb.650:                              ;   in Loop: Header=BB0_649 Depth=3
	v_not_b32_e32 v19, v21
	s_mov_b32 s21, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ctz_i32_b32_e32 v19, v19
	v_min_u32_e32 v21, 32, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e64 v19, v21, 1
	global_atomic_or_b32 v15, v[15:16], v19, off glc
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v15, v15, v19
	v_mov_b32_e32 v19, 0
	v_cmp_ne_u32_e64 s1, 0, v15
	v_cmpx_eq_u32_e32 0, v15
	s_cbranch_execz .LBB0_652
; %bb.651:                              ;   in Loop: Header=BB0_649 Depth=3
	s_load_b32 s2, s[16:17], 0x0
	v_lshl_add_u32 v11, v4, 5, v21
	v_mov_b32_e32 v19, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v11, v11, s18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s2, v0, s2
	v_add_co_ci_u32_e64 v15, s2, 0, v1, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v11, s2, v12, v11
	v_add_co_ci_u32_e64 v12, s2, 0, v15, s2
.LBB0_652:                              ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s21
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_not1_b32 s2, s1, exec_lo
.LBB0_653:                              ; %Flow941
                                        ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	s_and_saveexec_b32 s20, s2
; %bb.654:                              ;   in Loop: Header=BB0_649 Depth=3
	v_dual_mov_b32 v19, 0 :: v_dual_add_nc_u32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v4, v18
	v_mul_lo_u32 v15, v15, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v15
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
	v_subrev_nc_u32_e32 v15, s3, v4
	v_cmp_le_u32_e64 s1, s3, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v15, s1
; %bb.655:                              ;   in Loop: Header=BB0_649 Depth=3
	s_or_b32 exec_lo, exec_lo, s20
	v_cmp_ne_u32_e64 s1, 0, v19
	s_cmp_eq_u32 s19, 0
	s_cselect_b32 s2, -1, 0
	s_add_i32 s19, s19, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s5, s1, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_649
; %bb.656:                              ; %Flow942
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_657:                              ; %.loopexit193
                                        ;   in Loop: Header=BB0_6 Depth=2
	v_cmp_ne_u64_e64 s1, 0, v[11:12]
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_660
; %bb.658:                              ;   in Loop: Header=BB0_6 Depth=2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s5, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s5
	s_cbranch_execz .LBB0_660
; %bb.659:                              ;   in Loop: Header=BB0_6 Depth=2
	s_bcnt1_i32_b32 s1, s1
	s_bcnt1_i32_b32 s3, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s1, s3
	v_mov_b32_e32 v0, s1
	global_atomic_add_u32 v5, v0, s[6:7] offset:16
.LBB0_660:                              ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u64_e32 0, v[11:12]
; %bb.661:                              ;   in Loop: Header=BB0_6 Depth=2
	v_dual_mov_b32 v0, v11 :: v_dual_mov_b32 v119, 0
	v_dual_mov_b32 v128, 0 :: v_dual_mov_b32 v1, v12
; %bb.662:                              ; %Flow
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v3, v128 :: v_dual_mov_b32 v4, v119
.LBB0_663:                              ; %Flow945
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v119, v4
.LBB0_664:                              ; %Flow1324
                                        ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_6
.LBB0_665:                              ; %Flow1326
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_mov_b32_e32 v3, v119
.LBB0_666:                              ; %.loopexit197
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v3
	;;#ASMSTART
	;;#ASMEND
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	s_cbranch_vccnz .LBB0_3
; %bb.667:                              ; %Flow1328
                                        ; implicit-def: $vgpr4_vgpr5
.LBB0_668:                              ; %Flow1347
	s_and_not1_saveexec_b32 s1, s23
	s_cbranch_execz .LBB0_701
; %bb.669:
	s_load_b64 s[2:3], s[8:9], 0x50
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v2
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_675
; %bb.670:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[6:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v0, v0, v8
	v_and_b32_e32 v1, v1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v0, 24
	v_mul_lo_u32 v1, v1, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v10, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[8:9]
	s_cbranch_execz .LBB0_674
; %bb.671:                              ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_672:                              ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v6, 24, v[10:11]
	v_and_b32_e32 v10, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v10, 24, v[1:2]
	v_mov_b32_e32 v1, v6
	global_load_b64 v[6:7], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[8:9]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_672
; %bb.673:                              ; %Flow1343
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_674:                              ; %Flow1345
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_675:                              ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v0
	v_readfirstlane_b32 s5, v1
	s_mov_b32 s13, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[6:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s10, s7, 24
	s_mul_hi_u32 s11, s6, 24
	s_mul_i32 s12, s6, 24
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB0_677
; %bb.676:
	v_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, v3
	s_add_i32 s13, s11, s10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v7, vcc_lo
	v_dual_mov_b32 v12, 3 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[0:1], v[10:13], off offset:8
.LBB0_677:
	s_or_b32 exec_lo, exec_lo, s14
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[0:1], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v8, s6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v0
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v9, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v13, s19
	v_dual_mov_b32 v11, s17 :: v_dual_mov_b32 v12, s18
	s_clause 0x3
	global_store_b128 v[8:9], v[2:5], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_685
; %bb.678:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v4, vcc_lo, v6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v1, vcc_lo
	global_store_b64 v[4:5], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_681
; %bb.679:                              ; %.preheader1.i.i.i.preheader
	s_mov_b32 s13, 0
.LBB0_680:                              ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s13, vcc_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_680
.LBB0_681:                              ; %Flow1341
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s13, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s13, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_683
; %bb.682:
	s_bcnt1_i32_b32 s13, s13
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s13
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_683:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_685
; %bb.684:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_685:                              ; %Flow1342
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s11, s11, s10
	v_add_co_u32 v0, vcc_lo, v6, s12
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_686:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_688
; %bb.687:                              ;   in Loop: Header=BB0_686 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_688:                              ;   in Loop: Header=BB0_686 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_690
; %bb.689:                              ;   in Loop: Header=BB0_686 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_691
.LBB0_690:                              ;   in Loop: Header=BB0_686 Depth=1
	s_mov_b32 s6, -1
.LBB0_691:                              ; %Flow1336
                                        ;   in Loop: Header=BB0_686 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_686
; %bb.692:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_696
; %bb.693:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_696
; %bb.694:                              ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_695:                              ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_695
.LBB0_696:                              ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB0_700
; %bb.697:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB0_700
; %bb.698:
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v2, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	s_and_b32 s4, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s4
	s_cbranch_execz .LBB0_700
; %bb.699:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s2, s2
	s_bcnt1_i32_b32 s3, s3
	v_mov_b32_e32 v4, 0x1a000
	s_mul_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s2
	s_waitcnt lgkmcnt(0)
	global_atomic_add_u64 v4, v[2:3], s[4:5] offset:2184
.LBB0_700:
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_701:                              ; %Flow1348
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_702:                              ; %.loopexit198
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_readlane_b32 s30, v40, 11
	v_readlane_b32 s31, v40, 12
	v_readlane_b32 s44, v40, 10
	v_readlane_b32 s43, v40, 9
	v_readlane_b32 s42, v40, 8
	v_readlane_b32 s41, v40, 7
	v_readlane_b32 s40, v40, 6
	v_readlane_b32 s39, v40, 5
	v_readlane_b32 s38, v40, 4
	v_readlane_b32 s37, v40, 3
	v_readlane_b32 s36, v40, 2
	v_readlane_b32 s35, v40, 1
	v_readlane_b32 s34, v40, 0
	s_or_saveexec_b32 s0, -1
	scratch_load_b32 v40, off, s32          ; 4-byte Folded Reload
	s_mov_b32 exec_lo, s0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_dm_alloc, .Lfunc_end0-__ockl_dm_alloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 24288
; NumSgprs: 47
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 1
	.section	.text.unlikely.,"ax",@progbits
	.p2align	2                               ; -- Begin function __ockl_dm_dealloc
	.type	__ockl_dm_dealloc,@function
__ockl_dm_dealloc:                      ; @__ockl_dm_dealloc
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v2, 0xfff, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u64_e32 0, v[2:3]
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB1_12
; %bb.1:
	v_dual_mov_b32 v5, v1 :: v_dual_and_b32 v4, 0xffe00000, v0
	s_load_b64 s[0:1], s[8:9], 0x60
	v_and_b32_e32 v15, 0x1fffff, v0
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 0x2800
	s_addc_u32 s1, s1, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __unnamed_1@rel32@lo+16
	s_addc_u32 s3, s3, __unnamed_1@rel32@hi+24
	s_waitcnt vmcnt(0)
	v_lshrrev_b32_e32 v1, 1, v6
	v_bfe_i32 v2, v6, 0, 1
	v_and_b32_e32 v16, 0xff, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, 4, v1
	v_lshlrev_b32_e64 v1, v1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v8, 1, v1
	v_and_b32_e32 v2, v2, v8
	v_add_nc_u32_e32 v8, 0xffffff00, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v14, v2, v1
	v_mov_b32_e32 v2, v6
	v_lshrrev_b32_e32 v18, 8, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cvt_f32_u32_e32 v1, v14
	v_sub_nc_u32_e32 v0, 0, v14
	v_lshlrev_b64 v[12:13], 5, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_add_co_u32 v12, vcc_lo, v12, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v9, v0, v17
	v_mad_u64_u32 v[0:1], null, 0x1800, v6, s[0:1]
	v_cmp_gt_u32_e64 s0, 0x100, v7
	v_mul_hi_u32 v2, v17, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v7, 24, v[0:1]
	v_mad_u64_u32 v[10:11], null, v18, 24, v[0:1]
	v_dual_mov_b32 v17, 1 :: v_dual_add_nc_u32 v2, v17, v2
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v0, v17
	v_cmp_ne_u32_e32 vcc_lo, 0, v17
	v_mov_b32_e32 v17, 0
	;;#ASMSTART
	;;#ASMEND
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB1_11
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_readfirstlane_b32 s1, v6
	v_readfirstlane_b32 s2, v7
	v_mov_b32_e32 v17, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, s1, v6
	v_cmp_eq_u32_e64 s1, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB1_10
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s7, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s7, 0
	v_cmp_ne_u32_e64 s1, 0, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cndmask_b32_e64 v1, v9, 0, s1
	v_cndmask_b32_e64 v0, v8, 0, s1
	s_or_b32 s1, s1, s0
	s_xor_b32 s2, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	global_load_b64 v[17:18], v[10:11], off glc
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v16, 24, v[17:18]
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v17, v[12:13], off
	v_readfirstlane_b32 s2, v0
	v_readfirstlane_b32 s3, v1
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v17, v15, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v18, v17, v2
	v_mul_lo_u32 v19, v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, v17, v19
	v_add_nc_u32_e32 v19, 1, v18
	v_sub_nc_u32_e32 v20, v17, v14
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v18, v18, v19, s1
	v_cndmask_b32_e64 v17, v17, v20, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, 1, v18
	v_cmp_ge_u32_e64 s1, v17, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, v18, v19, s1
	v_lshrrev_b32_e32 v18, 3, v17
	v_lshlrev_b32_e64 v17, v17, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v18, 0x1ffffffc, v18
	v_not_b32_e32 v19, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v17, s1, v4, v18
	v_add_co_ci_u32_e64 v18, s1, 0, v5, s1
	global_atomic_and_b32 v[17:18], v19, off offset:16
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB1_9
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s10, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s11, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s11
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_bcnt1_i32_b32 s7, s7
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s10
	v_mov_b32_e32 v0, s7
	global_atomic_sub_u32 v3, v0, s[2:3] offset:16
.LBB1_9:                                ; %Flow16
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v17, 0
.LBB1_10:                               ; %Flow18
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_11:                               ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v0, v17
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
                                        ; implicit-def: $vgpr0_vgpr1
	s_cbranch_vccnz .LBB1_2
.LBB1_12:                               ; %Flow40
	s_and_not1_saveexec_b32 s1, s4
	s_cbranch_execz .LBB1_45
; %bb.13:
	s_mov_b32 s10, exec_lo
	v_cmpx_ne_u64_e32 0, v[0:1]
	s_cbranch_execz .LBB1_44
; %bb.14:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_20
; %bb.15:
	v_mov_b32_e32 v3, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[6:7], v3, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v5, v5, 24
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v10, v5
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v8, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo
	global_load_b64 v[4:5], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[6:7]
	s_cbranch_execz .LBB1_19
; %bb.16:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s6, 0
.LBB1_17:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[4:5], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3]
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v4, v6
	v_and_b32_e32 v5, v5, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]
	v_mov_b32_e32 v4, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]
	global_load_b64 v[4:5], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB1_17
; %bb.18:                               ; %Flow34
	s_or_b32 exec_lo, exec_lo, s6
.LBB1_19:                               ; %Flow36
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_20:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[10:11], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v10
	v_readfirstlane_b32 s7, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s11, s7, 24
	s_mul_hi_u32 s12, s6, 24
	s_mul_i32 s13, s6, 24
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB1_22
; %bb.21:
	v_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v9, v3
	s_add_i32 s14, s12, s11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v12, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v13, vcc_lo, s14, v5, vcc_lo
	v_dual_mov_b32 v10, 3 :: v_dual_mov_b32 v11, 1
	global_store_b128 v[12:13], v[8:11], off offset:8
.LBB1_22:
	s_or_b32 exec_lo, exec_lo, s15
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v2, v8
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v11, vcc_lo, v6, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v9, s19
	v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v8, s18
	s_clause 0x3
	global_store_b128 v[10:11], v[0:3], off
	global_store_b128 v[10:11], v[6:9], off offset:16
	global_store_b128 v[10:11], v[6:9], off offset:32
	global_store_b128 v[10:11], v[6:9], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_30
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v8, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v8, s[2:3] offset:40
	v_dual_mov_b32 v9, s4 :: v_dual_mov_b32 v10, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v6, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[6:7], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[11:12]
	s_cbranch_execz .LBB1_26
; %bb.24:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s14, 0
.LBB1_25:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[6:7], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s14, vcc_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB1_25
.LBB1_26:                               ; %Flow32
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s14, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s14, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB1_28
; %bb.27:
	s_bcnt1_i32_b32 s14, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s14
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB1_28:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB1_30
; %bb.29:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_30:                               ; %Flow33
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s12, s12, s11
	v_add_co_u32 v0, vcc_lo, v4, s13
	v_add_co_ci_u32_e32 v1, vcc_lo, s12, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_31:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_33
; %bb.32:                               ;   in Loop: Header=BB1_31 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_33:                               ;   in Loop: Header=BB1_31 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB1_35
; %bb.34:                               ;   in Loop: Header=BB1_31 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB1_36
.LBB1_35:                               ;   in Loop: Header=BB1_31 Depth=1
	s_mov_b32 s6, -1
.LBB1_36:                               ; %Flow27
                                        ;   in Loop: Header=BB1_31 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB1_31
; %bb.37:
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB1_41
; %bb.38:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3] offset:24 glc
	global_load_b64 v[4:5], v6, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_41
; %bb.39:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB1_40:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_40
.LBB1_41:                               ; %__ockl_devmem_request.exit
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_mbcnt_lo_u32_b32 v0, s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s2, exec_lo, vcc_lo
	s_mov_b32 exec_lo, s2
	s_cbranch_execz .LBB1_44
; %bb.42:
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v0, s2, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_b32 s3, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s3
	s_cbranch_execz .LBB1_44
; %bb.43:
	s_load_b64 s[4:5], s[8:9], 0x60
	s_bcnt1_i32_b32 s0, s0
	s_bcnt1_i32_b32 s2, s2
	v_mov_b32_e32 v2, 0x1a000
	s_mul_i32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s0
	s_waitcnt lgkmcnt(0)
	global_atomic_sub_u64 v2, v[0:1], s[4:5] offset:2184
.LBB1_44:                               ; %Flow38
	s_or_b32 exec_lo, exec_lo, s10
.LBB1_45:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end1:
	.size	__ockl_dm_dealloc, .Lfunc_end1-__ockl_dm_dealloc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2296
; NumSgprs: 34
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT ; -- Begin function _Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.globl	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
	.p2align	8
	.type	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT,@function
_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT:   ; @_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
; %bb.0:
	s_mov_b64 s[46:47], s[0:1]
	s_clause 0x2
	s_load_b32 s0, s[0:1], 0x38
	s_load_b32 s1, s[46:47], 0x44
	s_load_b256 s[48:55], s[46:47], 0x0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s0, s15
	s_and_b32 s1, s1, 0xffff
	s_add_i32 s0, s0, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[45:46], null, s0, s1, v[0:1]
	s_mov_b32 s0, exec_lo
	v_ashrrev_i32_e32 v46, 31, v45
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u64_e64 s[54:55], v[45:46]
	s_cbranch_execnz .LBB2_2
; %bb.1:
	s_endpgm
.LBB2_2:
	v_lshlrev_b64 v[0:1], 2, v[45:46]
	s_load_b256 s[56:63], s[46:47], 0x20
	s_add_u32 s8, s46, 56
	s_addc_u32 s9, s47, 0
	s_mov_b32 s33, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, s52, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s53, v1, vcc_lo
	s_getpc_b64 s[52:53]
	s_add_u32 s52, s52, __ockl_dm_alloc@rel32@lo+4
	s_addc_u32 s53, s53, __ockl_dm_alloc@rel32@hi+12
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s56, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s57, v1, vcc_lo
	global_load_b32 v56, v[2:3], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v57, 31, v56
	v_lshlrev_b64 v[2:3], 2, v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v46, vcc_lo, s48, v2
	v_add_co_ci_u32_e32 v47, vcc_lo, s49, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s58, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s59, v1, vcc_lo
	global_load_b64 v[2:3], v[46:47], off
	global_load_b32 v59, v[0:1], off
	s_waitcnt vmcnt(1)
	v_xad_u32 v57, v2, -1, v3
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v60, 31, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v58, 31, v57
	v_lshlrev_b64 v[0:1], 2, v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_lt_u64_e32 vcc_lo, 1, v[0:1]
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 1, v0
	v_cmp_lt_i32_e32 vcc_lo, -1, v57
	v_dual_cndmask_b32 v41, -1, v0 :: v_dual_cndmask_b32 v42, -1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_swappc_b64 s[30:31], s[52:53]
	v_dual_mov_b32 v43, v0 :: v_dual_mov_b32 v44, v1
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_swappc_b64 s[30:31], s[52:53]
	v_cmp_lt_u64_e32 vcc_lo, 1, v[57:58]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v41, v0 :: v_dual_mov_b32 v42, v1
	v_dual_cndmask_b32 v0, 1, v57 :: v_dual_cndmask_b32 v1, 0, v58
	s_swappc_b64 s[30:31], s[52:53]
	v_dual_mov_b32 v21, v0 :: v_dual_mov_b32 v22, v1
	v_lshlrev_b64 v[0:1], 2, v[59:60]
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, 1
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v29, 0
	v_mov_b32_e32 v3, 0
	v_add_co_u32 v24, vcc_lo, s48, v0
	v_add_co_ci_u32_e32 v25, vcc_lo, s49, v1, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[46:47], off
	global_load_b32 v13, v[24:25], off
	v_mov_b32_e32 v23, 0
.LBB2_3:                                ; %.outer.outer
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_4 Depth 2
                                        ;       Child Loop BB2_5 Depth 3
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v26, v3 :: v_dual_mov_b32 v3, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v6, v23
	s_mov_b32 s2, 0
                                        ; implicit-def: $sgpr1
.LBB2_4:                                ; %.outer
                                        ;   Parent Loop BB2_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_5 Depth 3
	global_load_b32 v10, v[46:47], off offset:4
	v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v23, v6
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s5, 0
                                        ; implicit-def: $sgpr4
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[13:14], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_mov_b32_e32 v1, v5
	v_add_co_u32 v6, s0, s58, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s58, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s59, v8, vcc_lo
	v_add_co_ci_u32_e64 v7, s0, s59, v14, s0
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v0, v10
.LBB2_5:                                ;   Parent Loop BB2_3 Depth=1
                                        ;     Parent Loop BB2_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr6
                                        ; implicit-def: $sgpr8
                                        ; implicit-def: $vgpr9
	s_and_saveexec_b32 s7, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s7, exec_lo, s7
	s_cbranch_execz .LBB2_7
; %bb.6:                                ;   in Loop: Header=BB2_5 Depth=3
	global_load_b32 v9, v[24:25], off offset:4
	s_brev_b32 s8, -2
	s_mov_b32 s6, -1
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v3, v9
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s0, s0, exec_lo
.LBB2_7:                                ; %Flow366
                                        ;   in Loop: Header=BB2_5 Depth=3
	s_or_saveexec_b32 s7, s7
	s_waitcnt vmcnt(1)
	v_mov_b32_e32 v2, s8
	s_xor_b32 exec_lo, exec_lo, s7
	s_cbranch_execz .LBB2_9
; %bb.8:                                ; %.critedge260
                                        ;   in Loop: Header=BB2_5 Depth=3
	global_load_b32 v2, v[4:5], off
	global_load_b32 v9, v[24:25], off offset:4
	s_or_b32 s0, s0, exec_lo
.LBB2_9:                                ; %Flow367
                                        ;   in Loop: Header=BB2_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v13, v3
	s_mov_b32 s8, -1
	s_mov_b32 s9, s6
                                        ; kill: def $vgpr8 killed $sgpr0 killed $exec
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB2_17
; %bb.10:                               ; %.critedge
                                        ;   in Loop: Header=BB2_5 Depth=3
	v_bfrev_b32_e32 v8, -2
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v3, v9
	s_cbranch_execz .LBB2_12
; %bb.11:                               ;   in Loop: Header=BB2_5 Depth=3
	global_load_b32 v8, v[6:7], off
.LBB2_12:                               ;   in Loop: Header=BB2_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s8
	s_mov_b32 s8, -1
	s_mov_b32 s10, -1
	s_mov_b32 s9, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ge_i32_e64 v2, v8
	s_cbranch_execz .LBB2_16
; %bb.13:                               ;   in Loop: Header=BB2_5 Depth=3
	s_mov_b32 s10, exec_lo
	v_cmpx_lt_i32_e64 v8, v2
; %bb.14:                               ;   in Loop: Header=BB2_5 Depth=3
	v_cmp_ne_u32_e64 s0, v8, v56
	v_add_nc_u32_e32 v3, 1, v3
	s_xor_b32 s8, exec_lo, -1
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v29, s0, 0, v29, s0
	v_add_co_u32 v6, s0, v6, 4
	v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
; %bb.15:                               ; %Flow370
                                        ;   in Loop: Header=BB2_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, -1
	s_or_not1_b32 s8, s8, exec_lo
.LBB2_16:                               ; %Flow369
                                        ;   in Loop: Header=BB2_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s9
	v_dual_mov_b32 v13, v3 :: v_dual_mov_b32 v8, v2
	s_and_not1_b32 s6, s6, exec_lo
	s_and_b32 s0, s10, exec_lo
	s_or_not1_b32 s8, s8, exec_lo
	s_or_b32 s9, s6, s0
.LBB2_17:                               ; %Flow368
                                        ;   in Loop: Header=BB2_5 Depth=3
	s_or_b32 exec_lo, exec_lo, s7
	s_xor_b32 s0, s6, -1
	s_xor_b32 s6, s9, -1
	s_and_b32 s7, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s7, s5
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_and_not1_b32 s4, s4, exec_lo
	s_and_b32 s6, s6, exec_lo
	s_or_b32 s3, s3, s0
	s_or_b32 s4, s4, s6
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_5
; %bb.18:                               ; %loop.exit.guard353
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s5
	s_mov_b32 s5, -1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB2_20
; %bb.19:                               ;   in Loop: Header=BB2_4 Depth=2
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v3, 1, v3
	s_xor_b32 s5, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[8:9]
	v_lshlrev_b64 v[14:15], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s48, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s49, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, v43, v14
	v_add_co_ci_u32_e32 v7, vcc_lo, v44, v15, vcc_lo
	global_load_b32 v9, v[4:5], off
	v_add_co_u32 v14, vcc_lo, v41, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, v42, v15, vcc_lo
	v_add_co_u32 v16, vcc_lo, v21, v1
	v_add_co_ci_u32_e32 v17, vcc_lo, v22, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v9, off
	global_load_b32 v7, v[4:5], off offset:4
	v_add_nc_u32_e32 v6, 1, v23
	v_add_nc_u32_e32 v5, 1, v1
	v_add_nc_u32_e32 v4, 1, v0
	s_waitcnt vmcnt(0)
	global_store_b32 v[14:15], v7, off
	global_store_b8 v[16:17], v12, off
.LBB2_20:                               ; %Flow371
                                        ;   in Loop: Header=BB2_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s5
	s_or_b32 s2, s0, s2
	s_and_not1_b32 s0, s1, exec_lo
	s_and_b32 s1, s3, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s0, s1
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_4
; %bb.21:                               ; %loop.exit.guard
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr5
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB2_25
; %bb.22:                               ;   in Loop: Header=BB2_3 Depth=1
	v_mov_b32_e32 v3, v26
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e64 v8, v59
	s_cbranch_execz .LBB2_24
; %bb.23:                               ;   in Loop: Header=BB2_3 Depth=1
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[8:9]
	v_add_co_u32 v4, vcc_lo, s48, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s49, v3, vcc_lo
	v_ashrrev_i32_e32 v2, 31, v1
	global_load_b32 v3, v[4:5], off
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v8, vcc_lo, v43, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v44, v7, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[8:9], v3, off
	global_load_b32 v8, v[4:5], off offset:4
	v_add_co_u32 v4, vcc_lo, v41, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, v42, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, v21, v1
	v_add_nc_u32_e32 v3, 1, v26
	v_add_nc_u32_e32 v1, 1, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, v22, v2, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[4:5], v8, off
	global_store_b8 v[6:7], v11, off
.LBB2_24:                               ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v5, v1 :: v_dual_add_nc_u32 v4, 1, v0
	s_xor_b32 s2, exec_lo, -1
.LBB2_25:                               ; %Flow373
                                        ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s2
	s_or_b32 s33, s0, s33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s33
	s_cbranch_execnz .LBB2_3
; %bb.26:
	s_or_b32 exec_lo, exec_lo, s33
	s_clause 0x1
	global_load_b32 v0, v[46:47], off
	global_load_b32 v2, v[24:25], off
	v_cmp_gt_i32_e32 vcc_lo, 1, v57
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, 0
	s_mov_b32 s5, 0
	s_mov_b32 s6, 0
.LBB2_27:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_36 Depth 2
                                        ;       Child Loop BB2_38 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v27, v12 :: v_dual_mov_b32 v30, v11
	s_mov_b32 s1, s5
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $vgpr3
	s_waitcnt vmcnt(0)
	v_cmpx_ge_i32_e64 v0, v10
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB2_29
; %bb.28:                               ;   in Loop: Header=BB2_27 Depth=1
	global_load_b32 v3, v[24:25], off offset:4
	s_brev_b32 s3, -2
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v2, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s1, s0, exec_lo
.LBB2_29:                               ; %Flow362
                                        ;   in Loop: Header=BB2_27 Depth=1
	s_or_saveexec_b32 s2, s2
	v_mov_b32_e32 v1, s3
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB2_31
; %bb.30:                               ; %.critedge261
                                        ;   in Loop: Header=BB2_27 Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_or_b32 s1, s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	v_add_co_u32 v3, s0, s58, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s59, v4, s0
	global_load_b32 v1, v[3:4], off
	global_load_b32 v3, v[24:25], off offset:4
.LBB2_31:                               ; %Flow363
                                        ;   in Loop: Header=BB2_27 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr11
	s_and_saveexec_b32 s7, s1
	s_cbranch_execz .LBB2_53
; %bb.32:                               ; %.critedge2
                                        ;   in Loop: Header=BB2_27 Depth=1
	v_bfrev_b32_e32 v13, -2
	s_mov_b32 s1, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v2, v3
	s_cbranch_execz .LBB2_34
; %bb.33:                               ;   in Loop: Header=BB2_27 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_co_u32 v3, s0, s58, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s59, v4, s0
	global_load_b32 v13, v[3:4], off
.LBB2_34:                               ;   in Loop: Header=BB2_27 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s1, v13, v56
	v_cmp_gt_i32_e64 s0, v13, v1
	v_dual_mov_b32 v12, v27 :: v_dual_mov_b32 v11, v30
	s_delay_alu instid0(VALU_DEP_3)
	s_or_b32 s1, s1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s1, -1
	s_and_saveexec_b32 s8, s1
	s_cbranch_execz .LBB2_52
; %bb.35:                               ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB2_27 Depth=1
	v_cmp_ne_u32_e64 s1, v1, v13
	v_dual_mov_b32 v12, v27 :: v_dual_mov_b32 v11, v30
	s_mov_b32 s9, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s4, s9
.LBB2_36:                               ; %.preheader
                                        ;   Parent Loop BB2_27 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_38 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b64 s[10:11], s[4:5], 2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, s2, v43, s10
	v_add_co_ci_u32_e64 v4, s2, s11, v44, s2
	v_add_co_u32 v5, s2, v41, s10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s2, s11, v42, s2
	s_mov_b32 s10, exec_lo
	global_load_b32 v7, v[3:4], off
	global_load_b32 v8, v[5:6], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v7, v8
	s_cbranch_execz .LBB2_50
; %bb.37:                               ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB2_36 Depth=2
	v_ashrrev_i32_e32 v8, 31, v7
	s_mov_b32 s12, 0
                                        ; implicit-def: $sgpr11
                                        ; implicit-def: $sgpr14
                                        ; implicit-def: $sgpr13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[7:8]
	v_add_co_u32 v8, s2, s58, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s2, s59, v9, s2
.LBB2_38:                               ; %.lr.ph
                                        ;   Parent Loop BB2_27 Depth=1
                                        ;     Parent Loop BB2_36 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v10, v[8:9], off
	s_or_b32 s13, s13, exec_lo
	s_or_b32 s14, s14, exec_lo
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v10, v13
	s_cbranch_execz .LBB2_40
; %bb.39:                               ;   in Loop: Header=BB2_38 Depth=3
	v_add_nc_u32_e32 v7, 1, v7
	v_add_co_u32 v8, s3, v8, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s3, 0, v9, s3
	global_store_b32 v[3:4], v7, off
	global_load_b32 v14, v[5:6], off
	s_and_not1_b32 s3, s14, exec_lo
	s_and_not1_b32 s13, s13, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e64 s2, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, exec_lo
	s_or_b32 s14, s3, s2
.LBB2_40:                               ; %Flow359
                                        ;   in Loop: Header=BB2_38 Depth=3
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s14
	s_or_b32 s12, s2, s12
	s_and_not1_b32 s2, s11, exec_lo
	s_and_b32 s3, s13, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB2_38
; %bb.41:                               ; %loop.exit.guard354
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_or_b32 exec_lo, exec_lo, s12
	s_and_saveexec_b32 s2, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB2_49
; %bb.42:                               ; %.critedge4
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_mov_b32 s11, exec_lo
	v_cmpx_eq_u32_e64 v10, v13
	s_cbranch_execz .LBB2_48
; %bb.43:                               ;   in Loop: Header=BB2_36 Depth=2
	v_add_co_u32 v3, s2, v21, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v4, s2, 0, v22, s2
	global_load_u8 v3, v[3:4], off
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB2_45
; %bb.44:                               ; %.critedge263
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, 0xff, v3
	v_add_nc_u32_e32 v12, v12, v3
                                        ; implicit-def: $vgpr3
.LBB2_45:                               ; %Flow
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_and_not1_saveexec_b32 s2, s2
	s_cbranch_execz .LBB2_47
; %bb.46:                               ;   in Loop: Header=BB2_36 Depth=2
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xff, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v11, v11, v3
.LBB2_47:                               ; %Flow356
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_48:                               ; %Flow357
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
.LBB2_49:                               ; %Flow358
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_50:                               ; %Flow360
                                        ;   in Loop: Header=BB2_36 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s4, s4, 1
	v_cmp_ge_i32_e64 s2, s4, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s9, s2, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB2_36
; %bb.51:                               ; %.loopexit.loopexit
                                        ;   in Loop: Header=BB2_27 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	global_load_b32 v10, v[46:47], off offset:4
.LBB2_52:                               ; %Flow361
                                        ;   in Loop: Header=BB2_27 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_xor_b32 s0, s0, -1
	s_waitcnt vmcnt(1)
	v_cndmask_b32_e64 v3, 0, 1, s0
	v_cmp_le_i32_e64 s0, v1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v3
	v_add_co_ci_u32_e64 v0, s0, 0, v0, s0
	s_xor_b32 s0, exec_lo, -1
.LBB2_53:                               ; %Flow364
                                        ;   in Loop: Header=BB2_27 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s6, s0, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB2_27
; %bb.54:
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s20, exec_lo
	v_cmpx_ne_u64_e32 0, v[43:44]
	s_cbranch_execnz .LBB2_58
.LBB2_55:                               ; %_ZdlPv.exit
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s20, exec_lo
	v_cmpx_ne_u64_e32 0, v[41:42]
	s_cbranch_execnz .LBB2_59
.LBB2_56:                               ; %_ZdlPv.exit256
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s20, exec_lo
	v_cmpx_ne_u64_e32 0, v[21:22]
	s_cbranch_execnz .LBB2_60
.LBB2_57:                               ; %_ZdlPv.exit258
	s_or_b32 exec_lo, exec_lo, s20
	s_clause 0x1
	global_load_b64 v[10:11], v[46:47], off
	global_load_b64 v[12:13], v[24:25], off
	s_waitcnt vmcnt(2)
	v_add_nc_u32_e32 v2, -1, v23
	v_add_nc_u32_e32 v3, -1, v26
	v_add_nc_u32_e32 v4, -1, v29
	v_add_nc_u32_e32 v25, v26, v29
	v_lshrrev_b32_e32 v1, 31, v30
	v_mul_lo_u32 v16, v2, v23
	v_mul_lo_u32 v17, v3, v26
	v_mul_lo_u32 v18, v4, v29
	v_add3_u32 v5, v25, v23, 2
	v_add_nc_u32_e32 v6, v30, v1
	v_mad_i64_i32 v[14:15], null, 0x68, v45, s[60:61]
	v_ashrrev_i32_e32 v24, 31, v23
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v7, 31, v5
	v_ashrrev_i32_e32 v6, 1, v6
	v_lshrrev_b32_e32 v19, 31, v16
	v_lshrrev_b32_e32 v20, 31, v17
	v_lshrrev_b32_e32 v21, 31, v18
	v_sub_co_u32 v4, vcc_lo, s50, v5
	v_mul_lo_u32 v0, v26, v29
	v_ashrrev_i32_e32 v26, 31, v25
	v_sub_co_ci_u32_e32 v5, vcc_lo, s51, v7, vcc_lo
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_nc_u32_e32 v19, v16, v19
	v_add_nc_u32_e32 v16, v17, v20
	v_add_nc_u32_e32 v17, v18, v21
	s_clause 0x1
	global_store_b128 v[14:15], v[23:26], off
	global_store_b128 v[14:15], v[4:7], off offset:16
	v_add_co_u32 v6, vcc_lo, v4, -1
	v_mul_lo_u32 v2, v23, v25
	v_mad_u64_u32 v[8:9], null, v4, v23, 0
	v_mul_lo_u32 v18, v5, v23
	v_add_co_ci_u32_e32 v7, vcc_lo, -1, v5, vcc_lo
	v_ashrrev_i32_e32 v21, 1, v16
	v_ashrrev_i32_e32 v23, 1, v17
	v_ashrrev_i32_e32 v29, 1, v19
	v_mul_lo_u32 v20, v5, v25
	v_mul_lo_u32 v5, v6, v5
	v_mad_u64_u32 v[16:17], null, v6, v4, 0
	v_add_nc_u32_e32 v6, v21, v23
	v_mul_lo_u32 v22, v4, v24
	v_mul_lo_u32 v31, v4, v26
	v_ashrrev_i32_e32 v28, 31, v27
	v_ashrrev_i32_e32 v30, 31, v29
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v3, 31, v2
	v_add3_u32 v9, v9, v22, v18
	s_waitcnt vmcnt(1)
	v_xad_u32 v19, v10, -1, v11
	s_waitcnt vmcnt(0)
	v_xad_u32 v12, v12, -1, v13
	v_mul_lo_u32 v13, v7, v4
	v_mad_u64_u32 v[10:11], null, v4, v25, 0
	v_ashrrev_i32_e32 v21, 31, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v23, 31, v12
	v_add_co_u32 v4, vcc_lo, v12, v19
	v_ashrrev_i32_e32 v7, 31, v6
	v_add3_u32 v17, v17, v5, v13
	v_add_co_ci_u32_e32 v12, vcc_lo, v23, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_not_b32_e32 v4, v4
	v_add3_u32 v11, v11, v31, v20
	v_not_b32_e32 v5, v12
	v_lshrrev_b64 v[12:13], 1, v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, s54
	v_add_co_ci_u32_e32 v5, vcc_lo, s55, v5, vcc_lo
	s_clause 0x4
	global_store_b128 v[14:15], v[27:30], off offset:32
	global_store_b128 v[14:15], v[0:3], off offset:48
	global_store_b128 v[14:15], v[6:9], off offset:64
	global_store_b128 v[14:15], v[10:13], off offset:80
	global_store_b64 v[14:15], v[4:5], off offset:96
	s_endpgm
.LBB2_58:
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v0, v43 :: v_dual_mov_b32 v1, v44
	s_add_u32 s8, s46, 56
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB2_55
.LBB2_59:
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v0, v41 :: v_dual_mov_b32 v1, v42
	s_add_u32 s8, s46, 56
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB2_56
.LBB2_60:
	s_waitcnt vmcnt(1)
	v_dual_mov_b32 v0, v21 :: v_dual_mov_b32 v1, v22
	s_add_u32 s8, s46, 56
	s_addc_u32 s9, s47, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	s_branch .LBB2_57
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 8
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 136
		.amdhsa_next_free_sgpr 64
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT, .Lfunc_end2-_Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2980
; NumSgprs: 66
; NumVgprs: 136
; ScratchSize: 8
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 16
; NumSGPRsForWavesPerEU: 66
; NumVGPRsForWavesPerEU: 136
; Occupancy: 10
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.type	__unnamed_1,@object             ; @0
	.section	.rodata,"a",@progbits
	.p2align	2, 0x0
__unnamed_1:
	.long	130054                          ; 0x1fc06
	.long	129546                          ; 0x1fa0a
	.long	110114                          ; 0x1ae22
	.long	16288                           ; 0x3fa0
	.long	6                               ; 0x6
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	4195                            ; 0x1063
	.long	86927                           ; 0x1538f
	.long	86758                           ; 0x152e6
	.long	73744                           ; 0x12010
	.long	10904                           ; 0x2a98
	.long	399                             ; 0x18f
	.long	512                             ; 0x200
	.long	0                               ; 0x0
	.long	2804                            ; 0xaf4
	.long	65280                           ; 0xff00
	.long	64770                           ; 0xfd02
	.long	55054                           ; 0xd70e
	.long	8192                            ; 0x2000
	.long	0                               ; 0x0
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	2107                            ; 0x83b
	.long	43576                           ; 0xaa38
	.long	43406                           ; 0xa98e
	.long	36895                           ; 0x901f
	.long	5504                            ; 0x1580
	.long	56                              ; 0x38
	.long	256                             ; 0x100
	.long	0                               ; 0x0
	.long	1405                            ; 0x57d
	.long	32703                           ; 0x7fbf
	.long	32193                           ; 0x7dc1
	.long	27364                           ; 0x6ae4
	.long	4160                            ; 0x1040
	.long	63                              ; 0x3f
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	1054                            ; 0x41e
	.long	21816                           ; 0x5538
	.long	21646                           ; 0x548e
	.long	18399                           ; 0x47df
	.long	2816                            ; 0xb00
	.long	56                              ; 0x38
	.long	128                             ; 0x80
	.long	0                               ; 0x0
	.long	703                             ; 0x2bf
	.long	16367                           ; 0x3fef
	.long	15856                           ; 0x3df0
	.long	13477                           ; 0x34a5
	.long	2176                            ; 0x880
	.long	15                              ; 0xf
	.long	32                              ; 0x20
	.long	32768                           ; 0x8000
	.long	527                             ; 0x20f
	.long	10915                           ; 0x2aa3
	.long	10745                           ; 0x29f9
	.long	9133                            ; 0x23ad
	.long	1472                            ; 0x5c0
	.long	35                              ; 0x23
	.long	64                              ; 0x40
	.long	0                               ; 0x0
	.long	352                             ; 0x160
	.long	8187                            ; 0x1ffb
	.long	7676                            ; 0x1dfc
	.long	6524                            ; 0x197c
	.long	1280                            ; 0x500
	.long	11                              ; 0xb
	.long	16                              ; 0x10
	.long	134219776                       ; 0x8000800
	.long	265                             ; 0x109
	.long	5459                            ; 0x1553
	.long	5289                            ; 0x14a9
	.long	4495                            ; 0x118f
	.long	896                             ; 0x380
	.long	19                              ; 0x13
	.long	32                              ; 0x20
	.long	524288                          ; 0x80000
	.long	176                             ; 0xb0
	.long	4094                            ; 0xffe
	.long	3583                            ; 0xdff
	.long	3045                            ; 0xbe5
	.long	1024                            ; 0x400
	.long	6                               ; 0x6
	.long	8                               ; 0x8
	.long	1077952576                      ; 0x40404040
	.long	133                             ; 0x85
	.long	2730                            ; 0xaaa
	.long	2560                            ; 0xa00
	.long	2176                            ; 0x880
	.long	512                             ; 0x200
	.long	10                              ; 0xa
	.long	16                              ; 0x10
	.long	67109888                        ; 0x4000400
	.long	89                              ; 0x59
	.long	2047                            ; 0x7ff
	.long	1536                            ; 0x600
	.long	1305                            ; 0x519
	.long	1024                            ; 0x400
	.long	3                               ; 0x3
	.long	4                               ; 0x4
	.long	2290649224                      ; 0x88888888
	.long	66                              ; 0x42
	.long	1365                            ; 0x555
	.long	1195                            ; 0x4ab
	.long	1015                            ; 0x3f7
	.long	512                             ; 0x200
	.long	5                               ; 0x5
	.long	8                               ; 0x8
	.long	538976288                       ; 0x20202020
	.long	44                              ; 0x2c
	.long	1023                            ; 0x3ff
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	1                               ; 0x1
	.long	2                               ; 0x2
	.long	2863311530                      ; 0xaaaaaaaa
	.long	34                              ; 0x22
	.long	682                             ; 0x2aa
	.long	512                             ; 0x200
	.long	435                             ; 0x1b3
	.long	2048                            ; 0x800
	.long	2                               ; 0x2
	.long	4                               ; 0x4
	.long	1145324612                      ; 0x44444444
	.long	35                              ; 0x23
	.size	__unnamed_1, 512

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         136
        .size:           8
        .value_kind:     hidden_hostcall_buffer
      - .offset:         152
        .size:           8
        .value_kind:     hidden_heap_v1
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT
    .private_segment_fixed_size: 8
    .sgpr_count:     66
    .sgpr_spill_count: 0
    .symbol:         _Z9graphletsPiyS_yS_S_P11EDGE_OUTPUT.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     136
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
