﻿
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>

// When we allocate host memory and do HostToDevice Transfer, Cuda copies host data from Pagable memory to Pinned Memory.
// Since pagable memory can't be transferred directly to GPU, Pinned memory needs to be used.
// Below test program is to show how can we allocate pinned memory.

int main()
{
    int size = 1 << 22;
    int bytes = size * sizeof(float);

    float* h_data;
    float* d_data;

    // Allocate Pinned memory
    cudaMallocHost((float**) &h_data, bytes);
    cudaMalloc((float**)&d_data, bytes);

    cudaMemcpy(d_data, h_data, bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(h_data, d_data, bytes, cudaMemcpyDeviceToHost);

    cudaFree(d_data);
    cudaFreeHost(h_data);

    cudaDeviceReset();
    return 0;
}

	.file	"tmpxft_0021ca79_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%edx, %edx
	movl	$16777216, %esi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaHostAlloc@PLT
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	call	cudaDeviceReset@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2053:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2053:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

﻿
#include "hip/hip_runtime.h"


#include <stdio.h>

// When we allocate host memory and do HostToDevice Transfer, Cuda copies host data from Pagable memory to Pinned Memory.
// Since pagable memory can't be transferred directly to GPU, Pinned memory needs to be used.
// Below test program is to show how can we allocate pinned memory.

int main()
{
    int size = 1 << 22;
    int bytes = size * sizeof(float);

    float* h_data;
    float* d_data;

    // Allocate Pinned memory
    hipHostMalloc((float**) &h_data, bytes, hipHostMallocDefault);
    hipMalloc((float**)&d_data, bytes);

    hipMemcpy(d_data, h_data, bytes, hipMemcpyHostToDevice);
    hipMemcpy(h_data, d_data, bytes, hipMemcpyDeviceToHost);

    hipFree(d_data);
    hipHostFree(h_data);

    hipDeviceReset();
    return 0;
}

	.text
	.file	"kernel.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %rbx
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	8(%rsp), %r14
	movl	$16777216, %esi                 # imm = 0x1000000
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	(%rbx), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	(%r14), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	callq	hipFree
	movq	(%rbx), %rdi
	callq	hipHostFree
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
