#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>


#define MAXN 8000  /* Max value of N */
int N;  /* Matrix Dimension*/
int numThreads;  /* Number of Threads */

/*Random*/
#define randm() 4|2[uid]&3

/*CUDA Function for calculating mean column-wise and then reducing each column's totals*/
/*This Function will be called Number of blocks times*/
__global__ void Mean_SD_Norm(float* input,float* output ,float* mean_out,float* sd_out, int dim1, int numThread,int eval_ceil)
{
  extern __shared__ float mean[];//shared 1D-matrix for storing temporary results for mean of each threads 
  extern __shared__ float sd[];//shared 1D-matrix for storing temporary results for sd of each threads 
  __shared__ float meansum;//shared 1D-matrix for storing mean total of each threads
  __shared__ float sdsum;//shared 1D-matrix for storing SD total of each threads
  
  int idx_x = blockIdx.x * blockDim.x + threadIdx.x;//Getting Thread X Index for Particular Block
  int idx_y = blockIdx.y * blockDim.y + threadIdx.y;//Getting Thread Y Index for Particular Block
  int eva_block,index; 	 
  
  unsigned int thread_id = threadIdx.y;//Getting Id of thread
  unsigned int j = idx_y * dim1 + idx_x;//calculating index for input matrix
  
	__syncthreads();//waiting for all threads

	mean[thread_id]=input[j];//Assigned each column element of matrix to each thread

	/*If Dimension is more than Threads then reduce the remaining elements to assigned elements*/	
  for(int i=0;i<dim1;i+=numThread)
  {
		index=dim1*(numThread+thread_id+i);//calculating index of remaining element
		eva_block=index+blockIdx.x;
		if(eva_block < dim1*dim1)
		{
			mean[thread_id]+=input[index];
		}	
  }
  
  /*Reducing sum of each thread to final block sum*/
 if(thread_id==0)
 {
	for(int i=0;i<numThread;i++)
	{
		meansum+=mean[thread_id+i];
	}
	mean_out[blockIdx.x]=meansum/dim1;//Mean of block
 } 

 __syncthreads(); 
 sd[thread_id] = powf(input[j] - mean_out[blockIdx.x], 2.0);//evaluating SD for each thread for particular block

 
 	/*If Dimension is more than Threads then reduce the remaining elements to assigned elements*/	
  for(int i=0;i<dim1;i+=numThread)
  {
		index=dim1*(numThread+thread_id+i);
		eva_block=index+blockIdx.x;
		if(eva_block < dim1*dim1)
		{
			sd[thread_id]+=powf(input[index] - mean_out[blockIdx.x], 2.0);
		}	
  }
  
    /*Reducing SD Sum of each thread to final block SD sum*/
  if(thread_id==0)
 {
	 sdsum=0;
	for(int i=0;i<numThread;i++)
	{
		sdsum+=sd[thread_id+i];//calculating index of remaining element
	}
	sd_out[blockIdx.x]=sdsum/dim1;//SD of block
 } 
 
 __syncthreads();//waiting for threads

	/*Normalization of each block data on basis of mean and sd of each block*/
	output[blockIdx.x*dim1+thread_id] = (input[thread_id+blockIdx.x*dim1] - mean_out[blockIdx.x]) / sd_out[blockIdx.x];	
	
	/*Reducing Normalized Sum for remaining elements*/
	for(int i=0;i<eval_ceil;i++){
		if((numThread+thread_id)+blockIdx.x*dim1 < dim1*dim1)
		{
			output[(numThread+thread_id)+blockIdx.x*dim1] = (input[(numThread+thread_id)+blockIdx.x*dim1] - mean_out[blockIdx.x])/sd_out[blockIdx.x];//Normalizing the Matrix Indexes
		}	
  	}
}

/* returns a seed for srand based on the time */
unsigned int time_seed() {
  struct timeval t;
  struct timezone tzdummy;

  gettimeofday(&t, &tzdummy);
  return (unsigned int)(t.tv_usec);
}

/* Set the program parameters from the command-line arguments */
void parameters(int argc, char **argv) {
  int seed = 0;  /* Random seed */
  char uid[32]; /*User name */

  /* Read command-line arguments */
  srand(time_seed());  /* Randomize */

  if (argc == 4) {	
    seed = atoi(argv[3]);
    srand(seed);
    printf("Random seed = %i\n", seed);
  } 
  if (argc >= 3) {
    N = atoi(argv[1]);
    numThreads = atoi(argv[2]);
    if (N < 1 || N > MAXN) {
      printf("N = %i is out of range.\n", N);
      exit(0);
    }
	
	/*Number of Threads should be less than or equal to 1024 else exit*/
	if (numThreads > 1024) 
	{
      printf("Number of threads cannot be more than %i.\n", 1024);
      exit(0);
    }
  }
  else 
  {
    printf("Usage: %s <matrix_dimension> <Number of Threads> [random seed]\n",argv[0]);    
    exit(0);
  }

  printf("\nMatrix dimension N = %i.\n", N);
}


int main(int argc, char **argv) 
{
  /* Timing variables */
  cudaEvent_t start, stop;
  cudaEventCreate(&start);
  cudaEventCreate(&stop);
  struct timeval etstart, etstop;  /* Elapsed times using gettimeofday() */
  struct timezone tzdummy;
  clock_t etstart2, etstop2;  /* Elapsed times using times() */
  unsigned long long usecstart, usecstop;
  struct tms cputstart, cputstop;  /* CPU times for my processes */

  /* Process program parameters */
  parameters(argc, argv);
 
  float* Host_Input = new float [N * N];//Input Matrix
  float* Host_Output = new float [N * N];//Output Matrix

  int i,j;
/*Initializing Input Matrix with random values*/ 
 printf("\nInitializing...\n");
  for(i=0;i<N;i++)
  {
    for(j=0;j<N;j++)
    {
      //Host_Input[j* N + i] = j+1;
	 Host_Input[j* N + i] = (float)rand() / 32768.0;
    }
  }
 

  float* input;//Device Input Matrix
  float* output;//Device Output Matrix
  float* mean_out;//Device Mean Matrix
  float* sd_out;//Device SD Matrix
  size_t matrix_size_2d = N * N * sizeof(float);//Size of 2D Matrix
  size_t matrix_size_1d = N * sizeof(float);//Size of 1D Matrix

  //allocated the device memory for source array
  cudaMalloc(&input, matrix_size_2d);
  cudaMemcpy(input, Host_Input, matrix_size_2d, cudaMemcpyHostToDevice);

  //allocate the device memory for destination array
  cudaMalloc(&output, matrix_size_2d);

  //allocate the device memory for mean array
  cudaMalloc(&mean_out, matrix_size_1d);

  //allocate the device memory for sd array
  cudaMalloc(&sd_out, matrix_size_1d);

  dim3 dimBlock;
  dim3 dimGrid;

  /* Designing Decisions for number of blocks and number of threads in each block */
  if( N < numThreads)
  {
    dimBlock.x = 1;
    dimBlock.y = N;
    dimGrid.x = N;
    dimGrid.y = 1;
  }
  else
  {
    dimBlock.x = 1;
    dimBlock.y = numThreads;
    dimGrid.x = N;
    dimGrid.y = 1;
  }

  /* Start Clock */
  printf("\nStarting clock.\n");
  cudaEventRecord(start);
  gettimeofday(&etstart,&tzdummy);
  etstart2 = times(&cputstart);

	double d_ceil=(double)N/(double)numThreads;
	int c=ceil(d_ceil);

//printf("nt=%d\t c1=%ld\tc=%d\n",nt,c1,c);

  //Calling CUDA Kernel Function For Normalizing Matrix
  Mean_SD_Norm<<<dimGrid, dimBlock, matrix_size_1d>>>(input,output,mean_out,sd_out,N,numThreads,c);
  cudaDeviceSynchronize();
  
  /* Stop Clock code below*/
  cudaEventRecord(stop);
  cudaEventSynchronize(stop);
  float milliseconds = 0;
  cudaEventElapsedTime(&milliseconds, start, stop);
  gettimeofday(&etstop, &tzdummy);
  etstop2 = times(&cputstop);
  printf("Stopped clock.\n");

  /*Copying Output Device Matrix to Output Host Matrix*/
  cudaMemcpy(Host_Output, output, N * N * sizeof(float), cudaMemcpyDeviceToHost);

  usecstart = (unsigned long long)etstart.tv_sec * 1000000 + etstart.tv_usec;
  usecstop = (unsigned long long)etstop.tv_sec * 1000000 + etstop.tv_usec;

  /* Display output */
 /* if (N < 10) {
  printf("\nB1 =\n\t");
    for (i= 0; i < N; i++) {
        for (j = 0; j < N; j++) {
            printf("%1.10f%s", Host_Output[i* N + j], (j < N-1) ? ", " : ";\n\t");
        }
    }
  }*/

  /* Display result time */
  printf("\nElapsed time CPU Time = %g ms.\n", (float)(usecstop - usecstart)/(float)1000);
  printf("Elapsed GPU Time = %g ms \n",milliseconds);
  printf("Effective Bandwidth in (GB/s): %f \n", (2*matrix_size_2d/milliseconds)/1e6);
  float mean = N * log2((float)N) + N;
  float sd = N * log2((float)N) + (2*N) + (2*N*N);
  float norm = 2 * N * N;
  printf("Effective Throughput in  (GFLOPS/s): %f \n", ((mean+sd+norm)*1e-9)/(milliseconds*1e-3)); 

  //deallocate device memory below
  cudaFree(input);
  cudaFree(output);
  cudaFree(mean_out);
  cudaFree(sd_out);

  //deallocate Host Input and Host Output Matrix
  free(Host_Input);
  free(Host_Output);

  exit(0);
}

	.file	"tmpxft_0024e79a_00000000-6_matrix_cuda_norm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2045:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2045:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z9time_seedv
	.type	_Z9time_seedv, @function
_Z9time_seedv:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	movl	16(%rsp), %eax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z9time_seedv, .-_Z9time_seedv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Random seed = %i\n"
.LC1:
	.string	"N = %i is out of range.\n"
.LC2:
	.string	"Number of threads cannot be more than %i.\n"
.LC3:
	.string	"Usage: %s <matrix_dimension> <Number of Threads> [random seed]\n"
.LC4:
	.string	"\nMatrix dimension N = %i.\n"
	.text
	.globl	_Z10parametersiPPc
	.type	_Z10parametersiPPc, @function
_Z10parametersiPPc:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	call	_Z9time_seedv
	movl	%eax, %edi
	call	srand@PLT
	cmpl	$4, %ebp
	jne	.L7
	movq	24(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
	movl	%eax, %edi
	call	srand@PLT
	movl	%ebp, %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L8
.L7:
	cmpl	$2, %ebp
	jle	.L9
.L8:
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, N(%rip)
	movl	%eax, 12(%rsp)
	call	atoi@PLT
	movl	12(%rsp), %edx
	leaq	.LC1(%rip), %rsi
	movl	%eax, numThreads(%rip)
	leal	-1(%rdx), %ecx
	cmpl	$7999, %ecx
	ja	.L13
	cmpl	$1024, %eax
	jle	.L11
	movl	$1024, %edx
	leaq	.LC2(%rip), %rsi
.L13:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	xorl	%edi, %edi
	call	exit@PLT
.L9:
	movq	(%rbx), %rdx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L14
.L11:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2041:
	.size	_Z10parametersiPPc, .-_Z10parametersiPPc
	.globl	_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii
	.type	_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii, @function
_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12Mean_SD_NormPfS_S_S_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii, .-_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii
	.globl	_Z12Mean_SD_NormPfS_S_S_iii
	.type	_Z12Mean_SD_NormPfS_S_S_iii, @function
_Z12Mean_SD_NormPfS_S_S_iii:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii
	.cfi_endproc
.LFE2068:
	.size	_Z12Mean_SD_NormPfS_S_S_iii, .-_Z12Mean_SD_NormPfS_S_S_iii
	.section	.rodata.str1.1
.LC5:
	.string	"\nInitializing...\n"
.LC7:
	.string	"\nStarting clock.\n"
.LC9:
	.string	"Stopped clock.\n"
.LC11:
	.string	"\nElapsed time CPU Time = %g ms.\n"
.LC12:
	.string	"Elapsed GPU Time = %g ms \n"
.LC14:
	.string	"Effective Bandwidth in (GB/s): %f \n"
.LC17:
	.string	"Effective Throughput in  (GFLOPS/s): %f \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2042:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	%rsi, 8(%rsp)
	leaq	24(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z10parametersiPPc
	movl	N(%rip), %edi
	imull	%edi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	movl	N(%rip), %edi
	movq	%rax, %rbx
	imull	%edi, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	_Znam@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L21:
	movslq	N(%rip), %r8
	cmpl	%r12d, %r8d
	jle	.L32
	xorl	%r13d, %r13d
.L23:
	cmpl	%r13d, N(%rip)
	jle	.L33
	call	rand@PLT
	movl	%eax, %edx
	movl	N(%rip), %eax
	cvtsi2ssl	%edx, %xmm0
	mulss	.LC6(%rip), %xmm0
	imull	%r13d, %eax
	incl	%r13d
	addl	%r12d, %eax
	cltq
	movss	%xmm0, (%rbx,%rax,4)
	jmp	.L23
.L33:
	incl	%r12d
	jmp	.L21
.L32:
	movl	%r8d, %r12d
	leaq	0(,%r8,4), %rax
	leaq	40(%rsp), %rdi
	imull	%r8d, %r12d
	movq	%rax, 8(%rsp)
	movslq	%r12d, %r12
	leaq	0(,%r12,4), %r14
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	40(%rsp), %rdi
	movq	%r14, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	%r14, %rsi
	leaq	48(%rsp), %rdi
	leaq	72(%rsp), %r14
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	N(%rip), %edx
	movabsq	$4294967297, %rax
	leaq	.LC7(%rip), %rsi
	movq	%rax, 96(%rsp)
	movl	numThreads(%rip), %eax
	movl	$2, %edi
	movl	%edx, 92(%rsp)
	cmpl	%eax, %edx
	movl	$1, 80(%rsp)
	cmovle	%edx, %eax
	movl	$1, 88(%rsp)
	movl	%eax, 84(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	%r14, %rsi
	leaq	104(%rsp), %rdi
	call	gettimeofday@PLT
	leaq	136(%rsp), %rdi
	call	times@PLT
	movl	88(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movq	8(%rsp), %r8
	movq	80(%rsp), %rdx
	movq	92(%rsp), %rdi
	movl	N(%rip), %r13d
	movl	numThreads(%rip), %r15d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	cvtsi2sdl	%r15d, %xmm1
	cvtsi2sdl	%r13d, %xmm0
	divsd	%xmm1, %xmm0
	call	ceil@PLT
	movl	numThreads(%rip), %r9d
	movl	N(%rip), %r8d
	pushq	%rax
	.cfi_def_cfa_offset 280
	cvttsd2sil	%xmm0, %eax
	pushq	%rax
	.cfi_def_cfa_offset 288
	movq	80(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z41__device_stub__Z12Mean_SD_NormPfS_S_S_iiiPfS_S_S_iii
	popq	%rdx
	.cfi_def_cfa_offset 280
	popq	%rcx
	.cfi_def_cfa_offset 272
.L26:
	call	cudaDeviceSynchronize@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	20(%rsp), %rdi
	movl	$0x00000000, 20(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	%r14, %rsi
	leaq	120(%rsp), %rdi
	call	gettimeofday@PLT
	leaq	168(%rsp), %rdi
	call	times@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	N(%rip), %edx
	movq	48(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	imull	%edx, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	imulq	$1000000, 104(%rsp), %rdx
	imulq	$1000000, 120(%rsp), %rax
	subq	112(%rsp), %rax
	addq	128(%rsp), %rax
	subq	%rdx, %rax
	js	.L27
	cvtsi2ssq	%rax, %xmm0
	jmp	.L28
.L27:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2ssq	%rdx, %xmm0
	addss	%xmm0, %xmm0
.L28:
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	divss	.LC10(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC12(%rip), %rsi
	salq	$3, %r12
	cvtss2sd	20(%rsp), %xmm0
	call	__printf_chk@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2ssq	%r12, %xmm0
	divss	20(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC13(%rip), %xmm0
	call	__printf_chk@PLT
	movl	N(%rip), %r13d
	cvtsi2ssl	%r13d, %xmm3
	movaps	%xmm3, %xmm0
	movss	%xmm3, 8(%rsp)
	call	log2f@PLT
	movd	%xmm0, %r12d
	cvtsi2ssl	%r13d, %xmm0
	call	log2f@PLT
	movl	%r13d, %eax
	movl	$2, %edi
	leaq	.LC17(%rip), %rsi
	mulss	8(%rsp), %xmm0
	imull	%r13d, %eax
	addl	%r13d, %r13d
	cvtsi2ssl	%r13d, %xmm1
	addl	%eax, %eax
	cvtsi2ssl	%eax, %xmm2
	movb	$1, %al
	addss	%xmm0, %xmm1
	movd	%r12d, %xmm0
	mulss	8(%rsp), %xmm0
	addss	8(%rsp), %xmm0
	addss	%xmm2, %xmm1
	addss	%xmm0, %xmm1
	addss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm0
	cvtss2sd	20(%rsp), %xmm1
	mulsd	.LC15(%rip), %xmm0
	mulsd	.LC16(%rip), %xmm1
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE2042:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z12Mean_SD_NormPfS_S_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z12Mean_SD_NormPfS_S_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	numThreads
	.bss
	.align 4
	.type	numThreads, @object
	.size	numThreads, 4
numThreads:
	.zero	4
	.globl	N
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.zero	4
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	939524096
	.align 4
.LC10:
	.long	1148846080
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC13:
	.long	0
	.long	1093567616
	.align 8
.LC15:
	.long	-400107883
	.long	1041313291
	.align 8
.LC16:
	.long	-755914244
	.long	1062232653
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <math.h>
#include <sys/types.h>
#include <sys/times.h>
#include <sys/time.h>
#include <time.h>


#define MAXN 8000  /* Max value of N */
int N;  /* Matrix Dimension*/
int numThreads;  /* Number of Threads */

/*Random*/
#define randm() 4|2[uid]&3

/*CUDA Function for calculating mean column-wise and then reducing each column's totals*/
/*This Function will be called Number of blocks times*/
__global__ void Mean_SD_Norm(float* input,float* output ,float* mean_out,float* sd_out, int dim1, int numThread,int eval_ceil)
{
  extern __shared__ float mean[];//shared 1D-matrix for storing temporary results for mean of each threads 
  extern __shared__ float sd[];//shared 1D-matrix for storing temporary results for sd of each threads 
  __shared__ float meansum;//shared 1D-matrix for storing mean total of each threads
  __shared__ float sdsum;//shared 1D-matrix for storing SD total of each threads
  
  int idx_x = blockIdx.x * blockDim.x + threadIdx.x;//Getting Thread X Index for Particular Block
  int idx_y = blockIdx.y * blockDim.y + threadIdx.y;//Getting Thread Y Index for Particular Block
  int eva_block,index; 	 
  
  unsigned int thread_id = threadIdx.y;//Getting Id of thread
  unsigned int j = idx_y * dim1 + idx_x;//calculating index for input matrix
  
	__syncthreads();//waiting for all threads

	mean[thread_id]=input[j];//Assigned each column element of matrix to each thread

	/*If Dimension is more than Threads then reduce the remaining elements to assigned elements*/	
  for(int i=0;i<dim1;i+=numThread)
  {
		index=dim1*(numThread+thread_id+i);//calculating index of remaining element
		eva_block=index+blockIdx.x;
		if(eva_block < dim1*dim1)
		{
			mean[thread_id]+=input[index];
		}	
  }
  
  /*Reducing sum of each thread to final block sum*/
 if(thread_id==0)
 {
	for(int i=0;i<numThread;i++)
	{
		meansum+=mean[thread_id+i];
	}
	mean_out[blockIdx.x]=meansum/dim1;//Mean of block
 } 

 __syncthreads(); 
 sd[thread_id] = powf(input[j] - mean_out[blockIdx.x], 2.0);//evaluating SD for each thread for particular block

 
 	/*If Dimension is more than Threads then reduce the remaining elements to assigned elements*/	
  for(int i=0;i<dim1;i+=numThread)
  {
		index=dim1*(numThread+thread_id+i);
		eva_block=index+blockIdx.x;
		if(eva_block < dim1*dim1)
		{
			sd[thread_id]+=powf(input[index] - mean_out[blockIdx.x], 2.0);
		}	
  }
  
    /*Reducing SD Sum of each thread to final block SD sum*/
  if(thread_id==0)
 {
	 sdsum=0;
	for(int i=0;i<numThread;i++)
	{
		sdsum+=sd[thread_id+i];//calculating index of remaining element
	}
	sd_out[blockIdx.x]=sdsum/dim1;//SD of block
 } 
 
 __syncthreads();//waiting for threads

	/*Normalization of each block data on basis of mean and sd of each block*/
	output[blockIdx.x*dim1+thread_id] = (input[thread_id+blockIdx.x*dim1] - mean_out[blockIdx.x]) / sd_out[blockIdx.x];	
	
	/*Reducing Normalized Sum for remaining elements*/
	for(int i=0;i<eval_ceil;i++){
		if((numThread+thread_id)+blockIdx.x*dim1 < dim1*dim1)
		{
			output[(numThread+thread_id)+blockIdx.x*dim1] = (input[(numThread+thread_id)+blockIdx.x*dim1] - mean_out[blockIdx.x])/sd_out[blockIdx.x];//Normalizing the Matrix Indexes
		}	
  	}
}

/* returns a seed for srand based on the time */
unsigned int time_seed() {
  struct timeval t;
  struct timezone tzdummy;

  gettimeofday(&t, &tzdummy);
  return (unsigned int)(t.tv_usec);
}

/* Set the program parameters from the command-line arguments */
void parameters(int argc, char **argv) {
  int seed = 0;  /* Random seed */
  char uid[32]; /*User name */

  /* Read command-line arguments */
  srand(time_seed());  /* Randomize */

  if (argc == 4) {	
    seed = atoi(argv[3]);
    srand(seed);
    printf("Random seed = %i\n", seed);
  } 
  if (argc >= 3) {
    N = atoi(argv[1]);
    numThreads = atoi(argv[2]);
    if (N < 1 || N > MAXN) {
      printf("N = %i is out of range.\n", N);
      exit(0);
    }
	
	/*Number of Threads should be less than or equal to 1024 else exit*/
	if (numThreads > 1024) 
	{
      printf("Number of threads cannot be more than %i.\n", 1024);
      exit(0);
    }
  }
  else 
  {
    printf("Usage: %s <matrix_dimension> <Number of Threads> [random seed]\n",argv[0]);    
    exit(0);
  }

  printf("\nMatrix dimension N = %i.\n", N);
}


int main(int argc, char **argv) 
{
  /* Timing variables */
  hipEvent_t start, stop;
  hipEventCreate(&start);
  hipEventCreate(&stop);
  struct timeval etstart, etstop;  /* Elapsed times using gettimeofday() */
  struct timezone tzdummy;
  clock_t etstart2, etstop2;  /* Elapsed times using times() */
  unsigned long long usecstart, usecstop;
  struct tms cputstart, cputstop;  /* CPU times for my processes */

  /* Process program parameters */
  parameters(argc, argv);
 
  float* Host_Input = new float [N * N];//Input Matrix
  float* Host_Output = new float [N * N];//Output Matrix

  int i,j;
/*Initializing Input Matrix with random values*/ 
 printf("\nInitializing...\n");
  for(i=0;i<N;i++)
  {
    for(j=0;j<N;j++)
    {
      //Host_Input[j* N + i] = j+1;
	 Host_Input[j* N + i] = (float)rand() / 32768.0;
    }
  }
 

  float* input;//Device Input Matrix
  float* output;//Device Output Matrix
  float* mean_out;//Device Mean Matrix
  float* sd_out;//Device SD Matrix
  size_t matrix_size_2d = N * N * sizeof(float);//Size of 2D Matrix
  size_t matrix_size_1d = N * sizeof(float);//Size of 1D Matrix

  //allocated the device memory for source array
  hipMalloc(&input, matrix_size_2d);
  hipMemcpy(input, Host_Input, matrix_size_2d, hipMemcpyHostToDevice);

  //allocate the device memory for destination array
  hipMalloc(&output, matrix_size_2d);

  //allocate the device memory for mean array
  hipMalloc(&mean_out, matrix_size_1d);

  //allocate the device memory for sd array
  hipMalloc(&sd_out, matrix_size_1d);

  dim3 dimBlock;
  dim3 dimGrid;

  /* Designing Decisions for number of blocks and number of threads in each block */
  if( N < numThreads)
  {
    dimBlock.x = 1;
    dimBlock.y = N;
    dimGrid.x = N;
    dimGrid.y = 1;
  }
  else
  {
    dimBlock.x = 1;
    dimBlock.y = numThreads;
    dimGrid.x = N;
    dimGrid.y = 1;
  }

  /* Start Clock */
  printf("\nStarting clock.\n");
  hipEventRecord(start);
  gettimeofday(&etstart,&tzdummy);
  etstart2 = times(&cputstart);

	double d_ceil=(double)N/(double)numThreads;
	int c=ceil(d_ceil);

//printf("nt=%d\t c1=%ld\tc=%d\n",nt,c1,c);

  //Calling CUDA Kernel Function For Normalizing Matrix
  Mean_SD_Norm<<<dimGrid, dimBlock, matrix_size_1d>>>(input,output,mean_out,sd_out,N,numThreads,c);
  hipDeviceSynchronize();
  
  /* Stop Clock code below*/
  hipEventRecord(stop);
  hipEventSynchronize(stop);
  float milliseconds = 0;
  hipEventElapsedTime(&milliseconds, start, stop);
  gettimeofday(&etstop, &tzdummy);
  etstop2 = times(&cputstop);
  printf("Stopped clock.\n");

  /*Copying Output Device Matrix to Output Host Matrix*/
  hipMemcpy(Host_Output, output, N * N * sizeof(float), hipMemcpyDeviceToHost);

  usecstart = (unsigned long long)etstart.tv_sec * 1000000 + etstart.tv_usec;
  usecstop = (unsigned long long)etstop.tv_sec * 1000000 + etstop.tv_usec;

  /* Display output */
 /* if (N < 10) {
  printf("\nB1 =\n\t");
    for (i= 0; i < N; i++) {
        for (j = 0; j < N; j++) {
            printf("%1.10f%s", Host_Output[i* N + j], (j < N-1) ? ", " : ";\n\t");
        }
    }
  }*/

  /* Display result time */
  printf("\nElapsed time CPU Time = %g ms.\n", (float)(usecstop - usecstart)/(float)1000);
  printf("Elapsed GPU Time = %g ms \n",milliseconds);
  printf("Effective Bandwidth in (GB/s): %f \n", (2*matrix_size_2d/milliseconds)/1e6);
  float mean = N * log2((float)N) + N;
  float sd = N * log2((float)N) + (2*N) + (2*N*N);
  float norm = 2 * N * N;
  printf("Effective Throughput in  (GFLOPS/s): %f \n", ((mean+sd+norm)*1e-9)/(milliseconds*1e-3)); 

  //deallocate device memory below
  hipFree(input);
  hipFree(output);
  hipFree(mean_out);
  hipFree(sd_out);

  //deallocate Host Input and Host Output Matrix
  free(Host_Input);
  free(Host_Output);

  exit(0);
}

	.text
	.file	"matrix_cuda_norm.hip"
	.globl	_Z27__device_stub__Mean_SD_NormPfS_S_S_iii # -- Begin function _Z27__device_stub__Mean_SD_NormPfS_S_S_iii
	.type	_Z27__device_stub__Mean_SD_NormPfS_S_S_iii,@function
_Z27__device_stub__Mean_SD_NormPfS_S_S_iii: # @_Z27__device_stub__Mean_SD_NormPfS_S_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12Mean_SD_NormPfS_S_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__Mean_SD_NormPfS_S_S_iii, .Lfunc_end0-_Z27__device_stub__Mean_SD_NormPfS_S_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9time_seedv                   # -- Begin function _Z9time_seedv
	.type	_Z9time_seedv,@function
_Z9time_seedv:                          # @_Z9time_seedv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rbx
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	movl	8(%rbx), %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z9time_seedv, .Lfunc_end1-_Z9time_seedv
	.cfi_endproc
                                        # -- End function
	.globl	_Z10parametersiPPc              # -- Begin function _Z10parametersiPPc
	.type	_Z10parametersiPPc,@function
_Z10parametersiPPc:                     # @_Z10parametersiPPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	16(%rsp), %r14
	leaq	8(%rsp), %rsi
	movq	%r14, %rdi
	callq	gettimeofday
	movl	8(%r14), %edi
	callq	srand
	cmpl	$4, %ebp
	jne	.LBB2_2
# %bb.1:                                # %.thread
	movq	24(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	srand
	movl	$.L.str, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_3
.LBB2_2:
	cmpl	$3, %ebp
	jl	.LBB2_10
.LBB2_3:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%eax, N(%rip)
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, numThreads(%rip)
	movl	$-8001, %ecx                    # imm = 0xE0BF
	movl	%ebp, %edx
	addl	%ecx, %edx
	cmpl	%ecx, %edx
	jbe	.LBB2_6
# %bb.4:
	cmpl	$1025, %eax                     # imm = 0x401
	jge	.LBB2_7
# %bb.5:
	movl	$.L.str.4, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB2_6:
	.cfi_def_cfa_offset 64
	movl	$.L.str.1, %edi
	movl	%ebp, %esi
	jmp	.LBB2_8
.LBB2_7:
	movl	$.L.str.2, %edi
	movl	$1024, %esi                     # imm = 0x400
.LBB2_8:
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_9
.LBB2_10:
	movq	(%rbx), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
.LBB2_9:
	xorl	%edi, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z10parametersiPPc, .Lfunc_end2-_Z10parametersiPPc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x38000000                      # float 3.05175781E-5
.LCPI3_1:
	.long	0x447a0000                      # float 1000
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_2:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI3_3:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
.LCPI3_4:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movl	%ebp, %edi
	movq	%rbx, %rsi
	callq	_Z10parametersiPPc
	movl	N(%rip), %r14d
	imull	%r14d, %r14d
	shlq	$2, %r14
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %rbx
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %r14
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	N(%rip), %ebp
	testl	%ebp, %ebp
	movq	%r14, 72(%rsp)                  # 8-byte Spill
	jle	.LBB3_6
# %bb.1:                                # %.preheader.preheader
	xorl	%r15d, %r15d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ebp, %ebp
	jle	.LBB3_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%r12d, %r12d
.LBB3_4:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movl	N(%rip), %ebp
	movl	%ebp, %eax
	imull	%r12d, %eax
	addl	%r15d, %eax
	cltq
	movss	%xmm0, (%rbx,%rax,4)
	incl	%r12d
	cmpl	%ebp, %r12d
	jl	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incl	%r15d
	cmpl	%ebp, %r15d
	jl	.LBB3_2
.LBB3_6:                                # %._crit_edge68
	movslq	%ebp, %r15
	imull	%ebp, %ebp
	leaq	(,%rbp,4), %r12
	shlq	$2, %r15
	leaq	56(%rsp), %r13
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movl	N(%rip), %r12d
	movl	numThreads(%rip), %r13d
	cmpl	%r13d, %r12d
	cmovll	%r12d, %r13d
	btsq	$32, %r12
	shlq	$32, %r13
	orq	$1, %r13
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	88(%rsp), %rdi
	leaq	80(%rsp), %rsi
	callq	gettimeofday
	leaq	152(%rsp), %rdi
	callq	times
	movl	N(%rip), %r14d
	movl	numThreads(%rip), %eax
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r15, %r8
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	cvtsi2sd	%r14d, %xmm0
	cvtsi2sdl	8(%rsp), %xmm1          # 4-byte Folded Reload
	divsd	%xmm1, %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %eax
	movq	56(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rcx
	movl	N(%rip), %r8d
	movl	numThreads(%rip), %r9d
	movl	%eax, (%rsp)
	callq	_Z27__device_stub__Mean_SD_NormPfS_S_S_iii
.LBB3_8:
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	12(%rsp), %rdi
	movl	$0, (%rdi)
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	hipEventElapsedTime
	leaq	104(%rsp), %r15
	leaq	80(%rsp), %rsi
	movq	%r15, %rdi
	callq	gettimeofday
	leaq	120(%rsp), %rdi
	callq	times
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	16(%rsp), %rsi
	movl	N(%rip), %edx
	imull	%edx, %edx
	shlq	$2, %rdx
	movq	72(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%r15), %rcx
	movq	8(%r15), %rax
	subq	88(%rsp), %rcx
	imulq	$1000000, %rcx, %rcx            # imm = 0xF4240
	subq	96(%rsp), %rax
	addq	%rcx, %rax
	js	.LBB3_9
# %bb.10:
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB3_11
.LBB3_9:
	movq	%rax, %rcx
	shrq	%rcx
	andl	$1, %eax
	orq	%rcx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB3_11:
	divss	.LCPI3_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	shlq	$3, %rbp
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rbp, %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI3_2(%rip), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtsi2ssl	N(%rip), %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	callq	_ZSt4log2f
	mulss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtsi2ssl	N(%rip), %xmm1
	movss	%xmm1, 36(%rsp)                 # 4-byte Spill
	addss	%xmm1, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movaps	%xmm1, %xmm0
	callq	_ZSt4log2f
	mulss	36(%rsp), %xmm0                 # 4-byte Folded Reload
	movl	N(%rip), %eax
	leal	(%rax,%rax), %ecx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	addss	%xmm0, %xmm1
	imull	%eax, %ecx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	addss	%xmm0, %xmm1
	addss	8(%rsp), %xmm1                  # 4-byte Folded Reload
	addss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	mulsd	.LCPI3_3(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	12(%rsp), %xmm1
	mulsd	.LCPI3_4(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%edi, %edi
	callq	exit
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt4log2f,"axG",@progbits,_ZSt4log2f,comdat
	.weak	_ZSt4log2f                      # -- Begin function _ZSt4log2f
	.type	_ZSt4log2f,@function
_ZSt4log2f:                             # @_ZSt4log2f
	.cfi_startproc
# %bb.0:
	jmp	log2f                           # TAILCALL
.Lfunc_end4:
	.size	_ZSt4log2f, .Lfunc_end4-_ZSt4log2f
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12Mean_SD_NormPfS_S_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	N,@object                       # @N
	.bss
	.globl	N
	.p2align	2, 0x0
N:
	.long	0                               # 0x0
	.size	N, 4

	.type	numThreads,@object              # @numThreads
	.globl	numThreads
	.p2align	2, 0x0
numThreads:
	.long	0                               # 0x0
	.size	numThreads, 4

	.type	_Z12Mean_SD_NormPfS_S_S_iii,@object # @_Z12Mean_SD_NormPfS_S_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z12Mean_SD_NormPfS_S_S_iii
	.p2align	3, 0x0
_Z12Mean_SD_NormPfS_S_S_iii:
	.quad	_Z27__device_stub__Mean_SD_NormPfS_S_S_iii
	.size	_Z12Mean_SD_NormPfS_S_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Random seed = %i\n"
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"N = %i is out of range.\n"
	.size	.L.str.1, 25

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Number of threads cannot be more than %i.\n"
	.size	.L.str.2, 43

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Usage: %s <matrix_dimension> <Number of Threads> [random seed]\n"
	.size	.L.str.3, 64

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\nMatrix dimension N = %i.\n"
	.size	.L.str.4, 27

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"\nElapsed time CPU Time = %g ms.\n"
	.size	.L.str.8, 33

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Elapsed GPU Time = %g ms \n"
	.size	.L.str.9, 27

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Effective Bandwidth in (GB/s): %f \n"
	.size	.L.str.10, 36

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Effective Throughput in  (GFLOPS/s): %f \n"
	.size	.L.str.11, 42

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12Mean_SD_NormPfS_S_S_iii"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\nInitializing..."
	.size	.Lstr, 17

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\nStarting clock."
	.size	.Lstr.1, 17

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Stopped clock."
	.size	.Lstr.2, 15

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__Mean_SD_NormPfS_S_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12Mean_SD_NormPfS_S_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12Mean_SD_NormPfS_S_S_iii ; -- Begin function _Z12Mean_SD_NormPfS_S_S_iii
	.globl	_Z12Mean_SD_NormPfS_S_S_iii
	.p2align	8
	.type	_Z12Mean_SD_NormPfS_S_S_iii,@function
_Z12Mean_SD_NormPfS_S_S_iii:            ; @_Z12Mean_SD_NormPfS_S_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	v_bfe_u32 v1, v0, 10, 10
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_lshr_b32 s3, s2, 16
	s_and_b32 s0, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mov_b32_e32 v3, 0
	s_mul_i32 s0, s14, s0
	s_cmp_gt_i32 s16, 0
	s_mul_i32 s3, s16, s16
	s_cselect_b32 s13, -1, 0
	s_cmp_lt_i32 s16, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v2, s16
	s_mul_i32 s12, s17, s16
	v_add3_u32 v2, s0, v0, v2
	v_lshl_add_u32 v0, v1, 2, 4
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v8, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v3, vcc_lo
	v_add_nc_u32_e32 v2, s17, v1
	global_load_b32 v5, v[8:9], off
	v_mul_lo_u32 v4, s16, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v5
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v2, s16, v2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s14, v2
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_i32_e64 s3, v3
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v3, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v3, v5
	ds_store_b32 v0, v5
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v2, s12, v2
	s_add_i32 s0, s0, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s0, s16
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %._crit_edge
	v_cmp_eq_u32_e64 s0, 0, v1
	s_mov_b32 s1, exec_lo
	v_cmpx_ne_u32_e32 0, v1
	s_xor_b32 s1, exec_lo, s1
; %bb.6:                                ; %._crit_edge._crit_edge
	s_mov_b32 s15, 0
; %bb.7:                                ; %Flow159
	s_or_saveexec_b32 s1, s1
	v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s15
	s_xor_b32 exec_lo, exec_lo, s1
	s_cbranch_execz .LBB0_13
; %bb.8:                                ; %.preheader
	v_mov_b32_e32 v2, 0
	s_cmp_lt_i32 s17, 1
	ds_load_b32 v2, v2
	s_cbranch_scc1 .LBB0_12
; %bb.9:                                ; %.lr.ph96.preheader
	s_mov_b32 s2, 4
	s_mov_b32 s15, s17
.LBB0_10:                               ; %.lr.ph96
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, s2
	s_add_i32 s15, s15, -1
	s_add_i32 s2, s2, 4
	s_cmp_eq_u32 s15, 0
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v3, v2
	s_cbranch_scc0 .LBB0_10
; %bb.11:                               ; %._crit_edge97
	v_mov_b32_e32 v3, 0
	ds_store_b32 v3, v2
.LBB0_12:
	v_cvt_f32_i32_e32 v3, s16
	s_mov_b32 s15, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[20:21], s[14:15], 2
	s_add_u32 s20, s8, s20
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v5, null, v3, v3, v2
	v_div_scale_f32 v10, vcc_lo, v2, v3, v2
	s_addc_u32 s21, s9, s21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v10, v6
	v_fma_f32 v11, -v5, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v11, v6
	v_fma_f32 v5, -v5, v7, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v5, v5, v6, v7
	v_mov_b32_e32 v6, 0
	v_div_fixup_f32 v5, v5, v3, v2
	v_dual_mov_b32 v2, s14 :: v_dual_mov_b32 v3, s15
	global_store_b32 v6, v5, s[20:21]
.LBB0_13:                               ; %Flow160
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_co_u32 v2, vcc_lo, s8, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v7, vcc_lo
	s_mov_b32 s8, 0x3e76c4e1
	s_mov_b32 s9, 0
	global_load_b32 v5, v[8:9], off
	global_load_b32 v8, v[2:3], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f32_e64 v9, |v5|
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v9
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f32 v9, v9, v10
	v_add_f32_e32 v10, 1.0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v10
	v_add_f32_e32 v14, -1.0, v10
	v_dual_add_f32 v12, -1.0, v9 :: v_dual_sub_f32 v9, v9, v14
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v10, v13
	v_fma_f32 v10, v13, v10, -v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v13, v9
	v_add_f32_e32 v9, v15, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v14, v12, v9 :: v_dual_sub_f32 v15, v9, v15
	v_sub_f32_e32 v10, v15, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v12, v14
	v_sub_f32_e32 v9, v12, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v10, v9
	v_add_f32_e32 v9, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v11, v9
	v_add_f32_e32 v10, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, v10, v13
	v_dual_mul_f32 v12, v10, v10 :: v_dual_sub_f32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, v10, v10, -v12
	v_add_f32_e32 v13, v9, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v10, v13
	v_add_f32_e32 v13, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmaak_f32 v14, s8, v13, 0x3e91f4c4
	v_sub_f32_e32 v12, v13, v12
	v_dual_fmaak_f32 v14, v13, v14, 0x3ecccdef :: v_dual_sub_f32 v11, v11, v12
	v_mul_f32_e32 v17, v10, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v15, v13, v14
	v_fma_f32 v18, v13, v10, -v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, v13, v14, -v15
	v_fmac_f32_e32 v12, v11, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v18, v13, v9
	v_ldexp_f32 v9, v9, 1
	v_add_f32_e32 v14, v15, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v18, v11, v10
	v_ldexp_f32 v10, v10, 1
	v_dual_sub_f32 v15, v14, v15 :: v_dual_add_f32 v16, 0x3f2aaaaa, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v12, v12, v15 :: v_dual_add_f32 v15, 0xbf2aaaaa, v16
	v_add_f32_e32 v12, 0x31739010, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v14, v15
	v_add_f32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v11, v16, v12
	v_dual_add_f32 v13, v17, v18 :: v_dual_sub_f32 v14, v16, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v15, v13, v11
	v_sub_f32_e32 v16, v13, v17
	v_add_f32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v14, v13, v11, -v15
	v_sub_f32_e32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v13, v12
	v_frexp_exp_i32_f32_e32 v12, v5
	v_fmac_f32_e32 v14, v16, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v5
	v_add_f32_e32 v12, v15, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_i32_e32 v11, v11
	v_add_f32_e32 v13, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v15, v12, v15 :: v_dual_sub_f32 v10, v13, v10
	v_sub_f32_e32 v14, v14, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v16, 0x3f317218, v11
	v_sub_f32_e32 v10, v12, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v9, v9, v14
	v_fma_f32 v15, 0x3f317218, v11, -v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v9, v9, v10
	v_fmac_f32_e32 v15, 0xb102e308, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v11, v13, v9 :: v_dual_add_f32 v10, v16, v15
	v_sub_f32_e32 v13, v11, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v9, v9, v13 :: v_dual_add_f32 v12, v10, v11
	v_sub_f32_e32 v14, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v11, v11, v14 :: v_dual_sub_f32 v16, v10, v16
	v_sub_f32_e32 v15, v15, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v15, v9
	v_sub_f32_e32 v17, v12, v14
	v_sub_f32_e32 v10, v10, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, v11, v10 :: v_dual_sub_f32 v11, v13, v15
	v_sub_f32_e32 v9, v9, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v13, v10
	v_sub_f32_e32 v13, v13, v11
	v_dual_sub_f32 v11, v15, v13 :: v_dual_add_f32 v14, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_add_f32 v9, v9, v11 :: v_dual_sub_f32 v12, v14, v12
	v_cndmask_b32_e64 v11, 2.0, 1.0, vcc_lo
	v_sub_f32_e32 v10, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v9, v10
	v_add_f32_e32 v10, v14, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v10, v14
	v_sub_f32_e32 v9, v9, v12
	v_mul_f32_e32 v13, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v10, v11, v10, -v13
	v_cmp_class_f32_e64 vcc_lo, v13, 0x204
	v_fmac_f32_e32 v10, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v13, v10
	v_cndmask_b32_e32 v12, v9, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v12
	v_cndmask_b32_e64 v14, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v12|
	v_sub_f32_e32 v15, v12, v14
	v_trunc_f32_e32 v12, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, 0x3fb8aa3b, v15
	v_fma_f32 v17, 0x3fb8aa3b, v15, -v16
	v_rndne_f32_e32 v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, 0x32a5705f, v15 :: v_dual_sub_f32 v16, v16, v18
	v_add_f32_e32 v16, v16, v17
	v_sub_f32_e32 v9, v9, v13
	v_cvt_i32_f32_e32 v13, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v16, v16
	v_sub_f32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v15
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v16, v13
	v_dual_mul_f32 v13, 0.5, v11 :: v_dual_cndmask_b32 v10, 0, v10
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_trunc_f32_e32 v16, v13
	v_dual_add_f32 v9, v14, v9 :: v_dual_cndmask_b32 v10, 0x7f800000, v10
	v_cmp_eq_f32_e32 vcc_lo, v12, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f32_e64 s1, v16, v13
	v_fma_f32 v9, v10, v9, v10
	v_cmp_eq_f32_e64 s2, 0x7f800000, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	v_cndmask_b32_e64 v11, 1.0, v5, s1
	v_cndmask_b32_e64 v12, 0, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, v9, v10, s2
	v_cmp_eq_f32_e64 s2, 0, v5
	v_cmp_class_f32_e64 s1, v5, 0x204
	v_bfi_b32 v9, 0x7fffffff, v9, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v10, 0x7f800000, 0, s2
	v_cndmask_b32_e32 v11, 0x7fc00000, v9, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfi_b32 v10, 0x7fffffff, v10, v12
	v_cndmask_b32_e32 v9, v9, v11, vcc_lo
	s_or_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v9, v9, v10, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v5, v5
	v_cndmask_b32_e32 v5, 0x7fc00000, v9, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s13
	ds_store_b32 v0, v5
	s_cbranch_vccnz .LBB0_17
.LBB0_14:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, s14, v4
	s_mov_b32 s13, exec_lo
	v_cmpx_gt_i32_e64 s3, v5
	s_cbranch_execz .LBB0_16
; %bb.15:                               ;   in Loop: Header=BB0_14 Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[4:5]
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	global_load_b32 v5, v[9:10], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v5, v8
	v_frexp_mant_f32_e64 v9, |v5|
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0x3f2aaaab, v9
	v_cndmask_b32_e64 v10, 0, 1, vcc_lo
	v_ldexp_f32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, 1.0, v9
	v_rcp_f32_e32 v11, v10
	v_add_f32_e32 v14, -1.0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_add_f32 v12, -1.0, v9 :: v_dual_sub_f32 v9, v9, v14
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v13, v12, v11
	v_mul_f32_e32 v15, v10, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, v13, v10, -v15
	v_fmac_f32_e32 v10, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v15, v10
	v_dual_sub_f32 v14, v12, v9 :: v_dual_sub_f32 v15, v9, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v10, v15, v10
	v_sub_f32_e32 v12, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v12, v9
	v_add_f32_e32 v9, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v9, v14, v9
	v_mul_f32_e32 v9, v11, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v13, v9
	v_sub_f32_e32 v11, v10, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v12, v10, v10 :: v_dual_sub_f32 v9, v9, v11
	v_fma_f32 v11, v10, v10, -v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v9, v9
	v_fmac_f32_e32 v11, v10, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v12, v11
	v_fmaak_f32 v14, s8, v13, 0x3e91f4c4
	v_sub_f32_e32 v12, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmaak_f32 v14, v13, v14, 0x3ecccdef :: v_dual_sub_f32 v11, v11, v12
	v_mul_f32_e32 v17, v10, v13
	v_mul_f32_e32 v15, v13, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, v13, v10, -v17
	v_fma_f32 v12, v13, v14, -v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v12, v11, v14
	v_fmac_f32_e32 v18, v13, v9
	v_ldexp_f32 v9, v9, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v14, v15, v12
	v_fmac_f32_e32 v18, v11, v10
	v_ldexp_f32 v10, v10, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v15, v14, v15 :: v_dual_add_f32 v16, 0x3f2aaaaa, v14
	v_dual_sub_f32 v12, v12, v15 :: v_dual_add_f32 v15, 0xbf2aaaaa, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v12, 0x31739010, v12
	v_sub_f32_e32 v14, v14, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v12, v12, v14
	v_add_f32_e32 v11, v16, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v13, v17, v18 :: v_dual_sub_f32 v14, v16, v11
	v_mul_f32_e32 v15, v13, v11
	v_sub_f32_e32 v16, v13, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v12, v12, v14
	v_fma_f32 v14, v13, v11, -v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v16, v18, v16
	v_fmac_f32_e32 v14, v13, v12
	v_frexp_exp_i32_f32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v16, v11
	v_subrev_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v12, v15, v14
	v_cvt_f32_i32_e32 v11, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v13, v10, v12
	v_dual_sub_f32 v15, v12, v15 :: v_dual_sub_f32 v10, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v14, v14, v15
	v_mul_f32_e32 v16, 0x3f317218, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v10, v12, v10
	v_add_f32_e32 v9, v9, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v15, 0x3f317218, v11, -v16
	v_add_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v15, 0xb102e308, v11
	v_dual_add_f32 v11, v13, v9 :: v_dual_add_f32 v10, v16, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v13, v11, v13
	v_dual_sub_f32 v9, v9, v13 :: v_dual_add_f32 v12, v10, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v14, v12, v10
	v_dual_sub_f32 v11, v11, v14 :: v_dual_sub_f32 v16, v10, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v15, v15, v16
	v_add_f32_e32 v13, v15, v9
	v_sub_f32_e32 v17, v12, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v17
	v_dual_add_f32 v10, v11, v10 :: v_dual_sub_f32 v11, v13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v9, v9, v11
	v_add_f32_e32 v10, v13, v10
	v_sub_f32_e32 v13, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v11, v15, v13 :: v_dual_add_f32 v14, v12, v10
	v_dual_add_f32 v9, v9, v11 :: v_dual_sub_f32 v12, v14, v12
	v_cndmask_b32_e64 v11, 2.0, 1.0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v10, v10, v12
	v_add_f32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v14, v9
	v_sub_f32_e32 v12, v10, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v12
	v_mul_f32_e32 v13, v11, v10
	v_fma_f32 v10, v11, v10, -v13
	v_cmp_class_f32_e64 vcc_lo, v13, 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v9
	v_add_f32_e32 v9, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v12, v9, v13, vcc_lo
	v_cmp_eq_f32_e32 vcc_lo, 0x42b17218, v12
	v_cndmask_b32_e64 v14, 0, 0x37000000, vcc_lo
	v_cmp_neq_f32_e64 vcc_lo, 0x7f800000, |v12|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v15, v12, v14
	v_trunc_f32_e32 v12, v11
	v_mul_f32_e32 v16, 0x3fb8aa3b, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v17, 0x3fb8aa3b, v15, -v16
	v_rndne_f32_e32 v18, v16
	v_dual_fmac_f32 v17, 0x32a5705f, v15 :: v_dual_sub_f32 v16, v16, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v16, v16, v17
	v_sub_f32_e32 v9, v9, v13
	v_cvt_i32_f32_e32 v13, v18
	v_exp_f32_e32 v16, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v10, v9
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v15
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v10, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v13, 0.5, v11 :: v_dual_cndmask_b32 v10, 0, v10
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v15
	v_trunc_f32_e32 v16, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_add_f32 v9, v14, v9 :: v_dual_cndmask_b32 v10, 0x7f800000, v10
	v_cmp_eq_f32_e32 vcc_lo, v12, v11
	v_cmp_neq_f32_e64 s1, v16, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v9, v10, v9, v10
	v_cmp_eq_f32_e64 s2, 0x7f800000, v10
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v11, 1.0, v5, s1
	v_cndmask_b32_e64 v13, 0, v5, s1
	v_cndmask_b32_e64 v9, v9, v10, s2
	v_cmp_eq_f32_e64 s2, 0, v5
	ds_load_b32 v10, v0
	v_cmp_class_f32_e64 s1, v5, 0x204
	v_bfi_b32 v9, 0x7fffffff, v9, v11
	v_cndmask_b32_e64 v11, 0x7f800000, 0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v12, 0x7fc00000, v9, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0, v5
	v_bfi_b32 v11, 0x7fffffff, v11, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, v9, v12, vcc_lo
	s_or_b32 vcc_lo, s2, s1
	v_cndmask_b32_e32 v9, v9, v11, vcc_lo
	v_cmp_o_f32_e32 vcc_lo, v5, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, 0x7fc00000, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v10, v5
	ds_store_b32 v0, v5
.LBB0_16:                               ;   in Loop: Header=BB0_14 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_add_nc_u32_e32 v4, s12, v4
	s_add_i32 s9, s9, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s9, s16
	s_cbranch_scc0 .LBB0_14
.LBB0_17:                               ; %._crit_edge101
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_22
; %bb.18:
	v_mov_b32_e32 v0, 0
	s_cmp_lt_i32 s17, 1
	s_cbranch_scc1 .LBB0_21
; %bb.19:                               ; %.lr.ph104.preheader
	s_mov_b32 s0, 4
	s_mov_b32 s2, s17
.LBB0_20:                               ; %.lr.ph104
                                        ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v4, s0
	s_add_i32 s2, s2, -1
	s_add_i32 s0, s0, 4
	s_cmp_eq_u32 s2, 0
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, v4, v0
	s_cbranch_scc0 .LBB0_20
.LBB0_21:                               ; %._crit_edge105
	v_cvt_f32_i32_e32 v4, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v5, null, v4, v4, v0
	v_div_scale_f32 v10, vcc_lo, v0, v4, v0
	v_rcp_f32_e32 v8, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v5, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_mul_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v5, v9, v10
	v_fmac_f32_e32 v9, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v9, v10
	v_div_fmas_f32 v5, v5, v8, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v0, v5, v4, v0
	v_add_co_u32 v4, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v7, vcc_lo
	global_store_b32 v[4:5], v0, off
.LBB0_22:                               ; %Flow155
	s_or_b32 exec_lo, exec_lo, s1
	v_mad_u64_u32 v[4:5], null, s14, s16, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v12, v[2:3], off
	v_mov_b32_e32 v5, 0
	s_cmp_lt_i32 s18, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_add_co_u32 v10, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v0, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v6, v[10:11], off
	global_load_b32 v7, v[0:1], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v6, v6, v12
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v10, null, v7, v7, v6
	v_div_scale_f32 v13, vcc_lo, v6, v7, v6
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v10, v11, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v12, v11
	v_mul_f32_e32 v12, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, -v10, v12, v13
	v_fmac_f32_e32 v12, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v10, v12, v13
	v_div_fmas_f32 v10, v10, v11, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v10, v10, v7, v6
	v_add_co_u32 v6, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v9, vcc_lo
	global_store_b32 v[6:7], v10, off
	s_cbranch_scc1 .LBB0_27
; %bb.23:                               ; %.lr.ph109
	v_add_nc_u32_e32 v4, s17, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_cmp_gt_u32_e64 s0, s3, v4
	v_add_co_u32 v4, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
.LBB0_24:                               ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_24 Depth=1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v[2:3], off
	global_load_b32 v10, v[0:1], off
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v8, v8, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v9, null, v10, v10, v8
	v_rcp_f32_e32 v11, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v9, v11, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v12, v11
	v_div_scale_f32 v12, vcc_lo, v8, v10, v8
	v_mul_f32_e32 v13, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, -v9, v13, v12
	v_fmac_f32_e32 v13, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v9, v13, v12
	v_div_fmas_f32 v9, v9, v11, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v8, v9, v10, v8
	global_store_b32 v[6:7], v8, off
.LBB0_26:                               ;   in Loop: Header=BB0_24 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_i32 s18, s18, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s18, 0
	s_cbranch_scc0 .LBB0_24
.LBB0_27:                               ; %._crit_edge110
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12Mean_SD_NormPfS_S_S_iii
		.amdhsa_group_segment_fixed_size 4
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12Mean_SD_NormPfS_S_S_iii, .Lfunc_end0-_Z12Mean_SD_NormPfS_S_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3540
; NumSgprs: 24
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         168
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 4
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12Mean_SD_NormPfS_S_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z12Mean_SD_NormPfS_S_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
