#include <stdio.h>
#include <cuda.h>

int *a, *b;  // host data
int *c, *c2;  // results

//Cuda error checking - non mandatory
void cudaCheckError() {
 cudaError_t e=cudaGetLastError();
 if(e!=cudaSuccess) {
   printf("Cuda failure %s:%d: '%s'\n",__FILE__,__LINE__,cudaGetErrorString(e));
   exit(0);
 }
}

//GPU kernel
__global__
void matrixMultiply(int* A,int* B,int* C, int N){
    int ai = threadIdx.y * blockDim.x;
    int bi = threadIdx.x;
    int ci = threadIdx.x + threadIdx.y * blockDim.x ;
    int result = 0;
    if(ci < N) {
      for(int i = 0; i < 4; i++){
          result += A[ai] * B[bi];
          ai++;
          bi += 4;
      }
      C[ci] = result;
    }
}

int main(int argc,char **argv) {

    printf("Begin \n");
    //Iterations
    int n=16; //cantidad de elementos de la matriz, x * y
    //Number of blocks
    int nBytes = n*sizeof(int);

    //memory allocation
    a = (int *) malloc(nBytes);
    b = (int *) malloc(nBytes);
    c = (int *) malloc(nBytes);
    c2 = (int *) malloc(nBytes);

    // Data filling
    for(int i=0;i<n;i++)
    a[i]=i,b[i]=i;

    printf("Allocating device memory on host..\n");
   //GPU memory allocation
    int *a_d,*b_d,*c_d;
    cudaMalloc((void **) &a_d, n*sizeof(int));
    cudaMalloc((void **) &b_d, n*sizeof(int));
    cudaMalloc((void **) &c_d, n*sizeof(int));

    printf("Copying to device..\n");
    cudaMemcpy(a_d, a, n*sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(b_d, b, n*sizeof(int), cudaMemcpyHostToDevice);

    //Work definition
    dim3 threadsPerBlock(4, 4);
    dim3 numBlocks(1, 1);

    printf("Doing GPU Vector Multiplication\n");
    matrixMultiply<<<numBlocks, threadsPerBlock>>>(a_d, b_d, c_d, n);
    cudaCheckError();

    //Wait for kernel call to finish
    cudaDeviceSynchronize();

    //Copying data back to host, this is a blocking call and will not start until all kernels are finished
    printf("Copying back to host...\n");
    cudaMemcpy(c, c_d, n*sizeof(int), cudaMemcpyDeviceToHost);
    int counter = 0;
    
    printf("A\n");    
    for(int i = 0; i < 4; i++) {
	for(int j = 0; j < 4; j++) {
          printf("%d ",a[counter]);
	  counter++;
	}
	printf("\n");
    }

    counter = 0;

    printf("B\n");    
    for(int i = 0; i < 4; i++) {
	for(int j = 0; j < 4; j++) {
          printf("%d ",b[counter]);
	  counter++;
	}
	printf("\n");
    }
 
    counter = 0;

    printf("C\n");    
    for(int i = 0; i < 4; i++) {
	for(int j = 0; j < 4; j++) {
          printf("%d ",c[counter]);
	  counter++;
	}
	printf("\n");
    }

    //Free GPU memory
    cudaFree(a_d);
    cudaFree(b_d);
    cudaFree(c_d);
    return 0;
}

	.file	"tmpxft_002547d9_00000000-6_matrixMultiply.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/jeanpaullm/arquiII/master/Taller5/multiply/matrixMultiply.cu"
.LC1:
	.string	"Cuda failure %s:%d: '%s'\n"
	.text
	.globl	_Z14cudaCheckErrorv
	.type	_Z14cudaCheckErrorv, @function
_Z14cudaCheckErrorv:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rdx
	.cfi_def_cfa_offset 16
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	$11, %ecx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L2:
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14cudaCheckErrorv, .-_Z14cudaCheckErrorv
	.globl	_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i
	.type	_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i, @function
_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14matrixMultiplyPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i, .-_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i
	.globl	_Z14matrixMultiplyPiS_S_i
	.type	_Z14matrixMultiplyPiS_S_i, @function
_Z14matrixMultiplyPiS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z14matrixMultiplyPiS_S_i, .-_Z14matrixMultiplyPiS_S_i
	.section	.rodata.str1.1
.LC2:
	.string	"Begin \n"
.LC3:
	.string	"Allocating device memory on host..\n"
.LC4:
	.string	"Copying to device..\n"
.LC5:
	.string	"Doing GPU Vector Multiplication\n"
.LC6:
	.string	"Copying back to host...\n"
.LC7:
	.string	"A\n"
.LC8:
	.string	"%d "
.LC9:
	.string	"\n"
.LC10:
	.string	"B\n"
.LC11:
	.string	"C\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$64, %edi
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, a(%rip)
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, b(%rip)
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, c(%rip)
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rax, c2(%rip)
.L12:
	movl	%edx, 0(%rbp,%rdx,4)
	movl	%edx, (%rbx,%rdx,4)
	incq	%rdx
	cmpq	$16, %rdx
	jne	.L12
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	a(%rip), %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	b(%rip), %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	leaq	.LC5(%rip), %rsi
	movabsq	$17179869188, %rax
	movl	$2, %edi
	movq	%rax, 32(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 44(%rsp)
	xorl	%eax, %eax
	movl	$1, 40(%rsp)
	movl	$1, 52(%rsp)
	call	__printf_chk@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$16, %ecx
	movq	8(%rsp), %rdi
	call	_Z39__device_stub__Z14matrixMultiplyPiS_S_iPiS_S_i
.L13:
	call	_Z14cudaCheckErrorv
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	leaq	.LC8(%rip), %r14
	call	cudaDeviceSynchronize@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	c(%rip), %rdi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	movq	%r12, %rbp
	movl	$4, %ebx
.L15:
	movq	a(%rip), %rax
	movq	%r14, %rsi
	movl	$2, %edi
	movl	(%rax,%rbp), %edx
	xorl	%eax, %eax
	addq	$4, %rbp
	call	__printf_chk@PLT
	decl	%ebx
	jne	.L15
	movl	$2, %edi
	xorl	%eax, %eax
	addl	$4, %r13d
	addq	$16, %r12
	leaq	.LC9(%rip), %r15
	movq	%r15, %rsi
	call	__printf_chk@PLT
	cmpl	$16, %r13d
	jne	.L14
	leaq	.LC10(%rip), %rsi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
.L17:
	movq	%r12, %rbp
	movl	$4, %ebx
.L18:
	movq	b(%rip), %rax
	movq	%r14, %rsi
	movl	$2, %edi
	movl	(%rax,%rbp), %edx
	xorl	%eax, %eax
	addq	$4, %rbp
	call	__printf_chk@PLT
	decl	%ebx
	jne	.L18
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addl	$4, %r13d
	call	__printf_chk@PLT
	addq	$16, %r12
	cmpl	$16, %r13d
	jne	.L17
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
.L20:
	movq	%r12, %rbp
	movl	$4, %ebx
.L21:
	movq	c(%rip), %rax
	movq	%r14, %rsi
	movl	$2, %edi
	movl	(%rax,%rbp), %edx
	xorl	%eax, %eax
	addq	$4, %rbp
	call	__printf_chk@PLT
	decl	%ebx
	jne	.L21
	movq	%r15, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addl	$4, %r13d
	call	__printf_chk@PLT
	addq	$16, %r12
	cmpl	$16, %r13d
	jne	.L20
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z14matrixMultiplyPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14matrixMultiplyPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	c2
	.bss
	.align 8
	.type	c2, @object
	.size	c2, 8
c2:
	.zero	8
	.globl	c
	.align 8
	.type	c, @object
	.size	c, 8
c:
	.zero	8
	.globl	b
	.align 8
	.type	b, @object
	.size	b, 8
b:
	.zero	8
	.globl	a
	.align 8
	.type	a, @object
	.size	a, 8
a:
	.zero	8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>

int *a, *b;  // host data
int *c, *c2;  // results

//Cuda error checking - non mandatory
void cudaCheckError() {
 hipError_t e=hipGetLastError();
 if(e!=hipSuccess) {
   printf("Cuda failure %s:%d: '%s'\n",__FILE__,__LINE__,hipGetErrorString(e));
   exit(0);
 }
}

//GPU kernel
__global__
void matrixMultiply(int* A,int* B,int* C, int N){
    int ai = threadIdx.y * blockDim.x;
    int bi = threadIdx.x;
    int ci = threadIdx.x + threadIdx.y * blockDim.x ;
    int result = 0;
    if(ci < N) {
      for(int i = 0; i < 4; i++){
          result += A[ai] * B[bi];
          ai++;
          bi += 4;
      }
      C[ci] = result;
    }
}

int main(int argc,char **argv) {

    printf("Begin \n");
    //Iterations
    int n=16; //cantidad de elementos de la matriz, x * y
    //Number of blocks
    int nBytes = n*sizeof(int);

    //memory allocation
    a = (int *) malloc(nBytes);
    b = (int *) malloc(nBytes);
    c = (int *) malloc(nBytes);
    c2 = (int *) malloc(nBytes);

    // Data filling
    for(int i=0;i<n;i++)
    a[i]=i,b[i]=i;

    printf("Allocating device memory on host..\n");
   //GPU memory allocation
    int *a_d,*b_d,*c_d;
    hipMalloc((void **) &a_d, n*sizeof(int));
    hipMalloc((void **) &b_d, n*sizeof(int));
    hipMalloc((void **) &c_d, n*sizeof(int));

    printf("Copying to device..\n");
    hipMemcpy(a_d, a, n*sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(b_d, b, n*sizeof(int), hipMemcpyHostToDevice);

    //Work definition
    dim3 threadsPerBlock(4, 4);
    dim3 numBlocks(1, 1);

    printf("Doing GPU Vector Multiplication\n");
    matrixMultiply<<<numBlocks, threadsPerBlock>>>(a_d, b_d, c_d, n);
    cudaCheckError();

    //Wait for kernel call to finish
    hipDeviceSynchronize();

    //Copying data back to host, this is a blocking call and will not start until all kernels are finished
    printf("Copying back to host...\n");
    hipMemcpy(c, c_d, n*sizeof(int), hipMemcpyDeviceToHost);
    int counter = 0;
    
    printf("A\n");    
    for(int i = 0; i < 4; i++) {
	for(int j = 0; j < 4; j++) {
          printf("%d ",a[counter]);
	  counter++;
	}
	printf("\n");
    }

    counter = 0;

    printf("B\n");    
    for(int i = 0; i < 4; i++) {
	for(int j = 0; j < 4; j++) {
          printf("%d ",b[counter]);
	  counter++;
	}
	printf("\n");
    }
 
    counter = 0;

    printf("C\n");    
    for(int i = 0; i < 4; i++) {
	for(int j = 0; j < 4; j++) {
          printf("%d ",c[counter]);
	  counter++;
	}
	printf("\n");
    }

    //Free GPU memory
    hipFree(a_d);
    hipFree(b_d);
    hipFree(c_d);
    return 0;
}

	.text
	.file	"matrixMultiply.hip"
	.globl	_Z14cudaCheckErrorv             # -- Begin function _Z14cudaCheckErrorv
	.type	_Z14cudaCheckErrorv,@function
_Z14cudaCheckErrorv:                    # @_Z14cudaCheckErrorv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$11, %edx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z14cudaCheckErrorv, .Lfunc_end0-_Z14cudaCheckErrorv
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__matrixMultiplyPiS_S_i # -- Begin function _Z29__device_stub__matrixMultiplyPiS_S_i
	.type	_Z29__device_stub__matrixMultiplyPiS_S_i,@function
_Z29__device_stub__matrixMultiplyPiS_S_i: # @_Z29__device_stub__matrixMultiplyPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14matrixMultiplyPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__matrixMultiplyPiS_S_i, .Lfunc_end1-_Z29__device_stub__matrixMultiplyPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$64, %edi
	callq	malloc
	movq	%rax, %rbx
	movq	%rax, a(%rip)
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r14
	movq	%rax, b(%rip)
	movl	$64, %edi
	callq	malloc
	movq	%rax, c(%rip)
	movl	$64, %edi
	callq	malloc
	movq	%rax, c2(%rip)
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rbx,%rax,4)
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	cmpq	$16, %rax
	jne	.LBB2_1
# %bb.2:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	24(%rsp), %rbx
	movl	$64, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$64, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	(%rbx), %rdi
	movq	a(%rip), %rsi
	movl	$64, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	b(%rip), %rsi
	movl	$64, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$16, %ecx
	callq	_Z29__device_stub__matrixMultiplyPiS_S_i
.LBB2_4:
	callq	_Z14cudaCheckErrorv
	callq	hipDeviceSynchronize
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	c(%rip), %rdi
	movq	8(%rsp), %rsi
	movl	$64, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
.LBB2_5:                                # %.preheader63
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	xorl	%r14d, %r14d
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	a(%rip), %rax
	addq	%rbx, %rax
	movl	(%rax,%r14,4), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpl	$4, %r14d
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%ebp
	addq	$16, %rbx
	cmpl	$4, %ebp
	jne	.LBB2_5
# %bb.8:
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
.LBB2_9:                                # %.preheader62
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_10 Depth 2
	xorl	%r14d, %r14d
.LBB2_10:                               #   Parent Loop BB2_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	b(%rip), %rax
	addq	%rbx, %rax
	movl	(%rax,%r14,4), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpl	$4, %r14d
	jne	.LBB2_10
# %bb.11:                               #   in Loop: Header=BB2_9 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%ebp
	addq	$16, %rbx
	cmpl	$4, %ebp
	jne	.LBB2_9
# %bb.12:
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	xorl	%ebx, %ebx
	xorl	%ebp, %ebp
.LBB2_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_14 Depth 2
	xorl	%r14d, %r14d
.LBB2_14:                               #   Parent Loop BB2_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	c(%rip), %rax
	addq	%rbx, %rax
	movl	(%rax,%r14,4), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpl	$4, %r14d
	jne	.LBB2_14
# %bb.15:                               #   in Loop: Header=BB2_13 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%ebp
	addq	$16, %rbx
	cmpl	$4, %ebp
	jne	.LBB2_13
# %bb.16:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14matrixMultiplyPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	a,@object                       # @a
	.bss
	.globl	a
	.p2align	3, 0x0
a:
	.quad	0
	.size	a, 8

	.type	b,@object                       # @b
	.globl	b
	.p2align	3, 0x0
b:
	.quad	0
	.size	b, 8

	.type	c,@object                       # @c
	.globl	c
	.p2align	3, 0x0
c:
	.quad	0
	.size	c, 8

	.type	c2,@object                      # @c2
	.globl	c2
	.p2align	3, 0x0
c2:
	.quad	0
	.size	c2, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Cuda failure %s:%d: '%s'\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/jeanpaullm/arquiII/master/Taller5/multiply/matrixMultiply.hip"
	.size	.L.str.1, 124

	.type	_Z14matrixMultiplyPiS_S_i,@object # @_Z14matrixMultiplyPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z14matrixMultiplyPiS_S_i
	.p2align	3, 0x0
_Z14matrixMultiplyPiS_S_i:
	.quad	_Z29__device_stub__matrixMultiplyPiS_S_i
	.size	_Z14matrixMultiplyPiS_S_i, 8

	.type	.L.str.8,@object                # @.str.8
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.8:
	.asciz	"%d "
	.size	.L.str.8, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14matrixMultiplyPiS_S_i"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Begin "
	.size	.Lstr, 7

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Allocating device memory on host.."
	.size	.Lstr.1, 35

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Copying to device.."
	.size	.Lstr.2, 20

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Doing GPU Vector Multiplication"
	.size	.Lstr.3, 32

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Copying back to host..."
	.size	.Lstr.4, 24

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"A"
	.size	.Lstr.5, 2

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"B"
	.size	.Lstr.6, 2

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"C"
	.size	.Lstr.7, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__matrixMultiplyPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14matrixMultiplyPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14matrixMultiplyPiS_S_i ; -- Begin function _Z14matrixMultiplyPiS_S_i
	.globl	_Z14matrixMultiplyPiS_S_i
	.p2align	8
	.type	_Z14matrixMultiplyPiS_S_i,@function
_Z14matrixMultiplyPiS_S_i:              ; @_Z14matrixMultiplyPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v5, v0, s2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v5
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_u32_u24_e32 v0, s2, v0
	v_dual_mov_b32 v4, 0 :: v_dual_lshlrev_b32 v1, 2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, s2, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, null, s5, 0, s2
	v_add_co_u32 v0, s2, s6, v1
	v_add_co_ci_u32_e64 v1, null, s7, 0, s2
	s_mov_b64 s[2:3], 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v2, vcc_lo, v6, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v7, vcc_lo
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	global_load_b32 v8, v[0:1], off
	global_load_b32 v9, v[2:3], off
	v_add_co_u32 v0, vcc_lo, v0, 16
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	s_cmp_eq_u32 s2, 16
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v8, v9, v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v4, v2
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	v_lshlrev_b32_e32 v0, 2, v5
	global_store_b32 v0, v2, s[0:1]
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14matrixMultiplyPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14matrixMultiplyPiS_S_i, .Lfunc_end0-_Z14matrixMultiplyPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 10
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14matrixMultiplyPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z14matrixMultiplyPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
