#include <stdio.h>
#define DSIZE 1024


__global__ void prescan(int *d_output, int *d_input, int n)
{
    extern __shared__ int shmem[];
    int T = threadIdx.x;
    int offset = 1;

    //there are n/2 threads so each thread must load 2 data points
    shmem[2*T] = d_input[2*T]; // load even indices into shared memory
    shmem[2*T+1] = d_input[2*T+1]; //load odd indices

    for (int d = n>>1; d > 0; d >>= 1) //upsweep, compute partial sums
    {
        __syncthreads();
        if (T < d)
        {
            int ai = offset*(2*T+1)-1;
            int bi = offset*(2*T+2)-1;
            shmem[bi] += shmem[ai];
        }
    offset *= 2;
    }

    if (T == 0) { shmem[n - 1] = 0; } //last element to 0
    for (int d = 1; d < n; d *= 2) //downsweep, use partial sums to complete the psum
    {
        offset >>= 1;
        __syncthreads();

        if (T < d){
         int ai = offset*(2*T+1)-1;
         int bi = offset*(2*T+2)-1;
         int temp = shmem[ai];
         shmem[ai] = shmem[bi];
         shmem[bi] += temp;
        }
    }

    __syncthreads();
    d_output[2*T] = shmem[2*T]; //write to global memory in even odd pairs like above
    d_output[2*T+1] = shmem[2*T+1];
}

int main(){

    //input and output data arrays
    int *h_i, *d_i, *h_o, *d_o;
    int dszp = (DSIZE)*sizeof(int);

    //allocate memory for host
    h_i = (int *)malloc(dszp);
    h_o = (int *)malloc(dszp);
    
    //allocate for device
    cudaMalloc(&d_i, dszp);
    cudaMalloc(&d_o, dszp);

    //load sample data for input, and initialize output to 0
    for (int i = 0 ; i < DSIZE; i++){
        h_i[i] = i;
        h_o[i] = 0;
    }

    //set device output to 0
    cudaMemset(d_o, 0, dszp);

    //copy sample data from host to device
    cudaMemcpy(d_i, h_i, dszp, cudaMemcpyHostToDevice);
    
    //launch kernel
    prescan<<<1,DSIZE/2, dszp>>>(d_o, d_i, DSIZE);
    
    //copy output from kernel to host memory
    cudaMemcpy(h_o, d_o, dszp, cudaMemcpyDeviceToHost);
    
    //error checking
    int psum = 0;
    for (int i =1; i < DSIZE; i++){
        psum += h_i[i-1];
        if (psum != h_o[i]) {printf("mismatch at %d, was: %d, should be: %d\n", i, h_o[i], psum); return 1;}
    }


    //print input and output
    printf("The input of the program is: \n");
    for(int i = 0; i < DSIZE && i < 20; i++){
        printf("%d\n",h_i[i]);
    }

    printf("The output of the program is: \n");
    for(int i = 0; i < DSIZE && i < 20; i++){
        printf("%d\n",h_o[i]);
    }
  return 0;
}
	.file	"tmpxft_003340f5_00000000-6_psum.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z7prescanPiS_iPiS_i
	.type	_Z29__device_stub__Z7prescanPiS_iPiS_i, @function
_Z29__device_stub__Z7prescanPiS_iPiS_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7prescanPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z7prescanPiS_iPiS_i, .-_Z29__device_stub__Z7prescanPiS_iPiS_i
	.globl	_Z7prescanPiS_i
	.type	_Z7prescanPiS_i, @function
_Z7prescanPiS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7prescanPiS_iPiS_i
	.cfi_endproc
.LFE2053:
	.size	_Z7prescanPiS_i, .-_Z7prescanPiS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"mismatch at %d, was: %d, should be: %d\n"
.LC1:
	.string	"The input of the program is: \n"
.LC2:
	.string	"%d\n"
.LC3:
	.string	"The output of the program is: \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$4096, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rsp, %rdi
	movl	$4096, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	xorl	%ecx, %ecx
.L9:
	movl	%ecx, 0(%rbp,%rcx,4)
	incq	%rcx
	cmpq	$1024, %rcx
	jne	.L9
	xorl	%eax, %eax
	movq	%rbx, %rdi
	xorl	%esi, %esi
	movl	$4096, %edx
	rep stosl
	movq	8(%rsp), %rdi
	call	cudaMemset@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	movl	$4096, %r8d
	salq	$9, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$1024, %edx
	call	_Z29__device_stub__Z7prescanPiS_iPiS_i
.L10:
	movq	8(%rsp), %rsi
	movl	$4096, %edx
	movl	$2, %ecx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$1, %edx
	xorl	%r8d, %r8d
.L13:
	movl	(%rbx,%rdx,4), %ecx
	addl	-4(%rbp,%rdx,4), %r8d
	cmpl	%r8d, %ecx
	je	.L11
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L8
.L11:
	incq	%rdx
	cmpq	$1024, %rdx
	jne	.L13
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	leaq	.LC2(%rip), %r13
.L14:
	movl	0(%rbp,%r12,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$20, %r12
	jne	.L14
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	call	__printf_chk@PLT
.L15:
	movl	(%rbx,%rbp,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$20, %rbp
	jne	.L15
	xorl	%eax, %eax
.L8:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z7prescanPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7prescanPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#define DSIZE 1024


__global__ void prescan(int *d_output, int *d_input, int n)
{
    extern __shared__ int shmem[];
    int T = threadIdx.x;
    int offset = 1;

    //there are n/2 threads so each thread must load 2 data points
    shmem[2*T] = d_input[2*T]; // load even indices into shared memory
    shmem[2*T+1] = d_input[2*T+1]; //load odd indices

    for (int d = n>>1; d > 0; d >>= 1) //upsweep, compute partial sums
    {
        __syncthreads();
        if (T < d)
        {
            int ai = offset*(2*T+1)-1;
            int bi = offset*(2*T+2)-1;
            shmem[bi] += shmem[ai];
        }
    offset *= 2;
    }

    if (T == 0) { shmem[n - 1] = 0; } //last element to 0
    for (int d = 1; d < n; d *= 2) //downsweep, use partial sums to complete the psum
    {
        offset >>= 1;
        __syncthreads();

        if (T < d){
         int ai = offset*(2*T+1)-1;
         int bi = offset*(2*T+2)-1;
         int temp = shmem[ai];
         shmem[ai] = shmem[bi];
         shmem[bi] += temp;
        }
    }

    __syncthreads();
    d_output[2*T] = shmem[2*T]; //write to global memory in even odd pairs like above
    d_output[2*T+1] = shmem[2*T+1];
}

int main(){

    //input and output data arrays
    int *h_i, *d_i, *h_o, *d_o;
    int dszp = (DSIZE)*sizeof(int);

    //allocate memory for host
    h_i = (int *)malloc(dszp);
    h_o = (int *)malloc(dszp);
    
    //allocate for device
    hipMalloc(&d_i, dszp);
    hipMalloc(&d_o, dszp);

    //load sample data for input, and initialize output to 0
    for (int i = 0 ; i < DSIZE; i++){
        h_i[i] = i;
        h_o[i] = 0;
    }

    //set device output to 0
    hipMemset(d_o, 0, dszp);

    //copy sample data from host to device
    hipMemcpy(d_i, h_i, dszp, hipMemcpyHostToDevice);
    
    //launch kernel
    prescan<<<1,DSIZE/2, dszp>>>(d_o, d_i, DSIZE);
    
    //copy output from kernel to host memory
    hipMemcpy(h_o, d_o, dszp, hipMemcpyDeviceToHost);
    
    //error checking
    int psum = 0;
    for (int i =1; i < DSIZE; i++){
        psum += h_i[i-1];
        if (psum != h_o[i]) {printf("mismatch at %d, was: %d, should be: %d\n", i, h_o[i], psum); return 1;}
    }


    //print input and output
    printf("The input of the program is: \n");
    for(int i = 0; i < DSIZE && i < 20; i++){
        printf("%d\n",h_i[i]);
    }

    printf("The output of the program is: \n");
    for(int i = 0; i < DSIZE && i < 20; i++){
        printf("%d\n",h_o[i]);
    }
  return 0;
}
	.text
	.file	"psum.hip"
	.globl	_Z22__device_stub__prescanPiS_i # -- Begin function _Z22__device_stub__prescanPiS_i
	.type	_Z22__device_stub__prescanPiS_i,@function
_Z22__device_stub__prescanPiS_i:        # @_Z22__device_stub__prescanPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7prescanPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__prescanPiS_i, .Lfunc_end0-_Z22__device_stub__prescanPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$4096, %esi                     # imm = 0x1000
	callq	calloc@PLT
	movq	%rax, %rbx
	leaq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB1_1
# %bb.2:
	movq	(%rsp), %rdi
	xorl	%r15d, %r15d
	movl	$4096, %edx                     # imm = 0x1000
	xorl	%esi, %esi
	callq	hipMemset
	movq	8(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	511(%rdi), %rdx
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z22__device_stub__prescanPiS_i
.LBB1_4:
	movq	(%rsp), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$1, %esi
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	addl	-4(%r14,%rsi,4), %r15d
	movl	(%rbx,%rsi,4), %edx
	cmpl	%edx, %r15d
	jne	.LBB1_12
# %bb.6:                                #   in Loop: Header=BB1_5 Depth=1
	incq	%rsi
	cmpq	$1024, %rsi                     # imm = 0x400
	jne	.LBB1_5
# %bb.7:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
.LBB1_8:                                # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$20, %r15
	jne	.LBB1_8
# %bb.9:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB1_10:                               # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$20, %r15
	jne	.LBB1_10
	jmp	.LBB1_11
.LBB1_12:
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %r14d
.LBB1_11:                               # %.loopexit
	movl	%r14d, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7prescanPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7prescanPiS_i,@object         # @_Z7prescanPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z7prescanPiS_i
	.p2align	3, 0x0
_Z7prescanPiS_i:
	.quad	_Z22__device_stub__prescanPiS_i
	.size	_Z7prescanPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"mismatch at %d, was: %d, should be: %d\n"
	.size	.L.str, 40

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d\n"
	.size	.L.str.2, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7prescanPiS_i"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"The input of the program is: "
	.size	.Lstr, 30

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"The output of the program is: "
	.size	.Lstr.1, 31

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__prescanPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7prescanPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7prescanPiS_i         ; -- Begin function _Z7prescanPiS_i
	.globl	_Z7prescanPiS_i
	.p2align	8
	.type	_Z7prescanPiS_i,@function
_Z7prescanPiS_i:                        ; @_Z7prescanPiS_i
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 3, v0
	s_load_b32 s0, s[0:1], 0x10
	v_lshlrev_b32_e32 v1, 1, v0
	s_mov_b32 s1, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_or_b32_e32 v3, 1, v1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[4:5], v2, s[6:7]
	v_add_nc_u32_e32 v2, 0, v2
	s_ashr_i32 s2, s0, 1
	s_cmp_lt_i32 s2, 1
	s_waitcnt vmcnt(0)
	ds_store_2addr_b32 v2, v4, v5 offset1:1
	s_cbranch_scc1 .LBB0_5
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_lo_u32 v4, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	v_add3_u32 v4, v4, 0, -4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v5, s1, 2, v4
	ds_load_b32 v4, v4
	ds_load_b32 v6, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v6, v4
	ds_store_b32 v5, v4
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s1, s1, 1
	s_lshr_b32 s3, s2, 1
	s_cmp_lt_u32 s2, 2
	s_cbranch_scc1 .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s2, s3
	s_branch .LBB0_1
.LBB0_5:                                ; %Flow60
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_7
; %bb.6:
	s_lshl_b32 s3, s0, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, 0
	s_add_i32 s3, s3, -4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s3
	ds_store_b32 v5, v4
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_cmp_lt_i32 s0, 2
	s_cbranch_scc1 .LBB0_12
; %bb.8:                                ; %.lr.ph49
	s_mov_b32 s2, 1
.LBB0_9:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s1, s1, 1
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_9 Depth=1
	v_mul_lo_u32 v4, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	v_add3_u32 v4, v4, 0, -4
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v5, s1, 2, v4
	ds_load_b32 v6, v4
	ds_load_b32 v7, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, v7, v6
	ds_store_b32 v4, v7
	ds_store_b32 v5, v6
.LBB0_11:                               ;   in Loop: Header=BB0_9 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshl_b32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s2, s0
	s_cbranch_scc0 .LBB0_9
.LBB0_12:                               ; %._crit_edge50
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[2:3], v2 offset1:1
	v_lshlrev_b32_e32 v0, 2, v1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v0, v[2:3], s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7prescanPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7prescanPiS_i, .Lfunc_end0-_Z7prescanPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 8
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7prescanPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z7prescanPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
