
// dimensions layout: 
// 0-2 target offset_size        (flat)
// 3-5 source and inclusion size (incremental)
// 6-8 filter size               (not incremental)
// 9   sample_count
__global__ void cuda_filter_tips_fast(
	float *target_image,  
	float const *const source_image,
    float const *const inclusion_image, 	
    float const *const filter_kernel,      
    int const *const dimensions,	
    int const *const filter_source_offsets,  
    float const *const error_measure,
	unsigned int const *const real_grid_dimensions)
{
    //indexing
	unsigned int block_index_x           = blockIdx.x % real_grid_dimensions[0]; 
	unsigned int block_index_y           = blockIdx.x / real_grid_dimensions[0]; 
    unsigned int block_index_z           = blockIdx.y;
	unsigned int target_index_x          = threadIdx.x + (block_index_x * blockDim.x); 
    unsigned int target_index_y          = threadIdx.y + (block_index_y * blockDim.y);
	unsigned int target_index_z          = threadIdx.z + (block_index_z * blockDim.z);

	unsigned int target_index_frame_offset =   target_index_x + dimensions[0]+
		                                     ((target_index_y + dimensions[1]) * dimensions[3])+
								             ((target_index_z + dimensions[2]) * dimensions[4]);

    float total_contribution              = 0;
    for (int filter_index = 0; filter_index < dimensions[6]; filter_index++)
    {
        int source_index_frame_offset = target_index_frame_offset + filter_source_offsets[filter_index];
         if (inclusion_image[source_index_frame_offset] == 0.0f) 
        {
            continue;
        }
        // compute error, this is were the magic happens: 
        // choose any function that has range {0, 1} to determine contribution
        float mse = 0;
        for (int time_index = 0; time_index < dimensions[9]; time_index++)
        {
            float time_error = source_image[target_index_frame_offset + (time_index * dimensions[5])] - 
                               source_image[source_index_frame_offset + (time_index * dimensions[5])];
            mse += time_error * time_error;
        }
        // note magic number
        float k = (mse * mse)  / (43245000.0f);
        if (k >= 4.61f) 
        {
            continue;
        }

        float contribution = filter_kernel[filter_index] * inclusion_image[source_index_frame_offset] * expf(-k);

        // here the magic ends
        total_contribution += contribution;
        for (int time_index = 0; time_index < dimensions[9]; time_index++)
        {
            target_image[target_index_frame_offset + (time_index * dimensions[5])] += source_image[source_index_frame_offset + (time_index * dimensions[5])] * contribution;
        }
     
    }
    for (int time_index = 0; time_index < dimensions[9]; time_index++)
    {
        target_image[target_index_frame_offset + (time_index * dimensions[5])] /= total_contribution;

    }
}
	.file	"tmpxft_002e330a_00000000-6_cuda_filter_tips_fast.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2010:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2010:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z62__device_stub__Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKjPfPKfS1_S1_PKiS3_S1_PKj
	.type	_Z62__device_stub__Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKjPfPKfS1_S1_PKiS3_S1_PKj, @function
_Z62__device_stub__Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKjPfPKfS1_S1_PKiS3_S1_PKj:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	232(%rsp), %rax
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	%rsp, %rax
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	80(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 240
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L2:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z62__device_stub__Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKjPfPKfS1_S1_PKiS3_S1_PKj, .-_Z62__device_stub__Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKjPfPKfS1_S1_PKiS3_S1_PKj
	.globl	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.type	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, @function
_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj:
.LFB2033:
	.cfi_startproc
	endbr64
	jmp	_Z62__device_stub__Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKjPfPKfS1_S1_PKiS3_S1_PKj
	.cfi_endproc
.LFE2033:
	.size	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, .-_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>

// dimensions layout: 
// 0-2 target offset_size        (flat)
// 3-5 source and inclusion size (incremental)
// 6-8 filter size               (not incremental)
// 9   sample_count
__global__ void cuda_filter_tips_fast(
	float *target_image,  
	float const *const source_image,
    float const *const inclusion_image, 	
    float const *const filter_kernel,      
    int const *const dimensions,	
    int const *const filter_source_offsets,  
    float const *const error_measure,
	unsigned int const *const real_grid_dimensions)
{
    //indexing
	unsigned int block_index_x           = blockIdx.x % real_grid_dimensions[0]; 
	unsigned int block_index_y           = blockIdx.x / real_grid_dimensions[0]; 
    unsigned int block_index_z           = blockIdx.y;
	unsigned int target_index_x          = threadIdx.x + (block_index_x * blockDim.x); 
    unsigned int target_index_y          = threadIdx.y + (block_index_y * blockDim.y);
	unsigned int target_index_z          = threadIdx.z + (block_index_z * blockDim.z);

	unsigned int target_index_frame_offset =   target_index_x + dimensions[0]+
		                                     ((target_index_y + dimensions[1]) * dimensions[3])+
								             ((target_index_z + dimensions[2]) * dimensions[4]);

    float total_contribution              = 0;
    for (int filter_index = 0; filter_index < dimensions[6]; filter_index++)
    {
        int source_index_frame_offset = target_index_frame_offset + filter_source_offsets[filter_index];
         if (inclusion_image[source_index_frame_offset] == 0.0f) 
        {
            continue;
        }
        // compute error, this is were the magic happens: 
        // choose any function that has range {0, 1} to determine contribution
        float mse = 0;
        for (int time_index = 0; time_index < dimensions[9]; time_index++)
        {
            float time_error = source_image[target_index_frame_offset + (time_index * dimensions[5])] - 
                               source_image[source_index_frame_offset + (time_index * dimensions[5])];
            mse += time_error * time_error;
        }
        // note magic number
        float k = (mse * mse)  / (43245000.0f);
        if (k >= 4.61f) 
        {
            continue;
        }

        float contribution = filter_kernel[filter_index] * inclusion_image[source_index_frame_offset] * expf(-k);

        // here the magic ends
        total_contribution += contribution;
        for (int time_index = 0; time_index < dimensions[9]; time_index++)
        {
            target_image[target_index_frame_offset + (time_index * dimensions[5])] += source_image[source_index_frame_offset + (time_index * dimensions[5])] * contribution;
        }
     
    }
    for (int time_index = 0; time_index < dimensions[9]; time_index++)
    {
        target_image[target_index_frame_offset + (time_index * dimensions[5])] /= total_contribution;

    }
}
	.text
	.file	"cuda_filter_tips_fast.hip"
	.globl	_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj # -- Begin function _Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.type	_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj,@function
_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj: # @_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, .Lfunc_end0-_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj,@object # @_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.section	.rodata,"a",@progbits
	.globl	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.p2align	3, 0x0
_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj:
	.quad	_Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.size	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj"
	.size	.L__unnamed_1, 49

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z36__device_stub__cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj ; -- Begin function _Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.globl	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
	.p2align	8
	.type	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj,@function
_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj: ; @_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x38
	s_load_b128 s[8:11], s[0:1], 0x20
	s_load_b64 s[12:13], s[0:1], 0x4c
	v_bfe_u32 v2, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_load_b32 s17, s[2:3], 0x0
	s_clause 0x2
	s_load_b128 s[20:23], s[8:9], 0x0
	s_load_b32 s18, s[8:9], 0x10
	s_load_b32 s16, s[8:9], 0x18
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s17
	s_sub_i32 s3, 0, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s2, v1
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_mul_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s2, s3
	s_add_i32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s2, s14, s2
	s_mul_i32 s3, s2, s17
	s_add_i32 s4, s2, 1
	s_sub_i32 s3, s14, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s5, s3, s17
	s_cmp_ge_u32 s3, s17
	s_cselect_b32 s2, s4, s2
	s_cselect_b32 s3, s5, s3
	s_add_i32 s4, s2, 1
	s_cmp_ge_u32 s3, s17
	s_cselect_b32 s19, s4, s2
	s_lshr_b32 s2, s12, 16
	s_and_b32 s13, s13, 0xffff
	s_mul_i32 s2, s19, s2
	s_mul_i32 s15, s15, s13
	v_add3_u32 v1, s21, s2, v1
	s_load_b256 s[0:7], s[0:1], 0x0
	s_mul_i32 s19, s19, s17
	s_and_b32 s12, s12, 0xffff
	s_sub_i32 s13, s14, s19
	v_mul_lo_u32 v3, v1, s23
	v_add3_u32 v1, s22, s15, v2
	s_mul_i32 s12, s13, s12
	s_cmp_lt_i32 s16, 1
	s_mov_b32 s13, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v1, v1, s18
	v_add3_u32 v2, v0, s20, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add3_u32 v0, v2, v1, s12
	s_cbranch_scc1 .LBB0_13
; %bb.1:                                ; %.lr.ph90
	v_add3_u32 v4, v2, s12, v1
	v_add3_u32 v5, v2, v1, s12
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0
	s_mov_b32 s12, s13
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_10 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[12:13], 2
	s_add_u32 s18, s10, s14
	s_addc_u32 s19, s11, s15
	s_load_b32 s17, s[18:19], 0x0
	s_mov_b32 s18, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v6, s17, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_neq_f32_e32 0, v6
	s_cbranch_execz .LBB0_12
; %bb.3:                                ; %.preheader80
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s19, s[8:9], 0x24
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s19, 0
	s_cselect_b32 s20, -1, 0
	s_cmp_lt_i32 s19, 1
	s_cbranch_scc1 .LBB0_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s21, s[8:9], 0x14
	v_mov_b32_e32 v7, 0
	v_mov_b32_e32 v1, v5
	s_mov_b32 s22, s19
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s17, v1
	v_lshlrev_b64 v[10:11], 2, v[1:2]
	s_add_i32 s22, s22, -1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, s21, v1
	s_cmp_eq_u32 s22, 0
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v10, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s2, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[10:11], off
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v8, v10, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v8
	s_cbranch_scc0 .LBB0_5
	s_branch .LBB0_7
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v7, 0
.LBB0_7:                                ; %Flow137
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v7, v7
	s_mov_b32 s21, exec_lo
	v_div_scale_f32 v7, null, 0x4c24f772, 0x4c24f772, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	v_fmac_f32_e32 v8, v9, v8
	v_div_scale_f32 v9, vcc_lo, v1, 0x4c24f772, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v9, v8
	v_fma_f32 v11, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v8
	v_fma_f32 v7, -v7, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v7, v7, v8, v10
	v_div_fixup_f32 v1, v7, 0x4c24f772, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nle_f32_e32 0x4093851f, v1
	s_cbranch_execz .LBB0_11
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s14, s6, s14
	s_addc_u32 s15, s7, s15
	v_cmp_nlt_f32_e32 vcc_lo, 0x42ce8ed0, v1
	global_load_b32 v7, v2, s[14:15]
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	v_mul_f32_e32 v8, 0xbfb8aa3b, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rndne_f32_e32 v9, v8
	v_fma_f32 v10, 0xbfb8aa3b, v1, -v8
	v_sub_f32_e32 v8, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, 0xb2a5705f, v1
	v_cvt_i32_f32_e32 v9, v9
	v_add_f32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v8, v8
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v8, v8, v9
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2b17218, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, 0x7f800000, v8, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s20
	v_fmac_f32_e32 v3, v1, v6
	s_cbranch_vccnz .LBB0_11
; %bb.9:                                ; %.lr.ph86
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b32 s14, s[8:9], 0x14
	v_mul_f32_e32 v6, v1, v6
	v_mov_b32_e32 v1, v5
.LBB0_10:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v7, s17, v1
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v1, s14, v1
	s_add_i32 s19, s19, -1
	s_cmp_lg_u32 s19, 0
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s2, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v11, v[9:10], off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v6, v7
	global_store_b32 v[9:10], v11, off
	s_cbranch_scc1 .LBB0_10
.LBB0_11:                               ; %Flow135
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
.LBB0_12:                               ; %Flow138
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s18
	s_add_i32 s12, s12, 1
	s_cmp_eq_u32 s12, s16
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_14
.LBB0_13:
	v_mov_b32_e32 v3, 0
.LBB0_14:                               ; %.preheader
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[8:9], 0x24
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_17
; %bb.15:                               ; %.lr.ph93
	s_load_b32 s3, s[8:9], 0x14
	v_mov_b32_e32 v1, 0
.LBB0_16:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	s_add_i32 s2, s2, -1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v0, s3, v0
	s_cmp_eq_u32 s2, 0
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v6, null, v3, v3, v2
	v_div_scale_f32 v9, vcc_lo, v2, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v9, v7
	v_fma_f32 v10, -v6, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v10, v7
	v_fma_f32 v6, -v6, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v8
	v_div_fixup_f32 v2, v6, v3, v2
	global_store_b32 v[4:5], v2, off
	s_cbranch_scc0 .LBB0_16
.LBB0_17:                               ; %._crit_edge94
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj, .Lfunc_end0-_Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1244
; NumSgprs: 26
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         68
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         76
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         78
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         80
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         82
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         84
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         86
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         128
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 320
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z21cuda_filter_tips_fastPfPKfS1_S1_PKiS3_S1_PKj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
