#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda.h>
#include <device_functions.h>
#include <cuda_runtime_api.h>

#include <iostream>

template<typename T>
struct ShouldSwap
{
	__host__ __device__
	virtual bool operator() (const T left, const T right) const;
};

template <typename T>
__host__ __device__ __inline__
void swap(T* a, T* r);

template<typename T>
__global__
void bubbleSort(T* v, const unsigned int n, ShouldSwap<T> shouldSwap);

int main(int argc, char** argv)
{
	// vector size
	const unsigned int size = 10;

	// host vector
	int h_v[size] = { 3, 7, 1, 10, 6, 9, 5, 2, 8, 4 };

	// device vector
	int *d_v = 0;

	cudaMalloc((void**)&d_v, size * sizeof(int));

	cudaMemcpy(d_v, h_v, size * sizeof(int), cudaMemcpyHostToDevice);

	dim3 grdDim(1, 1, 1);
	dim3 blkDim(size / 2, 1, 1);

	ShouldSwap<int> shouldSwap;

	bubbleSort<int> <<<grdDim, blkDim >>>(d_v, size, shouldSwap);
	cudaDeviceSynchronize();

	cudaError_t error = cudaGetLastError();
	if (error != cudaSuccess) {
		printf("CUDA error: %s\n", cudaGetErrorString(error));
		// system("pause"); // when using VisStudio
		exit(-1);
	}
	
	cudaMemcpy(h_v, d_v, size * sizeof(int), cudaMemcpyDeviceToHost);
	cudaFree(d_v);

	for (int i = 0; i < size; i++) {
		std::cout << (i == 0 ? "{" : "") << h_v[i] << (i < size - 1 ? " ," : "}");
	}
	std::cout << std::endl;

	// system("pause"); // when using VisStudio
	return 0;
}

template<typename T>
__host__ __device__
bool ShouldSwap<T>::operator() (const T left, const T right) const {
	return left > right;
}


template<typename T>
__host__ __device__ __inline__
void swap (T* a, T* b) {
	T tmp = *a;
	*a = *b;
	*b = tmp;
}

template<typename T>
__global__
void bubbleSort(T* v, const unsigned int n, ShouldSwap<T> shouldSwap) {
	const unsigned int tIdx = threadIdx.x;

	for (unsigned int i = 0; i < n; i++) {

		unsigned int offset = i % 2;
		unsigned int indiceGauche = 2 * tIdx + offset;
		unsigned int indiceDroite = indiceGauche + 1;

		if (indiceDroite < n) {
			if (shouldSwap(v[indiceGauche], v[indiceDroite])) {
				swap<T>(&v[indiceGauche], &v[indiceDroite]);
			}
		}
		__syncthreads();
	}
}
	.file	"tmpxft_00211bb0_00000000-6_generic-bubble-sort.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.section	.text._ZNK10ShouldSwapIiEclEii,"axG",@progbits,_ZNK10ShouldSwapIiEclEii,comdat
	.align 2
	.weak	_ZNK10ShouldSwapIiEclEii
	.type	_ZNK10ShouldSwapIiEclEii, @function
_ZNK10ShouldSwapIiEclEii:
.LFB4302:
	.cfi_startproc
	endbr64
	cmpl	%edx, %esi
	setg	%al
	ret
	.cfi_endproc
.LFE4302:
	.size	_ZNK10ShouldSwapIiEclEii, .-_ZNK10ShouldSwapIiEclEii
	.text
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3648:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3648:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL53__device_stub__Z10bubbleSortIiEvPT_j10ShouldSwapIS0_EPijR10ShouldSwapIiE, @function
_ZL53__device_stub__Z10bubbleSortIiEvPT_j10ShouldSwapIS0_EPijR10ShouldSwapIiE:
.LFB3670:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rdx, 96(%rsp)
	leaq	16(%rsp), %rdx
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movl	$1, 40(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L3:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_ZL53__device_stub__Z10bubbleSortIiEvPT_j10ShouldSwapIS0_EPijR10ShouldSwapIiE, .-_ZL53__device_stub__Z10bubbleSortIiEvPT_j10ShouldSwapIS0_EPijR10ShouldSwapIiE
	.section	.text._Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,"axG",@progbits,_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,comdat
	.weak	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.type	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E, @function
_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E:
.LFB3973:
	.cfi_startproc
	endbr64
	jmp	_ZL53__device_stub__Z10bubbleSortIiEvPT_j10ShouldSwapIS0_EPijR10ShouldSwapIiE
	.cfi_endproc
.LFE3973:
	.size	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E, .-_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"{"
.LC2:
	.string	""
.LC3:
	.string	" ,"
.LC4:
	.string	"}"
.LC5:
	.string	"CUDA error: %s\n"
	.section	.rodata
	.align 32
.LC0:
	.long	3
	.long	7
	.long	1
	.long	10
	.long	6
	.long	9
	.long	5
	.long	2
	.long	8
	.long	4
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %rsi
	movl	$10, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	xorl	%eax, %eax
	leaq	48(%rsp), %rbp
	rep movsl
	leaq	8(%rsp), %rdi
	movl	$40, %esi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$40, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movabsq	$4294967301, %rdx
	movl	$1, 32(%rsp)
	movq	%rdi, 24(%rsp)
	movq	%rdx, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	8(%rsp), %rdi
	leaq	16(%rsp), %rdx
	movl	$10, %esi
	leaq	16+_ZTV10ShouldSwapIiE(%rip), %rax
	movq	%rax, 16(%rsp)
	call	_ZL53__device_stub__Z10bubbleSortIiEvPT_j10ShouldSwapIS0_EPijR10ShouldSwapIiE
.L10:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L11
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L11:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$40, %edx
	leaq	.LC2(%rip), %r13
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
.L14:
	testq	%rbx, %rbx
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %r12
	cmovne	%r13, %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	0(%rbp,%rbx,4), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	cmpq	$9, %rbx
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	leaq	.LC3(%rip), %rax
	cmovne	%rax, %rsi
	incq	%rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$10, %rbx
	jne	.L14
	movq	%r12, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3673:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3673:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.weak	_ZTS10ShouldSwapIiE
	.section	.rodata._ZTS10ShouldSwapIiE,"aG",@progbits,_ZTS10ShouldSwapIiE,comdat
	.align 16
	.type	_ZTS10ShouldSwapIiE, @object
	.size	_ZTS10ShouldSwapIiE, 16
_ZTS10ShouldSwapIiE:
	.string	"10ShouldSwapIiE"
	.weak	_ZTI10ShouldSwapIiE
	.section	.data.rel.ro._ZTI10ShouldSwapIiE,"awG",@progbits,_ZTI10ShouldSwapIiE,comdat
	.align 8
	.type	_ZTI10ShouldSwapIiE, @object
	.size	_ZTI10ShouldSwapIiE, 16
_ZTI10ShouldSwapIiE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTS10ShouldSwapIiE
	.weak	_ZTV10ShouldSwapIiE
	.section	.data.rel.ro.local._ZTV10ShouldSwapIiE,"awG",@progbits,_ZTV10ShouldSwapIiE,comdat
	.align 8
	.type	_ZTV10ShouldSwapIiE, @object
	.size	_ZTV10ShouldSwapIiE, 24
_ZTV10ShouldSwapIiE:
	.quad	0
	.quad	_ZTI10ShouldSwapIiE
	.quad	_ZNK10ShouldSwapIiEclEii
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"


#include <hip/device_functions.h>
#include <hip/hip_runtime_api.h>

#include <iostream>

template<typename T>
struct ShouldSwap
{
	__host__ __device__
	virtual bool operator() (const T left, const T right) const;
};

template <typename T>
__host__ __device__ __inline__
void swap(T* a, T* r);

template<typename T>
__global__
void bubbleSort(T* v, const unsigned int n, ShouldSwap<T> shouldSwap);

int main(int argc, char** argv)
{
	// vector size
	const unsigned int size = 10;

	// host vector
	int h_v[size] = { 3, 7, 1, 10, 6, 9, 5, 2, 8, 4 };

	// device vector
	int *d_v = 0;

	hipMalloc((void**)&d_v, size * sizeof(int));

	hipMemcpy(d_v, h_v, size * sizeof(int), hipMemcpyHostToDevice);

	dim3 grdDim(1, 1, 1);
	dim3 blkDim(size / 2, 1, 1);

	ShouldSwap<int> shouldSwap;

	bubbleSort<int> <<<grdDim, blkDim >>>(d_v, size, shouldSwap);
	hipDeviceSynchronize();

	hipError_t error = hipGetLastError();
	if (error != hipSuccess) {
		printf("CUDA error: %s\n", hipGetErrorString(error));
		// system("pause"); // when using VisStudio
		exit(-1);
	}
	
	hipMemcpy(h_v, d_v, size * sizeof(int), hipMemcpyDeviceToHost);
	hipFree(d_v);

	for (int i = 0; i < size; i++) {
		std::cout << (i == 0 ? "{" : "") << h_v[i] << (i < size - 1 ? " ," : "}");
	}
	std::cout << std::endl;

	// system("pause"); // when using VisStudio
	return 0;
}

template<typename T>
__host__ __device__
bool ShouldSwap<T>::operator() (const T left, const T right) const {
	return left > right;
}


template<typename T>
__host__ __device__ __inline__
void swap (T* a, T* b) {
	T tmp = *a;
	*a = *b;
	*b = tmp;
}

template<typename T>
__global__
void bubbleSort(T* v, const unsigned int n, ShouldSwap<T> shouldSwap) {
	const unsigned int tIdx = threadIdx.x;

	for (unsigned int i = 0; i < n; i++) {

		unsigned int offset = i % 2;
		unsigned int indiceGauche = 2 * tIdx + offset;
		unsigned int indiceDroite = indiceGauche + 1;

		if (indiceDroite < n) {
			if (shouldSwap(v[indiceGauche], v[indiceDroite])) {
				swap<T>(&v[indiceGauche], &v[indiceDroite]);
			}
		}
		__syncthreads();
	}
}
	.text
	.file	"generic-bubble-sort.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	3                               # 0x3
	.long	7                               # 0x7
	.long	1                               # 0x1
	.long	10                              # 0xa
.LCPI0_1:
	.long	6                               # 0x6
	.long	9                               # 0x9
	.long	5                               # 0x5
	.long	2                               # 0x2
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movaps	.LCPI0_0(%rip), %xmm0           # xmm0 = [3,7,1,10]
	leaq	16(%rsp), %rbx
	movaps	%xmm0, (%rbx)
	movaps	.LCPI0_1(%rip), %xmm0           # xmm0 = [6,9,5,2]
	movaps	%xmm0, 16(%rbx)
	movabsq	$17179869192, %rax              # imm = 0x400000008
	movq	%rax, 32(%rbx)
	movq	%rsp, %r14
	movq	$0, (%r14)
	movl	$40, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$40, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	4(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	(%rsp), %rdi
	leaq	8(%rsp), %rdx
	movq	$_ZTV10ShouldSwapIiE+16, (%rdx)
	movl	$10, %esi
	callq	_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E
.LBB0_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.3:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$40, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%ebx, %ebx
	movl	$.L.str.1, %r14d
	movl	$.L.str.4, %r15d
.LBB0_4:                                # =>This Inner Loop Header: Depth=1
	xorl	%edx, %edx
	testq	%rbx, %rbx
	sete	%dl
	movl	$.L.str.2, %esi
	cmoveq	%r14, %rsi
	movl	$_ZSt4cout, %edi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp,%rbx,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	xorl	%edx, %edx
	cmpq	$9, %rbx
	movl	$.L.str.3, %esi
	cmoveq	%r15, %rsi
	setne	%dl
	incq	%rdx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$10, %rbx
	jne	.LBB0_4
# %bb.5:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB0_6:
	.cfi_def_cfa_offset 96
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E,"axG",@progbits,_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E,comdat
	.weak	_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E # -- Begin function _Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.type	_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E,@function
_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E: # @_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E, .Lfunc_end1-_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNK10ShouldSwapIiEclEii,"axG",@progbits,_ZNK10ShouldSwapIiEclEii,comdat
	.weak	_ZNK10ShouldSwapIiEclEii        # -- Begin function _ZNK10ShouldSwapIiEclEii
	.p2align	1, 0x90
	.type	_ZNK10ShouldSwapIiEclEii,@function
_ZNK10ShouldSwapIiEclEii:               # @_ZNK10ShouldSwapIiEclEii
	.cfi_startproc
# %bb.0:
	cmpl	%edx, %esi
	setg	%al
	retq
.Lfunc_end2:
	.size	_ZNK10ShouldSwapIiEclEii, .Lfunc_end2-_ZNK10ShouldSwapIiEclEii
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,@object # @_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.section	.rodata,"a",@progbits
	.weak	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.p2align	3, 0x0
_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E:
	.quad	_Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.size	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error: %s\n"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"{"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.zero	1
	.size	.L.str.2, 1

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" ,"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"}"
	.size	.L.str.4, 2

	.type	_ZTV10ShouldSwapIiE,@object     # @_ZTV10ShouldSwapIiE
	.section	.rodata._ZTV10ShouldSwapIiE,"aG",@progbits,_ZTV10ShouldSwapIiE,comdat
	.weak	_ZTV10ShouldSwapIiE
	.p2align	3, 0x0
_ZTV10ShouldSwapIiE:
	.quad	0
	.quad	_ZTI10ShouldSwapIiE
	.quad	_ZNK10ShouldSwapIiEclEii
	.size	_ZTV10ShouldSwapIiE, 24

	.type	_ZTS10ShouldSwapIiE,@object     # @_ZTS10ShouldSwapIiE
	.section	.rodata._ZTS10ShouldSwapIiE,"aG",@progbits,_ZTS10ShouldSwapIiE,comdat
	.weak	_ZTS10ShouldSwapIiE
_ZTS10ShouldSwapIiE:
	.asciz	"10ShouldSwapIiE"
	.size	_ZTS10ShouldSwapIiE, 16

	.type	_ZTI10ShouldSwapIiE,@object     # @_ZTI10ShouldSwapIiE
	.section	.rodata._ZTI10ShouldSwapIiE,"aG",@progbits,_ZTI10ShouldSwapIiE,comdat
	.weak	_ZTI10ShouldSwapIiE
	.p2align	3, 0x0
_ZTI10ShouldSwapIiE:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTS10ShouldSwapIiE
	.size	_ZTI10ShouldSwapIiE, 16

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTS10ShouldSwapIiE
	.addrsig_sym _ZTI10ShouldSwapIiE
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,"axG",@progbits,_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,comdat
	.protected	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E ; -- Begin function _Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.globl	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
	.p2align	8
	.type	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,@function
_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E: ; @_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
; %bb.0:
	s_load_b32 s2, s[0:1], 0x8
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc1 .LBB0_6
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b32_e32 v2, 1, v0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_or_b32 v0, s3, 1, v2
	s_mov_b32 s4, exec_lo
	v_add_nc_u32_e32 v1, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s2, v1
	s_cbranch_execz .LBB0_5
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b32_e32 v3, 2, v0
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[0:1], v3, s[0:1]
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v0, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v3, s5, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, null, s1, 0, s5
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v6, v0
	global_store_b64 v[3:4], v[5:6], off
.LBB0_5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s3, s3, 1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cmp_eq_u32 s2, s3
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_6:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,"axG",@progbits,_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E,comdat
.Lfunc_end0:
	.size	_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E, .Lfunc_end0-_Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 180
; NumSgprs: 8
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z10bubbleSortIiEvPT_j10ShouldSwapIS0_E.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
