#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>

#define N 1000000

__global__ void gpuAdd(int *d_a, int *d_b, int *d_c){
    //总线程id = 当前块线程id.x + 块id*块维度x
	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	while (tid < N)
	{
		d_c[tid] = d_a[tid] + d_b[tid];// 加法
		tid += blockDim.x * gridDim.x; // 一次执行一个格子 块维度x*格子维度x
	}
}

int main(){
    int *h_a, *h_b, *h_c;
    int *d_a0, *d_b0, *d_c0;
    int *d_a1, *d_b1, *d_c1;
    int sizeByte = N*sizeof(int)*2;

    //create two streams
    cudaStream_t stream0, stream1;
    cudaStreamCreate(&stream0);
    cudaStreamCreate(&stream1);

    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    cudaEventRecord(start,0);

    //Use cudaHostMalloc to allocate page-locked memory
    cudaHostAlloc(&h_a, sizeByte, cudaHostAllocDefault);
    cudaHostAlloc(&h_b, sizeByte, cudaHostAllocDefault);
    cudaHostAlloc(&h_c, sizeByte, cudaHostAllocDefault);
    //same as single stream, just add stream parameter when launching kernel
    for(int i=0;i<N*2;i++){
        h_a[i] = i;
        h_b[i] = i;
    }

    cudaMalloc(&d_a0,sizeByte/2);
    cudaMalloc(&d_b0,sizeByte/2);
    cudaMalloc(&d_c0,sizeByte/2);
    cudaMalloc(&d_a1,sizeByte/2);
    cudaMalloc(&d_b1,sizeByte/2);
    cudaMalloc(&d_c1,sizeByte/2);

    cudaMemcpyAsync(d_a0, h_a, sizeByte/2, cudaMemcpyHostToDevice, stream0);
    cudaMemcpyAsync(d_a1, h_a + N, sizeByte/2, cudaMemcpyHostToDevice, stream1);
    cudaMemcpyAsync(d_b0, h_b, sizeByte/2, cudaMemcpyHostToDevice, stream0);
    cudaMemcpyAsync(d_b1, h_b + N, sizeByte/2, cudaMemcpyHostToDevice, stream1);

    gpuAdd<<<512,512,0,stream0>>>(d_a0,d_b0,d_c0);
    gpuAdd<<<512,512,0,stream1>>>(d_a1,d_b1,d_c1);

    cudaMemcpyAsync(h_c, d_c0, sizeByte/2, cudaMemcpyDeviceToHost, stream0);
    cudaMemcpyAsync(h_c+N, d_c1, sizeByte/2, cudaMemcpyDeviceToHost, stream1);

    //only synchronize on cpu/host
    cudaDeviceSynchronize();
    cudaStreamSynchronize(stream0);
    cudaStreamSynchronize(stream1);


    cudaEventRecord(stop);
    cudaEventSynchronize(stop);

    float time = 0;
    cudaEventElapsedTime(&time, start, stop);
    printf("Time consumption: %lf\n", time);

    cudaEventDestroy(stop);
    cudaEventDestroy(start);

    int Correct = 1;
    int wrongIndex = -1;
	printf("Vector addition on GPU \n");
	//Printing result on console
	for (int i = 0; i < 2*N; i++) 
	{
		if ((h_a[i] + h_b[i] != h_c[i]))
		{
            Correct = 0;
            wrongIndex = i;
            break;
		}

	}
	if (Correct == 1)
	{
		printf("GPU has computed Sum Correctly\n");
	}
	else
	{
        printf("There is an Error in GPU Computation, at index %d, CPU(%d)!=GPU(%d)\n", wrongIndex, (h_a[wrongIndex] + h_b[wrongIndex]), h_c[wrongIndex]);
	}

    // 清空GPU内存
	cudaFree(d_a0);
	cudaFree(d_b0);
	cudaFree(d_c0);
	cudaFree(d_a0);
	cudaFree(d_b0);
	cudaFree(d_c0);
	
	// 清空cuda分配的cpu内存
	cudaFreeHost(h_a);
	cudaFreeHost(h_b);
	cudaFreeHost(h_c);
	return 0;
}
	.file	"tmpxft_0025703e_00000000-6_async.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_
	.type	_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_, @function
_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6gpuAddPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_, .-_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_
	.globl	_Z6gpuAddPiS_S_
	.type	_Z6gpuAddPiS_S_, @function
_Z6gpuAddPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z6gpuAddPiS_S_, .-_Z6gpuAddPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Time consumption: %lf\n"
.LC2:
	.string	"Vector addition on GPU \n"
.LC3:
	.string	"GPU has computed Sum Correctly\n"
.LC4:
	.string	"There is an Error in GPU Computation, at index %d, CPU(%d)!=GPU(%d)\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaStreamCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	104(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leaq	8(%rsp), %rdi
	xorl	%edx, %edx
	movl	$8000000, %esi
	call	cudaHostAlloc@PLT
	leaq	16(%rsp), %rdi
	xorl	%edx, %edx
	movl	$8000000, %esi
	call	cudaHostAlloc@PLT
	xorl	%edx, %edx
	leaq	24(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaHostAlloc@PLT
	movq	8(%rsp), %rcx
	movq	16(%rsp), %rdx
	xorl	%eax, %eax
.L9:
	movl	%eax, (%rcx,%rax,4)
	movl	%eax, (%rdx,%rax,4)
	incq	%rax
	cmpq	$2000000, %rax
	jne	.L9
	leaq	32(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	movq	80(%rsp), %r8
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	movl	$4000000, %edx
	call	cudaMemcpyAsync@PLT
	movq	8(%rsp), %rax
	movq	88(%rsp), %r8
	movl	$1, %ecx
	movq	56(%rsp), %rdi
	movl	$4000000, %edx
	leaq	4000000(%rax), %rsi
	call	cudaMemcpyAsync@PLT
	movq	80(%rsp), %r8
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	40(%rsp), %rdi
	movl	$4000000, %edx
	call	cudaMemcpyAsync@PLT
	movq	16(%rsp), %rax
	movq	88(%rsp), %r8
	movl	$1, %ecx
	movq	64(%rsp), %rdi
	movl	$4000000, %edx
	leaq	4000000(%rax), %rsi
	call	cudaMemcpyAsync@PLT
	movl	$8388609, %edi
	movq	80(%rsp), %r9
	xorl	%r8d, %r8d
	salq	$9, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 132(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 124(%rsp)
	movq	%rdi, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_
.L10:
	movl	$8388609, %edi
	movq	88(%rsp), %r9
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$9, %rdi
	movl	$1, %esi
	movl	$1, 132(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 124(%rsp)
	movq	%rdi, 112(%rsp)
	movl	$1, 120(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z29__device_stub__Z6gpuAddPiS_S_PiS_S_
.L11:
	movq	80(%rsp), %r8
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$4000000, %edx
	movq	24(%rsp), %rdi
	call	cudaMemcpyAsync@PLT
	movq	24(%rsp), %rax
	movq	88(%rsp), %r8
	movl	$2, %ecx
	movq	72(%rsp), %rsi
	movl	$4000000, %edx
	leaq	4000000(%rax), %rdi
	call	cudaMemcpyAsync@PLT
	call	cudaDeviceSynchronize@PLT
	movq	80(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	88(%rsp), %rdi
	call	cudaStreamSynchronize@PLT
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	104(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	leaq	124(%rsp), %rdi
	movl	$0x00000000, 124(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	124(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	104(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	96(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rcx
	xorl	%eax, %eax
	movq	24(%rsp), %rsi
.L13:
	movl	(%rcx,%rax,4), %edx
	addl	(%rdi,%rax,4), %edx
	cmpl	(%rsi,%rax,4), %edx
	jne	.L12
	incq	%rax
	cmpq	$2000000, %rax
	jne	.L13
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L15:
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L12:
	movl	%eax, %edx
	cltq
	movl	(%rsi,%rax,4), %r8d
	movl	(%rcx,%rax,4), %ecx
	leaq	.LC4(%rip), %rsi
	addl	(%rdi,%rax,4), %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L15
.L16:
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z6gpuAddPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6gpuAddPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include <stdio.h>

#define N 1000000

__global__ void gpuAdd(int *d_a, int *d_b, int *d_c){
    //总线程id = 当前块线程id.x + 块id*块维度x
	int tid = threadIdx.x + blockIdx.x * blockDim.x;
	while (tid < N)
	{
		d_c[tid] = d_a[tid] + d_b[tid];// 加法
		tid += blockDim.x * gridDim.x; // 一次执行一个格子 块维度x*格子维度x
	}
}

int main(){
    int *h_a, *h_b, *h_c;
    int *d_a0, *d_b0, *d_c0;
    int *d_a1, *d_b1, *d_c1;
    int sizeByte = N*sizeof(int)*2;

    //create two streams
    hipStream_t stream0, stream1;
    hipStreamCreate(&stream0);
    hipStreamCreate(&stream1);

    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    hipEventRecord(start,0);

    //Use cudaHostMalloc to allocate page-locked memory
    hipHostAlloc(&h_a, sizeByte, hipHostMallocDefault);
    hipHostAlloc(&h_b, sizeByte, hipHostMallocDefault);
    hipHostAlloc(&h_c, sizeByte, hipHostMallocDefault);
    //same as single stream, just add stream parameter when launching kernel
    for(int i=0;i<N*2;i++){
        h_a[i] = i;
        h_b[i] = i;
    }

    hipMalloc(&d_a0,sizeByte/2);
    hipMalloc(&d_b0,sizeByte/2);
    hipMalloc(&d_c0,sizeByte/2);
    hipMalloc(&d_a1,sizeByte/2);
    hipMalloc(&d_b1,sizeByte/2);
    hipMalloc(&d_c1,sizeByte/2);

    hipMemcpyAsync(d_a0, h_a, sizeByte/2, hipMemcpyHostToDevice, stream0);
    hipMemcpyAsync(d_a1, h_a + N, sizeByte/2, hipMemcpyHostToDevice, stream1);
    hipMemcpyAsync(d_b0, h_b, sizeByte/2, hipMemcpyHostToDevice, stream0);
    hipMemcpyAsync(d_b1, h_b + N, sizeByte/2, hipMemcpyHostToDevice, stream1);

    gpuAdd<<<512,512,0,stream0>>>(d_a0,d_b0,d_c0);
    gpuAdd<<<512,512,0,stream1>>>(d_a1,d_b1,d_c1);

    hipMemcpyAsync(h_c, d_c0, sizeByte/2, hipMemcpyDeviceToHost, stream0);
    hipMemcpyAsync(h_c+N, d_c1, sizeByte/2, hipMemcpyDeviceToHost, stream1);

    //only synchronize on cpu/host
    hipDeviceSynchronize();
    hipStreamSynchronize(stream0);
    hipStreamSynchronize(stream1);


    hipEventRecord(stop);
    hipEventSynchronize(stop);

    float time = 0;
    hipEventElapsedTime(&time, start, stop);
    printf("Time consumption: %lf\n", time);

    hipEventDestroy(stop);
    hipEventDestroy(start);

    int Correct = 1;
    int wrongIndex = -1;
	printf("Vector addition on GPU \n");
	//Printing result on console
	for (int i = 0; i < 2*N; i++) 
	{
		if ((h_a[i] + h_b[i] != h_c[i]))
		{
            Correct = 0;
            wrongIndex = i;
            break;
		}

	}
	if (Correct == 1)
	{
		printf("GPU has computed Sum Correctly\n");
	}
	else
	{
        printf("There is an Error in GPU Computation, at index %d, CPU(%d)!=GPU(%d)\n", wrongIndex, (h_a[wrongIndex] + h_b[wrongIndex]), h_c[wrongIndex]);
	}

    // 清空GPU内存
	hipFree(d_a0);
	hipFree(d_b0);
	hipFree(d_c0);
	hipFree(d_a0);
	hipFree(d_b0);
	hipFree(d_c0);
	
	// 清空cuda分配的cpu内存
	hipHostFree(h_a);
	hipHostFree(h_b);
	hipHostFree(h_c);
	return 0;
}
	.text
	.file	"async.hip"
	.globl	_Z21__device_stub__gpuAddPiS_S_ # -- Begin function _Z21__device_stub__gpuAddPiS_S_
	.type	_Z21__device_stub__gpuAddPiS_S_,@function
_Z21__device_stub__gpuAddPiS_S_:        # @_Z21__device_stub__gpuAddPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6gpuAddPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__gpuAddPiS_S_, .Lfunc_end0-_Z21__device_stub__gpuAddPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %rdi
	callq	hipStreamCreate
	leaq	8(%rsp), %rdi
	callq	hipStreamCreate
	leaq	80(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	56(%rsp), %rbx
	movl	$8000000, %esi                  # imm = 0x7A1200
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	48(%rsp), %r14
	movl	$8000000, %esi                  # imm = 0x7A1200
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	40(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	xorl	%edx, %edx
	callq	hipHostAlloc
	movq	(%rbx), %rax
	movq	(%r14), %rcx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%r15d, (%rax,%r15,4)
	movl	%r15d, (%rcx,%r15,4)
	incq	%r15
	cmpq	$2000000, %r15                  # imm = 0x1E8480
	jne	.LBB1_1
# %bb.2:
	movabsq	$4294967808, %rbx               # imm = 0x100000200
	leaq	72(%rsp), %r12
	movl	$4000000, %ebp                  # imm = 0x3D0900
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	64(%rsp), %r14
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	leaq	104(%rsp), %r13
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	96(%rsp), %r15
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	88(%rsp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	56(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%r13), %rdi
	movq	56(%rsp), %rsi
	addq	%rbp, %rsi
	movq	8(%rsp), %r8
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%r14), %rdi
	movq	48(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	(%r15), %rdi
	movq	48(%rsp), %rsi
	addq	%rbp, %rsi
	movq	8(%rsp), %r8
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	16(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	32(%rsp), %rdx
	callq	_Z21__device_stub__gpuAddPiS_S_
.LBB1_4:
	movq	8(%rsp), %r9
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	104(%rsp), %rdi
	movq	96(%rsp), %rsi
	movq	88(%rsp), %rdx
	callq	_Z21__device_stub__gpuAddPiS_S_
.LBB1_6:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %r8
	movl	$4000000, %ebx                  # imm = 0x3D0900
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$2, %ecx
	callq	hipMemcpyAsync
	movq	40(%rsp), %rdi
	addq	%rbx, %rdi
	movq	88(%rsp), %rsi
	movq	8(%rsp), %r8
	movl	$4000000, %edx                  # imm = 0x3D0900
	movl	$2, %ecx
	callq	hipMemcpyAsync
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	8(%rsp), %rdi
	callq	hipStreamSynchronize
	movq	24(%rsp), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	116(%rsp), %r14
	movl	$0, (%r14)
	movq	80(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	80(%rsp), %rdi
	callq	hipEventDestroy
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	56(%rsp), %rax
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rcx
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movl	(%rdx,%rbx,4), %esi
	addl	(%rax,%rbx,4), %esi
	cmpl	(%rcx,%rbx,4), %esi
	jne	.LBB1_10
# %bb.8:                                #   in Loop: Header=BB1_7 Depth=1
	incq	%rbx
	cmpq	$2000000, %rbx                  # imm = 0x1E8480
	jne	.LBB1_7
# %bb.9:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	jmp	.LBB1_11
.LBB1_10:
	movl	(%rdx,%rbx,4), %edx
	addl	(%rax,%rbx,4), %edx
	movl	(%rcx,%rbx,4), %ecx
	movl	$.L.str.3, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
.LBB1_11:
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipHostFree
	movq	48(%rsp), %rdi
	callq	hipHostFree
	movq	40(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6gpuAddPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6gpuAddPiS_S_,@object         # @_Z6gpuAddPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6gpuAddPiS_S_
	.p2align	3, 0x0
_Z6gpuAddPiS_S_:
	.quad	_Z21__device_stub__gpuAddPiS_S_
	.size	_Z6gpuAddPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Time consumption: %lf\n"
	.size	.L.str, 23

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"There is an Error in GPU Computation, at index %d, CPU(%d)!=GPU(%d)\n"
	.size	.L.str.3, 69

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6gpuAddPiS_S_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Vector addition on GPU "
	.size	.Lstr, 24

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"GPU has computed Sum Correctly"
	.size	.Lstr.1, 31

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__gpuAddPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6gpuAddPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6gpuAddPiS_S_         ; -- Begin function _Z6gpuAddPiS_S_
	.globl	_Z6gpuAddPiS_S_
	.p2align	8
	.type	_Z6gpuAddPiS_S_,@function
_Z6gpuAddPiS_S_:                        ; @_Z6gpuAddPiS_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x24
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e32 0xf4240, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s9, s8
	s_mov_b32 s8, 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s1, v1
	v_add_co_u32 v4, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_cmp_lt_i32_e32 vcc_lo, 0xf423f, v1
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_u32 v2, s0, s2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_or_b32 s8, vcc_lo, s8
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6gpuAddPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6gpuAddPiS_S_, .Lfunc_end0-_Z6gpuAddPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 228
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6gpuAddPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6gpuAddPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
