/*
	C = A x B where
	A is m x n
	B is n x k
	C is m x k

	Assume the m,n,k are divisibles of BLOCK_SIZE
*/

#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <device_functions.h>
#include <chrono>

// hide red underline for __syncthreads (nvidia forum based solution)
#pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif

#define BLOCK_SIZE 32

/*
	naive algorythm of matrix multiplication C = A * B
	where each thread calculates one element of C
*/
__global__ void matrixMultiplicationGPU1(float* a, float* b, float* c, int m, int n, int k) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	
	float sum = 0;
	if(!(col < k && row < m))return;

	//accumulate sum
	for (int i = 0; i < n; i++) {
		sum += a[row*n + i] * b[i*k + col];
	}

	//copy result to c
	c[row*k + col] = sum;
}

__global__ void matrixMultiplicationGPU(float* A, float* B, float* C, int N, int K) {
	//Block and Thread indices
	int bx = blockIdx.x, tx = threadIdx.x;
	int by = blockIdx.y, ty = threadIdx.y;


	//stores element of the block sub-matrix that is computed by the thread
	float Pvalue = 0;

	//loop over all sub-matrices of A and B required to compute the block sub-matrix
	for (int t = 0; t < N / BLOCK_SIZE; t++) {

		//shared memory declaration
		__shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
		__shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

		As[ty][tx] = A[N * BLOCK_SIZE * by +  t * BLOCK_SIZE   + N * ty + tx];
		Bs[ty][tx] = B[BLOCK_SIZE * bx + t * K  *BLOCK_SIZE + K * ty + tx];

		__syncthreads();


#pragma unroll
		for (int i = 0; i < BLOCK_SIZE; i++) {
			Pvalue += As[ty][i] * Bs[i][tx];
		}
		
		__syncthreads();

	}

	C[K * BLOCK_SIZE * by + K * ty + BLOCK_SIZE * bx + tx] = Pvalue;
}


void matrixMultiplicationCPU(float* a, float* b, float* c, int m, int n, int k) {
	for (int i = 0; i < m; i++){
		for (int j = 0; j < k; j++){
			float res = 0;
			
			for (int ii = 0; ii < n; ii++) {
				res += a[i*n + ii] * b[ii*k + j];
			}
			
			c[i*k + j] = res;
		}
	}
}

bool equalMatrixCheckCPU(float* a, float* b, int m, int k) {
	for (int i = 0; i < m; i++) {
		for (int j = 0; j < k; j++) {
			if (a[i*k + j] != b[i*k + j]) {
				printf("err: m1[%d][%d] != m2[%d][%d]\n", i, j, i, j);
				return false;
			}
		}
	}
	return true;
}

int main(){
	printf("Starting program...\n");

	int dId = 0;
	cudaError_t err;
	
	cudaSetDevice(dId);

	err = cudaGetDevice(&dId);
	if (err != cudaSuccess) {
		printf("%d: \t error %s (code %d) \n", __LINE__, cudaGetErrorString(err), err); return 1;
	}

	dim3 dimsA(20 * BLOCK_SIZE, 2 * BLOCK_SIZE, 1);
	dim3 dimsB(40 * BLOCK_SIZE, 20 * BLOCK_SIZE, 1);
	dim3 dimsC(dimsB.x, dimsA.y, 1);

	if (dimsA.x != dimsB.y) {
		printf("product A x B does not exits! \n"); return 1;
	}

	
	int M = dimsA.y;
	int	N = dimsA.x; // == dimsB.y
	int K = dimsB.x;


	float *h_A, *h_B, *h_C, *h_C1;
	float *d_A, *d_B, *d_C;

	cudaMallocHost((void **)&h_A, sizeof(int)*M*N);
	cudaMallocHost((void **)&h_B, sizeof(int)*N*K);
	cudaMallocHost((void **)&h_C, sizeof(int)*M*K);
	cudaMallocHost((void **)&h_C1, sizeof(int)*M*K);
	
	for (int i = 0; i < M; i++) {
		for (int j = 0; j < N; j++) {
			h_A[i*N + j] = (i + j) % 10;
		}
	}

	for (int i = 0; i < N; i++) {
		for (int j = 0; j < K; j++) {
			h_B[i*K + j] = (i * j) % 10;
		}
	}

	cudaMalloc((void **)&d_A, sizeof(float)*M*N);
	cudaMalloc((void **)&d_B, sizeof(float)*N*K);
	cudaMalloc((void **)&d_C, sizeof(float)*M*K);

	cudaMemcpy(d_A, h_A, sizeof(float)*M*N, cudaMemcpyHostToDevice);
	cudaMemcpy(d_B, h_B, sizeof(float)*N*K, cudaMemcpyHostToDevice);



	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid(dimsB.x / dimBlock.x, dimsA.y / dimBlock.y);
	//          (B.width / dimBlock.x, A.height/ dimBlock.y)
	

	cudaEvent_t start, stop;
	float gpuTime = 0.0f;

	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	cudaEventRecord(start, NULL);
	matrixMultiplicationGPU<<<dimGrid, dimBlock>>>(d_A, d_B, d_C, N, K);
	cudaEventRecord(stop, NULL);

	cudaMemcpy(h_C, d_C, sizeof(float)*M*K, cudaMemcpyDeviceToHost);
	cudaEventSynchronize(stop);

	cudaEventElapsedTime(&gpuTime, start, stop);
	printf("It took %f msec to perform %dx%d by %dx%d matrix multiplication on GPU.\n", gpuTime,M,N,N,K);

	cudaDeviceSynchronize();
	


	auto begin = std::chrono::high_resolution_clock::now();
	matrixMultiplicationCPU(h_A, h_B, h_C1, M, N, K);
	auto end = std::chrono::high_resolution_clock::now();

	int cpuNano = std::chrono::duration_cast<std::chrono::nanoseconds>(end - begin).count();
	float cpuTime = cpuNano / 1000000.0;
	printf("It took %f msec to perform %dx%d by %dx%d matrix multiplication on CPU.\n", cpuTime, M, N, N, K);
	
	


	bool sameResult = equalMatrixCheckCPU(h_C, h_C1, M, K);
	if (sameResult)
		printf("Result is correct!\n");
	else
		printf("Check the code...\n");


	cudaEventDestroy(start);
	cudaEventDestroy(stop);

	printf("Free memory...\n");
	cudaFree(d_A);
	cudaFree(d_B);
	cudaFree(d_C);
	cudaFreeHost(h_A);
	cudaFreeHost(h_B);
	cudaFreeHost(h_C);
	cudaFreeHost(h_C1);

	printf("Done...\n");




	return 0;
}


/*
	Reference:
		Slides on moodle
		"Shared Memory Matrix Multiplication" on https://www.youtube.com/watch?v=SqZaletdPCY
		CUDA by examples
		"Naive Matrix Multiplication CUDA" https://github.com/lzhengchun/matrix-cuda/blob/master/matrix_cuda.cu
		Forum topics from https://devtalk.nvidia.com/
*/
	.file	"tmpxft_0038522e_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2133:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2133:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z23matrixMultiplicationCPUPfS_S_iii
	.type	_Z23matrixMultiplicationCPUPfS_S_iii, @function
_Z23matrixMultiplicationCPUPfS_S_iii:
.LFB2126:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	movq	%rdx, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r9d, %rbx
	salq	$2, %rbx
.L3:
	cmpl	%r12d, %r11d
	jge	.L2
	movslq	%r10d, %rax
	leaq	(%rsi,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %r9d
	jle	.L5
	leaq	0(%rbp,%rax,4), %r13
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L6:
	cmpl	%edx, %r8d
	jle	.L11
	movss	(%r14,%rdx,4), %xmm1
	mulss	0(%r13), %xmm1
	incq	%rdx
	addq	%rbx, %r13
	addss	%xmm1, %xmm0
	jmp	.L6
.L11:
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	jmp	.L8
.L5:
	incl	%r11d
	addl	%r9d, %r10d
	addl	%r8d, %ecx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2126:
	.size	_Z23matrixMultiplicationCPUPfS_S_iii, .-_Z23matrixMultiplicationCPUPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"err: m1[%d][%d] != m2[%d][%d]\n"
	.text
	.globl	_Z19equalMatrixCheckCPUPfS_ii
	.type	_Z19equalMatrixCheckCPUPfS_ii, @function
_Z19equalMatrixCheckCPUPfS_ii:
.LFB2127:
	.cfi_startproc
	endbr64
	movq	%rdi, %r9
	movl	%edx, %r10d
	movl	%ecx, %edi
	xorl	%r8d, %r8d
	xorl	%edx, %edx
.L13:
	cmpl	%r10d, %edx
	jge	.L19
	movslq	%r8d, %rax
	xorl	%ecx, %ecx
	salq	$2, %rax
.L18:
	cmpl	%edi, %ecx
	jge	.L24
	movss	(%r9,%rax), %xmm0
	addq	$4, %rax
	ucomiss	-4(%rsi,%rax), %xmm0
	jp	.L20
	je	.L14
.L20:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edx, %r8d
	movl	%ecx, %r9d
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L14:
	incl	%ecx
	jmp	.L18
.L24:
	incl	%edx
	addl	%edi, %r8d
	jmp	.L13
.L19:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE2127:
	.size	_Z19equalMatrixCheckCPUPfS_ii, .-_Z19equalMatrixCheckCPUPfS_ii
	.globl	_Z51__device_stub__Z24matrixMultiplicationGPU1PfS_S_iiiPfS_S_iii
	.type	_Z51__device_stub__Z24matrixMultiplicationGPU1PfS_S_iiiPfS_S_iii, @function
_Z51__device_stub__Z24matrixMultiplicationGPU1PfS_S_iiiPfS_S_iii:
.LFB2155:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z24matrixMultiplicationGPU1PfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L25:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2155:
	.size	_Z51__device_stub__Z24matrixMultiplicationGPU1PfS_S_iiiPfS_S_iii, .-_Z51__device_stub__Z24matrixMultiplicationGPU1PfS_S_iiiPfS_S_iii
	.globl	_Z24matrixMultiplicationGPU1PfS_S_iii
	.type	_Z24matrixMultiplicationGPU1PfS_S_iii, @function
_Z24matrixMultiplicationGPU1PfS_S_iii:
.LFB2156:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z24matrixMultiplicationGPU1PfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2156:
	.size	_Z24matrixMultiplicationGPU1PfS_S_iii, .-_Z24matrixMultiplicationGPU1PfS_S_iii
	.globl	_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii
	.type	_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii, @function
_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii:
.LFB2157:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23matrixMultiplicationGPUPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L30:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2157:
	.size	_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii, .-_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii
	.globl	_Z23matrixMultiplicationGPUPfS_S_ii
	.type	_Z23matrixMultiplicationGPUPfS_S_ii, @function
_Z23matrixMultiplicationGPUPfS_S_ii:
.LFB2158:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE2158:
	.size	_Z23matrixMultiplicationGPUPfS_S_ii, .-_Z23matrixMultiplicationGPUPfS_S_ii
	.section	.rodata.str1.1
.LC2:
	.string	"Starting program...\n"
.LC3:
	.string	"%d: \t error %s (code %d) \n"
.LC4:
	.string	"It took %f msec to perform %dx%d by %dx%d matrix multiplication on GPU.\n"
.LC6:
	.string	"It took %f msec to perform %dx%d by %dx%d matrix multiplication on CPU.\n"
.LC7:
	.string	"Result is correct!\n"
.LC8:
	.string	"Check the code...\n"
.LC9:
	.string	"Free memory...\n"
.LC10:
	.string	"Done...\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2128:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	addq	$-128, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
	xorl	%edi, %edi
	movl	%eax, 16(%rsp)
	call	cudaSetDevice@PLT
	leaq	16(%rsp), %rdi
	call	cudaGetDevice@PLT
	testl	%eax, %eax
	je	.L36
	movl	%eax, %edi
	movl	%eax, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movl	$117, %edx
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rcx
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L35
.L36:
	leaq	24(%rsp), %rdi
	movl	$163840, %esi
	call	cudaMallocHost@PLT
	leaq	32(%rsp), %rdi
	movl	$3276800, %esi
	call	cudaMallocHost@PLT
	leaq	40(%rsp), %rdi
	movl	$327680, %esi
	call	cudaMallocHost@PLT
	leaq	48(%rsp), %rdi
	movl	$327680, %esi
	call	cudaMallocHost@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movl	$10, %r8d
.L38:
	xorl	%ecx, %ecx
.L39:
	leal	(%rsi,%rcx), %eax
	cltd
	idivl	%r8d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	$640, %rcx
	jne	.L39
	incl	%esi
	addq	$2560, %rdi
	cmpl	$64, %esi
	jne	.L38
	movq	32(%rsp), %r8
	xorl	%edi, %edi
	movl	$10, %r9d
.L40:
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.L41:
	movl	%esi, %eax
	addl	%edi, %esi
	cltd
	idivl	%r9d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r8,%rcx,4)
	incq	%rcx
	cmpq	$1280, %rcx
	jne	.L41
	incl	%edi
	addq	$5120, %r8
	cmpl	$640, %edi
	jne	.L40
	leaq	56(%rsp), %rdi
	movl	$163840, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$3276800, %esi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movl	$327680, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movl	$163840, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$1, %ecx
	movl	$3276800, %edx
	call	cudaMemcpy@PLT
	movl	$1073741829, %eax
	leaq	80(%rsp), %rdi
	movl	$1, 116(%rsp)
	salq	$3, %rax
	movl	$0x00000000, 20(%rsp)
	movq	%rax, 108(%rsp)
	call	cudaEventCreate@PLT
	leaq	88(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	108(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	116(%rsp), %esi
	movl	$1, %ecx
	movabsq	$137438953504, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movl	$640, %ecx
	movl	$1280, %r8d
	movq	56(%rsp), %rdi
	call	_Z49__device_stub__Z23matrixMultiplicationGPUPfS_S_iiPfS_S_ii
.L43:
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$2, %ecx
	movl	$327680, %edx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	88(%rsp), %rdx
	movq	80(%rsp), %rsi
	leaq	20(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	$1280, %r9d
	movl	$640, %r8d
	movl	$640, %ecx
	movl	$64, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	20(%rsp), %xmm0
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	48(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1280, %r9d
	movq	24(%rsp), %rdi
	movl	$640, %r8d
	movl	$64, %ecx
	movq	%rax, %rbx
	call	_Z23matrixMultiplicationCPUPfS_S_iii
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$1280, %r9d
	movl	$640, %r8d
	movl	$640, %ecx
	subq	%rbx, %rax
	movl	$64, %edx
	movl	$2, %edi
	cvtsi2sdl	%eax, %xmm0
	leaq	.LC6(%rip), %rsi
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1280, %ecx
	movl	$64, %edx
	call	_Z19equalMatrixCheckCPUPfS_ii
	leaq	.LC7(%rip), %rsi
	testb	%al, %al
	jne	.L51
	leaq	.LC8(%rip), %rsi
.L51:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	88(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	40(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	48(%rsp), %rdi
	call	cudaFreeHost@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L35:
	movq	120(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2128:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z23matrixMultiplicationGPUPfS_S_ii"
.LC12:
	.string	"_Z24matrixMultiplicationGPU1PfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2160:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z23matrixMultiplicationGPUPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z24matrixMultiplicationGPU1PfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2160:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
	C = A x B where
	A is m x n
	B is n x k
	C is m x k

	Assume the m,n,k are divisibles of BLOCK_SIZE
*/

#include "hip/hip_runtime.h"

#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <hip/device_functions.h>
#include <chrono>

// hide red underline for __syncthreads (nvidia forum based solution)
#pragma once
#ifdef __INTELLISENSE__
void __syncthreads();
#endif

#define BLOCK_SIZE 32

/*
	naive algorythm of matrix multiplication C = A * B
	where each thread calculates one element of C
*/
__global__ void matrixMultiplicationGPU1(float* a, float* b, float* c, int m, int n, int k) {
	int row = blockIdx.y * blockDim.y + threadIdx.y;
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	
	float sum = 0;
	if(!(col < k && row < m))return;

	//accumulate sum
	for (int i = 0; i < n; i++) {
		sum += a[row*n + i] * b[i*k + col];
	}

	//copy result to c
	c[row*k + col] = sum;
}

__global__ void matrixMultiplicationGPU(float* A, float* B, float* C, int N, int K) {
	//Block and Thread indices
	int bx = blockIdx.x, tx = threadIdx.x;
	int by = blockIdx.y, ty = threadIdx.y;


	//stores element of the block sub-matrix that is computed by the thread
	float Pvalue = 0;

	//loop over all sub-matrices of A and B required to compute the block sub-matrix
	for (int t = 0; t < N / BLOCK_SIZE; t++) {

		//shared memory declaration
		__shared__ float As[BLOCK_SIZE][BLOCK_SIZE];
		__shared__ float Bs[BLOCK_SIZE][BLOCK_SIZE];

		As[ty][tx] = A[N * BLOCK_SIZE * by +  t * BLOCK_SIZE   + N * ty + tx];
		Bs[ty][tx] = B[BLOCK_SIZE * bx + t * K  *BLOCK_SIZE + K * ty + tx];

		__syncthreads();


#pragma unroll
		for (int i = 0; i < BLOCK_SIZE; i++) {
			Pvalue += As[ty][i] * Bs[i][tx];
		}
		
		__syncthreads();

	}

	C[K * BLOCK_SIZE * by + K * ty + BLOCK_SIZE * bx + tx] = Pvalue;
}


void matrixMultiplicationCPU(float* a, float* b, float* c, int m, int n, int k) {
	for (int i = 0; i < m; i++){
		for (int j = 0; j < k; j++){
			float res = 0;
			
			for (int ii = 0; ii < n; ii++) {
				res += a[i*n + ii] * b[ii*k + j];
			}
			
			c[i*k + j] = res;
		}
	}
}

bool equalMatrixCheckCPU(float* a, float* b, int m, int k) {
	for (int i = 0; i < m; i++) {
		for (int j = 0; j < k; j++) {
			if (a[i*k + j] != b[i*k + j]) {
				printf("err: m1[%d][%d] != m2[%d][%d]\n", i, j, i, j);
				return false;
			}
		}
	}
	return true;
}

int main(){
	printf("Starting program...\n");

	int dId = 0;
	hipError_t err;
	
	hipSetDevice(dId);

	err = hipGetDevice(&dId);
	if (err != hipSuccess) {
		printf("%d: \t error %s (code %d) \n", __LINE__, hipGetErrorString(err), err); return 1;
	}

	dim3 dimsA(20 * BLOCK_SIZE, 2 * BLOCK_SIZE, 1);
	dim3 dimsB(40 * BLOCK_SIZE, 20 * BLOCK_SIZE, 1);
	dim3 dimsC(dimsB.x, dimsA.y, 1);

	if (dimsA.x != dimsB.y) {
		printf("product A x B does not exits! \n"); return 1;
	}

	
	int M = dimsA.y;
	int	N = dimsA.x; // == dimsB.y
	int K = dimsB.x;


	float *h_A, *h_B, *h_C, *h_C1;
	float *d_A, *d_B, *d_C;

	hipHostMalloc((void **)&h_A, sizeof(int)*M*N, hipHostMallocDefault);
	hipHostMalloc((void **)&h_B, sizeof(int)*N*K, hipHostMallocDefault);
	hipHostMalloc((void **)&h_C, sizeof(int)*M*K, hipHostMallocDefault);
	hipHostMalloc((void **)&h_C1, sizeof(int)*M*K, hipHostMallocDefault);
	
	for (int i = 0; i < M; i++) {
		for (int j = 0; j < N; j++) {
			h_A[i*N + j] = (i + j) % 10;
		}
	}

	for (int i = 0; i < N; i++) {
		for (int j = 0; j < K; j++) {
			h_B[i*K + j] = (i * j) % 10;
		}
	}

	hipMalloc((void **)&d_A, sizeof(float)*M*N);
	hipMalloc((void **)&d_B, sizeof(float)*N*K);
	hipMalloc((void **)&d_C, sizeof(float)*M*K);

	hipMemcpy(d_A, h_A, sizeof(float)*M*N, hipMemcpyHostToDevice);
	hipMemcpy(d_B, h_B, sizeof(float)*N*K, hipMemcpyHostToDevice);



	dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);
	dim3 dimGrid(dimsB.x / dimBlock.x, dimsA.y / dimBlock.y);
	//          (B.width / dimBlock.x, A.height/ dimBlock.y)
	

	hipEvent_t start, stop;
	float gpuTime = 0.0f;

	hipEventCreate(&start);
	hipEventCreate(&stop);

	hipEventRecord(start, NULL);
	matrixMultiplicationGPU<<<dimGrid, dimBlock>>>(d_A, d_B, d_C, N, K);
	hipEventRecord(stop, NULL);

	hipMemcpy(h_C, d_C, sizeof(float)*M*K, hipMemcpyDeviceToHost);
	hipEventSynchronize(stop);

	hipEventElapsedTime(&gpuTime, start, stop);
	printf("It took %f msec to perform %dx%d by %dx%d matrix multiplication on GPU.\n", gpuTime,M,N,N,K);

	hipDeviceSynchronize();
	


	auto begin = std::chrono::high_resolution_clock::now();
	matrixMultiplicationCPU(h_A, h_B, h_C1, M, N, K);
	auto end = std::chrono::high_resolution_clock::now();

	int cpuNano = std::chrono::duration_cast<std::chrono::nanoseconds>(end - begin).count();
	float cpuTime = cpuNano / 1000000.0;
	printf("It took %f msec to perform %dx%d by %dx%d matrix multiplication on CPU.\n", cpuTime, M, N, N, K);
	
	


	bool sameResult = equalMatrixCheckCPU(h_C, h_C1, M, K);
	if (sameResult)
		printf("Result is correct!\n");
	else
		printf("Check the code...\n");


	hipEventDestroy(start);
	hipEventDestroy(stop);

	printf("Free memory...\n");
	hipFree(d_A);
	hipFree(d_B);
	hipFree(d_C);
	hipHostFree(h_A);
	hipHostFree(h_B);
	hipHostFree(h_C);
	hipHostFree(h_C1);

	printf("Done...\n");




	return 0;
}


/*
	Reference:
		Slides on moodle
		"Shared Memory Matrix Multiplication" on https://www.youtube.com/watch?v=SqZaletdPCY
		CUDA by examples
		"Naive Matrix Multiplication CUDA" https://github.com/lzhengchun/matrix-cuda/blob/master/matrix_cuda.cu
		Forum topics from https://devtalk.nvidia.com/
*/
	.text
	.file	"kernel.hip"
	.globl	_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii # -- Begin function _Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii
	.type	_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii,@function
_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii: # @_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24matrixMultiplicationGPU1PfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii, .Lfunc_end0-_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii # -- Begin function _Z38__device_stub__matrixMultiplicationGPUPfS_S_ii
	.type	_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii,@function
_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii: # @_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23matrixMultiplicationGPUPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii, .Lfunc_end1-_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23matrixMultiplicationCPUPfS_S_iii # -- Begin function _Z23matrixMultiplicationCPUPfS_S_iii
	.type	_Z23matrixMultiplicationCPUPfS_S_iii,@function
_Z23matrixMultiplicationCPUPfS_S_iii:   # @_Z23matrixMultiplicationCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB2_9
# %bb.1:                                # %.preheader27.lr.ph
	movslq	%r9d, %rdi
	movl	%ecx, %ecx
	movl	%edi, %r10d
	movl	%r8d, %r11d
	leaq	(,%rdi,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_6 Depth 3
	testl	%r9d, %r9d
	jle	.LBB2_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	%r15, %rax
	imulq	%rdi, %rax
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_6 Depth 3
	xorps	%xmm0, %xmm0
	testl	%r8d, %r8d
	jle	.LBB2_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_4 Depth=2
	movq	%rsi, %rbp
	xorl	%edx, %edx
.LBB2_6:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	incq	%rdx
	addq	%rbx, %rbp
	cmpq	%rdx, %r11
	jne	.LBB2_6
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=2
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB2_4
.LBB2_8:                                # %._crit_edge31
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%rcx, %r15
	jne	.LBB2_2
.LBB2_9:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23matrixMultiplicationCPUPfS_S_iii, .Lfunc_end2-_Z23matrixMultiplicationCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19equalMatrixCheckCPUPfS_ii   # -- Begin function _Z19equalMatrixCheckCPUPfS_ii
	.type	_Z19equalMatrixCheckCPUPfS_ii,@function
_Z19equalMatrixCheckCPUPfS_ii:          # @_Z19equalMatrixCheckCPUPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	testl	%edx, %edx
	jle	.LBB3_1
# %bb.2:                                # %.preheader.lr.ph
	movl	%edx, %r8d
	movl	%ecx, %r9d
	xorl	%r10d, %r10d
	xorl	%eax, %eax
	xorl	%ebx, %ebx
.LBB3_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	testl	%ecx, %ecx
	jle	.LBB3_8
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB3_3 Depth=1
	movl	%r10d, %edx
	leaq	(%rsi,%rdx,4), %r11
	leaq	(%rdi,%rdx,4), %r14
	xorl	%edx, %edx
.LBB3_5:                                #   Parent Loop BB3_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%rdx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r11,%rdx,4), %xmm0
	jne	.LBB3_6
	jp	.LBB3_6
# %bb.7:                                #   in Loop: Header=BB3_5 Depth=2
	incq	%rdx
	cmpq	%rdx, %r9
	jne	.LBB3_5
.LBB3_8:                                # %._crit_edge
                                        #   in Loop: Header=BB3_3 Depth=1
	incq	%rax
	cmpq	%r8, %rax
	setae	%bl
	addl	%ecx, %r10d
	cmpq	%r8, %rax
	jne	.LBB3_3
	jmp	.LBB3_9
.LBB3_6:                                # %.thread
	movl	$.L.str, %edi
	movl	%eax, %esi
	movl	%eax, %ecx
	movl	%edx, %r8d
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_9
.LBB3_1:
	movb	$1, %bl
.LBB3_9:                                # %.loopexit
	andb	$1, %bl
	movl	%ebx, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z19equalMatrixCheckCPUPfS_ii, .Lfunc_end3-_Z19equalMatrixCheckCPUPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$88, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	leaq	84(%rsp), %rbx
	movl	$0, (%rbx)
	xorl	%edi, %edi
	callq	hipSetDevice
	movq	%rbx, %rdi
	callq	hipGetDevice
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %edi
	movl	$117, %esi
	movq	%rax, %rdx
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebx
	jmp	.LBB4_13
.LBB4_2:
	leaq	40(%rsp), %rbx
	xorl	%r14d, %r14d
	movl	$163840, %esi                   # imm = 0x28000
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	8(%rsp), %rdi
	movl	$3276800, %esi                  # imm = 0x320000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	32(%rsp), %rdi
	movl	$327680, %esi                   # imm = 0x50000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	24(%rsp), %rdi
	movl	$327680, %esi                   # imm = 0x50000
	xorl	%edx, %edx
	callq	hipHostMalloc
	movq	(%rbx), %rax
	movl	$3435973837, %ecx               # imm = 0xCCCCCCCD
.LBB4_3:                                # %.preheader100
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	movl	%r14d, %edx
	xorl	%esi, %esi
.LBB4_4:                                #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edx, %edi
	imulq	%rcx, %rdi
	shrq	$35, %rdi
	addl	%edi, %edi
	leal	(%rdi,%rdi,4), %edi
	movl	%edx, %r8d
	subl	%edi, %r8d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r8d, %xmm0
	movss	%xmm0, (%rax,%rsi)
	addq	$4, %rsi
	incl	%edx
	cmpq	$2560, %rsi                     # imm = 0xA00
	jne	.LBB4_4
# %bb.5:                                #   in Loop: Header=BB4_3 Depth=1
	incq	%r14
	addq	$2560, %rax                     # imm = 0xA00
	cmpq	$64, %r14
	jne	.LBB4_3
# %bb.6:                                # %.preheader99
	movq	8(%rsp), %rax
	xorl	%ecx, %ecx
	movl	$3435973837, %edx               # imm = 0xCCCCCCCD
.LBB4_7:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_8 Depth 2
	xorl	%esi, %esi
	xorl	%edi, %edi
.LBB4_8:                                #   Parent Loop BB4_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%esi, %r8d
	imulq	%rdx, %r8
	shrq	$35, %r8
	addl	%r8d, %r8d
	leal	(%r8,%r8,4), %r8d
	movl	%esi, %r9d
	subl	%r8d, %r9d
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r9d, %xmm0
	movss	%xmm0, (%rax,%rdi,4)
	incq	%rdi
	addl	%ecx, %esi
	cmpq	$1280, %rdi                     # imm = 0x500
	jne	.LBB4_8
# %bb.9:                                #   in Loop: Header=BB4_7 Depth=1
	incq	%rcx
	addq	$5120, %rax                     # imm = 0x1400
	cmpq	$640, %rcx                      # imm = 0x280
	jne	.LBB4_7
# %bb.10:
	leaq	72(%rsp), %rbx
	movl	$163840, %esi                   # imm = 0x28000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	64(%rsp), %r14
	movl	$3276800, %esi                  # imm = 0x320000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$327680, %esi                   # imm = 0x50000
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	40(%rsp), %rsi
	movl	$163840, %edx                   # imm = 0x28000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movq	8(%rsp), %rsi
	movl	$3276800, %edx                  # imm = 0x320000
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$0, 52(%rsp)
	leaq	56(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$8589934632, %rdi               # imm = 0x200000028
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.11:
	movq	72(%rsp), %rdi
	movq	64(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$640, %ecx                      # imm = 0x280
	movl	$1280, %r8d                     # imm = 0x500
	callq	_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii
.LBB4_12:
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$327680, %edx                   # imm = 0x50000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	52(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.4, %edi
	movl	$64, %esi
	movl	$640, %edx                      # imm = 0x280
	movl	$640, %ecx                      # imm = 0x280
	movl	$1280, %r8d                     # imm = 0x500
	movb	$1, %al
	callq	printf
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$64, %ecx
	movl	$640, %r8d                      # imm = 0x280
	movl	$1280, %r9d                     # imm = 0x500
	callq	_Z23matrixMultiplicationCPUPfS_S_iii
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subl	%r14d, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.5, %edi
	movl	$64, %esi
	movl	$640, %edx                      # imm = 0x280
	movl	$640, %ecx                      # imm = 0x280
	movl	$1280, %r8d                     # imm = 0x500
	movb	$1, %al
	callq	printf
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$64, %edx
	movl	$1280, %ecx                     # imm = 0x500
	callq	_Z19equalMatrixCheckCPUPfS_ii
	movl	$.Lstr.2, %ecx
	movl	$.Lstr.1, %edi
	testb	%al, %al
	cmovneq	%rcx, %rdi
	callq	puts@PLT
	movq	56(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipHostFree
	movq	8(%rsp), %rdi
	callq	hipHostFree
	movq	32(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movl	$.Lstr.4, %edi
	callq	puts@PLT
.LBB4_13:
	movl	%ebx, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24matrixMultiplicationGPU1PfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23matrixMultiplicationGPUPfS_S_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z24matrixMultiplicationGPU1PfS_S_iii,@object # @_Z24matrixMultiplicationGPU1PfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z24matrixMultiplicationGPU1PfS_S_iii
	.p2align	3, 0x0
_Z24matrixMultiplicationGPU1PfS_S_iii:
	.quad	_Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii
	.size	_Z24matrixMultiplicationGPU1PfS_S_iii, 8

	.type	_Z23matrixMultiplicationGPUPfS_S_ii,@object # @_Z23matrixMultiplicationGPUPfS_S_ii
	.globl	_Z23matrixMultiplicationGPUPfS_S_ii
	.p2align	3, 0x0
_Z23matrixMultiplicationGPUPfS_S_ii:
	.quad	_Z38__device_stub__matrixMultiplicationGPUPfS_S_ii
	.size	_Z23matrixMultiplicationGPUPfS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"err: m1[%d][%d] != m2[%d][%d]\n"
	.size	.L.str, 31

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d: \t error %s (code %d) \n"
	.size	.L.str.2, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"It took %f msec to perform %dx%d by %dx%d matrix multiplication on GPU.\n"
	.size	.L.str.4, 73

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"It took %f msec to perform %dx%d by %dx%d matrix multiplication on CPU.\n"
	.size	.L.str.5, 73

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z24matrixMultiplicationGPU1PfS_S_iii"
	.size	.L__unnamed_1, 38

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z23matrixMultiplicationGPUPfS_S_ii"
	.size	.L__unnamed_2, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Starting program..."
	.size	.Lstr, 20

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Check the code..."
	.size	.Lstr.1, 18

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Result is correct!"
	.size	.Lstr.2, 19

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Free memory..."
	.size	.Lstr.3, 15

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Done..."
	.size	.Lstr.4, 8

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z39__device_stub__matrixMultiplicationGPU1PfS_S_iii
	.addrsig_sym _Z38__device_stub__matrixMultiplicationGPUPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z24matrixMultiplicationGPU1PfS_S_iii
	.addrsig_sym _Z23matrixMultiplicationGPUPfS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z24matrixMultiplicationGPU1PfS_S_iii ; -- Begin function _Z24matrixMultiplicationGPU1PfS_S_iii
	.globl	_Z24matrixMultiplicationGPU1PfS_S_iii
	.p2align	8
	.type	_Z24matrixMultiplicationGPU1PfS_S_iii,@function
_Z24matrixMultiplicationGPU1PfS_S_iii:  ; @_Z24matrixMultiplicationGPU1PfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s5
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow54
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24matrixMultiplicationGPU1PfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z24matrixMultiplicationGPU1PfS_S_iii, .Lfunc_end0-_Z24matrixMultiplicationGPU1PfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z23matrixMultiplicationGPUPfS_S_ii ; -- Begin function _Z23matrixMultiplicationGPUPfS_S_ii
	.globl	_Z23matrixMultiplicationGPUPfS_S_ii
	.p2align	8
	.type	_Z23matrixMultiplicationGPUPfS_S_ii,@function
_Z23matrixMultiplicationGPUPfS_S_ii:    ; @_Z23matrixMultiplicationGPUPfS_S_ii
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v5, s15, 5, v1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 32
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v3, v1, s7
	v_lshlrev_b32_e32 v2, 2, v0
	s_lshl_b32 s9, s14, 5
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 7, v1
	s_ashr_i32 s8, s6, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_or_b32_e32 v8, 0x1000, v2
	s_lshr_b32 s8, s8, 27
	v_add3_u32 v1, v0, v3, s9
	v_add_nc_u32_e32 v9, v7, v2
	s_add_i32 s8, s6, s8
	v_add_nc_u32_e32 v10, v8, v7
	v_add_nc_u32_e32 v11, 0x400, v8
	v_mad_u64_u32 v[3:4], null, s6, v5, v[0:1]
	v_add_nc_u32_e32 v12, 0x800, v8
	v_add_nc_u32_e32 v13, 0xc00, v8
	s_ashr_i32 s6, s8, 5
	s_lshl_b32 s8, s7, 5
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s6, s6, -1
	s_cmp_eq_u32 s6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[14:15], 2, v[3:4]
	v_lshlrev_b64 v[16:17], 2, v[1:2]
	v_add_nc_u32_e32 v1, s8, v1
	v_add_nc_u32_e32 v3, 32, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s0, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s1, v15, vcc_lo
	v_add_co_u32 v16, vcc_lo, s2, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s3, v17, vcc_lo
	global_load_b32 v2, v[14:15], off
	global_load_b32 v4, v[16:17], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v9, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[22:23], v8 offset1:32
	ds_load_b128 v[14:17], v7
	ds_load_2addr_b32 v[24:25], v8 offset0:64 offset1:96
	ds_load_b128 v[18:21], v7 offset:16
	ds_load_2addr_b32 v[26:27], v8 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v23
	ds_load_2addr_b32 v[22:23], v8 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v24
	v_fmac_f32_e32 v6, v17, v25
	ds_load_2addr_b32 v[24:25], v11 offset1:32
	ds_load_b128 v[14:17], v7 offset:32
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v27
	ds_load_2addr_b32 v[26:27], v11 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v20, v22
	v_fmac_f32_e32 v6, v21, v23
	ds_load_b128 v[18:21], v7 offset:48
	ds_load_2addr_b32 v[22:23], v11 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v25
	ds_load_2addr_b32 v[24:25], v11 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v26
	v_fmac_f32_e32 v6, v17, v27
	ds_load_2addr_b32 v[26:27], v12 offset1:32
	ds_load_b128 v[14:17], v7 offset:64
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v23
	ds_load_2addr_b32 v[22:23], v12 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v20, v24
	v_fmac_f32_e32 v6, v21, v25
	ds_load_b128 v[18:21], v7 offset:80
	ds_load_2addr_b32 v[24:25], v12 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v27
	ds_load_2addr_b32 v[26:27], v12 offset0:192 offset1:224
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v16, v22
	v_fmac_f32_e32 v6, v17, v23
	ds_load_2addr_b32 v[22:23], v13 offset1:32
	ds_load_b128 v[14:17], v7 offset:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v18, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v25
	ds_load_2addr_b32 v[24:25], v13 offset0:64 offset1:96
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v20, v26
	v_fmac_f32_e32 v6, v21, v27
	ds_load_b128 v[18:21], v7 offset:112
	ds_load_2addr_b32 v[26:27], v13 offset0:128 offset1:160
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v6, v14, v22
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v15, v23
	ds_load_2addr_b32 v[14:15], v13 offset0:192 offset1:224
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fmac_f32_e32 v6, v16, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v17, v25
	v_fmac_f32_e32 v6, v18, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v19, v27
	v_fmac_f32_e32 v6, v20, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v6, v21, v15
	s_cbranch_scc0 .LBB1_2
.LBB1_3:                                ; %Flow125
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v1, v5, s7
	s_lshl_b32 s0, s14, 5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, s0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23matrixMultiplicationGPUPfS_S_ii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z23matrixMultiplicationGPUPfS_S_ii, .Lfunc_end1-_Z23matrixMultiplicationGPUPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 800
; NumSgprs: 18
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24matrixMultiplicationGPU1PfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24matrixMultiplicationGPU1PfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23matrixMultiplicationGPUPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23matrixMultiplicationGPUPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
