/*
 *
 * compiling:
 * nvcc -lglut -LGLEW life.cuda.cu -o life -g -G
 * 
 * -g -G  - debug options
 * 
 * for it's work:
 * export LD_LIBRARY_PATH=:/usr/local/cuda/lib
 * export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/local/cuda/libnvvp/
 * 
 * cuda-gdb
 */

#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <memory.h>

#define FIELD_WIDTH			10
#define FIELD_HEIGHT		10
#define NUMBER_OF_THREADS	100

float * state_first;		// on PC
float * state_second;		// arrays

float * dev_first_state;	// on Card
float * dev_second_state;	// arrays

int * dev_width;
int * dev_height;

int width = FIELD_WIDTH;
int height = FIELD_HEIGHT;

__global__ void kernel(float * first, float * second , int * width, int * height)
{
	int id = threadIdx.x + blockIdx.x * blockDim.x;

	if(id < (*width)*(*height))
	{
		int numberofneighbours = 0;
		
		int num = 0;
		
		// change to num += ...
		/*
		if(*(first + id + 1) == 1) num++;
		if(*(first + id - 1) == 1) num++;
		if(*(first + id + *height) == 1) num++;
		if(*(first + id - *height) == 1) num++;
		if(*(first + id + *height + 1) == 1) num++;
		if(*(first + id + *height - 1) == 1) num++;
		if(*(first + id - *height + 1) == 1) num++;
		if(*(first + id - *height - 1) == 1) num++;
		*/
		num += *(first + id + 1);
		num += *(first + id - 1);
		num += *(first + id + *height);
		num += *(first + id - *height);
		num += *(first + id + *height + 1);
		num += *(first + id + *height - 1);
		num += *(first + id - *height + 1);
		num += *(first + id - *height - 1);
		
		switch(num)
		{
			case 3 : *(second + id) = 1; break;
			case 2 : if(*(first + id) == 1) *(second + id) = 1; break;
			default : *(second + id) = 0; break;
		}
		
	}
}

void GetDataFromCudaDevice(int width, int height)
{
	cudaMemcpy(state_first,dev_second_state,sizeof(float)*width*height,cudaMemcpyDeviceToHost);
}

void CopyDataToCudaDevice(int width, int height)
{
	cudaMemcpy(dev_first_state,state_first,sizeof(float)*width*height,cudaMemcpyHostToDevice);
	cudaMemset(dev_second_state,0,sizeof(float)*width*height);
	
	cudaMemcpy(dev_width,&width,sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(dev_height,&height,sizeof(int),cudaMemcpyHostToDevice);
}

void InitCudaArrays(int width, int height)
{
	cudaError_t cudaStatus;

	// Choose which GPU to run on, change this on a multi-GPU system.
	cudaStatus = cudaSetDevice(0);
	if (cudaStatus != cudaSuccess)
	{
		fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
		return;
	}

	cudaMalloc((void**)&dev_width,sizeof(int));
	cudaMalloc((void**)&dev_height,sizeof(int));

	cudaMalloc((void**)&dev_first_state,sizeof(float)*width*height);
	cudaMalloc((void**)&dev_second_state,sizeof(float)*width*height);
}

void RunCudaDevice()
{
	cudaError_t cudaStatus;

	int threads = NUMBER_OF_THREADS;
	int blocks = (width*height)/(NUMBER_OF_THREADS + 1);
	
//	kernel <<<blocks,threads>>> (dev_first_state,dev_second_state,dev_width,dev_height);
	kernel <<<10,10>>> (dev_first_state,dev_second_state,dev_width,dev_height);

	cudaDeviceSynchronize();

	// cudaDeviceSynchronize waits for the kernel to finish, and returns
    	// any errors encountered during the launch.
    	cudaStatus = cudaDeviceSynchronize();
    	if (cudaStatus != cudaSuccess)
	{
        	fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
		return;
	}

	GetDataFromCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
}

void FreeCudaDevice(int width, int height)
{
	cudaFree(dev_first_state);
	cudaFree(dev_second_state);
	
	cudaFree(dev_width);
	cudaFree(dev_height);
}

void FillField()
{
	/*
	 *	
	 *	01010
	 *	00110
	 *	00100
	 *	00000
	 *	
	 */
	
	// two planers and a dot
	
	state_first[9*width+9] = 1;

	state_first[2*width+1] = 1;
	state_first[2*width+2] = 1;
	state_first[3*width+2] = 1;
	state_first[3*width+3] = 1;
	state_first[1*width+3] = 1;

	state_first[7*width+1] = 1;
	state_first[7*width+2] = 1;
	state_first[8*width+2] = 1;
	state_first[8*width+3] = 1;
	state_first[6*width+3] = 1;

}
// allocate memory and initialize array with '0'
void InitArrays(int width, int height)
{
	state_first = (float *) malloc(sizeof(float)*width*height);
	state_second = (float *) malloc(sizeof(float)*width*height);
	
	memset(state_first,0,sizeof(float)*width*height);
	memset(state_second,0,sizeof(float)*width*height);
}

void ShowArray(int width, int height)
{
	puts("-----------------");
	for(int i=0;i<width;i++)
	{
		for(int j=0;j<height;j++)
		{
			if(state_first[i*width+j] != 0)printf("*");
			else printf(" ");
		//	printf("%1.0f",state_first[i*width+j]);
		}
		printf("\n");
	}
	puts("-----------------");
}

int main()
{
	InitArrays(FIELD_WIDTH,FIELD_HEIGHT);
	FillField();
	
	ShowArray(FIELD_WIDTH,FIELD_HEIGHT);
	
	InitCudaArrays(FIELD_WIDTH,FIELD_HEIGHT);
	CopyDataToCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
//	printf("ok\n");
	RunCudaDevice();
	
//	GetDataFromCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
	FreeCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
	
	ShowArray(FIELD_WIDTH,FIELD_HEIGHT);

	char ch;
	scanf("%c",&ch);
}

	.file	"tmpxft_0036fef9_00000000-6_check.cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z21GetDataFromCudaDeviceii
	.type	_Z21GetDataFromCudaDeviceii, @function
_Z21GetDataFromCudaDeviceii:
.LFB2027:
	.cfi_startproc
	endbr64
	movslq	%edi, %rdx
	movslq	%esi, %rsi
	movq	state_first(%rip), %rdi
	movl	$2, %ecx
	imulq	%rsi, %rdx
	movq	dev_second_state(%rip), %rsi
	leaq	0(,%rdx,4), %rdx
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z21GetDataFromCudaDeviceii, .-_Z21GetDataFromCudaDeviceii
	.globl	_Z20CopyDataToCudaDeviceii
	.type	_Z20CopyDataToCudaDeviceii, @function
_Z20CopyDataToCudaDeviceii:
.LFB2028:
	.cfi_startproc
	endbr64
	movslq	%esi, %rax
	movslq	%edi, %rdx
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, %ecx
	imulq	%rax, %rdx
	movl	%edi, 12(%rsp)
	movq	dev_first_state(%rip), %rdi
	movl	%esi, 8(%rsp)
	movq	state_first(%rip), %rsi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	12(%rsp), %rdx
	movslq	8(%rsp), %rax
	xorl	%esi, %esi
	movq	dev_second_state(%rip), %rdi
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemset@PLT
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	movq	dev_width(%rip), %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	leaq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	dev_height(%rip), %rdi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z20CopyDataToCudaDeviceii, .-_Z20CopyDataToCudaDeviceii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.text
	.globl	_Z14InitCudaArraysii
	.type	_Z14InitCudaArraysii, @function
_Z14InitCudaArraysii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movslq	%esi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movslq	%edi, %rbx
	xorl	%edi, %edi
	pushq	%r8
	.cfi_def_cfa_offset 32
	call	cudaSetDevice@PLT
	testl	%eax, %eax
	je	.L6
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rdx
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	movl	$2, %esi
	popq	%rbx
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	__fprintf_chk@PLT
.L6:
	.cfi_restore_state
	imulq	%rbp, %rbx
	movl	$4, %esi
	leaq	dev_width(%rip), %rdi
	call	cudaMalloc@PLT
	movl	$4, %esi
	leaq	dev_height(%rip), %rdi
	call	cudaMalloc@PLT
	leaq	dev_first_state(%rip), %rdi
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	movq	%rbx, %rsi
	leaq	dev_second_state(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z14InitCudaArraysii, .-_Z14InitCudaArraysii
	.globl	_Z14FreeCudaDeviceii
	.type	_Z14FreeCudaDeviceii, @function
_Z14FreeCudaDeviceii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dev_first_state(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_second_state(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_width(%rip), %rdi
	call	cudaFree@PLT
	movq	dev_height(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z14FreeCudaDeviceii, .-_Z14FreeCudaDeviceii
	.globl	_Z9FillFieldv
	.type	_Z9FillFieldv, @function
_Z9FillFieldv:
.LFB2032:
	.cfi_startproc
	endbr64
	movl	width(%rip), %edx
	movq	state_first(%rip), %rax
	movss	.LC1(%rip), %xmm0
	leal	(%rdx,%rdx,8), %ecx
	movslq	%ecx, %rcx
	movss	%xmm0, 36(%rax,%rcx,4)
	leal	(%rdx,%rdx), %ecx
	movslq	%ecx, %rcx
	movss	%xmm0, 4(%rax,%rcx,4)
	movss	%xmm0, 8(%rax,%rcx,4)
	leal	(%rdx,%rdx,2), %ecx
	movslq	%ecx, %rcx
	movss	%xmm0, 12(%rax,%rcx,4)
	movss	%xmm0, 8(%rax,%rcx,4)
	movslq	%edx, %rcx
	movss	%xmm0, 12(%rax,%rcx,4)
	imull	$7, %edx, %ecx
	movslq	%ecx, %rcx
	incq	%rcx
	movss	%xmm0, (%rax,%rcx,4)
	movss	%xmm0, 4(%rax,%rcx,4)
	leal	0(,%rdx,8), %ecx
	imull	$6, %edx, %edx
	movslq	%ecx, %rcx
	addq	$2, %rcx
	movss	%xmm0, (%rax,%rcx,4)
	movslq	%edx, %rdx
	movss	%xmm0, 4(%rax,%rcx,4)
	movss	%xmm0, 12(%rax,%rdx,4)
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z9FillFieldv, .-_Z9FillFieldv
	.globl	_Z10InitArraysii
	.type	_Z10InitArraysii, @function
_Z10InitArraysii:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movslq	%esi, %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movslq	%edi, %rbx
	movq	%rbx, %rdi
	imulq	%rsi, %rdi
	leaq	0(,%rdi,4), %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r12
	movq	%rax, state_first(%rip)
	call	malloc@PLT
	movq	%rbx, %rcx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	movq	%rax, %rbp
	xorl	%esi, %esi
	movq	%rax, state_second(%rip)
	call	__memset_chk@PLT
	movq	%rbx, %rcx
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	xorl	%esi, %esi
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	__memset_chk@PLT
	.cfi_endproc
.LFE2033:
	.size	_Z10InitArraysii, .-_Z10InitArraysii
	.section	.rodata.str1.1
.LC2:
	.string	"-----------------"
.LC4:
	.string	"*"
.LC5:
	.string	" "
.LC6:
	.string	"\n"
	.text
	.globl	_Z9ShowArrayii
	.type	_Z9ShowArrayii, @function
_Z9ShowArrayii:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	leaq	.LC2(%rip), %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rdx
	.cfi_def_cfa_offset 64
	call	puts@PLT
.L15:
	cmpl	%ebp, %r14d
	jge	.L20
	movslq	%r13d, %rbx
	xorl	%r12d, %r12d
	salq	$2, %rbx
.L21:
	cmpl	%r15d, %r12d
	jge	.L25
	movq	state_first(%rip), %rax
	xorps	%xmm0, %xmm0
	ucomiss	(%rax,%rbx), %xmm0
	jp	.L22
	leaq	.LC5(%rip), %rsi
	je	.L24
.L22:
	leaq	.LC4(%rip), %rsi
.L24:
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	addq	$4, %rbx
	call	__printf_chk@PLT
	jmp	.L21
.L25:
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addl	%ebp, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L15
.L20:
	popq	%rax
	.cfi_def_cfa_offset 56
	leaq	.LC2(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	puts@PLT
	.cfi_endproc
.LFE2034:
	.size	_Z9ShowArrayii, .-_Z9ShowArrayii
	.globl	_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_
	.type	_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_, @function
_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6kernelPfS_PiS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L26:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_, .-_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_
	.globl	_Z6kernelPfS_PiS0_
	.type	_Z6kernelPfS_PiS0_, @function
_Z6kernelPfS_PiS0_:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_
	.cfi_endproc
.LFE2061:
	.size	_Z6kernelPfS_PiS0_, .-_Z6kernelPfS_PiS0_
	.section	.rodata.str1.1
.LC7:
	.string	"cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
	.text
	.globl	_Z13RunCudaDevicev
	.type	_Z13RunCudaDevicev, @function
_Z13RunCudaDevicev:
.LFB2030:
	.cfi_startproc
	endbr64
	movl	$2147483653, %edi
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addq	%rdi, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	dev_height(%rip), %rcx
	movq	dev_width(%rip), %rdx
	movq	dev_second_state(%rip), %rsi
	movq	dev_first_state(%rip), %rdi
	call	_Z32__device_stub__Z6kernelPfS_PiS0_PfS_PiS0_
.L32:
	call	cudaDeviceSynchronize@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ecx
	testl	%eax, %eax
	je	.L33
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	__fprintf_chk@PLT
.L33:
	.cfi_restore_state
	movl	$10, %esi
	movl	$10, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	_Z21GetDataFromCudaDeviceii
	.cfi_endproc
.LFE2030:
	.size	_Z13RunCudaDevicev, .-_Z13RunCudaDevicev
	.section	.rodata.str1.1
.LC8:
	.string	"%c"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$10, %esi
	movl	$10, %edi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	_Z10InitArraysii
	movl	$10, %esi
	movl	$10, %edi
	call	_Z9FillFieldv
	call	_Z9ShowArrayii
	movl	$10, %esi
	movl	$10, %edi
	call	_Z14InitCudaArraysii
	movl	$10, %esi
	movl	$10, %edi
	call	_Z20CopyDataToCudaDeviceii
	call	_Z13RunCudaDevicev
	movl	$10, %esi
	movl	$10, %edi
	call	_Z14FreeCudaDeviceii
	movl	$10, %esi
	movl	$10, %edi
	call	_Z9ShowArrayii
	xorl	%eax, %eax
	leaq	7(%rsp), %rsi
	leaq	.LC8(%rip), %rdi
	call	__isoc23_scanf@PLT
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z6kernelPfS_PiS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6kernelPfS_PiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	height
	.data
	.align 4
	.type	height, @object
	.size	height, 4
height:
	.long	10
	.globl	width
	.align 4
	.type	width, @object
	.size	width, 4
width:
	.long	10
	.globl	dev_height
	.bss
	.align 8
	.type	dev_height, @object
	.size	dev_height, 8
dev_height:
	.zero	8
	.globl	dev_width
	.align 8
	.type	dev_width, @object
	.size	dev_width, 8
dev_width:
	.zero	8
	.globl	dev_second_state
	.align 8
	.type	dev_second_state, @object
	.size	dev_second_state, 8
dev_second_state:
	.zero	8
	.globl	dev_first_state
	.align 8
	.type	dev_first_state, @object
	.size	dev_first_state, 8
dev_first_state:
	.zero	8
	.globl	state_second
	.align 8
	.type	state_second, @object
	.size	state_second, 8
state_second:
	.zero	8
	.globl	state_first
	.align 8
	.type	state_first, @object
	.size	state_first, 8
state_first:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *
 * compiling:
 * nvcc -lglut -LGLEW life.cuda.cu -o life -g -G
 * 
 * -g -G  - debug options
 * 
 * for it's work:
 * export LD_LIBRARY_PATH=:/usr/local/cuda/lib
 * export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/local/cuda/libnvvp/
 * 
 * cuda-gdb
 */

#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#include <memory.h>

#define FIELD_WIDTH			10
#define FIELD_HEIGHT		10
#define NUMBER_OF_THREADS	100

float * state_first;		// on PC
float * state_second;		// arrays

float * dev_first_state;	// on Card
float * dev_second_state;	// arrays

int * dev_width;
int * dev_height;

int width = FIELD_WIDTH;
int height = FIELD_HEIGHT;

__global__ void kernel(float * first, float * second , int * width, int * height)
{
	int id = threadIdx.x + blockIdx.x * blockDim.x;

	if(id < (*width)*(*height))
	{
		int numberofneighbours = 0;
		
		int num = 0;
		
		// change to num += ...
		/*
		if(*(first + id + 1) == 1) num++;
		if(*(first + id - 1) == 1) num++;
		if(*(first + id + *height) == 1) num++;
		if(*(first + id - *height) == 1) num++;
		if(*(first + id + *height + 1) == 1) num++;
		if(*(first + id + *height - 1) == 1) num++;
		if(*(first + id - *height + 1) == 1) num++;
		if(*(first + id - *height - 1) == 1) num++;
		*/
		num += *(first + id + 1);
		num += *(first + id - 1);
		num += *(first + id + *height);
		num += *(first + id - *height);
		num += *(first + id + *height + 1);
		num += *(first + id + *height - 1);
		num += *(first + id - *height + 1);
		num += *(first + id - *height - 1);
		
		switch(num)
		{
			case 3 : *(second + id) = 1; break;
			case 2 : if(*(first + id) == 1) *(second + id) = 1; break;
			default : *(second + id) = 0; break;
		}
		
	}
}

void GetDataFromCudaDevice(int width, int height)
{
	hipMemcpy(state_first,dev_second_state,sizeof(float)*width*height,hipMemcpyDeviceToHost);
}

void CopyDataToCudaDevice(int width, int height)
{
	hipMemcpy(dev_first_state,state_first,sizeof(float)*width*height,hipMemcpyHostToDevice);
	hipMemset(dev_second_state,0,sizeof(float)*width*height);
	
	hipMemcpy(dev_width,&width,sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(dev_height,&height,sizeof(int),hipMemcpyHostToDevice);
}

void InitCudaArrays(int width, int height)
{
	hipError_t cudaStatus;

	// Choose which GPU to run on, change this on a multi-GPU system.
	cudaStatus = hipSetDevice(0);
	if (cudaStatus != hipSuccess)
	{
		fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
		return;
	}

	hipMalloc((void**)&dev_width,sizeof(int));
	hipMalloc((void**)&dev_height,sizeof(int));

	hipMalloc((void**)&dev_first_state,sizeof(float)*width*height);
	hipMalloc((void**)&dev_second_state,sizeof(float)*width*height);
}

void RunCudaDevice()
{
	hipError_t cudaStatus;

	int threads = NUMBER_OF_THREADS;
	int blocks = (width*height)/(NUMBER_OF_THREADS + 1);
	
//	kernel <<<blocks,threads>>> (dev_first_state,dev_second_state,dev_width,dev_height);
	kernel <<<10,10>>> (dev_first_state,dev_second_state,dev_width,dev_height);

	hipDeviceSynchronize();

	// cudaDeviceSynchronize waits for the kernel to finish, and returns
    	// any errors encountered during the launch.
    	cudaStatus = hipDeviceSynchronize();
    	if (cudaStatus != hipSuccess)
	{
        	fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
		return;
	}

	GetDataFromCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
}

void FreeCudaDevice(int width, int height)
{
	hipFree(dev_first_state);
	hipFree(dev_second_state);
	
	hipFree(dev_width);
	hipFree(dev_height);
}

void FillField()
{
	/*
	 *	
	 *	01010
	 *	00110
	 *	00100
	 *	00000
	 *	
	 */
	
	// two planers and a dot
	
	state_first[9*width+9] = 1;

	state_first[2*width+1] = 1;
	state_first[2*width+2] = 1;
	state_first[3*width+2] = 1;
	state_first[3*width+3] = 1;
	state_first[1*width+3] = 1;

	state_first[7*width+1] = 1;
	state_first[7*width+2] = 1;
	state_first[8*width+2] = 1;
	state_first[8*width+3] = 1;
	state_first[6*width+3] = 1;

}
// allocate memory and initialize array with '0'
void InitArrays(int width, int height)
{
	state_first = (float *) malloc(sizeof(float)*width*height);
	state_second = (float *) malloc(sizeof(float)*width*height);
	
	memset(state_first,0,sizeof(float)*width*height);
	memset(state_second,0,sizeof(float)*width*height);
}

void ShowArray(int width, int height)
{
	puts("-----------------");
	for(int i=0;i<width;i++)
	{
		for(int j=0;j<height;j++)
		{
			if(state_first[i*width+j] != 0)printf("*");
			else printf(" ");
		//	printf("%1.0f",state_first[i*width+j]);
		}
		printf("\n");
	}
	puts("-----------------");
}

int main()
{
	InitArrays(FIELD_WIDTH,FIELD_HEIGHT);
	FillField();
	
	ShowArray(FIELD_WIDTH,FIELD_HEIGHT);
	
	InitCudaArrays(FIELD_WIDTH,FIELD_HEIGHT);
	CopyDataToCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
//	printf("ok\n");
	RunCudaDevice();
	
//	GetDataFromCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
	FreeCudaDevice(FIELD_WIDTH,FIELD_HEIGHT);
	
	ShowArray(FIELD_WIDTH,FIELD_HEIGHT);

	char ch;
	scanf("%c",&ch);
}

	.text
	.file	"check.cuda.hip"
	.globl	_Z21__device_stub__kernelPfS_PiS0_ # -- Begin function _Z21__device_stub__kernelPfS_PiS0_
	.type	_Z21__device_stub__kernelPfS_PiS0_,@function
_Z21__device_stub__kernelPfS_PiS0_:     # @_Z21__device_stub__kernelPfS_PiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6kernelPfS_PiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__kernelPfS_PiS0_, .Lfunc_end0-_Z21__device_stub__kernelPfS_PiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21GetDataFromCudaDeviceii     # -- Begin function _Z21GetDataFromCudaDeviceii
	.type	_Z21GetDataFromCudaDeviceii,@function
_Z21GetDataFromCudaDeviceii:            # @_Z21GetDataFromCudaDeviceii
	.cfi_startproc
# %bb.0:
	movq	state_first(%rip), %rax
	movq	dev_second_state(%rip), %rcx
	movslq	%edi, %rdi
	movslq	%esi, %rdx
	imulq	%rdi, %rdx
	shlq	$2, %rdx
	movq	%rax, %rdi
	movq	%rcx, %rsi
	movl	$2, %ecx
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end1:
	.size	_Z21GetDataFromCudaDeviceii, .Lfunc_end1-_Z21GetDataFromCudaDeviceii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20CopyDataToCudaDeviceii      # -- Begin function _Z20CopyDataToCudaDeviceii
	.type	_Z20CopyDataToCudaDeviceii,@function
_Z20CopyDataToCudaDeviceii:             # @_Z20CopyDataToCudaDeviceii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %r14
	movl	%edi, (%r14)
	leaq	8(%rsp), %rbx
	movl	%esi, (%rbx)
	movq	dev_first_state(%rip), %rax
	movq	state_first(%rip), %rcx
	movslq	%edi, %rdx
	movslq	%esi, %r15
	imulq	%rdx, %r15
	shlq	$2, %r15
	movq	%rax, %rdi
	movq	%rcx, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_second_state(%rip), %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	hipMemset
	movq	dev_width(%rip), %rdi
	movl	$4, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	dev_height(%rip), %rdi
	movl	$4, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20CopyDataToCudaDeviceii, .Lfunc_end2-_Z20CopyDataToCudaDeviceii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14InitCudaArraysii            # -- Begin function _Z14InitCudaArraysii
	.type	_Z14InitCudaArraysii,@function
_Z14InitCudaArraysii:                   # @_Z14InitCudaArraysii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebx
	movl	%edi, %ebp
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB3_1
# %bb.2:
	movl	$dev_width, %edi
	movl	$4, %esi
	callq	hipMalloc
	movl	$dev_height, %edi
	movl	$4, %esi
	callq	hipMalloc
	movslq	%ebp, %rax
	movslq	%ebx, %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movl	$dev_first_state, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$dev_second_state, %edi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMalloc                       # TAILCALL
.LBB3_1:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$63, %esi
	movl	$1, %edx
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fwrite@PLT                      # TAILCALL
.Lfunc_end3:
	.size	_Z14InitCudaArraysii, .Lfunc_end3-_Z14InitCudaArraysii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13RunCudaDevicev              # -- Begin function _Z13RunCudaDevicev
	.type	_Z13RunCudaDevicev,@function
_Z13RunCudaDevicev:                     # @_Z13RunCudaDevicev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4294967306, %rdi               # imm = 0x10000000A
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	dev_first_state(%rip), %rdi
	movq	dev_second_state(%rip), %rsi
	movq	dev_width(%rip), %rdx
	movq	dev_height(%rip), %rcx
	callq	_Z21__device_stub__kernelPfS_PiS0_
.LBB4_2:
	callq	hipDeviceSynchronize
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_3
# %bb.4:
	movq	state_first(%rip), %rdi
	movq	dev_second_state(%rip), %rsi
	movl	$400, %edx                      # imm = 0x190
	movl	$2, %ecx
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.LBB4_3:
	.cfi_def_cfa_offset 16
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	fprintf                         # TAILCALL
.Lfunc_end4:
	.size	_Z13RunCudaDevicev, .Lfunc_end4-_Z13RunCudaDevicev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14FreeCudaDeviceii            # -- Begin function _Z14FreeCudaDeviceii
	.type	_Z14FreeCudaDeviceii,@function
_Z14FreeCudaDeviceii:                   # @_Z14FreeCudaDeviceii
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	dev_first_state(%rip), %rdi
	callq	hipFree
	movq	dev_second_state(%rip), %rdi
	callq	hipFree
	movq	dev_width(%rip), %rdi
	callq	hipFree
	movq	dev_height(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end5:
	.size	_Z14FreeCudaDeviceii, .Lfunc_end5-_Z14FreeCudaDeviceii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9FillFieldv                   # -- Begin function _Z9FillFieldv
	.type	_Z9FillFieldv,@function
_Z9FillFieldv:                          # @_Z9FillFieldv
	.cfi_startproc
# %bb.0:
	movq	state_first(%rip), %rax
	movslq	width(%rip), %rcx
	leaq	(%rcx,%rcx,8), %rdx
	movl	$1065353216, %esi               # imm = 0x3F800000
	movl	%esi, 36(%rax,%rdx,4)
	leaq	(%rcx,%rcx), %rdi
	movl	%esi, 4(%rax,%rcx,8)
	movslq	%edi, %rdi
	movl	%esi, 8(%rax,%rdi,4)
	leaq	(%rcx,%rcx,2), %rdi
	movabsq	$4575657222473777152, %r8       # imm = 0x3F8000003F800000
	movq	%r8, 8(%rax,%rdi,4)
	movl	%esi, 12(%rax,%rcx,4)
	leaq	(%rdx,%rdx,2), %rdx
	addq	%rcx, %rdx
	movq	%r8, 4(%rax,%rdx)
	leaq	(,%rcx,8), %rdx
	shlq	$5, %rcx
	movl	%esi, 8(%rax,%rcx)
	orl	$3, %edx
	movslq	%edx, %rcx
	movl	%esi, (%rax,%rcx,4)
	movl	%esi, 12(%rax,%rdi,8)
	retq
.Lfunc_end6:
	.size	_Z9FillFieldv, .Lfunc_end6-_Z9FillFieldv
	.cfi_endproc
                                        # -- End function
	.globl	_Z10InitArraysii                # -- Begin function _Z10InitArraysii
	.type	_Z10InitArraysii,@function
_Z10InitArraysii:                       # @_Z10InitArraysii
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	%edi, %rax
	movslq	%esi, %rbx
	imulq	%rax, %rbx
	shlq	$2, %rbx
	movl	$1, %edi
	movq	%rbx, %rsi
	callq	calloc@PLT
	movq	%rax, state_first(%rip)
	movl	$1, %edi
	movq	%rbx, %rsi
	callq	calloc@PLT
	movq	%rax, state_second(%rip)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z10InitArraysii, .Lfunc_end7-_Z10InitArraysii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9ShowArrayii
.LCPI8_0:
	.long	0x00000000                      # float 0
	.text
	.globl	_Z9ShowArrayii
	.type	_Z9ShowArrayii,@function
_Z9ShowArrayii:                         # @_Z9ShowArrayii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, 12(%rsp)                  # 4-byte Spill
	movl	%edi, %ebx
	movl	$.L.str.2, %edi
	callq	puts
	movl	%ebx, 8(%rsp)                   # 4-byte Spill
	testl	%ebx, %ebx
	jle	.LBB8_4
# %bb.1:                                # %.preheader.lr.ph
	movl	8(%rsp), %eax                   # 4-byte Reload
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	12(%rsp), %ebp                  # 4-byte Reload
	xorl	%r14d, %r14d
	movl	$42, %r13d
	xorl	%ebx, %ebx
.LBB8_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_5 Depth 2
	movl	%r14d, %r14d
	movq	%rbp, %r15
	movq	%r14, %r12
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	jle	.LBB8_3
.LBB8_5:                                #   Parent Loop BB8_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	state_first(%rip), %rax
	xorps	%xmm0, %xmm0
	ucomiss	(%rax,%r12,4), %xmm0
	movl	$32, %edi
	cmovnel	%r13d, %edi
	cmovpl	%r13d, %edi
	callq	putchar@PLT
	incq	%r12
	decq	%r15
	jne	.LBB8_5
.LBB8_3:                                # %._crit_edge
                                        #   in Loop: Header=BB8_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbx
	addl	8(%rsp), %r14d                  # 4-byte Folded Reload
	cmpq	16(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB8_2
.LBB8_4:                                # %._crit_edge15
	movl	$.L.str.2, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts                            # TAILCALL
.Lfunc_end8:
	.size	_Z9ShowArrayii, .Lfunc_end8-_Z9ShowArrayii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$1, %edi
	movl	$400, %esi                      # imm = 0x190
	callq	calloc@PLT
	movq	%rax, state_first(%rip)
	movl	$1, %edi
	movl	$400, %esi                      # imm = 0x190
	callq	calloc@PLT
	movq	%rax, state_second(%rip)
	callq	_Z9FillFieldv
	movl	$10, %edi
	movl	$10, %esi
	callq	_Z9ShowArrayii
	movl	$10, %edi
	movl	$10, %esi
	callq	_Z14InitCudaArraysii
	movl	$10, %edi
	movl	$10, %esi
	callq	_Z20CopyDataToCudaDeviceii
	callq	_Z13RunCudaDevicev
	callq	_Z14FreeCudaDeviceii
	movl	$10, %edi
	movl	$10, %esi
	callq	_Z9ShowArrayii
	leaq	7(%rsp), %rsi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6kernelPfS_PiS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	state_first,@object             # @state_first
	.bss
	.globl	state_first
	.p2align	3, 0x0
state_first:
	.quad	0
	.size	state_first, 8

	.type	state_second,@object            # @state_second
	.globl	state_second
	.p2align	3, 0x0
state_second:
	.quad	0
	.size	state_second, 8

	.type	dev_first_state,@object         # @dev_first_state
	.globl	dev_first_state
	.p2align	3, 0x0
dev_first_state:
	.quad	0
	.size	dev_first_state, 8

	.type	dev_second_state,@object        # @dev_second_state
	.globl	dev_second_state
	.p2align	3, 0x0
dev_second_state:
	.quad	0
	.size	dev_second_state, 8

	.type	dev_width,@object               # @dev_width
	.globl	dev_width
	.p2align	3, 0x0
dev_width:
	.quad	0
	.size	dev_width, 8

	.type	dev_height,@object              # @dev_height
	.globl	dev_height
	.p2align	3, 0x0
dev_height:
	.quad	0
	.size	dev_height, 8

	.type	width,@object                   # @width
	.data
	.globl	width
	.p2align	2, 0x0
width:
	.long	10                              # 0xa
	.size	width, 4

	.type	height,@object                  # @height
	.globl	height
	.p2align	2, 0x0
height:
	.long	10                              # 0xa
	.size	height, 4

	.type	_Z6kernelPfS_PiS0_,@object      # @_Z6kernelPfS_PiS0_
	.section	.rodata,"a",@progbits
	.globl	_Z6kernelPfS_PiS0_
	.p2align	3, 0x0
_Z6kernelPfS_PiS0_:
	.quad	_Z21__device_stub__kernelPfS_PiS0_
	.size	_Z6kernelPfS_PiS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str, 64

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"hipDeviceSynchronize returned error code %d after launching addKernel!\n"
	.size	.L.str.1, 72

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"-----------------"
	.size	.L.str.2, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%c"
	.size	.L.str.6, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6kernelPfS_PiS0_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__kernelPfS_PiS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym dev_first_state
	.addrsig_sym dev_second_state
	.addrsig_sym dev_width
	.addrsig_sym dev_height
	.addrsig_sym _Z6kernelPfS_PiS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6kernelPfS_PiS0_      ; -- Begin function _Z6kernelPfS_PiS0_
	.globl	_Z6kernelPfS_PiS0_
	.p2align	8
	.type	_Z6kernelPfS_PiS0_,@function
_Z6kernelPfS_PiS0_:                     ; @_Z6kernelPfS_PiS0_
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x2c
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[8:9], 0x0
	s_load_b32 s0, s[10:11], 0x0
	s_and_b32 s1, s1, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s1, s0, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s1, v1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.1:                                ; %NodeBlock
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s1, s0, 31
	s_mov_b32 s2, 0
	s_lshl_b64 s[0:1], s[0:1], 2
                                        ; implicit-def: $sgpr3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	s_mov_b32 s4, exec_lo
	v_add_co_u32 v4, vcc_lo, v2, s0
	global_load_b32 v10, v[2:3], off offset:4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_sub_co_u32 v7, vcc_lo, v2, s0
	v_subrev_co_ci_u32_e32 v8, vcc_lo, s1, v3, vcc_lo
	s_clause 0x2
	global_load_b96 v[4:6], v[4:5], off offset:-4
	global_load_b96 v[7:9], v[7:8], off offset:-4
	global_load_b32 v11, v[2:3], off offset:-4
	s_mov_b32 s1, 0
	s_mov_b32 s0, 0
	s_waitcnt vmcnt(3)
	v_add_f32_e32 v10, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v10, v10
	v_cvt_f32_i32_e32 v10, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v11, v10
	v_cvt_i32_f32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v10, v10
	v_add_f32_e32 v5, v5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v5, v5
	v_cvt_f32_i32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v5, v8, v5
	v_cvt_i32_f32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v5, v5
	v_add_f32_e32 v5, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v5, v5
	v_cvt_f32_i32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_cvt_i32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v4, v4
	v_add_f32_e32 v4, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f32_e32 v4, v4
	v_cvt_f32_i32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v7, v4
	v_cvt_i32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e32 2, v4
	s_xor_b32 s4, exec_lo, s4
; %bb.2:                                ; %LeafBlock57
	v_cmp_ne_u32_e32 vcc_lo, 3, v4
	s_mov_b32 s0, exec_lo
	s_mov_b32 s3, 1.0
                                        ; implicit-def: $vgpr4
	s_and_b32 s2, vcc_lo, exec_lo
; %bb.3:                                ; %Flow
	s_and_not1_saveexec_b32 s4, s4
; %bb.4:                                ; %LeafBlock
	v_cmp_ne_u32_e32 vcc_lo, 2, v4
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s1, exec_lo
	s_and_b32 s5, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s5
; %bb.5:                                ; %Flow59
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v4, s3
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.6:
	v_mov_b32_e32 v4, 0
	s_or_b32 s0, s0, exec_lo
	s_and_not1_b32 s1, s1, exec_lo
; %bb.7:                                ; %Flow60
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_9
; %bb.8:
	global_load_b32 v2, v[2:3], off
	v_mov_b32_e32 v4, 1.0
	s_and_not1_b32 s0, s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_f32_e32 vcc_lo, 1.0, v2
	s_and_b32 s1, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s0, s0, s1
.LBB0_9:                                ; %Flow61
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_11
; %bb.10:                               ; %.sink.split
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6kernelPfS_PiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6kernelPfS_PiS0_, .Lfunc_end0-_Z6kernelPfS_PiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 528
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6kernelPfS_PiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6kernelPfS_PiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
