//add 2 arrays in parallel, often this is faster on CPU than GPU
//reason is computation is not intense, require more data than
//computation

#include <cstdlib>
#include <ctime>
#include <iostream>

#define BSZ 2048
#define TSZ 1024
#define TEST_SIZE BSZ * TSZ
#define TT float
#define EPS 10e-6

using namespace std;

template <typename T>
__global__ void add1d_cuda(T* c, T* a, T* b){
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  c[idx] = a[idx] + b[idx];
}

template <typename T>
clock_t add1d(T* c, T* a, T* b, size_t sz){
  for (size_t i = 0; i < sz; ++i)
    c[i] = a[i] + b[i];

  return clock();
}

template <typename T>
void random_array(T* array, size_t sz){
  srand(time(0));

  for (size_t i = 0; i < sz; ++i)
    array[i] = (TT)rand() / 100.F;
}

int main(){
  TT *a = new TT[TEST_SIZE], *b = new TT[TEST_SIZE], *c = new TT[TEST_SIZE], *d = new TT[TEST_SIZE];
  TT* da, *db, *dc;

  random_array(a, TEST_SIZE);
  random_array(b, TEST_SIZE);


  cudaMalloc((void**)&da, sizeof(TT) * TEST_SIZE);
  cudaMalloc((void**)&db, sizeof(TT) * TEST_SIZE);
  cudaMalloc((void**)&dc, sizeof(TT) * TEST_SIZE);

  clock_t timing_start = clock();

  cudaMemcpy(da, a, sizeof(TT) * TEST_SIZE, cudaMemcpyHostToDevice);
  cudaMemcpy(db, b, sizeof(TT) * TEST_SIZE, cudaMemcpyHostToDevice);


  add1d_cuda<<<BSZ, TSZ>>>(dc, da, db);

  cudaMemcpy(c, dc, sizeof(TT) * TEST_SIZE, cudaMemcpyDeviceToHost);

  cout << "CUDA time: " << (clock() - timing_start) / (double)(CLOCKS_PER_SEC / 1000) << " ms" << endl;

  cudaFree(da);
  cudaFree(db);
  cudaFree(dc);

  timing_start = clock();

  clock_t timing_end = add1d(d, a, b, TEST_SIZE);

  cout << "CPU time: " << (timing_end - timing_start) / (double)(CLOCKS_PER_SEC / 1000) << " ms" << endl;

  bool match = true;
  for (size_t i = 0; i < TEST_SIZE; ++i)
    if (c[i] - d[i] > EPS){
      cout << "value does not match" << endl;
      match = false;
    }

  if (match) cout << "All values match" << endl;
}

	.file	"tmpxft_002513b2_00000000-6_add1d.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3642:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3642:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL41__device_stub__Z10add1d_cudaIfEvPT_S1_S1_PfS_S_, @function
_ZL41__device_stub__Z10add1d_cudaIfEvPT_S1_S1_PfS_S_:
.LFB3664:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z10add1d_cudaIfEvPT_S1_S1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3664:
	.size	_ZL41__device_stub__Z10add1d_cudaIfEvPT_S1_S1_PfS_S_, .-_ZL41__device_stub__Z10add1d_cudaIfEvPT_S1_S1_PfS_S_
	.section	.text._Z10add1d_cudaIfEvPT_S1_S1_,"axG",@progbits,_Z10add1d_cudaIfEvPT_S1_S1_,comdat
	.weak	_Z10add1d_cudaIfEvPT_S1_S1_
	.type	_Z10add1d_cudaIfEvPT_S1_S1_, @function
_Z10add1d_cudaIfEvPT_S1_S1_:
.LFB3968:
	.cfi_startproc
	endbr64
	jmp	_ZL41__device_stub__Z10add1d_cudaIfEvPT_S1_S1_PfS_S_
	.cfi_endproc
.LFE3968:
	.size	_Z10add1d_cudaIfEvPT_S1_S1_, .-_Z10add1d_cudaIfEvPT_S1_S1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10add1d_cudaIfEvPT_S1_S1_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3667:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10add1d_cudaIfEvPT_S1_S1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3667:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._Z12random_arrayIfEvPT_m,"axG",@progbits,_Z12random_arrayIfEvPT_m,comdat
	.weak	_Z12random_arrayIfEvPT_m
	.type	_Z12random_arrayIfEvPT_m, @function
_Z12random_arrayIfEvPT_m:
.LFB3967:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L11:
	cmpq	%rbp, %rbx
	je	.L14
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	divss	.LC1(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L11
.L14:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3967:
	.size	_Z12random_arrayIfEvPT_m, .-_Z12random_arrayIfEvPT_m
	.section	.rodata.str1.1
.LC2:
	.string	"CUDA time: "
.LC4:
	.string	" ms"
.LC5:
	.string	"CPU time: "
.LC7:
	.string	"value does not match"
.LC8:
	.string	"All values match"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8388608, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$8388608, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$8388608, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$8388608, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$2097152, %esi
	movq	%rbp, %rdi
	movq	%rax, %r14
	call	_Z12random_arrayIfEvPT_m
	movl	$2097152, %esi
	movq	%rbx, %rdi
	call	_Z12random_arrayIfEvPT_m
	leaq	8(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	call	clock@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$8388608, %edx
	movq	%rax, %r15
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$2097153, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$11, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_ZL41__device_stub__Z10add1d_cudaIfEvPT_S1_S1_PfS_S_
.L16:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$8388608, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %r12
	call	clock@PLT
	movq	%r12, %rdi
	subq	%r15, %rax
	leaq	.LC4(%rip), %r15
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC3(%rip), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	call	clock@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
.L17:
	movss	0(%rbp,%rax,4), %xmm0
	addss	(%rbx,%rax,4), %xmm0
	movss	%xmm0, (%r14,%rax,4)
	incq	%rax
	cmpq	$2097152, %rax
	jne	.L17
	call	clock@PLT
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rax, %rbx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	subq	%r12, %rbx
	movq	%rax, %rdi
	cvtsi2sdq	%rbx, %xmm0
	divsd	.LC3(%rip), %xmm0
	xorl	%ebx, %ebx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movb	$1, %al
.L20:
	movss	0(%r13,%rbx,4), %xmm0
	subss	(%r14,%rbx,4), %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	.LC6(%rip), %xmm0
	jbe	.L18
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%eax, %eax
.L18:
	incq	%rbx
	cmpq	$2097152, %rbx
	jne	.L20
	testb	%al, %al
	je	.L21
	leaq	_ZSt4cout(%rip), %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L21:
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1120403456
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1083129856
	.align 8
.LC6:
	.long	-1998362383
	.long	1055193269
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//add 2 arrays in parallel, often this is faster on CPU than GPU
//reason is computation is not intense, require more data than
//computation


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <ctime>
#include <iostream>

#define BSZ 2048
#define TSZ 1024
#define TEST_SIZE BSZ * TSZ
#define TT float
#define EPS 10e-6

using namespace std;

template <typename T>
__global__ void add1d_cuda(T* c, T* a, T* b){
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  c[idx] = a[idx] + b[idx];
}

template <typename T>
clock_t add1d(T* c, T* a, T* b, size_t sz){
  for (size_t i = 0; i < sz; ++i)
    c[i] = a[i] + b[i];

  return clock();
}

template <typename T>
void random_array(T* array, size_t sz){
  srand(time(0));

  for (size_t i = 0; i < sz; ++i)
    array[i] = (TT)rand() / 100.F;
}

int main(){
  TT *a = new TT[TEST_SIZE], *b = new TT[TEST_SIZE], *c = new TT[TEST_SIZE], *d = new TT[TEST_SIZE];
  TT* da, *db, *dc;

  random_array(a, TEST_SIZE);
  random_array(b, TEST_SIZE);


  hipMalloc((void**)&da, sizeof(TT) * TEST_SIZE);
  hipMalloc((void**)&db, sizeof(TT) * TEST_SIZE);
  hipMalloc((void**)&dc, sizeof(TT) * TEST_SIZE);

  clock_t timing_start = clock();

  hipMemcpy(da, a, sizeof(TT) * TEST_SIZE, hipMemcpyHostToDevice);
  hipMemcpy(db, b, sizeof(TT) * TEST_SIZE, hipMemcpyHostToDevice);


  add1d_cuda<<<BSZ, TSZ>>>(dc, da, db);

  hipMemcpy(c, dc, sizeof(TT) * TEST_SIZE, hipMemcpyDeviceToHost);

  cout << "CUDA time: " << (clock() - timing_start) / (double)(CLOCKS_PER_SEC / 1000) << " ms" << endl;

  hipFree(da);
  hipFree(db);
  hipFree(dc);

  timing_start = clock();

  clock_t timing_end = add1d(d, a, b, TEST_SIZE);

  cout << "CPU time: " << (timing_end - timing_start) / (double)(CLOCKS_PER_SEC / 1000) << " ms" << endl;

  bool match = true;
  for (size_t i = 0; i < TEST_SIZE; ++i)
    if (c[i] - d[i] > EPS){
      cout << "value does not match" << endl;
      match = false;
    }

  if (match) cout << "All values match" << endl;
}

	.text
	.file	"add1d.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI0_0:
	.quad	0x408f400000000000              # double 1000
.LCPI0_1:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %r15
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %r12
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %rbx
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %r14
	movl	$2097152, %esi                  # imm = 0x200000
	movq	%r15, %rdi
	callq	_Z12random_arrayIfEvPT_m
	movl	$2097152, %esi                  # imm = 0x200000
	movq	%r12, %rdi
	callq	_Z12random_arrayIfEvPT_m
	leaq	24(%rsp), %rbp
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$8388608, %esi                  # imm = 0x800000
	callq	hipMalloc
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	(%rbp), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	leaq	1024(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_
.LBB0_2:
	movq	8(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	callq	clock
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.1, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%ebp, %ebp
	callq	clock
	movq	%rax, %r13
.LBB0_3:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%r12,%rbp,4), %xmm0
	movss	%xmm0, (%r14,%rbp,4)
	incq	%rbp
	cmpq	$2097152, %rbp                  # imm = 0x200000
	jne	.LBB0_3
# %bb.4:                                # %_Z5add1dIfElPT_S1_S1_m.exit
	callq	clock
	movq	%rax, %r15
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$10, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	subq	%r13, %r15
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r15, %xmm0
	divsd	.LCPI0_0(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.1, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movb	$1, %al
	xorl	%r15d, %r15d
	movsd	.LCPI0_1(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB0_5:                                # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%r15,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	subss	(%r14,%r15,4), %xmm0
	cvtss2sd	%xmm0, %xmm0
	ucomisd	%xmm1, %xmm0
	jbe	.LBB0_7
# %bb.6:                                #   in Loop: Header=BB0_5 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	.LCPI0_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%eax, %eax
.LBB0_7:                                #   in Loop: Header=BB0_5 Depth=1
	incq	%r15
	cmpq	$2097152, %r15                  # imm = 0x200000
	jne	.LBB0_5
# %bb.8:
	testb	$1, %al
	je	.LBB0_10
# %bb.9:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB0_10:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12random_arrayIfEvPT_m
.LCPI1_0:
	.long	0x42c80000                      # float 100
	.section	.text._Z12random_arrayIfEvPT_m,"axG",@progbits,_Z12random_arrayIfEvPT_m,comdat
	.weak	_Z12random_arrayIfEvPT_m
	.type	_Z12random_arrayIfEvPT_m,@function
_Z12random_arrayIfEvPT_m:               # @_Z12random_arrayIfEvPT_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	testq	%rbx, %rbx
	je	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z12random_arrayIfEvPT_m, .Lfunc_end1-_Z12random_arrayIfEvPT_m
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__add1d_cudaIfEvPT_S1_S1_,"axG",@progbits,_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_,comdat
	.weak	_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_ # -- Begin function _Z25__device_stub__add1d_cudaIfEvPT_S1_S1_
	.type	_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_,@function
_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_: # @_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10add1d_cudaIfEvPT_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_, .Lfunc_end2-_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10add1d_cudaIfEvPT_S1_S1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10add1d_cudaIfEvPT_S1_S1_,@object # @_Z10add1d_cudaIfEvPT_S1_S1_
	.section	.rodata._Z10add1d_cudaIfEvPT_S1_S1_,"aG",@progbits,_Z10add1d_cudaIfEvPT_S1_S1_,comdat
	.weak	_Z10add1d_cudaIfEvPT_S1_S1_
	.p2align	3, 0x0
_Z10add1d_cudaIfEvPT_S1_S1_:
	.quad	_Z25__device_stub__add1d_cudaIfEvPT_S1_S1_
	.size	_Z10add1d_cudaIfEvPT_S1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA time: "
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" ms"
	.size	.L.str.1, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"CPU time: "
	.size	.L.str.2, 11

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"value does not match"
	.size	.L.str.3, 21

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"All values match"
	.size	.L.str.4, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10add1d_cudaIfEvPT_S1_S1_"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__add1d_cudaIfEvPT_S1_S1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10add1d_cudaIfEvPT_S1_S1_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z10add1d_cudaIfEvPT_S1_S1_,"axG",@progbits,_Z10add1d_cudaIfEvPT_S1_S1_,comdat
	.protected	_Z10add1d_cudaIfEvPT_S1_S1_ ; -- Begin function _Z10add1d_cudaIfEvPT_S1_S1_
	.globl	_Z10add1d_cudaIfEvPT_S1_S1_
	.p2align	8
	.type	_Z10add1d_cudaIfEvPT_S1_S1_,@function
_Z10add1d_cudaIfEvPT_S1_S1_:            ; @_Z10add1d_cudaIfEvPT_S1_S1_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10add1d_cudaIfEvPT_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10add1d_cudaIfEvPT_S1_S1_,"axG",@progbits,_Z10add1d_cudaIfEvPT_S1_S1_,comdat
.Lfunc_end0:
	.size	_Z10add1d_cudaIfEvPT_S1_S1_, .Lfunc_end0-_Z10add1d_cudaIfEvPT_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10add1d_cudaIfEvPT_S1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10add1d_cudaIfEvPT_S1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
