#include "cuda_runtime.h"
#include <cuda.h>
#include <cstdio>
#include <iostream>
#include <iomanip>
#include <fstream>
#include <vector>
#include "device_launch_parameters.h"

using namespace std;

const int MAX_STRING_LENGTH = 256;
const int THREADS = 3;

const string DATA_FILE = "/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_dat_1.txt"; // 1, 2, 3
const string REZ_FILE = "/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_rez.txt"; // 1, 2, 3

struct BenchmarkGPU {
    char Name[MAX_STRING_LENGTH];
    int MSRP = -1;
    double Score = -1;
};

void readGPUFile(BenchmarkGPU *data);

__global__ void sum_on_gpu(BenchmarkGPU* gpus, int* count, int* n, int* chunk_size, char* results);
__device__ void gpu_memset(char* dest, int add);
__device__ int gpu_strcat(char* dest, char* src, int offset, bool nLine);

int main() {
    // Host
    int n = 25;
    BenchmarkGPU data[n];
    readGPUFile(data);
    char sresults[n * MAX_STRING_LENGTH];
    int chunk_size = n / THREADS;
    int count = 0;

    // GPU
    BenchmarkGPU* d_all_gpus;
    int* d_count;
    int* d_n;
    int* d_chunk_size;
    char* d_sresults;

    // Memory allocation for GPU
    cudaMalloc((void**)&d_all_gpus, n * sizeof(BenchmarkGPU));
    cudaMalloc((void**)&d_sresults, n * sizeof(char) * MAX_STRING_LENGTH);
    cudaMalloc((void**)&d_count, sizeof(int));
    cudaMalloc((void**)&d_n, sizeof(int));
    cudaMalloc((void**)&d_chunk_size, sizeof(int));

    // Copies memory from CPU to GPU
    cudaMemcpy(d_all_gpus, data, n * sizeof(BenchmarkGPU), cudaMemcpyHostToDevice);
    cudaMemcpy(d_count, &count, sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_n, &n, sizeof(int), cudaMemcpyHostToDevice);
    cudaMemcpy(d_chunk_size, &chunk_size, sizeof(int), cudaMemcpyHostToDevice);

    sum_on_gpu<<<1,THREADS>>>(d_all_gpus, d_count, d_n, d_chunk_size, d_sresults);
    cudaDeviceSynchronize();

    // Copies memory from GPU to CPU
    cudaMemcpy(&sresults, d_sresults, n * MAX_STRING_LENGTH * sizeof(char), cudaMemcpyDeviceToHost);
    cudaMemcpy(&count, d_count, 1, cudaMemcpyDeviceToHost);
    // Free memory
    cudaFree(d_all_gpus);
    cudaFree(d_count);
    cudaFree(d_n);
    cudaFree(d_chunk_size);
    cudaFree(d_sresults);

    cout << "Printing" << endl;
    ofstream file;
    file.open(REZ_FILE);
    file << "Resultatai" << endl;
    file << "" << endl;
    if(count == 0)
        file << "Neivienas objektas nepraejo filtro" << endl;
    else
        file << sresults << endl;

    cout << "Finished" << endl;
    return 0;
}
/**
 * GPU
 * Sums gpus list chunk data properties
 * @param gpus BenchmarkGPUs list
 * @param count BenchmarkGPUs list size
 * @param chunk_size Summed items per thread
 * @param results Summed chunk results
 */
__global__ void sum_on_gpu(BenchmarkGPU* gpus, int* count, int* n, int* chunk_size, char* results) {
    int start_index = threadIdx.x * *chunk_size;
    int end_index = start_index + 1 * *chunk_size;
    if (threadIdx.x == blockDim.x -1)
        end_index = *n;
    printf("Thread: %d Start Index: %d End Index: %d\n", threadIdx.x, start_index, end_index);
    for (int i = start_index; i < end_index; ++i) {
        double my_number = gpus[i].MSRP / gpus[i].Score;
        char tmp_res[256];
        gpu_memset(tmp_res, 0);

        tmp_res[0] = 'F';
        tmp_res[1] = '-';
        if(my_number < 70)
            tmp_res[0] = 'E';
        if(my_number < 60)
            tmp_res[0] = 'D';
        if(my_number < 50)
            tmp_res[0] = 'C';
        if(my_number < 40)
            tmp_res[0] = 'B';
        if(my_number < 30)
            tmp_res[0] = 'A';

        int cou = 2;
        cou += gpu_strcat(tmp_res, gpus[i].Name, 2, true);

        if(tmp_res[0] < 'E')
        {
            int index = atomicAdd(count, cou);
            gpu_strcat(results, tmp_res,index, false);
//            printf("Thread: %d Index: %d Result: %s ", threadIdx.x, cou, tmp.result);
        }

    }
}

__device__ int gpu_strcat(char* dest, char* src, int offset, bool nLine) {
    int i = 0;
    do {
        if(src[i] == 0 )
        {
            if(nLine)
            {
                dest[offset + i] = '\n';
                return i+1;
            }
            return i;
        }
        else
        dest[offset + i] = src[i];
        i++;}
    while (i != MAX_STRING_LENGTH);
}

__device__ void gpu_memset(char* dest, int add) {
    for (int i = 0; i < MAX_STRING_LENGTH + add; ++i) {
        dest[i] = 0;
    }
}

void readGPUFile(BenchmarkGPU *data)
{
    string line;
    ifstream myfile;
    myfile.open(DATA_FILE);
    if(!myfile.is_open()) {
        perror("Error open");
        exit(EXIT_FAILURE);
    }

    int ch = 0;
    int count = 0;
    while(getline(myfile, line)) {
        string::size_type pos;
        pos=line.find(' ',0);
        line = line.substr(pos+1);
        switch (ch) {
            case 0:
                strcpy(data[count].Name, line.c_str());
                break;
            case 1:
                data[count].MSRP =  stoi(line);
                break;
            case 2:
                data[count].Score =  stoi(line);
                count++;
                ch = -1;
                break;
        }
        ch++;
    }
}


	.file	"tmpxft_0033a263_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4381:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4381:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB5133:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE5133:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z10gpu_strcatPcS_ib
	.type	_Z10gpu_strcatPcS_ib, @function
_Z10gpu_strcatPcS_ib:
.LFB4372:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4372:
	.size	_Z10gpu_strcatPcS_ib, .-_Z10gpu_strcatPcS_ib
	.globl	_Z10gpu_memsetPci
	.type	_Z10gpu_memsetPci, @function
_Z10gpu_memsetPci:
.LFB4373:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4373:
	.size	_Z10gpu_memsetPci, .-_Z10gpu_memsetPci
	.globl	_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc
	.type	_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc, @function
_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc:
.LFB4403:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L7:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4403:
	.size	_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc, .-_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc
	.globl	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.type	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, @function
_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc:
.LFB4404:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc
	.cfi_endproc
.LFE4404:
	.size	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, .-_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4406:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4406:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4485:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L15
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L15:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4485:
	.size	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.text._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.weak	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.type	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, @function
_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_:
.LFB4480:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4480
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	%r8d, 12(%rsp)
	leaq	28(%rsp), %r13
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	__errno_location@PLT
	movl	12(%rsp), %edx
	leaq	32(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	movl	(%rax), %eax
	movl	%eax, 28(%rsp)
	xorl	%eax, %eax
	movl	%eax, 0(%rbp)
.LEHB0:
	call	*%r15
	movq	32(%rsp), %rdx
	cmpq	%rbx, %rdx
	jne	.L19
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L32
	movq	%r14, %rdi
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L19:
	cmpl	$34, 0(%rbp)
	je	.L21
	movl	$2147483648, %ecx
	movl	$4294967295, %esi
	addq	%rax, %rcx
	cmpq	%rcx, %rsi
	jnb	.L22
.L21:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L32
	movq	%r14, %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE0:
.L22:
	testq	%r12, %r12
	je	.L24
	subq	%rbx, %rdx
	movq	%rdx, (%r12)
.L24:
	movq	%r13, %rdi
	movl	%eax, 12(%rsp)
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movl	12(%rsp), %eax
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L27
	jmp	.L32
.L28:
	endbr64
	movq	%rax, %rbx
.L25:
	movq	%r13, %rdi
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L32
	movq	%rbx, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L32:
	call	__stack_chk_fail@PLT
.L27:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4480:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"aG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
.LLSDA4480:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4480-.LLSDACSB4480
.LLSDACSB4480:
	.uleb128 .LEHB0-.LFB4480
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L28-.LFB4480
	.uleb128 0
	.uleb128 .LEHB1-.LFB4480
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE4480:
	.section	.text._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.size	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, .-_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC1:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4723:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L36
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L41
	leaq	.LC1(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L36:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L38
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L38:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
.L41:
	call	__stack_chk_fail@PLT
.L39:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4723:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata.str1.1
.LC2:
	.string	"Error open"
.LC3:
	.string	"stoi"
	.text
	.globl	_Z11readGPUFileP12BenchmarkGPU
	.type	_Z11readGPUFileP12BenchmarkGPU, @function
_Z11readGPUFileP12BenchmarkGPU:
.LFB4374:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4374
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%edx, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$616, %rsp
	.cfi_def_cfa_offset 672
	movq	%fs:40, %rax
	movq	%rax, 600(%rsp)
	xorl	%eax, %eax
	leaq	80(%rsp), %rbp
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rbp, %rdi
	leaq	16(%rsp), %rax
	movb	$0, 32(%rsp)
	movq	%rax, (%rsp)
.LEHB2:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE2:
	movq	_ZL9DATA_FILE(%rip), %rsi
	leaq	96(%rsp), %rdi
	movl	$8, %edx
.LEHB3:
	call	_ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	80(%rsp), %rdx
	movq	-24(%rdx), %rdi
	addq	%rbp, %rdi
	testq	%rax, %rax
	jne	.L43
	movl	$4, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@PLT
	jmp	.L44
.L43:
	xorl	%esi, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.L44:
	leaq	200(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
	call	_ZNKSt12__basic_fileIcE7is_openEv@PLT
	testb	%al, %al
	jne	.L45
	leaq	.LC2(%rip), %rdi
	call	perror@PLT
	movl	$1, %edi
	call	exit@PLT
.L72:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L71
	movq	(%rsp), %rdi
	xorl	%edx, %edx
	movl	$32, %esi
	leaq	48(%rsp), %r14
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@PLT
	movq	(%rsp), %rsi
	orq	$-1, %rcx
	movq	%r14, %rdi
	leaq	1(%rax), %rdx
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@PLT
	movq	%r14, %rdi
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT
	movq	56(%rsp), %rdx
	testb	%al, %al
	je	.L46
	testq	%rdx, %rdx
	je	.L47
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm@PLT
.L47:
	movq	56(%rsp), %rax
	movq	16(%rsp), %rdx
	movq	%rax, 24(%rsp)
	movb	$0, (%rdx,%rax)
.L48:
	xorl	%eax, %eax
	movq	%r14, %rdi
	movq	%rax, 56(%rsp)
	movq	48(%rsp), %rax
	movb	$0, (%rax)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	cmpl	$1, %ebx
	je	.L51
	cmpl	$2, %ebx
	je	.L52
	testl	%ebx, %ebx
	jne	.L54
	movslq	%r12d, %rdi
	movq	16(%rsp), %rsi
	movl	$256, %edx
	imulq	$272, %rdi, %rdi
	addq	%r13, %rdi
	call	__strcpy_chk@PLT
.L54:
	incl	%ebx
.L45:
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@PLT
	jmp	.L72
.L46:
	movq	(%rsp), %rdi
	movq	%rdx, 8(%rsp)
	call	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@PLT
	movq	8(%rsp), %rdx
	movl	%eax, %ecx
	xorl	%eax, %eax
	testb	%cl, %cl
	jne	.L49
	movq	16(%rsp), %rax
	movq	32(%rsp), %r15
.L49:
	movq	%rdx, 24(%rsp)
	movq	48(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	movq	%rdx, 32(%rsp)
	testq	%rax, %rax
	je	.L50
	movq	%rax, 48(%rsp)
	movq	%r15, 64(%rsp)
	jmp	.L48
.L50:
	leaq	64(%rsp), %rax
	movq	%rax, 48(%rsp)
	jmp	.L48
.L51:
	movslq	%r12d, %r14
	movq	16(%rsp), %rdx
	movl	$10, %r8d
	xorl	%ecx, %ecx
	imulq	$272, %r14, %r14
	movq	__isoc23_strtol@GOTPCREL(%rip), %rdi
	leaq	.LC3(%rip), %rsi
	addq	%r13, %r14
	call	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	movl	%eax, 256(%r14)
	jmp	.L54
.L52:
	movq	16(%rsp), %rdx
	movq	__isoc23_strtol@GOTPCREL(%rip), %rdi
	movl	$10, %r8d
	xorl	%ecx, %ecx
	leaq	.LC3(%rip), %rsi
	call	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
.LEHE3:
	movl	%eax, %edx
	movslq	%r12d, %rax
	orl	$-1, %ebx
	incl	%r12d
	cvtsi2sdl	%edx, %xmm0
	imulq	$272, %rax, %rax
	movsd	%xmm0, 264(%r13,%rax)
	jmp	.L54
.L71:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	600(%rsp), %rax
	subq	%fs:40, %rax
	je	.L60
	jmp	.L69
.L64:
	endbr64
	movq	%rax, %rbx
.L57:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L58
.L63:
	endbr64
	movq	%rax, %rbx
.L58:
	movq	(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	600(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L69
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L69:
	call	__stack_chk_fail@PLT
.L60:
	addq	$616, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4374:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4374:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4374-.LLSDACSB4374
.LLSDACSB4374:
	.uleb128 .LEHB2-.LFB4374
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L63-.LFB4374
	.uleb128 0
	.uleb128 .LEHB3-.LFB4374
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L64-.LFB4374
	.uleb128 0
	.uleb128 .LEHB4-.LFB4374
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4374:
	.text
	.size	_Z11readGPUFileP12BenchmarkGPU, .-_Z11readGPUFileP12BenchmarkGPU
	.section	.rodata.str1.1
.LC5:
	.string	"Printing"
.LC6:
	.string	"Resultatai"
.LC7:
	.string	""
.LC8:
	.string	"Neivienas objektas nepraejo filtro"
.LC9:
	.string	"Finished"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4368:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4368
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r14
	pushq	%r12
	pushq	%rbx
	subq	$616, %rsp
	.cfi_offset 14, -24
	.cfi_offset 12, -32
	.cfi_offset 3, -40
	movq	%fs:40, %rax
	movq	%rax, -40(%rbp)
	xorl	%eax, %eax
	leaq	-4096(%rsp), %rax
	movl	$25, -628(%rbp)
.L74:
	cmpq	%rax, %rsp
	je	.L75
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L74
.L75:
	subq	$2704, %rsp
	orq	$0, 2696(%rsp)
	movsd	.LC4(%rip), %xmm0
	xorl	%eax, %eax
	movq	%rsp, %rbx
.L77:
	movl	$-1, 256(%rbx,%rax)
	movsd	%xmm0, 264(%rbx,%rax)
	addq	$272, %rax
	cmpq	$6800, %rax
	jne	.L77
	movq	%rbx, %rdi
.LEHB5:
	call	_Z11readGPUFileP12BenchmarkGPU
	movslq	-628(%rbp), %rsi
	movq	%rsp, %rdx
	movl	%esi, %eax
	sall	$8, %eax
	cltq
	movq	%rax, %rcx
	andq	$-4096, %rcx
	subq	%rcx, %rdx
.L78:
	cmpq	%rdx, %rsp
	je	.L79
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L78
.L79:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L80
	orq	$0, -8(%rsp,%rax)
.L80:
	movl	%esi, %eax
	movl	$3, %ecx
	leaq	-616(%rbp), %rdi
	movq	%rsp, %r14
	cltd
	imulq	$272, %rsi, %rsi
	idivl	%ecx
	movl	%eax, -624(%rbp)
	xorl	%eax, %eax
	movl	%eax, -620(%rbp)
	call	cudaMalloc@PLT
	movslq	-628(%rbp), %rsi
	leaq	-584(%rbp), %rdi
	salq	$8, %rsi
	call	cudaMalloc@PLT
	leaq	-608(%rbp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	-600(%rbp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	-592(%rbp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movslq	-628(%rbp), %rdx
	movq	%rbx, %rsi
	movq	-616(%rbp), %rdi
	movl	$1, %ecx
	leaq	-620(%rbp), %rbx
	imulq	$272, %rdx, %rdx
	call	cudaMemcpy@PLT
	movq	-608(%rbp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$4, %edx
	movq	-600(%rbp), %rdi
	leaq	-628(%rbp), %rsi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$4, %edx
	movq	-592(%rbp), %rdi
	leaq	-624(%rbp), %rsi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967299, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, -556(%rbp)
	movq	%rdx, -564(%rbp)
	movq	%rdi, -576(%rbp)
	movl	$1, -568(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	movq	-584(%rbp), %r8
	movq	-592(%rbp), %rcx
	movq	-600(%rbp), %rdx
	movq	-608(%rbp), %rsi
	movq	-616(%rbp), %rdi
	call	_Z53__device_stub__Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_PcP12BenchmarkGPUPiS1_S1_Pc
.L81:
	call	cudaDeviceSynchronize@PLT
	movl	-628(%rbp), %edx
	movl	$2, %ecx
	movq	%r14, %rdi
	movq	-584(%rbp), %rsi
	leaq	_ZSt4cout(%rip), %r12
	sall	$8, %edx
	movslq	%edx, %rdx
	call	cudaMemcpy@PLT
	movq	-608(%rbp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	leaq	-552(%rbp), %rbx
	call	cudaMemcpy@PLT
	movq	-616(%rbp), %rdi
	call	cudaFree@PLT
	movq	-608(%rbp), %rdi
	call	cudaFree@PLT
	movq	-600(%rbp), %rdi
	call	cudaFree@PLT
	movq	-592(%rbp), %rdi
	call	cudaFree@PLT
	movq	-584(%rbp), %rdi
	call	cudaFree@PLT
	leaq	.LC5(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE5:
	movq	_ZL8REZ_FILE(%rip), %rsi
	movl	$16, %edx
	leaq	-544(%rbp), %rdi
.LEHB6:
	call	_ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	-552(%rbp), %rdx
	movq	-24(%rdx), %rdi
	addq	%rbx, %rdi
	testq	%rax, %rax
	jne	.L82
	movl	$4, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@PLT
	jmp	.L83
.L82:
	xorl	%esi, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.L83:
	leaq	.LC6(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC7(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpl	$0, -620(%rbp)
	leaq	.LC8(%rip), %rsi
	je	.L99
	movq	%r14, %rsi
.L99:
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC9(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.LEHE6:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-40(%rbp), %rax
	subq	%fs:40, %rax
	je	.L88
	jmp	.L94
.L89:
	endbr64
	movq	%rax, %r12
.L86:
	movq	%rbx, %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-40(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L94
	movq	%r12, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L94:
	call	__stack_chk_fail@PLT
.L88:
	leaq	-24(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r14
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4368:
	.section	.gcc_except_table
.LLSDA4368:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4368-.LLSDACSB4368
.LLSDACSB4368:
	.uleb128 .LEHB5-.LFB4368
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB6-.LFB4368
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L89-.LFB4368
	.uleb128 0
	.uleb128 .LEHB7-.LFB4368
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE4368:
	.section	.text.startup
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_dat_1.txt"
.LC11:
	.string	"/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_rez.txt"
	.section	.text.startup
	.type	_GLOBAL__sub_I_main, @function
_GLOBAL__sub_I_main:
.LFB5127:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	_ZL9DATA_FILE(%rip), %r12
	leaq	.LC10(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%r12, %rdi
	leaq	__dso_handle(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	7(%rsp), %rbx
	movq	%rbx, %rdx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi
	movq	%rbp, %rdx
	movq	%r12, %rsi
	call	__cxa_atexit@PLT
	movq	%rbx, %rdx
	leaq	_ZL8REZ_FILE(%rip), %rbx
	leaq	.LC11(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	movq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GOTPCREL(%rip), %rdi
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	__cxa_atexit@PLT
	.cfi_endproc
.LFE5127:
	.size	_GLOBAL__sub_I_main, .-_GLOBAL__sub_I_main
	.section	.init_array
	.align 8
	.quad	_GLOBAL__sub_I_main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8REZ_FILE
	.comm	_ZL8REZ_FILE,32,32
	.local	_ZL9DATA_FILE
	.comm	_ZL9DATA_FILE,32,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	-1074790400
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.hidden	__dso_handle
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"

#include <cstdio>
#include <iostream>
#include <iomanip>
#include <fstream>
#include <vector>


using namespace std;

const int MAX_STRING_LENGTH = 256;
const int THREADS = 3;

const string DATA_FILE = "/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_dat_1.txt"; // 1, 2, 3
const string REZ_FILE = "/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_rez.txt"; // 1, 2, 3

struct BenchmarkGPU {
    char Name[MAX_STRING_LENGTH];
    int MSRP = -1;
    double Score = -1;
};

void readGPUFile(BenchmarkGPU *data);

__global__ void sum_on_gpu(BenchmarkGPU* gpus, int* count, int* n, int* chunk_size, char* results);
__device__ void gpu_memset(char* dest, int add);
__device__ int gpu_strcat(char* dest, char* src, int offset, bool nLine);

int main() {
    // Host
    int n = 25;
    BenchmarkGPU data[n];
    readGPUFile(data);
    char sresults[n * MAX_STRING_LENGTH];
    int chunk_size = n / THREADS;
    int count = 0;

    // GPU
    BenchmarkGPU* d_all_gpus;
    int* d_count;
    int* d_n;
    int* d_chunk_size;
    char* d_sresults;

    // Memory allocation for GPU
    hipMalloc((void**)&d_all_gpus, n * sizeof(BenchmarkGPU));
    hipMalloc((void**)&d_sresults, n * sizeof(char) * MAX_STRING_LENGTH);
    hipMalloc((void**)&d_count, sizeof(int));
    hipMalloc((void**)&d_n, sizeof(int));
    hipMalloc((void**)&d_chunk_size, sizeof(int));

    // Copies memory from CPU to GPU
    hipMemcpy(d_all_gpus, data, n * sizeof(BenchmarkGPU), hipMemcpyHostToDevice);
    hipMemcpy(d_count, &count, sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_n, &n, sizeof(int), hipMemcpyHostToDevice);
    hipMemcpy(d_chunk_size, &chunk_size, sizeof(int), hipMemcpyHostToDevice);

    sum_on_gpu<<<1,THREADS>>>(d_all_gpus, d_count, d_n, d_chunk_size, d_sresults);
    hipDeviceSynchronize();

    // Copies memory from GPU to CPU
    hipMemcpy(&sresults, d_sresults, n * MAX_STRING_LENGTH * sizeof(char), hipMemcpyDeviceToHost);
    hipMemcpy(&count, d_count, 1, hipMemcpyDeviceToHost);
    // Free memory
    hipFree(d_all_gpus);
    hipFree(d_count);
    hipFree(d_n);
    hipFree(d_chunk_size);
    hipFree(d_sresults);

    cout << "Printing" << endl;
    ofstream file;
    file.open(REZ_FILE);
    file << "Resultatai" << endl;
    file << "" << endl;
    if(count == 0)
        file << "Neivienas objektas nepraejo filtro" << endl;
    else
        file << sresults << endl;

    cout << "Finished" << endl;
    return 0;
}
/**
 * GPU
 * Sums gpus list chunk data properties
 * @param gpus BenchmarkGPUs list
 * @param count BenchmarkGPUs list size
 * @param chunk_size Summed items per thread
 * @param results Summed chunk results
 */
__global__ void sum_on_gpu(BenchmarkGPU* gpus, int* count, int* n, int* chunk_size, char* results) {
    int start_index = threadIdx.x * *chunk_size;
    int end_index = start_index + 1 * *chunk_size;
    if (threadIdx.x == blockDim.x -1)
        end_index = *n;
    printf("Thread: %d Start Index: %d End Index: %d\n", threadIdx.x, start_index, end_index);
    for (int i = start_index; i < end_index; ++i) {
        double my_number = gpus[i].MSRP / gpus[i].Score;
        char tmp_res[256];
        gpu_memset(tmp_res, 0);

        tmp_res[0] = 'F';
        tmp_res[1] = '-';
        if(my_number < 70)
            tmp_res[0] = 'E';
        if(my_number < 60)
            tmp_res[0] = 'D';
        if(my_number < 50)
            tmp_res[0] = 'C';
        if(my_number < 40)
            tmp_res[0] = 'B';
        if(my_number < 30)
            tmp_res[0] = 'A';

        int cou = 2;
        cou += gpu_strcat(tmp_res, gpus[i].Name, 2, true);

        if(tmp_res[0] < 'E')
        {
            int index = atomicAdd(count, cou);
            gpu_strcat(results, tmp_res,index, false);
//            printf("Thread: %d Index: %d Result: %s ", threadIdx.x, cou, tmp.result);
        }

    }
}

__device__ int gpu_strcat(char* dest, char* src, int offset, bool nLine) {
    int i = 0;
    do {
        if(src[i] == 0 )
        {
            if(nLine)
            {
                dest[offset + i] = '\n';
                return i+1;
            }
            return i;
        }
        else
        dest[offset + i] = src[i];
        i++;}
    while (i != MAX_STRING_LENGTH);
}

__device__ void gpu_memset(char* dest, int add) {
    for (int i = 0; i < MAX_STRING_LENGTH + add; ++i) {
        dest[i] = 0;
    }
}

void readGPUFile(BenchmarkGPU *data)
{
    string line;
    ifstream myfile;
    myfile.open(DATA_FILE);
    if(!myfile.is_open()) {
        perror("Error open");
        exit(EXIT_FAILURE);
    }

    int ch = 0;
    int count = 0;
    while(getline(myfile, line)) {
        string::size_type pos;
        pos=line.find(' ',0);
        line = line.substr(pos+1);
        switch (ch) {
            case 0:
                strcpy(data[count].Name, line.c_str());
                break;
            case 1:
                data[count].MSRP =  stoi(line);
                break;
            case 2:
                data[count].Score =  stoi(line);
                count++;
                ch = -1;
                break;
        }
        ch++;
    }
}


	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$7384, %rsp                     # imm = 0x1CD8
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsp, -104(%rbp)                # 8-byte Spill
	movl	$25, -48(%rbp)
	movl	$264, %eax                      # imm = 0x108
	movabsq	$-4616189618054758400, %rcx     # imm = 0xBFF0000000000000
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	$-1, -7432(%rbp,%rax)
	movq	%rcx, -7424(%rbp,%rax)
	addq	$272, %rax                      # imm = 0x110
	cmpq	$7064, %rax                     # imm = 0x1B98
	jne	.LBB0_1
# %bb.2:
	leaq	-7424(%rbp), %rdi
	callq	_Z11readGPUFileP12BenchmarkGPU
	movq	%rsp, %rbx
	addq	$-6400, %rbx                    # imm = 0xE700
	movq	%rbx, %rsp
	leaq	-68(%rbp), %rax
	movl	$8, (%rax)
	leaq	-44(%rbp), %rax
	movl	$0, (%rax)
	leaq	-96(%rbp), %r14
	movl	$6800, %esi                     # imm = 0x1A90
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	-56(%rbp), %rdi
	movl	$6400, %esi                     # imm = 0x1900
	callq	hipMalloc
	leaq	-64(%rbp), %r12
	movl	$4, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	-88(%rbp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	-80(%rbp), %r13
	movl	$4, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$6800, %edx                     # imm = 0x1A90
	leaq	-7424(%rbp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$4, %edx
	leaq	-44(%rbp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	-48(%rbp), %rsi
	movl	$4, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$4, %edx
	leaq	-68(%rbp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	2(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.3:
	movq	-96(%rbp), %rdi
	movq	-64(%rbp), %rsi
	movq	-88(%rbp), %rdx
	movq	-80(%rbp), %rcx
	movq	-56(%rbp), %r8
	callq	_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
.LBB0_4:
	callq	hipDeviceSynchronize
	movq	-56(%rbp), %rsi
	movslq	-48(%rbp), %rdx
	shlq	$8, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-64(%rbp), %rsi
	leaq	-44(%rbp), %rdi
	movl	$1, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	-96(%rbp), %rdi
	callq	hipFree
	movq	-64(%rbp), %rdi
	callq	hipFree
	movq	-88(%rbp), %rdi
	callq	hipFree
	movq	-80(%rbp), %rdi
	callq	hipFree
	movq	-56(%rbp), %rdi
	callq	hipFree
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	-616(%rbp), %r14
	movq	%r14, %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movl	$_ZL8REZ_FILEB5cxx11, %esi
	movq	%r14, %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode
.Ltmp1:
# %bb.5:
.Ltmp2:
	movl	$.L.str.4, %esi
	movl	$10, %edx
	movq	%r14, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
# %bb.6:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	-616(%rbp), %rax
	addq	-24(%rax), %r14
.Ltmp4:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp5:
# %bb.7:                                # %.noexc
.Ltmp6:
	movsbl	%al, %esi
	leaq	-616(%rbp), %rdi
	callq	_ZNSo3putEc
.Ltmp7:
# %bb.8:                                # %.noexc14
.Ltmp8:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp9:
# %bb.9:                                # %_ZNSolsEPFRSoS_E.exit
.Ltmp10:
	leaq	-616(%rbp), %r14
	movl	$.L.str.5, %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp11:
# %bb.10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit6
	movq	-616(%rbp), %rax
	addq	-24(%rax), %r14
.Ltmp12:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp13:
# %bb.11:                               # %.noexc16
.Ltmp14:
	movsbl	%al, %esi
	leaq	-616(%rbp), %rdi
	callq	_ZNSo3putEc
.Ltmp15:
# %bb.12:                               # %.noexc17
.Ltmp16:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp17:
# %bb.13:                               # %_ZNSolsEPFRSoS_E.exit7
	cmpl	$0, -44(%rbp)
	je	.LBB0_14
# %bb.16:
	movq	%rbx, %rdi
	callq	strlen
	movq	%rax, %rdx
	jmp	.LBB0_17
.LBB0_14:
	movl	$34, %edx
	movl	$.L.str.6, %ebx
.LBB0_17:                               # %.invoke
.Ltmp18:
	leaq	-616(%rbp), %r14
	movq	%r14, %rdi
	movq	%rbx, %rsi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp19:
# %bb.18:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit10.invoke
	movq	-616(%rbp), %rax
	addq	-24(%rax), %r14
.Ltmp20:
	movq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp21:
# %bb.19:                               # %.noexc24.invoke
.Ltmp22:
	movsbl	%al, %esi
	leaq	-616(%rbp), %rdi
	callq	_ZNSo3putEc
.Ltmp23:
# %bb.20:                               # %.noexc25.invoke
.Ltmp24:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp25:
# %bb.21:                               # %_ZNSolsEPFRSoS_E.exit9
.Ltmp26:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$8, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp27:
# %bb.22:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit12
	movq	_ZSt4cout(%rip), %rax
	addq	-24(%rax), %rbx
.Ltmp28:
	movq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp29:
# %bb.23:                               # %.noexc28
.Ltmp30:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp31:
# %bb.24:                               # %.noexc29
.Ltmp32:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp33:
# %bb.25:                               # %_ZNSolsEPFRSoS_E.exit13
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	-608(%rbp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, -616(%rbp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	-368(%rbp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	movq	-104(%rbp), %rsp                # 8-byte Reload
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB0_15:
	.cfi_def_cfa %rbp, 16
.Ltmp34:
	movq	%rax, %rbx
	leaq	-616(%rbp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp33-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin0          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Lfunc_end0-.Ltmp33            #   Call between .Ltmp33 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z11readGPUFileP12BenchmarkGPU  # -- Begin function _Z11readGPUFileP12BenchmarkGPU
	.type	_Z11readGPUFileP12BenchmarkGPU,@function
_Z11readGPUFileP12BenchmarkGPU:         # @_Z11readGPUFileP12BenchmarkGPU
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$632, %rsp                      # imm = 0x278
	.cfi_def_cfa_offset 688
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	leaq	24(%rsp), %r14
	movq	%r14, -16(%r14)
	movq	$0, -8(%r14)
	movb	$0, (%r14)
.Ltmp35:
	leaq	112(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp36:
# %bb.1:
.Ltmp38:
	leaq	112(%rsp), %r14
	movl	$_ZL9DATA_FILEB5cxx11, %esi
	movq	%r14, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode
.Ltmp39:
# %bb.2:
	leaq	232(%rsp), %rdi
	callq	_ZNKSt12__basic_fileIcE7is_openEv
	testb	%al, %al
	je	.LBB1_15
# %bb.3:                                # %.preheader
	xorl	%eax, %eax
	leaq	96(%rsp), %r13
	leaq	8(%rsp), %r15
	leaq	80(%rsp), %r12
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
.LBB1_4:                                # %.outer
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_5 Depth 2
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movl	%eax, %eax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	imulq	$272, %rax, %rax                # imm = 0x110
	leaq	(%rbx,%rax), %rcx
	addq	$256, %rcx                      # imm = 0x100
	movq	%rcx, 64(%rsp)                  # 8-byte Spill
	addq	%rbx, %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	xorl	%ebx, %ebx
.LBB1_5:                                #   Parent Loop BB1_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	112(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp41:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp42:
# %bb.6:                                # %.noexc
                                        #   in Loop: Header=BB1_5 Depth=2
.Ltmp43:
	movsbl	%al, %edx
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp44:
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=2
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB1_42
# %bb.8:                                #   in Loop: Header=BB1_5 Depth=2
	movq	%r15, %rdi
	movl	$32, %esi
	xorl	%edx, %edx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm
	leaq	1(%rax), %rdx
.Ltmp46:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	$-1, %rcx
	callq	_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm
.Ltmp47:
# %bb.9:                                #   in Loop: Header=BB1_5 Depth=2
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_
	movq	80(%rsp), %rdi
	cmpq	%r13, %rdi
	je	.LBB1_11
# %bb.10:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
                                        #   in Loop: Header=BB1_5 Depth=2
	callq	_ZdlPv
.LBB1_11:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
                                        #   in Loop: Header=BB1_5 Depth=2
	testl	%ebx, %ebx
	je	.LBB1_19
# %bb.12:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
                                        #   in Loop: Header=BB1_5 Depth=2
	movq	%r14, %r15
	movq	%r13, %r14
	cmpl	$1, %ebx
	jne	.LBB1_30
# %bb.13:                               #   in Loop: Header=BB1_5 Depth=2
	movq	8(%rsp), %rbx
	callq	__errno_location
	movq	%rax, %rbp
	movl	(%rax), %r13d
	movl	$0, (%rax)
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%rbx, 80(%rsp)
	je	.LBB1_14
# %bb.23:                               #   in Loop: Header=BB1_5 Depth=2
	leaq	-2147483648(%rax), %rcx
	movabsq	$-4294967296, %rdx              # imm = 0xFFFFFFFF00000000
	cmpq	%rdx, %rcx
	jb	.LBB1_25
# %bb.24:                               #   in Loop: Header=BB1_5 Depth=2
	movl	(%rbp), %ecx
	cmpl	$34, %ecx
	je	.LBB1_25
# %bb.27:                               #   in Loop: Header=BB1_5 Depth=2
	testl	%ecx, %ecx
	jne	.LBB1_29
# %bb.28:                               #   in Loop: Header=BB1_5 Depth=2
	movl	%r13d, (%rbp)
.LBB1_29:                               #   in Loop: Header=BB1_5 Depth=2
	movq	64(%rsp), %rcx                  # 8-byte Reload
	movl	%eax, (%rcx)
	movl	$2, %ebx
	movq	%r14, %r13
	movq	%r15, %r14
	leaq	8(%rsp), %r15
	jmp	.LBB1_5
.LBB1_19:                               #   in Loop: Header=BB1_5 Depth=2
	movq	8(%rsp), %rsi
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	strcpy
	movl	$1, %ebx
	jmp	.LBB1_5
.LBB1_30:                               #   in Loop: Header=BB1_4 Depth=1
	movq	8(%rsp), %rbx
	callq	__errno_location
	movq	%rax, %r13
	movl	(%rax), %ebp
	movl	$0, (%rax)
	movq	%rbx, %rdi
	movq	%r12, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%rbx, 80(%rsp)
	je	.LBB1_31
# %bb.35:                               #   in Loop: Header=BB1_4 Depth=1
	leaq	-2147483648(%rax), %rcx
	movabsq	$-4294967296, %rdx              # imm = 0xFFFFFFFF00000000
	cmpq	%rdx, %rcx
	movq	40(%rsp), %rbx                  # 8-byte Reload
	jb	.LBB1_37
# %bb.36:                               #   in Loop: Header=BB1_4 Depth=1
	movl	(%r13), %ecx
	cmpl	$34, %ecx
	je	.LBB1_37
# %bb.39:                               #   in Loop: Header=BB1_4 Depth=1
	testl	%ecx, %ecx
	jne	.LBB1_41
# %bb.40:                               #   in Loop: Header=BB1_4 Depth=1
	movl	%ebp, (%r13)
.LBB1_41:                               #   in Loop: Header=BB1_4 Depth=1
	cvtsi2sd	%eax, %xmm0
	imulq	$272, 48(%rsp), %rax            # 8-byte Folded Reload
                                        # imm = 0x110
	movsd	%xmm0, 264(%rbx,%rax)
	movq	56(%rsp), %rax                  # 8-byte Reload
	incl	%eax
	movq	%r14, %r13
	movq	%r15, %r14
	leaq	8(%rsp), %r15
	jmp	.LBB1_4
.LBB1_42:
	leaq	112(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	8(%rsp), %rdi
	leaq	24(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB1_44
# %bb.43:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i30
	callq	_ZdlPv
.LBB1_44:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit32
	addq	$632, %rsp                      # imm = 0x278
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_14:
	.cfi_def_cfa_offset 688
.Ltmp56:
	movl	$.L.str.9, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp57:
# %bb.20:
.LBB1_25:                               # %.critedge.i.i
.Ltmp54:
	movl	$.L.str.9, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp55:
# %bb.26:
.LBB1_15:
	movl	$.L.str.8, %edi
	callq	perror
	movl	$1, %edi
	callq	exit
.LBB1_37:                               # %.critedge.i.i25
.Ltmp49:
	movl	$.L.str.9, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp50:
# %bb.38:
.LBB1_31:
.Ltmp51:
	movl	$.L.str.9, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp52:
# %bb.32:
.LBB1_33:
.Ltmp53:
	movq	%rax, %rbx
	cmpl	$0, (%r13)
	jne	.LBB1_47
# %bb.34:
	movl	%ebp, (%r13)
	jmp	.LBB1_47
.LBB1_45:
.Ltmp40:
	jmp	.LBB1_46
.LBB1_16:
.Ltmp37:
	movq	%rax, %rbx
	jmp	.LBB1_48
.LBB1_21:
.Ltmp58:
	movq	%rax, %rbx
	cmpl	$0, (%rbp)
	jne	.LBB1_47
# %bb.22:
	movl	%r13d, (%rbp)
	jmp	.LBB1_47
.LBB1_18:
.Ltmp48:
	jmp	.LBB1_46
.LBB1_17:
.Ltmp45:
.LBB1_46:                               # %.body
	movq	%rax, %rbx
.LBB1_47:                               # %.body
	leaq	112(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	leaq	24(%rsp), %r14
.LBB1_48:
	movq	8(%rsp), %rdi
	cmpq	%r14, %rdi
	je	.LBB1_50
# %bb.49:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i33
	callq	_ZdlPv
.LBB1_50:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit35
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end1:
	.size	_Z11readGPUFileP12BenchmarkGPU, .Lfunc_end1-_Z11readGPUFileP12BenchmarkGPU
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table1:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp35-.Lfunc_begin1          # >> Call Site 1 <<
	.uleb128 .Ltmp36-.Ltmp35                #   Call between .Ltmp35 and .Ltmp36
	.uleb128 .Ltmp37-.Lfunc_begin1          #     jumps to .Ltmp37
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp39-.Ltmp38                #   Call between .Ltmp38 and .Ltmp39
	.uleb128 .Ltmp40-.Lfunc_begin1          #     jumps to .Ltmp40
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp41-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp44-.Ltmp41                #   Call between .Ltmp41 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin1          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp47-.Ltmp46                #   Call between .Ltmp46 and .Ltmp47
	.uleb128 .Ltmp48-.Lfunc_begin1          #     jumps to .Ltmp48
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp55-.Ltmp56                #   Call between .Ltmp56 and .Ltmp55
	.uleb128 .Ltmp58-.Lfunc_begin1          #     jumps to .Ltmp58
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp49-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp52-.Ltmp49                #   Call between .Ltmp49 and .Ltmp52
	.uleb128 .Ltmp53-.Lfunc_begin1          #     jumps to .Ltmp53
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp52-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Lfunc_end1-.Ltmp52            #   Call between .Ltmp52 and .Lfunc_end1
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc # -- Begin function _Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.type	_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc,@function
_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc: # @_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, .Lfunc_end2-_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.cfi_endproc
                                        # -- End function
	.section	.text.startup,"ax",@progbits
	.type	_GLOBAL__sub_I_main.hip,@function # -- Begin function _GLOBAL__sub_I_main.hip
_GLOBAL__sub_I_main.hip:                # @_GLOBAL__sub_I_main.hip
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	$_ZL9DATA_FILEB5cxx11+16, _ZL9DATA_FILEB5cxx11(%rip)
	movq	%rsp, %rbx
	movq	$96, (%rbx)
	xorl	%r15d, %r15d
	movl	$_ZL9DATA_FILEB5cxx11, %edi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, %r14
	movq	%rax, _ZL9DATA_FILEB5cxx11(%rip)
	movq	(%rbx), %r12
	movq	%r12, _ZL9DATA_FILEB5cxx11+16(%rip)
	movl	$.L.str, %esi
	movl	$96, %edx
	movq	%rax, %rdi
	callq	memcpy@PLT
	movq	%r12, _ZL9DATA_FILEB5cxx11+8(%rip)
	movb	%r15b, (%r14,%r12)
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi
	movl	$_ZL9DATA_FILEB5cxx11, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	movq	$_ZL8REZ_FILEB5cxx11+16, _ZL8REZ_FILEB5cxx11(%rip)
	movq	$94, (%rbx)
	movq	%rsp, %rbx
	movl	$_ZL8REZ_FILEB5cxx11, %edi
	movq	%rbx, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, %r14
	movq	%rax, _ZL8REZ_FILEB5cxx11(%rip)
	movq	(%rbx), %rbx
	movq	%rbx, _ZL8REZ_FILEB5cxx11+16(%rip)
	movl	$.L.str.2, %esi
	movl	$94, %edx
	movq	%rax, %rdi
	callq	memcpy@PLT
	movq	%rbx, _ZL8REZ_FILEB5cxx11+8(%rip)
	movb	%r15b, (%r14,%rbx)
	movl	$_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev, %edi
	movl	$_ZL8REZ_FILEB5cxx11, %esi
	movl	$__dso_handle, %edx
	callq	__cxa_atexit
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_GLOBAL__sub_I_main.hip, .Lfunc_end3-_GLOBAL__sub_I_main.hip
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZL9DATA_FILEB5cxx11,@object    # @_ZL9DATA_FILEB5cxx11
	.local	_ZL9DATA_FILEB5cxx11
	.comm	_ZL9DATA_FILEB5cxx11,32,8
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_dat_1.txt"
	.size	.L.str, 97

	.hidden	__dso_handle
	.type	_ZL8REZ_FILEB5cxx11,@object     # @_ZL8REZ_FILEB5cxx11
	.local	_ZL8REZ_FILEB5cxx11
	.comm	_ZL8REZ_FILEB5cxx11,32,8
	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/lukasz/Documents/GitHub/Lygretus_Programavimas/lab3_cuda/IFF-8-8_ZumarasLukas_L1_rez.txt"
	.size	.L.str.2, 95

	.type	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc,@object # @_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.section	.rodata,"a",@progbits
	.globl	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.p2align	3, 0x0
_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc:
	.quad	_Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.size	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Printing"
	.size	.L.str.3, 9

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Resultatai"
	.size	.L.str.4, 11

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.zero	1
	.size	.L.str.5, 1

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Neivienas objektas nepraejo filtro"
	.size	.L.str.6, 35

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Finished"
	.size	.L.str.7, 9

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Error open"
	.size	.L.str.8, 11

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"stoi"
	.size	.L.str.9, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	_GLOBAL__sub_I_main.hip
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z25__device_stub__sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.addrsig_sym _GLOBAL__sub_I_main.hip
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _ZL9DATA_FILEB5cxx11
	.addrsig_sym __dso_handle
	.addrsig_sym _ZL8REZ_FILEB5cxx11
	.addrsig_sym _Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc ; -- Begin function _Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.globl	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
	.p2align	8
	.type	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc,@function
_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc: ; @_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[10:11], 0x0
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x34
	s_load_b64 s[10:11], s[0:1], 0x20
	s_add_u32 s0, s0, 40
	s_addc_u32 s1, s1, 0
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v2, s2, v0
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s3, s3, -1
	v_add_nc_u32_e32 v5, s2, v2
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e64 s3, v0
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b32 s3, s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v5, s3
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[2:3], s[0:1], 0x50
	v_mbcnt_lo_u32_b32 v34, -1, 0
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v10, v34
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v10
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_8
; %bb.3:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v1, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v1, s[2:3] offset:40
	global_load_b64 v[6:7], v1, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v9
	v_and_b32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v11, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v11, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo
	global_load_b64 v[6:7], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v1, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[3:4], v[8:9]
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s9, 0
.LBB0_5:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v1, s[2:3] offset:40
	global_load_b64 v[11:12], v1, s[2:3]
	v_dual_mov_b32 v9, v4 :: v_dual_mov_b32 v8, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v6, 24, v[11:12]
	v_and_b32_e32 v11, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v11, 24, v[4:5]
	v_mov_b32_e32 v4, v6
	global_load_b64 v[6:7], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v1, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[8:9]
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow500
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_7:                                ; %Flow502
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_8:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v11, 0
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_mov_b32 s16, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[12:13], v11, s[2:3] offset:40
	global_load_b128 v[6:9], v11, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v12
	v_readfirstlane_b32 s13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[8:9], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v13, v11
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, s15
	v_add_co_ci_u32_e32 v4, vcc_lo, s16, v7, vcc_lo
	v_dual_mov_b32 v14, 2 :: v_dual_mov_b32 v15, 1
	global_store_b128 v[3:4], v[12:15], off offset:8
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s17
	s_lshl_b64 s[12:13], s[12:13], 12
	v_lshlrev_b64 v[3:4], 6, v[10:11]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v8, s12
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v1, v3
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	v_dual_mov_b32 v10, 33 :: v_dual_mov_b32 v13, v11
	v_mov_b32_e32 v12, v11
	v_dual_mov_b32 v14, s16 :: v_dual_mov_b32 v17, s19
	v_dual_mov_b32 v15, s17 :: v_dual_mov_b32 v16, s18
	s_clause 0x3
	global_store_b128 v[3:4], v[10:13], off
	global_store_b128 v[3:4], v[14:17], off offset:16
	global_store_b128 v[3:4], v[14:17], off offset:32
	global_store_b128 v[3:4], v[14:17], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_17
; %bb.11:
	v_mov_b32_e32 v1, 0
	v_mov_b32_e32 v15, s9
	s_mov_b32 s13, exec_lo
	s_clause 0x1
	global_load_b64 v[16:17], v1, s[2:3] offset:32 glc
	global_load_b64 v[8:9], v1, s[2:3] offset:40
	v_mov_b32_e32 v14, s8
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v8, s8, v8
	v_and_b32_e32 v9, s9, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v8, 24
	v_mul_lo_u32 v9, v9, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v10, v9
	v_add_co_u32 v12, vcc_lo, v6, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, v7, v9, vcc_lo
	global_store_b64 v[12:13], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v1, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[16:17]
	s_cbranch_execz .LBB0_13
.LBB0_12:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
	s_sleep 1
	global_store_b64 v[12:13], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v1, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_12
.LBB0_13:                               ; %Flow498
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v11, 0
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v1, s16, 0
	global_load_b64 v[8:9], v11, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_15
; %bb.14:
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v10, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[8:9], v[10:11], off offset:8
.LBB0_15:
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[10:11], v[8:9], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_cbranch_vccnz .LBB0_17
; %bb.16:
	global_load_b32 v8, v[8:9], off offset:24
	v_mov_b32_e32 v9, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v8
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[10:11], v[8:9], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_17:                               ; %Flow499
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v1, vcc_lo, v6, s15
	v_add_co_ci_u32_e32 v7, vcc_lo, s14, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v1, 20
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
.LBB0_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_20
; %bb.19:                               ;   in Loop: Header=BB0_18 Depth=1
	global_load_b32 v1, v[6:7], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v1, 1, v1
.LBB0_20:                               ;   in Loop: Header=BB0_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v1
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_18 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_23
.LBB0_22:                               ;   in Loop: Header=BB0_18 Depth=1
	s_mov_b32 s1, -1
.LBB0_23:                               ; %Flow493
                                        ;   in Loop: Header=BB0_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_18
; %bb.24:
	global_load_b64 v[6:7], v[3:4], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_28
; %bb.25:
	v_mov_b32_e32 v1, 0
	s_clause 0x2
	global_load_b64 v[3:4], v1, s[2:3] offset:40
	global_load_b64 v[12:13], v1, s[2:3] offset:24 glc
	global_load_b64 v[10:11], v1, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v14, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v14, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9]
	v_cndmask_b32_e32 v8, v8, v14, vcc_lo
	v_and_b32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v14, v3, 24
	v_cndmask_b32_e32 v9, v9, v15, vcc_lo
	v_mul_lo_u32 v3, v3, 24
	v_and_b32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v10, v3
	v_mul_lo_u32 v4, v4, 24
	v_mov_b32_e32 v10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v14, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, v11, v4, vcc_lo
	v_mov_b32_e32 v11, v13
	global_store_b64 v[3:4], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v1, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[10:11], v[12:13]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_28
; %bb.26:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_27:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[3:4], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v1, v[8:11], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[12:13], v[10:11]
	v_dual_mov_b32 v10, v12 :: v_dual_mov_b32 v11, v13
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_27
.LBB0_28:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, .str@rel32@lo+4
	s_addc_u32 s9, s9, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u64 s[8:9], 0
	s_cbranch_scc0 .LBB0_114
; %bb.29:
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v1, 2, v6
	v_dual_mov_b32 v9, v7 :: v_dual_and_b32 v8, -3, v6
	v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1
	s_mov_b64 s[12:13], 42
.LBB0_30:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_33 Depth 2
                                        ;     Child Loop BB0_40 Depth 2
                                        ;     Child Loop BB0_48 Depth 2
                                        ;     Child Loop BB0_56 Depth 2
                                        ;     Child Loop BB0_64 Depth 2
                                        ;     Child Loop BB0_72 Depth 2
                                        ;     Child Loop BB0_80 Depth 2
                                        ;     Child Loop BB0_88 Depth 2
                                        ;     Child Loop BB0_96 Depth 2
                                        ;     Child Loop BB0_102 Depth 2
                                        ;     Child Loop BB0_111 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_u64_e64 s0, s[12:13], 56
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $sgpr21
	s_and_b32 s0, s0, exec_lo
	s_cselect_b32 s14, s12, 56
	s_cselect_b32 s15, s13, 0
	s_cmp_gt_u32 s14, 7
	s_mov_b32 s0, -1
	s_cbranch_scc1 .LBB0_35
; %bb.31:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_cmp_eq_u32 s14, 0
	s_cbranch_scc1 .LBB0_34
; %bb.32:                               ; %.preheader31.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_lshl_b64 s[0:1], s[14:15], 3
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], s[8:9]
.LBB0_33:                               ; %.preheader31.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v3, v4, s[18:19]
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_add_u32 s18, s18, 1
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s0, s16
	v_or_b32_e32 v16, v10, v16
	v_or_b32_e32 v17, v11, v17
	s_cbranch_scc1 .LBB0_33
.LBB0_34:                               ; %Flow469
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s0, 0
	s_mov_b32 s21, 0
.LBB0_35:                               ; %Flow471
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[0:1], s[8:9]
	s_cbranch_vccnz .LBB0_37
; %bb.36:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[16:17], v4, s[8:9]
	s_add_i32 s21, s14, -8
	s_add_u32 s0, s8, 8
	s_addc_u32 s1, s9, 0
.LBB0_37:                               ; %.loopexit32.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_cmp_gt_u32 s21, 7
	s_cbranch_scc1 .LBB0_42
; %bb.38:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_cmp_eq_u32 s21, 0
	s_cbranch_scc1 .LBB0_41
; %bb.39:                               ; %.preheader29.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], 0
.LBB0_40:                               ; %.preheader29.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s0, s18
	s_addc_u32 s23, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v3, v4, s[22:23]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s21, s18
	v_or_b32_e32 v18, v10, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v11, v19
	s_cbranch_scc1 .LBB0_40
.LBB0_41:                               ; %Flow464
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, 0
	s_mov_b32 s20, 0
	s_branch .LBB0_43
.LBB0_42:                               ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr18_vgpr19
                                        ; implicit-def: $sgpr20
.LBB0_43:                               ; %Flow466
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_45
; %bb.44:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[18:19], v4, s[0:1]
	s_add_i32 s20, s21, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_45:                               ; %.loopexit30.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_cmp_gt_u32 s20, 7
	s_cbranch_scc1 .LBB0_50
; %bb.46:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_cmp_eq_u32 s20, 0
	s_cbranch_scc1 .LBB0_49
; %bb.47:                               ; %.preheader27.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], 0
.LBB0_48:                               ; %.preheader27.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s0, s18
	s_addc_u32 s23, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v3, v4, s[22:23]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s20, s18
	v_or_b32_e32 v20, v10, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v11, v21
	s_cbranch_scc1 .LBB0_48
.LBB0_49:                               ; %Flow459
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, 0
	s_mov_b32 s21, 0
	s_branch .LBB0_51
.LBB0_50:                               ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr21
.LBB0_51:                               ; %Flow461
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_53
; %bb.52:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[20:21], v4, s[0:1]
	s_add_i32 s21, s20, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_53:                               ; %.loopexit28.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_cmp_gt_u32 s21, 7
	s_cbranch_scc1 .LBB0_58
; %bb.54:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_cmp_eq_u32 s21, 0
	s_cbranch_scc1 .LBB0_57
; %bb.55:                               ; %.preheader25.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], 0
.LBB0_56:                               ; %.preheader25.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s0, s18
	s_addc_u32 s23, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v3, v4, s[22:23]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s21, s18
	v_or_b32_e32 v22, v10, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v23, v11, v23
	s_cbranch_scc1 .LBB0_56
.LBB0_57:                               ; %Flow454
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, 0
	s_mov_b32 s20, 0
	s_branch .LBB0_59
.LBB0_58:                               ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr22_vgpr23
                                        ; implicit-def: $sgpr20
.LBB0_59:                               ; %Flow456
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_61
; %bb.60:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[22:23], v4, s[0:1]
	s_add_i32 s20, s21, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_61:                               ; %.loopexit26.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_cmp_gt_u32 s20, 7
	s_cbranch_scc1 .LBB0_66
; %bb.62:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v24, 0
	v_mov_b32_e32 v25, 0
	s_cmp_eq_u32 s20, 0
	s_cbranch_scc1 .LBB0_65
; %bb.63:                               ; %.preheader23.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], 0
.LBB0_64:                               ; %.preheader23.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s0, s18
	s_addc_u32 s23, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v3, v4, s[22:23]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s20, s18
	v_or_b32_e32 v24, v10, v24
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v25, v11, v25
	s_cbranch_scc1 .LBB0_64
.LBB0_65:                               ; %Flow449
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, 0
	s_mov_b32 s21, 0
	s_branch .LBB0_67
.LBB0_66:                               ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, -1
                                        ; implicit-def: $sgpr21
.LBB0_67:                               ; %Flow451
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_69
; %bb.68:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[24:25], v4, s[0:1]
	s_add_i32 s21, s20, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_69:                               ; %.loopexit24.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_cmp_gt_u32 s21, 7
	s_cbranch_scc1 .LBB0_74
; %bb.70:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v26, 0
	v_mov_b32_e32 v27, 0
	s_cmp_eq_u32 s21, 0
	s_cbranch_scc1 .LBB0_73
; %bb.71:                               ; %.preheader21.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], 0
.LBB0_72:                               ; %.preheader21.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s0, s18
	s_addc_u32 s23, s1, s19
	s_add_u32 s18, s18, 1
	global_load_u8 v3, v4, s[22:23]
	s_addc_u32 s19, s19, 0
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s21, s18
	v_or_b32_e32 v26, v10, v26
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v27, v11, v27
	s_cbranch_scc1 .LBB0_72
.LBB0_73:                               ; %Flow444
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, 0
	s_mov_b32 s20, 0
	s_branch .LBB0_75
.LBB0_74:                               ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, -1
                                        ; implicit-def: $vgpr26_vgpr27
                                        ; implicit-def: $sgpr20
.LBB0_75:                               ; %Flow446
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[26:27], v4, s[0:1]
	s_add_i32 s20, s21, -8
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_77:                               ; %.loopexit22.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_cmp_gt_u32 s20, 7
	s_cbranch_scc1 .LBB0_82
; %bb.78:                               ;   in Loop: Header=BB0_30 Depth=1
	v_mov_b32_e32 v28, 0
	v_mov_b32_e32 v29, 0
	s_cmp_eq_u32 s20, 0
	s_cbranch_scc1 .LBB0_81
; %bb.79:                               ; %.preheader.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b64 s[16:17], 0
	s_mov_b64 s[18:19], s[0:1]
.LBB0_80:                               ; %.preheader.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_u8 v3, v4, s[18:19]
	s_add_i32 s20, s20, -1
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, 0xffff, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], s16, v[3:4]
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_add_u32 s18, s18, 1
	s_addc_u32 s19, s19, 0
	s_cmp_lg_u32 s20, 0
	v_or_b32_e32 v28, v10, v28
	v_or_b32_e32 v29, v11, v29
	s_cbranch_scc1 .LBB0_80
.LBB0_81:                               ; %Flow439
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, 0
	s_branch .LBB0_83
.LBB0_82:                               ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s16, -1
.LBB0_83:                               ; %Flow441
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s16
	s_cbranch_vccnz .LBB0_85
; %bb.84:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[28:29], v4, s[0:1]
.LBB0_85:                               ; %.loopexit.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v3, v34 :: v_dual_mov_b32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v3
	v_mov_b32_e32 v11, 0
	v_cmp_eq_u32_e64 s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_91
; %bb.86:                               ;   in Loop: Header=BB0_30 Depth=1
	global_load_b64 v[32:33], v4, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[10:11], v4, s[2:3] offset:40
	global_load_b64 v[14:15], v4, s[2:3]
	s_mov_b32 s16, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v11, v11, v33
	v_and_b32_e32 v10, v10, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v11, v11, 24
	v_mul_hi_u32 v30, v10, 24
	v_mul_lo_u32 v10, v10, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, v30, v11
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v14, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, v15, v11, vcc_lo
	global_load_b64 v[30:31], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v4, v[30:33], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[10:11], v[32:33]
	s_cbranch_execz .LBB0_90
; %bb.87:                               ; %.preheader3.i.i19.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s17, 0
.LBB0_88:                               ; %.preheader3.i.i19.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[14:15], v4, s[2:3] offset:40
	global_load_b64 v[30:31], v4, s[2:3]
	v_dual_mov_b32 v33, v11 :: v_dual_mov_b32 v32, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, v14, v32
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[10:11], null, v14, 24, v[30:31]
	v_and_b32_e32 v30, v15, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, v30, 24, v[11:12]
	v_mov_b32_e32 v11, v14
	global_load_b64 v[30:31], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v4, v[30:33], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[32:33]
	s_or_b32 s17, vcc_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB0_88
; %bb.89:                               ; %Flow434
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
.LBB0_90:                               ; %Flow436
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_91:                               ; %.loopexit4.i.i14.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[14:15], v4, s[2:3] offset:40
	global_load_b128 v[30:33], v4, s[2:3]
	v_readfirstlane_b32 s16, v10
	v_readfirstlane_b32 s17, v11
	s_mov_b32 s22, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s18, v14
	v_readfirstlane_b32 s19, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[18:19], s[16:17], s[18:19]
	s_mul_i32 s1, s19, 24
	s_mul_hi_u32 s20, s18, 24
	s_mul_i32 s21, s18, 24
	s_and_saveexec_b32 s23, s0
	s_cbranch_execz .LBB0_93
; %bb.92:                               ;   in Loop: Header=BB0_30 Depth=1
	v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, v4
	s_add_i32 s22, s20, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v14, vcc_lo, v30, s21
	v_add_co_ci_u32_e32 v15, vcc_lo, s22, v31, vcc_lo
	global_store_b128 v[14:15], v[10:13], off offset:8
.LBB0_93:                               ;   in Loop: Header=BB0_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s23
	v_cmp_gt_u64_e64 vcc_lo, s[12:13], 56
	v_or_b32_e32 v10, 0, v9
	v_or_b32_e32 v11, v8, v1
	s_lshl_b64 s[18:19], s[18:19], 12
	s_lshl_b32 s22, s14, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_i32 s22, s22, 28
	v_dual_cndmask_b32 v15, v10, v9 :: v_dual_cndmask_b32 v10, v11, v8
	v_lshlrev_b64 v[8:9], 6, v[3:4]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v32, s18
	v_add_co_ci_u32_e32 v11, vcc_lo, s19, v33, vcc_lo
	s_and_b32 s22, s22, 0x1e0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v32, vcc_lo, v3, v8
	v_and_or_b32 v14, 0xffffff1f, v10, s22
	v_add_co_ci_u32_e32 v33, vcc_lo, v11, v9, vcc_lo
	s_clause 0x3
	global_store_b128 v[32:33], v[14:17], off
	global_store_b128 v[32:33], v[18:21], off offset:16
	global_store_b128 v[32:33], v[22:25], off offset:32
	global_store_b128 v[32:33], v[26:29], off offset:48
	s_and_saveexec_b32 s18, s0
	s_cbranch_execz .LBB0_101
; %bb.94:                               ;   in Loop: Header=BB0_30 Depth=1
	s_clause 0x1
	global_load_b64 v[18:19], v4, s[2:3] offset:32 glc
	global_load_b64 v[8:9], v4, s[2:3] offset:40
	v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s22, v8
	v_readfirstlane_b32 s23, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[22:23], s[22:23], s[16:17]
	s_mul_i32 s19, s23, 24
	s_mul_hi_u32 s23, s22, 24
	s_mul_i32 s22, s22, 24
	s_add_i32 s23, s23, s19
	v_add_co_u32 v14, vcc_lo, v30, s22
	v_add_co_ci_u32_e32 v15, vcc_lo, s23, v31, vcc_lo
	s_mov_b32 s19, exec_lo
	global_store_b64 v[14:15], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v4, v[16:19], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[18:19]
	s_cbranch_execz .LBB0_97
; %bb.95:                               ; %.preheader1.i.i17.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s22, 0
.LBB0_96:                               ; %.preheader1.i.i17.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v8, s16 :: v_dual_mov_b32 v9, s17
	s_sleep 1
	global_store_b64 v[14:15], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v4, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s22, vcc_lo, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s22
	s_cbranch_execnz .LBB0_96
.LBB0_97:                               ; %Flow432
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	global_load_b64 v[8:9], v4, s[2:3] offset:16
	s_mov_b32 s22, exec_lo
	s_mov_b32 s19, exec_lo
	v_mbcnt_lo_u32_b32 v3, s22, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_99
; %bb.98:                               ;   in Loop: Header=BB0_30 Depth=1
	s_bcnt1_i32_b32 s22, s22
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s22
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[8:9], v[3:4], off offset:8
.LBB0_99:                               ;   in Loop: Header=BB0_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	s_waitcnt vmcnt(0)
	global_load_b64 v[10:11], v[8:9], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	s_cbranch_vccnz .LBB0_101
; %bb.100:                              ;   in Loop: Header=BB0_30 Depth=1
	global_load_b32 v3, v[8:9], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s19, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[10:11], v[3:4], off
	s_and_b32 m0, s19, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_101:                              ; %Flow433
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_add_i32 s20, s20, s1
	v_add_co_u32 v3, vcc_lo, v30, s21
	v_add_co_ci_u32_e32 v9, vcc_lo, s20, v31, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v3, 20
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
.LBB0_102:                              ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_104
; %bb.103:                              ;   in Loop: Header=BB0_102 Depth=2
	global_load_b32 v3, v[8:9], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB0_104:                              ;   in Loop: Header=BB0_102 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_106
; %bb.105:                              ;   in Loop: Header=BB0_102 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_107
.LBB0_106:                              ;   in Loop: Header=BB0_102 Depth=2
	s_mov_b32 s1, -1
.LBB0_107:                              ; %Flow427
                                        ;   in Loop: Header=BB0_102 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_102
; %bb.108:                              ;   in Loop: Header=BB0_30 Depth=1
	global_load_b128 v[8:11], v[32:33], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_112
; %bb.109:                              ;   in Loop: Header=BB0_30 Depth=1
	s_clause 0x2
	global_load_b64 v[10:11], v4, s[2:3] offset:40
	global_load_b64 v[18:19], v4, s[2:3] offset:24 glc
	global_load_b64 v[16:17], v4, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v3, vcc_lo, v10, 1
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, v3, s16
	v_add_co_ci_u32_e32 v15, vcc_lo, s17, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]
	v_dual_cndmask_b32 v15, v15, v20 :: v_dual_cndmask_b32 v14, v14, v3
	v_and_b32_e32 v3, v15, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, v14, v10
	v_mul_hi_u32 v11, v10, 24
	v_mul_lo_u32 v10, v10, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, vcc_lo, v16, v10
	v_mov_b32_e32 v16, v18
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v11, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v11, vcc_lo, v17, v3, vcc_lo
	v_mov_b32_e32 v17, v19
	global_store_b64 v[10:11], v[18:19], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[16:17], v4, v[14:17], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[16:17], v[18:19]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_112
; %bb.110:                              ; %.preheader.i.i16.i.preheader
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_mov_b32 s0, 0
.LBB0_111:                              ; %.preheader.i.i16.i
                                        ;   Parent Loop BB0_30 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[10:11], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[18:19], v4, v[14:17], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[18:19], v[16:17]
	v_dual_mov_b32 v16, v18 :: v_dual_mov_b32 v17, v19
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_111
.LBB0_112:                              ; %__ockl_hostcall_preview.exit20.i
                                        ;   in Loop: Header=BB0_30 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_sub_u32 s12, s12, s14
	s_subb_u32 s13, s13, s15
	s_add_u32 s8, s8, s14
	s_addc_u32 s9, s9, s15
	s_cmp_lg_u64 s[12:13], 0
	s_cbranch_scc1 .LBB0_30
; %bb.113:                              ; %Flow472
	s_mov_b32 s0, 0
	s_branch .LBB0_115
.LBB0_114:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr8_vgpr9
.LBB0_115:                              ; %Flow487
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_144
; %bb.116:
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v8, v34 :: v_dual_mov_b32 v3, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v8
	v_mov_b32_e32 v4, 0
	v_cmp_eq_u32_e64 s0, s0, v8
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_122
; %bb.117:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s8, exec_lo
	global_load_b64 v[11:12], v1, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v1, s[2:3] offset:40
	global_load_b64 v[9:10], v1, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v12
	v_and_b32_e32 v3, v3, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v13, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v13, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v9, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo
	global_load_b64 v[9:10], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v1, v[9:12], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[3:4], v[11:12]
	s_cbranch_execz .LBB0_121
; %bb.118:                              ; %.preheader3.i.i.i39.preheader
	s_mov_b32 s9, 0
.LBB0_119:                              ; %.preheader3.i.i.i39
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[9:10], v1, s[2:3] offset:40
	global_load_b64 v[13:14], v1, s[2:3]
	v_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v9, v9, v11
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v9, 24, v[13:14]
	v_and_b32_e32 v13, v10, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v13, 24, v[4:5]
	v_mov_b32_e32 v4, v9
	global_load_b64 v[9:10], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v1, v[9:12], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[11:12]
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_119
; %bb.120:                              ; %Flow484
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_121:                              ; %Flow486
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_122:                              ; %.loopexit4.i.i.i34
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v9, 0
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_mov_b32 s16, exec_lo
	s_clause 0x1
	global_load_b64 v[14:15], v9, s[2:3] offset:40
	global_load_b128 v[10:13], v9, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v14
	v_readfirstlane_b32 s13, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[8:9], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_124
; %bb.123:
	v_dual_mov_b32 v14, s16 :: v_dual_mov_b32 v15, v9
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v10, s15
	v_add_co_ci_u32_e32 v4, vcc_lo, s16, v11, vcc_lo
	v_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1
	global_store_b128 v[3:4], v[14:17], off offset:8
.LBB0_124:
	s_or_b32 exec_lo, exec_lo, s17
	s_lshl_b64 s[12:13], s[12:13], 12
	v_lshlrev_b64 v[3:4], 6, v[8:9]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v12, s12
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v13, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v1, v3
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v6, 0xffffff1f, v6, 32
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	v_mov_b32_e32 v8, v9
	v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v15, s19
	v_dual_mov_b32 v13, s17 :: v_dual_mov_b32 v14, s18
	s_clause 0x3
	global_store_b128 v[3:4], v[6:9], off
	global_store_b128 v[3:4], v[12:15], off offset:16
	global_store_b128 v[3:4], v[12:15], off offset:32
	global_store_b128 v[3:4], v[12:15], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_132
; %bb.125:
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v14, s8
	v_mov_b32_e32 v15, s9
	s_clause 0x1
	global_load_b64 v[16:17], v1, s[2:3] offset:32 glc
	global_load_b64 v[6:7], v1, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v6
	v_readfirstlane_b32 s17, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[8:9]
	s_mul_i32 s13, s17, 24
	s_mul_hi_u32 s17, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s17, s17, s13
	v_add_co_u32 v12, vcc_lo, v10, s16
	v_add_co_ci_u32_e32 v13, vcc_lo, s17, v11, vcc_lo
	s_mov_b32 s13, exec_lo
	global_store_b64 v[12:13], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v1, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[16:17]
	s_cbranch_execz .LBB0_128
; %bb.126:                              ; %.preheader1.i.i.i37.preheader
	s_mov_b32 s16, 0
.LBB0_127:                              ; %.preheader1.i.i.i37
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	s_sleep 1
	global_store_b64 v[12:13], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v1, v[6:9], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_127
.LBB0_128:                              ; %Flow482
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v9, 0
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v1, s16, 0
	global_load_b64 v[6:7], v9, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v1
	s_cbranch_execz .LBB0_130
; %bb.129:
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v8, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[6:7], v[8:9], off offset:8
.LBB0_130:
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[8:9], v[6:7], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[8:9]
	s_cbranch_vccnz .LBB0_132
; %bb.131:
	global_load_b32 v6, v[6:7], off offset:24
	v_mov_b32_e32 v7, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v6
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[8:9], v[6:7], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_132:                              ; %Flow483
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v1, vcc_lo, v10, s15
	v_add_co_ci_u32_e32 v7, vcc_lo, s14, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v1, 20
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
.LBB0_133:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_135
; %bb.134:                              ;   in Loop: Header=BB0_133 Depth=1
	global_load_b32 v1, v[6:7], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v1, 1, v1
.LBB0_135:                              ;   in Loop: Header=BB0_133 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v1
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_137
; %bb.136:                              ;   in Loop: Header=BB0_133 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_138
.LBB0_137:                              ;   in Loop: Header=BB0_133 Depth=1
	s_mov_b32 s1, -1
.LBB0_138:                              ; %Flow477
                                        ;   in Loop: Header=BB0_133 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_133
; %bb.139:
	global_load_b128 v[8:11], v[3:4], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_143
; %bb.140:
	v_mov_b32_e32 v1, 0
	s_clause 0x2
	global_load_b64 v[3:4], v1, s[2:3] offset:40
	global_load_b64 v[6:7], v1, s[2:3] offset:24 glc
	global_load_b64 v[12:13], v1, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v14, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v14, s8
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[10:11]
	v_cndmask_b32_e32 v10, v10, v14, vcc_lo
	v_and_b32_e32 v3, v10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v14, v3, 24
	v_cndmask_b32_e32 v11, v11, v15, vcc_lo
	v_mul_lo_u32 v3, v3, 24
	v_and_b32_e32 v4, v11, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v12, v3
	v_mul_lo_u32 v4, v4, 24
	v_mov_b32_e32 v12, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v14, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, v13, v4, vcc_lo
	v_mov_b32_e32 v13, v7
	global_store_b64 v[3:4], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[12:13], v1, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[12:13], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_143
; %bb.141:                              ; %.preheader.i.i.i36.preheader
	s_mov_b32 s0, 0
.LBB0_142:                              ; %.preheader.i.i.i36
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[3:4], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v1, v[10:13], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[12:13]
	v_dual_mov_b32 v13, v7 :: v_dual_mov_b32 v12, v6
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_142
.LBB0_143:                              ; %__ockl_hostcall_preview.exit.i
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_144:                              ; %__ockl_printf_append_string_n.exit
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v10, v34 :: v_dual_mov_b32 v3, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v10
	v_mov_b32_e32 v4, 0
	v_cmp_eq_u32_e64 s0, s0, v10
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_150
; %bb.145:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s8, exec_lo
	global_load_b64 v[13:14], v1, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v1, s[2:3] offset:40
	global_load_b64 v[6:7], v1, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v4, v4, v14
	v_and_b32_e32 v3, v3, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v4, 24
	v_mul_hi_u32 v11, v3, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v11, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo
	global_load_b64 v[11:12], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v1, v[11:14], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[3:4], v[13:14]
	s_cbranch_execz .LBB0_149
; %bb.146:                              ; %.preheader3.i.i.i46.preheader
	s_mov_b32 s9, 0
.LBB0_147:                              ; %.preheader3.i.i.i46
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v1, s[2:3] offset:40
	global_load_b64 v[11:12], v1, s[2:3]
	v_dual_mov_b32 v14, v4 :: v_dual_mov_b32 v13, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, v6, v13
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v6, 24, v[11:12]
	v_and_b32_e32 v11, v7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v11, 24, v[4:5]
	v_mov_b32_e32 v4, v6
	global_load_b64 v[11:12], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[3:4], v1, v[11:14], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[13:14]
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_147
; %bb.148:                              ; %Flow420
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_149:                              ; %Flow422
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_150:                              ; %.loopexit4.i.i.i40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v11, 0
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_mov_b32 s16, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v11, s[2:3] offset:40
	global_load_b128 v[12:15], v11, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v6
	v_readfirstlane_b32 s13, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[8:9], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_152
; %bb.151:
	v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, v11
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v12, s15
	v_add_co_ci_u32_e32 v4, vcc_lo, s16, v13, vcc_lo
	v_dual_mov_b32 v18, 2 :: v_dual_mov_b32 v19, 1
	global_store_b128 v[3:4], v[16:19], off offset:8
.LBB0_152:
	s_or_b32 exec_lo, exec_lo, s17
	s_lshl_b64 s[12:13], s[12:13], 12
	v_lshlrev_b64 v[3:4], 6, v[10:11]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v14, s12
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v15, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v1, v3
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v8, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v4, vcc_lo, v6, v4, vcc_lo
	v_mov_b32_e32 v10, v0
	v_dual_mov_b32 v14, s16 :: v_dual_mov_b32 v17, s19
	v_dual_mov_b32 v15, s17 :: v_dual_mov_b32 v16, s18
	s_clause 0x3
	global_store_b128 v[3:4], v[8:11], off
	global_store_b128 v[3:4], v[14:17], off offset:16
	global_store_b128 v[3:4], v[14:17], off offset:32
	global_store_b128 v[3:4], v[14:17], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_160
; %bb.153:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v15, s9
	v_mov_b32_e32 v14, s8
	s_clause 0x1
	global_load_b64 v[16:17], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[8:9]
	s_mul_i32 s13, s17, 24
	s_mul_hi_u32 s17, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s17, s17, s13
	v_add_co_u32 v0, vcc_lo, v12, s16
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v13, vcc_lo
	s_mov_b32 s13, exec_lo
	global_store_b64 v[0:1], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v10, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[8:9], v[16:17]
	s_cbranch_execz .LBB0_156
; %bb.154:                              ; %.preheader1.i.i.i44.preheader
	s_mov_b32 s16, 0
.LBB0_155:                              ; %.preheader1.i.i.i44
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v10, v[6:9], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_155
.LBB0_156:                              ; %Flow418
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v7, 0
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v6, s16, 0
	global_load_b64 v[0:1], v7, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v6
	s_cbranch_execz .LBB0_158
; %bb.157:
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v6, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[6:7], off offset:8
.LBB0_158:
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[6:7], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	s_cbranch_vccnz .LBB0_160
; %bb.159:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[6:7], v[0:1], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_160:                              ; %Flow419
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v0, vcc_lo, v12, s15
	v_add_co_ci_u32_e32 v1, vcc_lo, s14, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_161:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v6, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_163
; %bb.162:                              ;   in Loop: Header=BB0_161 Depth=1
	global_load_b32 v6, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v6, 1, v6
.LBB0_163:                              ;   in Loop: Header=BB0_161 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v6
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_165
; %bb.164:                              ;   in Loop: Header=BB0_161 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_166
.LBB0_165:                              ;   in Loop: Header=BB0_161 Depth=1
	s_mov_b32 s1, -1
.LBB0_166:                              ; %Flow413
                                        ;   in Loop: Header=BB0_161 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_161
; %bb.167:
	global_load_b64 v[0:1], v[3:4], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_171
; %bb.168:
	v_mov_b32_e32 v10, 0
	s_clause 0x2
	global_load_b64 v[3:4], v10, s[2:3] offset:40
	global_load_b64 v[11:12], v10, s[2:3] offset:24 glc
	global_load_b64 v[8:9], v10, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v13, vcc_lo, v3, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v13, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	v_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v13
	v_and_b32_e32 v4, v7, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v6, v3
	v_mul_lo_u32 v4, v4, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v13, v3, 24
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v4, v13, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v8, v3
	v_mov_b32_e32 v8, v11
	v_add_co_ci_u32_e32 v4, vcc_lo, v9, v4, vcc_lo
	v_mov_b32_e32 v9, v12
	global_store_b64 v[3:4], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v10, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_171
; %bb.169:                              ; %.preheader.i.i.i43.preheader
	s_mov_b32 s0, 0
.LBB0_170:                              ; %.preheader.i.i.i43
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[3:4], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v10, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9]
	v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_170
.LBB0_171:                              ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_dual_mov_b32 v3, v34 :: v_dual_mov_b32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_readfirstlane_b32 s0, v3
	v_mov_b32_e32 v11, 0
	v_cmp_eq_u32_e64 s0, s0, v3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_177
; %bb.172:
	v_mov_b32_e32 v4, 0
	s_mov_b32 s8, exec_lo
	global_load_b64 v[8:9], v4, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[6:7], v4, s[2:3] offset:40
	global_load_b64 v[10:11], v4, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v7, v7, v9
	v_and_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v7, 24
	v_mul_hi_u32 v12, v6, 24
	v_mul_lo_u32 v6, v6, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v12, v7
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v4, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[10:11], v[8:9]
	s_cbranch_execz .LBB0_176
; %bb.173:                              ; %.preheader3.i.i.i53.preheader
	s_mov_b32 s9, 0
.LBB0_174:                              ; %.preheader3.i.i.i53
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[6:7], v4, s[2:3] offset:40
	global_load_b64 v[12:13], v4, s[2:3]
	v_dual_mov_b32 v8, v10 :: v_dual_mov_b32 v9, v11
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v6, v6, v8
	v_and_b32_e32 v7, v7, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[10:11], null, v6, 24, v[12:13]
	v_mov_b32_e32 v6, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v7, 24, v[6:7]
	global_load_b64 v[6:7], v[10:11], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[10:11], v4, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[8:9]
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_174
; %bb.175:                              ; %Flow406
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_176:                              ; %Flow408
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_177:                              ; %.loopexit4.i.i.i47
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v4, 0
	v_readfirstlane_b32 s8, v10
	v_readfirstlane_b32 s9, v11
	s_mov_b32 s16, exec_lo
	s_clause 0x1
	global_load_b64 v[12:13], v4, s[2:3] offset:40
	global_load_b128 v[6:9], v4, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v12
	v_readfirstlane_b32 s13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[8:9], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_179
; %bb.178:
	v_dual_mov_b32 v10, s16 :: v_dual_mov_b32 v11, v4
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v14, vcc_lo, v6, s15
	v_add_co_ci_u32_e32 v15, vcc_lo, s16, v7, vcc_lo
	v_dual_mov_b32 v12, 2 :: v_dual_mov_b32 v13, 1
	global_store_b128 v[14:15], v[10:13], off offset:8
.LBB0_179:
	s_or_b32 exec_lo, exec_lo, s17
	s_lshl_b64 s[12:13], s[12:13], 12
	v_lshlrev_b64 v[10:11], 6, v[3:4]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v8, s12
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v9, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v3, v10
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v0, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v13, vcc_lo, v8, v11, vcc_lo
	v_dual_mov_b32 v3, v4 :: v_dual_mov_b32 v8, s16
	v_dual_mov_b32 v9, s17 :: v_dual_mov_b32 v10, s18
	v_mov_b32_e32 v11, s19
	s_clause 0x3
	global_store_b128 v[12:13], v[0:3], off
	global_store_b128 v[12:13], v[8:11], off offset:16
	global_store_b128 v[12:13], v[8:11], off offset:32
	global_store_b128 v[12:13], v[8:11], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_187
; %bb.180:
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, s8
	v_mov_b32_e32 v15, s9
	s_clause 0x1
	global_load_b64 v[16:17], v3, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[8:9]
	s_mul_i32 s13, s17, 24
	s_mul_hi_u32 s17, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s17, s17, s13
	v_add_co_u32 v0, vcc_lo, v6, s16
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v7, vcc_lo
	s_mov_b32 s13, exec_lo
	global_store_b64 v[0:1], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v3, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[10:11], v[16:17]
	s_cbranch_execz .LBB0_183
; %bb.181:                              ; %.preheader1.i.i.i51.preheader
	s_mov_b32 s16, 0
.LBB0_182:                              ; %.preheader1.i.i.i51
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
	s_sleep 1
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v3, v[8:11], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[10:11]
	v_dual_mov_b32 v11, v9 :: v_dual_mov_b32 v10, v8
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_182
.LBB0_183:                              ; %Flow404
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v4, 0
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v3, s16, 0
	global_load_b64 v[0:1], v4, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_185
; %bb.184:
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[3:4], off offset:8
.LBB0_185:
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[3:4], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	s_cbranch_vccnz .LBB0_187
; %bb.186:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[3:4], v[0:1], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_187:                              ; %Flow405
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v0, vcc_lo, v6, s15
	v_add_co_ci_u32_e32 v1, vcc_lo, s14, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_188:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_190
; %bb.189:                              ;   in Loop: Header=BB0_188 Depth=1
	global_load_b32 v3, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB0_190:                              ;   in Loop: Header=BB0_188 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_192
; %bb.191:                              ;   in Loop: Header=BB0_188 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_193
.LBB0_192:                              ;   in Loop: Header=BB0_188 Depth=1
	s_mov_b32 s1, -1
.LBB0_193:                              ; %Flow399
                                        ;   in Loop: Header=BB0_188 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_188
; %bb.194:
	global_load_b64 v[3:4], v[12:13], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_198
; %bb.195:
	v_mov_b32_e32 v10, 0
	s_clause 0x2
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	global_load_b64 v[11:12], v10, s[2:3] offset:24 glc
	global_load_b64 v[8:9], v10, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v13, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v13, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	v_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v13
	v_and_b32_e32 v1, v7, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v6, v0
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v13, v0, 24
	v_mul_lo_u32 v0, v0, 24
	v_add_nc_u32_e32 v1, v13, v1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v8, v0
	v_mov_b32_e32 v8, v11
	v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v9, v12
	global_store_b64 v[0:1], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v10, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_198
; %bb.196:                              ; %.preheader.i.i.i50.preheader
	s_mov_b32 s0, 0
.LBB0_197:                              ; %.preheader.i.i.i50
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v10, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9]
	v_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_197
.LBB0_198:                              ; %__ockl_printf_append_args.exit54
	s_or_b32 exec_lo, exec_lo, s1
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v34
	v_mov_b32_e32 v0, 0
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v34
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_204
; %bb.199:
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	global_load_b64 v[9:10], v6, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v6, s[2:3] offset:40
	global_load_b64 v[7:8], v6, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v10
	v_and_b32_e32 v0, v0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v11, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v11, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v7, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v8, v1, vcc_lo
	global_load_b64 v[7:8], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[0:1], v[9:10]
	s_cbranch_execz .LBB0_203
; %bb.200:                              ; %.preheader3.i.i.i61.preheader
	s_mov_b32 s9, 0
.LBB0_201:                              ; %.preheader3.i.i.i61
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[7:8], v6, s[2:3] offset:40
	global_load_b64 v[11:12], v6, s[2:3]
	v_dual_mov_b32 v10, v1 :: v_dual_mov_b32 v9, v0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v7, v7, v9
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, v7, 24, v[11:12]
	v_and_b32_e32 v11, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v11, 24, v[1:2]
	v_mov_b32_e32 v1, v7
	global_load_b64 v[7:8], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[0:1], v6, v[7:10], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[9:10]
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_201
; %bb.202:                              ; %Flow392
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_203:                              ; %Flow394
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_204:                              ; %.loopexit4.i.i.i55
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v35, 0
	v_readfirstlane_b32 s8, v0
	v_readfirstlane_b32 s9, v1
	s_mov_b32 s16, exec_lo
	s_clause 0x1
	global_load_b64 v[11:12], v35, s[2:3] offset:40
	global_load_b128 v[7:10], v35, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s12, v11
	v_readfirstlane_b32 s13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[12:13], s[8:9], s[12:13]
	s_mul_i32 s1, s13, 24
	s_mul_hi_u32 s14, s12, 24
	s_mul_i32 s15, s12, 24
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_206
; %bb.205:
	v_dual_mov_b32 v11, s16 :: v_dual_mov_b32 v12, v35
	s_add_i32 s16, s14, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v7, s15
	v_add_co_ci_u32_e32 v1, vcc_lo, s16, v8, vcc_lo
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[0:1], v[11:14], off offset:8
.LBB0_206:
	s_or_b32 exec_lo, exec_lo, s17
	s_lshl_b64 s[12:13], s[12:13], 12
	v_lshlrev_b64 v[0:1], 6, v[34:35]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v9, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v10, vcc_lo
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v6, v0
	s_mov_b32 s17, s16
	s_mov_b32 s18, s16
	s_mov_b32 s19, s16
	v_and_or_b32 v3, 0xffffff1d, v3, 34
	v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo
	v_dual_mov_b32 v6, v35 :: v_dual_mov_b32 v9, s16
	v_dual_mov_b32 v10, s17 :: v_dual_mov_b32 v11, s18
	v_mov_b32_e32 v12, s19
	s_clause 0x3
	global_store_b128 v[0:1], v[3:6], off
	global_store_b128 v[0:1], v[9:12], off offset:16
	global_store_b128 v[0:1], v[9:12], off offset:32
	global_store_b128 v[0:1], v[9:12], off offset:48
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_214
; %bb.207:
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v12, s9
	v_mov_b32_e32 v11, s8
	s_clause 0x1
	global_load_b64 v[13:14], v3, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[8:9]
	s_mul_i32 s13, s17, 24
	s_mul_hi_u32 s17, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s17, s17, s13
	v_add_co_u32 v0, vcc_lo, v7, s16
	v_add_co_ci_u32_e32 v1, vcc_lo, s17, v8, vcc_lo
	s_mov_b32 s13, exec_lo
	global_store_b64 v[0:1], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[11:12], v3, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[11:12], v[13:14]
	s_cbranch_execz .LBB0_210
; %bb.208:                              ; %.preheader1.i.i.i59.preheader
	s_mov_b32 s16, 0
.LBB0_209:                              ; %.preheader1.i.i.i59
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v9, s8 :: v_dual_mov_b32 v10, s9
	s_sleep 1
	global_store_b64 v[0:1], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v3, v[9:12], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[11:12]
	v_dual_mov_b32 v12, v10 :: v_dual_mov_b32 v11, v9
	s_or_b32 s16, vcc_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB0_209
.LBB0_210:                              ; %Flow390
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v4, 0
	s_mov_b32 s16, exec_lo
	s_mov_b32 s13, exec_lo
	v_mbcnt_lo_u32_b32 v3, s16, 0
	global_load_b64 v[0:1], v4, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB0_212
; %bb.211:
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v3, s16
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[3:4], off offset:8
.LBB0_212:
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	global_load_b64 v[3:4], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]
	s_cbranch_vccnz .LBB0_214
; %bb.213:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s13, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[3:4], v[0:1], off
	s_and_b32 m0, s13, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_214:                              ; %Flow391
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s14, s14, s1
	v_add_co_u32 v0, vcc_lo, v7, s15
	v_add_co_ci_u32_e32 v1, vcc_lo, s14, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_215:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v3, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_217
; %bb.216:                              ;   in Loop: Header=BB0_215 Depth=1
	global_load_b32 v3, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v3, 1, v3
.LBB0_217:                              ;   in Loop: Header=BB0_215 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_219
; %bb.218:                              ;   in Loop: Header=BB0_215 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_220
.LBB0_219:                              ;   in Loop: Header=BB0_215 Depth=1
	s_mov_b32 s1, -1
.LBB0_220:                              ; %Flow385
                                        ;   in Loop: Header=BB0_215 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_215
; %bb.221:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_225
; %bb.222:
	v_mov_b32_e32 v3, 0
	s_clause 0x2
	global_load_b64 v[0:1], v3, s[2:3] offset:40
	global_load_b64 v[10:11], v3, s[2:3] offset:24 glc
	global_load_b64 v[8:9], v3, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v4, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]
	v_cndmask_b32_e32 v6, v6, v4, vcc_lo
	v_cndmask_b32_e32 v7, v7, v12, vcc_lo
	v_and_b32_e32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v4, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v8, v0
	v_dual_mov_b32 v8, v10 :: v_dual_and_b32 v1, v7, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v1, 24
	v_add_nc_u32_e32 v1, v4, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo
	v_mov_b32_e32 v9, v11
	global_store_b64 v[0:1], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[8:9], v[10:11]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_225
; %bb.223:                              ; %.preheader.i.i.i58.preheader
	s_mov_b32 s0, 0
.LBB0_224:                              ; %.preheader.i.i.i58
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[0:1], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[10:11], v3, v[6:9], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[10:11], v[8:9]
	v_dual_mov_b32 v8, v10 :: v_dual_mov_b32 v9, v11
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_224
.LBB0_225:                              ; %__ockl_printf_append_args.exit62
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e64 v2, v5
	s_cbranch_execz .LBB0_244
; %bb.226:                              ; %.lr.ph
	v_mad_i64_i32 v[0:1], null, 0x110, v2, s[4:5]
	v_or_b32_e64 v3, 16, 1
	v_or_b32_e64 v4, 16, 2
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v9, 0x2d46
	v_dual_mov_b32 v10, 10 :: v_dual_mov_b32 v11, 0x44
	v_add_co_u32 v7, vcc_lo, v0, 1
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v1, vcc_lo
	s_mov_b32 s8, 0
.LBB0_227:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_228 Depth 2
                                        ;     Child Loop BB0_233 Depth 2
                                        ;     Child Loop BB0_237 Depth 2
                                        ;     Child Loop BB0_242 Depth 2
	v_mad_i64_i32 v[0:1], null, 0x110, v2, s[4:5]
	s_mov_b32 s0, 0
	s_clause 0x1
	global_load_b32 v12, v[0:1], off offset:256
	global_load_b64 v[0:1], v[0:1], off offset:264
.LBB0_228:                              ;   Parent Loop BB0_227 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 1
	scratch_store_b8 off, v6, s1
	s_cmpk_lg_i32 s0, 0x100
	s_cbranch_scc1 .LBB0_228
; %bb.229:                              ; %_Z10gpu_memsetPci.exit
                                        ;   in Loop: Header=BB0_227 Depth=1
	s_waitcnt vmcnt(1)
	v_cvt_f64_i32_e32 v[12:13], v12
	scratch_store_b16 off, v9, off offset:16
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[14:15], null, v[0:1], v[0:1], v[12:13]
	v_div_scale_f64 v[20:21], vcc_lo, v[12:13], v[0:1], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[16:17], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[20:21], v[16:17]
	v_fma_f64 v[14:15], -v[14:15], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[14:15], v[14:15], v[16:17], v[18:19]
	v_div_fixup_f64 v[0:1], v[14:15], v[0:1], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f64_e64 s3, 0x40518000, v[0:1]
	v_cmp_gt_f64_e32 vcc_lo, 0x404e0000, v[0:1]
	v_cmp_gt_f64_e64 s0, 0x40490000, v[0:1]
	v_cmp_gt_f64_e64 s1, 0x40440000, v[0:1]
	v_cmp_gt_f64_e64 s2, 0x403e0000, v[0:1]
	s_or_b32 s3, s3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s0, s3
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s3, s1, s3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s9, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s9
	s_cbranch_execz .LBB0_231
; %bb.230:                              ;   in Loop: Header=BB0_227 Depth=1
	v_cndmask_b32_e32 v0, 0x45, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0x43, s0
	v_cndmask_b32_e64 v0, v0, 0x42, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0x41, s2
	scratch_store_b8 off, v0, off offset:16
.LBB0_231:                              ;   in Loop: Header=BB0_227 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_i64_i32 v[0:1], null, 0x110, v2, s[4:5]
	s_mov_b32 s2, exec_lo
	global_load_u8 v0, v[0:1], off
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u16_e32 0, v0
	s_cbranch_execz .LBB0_235
; %bb.232:                              ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB0_227 Depth=1
	v_mov_b32_e32 v12, v4
	s_mov_b64 s[0:1], 0
	s_mov_b32 s3, 0
.LBB0_233:                              ; %.lr.ph.i
                                        ;   Parent Loop BB0_227 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_co_u32 v13, vcc_lo, v7, s0
	v_add_co_ci_u32_e32 v14, vcc_lo, s1, v8, vcc_lo
	scratch_store_b8 v12, v0, off
	s_add_u32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, s0 :: v_dual_add_nc_u32 v12, 1, v12
	global_load_u8 v0, v[13:14], off
	s_addc_u32 s1, s1, 0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v0
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB0_233
; %bb.234:                              ; %Flow378
                                        ;   in Loop: Header=BB0_227 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_235:                              ; %Flow379
                                        ;   in Loop: Header=BB0_227 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v0, v4, v1
	s_mov_b32 s0, exec_lo
	scratch_store_b8 v0, v10, off
	scratch_load_i8 v0, off, off offset:16
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i16_e32 0x45, v0
	s_cbranch_execz .LBB0_243
; %bb.236:                              ;   in Loop: Header=BB0_227 Depth=1
	v_add_nc_u32_e32 v12, 3, v1
	s_mov_b32 s2, exec_lo
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr1
.LBB0_237:                              ; %ComputeLoop
                                        ;   Parent Loop BB0_227 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s9, v12, s3
	s_lshl_b32 s12, 1, s3
	v_writelane_b32 v1, s1, s3
	s_and_not1_b32 s2, s2, s12
	s_delay_alu instid0(VALU_DEP_2)
	s_add_i32 s1, s1, s9
	s_cmp_lg_u32 s2, 0
	s_cbranch_scc1 .LBB0_237
; %bb.238:                              ; %ComputeEnd
                                        ;   in Loop: Header=BB0_227 Depth=1
	v_mbcnt_lo_u32_b32 v12, exec_lo, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v12
                                        ; implicit-def: $vgpr12
	s_and_saveexec_b32 s2, vcc_lo
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_240
; %bb.239:                              ;   in Loop: Header=BB0_227 Depth=1
	v_mov_b32_e32 v12, s1
	global_atomic_add_u32 v12, v6, v12, s[6:7] glc
.LBB0_240:                              ;   in Loop: Header=BB0_227 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s1, v12
	v_cmp_ne_u16_e32 vcc_lo, 0, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_243
; %bb.241:                              ; %.lr.ph.i63.preheader
                                        ;   in Loop: Header=BB0_227 Depth=1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v1, s1, v1
	s_mov_b32 s1, 0
	s_mov_b32 s2, 0
.LBB0_242:                              ; %.lr.ph.i63
                                        ;   Parent Loop BB0_227 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v12, s2, v1
	v_add_nc_u32_e32 v14, s2, v3
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_u32 v12, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	global_store_b8 v[12:13], v0, off
	scratch_load_u8 v0, v14, off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0, v0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_242
.LBB0_243:                              ; %Flow377
                                        ;   in Loop: Header=BB0_227 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, 1, v2
	v_add_co_u32 v7, s0, 0x110, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
	v_cmp_ge_i32_e32 vcc_lo, v2, v5
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_227
.LBB0_244:                              ; %Flow381
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 272
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc, .Lfunc_end0-_Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 10360
; NumSgprs: 26
; NumVgprs: 36
; ScratchSize: 272
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"Thread: %d Start Index: %d End Index: %d\n"
	.size	.str, 42

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         120
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc
    .private_segment_fixed_size: 272
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z10sum_on_gpuP12BenchmarkGPUPiS1_S1_Pc.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     36
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
