//
// Created by Peter Rigole on 2019-05-03.
//

#include "OutputProcessor.cuh"

OutputProcessor::OutputProcessor() {}

OutputProcessor::OutputProcessor(NeuralNet* neuralNet_init) : neuralNet(neuralNet_init) {}

void OutputProcessor::setNeuralNet(NeuralNet* neuralNet_update) {
    neuralNet = neuralNet_update;
}

void OutputProcessor::processOutput() {

}

	.file	"tmpxft_003ae9fc_00000000-6_OutputProcessor.cudafe1.cpp"
	.text
#APP

#NO_APP
	.align 2
	.globl	_ZN15OutputProcessor13processOutputEv
	.type	_ZN15OutputProcessor13processOutputEv, @function
_ZN15OutputProcessor13processOutputEv:
.LFB2049:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE2049:
	.size	_ZN15OutputProcessor13processOutputEv, .-_ZN15OutputProcessor13processOutputEv
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2052:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2052:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.globl	_ZN15OutputProcessorC2Ev
	.type	_ZN15OutputProcessorC2Ev, @function
_ZN15OutputProcessorC2Ev:
.LFB2043:
	.cfi_startproc
	endbr64
	leaq	16+_ZTV15OutputProcessor(%rip), %rax
	movq	%rax, (%rdi)
	ret
	.cfi_endproc
.LFE2043:
	.size	_ZN15OutputProcessorC2Ev, .-_ZN15OutputProcessorC2Ev
	.globl	_ZN15OutputProcessorC1Ev
	.set	_ZN15OutputProcessorC1Ev,_ZN15OutputProcessorC2Ev
	.align 2
	.globl	_ZN15OutputProcessorC2EP9NeuralNet
	.type	_ZN15OutputProcessorC2EP9NeuralNet, @function
_ZN15OutputProcessorC2EP9NeuralNet:
.LFB2046:
	.cfi_startproc
	endbr64
	leaq	16+_ZTV15OutputProcessor(%rip), %rax
	movq	%rsi, 8(%rdi)
	movq	%rax, (%rdi)
	ret
	.cfi_endproc
.LFE2046:
	.size	_ZN15OutputProcessorC2EP9NeuralNet, .-_ZN15OutputProcessorC2EP9NeuralNet
	.globl	_ZN15OutputProcessorC1EP9NeuralNet
	.set	_ZN15OutputProcessorC1EP9NeuralNet,_ZN15OutputProcessorC2EP9NeuralNet
	.align 2
	.globl	_ZN15OutputProcessor12setNeuralNetEP9NeuralNet
	.type	_ZN15OutputProcessor12setNeuralNetEP9NeuralNet, @function
_ZN15OutputProcessor12setNeuralNetEP9NeuralNet:
.LFB2048:
	.cfi_startproc
	endbr64
	movq	%rsi, 8(%rdi)
	ret
	.cfi_endproc
.LFE2048:
	.size	_ZN15OutputProcessor12setNeuralNetEP9NeuralNet, .-_ZN15OutputProcessor12setNeuralNetEP9NeuralNet
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2075:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2075:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.weak	_ZTS7Managed
	.section	.rodata._ZTS7Managed,"aG",@progbits,_ZTS7Managed,comdat
	.align 8
	.type	_ZTS7Managed, @object
	.size	_ZTS7Managed, 9
_ZTS7Managed:
	.string	"7Managed"
	.weak	_ZTI7Managed
	.section	.data.rel.ro._ZTI7Managed,"awG",@progbits,_ZTI7Managed,comdat
	.align 8
	.type	_ZTI7Managed, @object
	.size	_ZTI7Managed, 16
_ZTI7Managed:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTS7Managed
	.weak	_ZTS15OutputProcessor
	.section	.rodata._ZTS15OutputProcessor,"aG",@progbits,_ZTS15OutputProcessor,comdat
	.align 16
	.type	_ZTS15OutputProcessor, @object
	.size	_ZTS15OutputProcessor, 18
_ZTS15OutputProcessor:
	.string	"15OutputProcessor"
	.weak	_ZTI15OutputProcessor
	.section	.data.rel.ro._ZTI15OutputProcessor,"awG",@progbits,_ZTI15OutputProcessor,comdat
	.align 8
	.type	_ZTI15OutputProcessor, @object
	.size	_ZTI15OutputProcessor, 24
_ZTI15OutputProcessor:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTS15OutputProcessor
	.quad	_ZTI7Managed
	.weak	_ZTV15OutputProcessor
	.section	.data.rel.ro.local._ZTV15OutputProcessor,"awG",@progbits,_ZTV15OutputProcessor,comdat
	.align 8
	.type	_ZTV15OutputProcessor, @object
	.size	_ZTV15OutputProcessor, 24
_ZTV15OutputProcessor:
	.quad	0
	.quad	_ZTI15OutputProcessor
	.quad	_ZN15OutputProcessor13processOutputEv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//
// Created by Peter Rigole on 2019-05-03.
//


#include <hip/hip_runtime.h>
#include "OutputProcessor.cuh"

OutputProcessor::OutputProcessor() {}

OutputProcessor::OutputProcessor(NeuralNet* neuralNet_init) : neuralNet(neuralNet_init) {}

void OutputProcessor::setNeuralNet(NeuralNet* neuralNet_update) {
    neuralNet = neuralNet_update;
}

void OutputProcessor::processOutput() {

}

	.text
	.file	"OutputProcessor.hip"
	.globl	_ZN15OutputProcessorC2Ev        # -- Begin function _ZN15OutputProcessorC2Ev
	.p2align	1, 0x90
	.type	_ZN15OutputProcessorC2Ev,@function
_ZN15OutputProcessorC2Ev:               # @_ZN15OutputProcessorC2Ev
	.cfi_startproc
# %bb.0:
	movq	$_ZTV15OutputProcessor+16, (%rdi)
	retq
.Lfunc_end0:
	.size	_ZN15OutputProcessorC2Ev, .Lfunc_end0-_ZN15OutputProcessorC2Ev
	.cfi_endproc
                                        # -- End function
	.globl	_ZN15OutputProcessorC2EP9NeuralNet # -- Begin function _ZN15OutputProcessorC2EP9NeuralNet
	.p2align	1, 0x90
	.type	_ZN15OutputProcessorC2EP9NeuralNet,@function
_ZN15OutputProcessorC2EP9NeuralNet:     # @_ZN15OutputProcessorC2EP9NeuralNet
	.cfi_startproc
# %bb.0:
	movq	$_ZTV15OutputProcessor+16, (%rdi)
	movq	%rsi, 8(%rdi)
	retq
.Lfunc_end1:
	.size	_ZN15OutputProcessorC2EP9NeuralNet, .Lfunc_end1-_ZN15OutputProcessorC2EP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_ZN15OutputProcessor12setNeuralNetEP9NeuralNet # -- Begin function _ZN15OutputProcessor12setNeuralNetEP9NeuralNet
	.p2align	1, 0x90
	.type	_ZN15OutputProcessor12setNeuralNetEP9NeuralNet,@function
_ZN15OutputProcessor12setNeuralNetEP9NeuralNet: # @_ZN15OutputProcessor12setNeuralNetEP9NeuralNet
	.cfi_startproc
# %bb.0:
	movq	%rsi, 8(%rdi)
	retq
.Lfunc_end2:
	.size	_ZN15OutputProcessor12setNeuralNetEP9NeuralNet, .Lfunc_end2-_ZN15OutputProcessor12setNeuralNetEP9NeuralNet
	.cfi_endproc
                                        # -- End function
	.globl	_ZN15OutputProcessor13processOutputEv # -- Begin function _ZN15OutputProcessor13processOutputEv
	.p2align	1, 0x90
	.type	_ZN15OutputProcessor13processOutputEv,@function
_ZN15OutputProcessor13processOutputEv:  # @_ZN15OutputProcessor13processOutputEv
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end3:
	.size	_ZN15OutputProcessor13processOutputEv, .Lfunc_end3-_ZN15OutputProcessor13processOutputEv
	.cfi_endproc
                                        # -- End function
	.type	_ZTV15OutputProcessor,@object   # @_ZTV15OutputProcessor
	.section	.rodata,"a",@progbits
	.globl	_ZTV15OutputProcessor
	.p2align	3, 0x0
_ZTV15OutputProcessor:
	.quad	0
	.quad	_ZTI15OutputProcessor
	.quad	_ZN15OutputProcessor13processOutputEv
	.size	_ZTV15OutputProcessor, 24

	.type	_ZTS15OutputProcessor,@object   # @_ZTS15OutputProcessor
	.globl	_ZTS15OutputProcessor
_ZTS15OutputProcessor:
	.asciz	"15OutputProcessor"
	.size	_ZTS15OutputProcessor, 18

	.type	_ZTS7Managed,@object            # @_ZTS7Managed
	.section	.rodata._ZTS7Managed,"aG",@progbits,_ZTS7Managed,comdat
	.weak	_ZTS7Managed
_ZTS7Managed:
	.asciz	"7Managed"
	.size	_ZTS7Managed, 9

	.type	_ZTI7Managed,@object            # @_ZTI7Managed
	.section	.rodata._ZTI7Managed,"aG",@progbits,_ZTI7Managed,comdat
	.weak	_ZTI7Managed
	.p2align	3, 0x0
_ZTI7Managed:
	.quad	_ZTVN10__cxxabiv117__class_type_infoE+16
	.quad	_ZTS7Managed
	.size	_ZTI7Managed, 16

	.type	_ZTI15OutputProcessor,@object   # @_ZTI15OutputProcessor
	.section	.rodata,"a",@progbits
	.globl	_ZTI15OutputProcessor
	.p2align	3, 0x0
_ZTI15OutputProcessor:
	.quad	_ZTVN10__cxxabiv120__si_class_type_infoE+16
	.quad	_ZTS15OutputProcessor
	.quad	_ZTI7Managed
	.size	_ZTI15OutputProcessor, 24

	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.globl	_ZN15OutputProcessorC1Ev
	.type	_ZN15OutputProcessorC1Ev,@function
.set _ZN15OutputProcessorC1Ev, _ZN15OutputProcessorC2Ev
	.globl	_ZN15OutputProcessorC1EP9NeuralNet
	.type	_ZN15OutputProcessorC1EP9NeuralNet,@function
.set _ZN15OutputProcessorC1EP9NeuralNet, _ZN15OutputProcessorC2EP9NeuralNet
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _ZTVN10__cxxabiv120__si_class_type_infoE
	.addrsig_sym _ZTS15OutputProcessor
	.addrsig_sym _ZTVN10__cxxabiv117__class_type_infoE
	.addrsig_sym _ZTS7Managed
	.addrsig_sym _ZTI7Managed
	.addrsig_sym _ZTI15OutputProcessor
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
