
#include <stdlib.h>
#include <stdio.h>
#include <vector>
#include <algorithm>
#include <iostream>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#define TILE_WIDTH 16

// an optimized version of matrix_multiplication which eliminates redundant loads
__global__ void matrix_multiply(int *d_M, int *d_N, int *d_P, size_t width)
{
  // create shorthand names for threadIdx & blockIdx
  int tx = threadIdx.x, ty = threadIdx.y;
  int bx = blockIdx.x,  by = blockIdx.y;

  // allocate 2D tiles in __shared__ memory
  __shared__ int s_M[TILE_WIDTH][TILE_WIDTH];
  __shared__ int s_N[TILE_WIDTH][TILE_WIDTH];

  // calculate the row & column index of the element
  int row = by*blockDim.y + ty;
  int col = bx*blockDim.x + tx;

  int result = 0;

  // loop over the tiles of the input in phases
  for(int p = 0; p < width/TILE_WIDTH; ++p)
  {
    // collaboratively load tiles into __shared__
    s_M[ty][tx] = d_M[row*width + (p*TILE_WIDTH + tx)];
    s_N[ty][tx] = d_N[(p*TILE_WIDTH + ty)*width + col];

    // wait until all data is loaded before allowing
    // any thread in this block to continue
    __syncthreads();

    // do dot product between row of s_a and column of s_b
    for(int k = 0; k < TILE_WIDTH; ++k)
    {
      result += s_M[ty][k] * s_N[k][tx];
    }

    // wait until all threads are finished with the data
    // before allowing any thread in this block to continue
    __syncthreads();
  }

  // write out this thread's result
  d_P[row*width+col] = result;
}

void MatrixMulOnHost(int* M, int* N, int* P, int Width)
{
	for (int i = 0; i < Width; ++i) {
		for (int j = 0; j < Width; ++j) {
			double sum = 0;
            for (int k = 0; k < Width; ++k) {
                double a = M[i * Width + k];
                double b = N[k * Width + j];
                sum += a * b;
            }
            P[i * Width + j] = sum;
		}
	}
}

int main(void)
{
  // create a large workload so we can easily measure the
  // performance difference of both implementations

  // note that n measures the width of the matrix, not the number of total elements
  //const size_t n = 1<<10;
  const size_t n = 1024;
  std::cout << "Total element is " << n << "\n";
  const dim3 block_size(TILE_WIDTH,TILE_WIDTH);
  const dim3 num_blocks(n / block_size.x, n / block_size.y);

  // generate random input on the host  
  std::vector<int> h_a(n*n), h_b(n*n), h_c(n*n);
  
  for(int i = 0; i < n*n; ++i)
  {
    h_a[i] = static_cast<int>(rand()) / RAND_MAX;
    h_b[i] = static_cast<int>(rand()) / RAND_MAX;
  }

  // allocate storage for the device
  int *d_a = 0, *d_b = 0, *d_c = 0;
  cudaMalloc((void**)&d_a, sizeof(int) * n * n);
  cudaMalloc((void**)&d_b, sizeof(int) * n * n);
  cudaMalloc((void**)&d_c, sizeof(int) * n * n);

  // copy input to the device
  cudaMemcpy(d_a, &h_a[0], sizeof(int) * n * n, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b, &h_b[0], sizeof(int) * n * n, cudaMemcpyHostToDevice);

  // again, launch a single "warm-up" kernel
  matrix_multiply<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
  
  // copy result back to the host
  cudaMemcpy(&h_c[0], d_c, sizeof(int) * n * n, cudaMemcpyDeviceToHost);
  
  //------------------
  int* h_r;
  h_r = (int*)malloc(sizeof(int) * n * n);
  MatrixMulOnHost(&h_a[0], &h_b[0], h_r, n);
  
  for (int i=0; i<(n*n); i++) {
	if (h_r[i] != h_c[i]) {
		std::cout << "Failed at i " << i << "h_r=" << h_r[i] << ",h_c=" << h_c[i] << "\n";
		exit(1);
	}
  }
  
  std::cout << "Result is correct.";
  
  // deallocate device memory
  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);

  return 0;
}

	.file	"tmpxft_0021fda1_00000000-6_MatrixMultiplicationSharedMem.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4256:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4256:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15MatrixMulOnHostPiS_S_i
	.type	_Z15MatrixMulOnHostPiS_S_i, @function
_Z15MatrixMulOnHostPiS_S_i:
.LFB4252:
	.cfi_startproc
	endbr64
	movq	%rdx, %r11
	xorl	%r8d, %r8d
	movslq	%ecx, %rdx
	movq	%rsi, %r10
	movq	%rdi, %r9
	salq	$2, %rdx
	xorl	%esi, %esi
	cmpl	%ecx, %r8d
	jl	.L11
	ret
.L11:
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
.L7:
	xorl	%eax, %eax
	leaq	(%r9,%rsi), %rbp
	leaq	(%r11,%rsi), %r12
.L6:
	leaq	(%r10,%rax,4), %rbx
	xorl	%edi, %edi
	xorps	%xmm0, %xmm0
.L4:
	cvtsi2sdl	0(%rbp,%rdi,4), %xmm1
	incq	%rdi
	cvtsi2sdl	(%rbx), %xmm2
	addq	%rdx, %rbx
	mulsd	%xmm2, %xmm1
	addsd	%xmm1, %xmm0
	cmpl	%edi, %ecx
	jg	.L4
	cvttsd2sil	%xmm0, %edi
	movl	%edi, (%r12,%rax,4)
	incq	%rax
	cmpl	%eax, %ecx
	jg	.L6
	incl	%r8d
	addq	%rdx, %rsi
	cmpl	%ecx, %r8d
	jl	.L7
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4252:
	.size	_Z15MatrixMulOnHostPiS_S_i, .-_Z15MatrixMulOnHostPiS_S_i
	.globl	_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m
	.type	_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m, @function
_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m:
.LFB4278:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15matrix_multiplyPiS_S_m(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4278:
	.size	_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m, .-_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m
	.globl	_Z15matrix_multiplyPiS_S_m
	.type	_Z15matrix_multiplyPiS_S_m, @function
_Z15matrix_multiplyPiS_S_m:
.LFB4279:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m
	.cfi_endproc
.LFE4279:
	.size	_Z15matrix_multiplyPiS_S_m, .-_Z15matrix_multiplyPiS_S_m
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z15matrix_multiplyPiS_S_m"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4281:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15matrix_multiplyPiS_S_m(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4281:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt6vectorIiSaIiEEC2EmRKS0_.str1.1,"aMS",@progbits,1
.LC2:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.type	_ZNSt6vectorIiSaIiEEC2EmRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKS0_:
.LFB4590:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpq	%rsi, %rax
	jnb	.L21
	leaq	.LC2(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L21:
	movq	%rsi, %rbp
	xorl	%esi, %esi
	movq	%rdi, %rbx
	xorl	%eax, %eax
	movq	%rsi, (%rdi)
	leaq	0(,%rbp,4), %r12
	movq	%rsi, 8(%rdi)
	movq	%rsi, 16(%rdi)
	testq	%rbp, %rbp
	je	.L22
	movq	%r12, %rdi
	call	_Znwm@PLT
.L22:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L23
	xorl	%ecx, %ecx
	addq	$4, %rax
	movl	%ecx, -4(%rax)
	decq	%rbp
	je	.L23
.L24:
	cmpq	%rax, %r12
	je	.L23
	xorl	%edx, %edx
	addq	$4, %rax
	movl	%edx, -4(%rax)
	jmp	.L24
.L23:
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4590:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.weak	_ZNSt6vectorIiSaIiEEC1EmRKS0_
	.set	_ZNSt6vectorIiSaIiEEC1EmRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKS0_
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4593:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L35
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L35:
	ret
	.cfi_endproc
.LFE4593:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.rodata.str1.1
.LC3:
	.string	"Total element is "
.LC4:
	.string	"\n"
.LC5:
	.string	"Failed at i "
.LC6:
	.string	"h_r="
.LC7:
	.string	",h_c="
.LC8:
	.string	"Result is correct."
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4253:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4253
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC4(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1024, %esi
	movq	%rax, %rdi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1048576, %esi
	movabsq	$274877907008, %rax
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	leaq	128(%rsp), %rax
	movq	%rax, 8(%rsp)
	leaq	80(%rsp), %rax
	movq	8(%rsp), %rdx
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	movl	$1, 76(%rsp)
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE0:
	leaq	104(%rsp), %rax
	movq	8(%rsp), %rdx
	movl	$1048576, %esi
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
.LEHB1:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE1:
	leaq	48(%rsp), %r15
	movq	8(%rsp), %rdi
	movl	$1048576, %esi
	movq	%r15, %rdx
.LEHB2:
	call	_ZNSt6vectorIiSaIiEEC1EmRKS0_
.LEHE2:
	xorl	%ebp, %ebp
	movl	$2147483647, %ebx
.L38:
	call	rand@PLT
	movq	80(%rsp), %r12
	cltd
	idivl	%ebx
	movl	%eax, (%r12,%rbp)
	call	rand@PLT
	movq	104(%rsp), %r13
	cltd
	idivl	%ebx
	movl	%eax, 0(%r13,%rbp)
	addq	$4, %rbp
	cmpq	$4194304, %rbp
	jne	.L38
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	movq	%rax, 48(%rsp)
.LEHB3:
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movl	$4194304, %esi
	movq	%r15, %rdi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	64(%rsp), %ecx
	movq	68(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$68719476752, %rdx
	movl	76(%rsp), %esi
	movq	%rdx, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movq	48(%rsp), %rdx
	testl	%eax, %eax
	jne	.L39
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1024, %ecx
	call	_Z40__device_stub__Z15matrix_multiplyPiS_S_mPiS_S_m
.L39:
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$4194304, %edx
	movq	128(%rsp), %rbx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$4194304, %edi
	call	malloc@PLT
	movq	%r12, %rdi
	movl	$1024, %ecx
	movq	%r13, %rsi
	movq	%rax, %rdx
	movq	%rax, %r15
	movq	%rbx, %r12
	xorl	%ebx, %ebx
	call	_Z15MatrixMulOnHostPiS_S_i
.L41:
	movl	(%r15,%rbx,4), %r13d
	cmpl	(%r12), %r13d
	je	.L40
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebx, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC6(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%r13d, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC7(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	(%r12), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	movq	%r14, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %edi
	call	exit@PLT
.L40:
	incq	%rbx
	addq	$4, %r12
	cmpq	$1048576, %rbx
	jne	.L41
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
.LEHE3:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	24(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	16(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	jmp	.L52
.L49:
	endbr64
	movq	%rax, %rbx
.L42:
	movq	8(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L43
.L48:
	endbr64
	movq	%rax, %rbx
.L43:
	movq	24(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L44
.L47:
	endbr64
	movq	%rax, %rbx
.L44:
	movq	16(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L52
	movq	%rbx, %rdi
.LEHB4:
	call	_Unwind_Resume@PLT
.LEHE4:
.L52:
	call	__stack_chk_fail@PLT
.L46:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4253:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4253:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4253-.LLSDACSB4253
.LLSDACSB4253:
	.uleb128 .LEHB0-.LFB4253
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4253
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L47-.LFB4253
	.uleb128 0
	.uleb128 .LEHB2-.LFB4253
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L48-.LFB4253
	.uleb128 0
	.uleb128 .LEHB3-.LFB4253
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L49-.LFB4253
	.uleb128 0
	.uleb128 .LEHB4-.LFB4253
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
.LLSDACSE4253:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdlib.h>
#include <stdio.h>
#include <vector>
#include <algorithm>
#include <iostream>
#include "hip/hip_runtime.h"


#define TILE_WIDTH 16

// an optimized version of matrix_multiplication which eliminates redundant loads
__global__ void matrix_multiply(int *d_M, int *d_N, int *d_P, size_t width)
{
  // create shorthand names for threadIdx & blockIdx
  int tx = threadIdx.x, ty = threadIdx.y;
  int bx = blockIdx.x,  by = blockIdx.y;

  // allocate 2D tiles in __shared__ memory
  __shared__ int s_M[TILE_WIDTH][TILE_WIDTH];
  __shared__ int s_N[TILE_WIDTH][TILE_WIDTH];

  // calculate the row & column index of the element
  int row = by*blockDim.y + ty;
  int col = bx*blockDim.x + tx;

  int result = 0;

  // loop over the tiles of the input in phases
  for(int p = 0; p < width/TILE_WIDTH; ++p)
  {
    // collaboratively load tiles into __shared__
    s_M[ty][tx] = d_M[row*width + (p*TILE_WIDTH + tx)];
    s_N[ty][tx] = d_N[(p*TILE_WIDTH + ty)*width + col];

    // wait until all data is loaded before allowing
    // any thread in this block to continue
    __syncthreads();

    // do dot product between row of s_a and column of s_b
    for(int k = 0; k < TILE_WIDTH; ++k)
    {
      result += s_M[ty][k] * s_N[k][tx];
    }

    // wait until all threads are finished with the data
    // before allowing any thread in this block to continue
    __syncthreads();
  }

  // write out this thread's result
  d_P[row*width+col] = result;
}

void MatrixMulOnHost(int* M, int* N, int* P, int Width)
{
	for (int i = 0; i < Width; ++i) {
		for (int j = 0; j < Width; ++j) {
			double sum = 0;
            for (int k = 0; k < Width; ++k) {
                double a = M[i * Width + k];
                double b = N[k * Width + j];
                sum += a * b;
            }
            P[i * Width + j] = sum;
		}
	}
}

int main(void)
{
  // create a large workload so we can easily measure the
  // performance difference of both implementations

  // note that n measures the width of the matrix, not the number of total elements
  //const size_t n = 1<<10;
  const size_t n = 1024;
  std::cout << "Total element is " << n << "\n";
  const dim3 block_size(TILE_WIDTH,TILE_WIDTH);
  const dim3 num_blocks(n / block_size.x, n / block_size.y);

  // generate random input on the host  
  std::vector<int> h_a(n*n), h_b(n*n), h_c(n*n);
  
  for(int i = 0; i < n*n; ++i)
  {
    h_a[i] = static_cast<int>(rand()) / RAND_MAX;
    h_b[i] = static_cast<int>(rand()) / RAND_MAX;
  }

  // allocate storage for the device
  int *d_a = 0, *d_b = 0, *d_c = 0;
  hipMalloc((void**)&d_a, sizeof(int) * n * n);
  hipMalloc((void**)&d_b, sizeof(int) * n * n);
  hipMalloc((void**)&d_c, sizeof(int) * n * n);

  // copy input to the device
  hipMemcpy(d_a, &h_a[0], sizeof(int) * n * n, hipMemcpyHostToDevice);
  hipMemcpy(d_b, &h_b[0], sizeof(int) * n * n, hipMemcpyHostToDevice);

  // again, launch a single "warm-up" kernel
  matrix_multiply<<<num_blocks,block_size>>>(d_a, d_b, d_c, n);
  
  // copy result back to the host
  hipMemcpy(&h_c[0], d_c, sizeof(int) * n * n, hipMemcpyDeviceToHost);
  
  //------------------
  int* h_r;
  h_r = (int*)malloc(sizeof(int) * n * n);
  MatrixMulOnHost(&h_a[0], &h_b[0], h_r, n);
  
  for (int i=0; i<(n*n); i++) {
	if (h_r[i] != h_c[i]) {
		std::cout << "Failed at i " << i << "h_r=" << h_r[i] << ",h_c=" << h_c[i] << "\n";
		exit(1);
	}
  }
  
  std::cout << "Result is correct.";
  
  // deallocate device memory
  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);

  return 0;
}

	.text
	.file	"MatrixMultiplicationSharedMem.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__matrix_multiplyPiS_S_m # -- Begin function _Z30__device_stub__matrix_multiplyPiS_S_m
	.type	_Z30__device_stub__matrix_multiplyPiS_S_m,@function
_Z30__device_stub__matrix_multiplyPiS_S_m: # @_Z30__device_stub__matrix_multiplyPiS_S_m
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15matrix_multiplyPiS_S_m, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__matrix_multiplyPiS_S_m, .Lfunc_end0-_Z30__device_stub__matrix_multiplyPiS_S_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z15MatrixMulOnHostPiS_S_i      # -- Begin function _Z15MatrixMulOnHostPiS_S_i
	.type	_Z15MatrixMulOnHostPiS_S_i,@function
_Z15MatrixMulOnHostPiS_S_i:             # @_Z15MatrixMulOnHostPiS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB1_8
# %bb.1:                                # %.preheader28.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %eax
	leaq	(,%rax,4), %r8
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
                                        #       Child Loop BB1_4 Depth 3
	movl	%r9d, %r11d
	leaq	(%rdi,%r11,4), %r11
	movq	%r10, %rbx
	imulq	%rax, %rbx
	leaq	(%rdx,%rbx,4), %rbx
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB1_3:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_4 Depth 3
	xorpd	%xmm0, %xmm0
	movq	%r14, %r12
	xorl	%r13d, %r13d
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	xorps	%xmm1, %xmm1
	cvtsi2sdl	(%r11,%r13,4), %xmm1
	xorps	%xmm2, %xmm2
	cvtsi2sdl	(%r12), %xmm2
	mulsd	%xmm1, %xmm2
	addsd	%xmm2, %xmm0
	incq	%r13
	addq	%r8, %r12
	cmpq	%r13, %rax
	jne	.LBB1_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_3 Depth=2
	cvttsd2si	%xmm0, %ebp
	movl	%ebp, (%rbx,%r15,4)
	incq	%r15
	addq	$4, %r14
	cmpq	%rax, %r15
	jne	.LBB1_3
# %bb.6:                                # %._crit_edge32
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r10
	addl	%ecx, %r9d
	cmpq	%rax, %r10
	jne	.LBB1_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB1_8:                                # %._crit_edge34
	retq
.Lfunc_end1:
	.size	_Z15MatrixMulOnHostPiS_S_i, .Lfunc_end1-_Z15MatrixMulOnHostPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$1024, %esi                     # imm = 0x400
	callq	_ZNSo9_M_insertImEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znwm
	movq	%rax, %rbx
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp0:
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znwm
.Ltmp1:
# %bb.1:
	movq	%rax, %r14
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.Ltmp3:
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znwm
.Ltmp4:
# %bb.2:
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB2_3:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	movq	%rax, %rcx
	shlq	$30, %rcx
	addq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$63, %rax
	sarq	$61, %rcx
	addl	%eax, %ecx
	movl	%ecx, (%rbx,%r12,4)
	callq	rand
	cltq
	movq	%rax, %rcx
	shlq	$30, %rcx
	addq	%rax, %rcx
	movq	%rcx, %rax
	shrq	$63, %rax
	sarq	$61, %rcx
	addl	%eax, %ecx
	movl	%ecx, (%r14,%r12,4)
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB2_3
# %bb.4:
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
.Ltmp6:
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
.Ltmp7:
# %bb.5:
.Ltmp8:
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
.Ltmp9:
# %bb.6:
.Ltmp10:
	movq	%rsp, %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
.Ltmp11:
# %bb.7:
	movq	16(%rsp), %rdi
.Ltmp12:
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp13:
# %bb.8:
	movq	8(%rsp), %rdi
.Ltmp14:
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp15:
# %bb.9:
.Ltmp16:
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp17:
# %bb.10:
	testl	%eax, %eax
	jne	.LBB2_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
.Ltmp18:
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z30__device_stub__matrix_multiplyPiS_S_m
.Ltmp19:
.LBB2_12:
	movq	(%rsp), %rsi
.Ltmp20:
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp21:
# %bb.13:
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r13
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%rax, %rdx
	movl	$1024, %ecx                     # imm = 0x400
	callq	_Z15MatrixMulOnHostPiS_S_i
	xorl	%r12d, %r12d
.LBB2_14:                               # =>This Inner Loop Header: Depth=1
	movl	(%r13,%r12,4), %ebp
	cmpl	(%r15,%r12,4), %ebp
	jne	.LBB2_15
# %bb.26:                               #   in Loop: Header=BB2_14 Depth=1
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB2_14
# %bb.27:
.Ltmp38:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp39:
# %bb.28:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	16(%rsp), %rdi
.Ltmp40:
	callq	hipFree
.Ltmp41:
# %bb.29:
	movq	8(%rsp), %rdi
.Ltmp42:
	callq	hipFree
.Ltmp43:
# %bb.30:
	movq	(%rsp), %rdi
.Ltmp44:
	callq	hipFree
.Ltmp45:
# %bb.31:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit45
	movq	%r15, %rdi
	callq	_ZdlPv
	movq	%r14, %rdi
	callq	_ZdlPv
	movq	%rbx, %rdi
	callq	_ZdlPv
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_15:
	.cfi_def_cfa_offset 80
.Ltmp23:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp24:
# %bb.16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit39
.Ltmp25:
	movl	$_ZSt4cout, %edi
	movl	%r12d, %esi
	callq	_ZNSolsEi
.Ltmp26:
# %bb.17:
.Ltmp27:
	movq	%rax, %r13
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp28:
# %bb.18:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit40
.Ltmp29:
	movq	%r13, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp30:
# %bb.19:
.Ltmp31:
	movq	%rax, %r13
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit41
	movl	(%r15,%r12,4), %esi
.Ltmp33:
	movq	%r13, %rdi
	callq	_ZNSolsEi
.Ltmp34:
# %bb.21:
.Ltmp35:
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp36:
# %bb.22:
	movl	$1, %edi
	callq	exit
.LBB2_24:
.Ltmp5:
	movq	%rax, %r12
	jmp	.LBB2_34
.LBB2_23:
.Ltmp2:
	movq	%rax, %r12
	jmp	.LBB2_35
.LBB2_32:
.Ltmp46:
	jmp	.LBB2_33
.LBB2_36:
.Ltmp22:
	jmp	.LBB2_33
.LBB2_25:
.Ltmp37:
.LBB2_33:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit47
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB2_34:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit49
	movq	%r14, %rdi
	callq	_ZdlPv
.LBB2_35:                               # %_ZNSt6vectorIiSaIiEED2Ev.exit51
	movq	%rbx, %rdi
	callq	_ZdlPv
	movq	%r12, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp1-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp3-.Ltmp1                  #   Call between .Ltmp1 and .Ltmp3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp6-.Ltmp4                  #   Call between .Ltmp4 and .Ltmp6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp21-.Ltmp6                 #   Call between .Ltmp6 and .Ltmp21
	.uleb128 .Ltmp22-.Lfunc_begin0          #     jumps to .Ltmp22
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp45-.Ltmp38                #   Call between .Ltmp38 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp36-.Ltmp23                #   Call between .Ltmp23 and .Ltmp36
	.uleb128 .Ltmp37-.Lfunc_begin0          #     jumps to .Ltmp37
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp36-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Lfunc_end2-.Ltmp36            #   Call between .Ltmp36 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15matrix_multiplyPiS_S_m, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15matrix_multiplyPiS_S_m,@object # @_Z15matrix_multiplyPiS_S_m
	.section	.rodata,"a",@progbits
	.globl	_Z15matrix_multiplyPiS_S_m
	.p2align	3, 0x0
_Z15matrix_multiplyPiS_S_m:
	.quad	_Z30__device_stub__matrix_multiplyPiS_S_m
	.size	_Z15matrix_multiplyPiS_S_m, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Total element is "
	.size	.L.str, 18

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed at i "
	.size	.L.str.2, 13

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"h_r="
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	",h_c="
	.size	.L.str.4, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Result is correct."
	.size	.L.str.5, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15matrix_multiplyPiS_S_m"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__matrix_multiplyPiS_S_m
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z15matrix_multiplyPiS_S_m
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15matrix_multiplyPiS_S_m ; -- Begin function _Z15matrix_multiplyPiS_S_m
	.globl	_Z15matrix_multiplyPiS_S_m
	.p2align	8
	.type	_Z15matrix_multiplyPiS_S_m,@function
_Z15matrix_multiplyPiS_S_m:             ; @_Z15matrix_multiplyPiS_S_m
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s8, 16
	s_and_b32 s8, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s9, v[4:5]
	v_and_b32_e32 v5, 0x3ff, v0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_lo_u32 v6, v1, s7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v7, v2, s6
	v_mad_u64_u32 v[2:3], null, v1, s6, 0
	v_mad_u64_u32 v[0:1], null, s14, s8, v[5:6]
	v_cmp_gt_u64_e64 s8, s[6:7], 15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v3, v6, v7
	s_and_b32 vcc_lo, exec_lo, s8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_cbranch_vccz .LBB0_6
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v8, 2, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b32_e32 v9, 6, v4
	v_add_co_u32 v10, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v13, 0x400, v8
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v14, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v7, vcc_lo
	v_mov_b32_e32 v6, 0
	v_add_nc_u32_e32 v12, v9, v8
	v_mov_b32_e32 v8, 0
	v_add_nc_u32_e32 v16, v13, v9
	s_mov_b32 s1, 0
	s_lshr_b64 s[2:3], s[6:7], 4
	s_mov_b32 s0, s1
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s8, s0, 4
	v_add_nc_u32_e32 v20, s8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[17:18], null, v20, s6, 0
	v_mov_b32_e32 v7, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[18:19], null, v20, s7, v[7:8]
	v_add_nc_u32_e32 v7, s8, v5
	s_mov_b32 s8, 0
	v_lshlrev_b64 v[19:20], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_mov_b32_e32 v7, v13
	v_add_co_u32 v19, vcc_lo, v10, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v20, vcc_lo, v11, v20, vcc_lo
	v_add_co_u32 v17, vcc_lo, v14, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, v15, v18, vcc_lo
	global_load_b32 v19, v[19:20], off
	global_load_b32 v17, v[17:18], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v12, v19
	s_waitcnt vmcnt(0)
	ds_store_b32 v16, v17
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v17, s8, v9
	s_add_i32 s8, s8, 4
	ds_load_b32 v19, v7
	ds_load_b32 v20, v17
	s_cmp_eq_u32 s8, 64
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[17:18], null, v19, v20, v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v17 :: v_dual_add_nc_u32 v7, 64, v7
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_le_u64_e64 s8, s[2:3], s[0:1]
	s_barrier
	buffer_gl0_inv
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB0_2
; %bb.5:                                ; %Flow
	s_mov_b32 s0, 0
	s_branch .LBB0_7
.LBB0_6:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr6
.LBB0_7:                                ; %Flow63
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_9
; %bb.8:                                ; %.._crit_edge_crit_edge
	v_mov_b32_e32 v6, 0
.LBB0_9:                                ; %._crit_edge
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15matrix_multiplyPiS_S_m
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15matrix_multiplyPiS_S_m, .Lfunc_end0-_Z15matrix_multiplyPiS_S_m
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 564
; NumSgprs: 18
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15matrix_multiplyPiS_S_m
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15matrix_multiplyPiS_S_m.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
