// System includes
#include <stdio.h>

// CUDA runtime
#include <cuda_runtime.h>
extern const int rrmax=16;

void matvec_serial(double *A, double *x, double *y, int n) {
    printf("hello in subroutine \n");

    for(int j=0;j<n;++j){
      y[j] = 0;
      for(int i=0;i<n;++i){
	y[j] = y[j] + A[i + n*j] * x[i];
      }
    }

}




__global__ void matvec_cudav1(double *A, double *x, double *y, int n) {

    for(int j=threadIdx.x+blockIdx.x*blockDim.x;j<n;j+=blockDim.x*gridDim.x){
      y[j] = 0;
      for(int i=0;i<n;++i){
	y[j] = y[j] + A[i + n*j] * x[i];
      }
    }

}


__global__ void matvec_cudav2(double *A, double *x, double *y, int n) {
  
  //int const rrmax=32;
  extern __shared__ double s[];
  double *A_s= &s[0];
  double *x_s= &A_s[blockDim.x*rrmax];
  double *y_s= &x_s[blockDim.x];
  
  //__shared__ double A_s[blockDim.x*rrmax];
  //__shared__ double x_s[blockDim.x];
  //__shared__ double y_s[rrmax];

    // this code assumes enough blocks are launched to cover the space.
    // TODO fix up a outer loop over rows to handle less blocks.

    for(int q=threadIdx.x; q<n; q+= blockDim.x){
      // load a section of x into shared memory:
      x_s[threadIdx.x] = x[q];
      for( int rr=0; rr<rrmax; rr++ ){
	// load a partial row of matrix A into shared memory tile
	A_s[threadIdx.x + rr*blockDim.x] = A[q + rr*n + blockIdx.x*rrmax*n];
      }

      __syncthreads();
      // use the partials that you loaded to have each thread
      // compute a partial dot product of that row A with partial column x

      for(int rr=threadIdx.x;rr<rrmax;rr+=blockDim.x){
	y_s[rr] = 0;
	for(int i=0;i<blockDim.x;++i){
	  y_s[rr] = y_s[rr] + A_s[i + rrmax*rr] * x_s[i];
	}
	// accumulate shared memory result into global y
	y[rr + blockIdx.x*rrmax] = y[rr + blockIdx.x*rrmax] + y_s[rr];
      }
    }

}



__global__ void matvec_cudav3(double *A, double *x, double *y, int n) {
  
  //int const rrmax=32;
  extern __shared__ double s[];
  double *A_s= &s[0];
  double *x_s= &A_s[blockDim.x*rrmax];
  //double *y_s= &x_s[blockDim.x];
  double tmp;
    // this code assumes enough blocks are launched to cover the space.
    // TODO fix up a outer loop over rows to handle less blocks.

    for(int q=threadIdx.x; q<n; q+= blockDim.x){
      // load a section of x into shared memory:
      x_s[threadIdx.x] = x[q];
      for( int rr=0; rr<rrmax; rr++ ){
	// load a partial row of matrix A into shared memory tile
	A_s[threadIdx.x + rr*blockDim.x] = A[q + rr*n + blockIdx.x*rrmax*n];
      }

      __syncthreads();
      // use the partials that you loaded to have each thread
      // compute a partial dot product of that row A with partial column x

      for(int rr=threadIdx.x;rr<rrmax;rr+=blockDim.x){
	tmp = 0;
	for(int i=0;i<blockDim.x;++i){
	  tmp = tmp + A_s[i + rrmax*rr] * x_s[i];
	}
	// accumulate shared memory result into global y
	y[rr + blockIdx.x*rrmax] = y[rr + blockIdx.x*rrmax] + tmp;
      }
    }

}




/**
 * Program main
 */
int main(int argc, char **argv) {
    printf("[Matrix Vector Multiply Example CUDA] - Starting...\n");

    int n;

    if(argc < 2){
      n = 20*1024;
    }    
    else{
      n = atoi(argv[1]);
    }
    // Allocate memory:
    double *A, *x, *y;
    A = (double*) malloc(n*n*sizeof(*A));
    x = (double*) malloc(n*sizeof(*x));
    y = (double*) malloc(n*sizeof(*y));


    for(int j=0;j<n;++j){
      x[j] = 1;
      for(int i=0;i<n;++i){
    	A[i + n*j]=1;
      }
    }

    matvec_serial(A, x, y, n);

    printf("y[2] = %f \n", y[2]);

    //allocate device arrays
    double *d_A, *d_x, *d_y;
    cudaMalloc( (void**) &d_A, n*n*sizeof(*A));
    cudaMalloc( (void**) &d_x, n*sizeof(*x));
    cudaMalloc( (void**) &d_y, n*sizeof(*y));

    cudaMemcpy(d_A, A, n*n*sizeof(*A), cudaMemcpyHostToDevice);
    cudaMemcpy(d_x, x, n*sizeof(*x), cudaMemcpyHostToDevice);

    int xthreads = 512;
    dim3 blocks(n/xthreads,1,1);
    dim3 threads(xthreads,1,1);
    int shmem = 0;

    matvec_cudav1<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    cudaMemcpy(y, d_y, n*sizeof(*y), cudaMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);

    // Call v2 with shared memory for coalesced reads.

    xthreads = 32;
    //#define rrmax=32
    blocks = dim3(n/xthreads,1,1);
    threads= dim3(xthreads,1,1);
    shmem = (xthreads*rrmax + rrmax + xthreads)*8;

    matvec_cudav2<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    cudaMemcpy(y, d_y, n*sizeof(*y), cudaMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);



    // Call v3 with shared memory, register temps.
    // previous version used shared memory for y[rr]
    // but rr is unique for each thread.x, so why 
    // not keep that value in a thread private tmp (which
    // will be put in to registers by the compiler).


    xthreads = 32;
    //#define rrmax=32
    blocks = dim3(n/xthreads,1,1);
    threads= dim3(xthreads,1,1);
    shmem = (xthreads*rrmax + xthreads)*8;

    matvec_cudav3<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    cudaMemcpy(y, d_y, n*sizeof(*y), cudaMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);


    // Try again with more shared memory carveout:
    int istat = cudaFuncSetCacheConfig(matvec_cudav3,cudaFuncCachePreferShared);
    printf("istat = %i\n",istat);
    xthreads = 64;
    //#define rrmax=32
    blocks = dim3(n/xthreads,1,1);
    threads= dim3(xthreads,1,1);
    shmem = (xthreads*rrmax + xthreads)*8;

    matvec_cudav3<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    cudaDeviceSynchronize();

    cudaMemcpy(y, d_y, n*sizeof(*y), cudaMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);


}


	.file	"tmpxft_003811d2_00000000-6_matVec.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"hello in subroutine \n"
	.text
	.globl	_Z13matvec_serialPdS_S_i
	.type	_Z13matvec_serialPdS_S_i, @function
_Z13matvec_serialPdS_S_i:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%ecx, %ebx
	pushq	%r8
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
	movslq	%ebx, %rsi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	salq	$3, %rsi
.L3:
	cmpl	%eax, %ebx
	jle	.L9
	movq	$0x000000000, (%r12,%rax,8)
	xorl	%ecx, %ecx
.L4:
	movsd	(%rdx,%rcx,8), %xmm0
	mulsd	0(%r13,%rcx,8), %xmm0
	incq	%rcx
	addsd	(%r12,%rax,8), %xmm0
	movsd	%xmm0, (%r12,%rax,8)
	cmpl	%ecx, %ebx
	jg	.L4
	incq	%rax
	addq	%rsi, %rdx
	jmp	.L3
.L9:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z13matvec_serialPdS_S_i, .-_Z13matvec_serialPdS_S_i
	.globl	_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i
	.type	_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i, @function
_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13matvec_cudav1PdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i, .-_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i
	.globl	_Z13matvec_cudav1PdS_S_i
	.type	_Z13matvec_cudav1PdS_S_i, @function
_Z13matvec_cudav1PdS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z13matvec_cudav1PdS_S_i, .-_Z13matvec_cudav1PdS_S_i
	.globl	_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i
	.type	_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i, @function
_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13matvec_cudav2PdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i, .-_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i
	.globl	_Z13matvec_cudav2PdS_S_i
	.type	_Z13matvec_cudav2PdS_S_i, @function
_Z13matvec_cudav2PdS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i
	.cfi_endproc
.LFE2056:
	.size	_Z13matvec_cudav2PdS_S_i, .-_Z13matvec_cudav2PdS_S_i
	.globl	_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i
	.type	_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i, @function
_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13matvec_cudav3PdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i, .-_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i
	.globl	_Z13matvec_cudav3PdS_S_i
	.type	_Z13matvec_cudav3PdS_S_i, @function
_Z13matvec_cudav3PdS_S_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i
	.cfi_endproc
.LFE2058:
	.size	_Z13matvec_cudav3PdS_S_i, .-_Z13matvec_cudav3PdS_S_i
	.section	.rodata.str1.1
.LC2:
	.string	"[Matrix Vector Multiply Example CUDA] - Starting...\n"
.LC4:
	.string	"y[2] = %f \n"
.LC5:
	.string	"istat = %i\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	leaq	.LC2(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$20480, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	decl	%r12d
	jle	.L26
	movq	8(%rbp), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
.L26:
	movl	%ebx, %eax
	movslq	%ebx, %r12
	imull	%ebx, %eax
	salq	$3, %r12
	cltq
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	%r12, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movsd	.LC3(%rip), %xmm0
	movq	%r15, %rcx
	movq	%rax, %rbp
	xorl	%eax, %eax
.L27:
	cmpl	%eax, %ebx
	jle	.L39
	movsd	%xmm0, (%r14,%rax,8)
	xorl	%edx, %edx
.L28:
	movsd	%xmm0, (%rcx,%rdx,8)
	incq	%rdx
	cmpl	%edx, %ebx
	jg	.L28
	incq	%rax
	addq	%r12, %rcx
	jmp	.L27
.L39:
	movl	%ebx, %ecx
	movq	%rbp, %rdx
	movq	%r14, %rsi
	movq	%r15, %rdi
	call	_Z13matvec_serialPdS_S_i
	leaq	.LC4(%rip), %r13
	movsd	16(%rbp), %xmm0
	movb	$1, %al
	movq	%r13, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	movl	$512, %ecx
	xorl	%r9d, %r9d
	cltd
	xorl	%r8d, %r8d
	movl	$1, 68(%rsp)
	idivl	%ecx
	movl	$8388609, %edx
	movl	$1, %ecx
	salq	$9, %rdx
	movq	%rdx, 60(%rsp)
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z38__device_stub__Z13matvec_cudav1PdS_S_iPdS_S_i
.L30:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movsd	16(%rbp), %xmm0
	movq	%r13, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movl	$32, %ecx
	movl	56(%rsp), %esi
	cltd
	xorl	%r9d, %r9d
	movl	$32, 60(%rsp)
	movl	$4480, %r8d
	idivl	%ecx
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	movl	%eax, 48(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z38__device_stub__Z13matvec_cudav2PdS_S_iPdS_S_i
.L31:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movsd	16(%rbp), %xmm0
	movq	%r13, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	movl	$4352, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i
.L32:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movsd	16(%rbp), %xmm0
	movq	%r13, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1, %esi
	leaq	_Z13matvec_cudav3PdS_S_i(%rip), %rdi
	call	cudaFuncSetCacheConfig@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebx, %eax
	movl	$64, %ecx
	movl	56(%rsp), %esi
	cltd
	xorl	%r9d, %r9d
	movl	$64, 60(%rsp)
	movl	$8704, %r8d
	idivl	%ecx
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	movl	%eax, 48(%rsp)
	movq	48(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %ecx
	movq	24(%rsp), %rdi
	call	_Z38__device_stub__Z13matvec_cudav3PdS_S_iPdS_S_i
.L33:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movq	%rbp, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movsd	16(%rbp), %xmm0
	movq	%r13, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z13matvec_cudav3PdS_S_i"
.LC7:
	.string	"_Z13matvec_cudav2PdS_S_i"
.LC8:
	.string	"_Z13matvec_cudav1PdS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13matvec_cudav3PdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13matvec_cudav2PdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13matvec_cudav1PdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	rrmax
	.section	.rodata
	.align 4
	.type	rrmax, @object
	.size	rrmax, 4
rrmax:
	.long	16
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// System includes
#include <stdio.h>

// CUDA runtime
#include <hip/hip_runtime.h>
extern const int rrmax=16;

void matvec_serial(double *A, double *x, double *y, int n) {
    printf("hello in subroutine \n");

    for(int j=0;j<n;++j){
      y[j] = 0;
      for(int i=0;i<n;++i){
	y[j] = y[j] + A[i + n*j] * x[i];
      }
    }

}




__global__ void matvec_cudav1(double *A, double *x, double *y, int n) {

    for(int j=threadIdx.x+blockIdx.x*blockDim.x;j<n;j+=blockDim.x*gridDim.x){
      y[j] = 0;
      for(int i=0;i<n;++i){
	y[j] = y[j] + A[i + n*j] * x[i];
      }
    }

}


__global__ void matvec_cudav2(double *A, double *x, double *y, int n) {
  
  //int const rrmax=32;
  extern __shared__ double s[];
  double *A_s= &s[0];
  double *x_s= &A_s[blockDim.x*rrmax];
  double *y_s= &x_s[blockDim.x];
  
  //__shared__ double A_s[blockDim.x*rrmax];
  //__shared__ double x_s[blockDim.x];
  //__shared__ double y_s[rrmax];

    // this code assumes enough blocks are launched to cover the space.
    // TODO fix up a outer loop over rows to handle less blocks.

    for(int q=threadIdx.x; q<n; q+= blockDim.x){
      // load a section of x into shared memory:
      x_s[threadIdx.x] = x[q];
      for( int rr=0; rr<rrmax; rr++ ){
	// load a partial row of matrix A into shared memory tile
	A_s[threadIdx.x + rr*blockDim.x] = A[q + rr*n + blockIdx.x*rrmax*n];
      }

      __syncthreads();
      // use the partials that you loaded to have each thread
      // compute a partial dot product of that row A with partial column x

      for(int rr=threadIdx.x;rr<rrmax;rr+=blockDim.x){
	y_s[rr] = 0;
	for(int i=0;i<blockDim.x;++i){
	  y_s[rr] = y_s[rr] + A_s[i + rrmax*rr] * x_s[i];
	}
	// accumulate shared memory result into global y
	y[rr + blockIdx.x*rrmax] = y[rr + blockIdx.x*rrmax] + y_s[rr];
      }
    }

}



__global__ void matvec_cudav3(double *A, double *x, double *y, int n) {
  
  //int const rrmax=32;
  extern __shared__ double s[];
  double *A_s= &s[0];
  double *x_s= &A_s[blockDim.x*rrmax];
  //double *y_s= &x_s[blockDim.x];
  double tmp;
    // this code assumes enough blocks are launched to cover the space.
    // TODO fix up a outer loop over rows to handle less blocks.

    for(int q=threadIdx.x; q<n; q+= blockDim.x){
      // load a section of x into shared memory:
      x_s[threadIdx.x] = x[q];
      for( int rr=0; rr<rrmax; rr++ ){
	// load a partial row of matrix A into shared memory tile
	A_s[threadIdx.x + rr*blockDim.x] = A[q + rr*n + blockIdx.x*rrmax*n];
      }

      __syncthreads();
      // use the partials that you loaded to have each thread
      // compute a partial dot product of that row A with partial column x

      for(int rr=threadIdx.x;rr<rrmax;rr+=blockDim.x){
	tmp = 0;
	for(int i=0;i<blockDim.x;++i){
	  tmp = tmp + A_s[i + rrmax*rr] * x_s[i];
	}
	// accumulate shared memory result into global y
	y[rr + blockIdx.x*rrmax] = y[rr + blockIdx.x*rrmax] + tmp;
      }
    }

}




/**
 * Program main
 */
int main(int argc, char **argv) {
    printf("[Matrix Vector Multiply Example CUDA] - Starting...\n");

    int n;

    if(argc < 2){
      n = 20*1024;
    }    
    else{
      n = atoi(argv[1]);
    }
    // Allocate memory:
    double *A, *x, *y;
    A = (double*) malloc(n*n*sizeof(*A));
    x = (double*) malloc(n*sizeof(*x));
    y = (double*) malloc(n*sizeof(*y));


    for(int j=0;j<n;++j){
      x[j] = 1;
      for(int i=0;i<n;++i){
    	A[i + n*j]=1;
      }
    }

    matvec_serial(A, x, y, n);

    printf("y[2] = %f \n", y[2]);

    //allocate device arrays
    double *d_A, *d_x, *d_y;
    hipMalloc( (void**) &d_A, n*n*sizeof(*A));
    hipMalloc( (void**) &d_x, n*sizeof(*x));
    hipMalloc( (void**) &d_y, n*sizeof(*y));

    hipMemcpy(d_A, A, n*n*sizeof(*A), hipMemcpyHostToDevice);
    hipMemcpy(d_x, x, n*sizeof(*x), hipMemcpyHostToDevice);

    int xthreads = 512;
    dim3 blocks(n/xthreads,1,1);
    dim3 threads(xthreads,1,1);
    int shmem = 0;

    matvec_cudav1<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    hipMemcpy(y, d_y, n*sizeof(*y), hipMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);

    // Call v2 with shared memory for coalesced reads.

    xthreads = 32;
    //#define rrmax=32
    blocks = dim3(n/xthreads,1,1);
    threads= dim3(xthreads,1,1);
    shmem = (xthreads*rrmax + rrmax + xthreads)*8;

    matvec_cudav2<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    hipMemcpy(y, d_y, n*sizeof(*y), hipMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);



    // Call v3 with shared memory, register temps.
    // previous version used shared memory for y[rr]
    // but rr is unique for each thread.x, so why 
    // not keep that value in a thread private tmp (which
    // will be put in to registers by the compiler).


    xthreads = 32;
    //#define rrmax=32
    blocks = dim3(n/xthreads,1,1);
    threads= dim3(xthreads,1,1);
    shmem = (xthreads*rrmax + xthreads)*8;

    matvec_cudav3<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    hipMemcpy(y, d_y, n*sizeof(*y), hipMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);


    // Try again with more shared memory carveout:
    int istat = hipFuncSetCacheConfig(reinterpret_cast<const void*>(matvec_cudav3),hipFuncCachePreferShared);
    printf("istat = %i\n",istat);
    xthreads = 64;
    //#define rrmax=32
    blocks = dim3(n/xthreads,1,1);
    threads= dim3(xthreads,1,1);
    shmem = (xthreads*rrmax + xthreads)*8;

    matvec_cudav3<<<blocks,threads,shmem,0 >>>(d_A, d_x, d_y, n);    

    hipDeviceSynchronize();

    hipMemcpy(y, d_y, n*sizeof(*y), hipMemcpyDeviceToHost);

    printf("y[2] = %f \n", y[2]);


}


	.text
	.file	"matVec.hip"
	.globl	_Z13matvec_serialPdS_S_i        # -- Begin function _Z13matvec_serialPdS_S_i
	.type	_Z13matvec_serialPdS_S_i,@function
_Z13matvec_serialPdS_S_i:               # @_Z13matvec_serialPdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	$.Lstr, %edi
	callq	puts@PLT
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.1:                                # %.lr.ph22
	movl	%ebx, %eax
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	%ecx, %esi
	leaq	(%r12,%rsi,8), %rsi
	movq	$0, (%r14,%rdx,8)
	xorpd	%xmm0, %xmm0
	xorl	%edi, %edi
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rsi,%rdi,8), %xmm1            # xmm1 = mem[0],zero
	mulsd	(%r15,%rdi,8), %xmm1
	addsd	%xmm1, %xmm0
	movsd	%xmm0, (%r14,%rdx,8)
	incq	%rdi
	cmpq	%rdi, %rax
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%rdx
	addl	%ebx, %ecx
	cmpq	%rax, %rdx
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge23
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z13matvec_serialPdS_S_i, .Lfunc_end0-_Z13matvec_serialPdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__matvec_cudav1PdS_S_i # -- Begin function _Z28__device_stub__matvec_cudav1PdS_S_i
	.type	_Z28__device_stub__matvec_cudav1PdS_S_i,@function
_Z28__device_stub__matvec_cudav1PdS_S_i: # @_Z28__device_stub__matvec_cudav1PdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13matvec_cudav1PdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__matvec_cudav1PdS_S_i, .Lfunc_end1-_Z28__device_stub__matvec_cudav1PdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__matvec_cudav2PdS_S_i # -- Begin function _Z28__device_stub__matvec_cudav2PdS_S_i
	.type	_Z28__device_stub__matvec_cudav2PdS_S_i,@function
_Z28__device_stub__matvec_cudav2PdS_S_i: # @_Z28__device_stub__matvec_cudav2PdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13matvec_cudav2PdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z28__device_stub__matvec_cudav2PdS_S_i, .Lfunc_end2-_Z28__device_stub__matvec_cudav2PdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__matvec_cudav3PdS_S_i # -- Begin function _Z28__device_stub__matvec_cudav3PdS_S_i
	.type	_Z28__device_stub__matvec_cudav3PdS_S_i,@function
_Z28__device_stub__matvec_cudav3PdS_S_i: # @_Z28__device_stub__matvec_cudav3PdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13matvec_cudav3PdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__matvec_cudav3PdS_S_i, .Lfunc_end3-_Z28__device_stub__matvec_cudav3PdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movl	%edi, %ebp
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$20480, %ebx                    # imm = 0x5000
	cmpl	$2, %ebp
	jl	.LBB4_2
# %bb.1:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
.LBB4_2:
	movl	%ebx, %r13d
	imull	%r13d, %r13d
	shlq	$3, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbp
	movslq	%ebx, %r15
	leaq	(,%r15,8), %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	testl	%r15d, %r15d
	jle	.LBB4_7
# %bb.3:                                # %.lr.ph188
	movl	%ebx, %eax
	xorl	%ecx, %ecx
	movabsq	$4607182418800017408, %rdx      # imm = 0x3FF0000000000000
	xorl	%esi, %esi
.LBB4_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_5 Depth 2
	movl	%ecx, %edi
	leaq	(,%rdi,8), %rdi
	addq	%rbp, %rdi
	movq	%rdx, (%r14,%rsi,8)
	xorl	%r8d, %r8d
.LBB4_5:                                #   Parent Loop BB4_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%rdx, (%rdi,%r8,8)
	incq	%r8
	cmpq	%r8, %rax
	jne	.LBB4_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB4_4 Depth=1
	incq	%rsi
	addl	%ebx, %ecx
	cmpq	%rax, %rsi
	jne	.LBB4_4
.LBB4_7:                                # %._crit_edge189
	movq	%rbp, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	callq	_Z13matvec_serialPdS_S_i
	movsd	16(%r12), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	%r12, 24(%rsp)                  # 8-byte Spill
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	32(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	%rbp, %rsi
	movabsq	$4294967296, %rbp               # imm = 0x100000000
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	511(%rbx), %edi
	testl	%ebx, %ebx
	cmovnsl	%ebx, %edi
	sarl	$9, %edi
	btsq	$32, %rdi
	leaq	512(%rbp), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_9
# %bb.8:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z28__device_stub__matvec_cudav1PdS_S_i
.LBB4_9:
	movq	(%rsp), %rsi
	movq	24(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	16(%r12), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	leal	31(%rbx), %r14d
	testl	%ebx, %ebx
	cmovnsl	%ebx, %r14d
	sarl	$5, %r14d
	orq	%rbp, %r14
	leaq	32(%rbp), %r13
	movl	$4480, %r8d                     # imm = 0x1180
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_11
# %bb.10:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z28__device_stub__matvec_cudav2PdS_S_i
.LBB4_11:
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	16(%r12), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movl	$4352, %r8d                     # imm = 0x1100
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_13
# %bb.12:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z28__device_stub__matvec_cudav3PdS_S_i
.LBB4_13:
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	16(%r12), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movl	$_Z13matvec_cudav3PdS_S_i, %edi
	movl	$1, %esi
	callq	hipFuncSetCacheConfig
	movl	$.L.str.3, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	leal	63(%rbx), %edi
	testl	%ebx, %ebx
	cmovnsl	%ebx, %edi
	sarl	$6, %edi
	orq	%rbp, %rdi
	addq	$64, %rbp
	movl	$8704, %r8d                     # imm = 0x2200
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_15
# %bb.14:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z28__device_stub__matvec_cudav3PdS_S_i
.LBB4_15:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movsd	16(%r12), %xmm0                 # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13matvec_cudav1PdS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13matvec_cudav2PdS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13matvec_cudav3PdS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	rrmax,@object                   # @rrmax
	.section	.rodata,"a",@progbits
	.globl	rrmax
	.p2align	2, 0x0
rrmax:
	.long	16                              # 0x10
	.size	rrmax, 4

	.type	_Z13matvec_cudav1PdS_S_i,@object # @_Z13matvec_cudav1PdS_S_i
	.globl	_Z13matvec_cudav1PdS_S_i
	.p2align	3, 0x0
_Z13matvec_cudav1PdS_S_i:
	.quad	_Z28__device_stub__matvec_cudav1PdS_S_i
	.size	_Z13matvec_cudav1PdS_S_i, 8

	.type	_Z13matvec_cudav2PdS_S_i,@object # @_Z13matvec_cudav2PdS_S_i
	.globl	_Z13matvec_cudav2PdS_S_i
	.p2align	3, 0x0
_Z13matvec_cudav2PdS_S_i:
	.quad	_Z28__device_stub__matvec_cudav2PdS_S_i
	.size	_Z13matvec_cudav2PdS_S_i, 8

	.type	_Z13matvec_cudav3PdS_S_i,@object # @_Z13matvec_cudav3PdS_S_i
	.globl	_Z13matvec_cudav3PdS_S_i
	.p2align	3, 0x0
_Z13matvec_cudav3PdS_S_i:
	.quad	_Z28__device_stub__matvec_cudav3PdS_S_i
	.size	_Z13matvec_cudav3PdS_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"y[2] = %f \n"
	.size	.L.str.2, 12

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"istat = %i\n"
	.size	.L.str.3, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13matvec_cudav1PdS_S_i"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13matvec_cudav2PdS_S_i"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z13matvec_cudav3PdS_S_i"
	.size	.L__unnamed_3, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"hello in subroutine "
	.size	.Lstr, 21

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"[Matrix Vector Multiply Example CUDA] - Starting..."
	.size	.Lstr.1, 52

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__matvec_cudav1PdS_S_i
	.addrsig_sym _Z28__device_stub__matvec_cudav2PdS_S_i
	.addrsig_sym _Z28__device_stub__matvec_cudav3PdS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13matvec_cudav1PdS_S_i
	.addrsig_sym _Z13matvec_cudav2PdS_S_i
	.addrsig_sym _Z13matvec_cudav3PdS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13matvec_cudav1PdS_S_i ; -- Begin function _Z13matvec_cudav1PdS_S_i
	.globl	_Z13matvec_cudav1PdS_S_i
	.p2align	8
	.type	_Z13matvec_cudav1PdS_S_i,@function
_Z13matvec_cudav1PdS_S_i:               ; @_Z13matvec_cudav1PdS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.lr.ph25
	s_load_b32 s2, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v3, s8, v1
	v_mov_b32_e32 v5, 0
	s_cmp_gt_i32 s8, 0
	s_mov_b32 s11, 0
	s_cselect_b32 s9, -1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s2, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s12, s10, s8
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 3, v[1:2]
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s9
	global_store_b64 v[7:8], v[5:6], off
	s_cbranch_vccnz .LBB0_5
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	s_mov_b64 s[2:3], s[6:7]
	s_mov_b32 s13, s8
	v_lshlrev_b64 v[11:12], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
.LBB0_4:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b64 v[13:14], v[11:12], off
	global_load_b64 v[15:16], v5, s[2:3]
	v_add_co_u32 v11, vcc_lo, v11, 8
	s_add_i32 s13, s13, -1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s13, 0
	s_waitcnt vmcnt(0)
	v_fma_f64 v[9:10], v[13:14], v[15:16], v[9:10]
	global_store_b64 v[7:8], v[9:10], off
	s_cbranch_scc0 .LBB0_4
.LBB0_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s10, v1
	v_add_nc_u32_e32 v3, s12, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s11, vcc_lo, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_2
.LBB0_6:                                ; %Flow45
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13matvec_cudav1PdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13matvec_cudav1PdS_S_i, .Lfunc_end0-_Z13matvec_cudav1PdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13matvec_cudav2PdS_S_i ; -- Begin function _Z13matvec_cudav2PdS_S_i
	.globl	_Z13matvec_cudav2PdS_S_i
	.p2align	8
	.type	_Z13matvec_cudav2PdS_S_i,@function
_Z13matvec_cudav2PdS_S_i:               ; @_Z13matvec_cudav2PdS_S_i
; %bb.0:
	s_load_b32 s8, s[0:1], 0x18
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB1_11
; %bb.1:                                ; %.lr.ph52
	s_clause 0x2
	s_load_b32 s9, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 3, v0
	s_lshl_b32 s1, s15, 4
	s_mul_i32 s15, s15, s8
	v_cmp_gt_u32_e64 s0, 16, v0
	v_lshl_add_u32 v6, v0, 7, 0
	v_lshl_add_u32 v7, s15, 4, v0
	v_dual_mov_b32 v3, v0 :: v_dual_add_nc_u32 v8, 0, v1
	s_mov_b32 s15, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s10, s9, 7
	s_lshl_b32 s11, s9, 3
	s_add_i32 s12, s10, 0
	s_add_i32 s13, s12, s11
	v_add_nc_u32_e32 v9, s12, v1
	s_cmp_lg_u32 s9, 0
	s_cselect_b32 s14, -1, 0
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
                                        ;     Child Loop BB1_6 Depth 2
                                        ;       Child Loop BB1_8 Depth 3
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v1, v7
	s_mov_b32 s16, 16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[3:4]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b64 v[10:11], v[4:5], off
	v_mov_b32_e32 v4, v8
	s_waitcnt vmcnt(0)
	ds_store_b64 v9, v[10:11]
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b64 v[10:11], 3, v[1:2]
	v_add_nc_u32_e32 v1, s8, v1
	s_add_i32 s16, s16, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s16, 0
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[10:11]
	v_add_nc_u32_e32 v4, s11, v4
	s_cbranch_scc0 .LBB1_3
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB1_10
; %bb.5:                                ; %.lr.ph48.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_dual_mov_b32 v10, v6 :: v_dual_mov_b32 v11, v0
	s_mov_b32 s17, 0
.LBB1_6:                                ; %.lr.ph48
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_8 Depth 3
	v_dual_mov_b32 v1, v2 :: v_dual_mov_b32 v4, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v12, v11, 3, s13
	v_mov_b32_e32 v5, 0
	s_and_not1_b32 vcc_lo, exec_lo, s14
	ds_store_b64 v12, v[1:2]
	s_cbranch_vccnz .LBB1_9
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_6 Depth=2
	v_mov_b32_e32 v1, v10
	s_mov_b32 s18, s12
	s_mov_b32 s19, s9
.LBB1_8:                                ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v15, s18
	s_add_i32 s19, s19, -1
	s_add_i32 s18, s18, 8
	s_cmp_eq_u32 s19, 0
	ds_load_b64 v[13:14], v1
	ds_load_b64 v[15:16], v15
	v_add_nc_u32_e32 v1, 8, v1
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[4:5], v[13:14], v[15:16], v[4:5]
	ds_store_b64 v12, v[4:5]
	s_cbranch_scc0 .LBB1_8
.LBB1_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_6 Depth=2
	v_add_nc_u32_e32 v1, s1, v11
	v_add_nc_u32_e32 v11, s9, v11
	v_add_nc_u32_e32 v10, s10, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[1:2]
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	v_cmp_lt_u32_e32 vcc_lo, 15, v11
	global_load_b64 v[14:15], v[12:13], off
	s_or_b32 s17, vcc_lo, s17
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[14:15], v[4:5]
	global_store_b64 v[12:13], v[4:5], off
	s_and_not1_b32 exec_lo, exec_lo, s17
	s_cbranch_execnz .LBB1_6
.LBB1_10:                               ; %Flow81
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v3, s9, v3
	v_add_nc_u32_e32 v7, s9, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v3
	s_or_b32 s15, vcc_lo, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB1_2
.LBB1_11:                               ; %Flow83
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13matvec_cudav2PdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13matvec_cudav2PdS_S_i, .Lfunc_end1-_Z13matvec_cudav2PdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 564
; NumSgprs: 22
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13matvec_cudav3PdS_S_i ; -- Begin function _Z13matvec_cudav3PdS_S_i
	.globl	_Z13matvec_cudav3PdS_S_i
	.p2align	8
	.type	_Z13matvec_cudav3PdS_S_i,@function
_Z13matvec_cudav3PdS_S_i:               ; @_Z13matvec_cudav3PdS_S_i
; %bb.0:
	s_load_b32 s8, s[0:1], 0x18
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s8, v0
	s_cbranch_execz .LBB2_11
; %bb.1:                                ; %.lr.ph45
	s_clause 0x2
	s_load_b32 s9, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 3, v0
	s_lshl_b32 s1, s15, 4
	s_mul_i32 s15, s15, s8
	v_cmp_gt_u32_e64 s0, 16, v0
	v_lshl_add_u32 v6, v0, 7, 0
	v_lshl_add_u32 v7, s15, 4, v0
	v_dual_mov_b32 v3, v0 :: v_dual_add_nc_u32 v8, 0, v1
	s_mov_b32 s13, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s10, s9, 7
	s_add_i32 s11, s10, 0
	s_cmp_lg_u32 s9, 0
	v_add_nc_u32_e32 v9, s11, v1
	s_cselect_b32 s12, -1, 0
	s_lshl_b32 s14, s9, 3
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_3 Depth 2
                                        ;     Child Loop BB2_6 Depth 2
                                        ;       Child Loop BB2_8 Depth 3
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v1, v7
	s_mov_b32 s15, 16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[3:4]
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b64 v[10:11], v[4:5], off
	v_mov_b32_e32 v4, v8
	s_waitcnt vmcnt(0)
	ds_store_b64 v9, v[10:11]
.LBB2_3:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b64 v[10:11], 3, v[1:2]
	v_add_nc_u32_e32 v1, s8, v1
	s_add_i32 s15, s15, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s15, 0
	v_add_co_u32 v10, vcc_lo, s4, v10
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v4, v[10:11]
	v_add_nc_u32_e32 v4, s14, v4
	s_cbranch_scc0 .LBB2_3
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB2_10
; %bb.5:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_dual_mov_b32 v10, v6 :: v_dual_mov_b32 v11, v0
	s_mov_b32 s16, 0
.LBB2_6:                                ; %.preheader
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB2_8 Depth 3
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_cbranch_vccnz .LBB2_9
; %bb.7:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_6 Depth=2
	v_mov_b32_e32 v1, v10
	s_mov_b32 s17, s11
	s_mov_b32 s18, s9
.LBB2_8:                                ;   Parent Loop BB2_2 Depth=1
                                        ;     Parent Loop BB2_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_mov_b32_e32 v14, s17
	s_add_i32 s18, s18, -1
	s_add_i32 s17, s17, 8
	s_cmp_eq_u32 s18, 0
	ds_load_b64 v[12:13], v1
	ds_load_b64 v[14:15], v14
	v_add_nc_u32_e32 v1, 8, v1
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[4:5], v[12:13], v[14:15], v[4:5]
	s_cbranch_scc0 .LBB2_8
.LBB2_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB2_6 Depth=2
	v_add_nc_u32_e32 v1, s1, v11
	v_add_nc_u32_e32 v11, s9, v11
	v_add_nc_u32_e32 v10, s10, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[1:2]
	v_add_co_u32 v12, vcc_lo, s2, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
	v_cmp_lt_u32_e32 vcc_lo, 15, v11
	global_load_b64 v[14:15], v[12:13], off
	s_or_b32 s16, vcc_lo, s16
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[4:5], v[14:15]
	global_store_b64 v[12:13], v[4:5], off
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB2_6
.LBB2_10:                               ; %Flow74
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v3, s9, v3
	v_add_nc_u32_e32 v7, s9, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s8, v3
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_2
.LBB2_11:                               ; %Flow76
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13matvec_cudav3PdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z13matvec_cudav3PdS_S_i, .Lfunc_end2-_Z13matvec_cudav3PdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 528
; NumSgprs: 21
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	rrmax                   ; @rrmax
	.type	rrmax,@object
	.section	.rodata,"a",@progbits
	.globl	rrmax
	.p2align	2, 0x0
rrmax:
	.long	16                              ; 0x10
	.size	rrmax, 4

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13matvec_cudav1PdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13matvec_cudav1PdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13matvec_cudav2PdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13matvec_cudav2PdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13matvec_cudav3PdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z13matvec_cudav3PdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
