/*
 *  A classical DFT program that calculates the density profile of hard spheres in a hard box in three dimensions
 *  on graphics cards using C/C++ and the CUDA programming language.
 *  The program employs the original Rosenfeld functional without any correction (such as q3 or tensorial extensions).
 *  It serves as a accompanying information for the paper "Massively parallel GPU-accelerated minimization of classical density functional theory".
 *
 *  The program is a minimal working example and should serve as a starting point for those who aim
 *  to employ GPUs for significantly speeding up their 2D or 3D DFT calculations.
 *  For sake of readability, it is not fully optimized to obtain best performance and less memory usage as possible
 *
 *  The user can choose between single- and double-precision performance. For sufficiently low fluid packing
 *  fractions single precision should always be sufficient.
 *
 *  The equilibrium density profile is calculated via a standard Picard iteration, and convolutions are calculate via Fourier-methods (CUFFT).
 */

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <fstream>
#include <stdarg.h>
#include <limits>
#include <limits.h>
#include <iostream>
#include <cufft.h>

/// MACROS ////////////////////////////////////////////////////////////////////

#define BLOCKS  1024 //NUMBER OF BLOCKS
#define THREADS 128  //THREADS PER BLOCK

#define pi_4 (12.5663706143591729539)  /* 4*pi */
#define pi_2 (6.2831853071795864769)   /* 2*pi */

#define R 1.0 //hard-sphere radius
#define alpha (0.05) //mixing parameter for Picard-iteration
#define MAX_ITER 2500 //maximal iterations to be performed during Picard iteration
#define EPS 1.e-9 //Convergence threshold for density profile

/// FUNCTION DECLARATIONS ///////////////////////////////////////////////////////

//host functions
void freeDevice();
void define_cufftPlans();
void choose_device();
template <class rtype, class ctype> void allocateMemory();
template <class rtype, class ctype> void iterate();
template <class rtype, class ctype> void weightedDensities();
template <class rtype, class ctype> void variation();
template <class rtype> void writeData(bool fullProfile);

//device functions
template <class rtype, class ctype> __device__  void complexRealImMult(const ctype &a, ctype &c, const rtype &b, bool real);
template <class ctype> __device__  ctype operator+(const ctype &a, const ctype &b);
template <class ctype> __device__  ctype operator-(const ctype &a, const ctype &b);
template <class rtype> __global__ void initDensity(rtype *rho, int N, int M, int L);
template <class rtype> __global__ void initWeightFunctions(rtype *wF, int N, int M, int L);
template <class rtype> __global__ void mixing_step(rtype *rho, rtype* c1, rtype mu, int N, int M, int L);
template <class rtype, class ctype> __global__ void weightedDensitiesFourier(ctype *frho, rtype *fwF, ctype *fwD, int N, int M, int L);
template <class rtype, class ctype> __global__ void variationFourier(ctype *fwD, rtype *fwF, ctype *fc1, int N, int M, int L);

/// VARIABLE DECLARATIONS ///////////////////////////////////////////////////////

int N = 128; //Number of grid points in x-direction
int M = 128; //Number of grid points in y-direction
int L = 128; //Number of grid points in z-direction

double Lx; //System size in x-direction
double Ly; //System size in y-direction
double Lz; //System size in z-direction

double dx; //spatial resolution in x-direction
double dy; //spatial resolution in y-direction
double dz; //spatial resolution in z-direction

bool running = true; //flag controlling the termination of the Picard iteration
bool precision = 0; //Sets the precision by user input
bool fullProfile = 0; //flag controlling whether full 3D program should be written or not
int	iterCount = 0; //counter variable for Picard iteration
double diff = 0.;
double eta, rhob; //fluid packing fraction and density (always in double precision)

//host arrays (real)
void *rho;
void *wD;
void *c1;
void *blockSum;

//device arrays (real)
void *rho_dev;
void *rho_old_dev;
void *wD_dev;
void *fwF_dev;
void *c1_dev;
void *blockSum_dev;

//device arrays (complex)
void *frho_dev;
void *fc1_dev;
void *fgrad_rho_dev;
void *fgrad_c1_dev;
void *fwD_dev;

//FFT plans
cufftHandle plan_3d_forward;
cufftHandle plan_3d_inverse;

cufftHandle plan_3d_many_5_forward;
cufftHandle plan_3d_many_5_inverse;

cufftHandle plan_3d_many_3_forward;
cufftHandle plan_3d_many_3_inverse;


/// FUNCTION DEFINITIONS ///////////////////////////////////////////////////////

//Multiplication of complex number with purely real number or purely imaginary number
template <class rtype, class ctype> __device__  void complexRealImMult(const ctype &a, ctype &c, const rtype &b, bool real)
{
	if(real)
	{
		c.x = a.x*b;
		c.y = a.y*b;
	}
	else
	{
		c.x = -a.y*b;
		c.y = a.x*b;
	}
}

//Overload the '+' operator to define addition of complex numbers
template <class ctype> __device__  ctype operator+(const ctype &a, const ctype &b)
{
	ctype res;

	res.x = a.x + b.x;
	res.y = a.y + b.y;

	return res;
}

//Overload the '-' operator to define subtraction of complex numbers
template <class ctype> __device__  ctype operator-(const ctype &a, const ctype &b)
{
	ctype res;

	res.x = a.x - b.x;
	res.y = a.y - b.y;

	return res;
}

//very inefficient solution to correct the density at the walls ;-), but has not much impact on total computation time
template <class rtype>
__global__ void prepareDensity(rtype *rho, bool forward, int N, int M, int L, double dx, double dy, double dz)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	int i, j, k, ijk, dummy;
	int SIZE = N*M*L;

	int R_N_x = (int) (R/dx);
	int R_N_y = (int) (R/dy);
	int R_N_z = (int) (R/dz);

	for(ijk = threadIndex; ijk < SIZE; ijk += numOfThreads)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if(forward)
		{
			if(i == 2*R_N_x || j == 2*R_N_y || k == 2*R_N_z) rho[ijk] *= 0.5;

			if(i == N - 2*R_N_x -1 || j == M - 2*R_N_y -  1|| k == L - 2*R_N_z - 1) rho[ijk] *= 0.5;
		}
		else
		{
			if(i == 2*R_N_x || j == 2*R_N_y || k == 2*R_N_z) rho[ijk] /= 0.5;

			if(i == N - 2*R_N_x - 1 || j == M - 2*R_N_y - 1 || k == L - 2*R_N_z - 1) rho[ijk] /= 0.5;
		}
	}
}

//initialize the density within a hard box
template <class rtype>
__global__ void initDensity(rtype *rho, int N, int M, int L, double dx, double dy, double dz, double rhob)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	int i, j, k, ijk, dummy;

	int R_N_x = (int) (R/dx);
	int R_N_y = (int) (R/dy);
	int R_N_z = (int) (R/dz);

	for(ijk = threadIndex; ijk < N*M*L; ijk += numOfThreads)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if((i >= 2*R_N_x && i < N - 2*R_N_x) && (j >= 2*R_N_y && j < M - 2*R_N_y) && (k >= 2*R_N_z && k < L - 2*R_N_z))
			rho[ijk] = rhob;
		else
			rho[ijk] = 0.0;
	}
}


//initialize the weight functions in Fourier-space
template <class rtype>
__global__ void initWeightFunctions(rtype *wF, int N, int M, int L, double dx, double dy, double dz)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = gridDim.x*blockDim.x;

	int i, j, k, ijk, dummy;
	rtype kx,ky,kz, k_abs;
	kx = ky = kz = 0.;

	rtype norm = 1./(1.*N*M*L); //this is needed to have the correct normalization after calculating f(r) = FT^(-1) (FT(h(r)*FT(g(r))
	int SIZE2 = N*M*(L/2 + 1);

	for(ijk = threadIndex; ijk < SIZE2; ijk += numOfThreads)
	{
		//extract indices i,j,k from ijk = k + j*DIM(Z) + i*DIM(Y)*DIM(Z)
		dummy = ijk;
		i = dummy/(M*(L/2 + 1));
		dummy -= i*M*(L/2 + 1);
		j = dummy/(L/2 + 1);
		k = dummy % (L/2 + 1);

		if(i <= N/2) kx = pi_2*R*i/(N*dx);
		else kx = -pi_2*(N-i)*R/(N*dx);

		if(j <= M/2) ky = pi_2*R*j/(M*dy);
		else ky = -pi_2*(M-j)*R/(M*dy);

		 kz = pi_2*R*k/(L*dz);

		k_abs = sqrt(kx*kx + ky*ky + kz*kz);

		if(k_abs == 0)
		{
			wF[ijk] = norm*pi_4*R*R*R/3.;
			wF[ijk + SIZE2] = norm*pi_4*R*R;
			wF[ijk + 2*SIZE2] = 0.0;
			wF[ijk + 3*SIZE2] = 0.0;
			wF[ijk + 4*SIZE2] = 0.0;
		}
		else
		{
			wF[ijk] = norm*pi_4*(sin(k_abs*R) - k_abs*R*cos(k_abs*R))/(k_abs*k_abs*k_abs); //w3
			wF[ijk + SIZE2] = norm*pi_4*R*sin(k_abs*R)/k_abs; //w2
			wF[ijk + 2*SIZE2] = -kx*wF[ijk]; //w2vx
			wF[ijk + 3*SIZE2] = -ky*wF[ijk]; //w2vy
			wF[ijk + 4*SIZE2] = -kz*wF[ijk]; //w2vz
		}
	}
}

//calculate the convolution of density and the weight functions in Fourier-space
template <class rtype, class ctype>
__global__ void weightedDensitiesFourier(ctype *frho, rtype *fwF, ctype *fwD, int N, int M, int L)
{
	int index = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	int ijk;
	ctype frho_;
	int SIZE2 = N*M*(L/2 + 1);

	for(ijk = index; ijk < SIZE2; ijk += numOfThreads)
	{
		frho_ = frho[ijk];

		complexRealImMult<rtype, ctype>(frho_, fwD[ijk], fwF[ijk], true);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + SIZE2], fwF[ijk + SIZE2], true);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + 2*SIZE2], fwF[ijk + 2*SIZE2], false);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + 3*SIZE2], fwF[ijk + 3*SIZE2], false);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + 4*SIZE2], fwF[ijk + 4*SIZE2], false);
	}
}

//calculate the direct correlation function c1 in Fourier-space
template <class rtype, class ctype>
__global__ void variationFourier(ctype *fwD, rtype *fwF, ctype *fc1, int N, int M, int L)
{
	int index = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	ctype fc1_n3, fc1_n2, fc1_n2vx, fc1_n2vy, fc1_n2vz;

	int ijk;
	int SIZE2 = N*M*(L/2+1);
	for(ijk = index; ijk < SIZE2; ijk += numOfThreads)
	{
		complexRealImMult<rtype, ctype>(fwD[ijk], fc1_n3 , fwF[ijk], true);
		complexRealImMult<rtype, ctype>(fwD[ijk + SIZE2], fc1_n2, fwF[ijk + SIZE2], true);
		complexRealImMult<rtype, ctype>(fwD[ijk + 2*SIZE2], fc1_n2vx, fwF[ijk + 2*SIZE2], false);
		complexRealImMult<rtype, ctype>(fwD[ijk + 3*SIZE2], fc1_n2vy, fwF[ijk + 3*SIZE2], false);
		complexRealImMult<rtype, ctype>(fwD[ijk + 4*SIZE2], fc1_n2vz, fwF[ijk + 4*SIZE2], false);

		fc1[ijk] = (fc1_n3 + fc1_n2 - (fc1_n2vx + fc1_n2vy +fc1_n2vz));
	}
}



// Calculate the derivatives of the Rosenfeld functional
//Note: the derivatives are stored in the array which previously contained the
//weighted densities
template <class rtype>
__global__ void calcDerivative(rtype *wD, int N, int M, int L)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = gridDim.x*blockDim.x;

	rtype n3, n2, n1, n0;
	rtype n2vx, n2vy, n2vz;
	rtype n1vx, n1vy, n1vz;
	rtype n2vDotn2v;
	rtype n2vDotn1v;
	rtype tmp_n3, tmp_n3_sq, tmp_n3_inv;

	rtype dPhin0, dPhin1, dPhin2;
	rtype dPhin2vx, dPhin2vy, dPhin2vz;

	int SIZE = N*M*L;

	for(int ijk = threadIndex; ijk < SIZE; ijk += numOfThreads)
	{
		n3 = wD[ijk];
		n2 = wD[ijk + SIZE];
		n2vx = wD[ijk + 2*SIZE];
		n2vy = wD[ijk + 3*SIZE];
		n2vz = wD[ijk + 4*SIZE];

		if(n3 > 0.999) n3 = 0.999;
		tmp_n3 = 1.-n3;
		tmp_n3_inv = 1./tmp_n3;
		tmp_n3_sq = tmp_n3*tmp_n3;
		n1 = n2/(pi_4); //assumes R = 1
		n0 = n1; //assumes R = 1

		n1vx = n2vx/(pi_4); //assumes R = 1
		n1vy = n2vy/(pi_4);
		n1vz = n2vz/(pi_4);

		n2vDotn2v = n2vx*n2vx + n2vy*n2vy + n2vz*n2vz;
		n2vDotn1v = n2vx*n1vx + n2vy*n1vy + n2vz*n1vz;

		//the following could be further simplified but is kept for sake of readability
		//dPhi/dn0
		dPhin0 =  -log(1 - n3);
		//dPhi/dn1
		dPhin1 = n2/tmp_n3;
		//dPhi/dn2
		dPhin2 = n1/tmp_n3 + (n2*n2 - n2vDotn2v)/(2*pi_4*tmp_n3_sq);
		//Components of dPhi/dn2v
		dPhin2vx = -n1vx*tmp_n3_inv - (n2vx*n2)/(pi_4*tmp_n3_sq);
		dPhin2vy = -n1vy*tmp_n3_inv - (n2vy*n2)/(pi_4*tmp_n3_sq);
		dPhin2vz = -n1vz*tmp_n3_inv - (n2vz*n2)/(pi_4*tmp_n3_sq);

		//Store dPhi/dn3
		wD[ijk] = n0*tmp_n3_inv
				+ (n1*n2 - n2vDotn1v)/tmp_n3_sq
				  + (n2*n2*n2 - 3.*n2*n2vDotn2v)/(3*pi_4*(tmp_n3)*tmp_n3_sq);

		//Store dPhi/dn2 + (1/4pi)*dPhi/dn1 + (1/4pi)*dPhi/dn0
		wD[ijk + SIZE] = dPhin2 + dPhin1/(pi_4) + dPhin0/(pi_4);

		//Store components of dPhi/dn2v + (1/4pi)*dPhi/dn1v
		wD[ijk + 2*SIZE] = dPhin2vx -  n2vx*tmp_n3_inv/(pi_4);
		wD[ijk + 3*SIZE] = dPhin2vy -  n2vy*tmp_n3_inv/(pi_4);
		wD[ijk + 4*SIZE] = dPhin2vz -  n2vz*tmp_n3_inv/(pi_4);
	}
}


//calculate the weighted densities for a given density profile
template <class rtype, class ctype>
void weightedDensities()
{
	if(precision)
		cufftExecD2Z(plan_3d_forward, (double*) rho_dev, (double2*) frho_dev);
	else
		cufftExecR2C(plan_3d_forward, (float*) rho_dev, (float2*) frho_dev);

	weightedDensitiesFourier<rtype, ctype><<<BLOCKS, THREADS>>>((ctype*) frho_dev, (rtype*) fwF_dev, (ctype*) fwD_dev, N, M, L);

	if(precision)
		cufftExecZ2D(plan_3d_many_5_inverse, (double2*) fwD_dev, (double*) wD_dev);
	else
		cufftExecC2R(plan_3d_many_5_inverse, (float2*) fwD_dev, (float*) wD_dev);
}

//calculate the direct correlation function c1
template <class rtype, class ctype>
void variation()
{
	calcDerivative<<<BLOCKS, THREADS>>>((rtype*) wD_dev, N, M, L);

	if(precision)
		cufftExecD2Z(plan_3d_many_5_forward, (double*) wD_dev, (double2*) fwD_dev);
	else
		cufftExecR2C(plan_3d_many_5_forward, (float*) wD_dev, (float2*) fwD_dev);

	variationFourier<<<BLOCKS, THREADS>>>((ctype*) fwD_dev, (rtype*) fwF_dev, (ctype*) fc1_dev, N, M, L);

	if(precision)
		cufftExecZ2D(plan_3d_inverse, (double2*) fc1_dev, (double*) c1_dev);
	else
		cufftExecC2R(plan_3d_inverse, (float2*) fc1_dev, (float*) c1_dev);
}

//Mixing step of the Picard iteration for determining the equilibrium density profile
template <class rtype>
__global__ void mixing_step(rtype *rho, rtype *c1, rtype *rho_old_dev, rtype mu, int N, int M, int L, double rhob)
{
	int threadIndex = threadIdx.x + blockDim.x*blockIdx.x;
	int numOfThreads = gridDim.x*blockDim.x;

	rtype dummy = 0.0;
	rtype rho_;
	int SIZE = N*M*L;

	for(int ijk = threadIndex; ijk < SIZE; ijk += numOfThreads)
	{
		rho_ = rho[ijk];
		rho_old_dev[ijk] = rho_;
		if(rho_ > 0)
		{
			dummy = rhob*exp(-c1[ijk] + mu);
			rho[ijk] = (1. - alpha)*rho_ + alpha*dummy;
		}
	}
}

//check whether the density profiles converges or not:
//we calculate the square of the euclidian norm of the new
//density profile vs the old density profile
template <class rtype>
__global__ void checkConvergence(rtype *rho, rtype *rho_old, rtype *block_sum, int N, int M, int L)
{
	int index = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = gridDim.x*blockDim.x;

	int threadIndex = threadIdx.x;

	__shared__ rtype thread_sum[THREADS]; //use fast shared memory
	thread_sum[threadIndex] = 0.0;

	rtype tmpSum = 0.;
	rtype tmp = 0.;

	int ijk;
	int SIZE = N*M*L;
	for(ijk = index; ijk < SIZE; ijk += numOfThreads)
	{
		tmp = (rho[ijk] - rho_old[ijk]);
		tmp *= tmp;
		tmpSum += tmp;
	}
	thread_sum[threadIndex] = tmpSum; //store intermediate result in shared memory
	__syncthreads();

	int s = blockDim.x/2;
	while(s != 0)   //sum results in shared memory up; final reslt will reside in thread_sum[0]
	{
		if(threadIndex < s)
		{
			thread_sum[threadIndex] += thread_sum[threadIndex + s];
		}
		s /= 2;
		__syncthreads();
	}

	//store each sum in block_sum dependent on block id
	if(threadIndex == 0)
	{
		block_sum[blockIdx.x] = thread_sum[0];
	}
	__syncthreads();
}


//check whether the solution is converged
template <class rtype>
void converged()
{
	diff = 0.0;
	checkConvergence<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, (rtype*) rho_old_dev, (rtype*) blockSum_dev, N, M, L);
	cudaMemcpy((rtype*) blockSum, (rtype*) blockSum_dev, sizeof(rtype)*BLOCKS, cudaMemcpyDeviceToHost);
	for(int i = 0; i < BLOCKS; i++)
	{
		diff += ((rtype*) blockSum)[i];
	}
	diff *= dx*dy*dz;
	if(diff < EPS || iterCount > MAX_ITER || diff != diff) running = false;
}

// Percus-Yevick excess chemical potential
double muPY()
{
	double hc = eta/(1. - eta);
	return hc*(7.0 + hc*(7.5 + 3*hc)) - log(1-eta);
}

// Percus-Yevick pressure
double pPY()
{
	return rhob*(1. + eta + eta*eta)/pow(1-eta, 3);
}

//Picard iteration for determining the equilibrium density profile
template <class rtype, class ctype>
void iterate()
{
	printf("/////////////////////////////////////////////// \n");
	printf("Picard iteration ... \n");
	iterCount = 0;
	running = true;

	initDensity<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, N, M, L, dx, dy, dz, rhob);
	initWeightFunctions<rtype><<<BLOCKS, THREADS>>>((rtype*) fwF_dev, N, M, L, dx, dy, dz);

	double mu = muPY();
	do
	{
		prepareDensity<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, true, N, M, L, dx, dy, dz); //correct the density
	    weightedDensities<rtype, ctype>(); //weighted densities
		variation<rtype, ctype>(); //calcualte c(1)
		prepareDensity<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, false, N, M, L, dx, dy, dz); //recorrect the density
		mixing_step<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, (rtype*) c1_dev, (rtype*) rho_old_dev, (rtype) mu, N, M, L, rhob); //calculate the new profile
		converged<rtype>(); //check whether the solution has converged
		if(iterCount % 10 == 0) printf("# iteration: %i; diff: %1.10e \n", iterCount, diff);
		iterCount++;

	} while(running);
	printf("Converged after %i iterations! \n", iterCount);
	printf("/////////////////////////////////////////////// \n\n");
	weightedDensities<rtype, ctype>();

}

//write the data to file
template <class rtype>
void writeData(bool fullProfile)
{
	FILE* fP;
	char fln[300];

	//print density along one axis (z-Axis)
	sprintf(fln, "rho_1d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat", Lx, Ly, Lz, eta);
	fP = fopen(fln, "w");
	fprintf(fP, "#Density profile in a box with dimension L^3 along the z-axis (L) where x and y are fixed at x = N/2 and y = M/2 \n");
	unsigned int i,j,k,dummy;
	int R_N_z = (int) (R/dz);
	for(unsigned int ijk = 0; ijk < N*M*L; ijk++)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if((i == N/2) && (j == M/2))
		{
			fprintf(fP,"%1.9e %1.9e %1.9e  \n", (k - L/2.)*dx, ((rtype*) rho)[ijk], ((rtype*) wD)[ijk]);
		}
		if((i == N/2-1) && (j == M/2-1) && k == 2*R_N_z)
			printf("contact: %f \n", ((rtype*) rho)[ijk]);

	}
	printf("bulk pressure: %f \n", pPY());
	fprintf(fP, "\n\n");
	fclose(fP);

	//print 2D density in a plane
	sprintf(fln, "rho_2d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat", Lx, Ly, Lz, eta);
	fP = fopen(fln, "w");
	for(unsigned int ijk = 0; ijk < N*M*L; ijk++)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if((i == N/2))
		{
			fprintf(fP,"%1.9e %1.9e %1.9e  \n", (k - L/2.)*dz, (j - M/2.)*dy, ((rtype*) rho)[ijk]);
		}
	}
	fclose(fP);
	

	if(fullProfile)  //write full density as binary file (to be used e.g. with ImageJ)
	{
		sprintf(fln,"rho_3D_%i_%i_%i_%1.3f", N, M, L, eta);
		FILE *pfile = fopen(fln,"wb");
		fwrite(&((rtype*) rho)[0], sizeof(double), N*M*L, pfile);
		fclose(pfile);
	}
}

//Allocate memory on the device and host
template <class rtype, class ctype>
void allocateMemory()
{
	rho = (rtype*) malloc(sizeof(rtype)*N*M*L);
	c1 = (rtype*) malloc(sizeof(rtype)*N*M*L);
	wD = (rtype*) malloc(sizeof(rtype)*N*M*L*5);
	blockSum = (rtype*) malloc(sizeof(rtype)*BLOCKS);

	cudaMalloc((void**) &blockSum_dev, sizeof(rtype)*BLOCKS);
	cudaMalloc((void**) &rho_dev, sizeof(rtype)*N*M*L);
	cudaMalloc((void**) &rho_old_dev, sizeof(rtype)*N*M*L);
	cudaMalloc((void**) &c1_dev, sizeof(rtype)*N*M*L);
	cudaMalloc((void**) &wD_dev, sizeof(rtype)*N*M*L*5);
	cudaMalloc((void**) &fwF_dev, sizeof(rtype)*N*M*(L/2 + 1)*5);

	cudaMalloc((void**) &frho_dev, sizeof(ctype)*N*M*(L/2 + 1));
	cudaMalloc((void**) &fc1_dev, sizeof(ctype)*N*M*(L/2 + 1));
	cudaMalloc((void**) &fwD_dev, sizeof(ctype)*N*M*(L/2 + 1)*5);
}

//allocate the cufft plans depending on chosen precision
void define_cufftPlans()
{
	int n[3] = {N, M, L};

	if(precision)
	{
		cufftPlan3d(&plan_3d_forward, N, M, L, CUFFT_D2Z);
		cufftPlan3d(&plan_3d_inverse, N, M, L, CUFFT_Z2D);
		cufftPlanMany(&plan_3d_many_5_inverse, 3, n, NULL, 1, M*N*(L/2 + 1), NULL, 1, M*N*L, CUFFT_Z2D, 5);
		cufftPlanMany(&plan_3d_many_5_forward, 3, n, NULL, 1, M*N*L, NULL, 1, N*M*(L/2 + 1), CUFFT_D2Z, 5);
	}
	else
	{
		cufftPlan3d(&plan_3d_forward, N, M, L, CUFFT_R2C);
		cufftPlan3d(&plan_3d_inverse, N, M, L, CUFFT_C2R);
		cufftPlanMany(&plan_3d_many_5_inverse, 3, n, NULL, 1, M*N*(L/2 + 1), NULL, 1, M*N*L, CUFFT_C2R, 5);
		cufftPlanMany(&plan_3d_many_5_forward, 3, n, NULL, 1, M*N*L, NULL, 1, N*M*(L/2 + 1), CUFFT_R2C, 5);
	}
}

//free allocated memory
void freeDevice()
{
	cudaFree(rho_dev);
	cudaFree(wD_dev);
	cudaFree(fwF_dev);
	cudaFree(fwD_dev);
	cudaFree(frho_dev);
	cudaFree(c1_dev);
	cudaFree(fc1_dev);
	cudaFree(blockSum_dev);

	free(rho);
	free(wD);
	free(c1);
	free(blockSum);
}

void choose_device()
{
	double globalMem, maxGlobalMem, minUsedMem;
	size_t free_bytes, total_bytes;
	maxGlobalMem = minUsedMem = globalMem = 0.;
	int device = 0;

	//Choosing CUDA device based on device properties
	int numberDevices = 0;
	cudaGetDeviceCount(&numberDevices);
	if(numberDevices == 0)
	{
		printf("ERROR: NO CUDA DEVICE FOUND! \n");
		exit(1);
	}
	minUsedMem = (double) INT_MAX;
	printf("\n ///////////////////////////////////////////////  \n");
	printf("CUDA device properties \n");
	for(int i = 0; i < numberDevices; i++)
	{
		cudaSetDevice(i);
		cudaDeviceProp propDev;
		cudaGetDeviceProperties(&propDev, i);
		cudaMemGetInfo(&free_bytes, &total_bytes);
		double usedMem = ((double) total_bytes - (double) free_bytes)/1024/1024; //in megabytes
		globalMem = (double) propDev.totalGlobalMem/1024./1024.; //in megabytes

		printf("# Device: %i; Curr. used mem.: %1.2f MB; Global mem.: %1.2f MB \n", i, usedMem, globalMem);
		if(globalMem > maxGlobalMem && usedMem < minUsedMem)
		{
			maxGlobalMem = globalMem;
			minUsedMem = usedMem;
			device = i;
		}
	}
	printf("Chosen CUDA device: %i \n", device);
	printf("/////////////////////////////////////////////// \n\n");
	cudaSetDevice(device);
}


int main(int argc, char **argv)
{
	//get the input parameters
	eta = atof(argv[1]);
	Lx = atof(argv[2]);
	Ly = atof(argv[3]);
	Lz = atof(argv[4]);
	precision = atoi(argv[5]);
	fullProfile = atoi(argv[6]);

	//set the spatial resolution
	dx = Lx/N;
	dy = Ly/M;
	dz = Lz/L;

	//set the bulk density
	rhob = 3*eta/(pi_4*R*R*R);

	printf("System size: Lx = %1.3f R; Ly = %1.3f R; Lz = %1.3f R \n", Lx, Ly, Lz);
	printf("Spatial resolution: dx = %1.5f R; dy = %1.5f R; dz = %1.5f R \n", dx, dy, dz);
	printf("Number of grid points: N_x = %i; N_y = %i; N_z = %i \n", N, M, L);

	//choose CUDA device based on memory occupation and amount of global memory
	choose_device();

	define_cufftPlans();

	if(!precision)
	{
		allocateMemory<float, float2>();

		clock_t time_t = clock(),time_end;
		iterate<float, float2>();
		time_end=clock();
		printf("Done after %2.6f seconds \n",(time_end-time_t)/1000000.);

		cudaMemcpy((float*) rho, (float*) rho_dev, sizeof(float)*N*M*L, cudaMemcpyDeviceToHost);
		cudaMemcpy((float*) wD, (float*) wD_dev, sizeof(float)*N*M*L*5, cudaMemcpyDeviceToHost);

		writeData<float>(false);
	}
	else
	{
		allocateMemory<double, double2>();

		clock_t time_t = clock(),time_end;
		iterate<double, double2>();
		time_end=clock();
		printf("Done after %2.6f seconds \n",(time_end-time_t)/1000000.);

		cudaMemcpy((double*) rho, (double*) rho_dev, sizeof(double)*N*M*L, cudaMemcpyDeviceToHost);
		cudaMemcpy((double*) wD, (double*) wD_dev, sizeof(double)*N*M*L*5, cudaMemcpyDeviceToHost);

		writeData<double>(false);
	}
	cudaDeviceSynchronize();


	freeDevice();

	exit(0);
}


	.file	"tmpxft_0026e803_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3822:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3822:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB4543:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE4543:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_ZL67__device_stub__Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii, @function
_ZL67__device_stub__Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii:
.LFB3866:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3866:
	.size	_ZL67__device_stub__Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii, .-_ZL67__device_stub__Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii
	.type	_ZL50__device_stub__Z16checkConvergenceIdEvPT_S1_S1_iiiPdS_S_iii, @function
_ZL50__device_stub__Z16checkConvergenceIdEvPT_S1_S1_iiiPdS_S_iii:
.LFB3874:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16checkConvergenceIdEvPT_S1_S1_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3874:
	.size	_ZL50__device_stub__Z16checkConvergenceIdEvPT_S1_S1_iiiPdS_S_iii, .-_ZL50__device_stub__Z16checkConvergenceIdEvPT_S1_S1_iiiPdS_S_iii
	.type	_ZL49__device_stub__Z11mixing_stepIdEvPT_S1_S1_S0_iiidPdS_S_diiid, @function
_ZL49__device_stub__Z11mixing_stepIdEvPT_S1_S1_S0_iiidPdS_S_diiid:
.LFB3872:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	72(%rsp), %rcx
	movl	%r8d, 24(%rsp)
	movl	%r9d, 20(%rsp)
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3872:
	.size	_ZL49__device_stub__Z11mixing_stepIdEvPT_S1_S1_S0_iiidPdS_S_diiid, .-_ZL49__device_stub__Z11mixing_stepIdEvPT_S1_S1_S0_iiidPdS_S_diiid
	.type	_ZL59__device_stub__Z16variationFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii, @function
_ZL59__device_stub__Z16variationFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii:
.LFB3870:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16variationFourierId7double2EvPT0_PT_S2_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3870:
	.size	_ZL59__device_stub__Z16variationFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii, .-_ZL59__device_stub__Z16variationFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii
	.type	_ZL42__device_stub__Z14calcDerivativeIdEvPT_iiiPdiii, @function
_ZL42__device_stub__Z14calcDerivativeIdEvPT_iiiPdiii:
.LFB3868:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14calcDerivativeIdEvPT_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L20:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3868:
	.size	_ZL42__device_stub__Z14calcDerivativeIdEvPT_iiiPdiii, .-_ZL42__device_stub__Z14calcDerivativeIdEvPT_iiiPdiii
	.type	_ZL50__device_stub__Z19initWeightFunctionsIdEvPT_iiidddPdiiiddd, @function
_ZL50__device_stub__Z19initWeightFunctionsIdEvPT_iiidddPdiiiddd:
.LFB3862:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movsd	%xmm2, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z19initWeightFunctionsIdEvPT_iiiddd(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L24:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3862:
	.size	_ZL50__device_stub__Z19initWeightFunctionsIdEvPT_iiidddPdiiiddd, .-_ZL50__device_stub__Z19initWeightFunctionsIdEvPT_iiidddPdiiiddd
	.type	_ZL43__device_stub__Z11initDensityIdEvPT_iiiddddPdiiidddd, @function
_ZL43__device_stub__Z11initDensityIdEvPT_iiiddddPdiiidddd:
.LFB3860:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 52(%rsp)
	leaq	92(%rsp), %rsi
	movl	%edx, 48(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 44(%rsp)
	leaq	72(%rsp), %rcx
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movsd	%xmm2, 16(%rsp)
	movsd	%xmm3, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11initDensityIdEvPT_iiidddd(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L28:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3860:
	.size	_ZL43__device_stub__Z11initDensityIdEvPT_iiiddddPdiiidddd, .-_ZL43__device_stub__Z11initDensityIdEvPT_iiiddddPdiiidddd
	.type	_ZL66__device_stub__Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii, @function
_ZL66__device_stub__Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii:
.LFB3850:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L32:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3850:
	.size	_ZL66__device_stub__Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii, .-_ZL66__device_stub__Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii
	.type	_ZL50__device_stub__Z16checkConvergenceIfEvPT_S1_S1_iiiPfS_S_iii, @function
_ZL50__device_stub__Z16checkConvergenceIfEvPT_S1_S1_iiiPfS_S_iii:
.LFB3858:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16checkConvergenceIfEvPT_S1_S1_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L36:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3858:
	.size	_ZL50__device_stub__Z16checkConvergenceIfEvPT_S1_S1_iiiPfS_S_iii, .-_ZL50__device_stub__Z16checkConvergenceIfEvPT_S1_S1_iiiPfS_S_iii
	.type	_ZL49__device_stub__Z11mixing_stepIfEvPT_S1_S1_S0_iiidPfS_S_fiiid, @function
_ZL49__device_stub__Z11mixing_stepIfEvPT_S1_S1_S0_iiidPfS_S_fiiid:
.LFB3856:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movss	%xmm0, 20(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L40:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3856:
	.size	_ZL49__device_stub__Z11mixing_stepIfEvPT_S1_S1_S0_iiidPfS_S_fiiid, .-_ZL49__device_stub__Z11mixing_stepIfEvPT_S1_S1_S0_iiidPfS_S_fiiid
	.type	_ZL58__device_stub__Z16variationFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii, @function
_ZL58__device_stub__Z16variationFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii:
.LFB3854:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16variationFourierIf6float2EvPT0_PT_S2_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L44:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3854:
	.size	_ZL58__device_stub__Z16variationFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii, .-_ZL58__device_stub__Z16variationFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii
	.type	_ZL42__device_stub__Z14calcDerivativeIfEvPT_iiiPfiii, @function
_ZL42__device_stub__Z14calcDerivativeIfEvPT_iiiPfiii:
.LFB3852:
	.cfi_startproc
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z14calcDerivativeIfEvPT_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L48:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3852:
	.size	_ZL42__device_stub__Z14calcDerivativeIfEvPT_iiiPfiii, .-_ZL42__device_stub__Z14calcDerivativeIfEvPT_iiiPfiii
	.type	_ZL50__device_stub__Z19initWeightFunctionsIfEvPT_iiidddPfiiiddd, @function
_ZL50__device_stub__Z19initWeightFunctionsIfEvPT_iiidddPfiiiddd:
.LFB3846:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 16(%rsp)
	movsd	%xmm1, 8(%rsp)
	movsd	%xmm2, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z19initWeightFunctionsIfEvPT_iiiddd(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L52:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L54
	call	__stack_chk_fail@PLT
.L54:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3846:
	.size	_ZL50__device_stub__Z19initWeightFunctionsIfEvPT_iiidddPfiiiddd, .-_ZL50__device_stub__Z19initWeightFunctionsIfEvPT_iiidddPfiiiddd
	.type	_ZL43__device_stub__Z11initDensityIfEvPT_iiiddddPfiiidddd, @function
_ZL43__device_stub__Z11initDensityIfEvPT_iiiddddPfiiidddd:
.LFB3844:
	.cfi_startproc
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 52(%rsp)
	leaq	92(%rsp), %rsi
	movl	%edx, 48(%rsp)
	leaq	64(%rsp), %rdx
	movl	%ecx, 44(%rsp)
	leaq	72(%rsp), %rcx
	movsd	%xmm0, 32(%rsp)
	movsd	%xmm1, 24(%rsp)
	movsd	%xmm2, 16(%rsp)
	movsd	%xmm3, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	44(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	72(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z11initDensityIfEvPT_iiidddd(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 208
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L56:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3844:
	.size	_ZL43__device_stub__Z11initDensityIfEvPT_iiiddddPfiiidddd, .-_ZL43__device_stub__Z11initDensityIfEvPT_iiiddddPfiiidddd
	.type	_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0, @function
_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0:
.LFB4544:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	3(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movb	%sil, 3(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 12(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 32(%rsp)
	movsd	%xmm2, 40(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14prepareDensityIdEvPT_biiiddd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L60:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4544:
	.size	_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0, .-_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
	.section	.text._Z14prepareDensityIdEvPT_biiiddd,"axG",@progbits,_Z14prepareDensityIdEvPT_biiiddd,comdat
	.weak	_Z14prepareDensityIdEvPT_biiiddd
	.type	_Z14prepareDensityIdEvPT_biiiddd, @function
_Z14prepareDensityIdEvPT_biiiddd:
.LFB4211:
	.cfi_startproc
	endbr64
	jmp	_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
	.cfi_endproc
.LFE4211:
	.size	_Z14prepareDensityIdEvPT_biiiddd, .-_Z14prepareDensityIdEvPT_biiiddd
	.text
	.type	_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0, @function
_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0:
.LFB4545:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 88(%rsp)
	leaq	3(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movb	%sil, 3(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 12(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	movsd	%xmm0, 24(%rsp)
	movsd	%xmm1, 32(%rsp)
	movsd	%xmm2, 40(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14prepareDensityIfEvPT_biiiddd(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L65:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L67
	call	__stack_chk_fail@PLT
.L67:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4545:
	.size	_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0, .-_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
	.section	.text._Z14prepareDensityIfEvPT_biiiddd,"axG",@progbits,_Z14prepareDensityIfEvPT_biiiddd,comdat
	.weak	_Z14prepareDensityIfEvPT_biiiddd
	.type	_Z14prepareDensityIfEvPT_biiiddd, @function
_Z14prepareDensityIfEvPT_biiiddd:
.LFB4203:
	.cfi_startproc
	endbr64
	jmp	_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
	.cfi_endproc
.LFE4203:
	.size	_Z14prepareDensityIfEvPT_biiiddd, .-_Z14prepareDensityIfEvPT_biiiddd
	.section	.text._Z14calcDerivativeIdEvPT_iii,"axG",@progbits,_Z14calcDerivativeIdEvPT_iii,comdat
	.weak	_Z14calcDerivativeIdEvPT_iii
	.type	_Z14calcDerivativeIdEvPT_iii, @function
_Z14calcDerivativeIdEvPT_iii:
.LFB4213:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z14calcDerivativeIdEvPT_iiiPdiii
	.cfi_endproc
.LFE4213:
	.size	_Z14calcDerivativeIdEvPT_iii, .-_Z14calcDerivativeIdEvPT_iii
	.section	.text._Z14calcDerivativeIfEvPT_iii,"axG",@progbits,_Z14calcDerivativeIfEvPT_iii,comdat
	.weak	_Z14calcDerivativeIfEvPT_iii
	.type	_Z14calcDerivativeIfEvPT_iii, @function
_Z14calcDerivativeIfEvPT_iii:
.LFB4205:
	.cfi_startproc
	endbr64
	jmp	_ZL42__device_stub__Z14calcDerivativeIfEvPT_iiiPfiii
	.cfi_endproc
.LFE4205:
	.size	_Z14calcDerivativeIfEvPT_iii, .-_Z14calcDerivativeIfEvPT_iii
	.section	.text._Z16checkConvergenceIdEvPT_S1_S1_iii,"axG",@progbits,_Z16checkConvergenceIdEvPT_S1_S1_iii,comdat
	.weak	_Z16checkConvergenceIdEvPT_S1_S1_iii
	.type	_Z16checkConvergenceIdEvPT_S1_S1_iii, @function
_Z16checkConvergenceIdEvPT_S1_S1_iii:
.LFB4216:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z16checkConvergenceIdEvPT_S1_S1_iiiPdS_S_iii
	.cfi_endproc
.LFE4216:
	.size	_Z16checkConvergenceIdEvPT_S1_S1_iii, .-_Z16checkConvergenceIdEvPT_S1_S1_iii
	.section	.text._Z16variationFourierId7double2EvPT0_PT_S2_iii,"axG",@progbits,_Z16variationFourierId7double2EvPT0_PT_S2_iii,comdat
	.weak	_Z16variationFourierId7double2EvPT0_PT_S2_iii
	.type	_Z16variationFourierId7double2EvPT0_PT_S2_iii, @function
_Z16variationFourierId7double2EvPT0_PT_S2_iii:
.LFB4214:
	.cfi_startproc
	endbr64
	jmp	_ZL59__device_stub__Z16variationFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii
	.cfi_endproc
.LFE4214:
	.size	_Z16variationFourierId7double2EvPT0_PT_S2_iii, .-_Z16variationFourierId7double2EvPT0_PT_S2_iii
	.section	.text._Z16variationFourierIf6float2EvPT0_PT_S2_iii,"axG",@progbits,_Z16variationFourierIf6float2EvPT0_PT_S2_iii,comdat
	.weak	_Z16variationFourierIf6float2EvPT0_PT_S2_iii
	.type	_Z16variationFourierIf6float2EvPT0_PT_S2_iii, @function
_Z16variationFourierIf6float2EvPT0_PT_S2_iii:
.LFB4206:
	.cfi_startproc
	endbr64
	jmp	_ZL58__device_stub__Z16variationFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii
	.cfi_endproc
.LFE4206:
	.size	_Z16variationFourierIf6float2EvPT0_PT_S2_iii, .-_Z16variationFourierIf6float2EvPT0_PT_S2_iii
	.section	.text._Z16checkConvergenceIfEvPT_S1_S1_iii,"axG",@progbits,_Z16checkConvergenceIfEvPT_S1_S1_iii,comdat
	.weak	_Z16checkConvergenceIfEvPT_S1_S1_iii
	.type	_Z16checkConvergenceIfEvPT_S1_S1_iii, @function
_Z16checkConvergenceIfEvPT_S1_S1_iii:
.LFB4208:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z16checkConvergenceIfEvPT_S1_S1_iiiPfS_S_iii
	.cfi_endproc
.LFE4208:
	.size	_Z16checkConvergenceIfEvPT_S1_S1_iii, .-_Z16checkConvergenceIfEvPT_S1_S1_iii
	.section	.text._Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii,"axG",@progbits,_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii,comdat
	.weak	_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii
	.type	_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii, @function
_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii:
.LFB4212:
	.cfi_startproc
	endbr64
	jmp	_ZL67__device_stub__Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii
	.cfi_endproc
.LFE4212:
	.size	_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii, .-_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii
	.section	.text._Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii,"axG",@progbits,_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii,comdat
	.weak	_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii
	.type	_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii, @function
_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii:
.LFB4204:
	.cfi_startproc
	endbr64
	jmp	_ZL66__device_stub__Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii
	.cfi_endproc
.LFE4204:
	.size	_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii, .-_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii
	.section	.text._Z11initDensityIdEvPT_iiidddd,"axG",@progbits,_Z11initDensityIdEvPT_iiidddd,comdat
	.weak	_Z11initDensityIdEvPT_iiidddd
	.type	_Z11initDensityIdEvPT_iiidddd, @function
_Z11initDensityIdEvPT_iiidddd:
.LFB4209:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11initDensityIdEvPT_iiiddddPdiiidddd
	.cfi_endproc
.LFE4209:
	.size	_Z11initDensityIdEvPT_iiidddd, .-_Z11initDensityIdEvPT_iiidddd
	.section	.text._Z11mixing_stepIdEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z11mixing_stepIdEvPT_S1_S1_S0_iiid,comdat
	.weak	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.type	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid, @function
_Z11mixing_stepIdEvPT_S1_S1_S0_iiid:
.LFB4215:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z11mixing_stepIdEvPT_S1_S1_S0_iiidPdS_S_diiid
	.cfi_endproc
.LFE4215:
	.size	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid, .-_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.section	.text._Z11mixing_stepIfEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z11mixing_stepIfEvPT_S1_S1_S0_iiid,comdat
	.weak	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.type	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid, @function
_Z11mixing_stepIfEvPT_S1_S1_S0_iiid:
.LFB4207:
	.cfi_startproc
	endbr64
	jmp	_ZL49__device_stub__Z11mixing_stepIfEvPT_S1_S1_S0_iiidPfS_S_fiiid
	.cfi_endproc
.LFE4207:
	.size	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid, .-_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.section	.text._Z11initDensityIfEvPT_iiidddd,"axG",@progbits,_Z11initDensityIfEvPT_iiidddd,comdat
	.weak	_Z11initDensityIfEvPT_iiidddd
	.type	_Z11initDensityIfEvPT_iiidddd, @function
_Z11initDensityIfEvPT_iiidddd:
.LFB4200:
	.cfi_startproc
	endbr64
	jmp	_ZL43__device_stub__Z11initDensityIfEvPT_iiiddddPfiiidddd
	.cfi_endproc
.LFE4200:
	.size	_Z11initDensityIfEvPT_iiidddd, .-_Z11initDensityIfEvPT_iiidddd
	.section	.text._Z19initWeightFunctionsIdEvPT_iiiddd,"axG",@progbits,_Z19initWeightFunctionsIdEvPT_iiiddd,comdat
	.weak	_Z19initWeightFunctionsIdEvPT_iiiddd
	.type	_Z19initWeightFunctionsIdEvPT_iiiddd, @function
_Z19initWeightFunctionsIdEvPT_iiiddd:
.LFB4210:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z19initWeightFunctionsIdEvPT_iiidddPdiiiddd
	.cfi_endproc
.LFE4210:
	.size	_Z19initWeightFunctionsIdEvPT_iiiddd, .-_Z19initWeightFunctionsIdEvPT_iiiddd
	.section	.text._Z19initWeightFunctionsIfEvPT_iiiddd,"axG",@progbits,_Z19initWeightFunctionsIfEvPT_iiiddd,comdat
	.weak	_Z19initWeightFunctionsIfEvPT_iiiddd
	.type	_Z19initWeightFunctionsIfEvPT_iiiddd, @function
_Z19initWeightFunctionsIfEvPT_iiiddd:
.LFB4202:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z19initWeightFunctionsIfEvPT_iiidddPfiiiddd
	.cfi_endproc
.LFE4202:
	.size	_Z19initWeightFunctionsIfEvPT_iiiddd, .-_Z19initWeightFunctionsIfEvPT_iiiddd
	.text
	.globl	_Z4muPYv
	.type	_Z4muPYv, @function
_Z4muPYv:
.LFB3811:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movsd	eta(%rip), %xmm1
	movsd	.LC0(%rip), %xmm0
	subsd	%xmm1, %xmm0
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)
	call	log@PLT
	movsd	8(%rsp), %xmm1
	movaps	%xmm0, %xmm2
	movsd	.LC1(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	addsd	.LC2(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	addsd	.LC3(%rip), %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	mulsd	%xmm1, %xmm0
	subsd	%xmm2, %xmm0
	ret
	.cfi_endproc
.LFE3811:
	.size	_Z4muPYv, .-_Z4muPYv
	.globl	_Z3pPYv
	.type	_Z3pPYv, @function
_Z3pPYv:
.LFB3812:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movsd	eta(%rip), %xmm3
	movsd	.LC0(%rip), %xmm0
	movaps	%xmm3, %xmm2
	movaps	%xmm3, %xmm1
	mulsd	%xmm3, %xmm2
	addsd	%xmm0, %xmm1
	subsd	%xmm3, %xmm0
	addsd	%xmm1, %xmm2
	mulsd	rhob(%rip), %xmm2
	movsd	.LC1(%rip), %xmm1
	movsd	%xmm2, 8(%rsp)
	call	pow@PLT
	movsd	8(%rsp), %xmm2
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	divsd	%xmm0, %xmm2
	movaps	%xmm2, %xmm0
	ret
	.cfi_endproc
.LFE3812:
	.size	_Z3pPYv, .-_Z3pPYv
	.globl	_Z17define_cufftPlansv
	.type	_Z17define_cufftPlansv, @function
_Z17define_cufftPlansv:
.LFB3816:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	plan_3d_forward(%rip), %rdi
	leaq	plan_3d_inverse(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	plan_3d_many_5_inverse(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	plan_3d_many_5_forward(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movl	L(%rip), %ecx
	cmpb	$0, precision(%rip)
	leaq	12(%rsp), %rbx
	movl	%esi, 12(%rsp)
	movl	%edx, 16(%rsp)
	movl	%ecx, 20(%rsp)
	je	.L89
	movl	$106, %r8d
	call	cufftPlan3d@PLT
	movl	N(%rip), %esi
	movl	L(%rip), %ecx
	movq	%r13, %rdi
	movl	M(%rip), %edx
	movl	$108, %r8d
	movl	$2, %r13d
	call	cufftPlan3d@PLT
	movl	L(%rip), %ecx
	movl	M(%rip), %r9d
	movq	%r12, %rdi
	imull	N(%rip), %r9d
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 88
	movl	$1, %r8d
	movl	$3, %esi
	movl	%ecx, %eax
	pushq	$5
	.cfi_def_cfa_offset 96
	cltd
	pushq	$108
	.cfi_def_cfa_offset 104
	idivl	%r13d
	imull	%r9d, %ecx
	movq	%rbx, %rdx
	pushq	%rcx
	.cfi_def_cfa_offset 112
	xorl	%ecx, %ecx
	pushq	$1
	.cfi_def_cfa_offset 120
	pushq	$0
	.cfi_def_cfa_offset 128
	incl	%eax
	imull	%eax, %r9d
	call	cufftPlanMany@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 88
	movl	N(%rip), %r9d
	movl	L(%rip), %ecx
	pushq	$5
	.cfi_def_cfa_offset 96
	imull	M(%rip), %r9d
	pushq	$106
	.cfi_def_cfa_offset 104
	jmp	.L93
.L89:
	.cfi_restore_state
	movl	$42, %r8d
	call	cufftPlan3d@PLT
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movq	%r13, %rdi
	movl	N(%rip), %esi
	movl	$44, %r8d
	movl	$2, %r13d
	call	cufftPlan3d@PLT
	movl	L(%rip), %ecx
	movl	$1, %r8d
	movq	%r12, %rdi
	movl	M(%rip), %r9d
	imull	N(%rip), %r9d
	movl	$3, %esi
	movl	%ecx, %eax
	cltd
	idivl	%r13d
	imull	%r9d, %ecx
	incl	%eax
	pushq	%rdx
	.cfi_def_cfa_offset 88
	movq	%rbx, %rdx
	pushq	$5
	.cfi_def_cfa_offset 96
	imull	%eax, %r9d
	pushq	$44
	.cfi_def_cfa_offset 104
	pushq	%rcx
	.cfi_def_cfa_offset 112
	xorl	%ecx, %ecx
	pushq	$1
	.cfi_def_cfa_offset 120
	pushq	$0
	.cfi_def_cfa_offset 128
	call	cufftPlanMany@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 88
	movl	N(%rip), %r9d
	imull	M(%rip), %r9d
	pushq	$5
	.cfi_def_cfa_offset 96
	movl	L(%rip), %ecx
	pushq	$42
	.cfi_def_cfa_offset 104
.L93:
	movl	%ecx, %eax
	movl	$1, %r8d
	movl	$3, %esi
	movq	%rbp, %rdi
	cltd
	idivl	%r13d
	movq	%rbx, %rdx
	incl	%eax
	imull	%r9d, %eax
	imull	%ecx, %r9d
	xorl	%ecx, %ecx
	pushq	%rax
	.cfi_def_cfa_offset 112
	pushq	$1
	.cfi_def_cfa_offset 120
	pushq	$0
	.cfi_def_cfa_offset 128
	call	cufftPlanMany@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L91
	call	__stack_chk_fail@PLT
.L91:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3816:
	.size	_Z17define_cufftPlansv, .-_Z17define_cufftPlansv
	.globl	_Z10freeDevicev
	.type	_Z10freeDevicev, @function
_Z10freeDevicev:
.LFB3817:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	rho_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	wD_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	fwF_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	fwD_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	frho_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	c1_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	fc1_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	blockSum_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	rho(%rip), %rdi
	call	free@PLT
	movq	wD(%rip), %rdi
	call	free@PLT
	movq	c1(%rip), %rdi
	call	free@PLT
	movq	blockSum(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE3817:
	.size	_Z10freeDevicev, .-_Z10freeDevicev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"ERROR: NO CUDA DEVICE FOUND! \n"
.LC7:
	.string	"\n ///////////////////////////////////////////////  \n"
.LC8:
	.string	"CUDA device properties \n"
.LC10:
	.string	"# Device: %i; Curr. used mem.: %1.2f MB; Global mem.: %1.2f MB \n"
.LC11:
	.string	"Chosen CUDA device: %i \n"
.LC12:
	.string	"/////////////////////////////////////////////// \n\n"
	.text
	.globl	_Z13choose_devicev
	.type	_Z13choose_devicev, @function
_Z13choose_devicev:
.LFB3818:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$1104, %rsp
	.cfi_def_cfa_offset 1136
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rdi
	xorl	%eax, %eax
	movl	%eax, 44(%rsp)
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 44(%rsp)
	jne	.L97
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L97:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	.LC4(%rip), %xmm2
	movq	$0x000000000, 8(%rsp)
	movq	%xmm2, %r14
.L98:
	cmpl	%ebx, 44(%rsp)
	jle	.L112
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	leaq	64(%rsp), %rdi
	movl	%ebx, %esi
	call	cudaGetDeviceProperties_v2@PLT
	leaq	56(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMemGetInfo@PLT
	movq	56(%rsp), %rax
	testq	%rax, %rax
	js	.L99
	cvtsi2sdq	%rax, %xmm0
	jmp	.L100
.L99:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm0
	addsd	%xmm0, %xmm0
.L100:
	movq	48(%rsp), %rax
	testq	%rax, %rax
	js	.L101
	cvtsi2sdq	%rax, %xmm1
	jmp	.L102
.L101:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm1
	addsd	%xmm1, %xmm1
.L102:
	movq	352(%rsp), %rax
	subsd	%xmm1, %xmm0
	mulsd	.LC9(%rip), %xmm0
	mulsd	.LC9(%rip), %xmm0
	testq	%rax, %rax
	js	.L103
	cvtsi2sdq	%rax, %xmm1
	jmp	.L104
.L103:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2sdq	%rdx, %xmm1
	addsd	%xmm1, %xmm1
.L104:
	movl	%ebx, %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	mulsd	.LC9(%rip), %xmm1
	movsd	%xmm0, 16(%rsp)
	mulsd	.LC9(%rip), %xmm1
	movsd	%xmm1, 24(%rsp)
	call	__printf_chk@PLT
	movsd	24(%rsp), %xmm1
	comisd	8(%rsp), %xmm1
	jbe	.L105
	movsd	16(%rsp), %xmm0
	movq	%r14, %xmm4
	comisd	%xmm0, %xmm4
	jbe	.L105
	movl	%ebx, %ebp
	movq	%xmm0, %r14
	movsd	%xmm1, 8(%rsp)
.L105:
	incl	%ebx
	jmp	.L98
.L112:
	movl	%ebp, %edx
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rsi
	call	__printf_chk@PLT
	movl	%ebp, %edi
	call	cudaSetDevice@PLT
	movq	1096(%rsp), %rax
	subq	%fs:40, %rax
	je	.L108
	call	__stack_chk_fail@PLT
.L108:
	addq	$1104, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3818:
	.size	_Z13choose_devicev, .-_Z13choose_devicev
	.section	.rodata.str1.1
.LC13:
	.string	"_Z16checkConvergenceIdEvPT_S1_S1_iii"
.LC14:
	.string	"_Z11mixing_stepIdEvPT_S1_S1_S0_iiid"
.LC15:
	.string	"_Z16variationFourierId7double2EvPT0_PT_S2_iii"
.LC16:
	.string	"_Z14calcDerivativeIdEvPT_iii"
.LC17:
	.string	"_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii"
.LC18:
	.string	"_Z14prepareDensityIdEvPT_biiiddd"
.LC19:
	.string	"_Z19initWeightFunctionsIdEvPT_iiiddd"
.LC20:
	.string	"_Z11initDensityIdEvPT_iiidddd"
.LC21:
	.string	"_Z16checkConvergenceIfEvPT_S1_S1_iii"
.LC22:
	.string	"_Z11mixing_stepIfEvPT_S1_S1_S0_iiid"
.LC23:
	.string	"_Z16variationFourierIf6float2EvPT0_PT_S2_iii"
.LC24:
	.string	"_Z14calcDerivativeIfEvPT_iii"
.LC25:
	.string	"_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii"
.LC26:
	.string	"_Z14prepareDensityIfEvPT_biiiddd"
.LC27:
	.string	"_Z19initWeightFunctionsIfEvPT_iiiddd"
.LC28:
	.string	"_Z11initDensityIfEvPT_iiidddd"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3877:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16checkConvergenceIdEvPT_S1_S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16variationFourierId7double2EvPT0_PT_S2_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14calcDerivativeIdEvPT_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14prepareDensityIdEvPT_biiiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19initWeightFunctionsIdEvPT_iiiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11initDensityIdEvPT_iiidddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC21(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z16checkConvergenceIfEvPT_S1_S1_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16variationFourierIf6float2EvPT0_PT_S2_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14calcDerivativeIfEvPT_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14prepareDensityIfEvPT_biiiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z19initWeightFunctionsIfEvPT_iiiddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11initDensityIfEvPT_iiidddd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3877:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._Z14allocateMemoryIf6float2Evv,"axG",@progbits,_Z14allocateMemoryIf6float2Evv,comdat
	.weak	_Z14allocateMemoryIf6float2Evv
	.type	_Z14allocateMemoryIf6float2Evv, @function
_Z14allocateMemoryIf6float2Evv:
.LFB4194:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rax
	.cfi_def_cfa_offset 32
	movslq	M(%rip), %rax
	movslq	N(%rip), %rbx
	imulq	%rax, %rbx
	movslq	L(%rip), %rax
	imulq	%rax, %rbx
	leaq	0(,%rbx,4), %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, rho(%rip)
	call	malloc@PLT
	imulq	$20, %rbx, %rdi
	movl	$2, %ebx
	movq	%rax, c1(%rip)
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, wD(%rip)
	call	malloc@PLT
	movl	$4096, %esi
	leaq	blockSum_dev(%rip), %rdi
	movq	%rax, blockSum(%rip)
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	rho_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	rho_old_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	c1_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	wD_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	imulq	$20, %rsi, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	fwF_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	incl	%eax
	cltq
	imulq	%rax, %rsi
	imulq	$20, %rsi, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	frho_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	incl	%eax
	cltq
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	fc1_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	incl	%eax
	cltq
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	fwD_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	incl	%eax
	cltq
	imulq	%rax, %rsi
	imulq	$40, %rsi, %rsi
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4194:
	.size	_Z14allocateMemoryIf6float2Evv, .-_Z14allocateMemoryIf6float2Evv
	.section	.rodata._Z9writeDataIfEvb.str1.1,"aMS",@progbits,1
.LC29:
	.string	"rho_1d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat"
.LC30:
	.string	"w"
.LC31:
	.string	"#Density profile in a box with dimension L^3 along the z-axis (L) where x and y are fixed at x = N/2 and y = M/2 \n"
.LC33:
	.string	"%1.9e %1.9e %1.9e  \n"
.LC34:
	.string	"contact: %f \n"
.LC35:
	.string	"bulk pressure: %f \n"
.LC36:
	.string	"\n\n"
.LC37:
	.string	"rho_2d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat"
.LC38:
	.string	"rho_3D_%i_%i_%i_%1.3f"
.LC39:
	.string	"wb"
	.section	.text._Z9writeDataIfEvb,"axG",@progbits,_Z9writeDataIfEvb,comdat
	.weak	_Z9writeDataIfEvb
	.type	_Z9writeDataIfEvb, @function
_Z9writeDataIfEvb:
.LFB4196:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$300, %edx
	movl	$2, %esi
	leaq	.LC29(%rip), %rcx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$2, %ebx
	subq	$360, %rsp
	.cfi_def_cfa_offset 416
	movsd	Lx(%rip), %xmm0
	movsd	eta(%rip), %xmm3
	movq	%fs:40, %rax
	movq	%rax, 344(%rsp)
	xorl	%eax, %eax
	movsd	Lz(%rip), %xmm2
	movsd	Ly(%rip), %xmm1
	leaq	44(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	movb	$4, %al
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rdi
	leaq	.LC30(%rip), %rsi
	call	fopen@PLT
	leaq	.LC31(%rip), %rdx
	movl	$2, %esi
	movq	%rax, 16(%rsp)
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movsd	.LC0(%rip), %xmm0
	divsd	dz(%rip), %xmm0
	cvttsd2sil	%xmm0, %r15d
.L118:
	movl	N(%rip), %r10d
	movl	M(%rip), %esi
	movl	L(%rip), %edi
	movl	%r10d, %eax
	imull	%esi, %eax
	imull	%edi, %eax
	cmpl	%eax, %ebp
	jnb	.L134
	movl	%esi, %r8d
	movl	%ebp, %eax
	xorl	%edx, %edx
	imull	%edi, %r8d
	divl	%r8d
	movl	%r8d, %edx
	imull	%eax, %edx
	movl	%eax, %r14d
	movl	%ebp, %eax
	subl	%edx, %eax
	xorl	%edx, %edx
	divl	%edi
	movl	%eax, %r13d
	movl	%r10d, %eax
	movl	%edx, 28(%rsp)
	cltd
	idivl	%ebx
	cmpl	%r14d, %eax
	jne	.L119
	movl	%esi, %eax
	cltd
	idivl	%ebx
	cmpl	%r13d, %eax
	jne	.L119
	movl	28(%rsp), %edx
	cvtsi2sdl	%edi, %xmm1
	movl	%ebp, %eax
	movq	16(%rsp), %rdi
	mulsd	.LC32(%rip), %xmm1
	movl	$2, %esi
	cvtsi2sdq	%rdx, %xmm0
	movq	wD(%rip), %rdx
	cvtss2sd	(%rdx,%rax,4), %xmm2
	movq	rho(%rip), %rdx
	subsd	%xmm1, %xmm0
	mulsd	dx(%rip), %xmm0
	cvtss2sd	(%rdx,%rax,4), %xmm1
	movb	$3, %al
	leaq	.LC33(%rip), %rdx
	call	__fprintf_chk@PLT
.L119:
	movl	N(%rip), %eax
	cltd
	idivl	%ebx
	decl	%eax
	cmpl	%r14d, %eax
	jne	.L122
	movl	M(%rip), %eax
	cltd
	idivl	%ebx
	decl	%eax
	cmpl	%r13d, %eax
	jne	.L122
	movl	28(%rsp), %ecx
	leal	(%r15,%r15), %eax
	cmpl	%ecx, %eax
	jne	.L122
	movq	rho(%rip), %rdx
	movl	%ebp, %eax
	movl	$2, %edi
	leaq	.LC34(%rip), %rsi
	cvtss2sd	(%rdx,%rax,4), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
.L122:
	incl	%ebp
	jmp	.L118
.L134:
	call	_Z3pPYv
	leaq	.LC35(%rip), %rsi
	movb	$1, %al
	xorl	%ebx, %ebx
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	leaq	.LC36(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	16(%rsp), %rdi
	call	fclose@PLT
	movsd	eta(%rip), %xmm3
	movb	$4, %al
	movsd	Lz(%rip), %xmm2
	movq	8(%rsp), %rdi
	movsd	Ly(%rip), %xmm1
	leaq	.LC37(%rip), %rcx
	movl	$300, %edx
	movsd	Lx(%rip), %xmm0
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rdi
	leaq	.LC30(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %rbp
.L124:
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %esi
	movl	%ecx, %eax
	imull	%r8d, %eax
	imull	%esi, %eax
	cmpl	%eax, %ebx
	jnb	.L135
	movl	%r8d, %edi
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	$2, %r9d
	imull	%esi, %edi
	divl	%edi
	movl	%eax, %r10d
	movl	%ecx, %eax
	cltd
	idivl	%r9d
	cmpl	%r10d, %eax
	jne	.L125
	imull	%eax, %edi
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	%ebx, %ecx
	cvtsi2sdl	%r8d, %xmm0
	mulsd	.LC32(%rip), %xmm0
	cvtsi2sdl	%esi, %xmm2
	mulsd	.LC32(%rip), %xmm2
	subl	%edi, %eax
	movq	%rbp, %rdi
	divl	%esi
	movl	$2, %esi
	cvtsi2sdq	%rax, %xmm1
	movl	%edx, %edx
	movq	rho(%rip), %rax
	subsd	%xmm0, %xmm1
	mulsd	dy(%rip), %xmm1
	cvtsi2sdq	%rdx, %xmm0
	leaq	.LC33(%rip), %rdx
	subsd	%xmm2, %xmm0
	mulsd	dz(%rip), %xmm0
	cvtss2sd	(%rax,%rcx,4), %xmm2
	movb	$3, %al
	call	__fprintf_chk@PLT
.L125:
	incl	%ebx
	jmp	.L124
.L135:
	movq	%rbp, %rdi
	call	fclose@PLT
	testb	%r12b, %r12b
	je	.L117
	pushq	%rax
	.cfi_def_cfa_offset 424
	movl	L(%rip), %eax
	leaq	.LC38(%rip), %rcx
	movl	$300, %edx
	movsd	eta(%rip), %xmm0
	movl	M(%rip), %r9d
	movl	$2, %esi
	pushq	%rax
	.cfi_def_cfa_offset 432
	movl	N(%rip), %r8d
	movb	$1, %al
	movq	24(%rsp), %rdi
	call	__sprintf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 424
	popq	%rcx
	.cfi_def_cfa_offset 416
	leaq	.LC39(%rip), %rsi
	movq	8(%rsp), %rdi
	call	fopen@PLT
	movl	N(%rip), %edx
	movl	$8, %esi
	imull	M(%rip), %edx
	imull	L(%rip), %edx
	movq	rho(%rip), %rdi
	movq	%rax, %rbx
	movq	%rax, %rcx
	movslq	%edx, %rdx
	call	fwrite@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
.L117:
	movq	344(%rsp), %rax
	subq	%fs:40, %rax
	je	.L132
	call	__stack_chk_fail@PLT
.L132:
	addq	$360, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4196:
	.size	_Z9writeDataIfEvb, .-_Z9writeDataIfEvb
	.section	.text._Z14allocateMemoryId7double2Evv,"axG",@progbits,_Z14allocateMemoryId7double2Evv,comdat
	.weak	_Z14allocateMemoryId7double2Evv
	.type	_Z14allocateMemoryId7double2Evv, @function
_Z14allocateMemoryId7double2Evv:
.LFB4197:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rax
	.cfi_def_cfa_offset 32
	movslq	M(%rip), %rax
	movslq	N(%rip), %rbx
	imulq	%rax, %rbx
	movslq	L(%rip), %rax
	imulq	%rax, %rbx
	leaq	0(,%rbx,8), %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, rho(%rip)
	call	malloc@PLT
	imulq	$40, %rbx, %rdi
	movl	$2, %ebx
	movq	%rax, c1(%rip)
	call	malloc@PLT
	movl	$8192, %edi
	movq	%rax, wD(%rip)
	call	malloc@PLT
	movl	$8192, %esi
	leaq	blockSum_dev(%rip), %rdi
	movq	%rax, blockSum(%rip)
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	rho_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	rho_old_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	c1_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	wD_dev(%rip), %rdi
	imulq	%rax, %rsi
	movslq	L(%rip), %rax
	imulq	%rax, %rsi
	imulq	$40, %rsi, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	fwF_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	incl	%eax
	cltq
	imulq	%rax, %rsi
	imulq	$40, %rsi, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	frho_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	incl	%eax
	cltq
	imulq	%rax, %rsi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	fc1_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	incl	%eax
	cltq
	imulq	%rax, %rsi
	salq	$4, %rsi
	call	cudaMalloc@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rsi
	leaq	fwD_dev(%rip), %rdi
	imulq	%rax, %rsi
	movl	L(%rip), %eax
	cltd
	idivl	%ebx
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	incl	%eax
	cltq
	imulq	%rax, %rsi
	imulq	$80, %rsi, %rsi
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4197:
	.size	_Z14allocateMemoryId7double2Evv, .-_Z14allocateMemoryId7double2Evv
	.section	.text._Z9writeDataIdEvb,"axG",@progbits,_Z9writeDataIdEvb,comdat
	.weak	_Z9writeDataIdEvb
	.type	_Z9writeDataIdEvb, @function
_Z9writeDataIdEvb:
.LFB4199:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$300, %edx
	movl	$2, %esi
	leaq	.LC29(%rip), %rcx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$2, %ebx
	subq	$360, %rsp
	.cfi_def_cfa_offset 416
	movsd	Lx(%rip), %xmm0
	movsd	eta(%rip), %xmm3
	movq	%fs:40, %rax
	movq	%rax, 344(%rsp)
	xorl	%eax, %eax
	movsd	Lz(%rip), %xmm2
	movsd	Ly(%rip), %xmm1
	leaq	44(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	movb	$4, %al
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rdi
	leaq	.LC30(%rip), %rsi
	call	fopen@PLT
	leaq	.LC31(%rip), %rdx
	movl	$2, %esi
	movq	%rax, 16(%rsp)
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movsd	.LC0(%rip), %xmm0
	divsd	dz(%rip), %xmm0
	cvttsd2sil	%xmm0, %r15d
.L139:
	movl	N(%rip), %r10d
	movl	M(%rip), %esi
	movl	L(%rip), %edi
	movl	%r10d, %eax
	imull	%esi, %eax
	imull	%edi, %eax
	cmpl	%eax, %ebp
	jnb	.L155
	movl	%esi, %r8d
	movl	%ebp, %eax
	xorl	%edx, %edx
	imull	%edi, %r8d
	divl	%r8d
	movl	%r8d, %edx
	imull	%eax, %edx
	movl	%eax, %r14d
	movl	%ebp, %eax
	subl	%edx, %eax
	xorl	%edx, %edx
	divl	%edi
	movl	%eax, %r13d
	movl	%r10d, %eax
	movl	%edx, 28(%rsp)
	cltd
	idivl	%ebx
	cmpl	%r14d, %eax
	jne	.L140
	movl	%esi, %eax
	cltd
	idivl	%ebx
	cmpl	%r13d, %eax
	jne	.L140
	movl	28(%rsp), %edx
	cvtsi2sdl	%edi, %xmm1
	movl	%ebp, %eax
	movq	16(%rsp), %rdi
	mulsd	.LC32(%rip), %xmm1
	movl	$2, %esi
	cvtsi2sdq	%rdx, %xmm0
	movq	wD(%rip), %rdx
	movsd	(%rdx,%rax,8), %xmm2
	movq	rho(%rip), %rdx
	subsd	%xmm1, %xmm0
	mulsd	dx(%rip), %xmm0
	movsd	(%rdx,%rax,8), %xmm1
	movb	$3, %al
	leaq	.LC33(%rip), %rdx
	call	__fprintf_chk@PLT
.L140:
	movl	N(%rip), %eax
	cltd
	idivl	%ebx
	decl	%eax
	cmpl	%r14d, %eax
	jne	.L143
	movl	M(%rip), %eax
	cltd
	idivl	%ebx
	decl	%eax
	cmpl	%r13d, %eax
	jne	.L143
	movl	28(%rsp), %ecx
	leal	(%r15,%r15), %eax
	cmpl	%ecx, %eax
	jne	.L143
	movq	rho(%rip), %rdx
	movl	%ebp, %eax
	movl	$2, %edi
	leaq	.LC34(%rip), %rsi
	movsd	(%rdx,%rax,8), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
.L143:
	incl	%ebp
	jmp	.L139
.L155:
	call	_Z3pPYv
	leaq	.LC35(%rip), %rsi
	movb	$1, %al
	xorl	%ebx, %ebx
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	leaq	.LC36(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movq	16(%rsp), %rdi
	call	fclose@PLT
	movsd	eta(%rip), %xmm3
	movb	$4, %al
	movsd	Lz(%rip), %xmm2
	movq	8(%rsp), %rdi
	movsd	Ly(%rip), %xmm1
	leaq	.LC37(%rip), %rcx
	movl	$300, %edx
	movsd	Lx(%rip), %xmm0
	movl	$2, %esi
	call	__sprintf_chk@PLT
	movq	8(%rsp), %rdi
	leaq	.LC30(%rip), %rsi
	call	fopen@PLT
	movq	%rax, %rbp
.L145:
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %esi
	movl	%ecx, %eax
	imull	%r8d, %eax
	imull	%esi, %eax
	cmpl	%eax, %ebx
	jnb	.L156
	movl	%r8d, %edi
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	$2, %r9d
	imull	%esi, %edi
	divl	%edi
	movl	%eax, %r10d
	movl	%ecx, %eax
	cltd
	idivl	%r9d
	cmpl	%r10d, %eax
	jne	.L146
	imull	%eax, %edi
	movl	%ebx, %eax
	xorl	%edx, %edx
	movl	%ebx, %ecx
	cvtsi2sdl	%r8d, %xmm0
	mulsd	.LC32(%rip), %xmm0
	cvtsi2sdl	%esi, %xmm2
	mulsd	.LC32(%rip), %xmm2
	subl	%edi, %eax
	movq	%rbp, %rdi
	divl	%esi
	movl	$2, %esi
	cvtsi2sdq	%rax, %xmm1
	movl	%edx, %edx
	movq	rho(%rip), %rax
	subsd	%xmm0, %xmm1
	mulsd	dy(%rip), %xmm1
	cvtsi2sdq	%rdx, %xmm0
	leaq	.LC33(%rip), %rdx
	subsd	%xmm2, %xmm0
	mulsd	dz(%rip), %xmm0
	movsd	(%rax,%rcx,8), %xmm2
	movb	$3, %al
	call	__fprintf_chk@PLT
.L146:
	incl	%ebx
	jmp	.L145
.L156:
	movq	%rbp, %rdi
	call	fclose@PLT
	testb	%r12b, %r12b
	je	.L138
	pushq	%rax
	.cfi_def_cfa_offset 424
	movl	L(%rip), %eax
	leaq	.LC38(%rip), %rcx
	movl	$300, %edx
	movsd	eta(%rip), %xmm0
	movl	M(%rip), %r9d
	movl	$2, %esi
	pushq	%rax
	.cfi_def_cfa_offset 432
	movl	N(%rip), %r8d
	movb	$1, %al
	movq	24(%rsp), %rdi
	call	__sprintf_chk@PLT
	popq	%rdx
	.cfi_def_cfa_offset 424
	popq	%rcx
	.cfi_def_cfa_offset 416
	leaq	.LC39(%rip), %rsi
	movq	8(%rsp), %rdi
	call	fopen@PLT
	movl	N(%rip), %edx
	movl	$8, %esi
	imull	M(%rip), %edx
	imull	L(%rip), %edx
	movq	rho(%rip), %rdi
	movq	%rax, %rbx
	movq	%rax, %rcx
	movslq	%edx, %rdx
	call	fwrite@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
.L138:
	movq	344(%rsp), %rax
	subq	%fs:40, %rax
	je	.L153
	call	__stack_chk_fail@PLT
.L153:
	addq	$360, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4199:
	.size	_Z9writeDataIdEvb, .-_Z9writeDataIdEvb
	.section	.text._Z17weightedDensitiesIf6float2Evv,"axG",@progbits,_Z17weightedDensitiesIf6float2Evv,comdat
	.weak	_Z17weightedDensitiesIf6float2Evv
	.type	_Z17weightedDensitiesIf6float2Evv, @function
_Z17weightedDensitiesIf6float2Evv:
.LFB4358:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpb	$0, precision(%rip)
	movl	plan_3d_forward(%rip), %edi
	movq	frho_dev(%rip), %rdx
	movq	rho_dev(%rip), %rsi
	je	.L158
	call	cufftExecD2Z@PLT
	jmp	.L159
.L158:
	call	cufftExecR2C@PLT
.L159:
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L160
	movl	L(%rip), %r9d
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	fwD_dev(%rip), %rdx
	movq	fwF_dev(%rip), %rsi
	movq	frho_dev(%rip), %rdi
	call	_ZL66__device_stub__Z24weightedDensitiesFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii
.L160:
	cmpb	$0, precision(%rip)
	movq	wD_dev(%rip), %rdx
	movq	fwD_dev(%rip), %rsi
	movl	plan_3d_many_5_inverse(%rip), %edi
	je	.L161
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	cufftExecZ2D@PLT
.L161:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	cufftExecC2R@PLT
	.cfi_endproc
.LFE4358:
	.size	_Z17weightedDensitiesIf6float2Evv, .-_Z17weightedDensitiesIf6float2Evv
	.section	.text._Z9variationIf6float2Evv,"axG",@progbits,_Z9variationIf6float2Evv,comdat
	.weak	_Z9variationIf6float2Evv
	.type	_Z9variationIf6float2Evv, @function
_Z9variationIf6float2Evv:
.LFB4359:
	.cfi_startproc
	endbr64
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$10, %rdi
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L164
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movl	N(%rip), %esi
	movq	wD_dev(%rip), %rdi
	call	_ZL42__device_stub__Z14calcDerivativeIfEvPT_iiiPfiii
.L164:
	cmpb	$0, precision(%rip)
	movq	fwD_dev(%rip), %rdx
	movq	wD_dev(%rip), %rsi
	movl	plan_3d_many_5_forward(%rip), %edi
	je	.L165
	call	cufftExecD2Z@PLT
	jmp	.L166
.L165:
	call	cufftExecR2C@PLT
.L166:
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L167
	movl	L(%rip), %r9d
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	fc1_dev(%rip), %rdx
	movq	fwF_dev(%rip), %rsi
	movq	fwD_dev(%rip), %rdi
	call	_ZL58__device_stub__Z16variationFourierIf6float2EvPT0_PT_S2_iiiP6float2PfS0_iii
.L167:
	cmpb	$0, precision(%rip)
	movq	c1_dev(%rip), %rdx
	movq	fc1_dev(%rip), %rsi
	movl	plan_3d_inverse(%rip), %edi
	je	.L168
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	cufftExecZ2D@PLT
.L168:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	cufftExecC2R@PLT
	.cfi_endproc
.LFE4359:
	.size	_Z9variationIf6float2Evv, .-_Z9variationIf6float2Evv
	.section	.text._Z9convergedIfEvv,"axG",@progbits,_Z9convergedIfEvv,comdat
	.weak	_Z9convergedIfEvv
	.type	_Z9convergedIfEvv, @function
_Z9convergedIfEvv:
.LFB4360:
	.cfi_startproc
	endbr64
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$10, %rdi
	movq	%rdx, 20(%rsp)
	movq	$0x000000000, diff(%rip)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L171
	movl	L(%rip), %r9d
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	blockSum_dev(%rip), %rdx
	movq	rho_old_dev(%rip), %rsi
	movq	rho_dev(%rip), %rdi
	call	_ZL50__device_stub__Z16checkConvergenceIfEvPT_S1_S1_iiiPfS_S_iii
.L171:
	movq	blockSum_dev(%rip), %rsi
	movl	$4096, %edx
	movl	$2, %ecx
	movq	blockSum(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	blockSum(%rip), %rdx
	movsd	diff(%rip), %xmm1
	xorl	%eax, %eax
.L172:
	cvtss2sd	(%rdx,%rax,4), %xmm0
	incq	%rax
	addsd	%xmm0, %xmm1
	cmpq	$1024, %rax
	jne	.L172
	movsd	dx(%rip), %xmm0
	mulsd	dy(%rip), %xmm0
	mulsd	dz(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	.LC40(%rip), %xmm1
	comisd	%xmm0, %xmm1
	movsd	%xmm0, diff(%rip)
	ja	.L173
	cmpl	$2500, iterCount(%rip)
	jg	.L173
	ucomisd	%xmm0, %xmm0
	jnp	.L170
.L173:
	movb	$0, running(%rip)
.L170:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4360:
	.size	_Z9convergedIfEvv, .-_Z9convergedIfEvv
	.section	.rodata._Z7iterateIf6float2Evv.str1.1,"aMS",@progbits,1
.LC41:
	.string	"/////////////////////////////////////////////// \n"
.LC42:
	.string	"Picard iteration ... \n"
.LC43:
	.string	"# iteration: %i; diff: %1.10e \n"
.LC44:
	.string	"Converged after %i iterations! \n"
	.section	.text._Z7iterateIf6float2Evv,"axG",@progbits,_Z7iterateIf6float2Evv,comdat
	.weak	_Z7iterateIf6float2Evv
	.type	_Z7iterateIf6float2Evv, @function
_Z7iterateIf6float2Evv:
.LFB4195:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC41(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
	leaq	.LC42(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$33554433, %edx
	xorl	%eax, %eax
	xorl	%r9d, %r9d
	movl	$4194305, %edi
	salq	$7, %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$10, %rdi
	movl	$1, %esi
	movl	%eax, iterCount(%rip)
	movb	$1, running(%rip)
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L182
	movsd	rhob(%rip), %xmm3
	movsd	dz(%rip), %xmm2
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movl	N(%rip), %esi
	movq	rho_dev(%rip), %rdi
	call	_ZL43__device_stub__Z11initDensityIfEvPT_iiiddddPfiiidddd
.L182:
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L183
	movsd	dz(%rip), %xmm2
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movl	N(%rip), %esi
	movq	fwF_dev(%rip), %rdi
	call	_ZL50__device_stub__Z19initWeightFunctionsIfEvPT_iiidddPfiiiddd
.L183:
	call	_Z4muPYv
	movl	$33554433, %ebx
	movl	$4194305, %ebp
	leaq	.LC43(%rip), %r12
	salq	$7, %rbx
	movq	%xmm0, %r14
	salq	$10, %rbp
.L188:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rbp, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	movl	L(%rip), %r8d
	movl	M(%rip), %ecx
	movb	$1, %sil
	movsd	dz(%rip), %xmm2
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	N(%rip), %edx
	movq	rho_dev(%rip), %rdi
	call	_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
.L184:
	call	_Z17weightedDensitiesIf6float2Evv
	call	_Z9variationIf6float2Evv
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rbp, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L185
	movsd	dz(%rip), %xmm2
	movl	L(%rip), %r8d
	xorl	%esi, %esi
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	M(%rip), %ecx
	movl	N(%rip), %edx
	movq	rho_dev(%rip), %rdi
	call	_Z37__wrapper__device_stub_prepareDensityIfEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
.L185:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rbp, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L186
	movsd	rhob(%rip), %xmm1
	movl	L(%rip), %r9d
	movq	%r14, %xmm4
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	cvtsd2ss	%xmm4, %xmm0
	movq	rho_old_dev(%rip), %rdx
	movq	c1_dev(%rip), %rsi
	movq	rho_dev(%rip), %rdi
	call	_ZL49__device_stub__Z11mixing_stepIfEvPT_S1_S1_S0_iiidPfS_S_fiiid
.L186:
	call	_Z9convergedIfEvv
	movl	iterCount(%rip), %ecx
	movl	$10, %esi
	movl	%ecx, %eax
	cltd
	idivl	%esi
	testl	%edx, %edx
	jne	.L187
	movsd	diff(%rip), %xmm0
	movl	%ecx, %edx
	movq	%r12, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
.L187:
	movl	iterCount(%rip), %eax
	cmpb	$0, running(%rip)
	leal	1(%rax), %edx
	movl	%edx, iterCount(%rip)
	jne	.L188
	leaq	.LC44(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z17weightedDensitiesIf6float2Evv
	.cfi_endproc
.LFE4195:
	.size	_Z7iterateIf6float2Evv, .-_Z7iterateIf6float2Evv
	.section	.text._Z17weightedDensitiesId7double2Evv,"axG",@progbits,_Z17weightedDensitiesId7double2Evv,comdat
	.weak	_Z17weightedDensitiesId7double2Evv
	.type	_Z17weightedDensitiesId7double2Evv, @function
_Z17weightedDensitiesId7double2Evv:
.LFB4361:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	cmpb	$0, precision(%rip)
	movl	plan_3d_forward(%rip), %edi
	movq	frho_dev(%rip), %rdx
	movq	rho_dev(%rip), %rsi
	je	.L192
	call	cufftExecD2Z@PLT
	jmp	.L193
.L192:
	call	cufftExecR2C@PLT
.L193:
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L194
	movl	L(%rip), %r9d
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	fwD_dev(%rip), %rdx
	movq	fwF_dev(%rip), %rsi
	movq	frho_dev(%rip), %rdi
	call	_ZL67__device_stub__Z24weightedDensitiesFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii
.L194:
	cmpb	$0, precision(%rip)
	movq	wD_dev(%rip), %rdx
	movq	fwD_dev(%rip), %rsi
	movl	plan_3d_many_5_inverse(%rip), %edi
	je	.L195
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	cufftExecZ2D@PLT
.L195:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	cufftExecC2R@PLT
	.cfi_endproc
.LFE4361:
	.size	_Z17weightedDensitiesId7double2Evv, .-_Z17weightedDensitiesId7double2Evv
	.section	.text._Z9variationId7double2Evv,"axG",@progbits,_Z9variationId7double2Evv,comdat
	.weak	_Z9variationId7double2Evv
	.type	_Z9variationId7double2Evv, @function
_Z9variationId7double2Evv:
.LFB4362:
	.cfi_startproc
	endbr64
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$10, %rdi
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L198
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movl	N(%rip), %esi
	movq	wD_dev(%rip), %rdi
	call	_ZL42__device_stub__Z14calcDerivativeIdEvPT_iiiPdiii
.L198:
	cmpb	$0, precision(%rip)
	movq	fwD_dev(%rip), %rdx
	movq	wD_dev(%rip), %rsi
	movl	plan_3d_many_5_forward(%rip), %edi
	je	.L199
	call	cufftExecD2Z@PLT
	jmp	.L200
.L199:
	call	cufftExecR2C@PLT
.L200:
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L201
	movl	L(%rip), %r9d
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	fc1_dev(%rip), %rdx
	movq	fwF_dev(%rip), %rsi
	movq	fwD_dev(%rip), %rdi
	call	_ZL59__device_stub__Z16variationFourierId7double2EvPT0_PT_S2_iiiP7double2PdS0_iii
.L201:
	cmpb	$0, precision(%rip)
	movq	c1_dev(%rip), %rdx
	movq	fc1_dev(%rip), %rsi
	movl	plan_3d_inverse(%rip), %edi
	je	.L202
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	jmp	cufftExecZ2D@PLT
.L202:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	cufftExecC2R@PLT
	.cfi_endproc
.LFE4362:
	.size	_Z9variationId7double2Evv, .-_Z9variationId7double2Evv
	.section	.text._Z9convergedIdEvv,"axG",@progbits,_Z9convergedIdEvv,comdat
	.weak	_Z9convergedIdEvv
	.type	_Z9convergedIdEvv, @function
_Z9convergedIdEvv:
.LFB4363:
	.cfi_startproc
	endbr64
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	salq	$7, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$10, %rdi
	movq	%rdx, 20(%rsp)
	movq	$0x000000000, diff(%rip)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L205
	movl	L(%rip), %r9d
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	blockSum_dev(%rip), %rdx
	movq	rho_old_dev(%rip), %rsi
	movq	rho_dev(%rip), %rdi
	call	_ZL50__device_stub__Z16checkConvergenceIdEvPT_S1_S1_iiiPdS_S_iii
.L205:
	movq	blockSum_dev(%rip), %rsi
	movl	$8192, %edx
	movl	$2, %ecx
	movq	blockSum(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	blockSum(%rip), %rdx
	xorl	%eax, %eax
.L206:
	movsd	(%rdx,%rax,8), %xmm1
	addsd	diff(%rip), %xmm1
	incq	%rax
	movsd	%xmm1, diff(%rip)
	cmpq	$1024, %rax
	jne	.L206
	movsd	dx(%rip), %xmm0
	mulsd	dy(%rip), %xmm0
	mulsd	dz(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	movsd	.LC40(%rip), %xmm1
	comisd	%xmm0, %xmm1
	movsd	%xmm0, diff(%rip)
	ja	.L207
	cmpl	$2500, iterCount(%rip)
	jg	.L207
	ucomisd	%xmm0, %xmm0
	jnp	.L204
.L207:
	movb	$0, running(%rip)
.L204:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4363:
	.size	_Z9convergedIdEvv, .-_Z9convergedIdEvv
	.section	.text._Z7iterateId7double2Evv,"axG",@progbits,_Z7iterateId7double2Evv,comdat
	.weak	_Z7iterateId7double2Evv
	.type	_Z7iterateId7double2Evv, @function
_Z7iterateId7double2Evv:
.LFB4198:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC41(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
	leaq	.LC42(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$33554433, %edx
	xorl	%eax, %eax
	xorl	%r9d, %r9d
	movl	$4194305, %edi
	salq	$7, %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$10, %rdi
	movl	$1, %esi
	movl	%eax, iterCount(%rip)
	movb	$1, running(%rip)
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L216
	movsd	rhob(%rip), %xmm3
	movsd	dz(%rip), %xmm2
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movl	N(%rip), %esi
	movq	rho_dev(%rip), %rdi
	call	_ZL43__device_stub__Z11initDensityIdEvPT_iiiddddPdiiidddd
.L216:
	movl	$33554433, %edx
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$7, %rdx
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rdi, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L217
	movsd	dz(%rip), %xmm2
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	L(%rip), %ecx
	movl	M(%rip), %edx
	movl	N(%rip), %esi
	movq	fwF_dev(%rip), %rdi
	call	_ZL50__device_stub__Z19initWeightFunctionsIdEvPT_iiidddPdiiiddd
.L217:
	call	_Z4muPYv
	movl	$33554433, %ebx
	movl	$4194305, %ebp
	leaq	.LC43(%rip), %r12
	salq	$7, %rbx
	movq	%xmm0, %r14
	salq	$10, %rbp
.L222:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rbp, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L218
	movl	L(%rip), %r8d
	movl	M(%rip), %ecx
	movb	$1, %sil
	movsd	dz(%rip), %xmm2
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	N(%rip), %edx
	movq	rho_dev(%rip), %rdi
	call	_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
.L218:
	call	_Z17weightedDensitiesId7double2Evv
	call	_Z9variationId7double2Evv
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rbp, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L219
	movsd	dz(%rip), %xmm2
	movl	L(%rip), %r8d
	xorl	%esi, %esi
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	movl	M(%rip), %ecx
	movl	N(%rip), %edx
	movq	rho_dev(%rip), %rdi
	call	_Z37__wrapper__device_stub_prepareDensityIdEvRPT_RbRiS4_S4_RdS5_S5_.isra.0
.L219:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbx, 20(%rsp)
	movl	$1, 28(%rsp)
	movq	%rbp, 8(%rsp)
	movl	$1, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L220
	movsd	rhob(%rip), %xmm1
	movl	L(%rip), %r9d
	movq	%r14, %xmm0
	movl	M(%rip), %r8d
	movl	N(%rip), %ecx
	movq	rho_old_dev(%rip), %rdx
	movq	c1_dev(%rip), %rsi
	movq	rho_dev(%rip), %rdi
	call	_ZL49__device_stub__Z11mixing_stepIdEvPT_S1_S1_S0_iiidPdS_S_diiid
.L220:
	call	_Z9convergedIdEvv
	movl	iterCount(%rip), %ecx
	movl	$10, %esi
	movl	%ecx, %eax
	cltd
	idivl	%esi
	testl	%edx, %edx
	jne	.L221
	movsd	diff(%rip), %xmm0
	movl	%ecx, %edx
	movq	%r12, %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
.L221:
	movl	iterCount(%rip), %eax
	cmpb	$0, running(%rip)
	leal	1(%rax), %edx
	movl	%edx, iterCount(%rip)
	jne	.L222
	leaq	.LC44(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z17weightedDensitiesId7double2Evv
	.cfi_endproc
.LFE4198:
	.size	_Z7iterateId7double2Evv, .-_Z7iterateId7double2Evv
	.section	.rodata.str1.1
.LC46:
	.string	"System size: Lx = %1.3f R; Ly = %1.3f R; Lz = %1.3f R \n"
.LC47:
	.string	"Spatial resolution: dx = %1.5f R; dy = %1.5f R; dz = %1.5f R \n"
.LC48:
	.string	"Number of grid points: N_x = %i; N_y = %i; N_z = %i \n"
.LC50:
	.string	"Done after %2.6f seconds \n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3819:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	leaq	.LC50(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rsi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 64
	movq	8(%rsi), %rdi
	call	atof@PLT
	movq	16(%rbx), %rdi
	movsd	%xmm0, eta(%rip)
	movsd	%xmm0, 24(%rsp)
	call	atof@PLT
	movq	24(%rbx), %rdi
	movsd	%xmm0, Lx(%rip)
	movsd	%xmm0, 16(%rsp)
	call	atof@PLT
	movq	32(%rbx), %rdi
	movsd	%xmm0, Ly(%rip)
	movsd	%xmm0, 8(%rsp)
	call	atof@PLT
	movq	40(%rbx), %rdi
	movsd	%xmm0, Lz(%rip)
	movsd	%xmm0, (%rsp)
	call	atoi@PLT
	movq	48(%rbx), %rdi
	testl	%eax, %eax
	setne	precision(%rip)
	call	atoi@PLT
	movsd	16(%rsp), %xmm4
	movsd	8(%rsp), %xmm1
	leaq	.LC46(%rip), %rsi
	cvtsi2sdl	N(%rip), %xmm5
	movsd	(%rsp), %xmm2
	testl	%eax, %eax
	movl	$2, %edi
	movaps	%xmm4, %xmm0
	movsd	24(%rsp), %xmm3
	movb	$3, %al
	setne	fullProfile(%rip)
	mulsd	.LC1(%rip), %xmm3
	divsd	.LC45(%rip), %xmm3
	movsd	%xmm3, rhob(%rip)
	divsd	%xmm5, %xmm0
	cvtsi2sdl	M(%rip), %xmm5
	movsd	%xmm0, dx(%rip)
	movaps	%xmm1, %xmm0
	divsd	%xmm5, %xmm0
	cvtsi2sdl	L(%rip), %xmm5
	movsd	%xmm0, dy(%rip)
	movaps	%xmm2, %xmm0
	divsd	%xmm5, %xmm0
	movsd	%xmm0, dz(%rip)
	movaps	%xmm4, %xmm0
	call	__printf_chk@PLT
	movsd	dz(%rip), %xmm2
	movb	$3, %al
	movsd	dy(%rip), %xmm1
	movsd	dx(%rip), %xmm0
	leaq	.LC47(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	L(%rip), %r8d
	xorl	%eax, %eax
	movl	M(%rip), %ecx
	movl	N(%rip), %edx
	leaq	.LC48(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	call	_Z13choose_devicev
	call	_Z17define_cufftPlansv
	cmpb	$0, precision(%rip)
	jne	.L226
	call	_Z14allocateMemoryIf6float2Evv
	call	clock@PLT
	movq	%rax, %rbx
	call	_Z7iterateIf6float2Evv
	call	clock@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC49(%rip), %xmm0
	call	__printf_chk@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rdx
	movl	$2, %ecx
	movq	rho_dev(%rip), %rsi
	movq	rho(%rip), %rdi
	imulq	%rax, %rdx
	movslq	L(%rip), %rax
	imulq	%rax, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rdx
	movl	$2, %ecx
	movq	wD_dev(%rip), %rsi
	movq	wD(%rip), %rdi
	imulq	%rax, %rdx
	movslq	L(%rip), %rax
	imulq	%rax, %rdx
	imulq	$20, %rdx, %rdx
	call	cudaMemcpy@PLT
	xorl	%edi, %edi
	call	_Z9writeDataIfEvb
	jmp	.L227
.L226:
	call	_Z14allocateMemoryId7double2Evv
	call	clock@PLT
	movq	%rax, %rbx
	call	_Z7iterateId7double2Evv
	call	clock@PLT
	movq	%rbp, %rsi
	movl	$2, %edi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC49(%rip), %xmm0
	call	__printf_chk@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rdx
	movl	$2, %ecx
	movq	rho_dev(%rip), %rsi
	movq	rho(%rip), %rdi
	imulq	%rax, %rdx
	movslq	L(%rip), %rax
	imulq	%rax, %rdx
	salq	$3, %rdx
	call	cudaMemcpy@PLT
	movslq	M(%rip), %rax
	movslq	N(%rip), %rdx
	movl	$2, %ecx
	movq	wD(%rip), %rdi
	movq	wD_dev(%rip), %rsi
	imulq	%rax, %rdx
	movslq	L(%rip), %rax
	imulq	%rax, %rdx
	imulq	$40, %rdx, %rdx
	call	cudaMemcpy@PLT
	xorl	%edi, %edi
	call	_Z9writeDataIdEvb
.L227:
	call	cudaDeviceSynchronize@PLT
	call	_Z10freeDevicev
	xorl	%edi, %edi
	call	exit@PLT
	.cfi_endproc
.LFE3819:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	plan_3d_many_3_inverse
	.bss
	.align 4
	.type	plan_3d_many_3_inverse, @object
	.size	plan_3d_many_3_inverse, 4
plan_3d_many_3_inverse:
	.zero	4
	.globl	plan_3d_many_3_forward
	.align 4
	.type	plan_3d_many_3_forward, @object
	.size	plan_3d_many_3_forward, 4
plan_3d_many_3_forward:
	.zero	4
	.globl	plan_3d_many_5_inverse
	.align 4
	.type	plan_3d_many_5_inverse, @object
	.size	plan_3d_many_5_inverse, 4
plan_3d_many_5_inverse:
	.zero	4
	.globl	plan_3d_many_5_forward
	.align 4
	.type	plan_3d_many_5_forward, @object
	.size	plan_3d_many_5_forward, 4
plan_3d_many_5_forward:
	.zero	4
	.globl	plan_3d_inverse
	.align 4
	.type	plan_3d_inverse, @object
	.size	plan_3d_inverse, 4
plan_3d_inverse:
	.zero	4
	.globl	plan_3d_forward
	.align 4
	.type	plan_3d_forward, @object
	.size	plan_3d_forward, 4
plan_3d_forward:
	.zero	4
	.globl	fwD_dev
	.align 8
	.type	fwD_dev, @object
	.size	fwD_dev, 8
fwD_dev:
	.zero	8
	.globl	fgrad_c1_dev
	.align 8
	.type	fgrad_c1_dev, @object
	.size	fgrad_c1_dev, 8
fgrad_c1_dev:
	.zero	8
	.globl	fgrad_rho_dev
	.align 8
	.type	fgrad_rho_dev, @object
	.size	fgrad_rho_dev, 8
fgrad_rho_dev:
	.zero	8
	.globl	fc1_dev
	.align 8
	.type	fc1_dev, @object
	.size	fc1_dev, 8
fc1_dev:
	.zero	8
	.globl	frho_dev
	.align 8
	.type	frho_dev, @object
	.size	frho_dev, 8
frho_dev:
	.zero	8
	.globl	blockSum_dev
	.align 8
	.type	blockSum_dev, @object
	.size	blockSum_dev, 8
blockSum_dev:
	.zero	8
	.globl	c1_dev
	.align 8
	.type	c1_dev, @object
	.size	c1_dev, 8
c1_dev:
	.zero	8
	.globl	fwF_dev
	.align 8
	.type	fwF_dev, @object
	.size	fwF_dev, 8
fwF_dev:
	.zero	8
	.globl	wD_dev
	.align 8
	.type	wD_dev, @object
	.size	wD_dev, 8
wD_dev:
	.zero	8
	.globl	rho_old_dev
	.align 8
	.type	rho_old_dev, @object
	.size	rho_old_dev, 8
rho_old_dev:
	.zero	8
	.globl	rho_dev
	.align 8
	.type	rho_dev, @object
	.size	rho_dev, 8
rho_dev:
	.zero	8
	.globl	blockSum
	.align 8
	.type	blockSum, @object
	.size	blockSum, 8
blockSum:
	.zero	8
	.globl	c1
	.align 8
	.type	c1, @object
	.size	c1, 8
c1:
	.zero	8
	.globl	wD
	.align 8
	.type	wD, @object
	.size	wD, 8
wD:
	.zero	8
	.globl	rho
	.align 8
	.type	rho, @object
	.size	rho, 8
rho:
	.zero	8
	.globl	rhob
	.align 8
	.type	rhob, @object
	.size	rhob, 8
rhob:
	.zero	8
	.globl	eta
	.align 8
	.type	eta, @object
	.size	eta, 8
eta:
	.zero	8
	.globl	diff
	.align 8
	.type	diff, @object
	.size	diff, 8
diff:
	.zero	8
	.globl	iterCount
	.align 4
	.type	iterCount, @object
	.size	iterCount, 4
iterCount:
	.zero	4
	.globl	fullProfile
	.type	fullProfile, @object
	.size	fullProfile, 1
fullProfile:
	.zero	1
	.globl	precision
	.type	precision, @object
	.size	precision, 1
precision:
	.zero	1
	.globl	running
	.data
	.type	running, @object
	.size	running, 1
running:
	.byte	1
	.globl	dz
	.bss
	.align 8
	.type	dz, @object
	.size	dz, 8
dz:
	.zero	8
	.globl	dy
	.align 8
	.type	dy, @object
	.size	dy, 8
dy:
	.zero	8
	.globl	dx
	.align 8
	.type	dx, @object
	.size	dx, 8
dx:
	.zero	8
	.globl	Lz
	.align 8
	.type	Lz, @object
	.size	Lz, 8
Lz:
	.zero	8
	.globl	Ly
	.align 8
	.type	Ly, @object
	.size	Ly, 8
Ly:
	.zero	8
	.globl	Lx
	.align 8
	.type	Lx, @object
	.size	Lx, 8
Lx:
	.zero	8
	.globl	L
	.data
	.align 4
	.type	L, @object
	.size	L, 4
L:
	.long	128
	.globl	M
	.align 4
	.type	M, @object
	.size	M, 4
M:
	.long	128
	.globl	N
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.long	128
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.align 8
.LC1:
	.long	0
	.long	1074266112
	.align 8
.LC2:
	.long	0
	.long	1075707904
	.align 8
.LC3:
	.long	0
	.long	1075576832
	.align 8
.LC4:
	.long	-4194304
	.long	1105199103
	.align 8
.LC9:
	.long	0
	.long	1062207488
	.align 8
.LC32:
	.long	0
	.long	1071644672
	.align 8
.LC40:
	.long	-400107883
	.long	1041313291
	.align 8
.LC45:
	.long	1413754136
	.long	1076437499
	.align 8
.LC49:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *  A classical DFT program that calculates the density profile of hard spheres in a hard box in three dimensions
 *  on graphics cards using C/C++ and the CUDA programming language.
 *  The program employs the original Rosenfeld functional without any correction (such as q3 or tensorial extensions).
 *  It serves as a accompanying information for the paper "Massively parallel GPU-accelerated minimization of classical density functional theory".
 *
 *  The program is a minimal working example and should serve as a starting point for those who aim
 *  to employ GPUs for significantly speeding up their 2D or 3D DFT calculations.
 *  For sake of readability, it is not fully optimized to obtain best performance and less memory usage as possible
 *
 *  The user can choose between single- and double-precision performance. For sufficiently low fluid packing
 *  fractions single precision should always be sufficient.
 *
 *  The equilibrium density profile is calculated via a standard Picard iteration, and convolutions are calculate via Fourier-methods (CUFFT).
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <fstream>
#include <stdarg.h>
#include <limits>
#include <limits.h>
#include <iostream>
#include <hipfft/hipfft.h>

/// MACROS ////////////////////////////////////////////////////////////////////

#define BLOCKS  1024 //NUMBER OF BLOCKS
#define THREADS 128  //THREADS PER BLOCK

#define pi_4 (12.5663706143591729539)  /* 4*pi */
#define pi_2 (6.2831853071795864769)   /* 2*pi */

#define R 1.0 //hard-sphere radius
#define alpha (0.05) //mixing parameter for Picard-iteration
#define MAX_ITER 2500 //maximal iterations to be performed during Picard iteration
#define EPS 1.e-9 //Convergence threshold for density profile

/// FUNCTION DECLARATIONS ///////////////////////////////////////////////////////

//host functions
void freeDevice();
void define_cufftPlans();
void choose_device();
template <class rtype, class ctype> void allocateMemory();
template <class rtype, class ctype> void iterate();
template <class rtype, class ctype> void weightedDensities();
template <class rtype, class ctype> void variation();
template <class rtype> void writeData(bool fullProfile);

//device functions
template <class rtype, class ctype> __device__  void complexRealImMult(const ctype &a, ctype &c, const rtype &b, bool real);
template <class ctype> __device__  ctype operator+(const ctype &a, const ctype &b);
template <class ctype> __device__  ctype operator-(const ctype &a, const ctype &b);
template <class rtype> __global__ void initDensity(rtype *rho, int N, int M, int L);
template <class rtype> __global__ void initWeightFunctions(rtype *wF, int N, int M, int L);
template <class rtype> __global__ void mixing_step(rtype *rho, rtype* c1, rtype mu, int N, int M, int L);
template <class rtype, class ctype> __global__ void weightedDensitiesFourier(ctype *frho, rtype *fwF, ctype *fwD, int N, int M, int L);
template <class rtype, class ctype> __global__ void variationFourier(ctype *fwD, rtype *fwF, ctype *fc1, int N, int M, int L);

/// VARIABLE DECLARATIONS ///////////////////////////////////////////////////////

int N = 128; //Number of grid points in x-direction
int M = 128; //Number of grid points in y-direction
int L = 128; //Number of grid points in z-direction

double Lx; //System size in x-direction
double Ly; //System size in y-direction
double Lz; //System size in z-direction

double dx; //spatial resolution in x-direction
double dy; //spatial resolution in y-direction
double dz; //spatial resolution in z-direction

bool running = true; //flag controlling the termination of the Picard iteration
bool precision = 0; //Sets the precision by user input
bool fullProfile = 0; //flag controlling whether full 3D program should be written or not
int	iterCount = 0; //counter variable for Picard iteration
double diff = 0.;
double eta, rhob; //fluid packing fraction and density (always in double precision)

//host arrays (real)
void *rho;
void *wD;
void *c1;
void *blockSum;

//device arrays (real)
void *rho_dev;
void *rho_old_dev;
void *wD_dev;
void *fwF_dev;
void *c1_dev;
void *blockSum_dev;

//device arrays (complex)
void *frho_dev;
void *fc1_dev;
void *fgrad_rho_dev;
void *fgrad_c1_dev;
void *fwD_dev;

//FFT plans
hipfftHandle plan_3d_forward;
hipfftHandle plan_3d_inverse;

hipfftHandle plan_3d_many_5_forward;
hipfftHandle plan_3d_many_5_inverse;

hipfftHandle plan_3d_many_3_forward;
hipfftHandle plan_3d_many_3_inverse;


/// FUNCTION DEFINITIONS ///////////////////////////////////////////////////////

//Multiplication of complex number with purely real number or purely imaginary number
template <class rtype, class ctype> __device__  void complexRealImMult(const ctype &a, ctype &c, const rtype &b, bool real)
{
	if(real)
	{
		c.x = a.x*b;
		c.y = a.y*b;
	}
	else
	{
		c.x = -a.y*b;
		c.y = a.x*b;
	}
}

//Overload the '+' operator to define addition of complex numbers
template <class ctype> __device__  ctype operator+(const ctype &a, const ctype &b)
{
	ctype res;

	res.x = a.x + b.x;
	res.y = a.y + b.y;

	return res;
}

//Overload the '-' operator to define subtraction of complex numbers
template <class ctype> __device__  ctype operator-(const ctype &a, const ctype &b)
{
	ctype res;

	res.x = a.x - b.x;
	res.y = a.y - b.y;

	return res;
}

//very inefficient solution to correct the density at the walls ;-), but has not much impact on total computation time
template <class rtype>
__global__ void prepareDensity(rtype *rho, bool forward, int N, int M, int L, double dx, double dy, double dz)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	int i, j, k, ijk, dummy;
	int SIZE = N*M*L;

	int R_N_x = (int) (R/dx);
	int R_N_y = (int) (R/dy);
	int R_N_z = (int) (R/dz);

	for(ijk = threadIndex; ijk < SIZE; ijk += numOfThreads)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if(forward)
		{
			if(i == 2*R_N_x || j == 2*R_N_y || k == 2*R_N_z) rho[ijk] *= 0.5;

			if(i == N - 2*R_N_x -1 || j == M - 2*R_N_y -  1|| k == L - 2*R_N_z - 1) rho[ijk] *= 0.5;
		}
		else
		{
			if(i == 2*R_N_x || j == 2*R_N_y || k == 2*R_N_z) rho[ijk] /= 0.5;

			if(i == N - 2*R_N_x - 1 || j == M - 2*R_N_y - 1 || k == L - 2*R_N_z - 1) rho[ijk] /= 0.5;
		}
	}
}

//initialize the density within a hard box
template <class rtype>
__global__ void initDensity(rtype *rho, int N, int M, int L, double dx, double dy, double dz, double rhob)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	int i, j, k, ijk, dummy;

	int R_N_x = (int) (R/dx);
	int R_N_y = (int) (R/dy);
	int R_N_z = (int) (R/dz);

	for(ijk = threadIndex; ijk < N*M*L; ijk += numOfThreads)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if((i >= 2*R_N_x && i < N - 2*R_N_x) && (j >= 2*R_N_y && j < M - 2*R_N_y) && (k >= 2*R_N_z && k < L - 2*R_N_z))
			rho[ijk] = rhob;
		else
			rho[ijk] = 0.0;
	}
}


//initialize the weight functions in Fourier-space
template <class rtype>
__global__ void initWeightFunctions(rtype *wF, int N, int M, int L, double dx, double dy, double dz)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = gridDim.x*blockDim.x;

	int i, j, k, ijk, dummy;
	rtype kx,ky,kz, k_abs;
	kx = ky = kz = 0.;

	rtype norm = 1./(1.*N*M*L); //this is needed to have the correct normalization after calculating f(r) = FT^(-1) (FT(h(r)*FT(g(r))
	int SIZE2 = N*M*(L/2 + 1);

	for(ijk = threadIndex; ijk < SIZE2; ijk += numOfThreads)
	{
		//extract indices i,j,k from ijk = k + j*DIM(Z) + i*DIM(Y)*DIM(Z)
		dummy = ijk;
		i = dummy/(M*(L/2 + 1));
		dummy -= i*M*(L/2 + 1);
		j = dummy/(L/2 + 1);
		k = dummy % (L/2 + 1);

		if(i <= N/2) kx = pi_2*R*i/(N*dx);
		else kx = -pi_2*(N-i)*R/(N*dx);

		if(j <= M/2) ky = pi_2*R*j/(M*dy);
		else ky = -pi_2*(M-j)*R/(M*dy);

		 kz = pi_2*R*k/(L*dz);

		k_abs = sqrt(kx*kx + ky*ky + kz*kz);

		if(k_abs == 0)
		{
			wF[ijk] = norm*pi_4*R*R*R/3.;
			wF[ijk + SIZE2] = norm*pi_4*R*R;
			wF[ijk + 2*SIZE2] = 0.0;
			wF[ijk + 3*SIZE2] = 0.0;
			wF[ijk + 4*SIZE2] = 0.0;
		}
		else
		{
			wF[ijk] = norm*pi_4*(sin(k_abs*R) - k_abs*R*cos(k_abs*R))/(k_abs*k_abs*k_abs); //w3
			wF[ijk + SIZE2] = norm*pi_4*R*sin(k_abs*R)/k_abs; //w2
			wF[ijk + 2*SIZE2] = -kx*wF[ijk]; //w2vx
			wF[ijk + 3*SIZE2] = -ky*wF[ijk]; //w2vy
			wF[ijk + 4*SIZE2] = -kz*wF[ijk]; //w2vz
		}
	}
}

//calculate the convolution of density and the weight functions in Fourier-space
template <class rtype, class ctype>
__global__ void weightedDensitiesFourier(ctype *frho, rtype *fwF, ctype *fwD, int N, int M, int L)
{
	int index = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	int ijk;
	ctype frho_;
	int SIZE2 = N*M*(L/2 + 1);

	for(ijk = index; ijk < SIZE2; ijk += numOfThreads)
	{
		frho_ = frho[ijk];

		complexRealImMult<rtype, ctype>(frho_, fwD[ijk], fwF[ijk], true);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + SIZE2], fwF[ijk + SIZE2], true);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + 2*SIZE2], fwF[ijk + 2*SIZE2], false);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + 3*SIZE2], fwF[ijk + 3*SIZE2], false);
		complexRealImMult<rtype, ctype>(frho_, fwD[ijk + 4*SIZE2], fwF[ijk + 4*SIZE2], false);
	}
}

//calculate the direct correlation function c1 in Fourier-space
template <class rtype, class ctype>
__global__ void variationFourier(ctype *fwD, rtype *fwF, ctype *fc1, int N, int M, int L)
{
	int index = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = blockDim.x*gridDim.x;

	ctype fc1_n3, fc1_n2, fc1_n2vx, fc1_n2vy, fc1_n2vz;

	int ijk;
	int SIZE2 = N*M*(L/2+1);
	for(ijk = index; ijk < SIZE2; ijk += numOfThreads)
	{
		complexRealImMult<rtype, ctype>(fwD[ijk], fc1_n3 , fwF[ijk], true);
		complexRealImMult<rtype, ctype>(fwD[ijk + SIZE2], fc1_n2, fwF[ijk + SIZE2], true);
		complexRealImMult<rtype, ctype>(fwD[ijk + 2*SIZE2], fc1_n2vx, fwF[ijk + 2*SIZE2], false);
		complexRealImMult<rtype, ctype>(fwD[ijk + 3*SIZE2], fc1_n2vy, fwF[ijk + 3*SIZE2], false);
		complexRealImMult<rtype, ctype>(fwD[ijk + 4*SIZE2], fc1_n2vz, fwF[ijk + 4*SIZE2], false);

		fc1[ijk] = (fc1_n3 + fc1_n2 - (fc1_n2vx + fc1_n2vy +fc1_n2vz));
	}
}



// Calculate the derivatives of the Rosenfeld functional
//Note: the derivatives are stored in the array which previously contained the
//weighted densities
template <class rtype>
__global__ void calcDerivative(rtype *wD, int N, int M, int L)
{
	int threadIndex = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = gridDim.x*blockDim.x;

	rtype n3, n2, n1, n0;
	rtype n2vx, n2vy, n2vz;
	rtype n1vx, n1vy, n1vz;
	rtype n2vDotn2v;
	rtype n2vDotn1v;
	rtype tmp_n3, tmp_n3_sq, tmp_n3_inv;

	rtype dPhin0, dPhin1, dPhin2;
	rtype dPhin2vx, dPhin2vy, dPhin2vz;

	int SIZE = N*M*L;

	for(int ijk = threadIndex; ijk < SIZE; ijk += numOfThreads)
	{
		n3 = wD[ijk];
		n2 = wD[ijk + SIZE];
		n2vx = wD[ijk + 2*SIZE];
		n2vy = wD[ijk + 3*SIZE];
		n2vz = wD[ijk + 4*SIZE];

		if(n3 > 0.999) n3 = 0.999;
		tmp_n3 = 1.-n3;
		tmp_n3_inv = 1./tmp_n3;
		tmp_n3_sq = tmp_n3*tmp_n3;
		n1 = n2/(pi_4); //assumes R = 1
		n0 = n1; //assumes R = 1

		n1vx = n2vx/(pi_4); //assumes R = 1
		n1vy = n2vy/(pi_4);
		n1vz = n2vz/(pi_4);

		n2vDotn2v = n2vx*n2vx + n2vy*n2vy + n2vz*n2vz;
		n2vDotn1v = n2vx*n1vx + n2vy*n1vy + n2vz*n1vz;

		//the following could be further simplified but is kept for sake of readability
		//dPhi/dn0
		dPhin0 =  -log(1 - n3);
		//dPhi/dn1
		dPhin1 = n2/tmp_n3;
		//dPhi/dn2
		dPhin2 = n1/tmp_n3 + (n2*n2 - n2vDotn2v)/(2*pi_4*tmp_n3_sq);
		//Components of dPhi/dn2v
		dPhin2vx = -n1vx*tmp_n3_inv - (n2vx*n2)/(pi_4*tmp_n3_sq);
		dPhin2vy = -n1vy*tmp_n3_inv - (n2vy*n2)/(pi_4*tmp_n3_sq);
		dPhin2vz = -n1vz*tmp_n3_inv - (n2vz*n2)/(pi_4*tmp_n3_sq);

		//Store dPhi/dn3
		wD[ijk] = n0*tmp_n3_inv
				+ (n1*n2 - n2vDotn1v)/tmp_n3_sq
				  + (n2*n2*n2 - 3.*n2*n2vDotn2v)/(3*pi_4*(tmp_n3)*tmp_n3_sq);

		//Store dPhi/dn2 + (1/4pi)*dPhi/dn1 + (1/4pi)*dPhi/dn0
		wD[ijk + SIZE] = dPhin2 + dPhin1/(pi_4) + dPhin0/(pi_4);

		//Store components of dPhi/dn2v + (1/4pi)*dPhi/dn1v
		wD[ijk + 2*SIZE] = dPhin2vx -  n2vx*tmp_n3_inv/(pi_4);
		wD[ijk + 3*SIZE] = dPhin2vy -  n2vy*tmp_n3_inv/(pi_4);
		wD[ijk + 4*SIZE] = dPhin2vz -  n2vz*tmp_n3_inv/(pi_4);
	}
}


//calculate the weighted densities for a given density profile
template <class rtype, class ctype>
void weightedDensities()
{
	if(precision)
		hipfftExecD2Z(plan_3d_forward, (double*) rho_dev, (double2*) frho_dev);
	else
		hipfftExecR2C(plan_3d_forward, (float*) rho_dev, (float2*) frho_dev);

	weightedDensitiesFourier<rtype, ctype><<<BLOCKS, THREADS>>>((ctype*) frho_dev, (rtype*) fwF_dev, (ctype*) fwD_dev, N, M, L);

	if(precision)
		hipfftExecZ2D(plan_3d_many_5_inverse, (double2*) fwD_dev, (double*) wD_dev);
	else
		hipfftExecC2R(plan_3d_many_5_inverse, (float2*) fwD_dev, (float*) wD_dev);
}

//calculate the direct correlation function c1
template <class rtype, class ctype>
void variation()
{
	calcDerivative<<<BLOCKS, THREADS>>>((rtype*) wD_dev, N, M, L);

	if(precision)
		hipfftExecD2Z(plan_3d_many_5_forward, (double*) wD_dev, (double2*) fwD_dev);
	else
		hipfftExecR2C(plan_3d_many_5_forward, (float*) wD_dev, (float2*) fwD_dev);

	variationFourier<<<BLOCKS, THREADS>>>((ctype*) fwD_dev, (rtype*) fwF_dev, (ctype*) fc1_dev, N, M, L);

	if(precision)
		hipfftExecZ2D(plan_3d_inverse, (double2*) fc1_dev, (double*) c1_dev);
	else
		hipfftExecC2R(plan_3d_inverse, (float2*) fc1_dev, (float*) c1_dev);
}

//Mixing step of the Picard iteration for determining the equilibrium density profile
template <class rtype>
__global__ void mixing_step(rtype *rho, rtype *c1, rtype *rho_old_dev, rtype mu, int N, int M, int L, double rhob)
{
	int threadIndex = threadIdx.x + blockDim.x*blockIdx.x;
	int numOfThreads = gridDim.x*blockDim.x;

	rtype dummy = 0.0;
	rtype rho_;
	int SIZE = N*M*L;

	for(int ijk = threadIndex; ijk < SIZE; ijk += numOfThreads)
	{
		rho_ = rho[ijk];
		rho_old_dev[ijk] = rho_;
		if(rho_ > 0)
		{
			dummy = rhob*exp(-c1[ijk] + mu);
			rho[ijk] = (1. - alpha)*rho_ + alpha*dummy;
		}
	}
}

//check whether the density profiles converges or not:
//we calculate the square of the euclidian norm of the new
//density profile vs the old density profile
template <class rtype>
__global__ void checkConvergence(rtype *rho, rtype *rho_old, rtype *block_sum, int N, int M, int L)
{
	int index = threadIdx.x + blockIdx.x*blockDim.x;
	int numOfThreads = gridDim.x*blockDim.x;

	int threadIndex = threadIdx.x;

	__shared__ rtype thread_sum[THREADS]; //use fast shared memory
	thread_sum[threadIndex] = 0.0;

	rtype tmpSum = 0.;
	rtype tmp = 0.;

	int ijk;
	int SIZE = N*M*L;
	for(ijk = index; ijk < SIZE; ijk += numOfThreads)
	{
		tmp = (rho[ijk] - rho_old[ijk]);
		tmp *= tmp;
		tmpSum += tmp;
	}
	thread_sum[threadIndex] = tmpSum; //store intermediate result in shared memory
	__syncthreads();

	int s = blockDim.x/2;
	while(s != 0)   //sum results in shared memory up; final reslt will reside in thread_sum[0]
	{
		if(threadIndex < s)
		{
			thread_sum[threadIndex] += thread_sum[threadIndex + s];
		}
		s /= 2;
		__syncthreads();
	}

	//store each sum in block_sum dependent on block id
	if(threadIndex == 0)
	{
		block_sum[blockIdx.x] = thread_sum[0];
	}
	__syncthreads();
}


//check whether the solution is converged
template <class rtype>
void converged()
{
	diff = 0.0;
	checkConvergence<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, (rtype*) rho_old_dev, (rtype*) blockSum_dev, N, M, L);
	hipMemcpy((rtype*) blockSum, (rtype*) blockSum_dev, sizeof(rtype)*BLOCKS, hipMemcpyDeviceToHost);
	for(int i = 0; i < BLOCKS; i++)
	{
		diff += ((rtype*) blockSum)[i];
	}
	diff *= dx*dy*dz;
	if(diff < EPS || iterCount > MAX_ITER || diff != diff) running = false;
}

// Percus-Yevick excess chemical potential
double muPY()
{
	double hc = eta/(1. - eta);
	return hc*(7.0 + hc*(7.5 + 3*hc)) - log(1-eta);
}

// Percus-Yevick pressure
double pPY()
{
	return rhob*(1. + eta + eta*eta)/pow(1-eta, 3);
}

//Picard iteration for determining the equilibrium density profile
template <class rtype, class ctype>
void iterate()
{
	printf("/////////////////////////////////////////////// \n");
	printf("Picard iteration ... \n");
	iterCount = 0;
	running = true;

	initDensity<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, N, M, L, dx, dy, dz, rhob);
	initWeightFunctions<rtype><<<BLOCKS, THREADS>>>((rtype*) fwF_dev, N, M, L, dx, dy, dz);

	double mu = muPY();
	do
	{
		prepareDensity<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, true, N, M, L, dx, dy, dz); //correct the density
	    weightedDensities<rtype, ctype>(); //weighted densities
		variation<rtype, ctype>(); //calcualte c(1)
		prepareDensity<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, false, N, M, L, dx, dy, dz); //recorrect the density
		mixing_step<rtype><<<BLOCKS, THREADS>>>((rtype*) rho_dev, (rtype*) c1_dev, (rtype*) rho_old_dev, (rtype) mu, N, M, L, rhob); //calculate the new profile
		converged<rtype>(); //check whether the solution has converged
		if(iterCount % 10 == 0) printf("# iteration: %i; diff: %1.10e \n", iterCount, diff);
		iterCount++;

	} while(running);
	printf("Converged after %i iterations! \n", iterCount);
	printf("/////////////////////////////////////////////// \n\n");
	weightedDensities<rtype, ctype>();

}

//write the data to file
template <class rtype>
void writeData(bool fullProfile)
{
	FILE* fP;
	char fln[300];

	//print density along one axis (z-Axis)
	sprintf(fln, "rho_1d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat", Lx, Ly, Lz, eta);
	fP = fopen(fln, "w");
	fprintf(fP, "#Density profile in a box with dimension L^3 along the z-axis (L) where x and y are fixed at x = N/2 and y = M/2 \n");
	unsigned int i,j,k,dummy;
	int R_N_z = (int) (R/dz);
	for(unsigned int ijk = 0; ijk < N*M*L; ijk++)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if((i == N/2) && (j == M/2))
		{
			fprintf(fP,"%1.9e %1.9e %1.9e  \n", (k - L/2.)*dx, ((rtype*) rho)[ijk], ((rtype*) wD)[ijk]);
		}
		if((i == N/2-1) && (j == M/2-1) && k == 2*R_N_z)
			printf("contact: %f \n", ((rtype*) rho)[ijk]);

	}
	printf("bulk pressure: %f \n", pPY());
	fprintf(fP, "\n\n");
	fclose(fP);

	//print 2D density in a plane
	sprintf(fln, "rho_2d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat", Lx, Ly, Lz, eta);
	fP = fopen(fln, "w");
	for(unsigned int ijk = 0; ijk < N*M*L; ijk++)
	{
		dummy = ijk;
		i = dummy/(M*L);
		dummy -= i*M*L;
		j = dummy/L;
		k = dummy % L;

		if((i == N/2))
		{
			fprintf(fP,"%1.9e %1.9e %1.9e  \n", (k - L/2.)*dz, (j - M/2.)*dy, ((rtype*) rho)[ijk]);
		}
	}
	fclose(fP);
	

	if(fullProfile)  //write full density as binary file (to be used e.g. with ImageJ)
	{
		sprintf(fln,"rho_3D_%i_%i_%i_%1.3f", N, M, L, eta);
		FILE *pfile = fopen(fln,"wb");
		fwrite(&((rtype*) rho)[0], sizeof(double), N*M*L, pfile);
		fclose(pfile);
	}
}

//Allocate memory on the device and host
template <class rtype, class ctype>
void allocateMemory()
{
	rho = (rtype*) malloc(sizeof(rtype)*N*M*L);
	c1 = (rtype*) malloc(sizeof(rtype)*N*M*L);
	wD = (rtype*) malloc(sizeof(rtype)*N*M*L*5);
	blockSum = (rtype*) malloc(sizeof(rtype)*BLOCKS);

	hipMalloc((void**) &blockSum_dev, sizeof(rtype)*BLOCKS);
	hipMalloc((void**) &rho_dev, sizeof(rtype)*N*M*L);
	hipMalloc((void**) &rho_old_dev, sizeof(rtype)*N*M*L);
	hipMalloc((void**) &c1_dev, sizeof(rtype)*N*M*L);
	hipMalloc((void**) &wD_dev, sizeof(rtype)*N*M*L*5);
	hipMalloc((void**) &fwF_dev, sizeof(rtype)*N*M*(L/2 + 1)*5);

	hipMalloc((void**) &frho_dev, sizeof(ctype)*N*M*(L/2 + 1));
	hipMalloc((void**) &fc1_dev, sizeof(ctype)*N*M*(L/2 + 1));
	hipMalloc((void**) &fwD_dev, sizeof(ctype)*N*M*(L/2 + 1)*5);
}

//allocate the cufft plans depending on chosen precision
void define_cufftPlans()
{
	int n[3] = {N, M, L};

	if(precision)
	{
		hipfftPlan3d(&plan_3d_forward, N, M, L, HIPFFT_D2Z);
		hipfftPlan3d(&plan_3d_inverse, N, M, L, HIPFFT_Z2D);
		hipfftPlanMany(&plan_3d_many_5_inverse, 3, n, NULL, 1, M*N*(L/2 + 1), NULL, 1, M*N*L, HIPFFT_Z2D, 5);
		hipfftPlanMany(&plan_3d_many_5_forward, 3, n, NULL, 1, M*N*L, NULL, 1, N*M*(L/2 + 1), HIPFFT_D2Z, 5);
	}
	else
	{
		hipfftPlan3d(&plan_3d_forward, N, M, L, HIPFFT_R2C);
		hipfftPlan3d(&plan_3d_inverse, N, M, L, HIPFFT_C2R);
		hipfftPlanMany(&plan_3d_many_5_inverse, 3, n, NULL, 1, M*N*(L/2 + 1), NULL, 1, M*N*L, HIPFFT_C2R, 5);
		hipfftPlanMany(&plan_3d_many_5_forward, 3, n, NULL, 1, M*N*L, NULL, 1, N*M*(L/2 + 1), HIPFFT_R2C, 5);
	}
}

//free allocated memory
void freeDevice()
{
	hipFree(rho_dev);
	hipFree(wD_dev);
	hipFree(fwF_dev);
	hipFree(fwD_dev);
	hipFree(frho_dev);
	hipFree(c1_dev);
	hipFree(fc1_dev);
	hipFree(blockSum_dev);

	free(rho);
	free(wD);
	free(c1);
	free(blockSum);
}

void choose_device()
{
	double globalMem, maxGlobalMem, minUsedMem;
	size_t free_bytes, total_bytes;
	maxGlobalMem = minUsedMem = globalMem = 0.;
	int device = 0;

	//Choosing CUDA device based on device properties
	int numberDevices = 0;
	hipGetDeviceCount(&numberDevices);
	if(numberDevices == 0)
	{
		printf("ERROR: NO CUDA DEVICE FOUND! \n");
		exit(1);
	}
	minUsedMem = (double) INT_MAX;
	printf("\n ///////////////////////////////////////////////  \n");
	printf("CUDA device properties \n");
	for(int i = 0; i < numberDevices; i++)
	{
		hipSetDevice(i);
		hipDeviceProp_t propDev;
		hipGetDeviceProperties(&propDev, i);
		hipMemGetInfo(&free_bytes, &total_bytes);
		double usedMem = ((double) total_bytes - (double) free_bytes)/1024/1024; //in megabytes
		globalMem = (double) propDev.totalGlobalMem/1024./1024.; //in megabytes

		printf("# Device: %i; Curr. used mem.: %1.2f MB; Global mem.: %1.2f MB \n", i, usedMem, globalMem);
		if(globalMem > maxGlobalMem && usedMem < minUsedMem)
		{
			maxGlobalMem = globalMem;
			minUsedMem = usedMem;
			device = i;
		}
	}
	printf("Chosen CUDA device: %i \n", device);
	printf("/////////////////////////////////////////////// \n\n");
	hipSetDevice(device);
}


int main(int argc, char **argv)
{
	//get the input parameters
	eta = atof(argv[1]);
	Lx = atof(argv[2]);
	Ly = atof(argv[3]);
	Lz = atof(argv[4]);
	precision = atoi(argv[5]);
	fullProfile = atoi(argv[6]);

	//set the spatial resolution
	dx = Lx/N;
	dy = Ly/M;
	dz = Lz/L;

	//set the bulk density
	rhob = 3*eta/(pi_4*R*R*R);

	printf("System size: Lx = %1.3f R; Ly = %1.3f R; Lz = %1.3f R \n", Lx, Ly, Lz);
	printf("Spatial resolution: dx = %1.5f R; dy = %1.5f R; dz = %1.5f R \n", dx, dy, dz);
	printf("Number of grid points: N_x = %i; N_y = %i; N_z = %i \n", N, M, L);

	//choose CUDA device based on memory occupation and amount of global memory
	choose_device();

	define_cufftPlans();

	if(!precision)
	{
		allocateMemory<float, float2>();

		clock_t time_t = clock(),time_end;
		iterate<float, float2>();
		time_end=clock();
		printf("Done after %2.6f seconds \n",(time_end-time_t)/1000000.);

		hipMemcpy((float*) rho, (float*) rho_dev, sizeof(float)*N*M*L, hipMemcpyDeviceToHost);
		hipMemcpy((float*) wD, (float*) wD_dev, sizeof(float)*N*M*L*5, hipMemcpyDeviceToHost);

		writeData<float>(false);
	}
	else
	{
		allocateMemory<double, double2>();

		clock_t time_t = clock(),time_end;
		iterate<double, double2>();
		time_end=clock();
		printf("Done after %2.6f seconds \n",(time_end-time_t)/1000000.);

		hipMemcpy((double*) rho, (double*) rho_dev, sizeof(double)*N*M*L, hipMemcpyDeviceToHost);
		hipMemcpy((double*) wD, (double*) wD_dev, sizeof(double)*N*M*L*5, hipMemcpyDeviceToHost);

		writeData<double>(false);
	}
	hipDeviceSynchronize();


	freeDevice();

	exit(0);
}


	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4muPYv
.LCPI0_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI0_1:
	.quad	0x4008000000000000              # double 3
.LCPI0_2:
	.quad	0x401e000000000000              # double 7.5
.LCPI0_3:
	.quad	0x401c000000000000              # double 7
	.text
	.globl	_Z4muPYv
	.type	_Z4muPYv,@function
_Z4muPYv:                               # @_Z4muPYv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movsd	eta(%rip), %xmm1                # xmm1 = mem[0],zero
	movsd	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm1, %xmm0
	divsd	%xmm0, %xmm1
	movsd	.LCPI0_1(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm1, %xmm2
	addsd	.LCPI0_2(%rip), %xmm2
	mulsd	%xmm1, %xmm2
	addsd	.LCPI0_3(%rip), %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, (%rsp)                   # 8-byte Spill
	callq	log
	movsd	(%rsp), %xmm1                   # 8-byte Reload
                                        # xmm1 = mem[0],zero
	subsd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z4muPYv, .Lfunc_end0-_Z4muPYv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z3pPYv
.LCPI1_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI1_1:
	.quad	0x4008000000000000              # double 3
	.text
	.globl	_Z3pPYv
	.type	_Z3pPYv,@function
_Z3pPYv:                                # @_Z3pPYv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movsd	eta(%rip), %xmm2                # xmm2 = mem[0],zero
	movsd	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movapd	%xmm2, %xmm1
	addsd	%xmm0, %xmm1
	subsd	%xmm2, %xmm0
	mulsd	%xmm2, %xmm2
	addsd	%xmm1, %xmm2
	mulsd	rhob(%rip), %xmm2
	movsd	%xmm2, (%rsp)                   # 8-byte Spill
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
	callq	pow
	movsd	(%rsp), %xmm1                   # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z3pPYv, .Lfunc_end1-_Z3pPYv
	.cfi_endproc
                                        # -- End function
	.globl	_Z17define_cufftPlansv          # -- Begin function _Z17define_cufftPlansv
	.type	_Z17define_cufftPlansv,@function
_Z17define_cufftPlansv:                 # @_Z17define_cufftPlansv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	N(%rip), %esi
	movl	%esi, 12(%rsp)
	movl	M(%rip), %edx
	movl	%edx, 16(%rsp)
	movl	L(%rip), %ecx
	movl	%ecx, 20(%rsp)
	cmpb	$0, precision(%rip)
	je	.LBB2_2
# %bb.1:
	movl	$plan_3d_forward, %edi
	movl	$106, %r8d
	callq	hipfftPlan3d
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movl	$plan_3d_inverse, %edi
	movl	$108, %r8d
	callq	hipfftPlan3d
	movl	N(%rip), %eax
	imull	M(%rip), %eax
	movl	L(%rip), %ecx
	movl	%ecx, %r9d
	shrl	$31, %r9d
	addl	%ecx, %r9d
	sarl	%r9d
	incl	%r9d
	imull	%eax, %r9d
	imull	%ecx, %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$5, %r12d
	movl	$1, %r15d
	xorl	%r14d, %r14d
	leaq	20(%rsp), %rbx
	movl	$plan_3d_many_5_inverse, %edi
	movl	$3, %esi
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$108
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	hipfftPlanMany
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	movl	N(%rip), %r9d
	imull	M(%rip), %r9d
	movl	L(%rip), %eax
	movl	%eax, %r10d
	shrl	$31, %r10d
	addl	%eax, %r10d
	sarl	%r10d
	incl	%r10d
	imull	%r9d, %r10d
	imull	%eax, %r9d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$plan_3d_many_5_forward, %edi
	movl	$3, %esi
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$106
	.cfi_adjust_cfa_offset 8
	jmp	.LBB2_3
.LBB2_2:
	.cfi_def_cfa_offset 64
	movl	$plan_3d_forward, %edi
	movl	$42, %r8d
	callq	hipfftPlan3d
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movl	$plan_3d_inverse, %edi
	movl	$44, %r8d
	callq	hipfftPlan3d
	movl	N(%rip), %eax
	imull	M(%rip), %eax
	movl	L(%rip), %ecx
	movl	%ecx, %r9d
	shrl	$31, %r9d
	addl	%ecx, %r9d
	sarl	%r9d
	incl	%r9d
	imull	%eax, %r9d
	imull	%ecx, %eax
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$5, %r12d
	movl	$1, %r15d
	xorl	%r14d, %r14d
	leaq	20(%rsp), %rbx
	movl	$plan_3d_many_5_inverse, %edi
	movl	$3, %esi
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$44
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	hipfftPlanMany
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	movl	N(%rip), %r9d
	imull	M(%rip), %r9d
	movl	L(%rip), %eax
	movl	%eax, %r10d
	shrl	$31, %r10d
	addl	%eax, %r10d
	sarl	%r10d
	incl	%r10d
	imull	%r9d, %r10d
	imull	%eax, %r9d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$plan_3d_many_5_forward, %edi
	movl	$3, %esi
	movq	%rbx, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	$42
	.cfi_adjust_cfa_offset 8
.LBB2_3:
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%r15
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	callq	hipfftPlanMany
	addq	$48, %rsp
	.cfi_adjust_cfa_offset -48
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17define_cufftPlansv, .Lfunc_end2-_Z17define_cufftPlansv
	.cfi_endproc
                                        # -- End function
	.globl	_Z10freeDevicev                 # -- Begin function _Z10freeDevicev
	.type	_Z10freeDevicev,@function
_Z10freeDevicev:                        # @_Z10freeDevicev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	rho_dev(%rip), %rdi
	callq	hipFree
	movq	wD_dev(%rip), %rdi
	callq	hipFree
	movq	fwF_dev(%rip), %rdi
	callq	hipFree
	movq	fwD_dev(%rip), %rdi
	callq	hipFree
	movq	frho_dev(%rip), %rdi
	callq	hipFree
	movq	c1_dev(%rip), %rdi
	callq	hipFree
	movq	fc1_dev(%rip), %rdi
	callq	hipFree
	movq	blockSum_dev(%rip), %rdi
	callq	hipFree
	movq	rho(%rip), %rdi
	callq	free
	movq	wD(%rip), %rdi
	callq	free
	movq	c1(%rip), %rdi
	callq	free
	movq	blockSum(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end3:
	.size	_Z10freeDevicev, .Lfunc_end3-_Z10freeDevicev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z13choose_devicev
.LCPI4_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI4_3:
	.quad	0x3f50000000000000              # double 9.765625E-4
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_1:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI4_2:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.text
	.globl	_Z13choose_devicev
	.type	_Z13choose_devicev,@function
_Z13choose_devicev:                     # @_Z13choose_devicev
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$1568, %rsp                     # imm = 0x620
	.cfi_def_cfa_offset 1616
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	12(%rsp), %rbx
	movl	$0, (%rbx)
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	je	.LBB4_8
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	cmpl	$0, 12(%rsp)
	jle	.LBB4_2
# %bb.4:                                # %.lr.ph
	xorpd	%xmm1, %xmm1
	movsd	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero
	xorl	%ebp, %ebp
	leaq	96(%rsp), %r14
	leaq	24(%rsp), %r15
	leaq	16(%rsp), %r12
	xorl	%ebx, %ebx
.LBB4_5:                                # =>This Inner Loop Header: Depth=1
	movapd	%xmm1, 64(%rsp)                 # 16-byte Spill
	movapd	%xmm0, 80(%rsp)                 # 16-byte Spill
	movl	%ebp, %edi
	callq	hipSetDevice
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMemGetInfo
	movsd	16(%rsp), %xmm0                 # xmm0 = mem[0],zero
	movapd	.LCPI4_1(%rip), %xmm2           # xmm2 = [1127219200,1160773632,0,0]
	unpcklps	%xmm2, %xmm0                    # xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
	movapd	.LCPI4_2(%rip), %xmm3           # xmm3 = [4.503599627370496E+15,1.9342813113834067E+25]
	subpd	%xmm3, %xmm0
	movapd	%xmm0, %xmm4
	unpckhpd	%xmm0, %xmm4                    # xmm4 = xmm4[1],xmm0[1]
	addsd	%xmm0, %xmm4
	movsd	24(%rsp), %xmm0                 # xmm0 = mem[0],zero
	unpcklps	%xmm2, %xmm0                    # xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
	subpd	%xmm3, %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	subsd	%xmm1, %xmm4
	movsd	.LCPI4_3(%rip), %xmm5           # xmm5 = mem[0],zero
	mulsd	%xmm5, %xmm4
	mulsd	%xmm5, %xmm4
	movapd	%xmm4, 48(%rsp)                 # 16-byte Spill
	movsd	384(%rsp), %xmm0                # xmm0 = mem[0],zero
	unpcklps	%xmm2, %xmm0                    # xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
	subpd	%xmm3, %xmm0
	movapd	%xmm0, %xmm1
	unpckhpd	%xmm0, %xmm1                    # xmm1 = xmm1[1],xmm0[1]
	addsd	%xmm0, %xmm1
	mulsd	%xmm5, %xmm1
	mulsd	%xmm5, %xmm1
	movapd	%xmm1, 32(%rsp)                 # 16-byte Spill
	movl	$.L.str.3, %edi
	movl	%ebp, %esi
	movapd	%xmm4, %xmm0
	movb	$2, %al
	callq	printf
	movapd	32(%rsp), %xmm5                 # 16-byte Reload
	movapd	48(%rsp), %xmm4                 # 16-byte Reload
	movapd	64(%rsp), %xmm3                 # 16-byte Reload
	movapd	80(%rsp), %xmm2                 # 16-byte Reload
	movapd	%xmm4, %xmm0
	cmpltpd	%xmm2, %xmm0
	movapd	%xmm3, %xmm1
	cmpltpd	%xmm5, %xmm1
	andpd	%xmm0, %xmm1
	movd	%xmm1, %eax
	testb	$1, %al
	jne	.LBB4_7
# %bb.6:                                #   in Loop: Header=BB4_5 Depth=1
	movapd	%xmm3, %xmm5
	movapd	%xmm2, %xmm4
.LBB4_7:                                #   in Loop: Header=BB4_5 Depth=1
	cmovnel	%ebp, %ebx
	incl	%ebp
	movapd	%xmm4, %xmm0
	movapd	%xmm5, %xmm1
	cmpl	12(%rsp), %ebp
	jl	.LBB4_5
	jmp	.LBB4_3
.LBB4_2:
	xorl	%ebx, %ebx
.LBB4_3:                                # %._crit_edge
	movl	$.L.str.4, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movl	%ebx, %edi
	callq	hipSetDevice
	addq	$1568, %rsp                     # imm = 0x620
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_8:
	.cfi_def_cfa_offset 1616
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end4:
	.size	_Z13choose_devicev, .Lfunc_end4-_Z13choose_devicev
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x4008000000000000              # double 3
.LCPI5_1:
	.quad	0x402921fb54442d18              # double 12.566370614359172
.LCPI5_2:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atof
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movsd	%xmm0, eta(%rip)
	movq	16(%rbx), %rdi
	callq	atof
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movsd	%xmm0, Lx(%rip)
	movq	24(%rbx), %rdi
	callq	atof
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movsd	%xmm0, Ly(%rip)
	movq	32(%rbx), %rdi
	callq	atof
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movsd	%xmm0, Lz(%rip)
	movq	40(%rbx), %rdi
	callq	atoi
	testl	%eax, %eax
	setne	precision(%rip)
	movq	48(%rbx), %rdi
	callq	atoi
	testl	%eax, %eax
	setne	fullProfile(%rip)
	cvtsi2sdl	N(%rip), %xmm2
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movapd	%xmm0, %xmm1
	divsd	%xmm2, %xmm1
	movsd	%xmm1, dx(%rip)
	xorps	%xmm2, %xmm2
	cvtsi2sdl	M(%rip), %xmm2
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movapd	%xmm1, %xmm3
	divsd	%xmm2, %xmm3
	movsd	%xmm3, dy(%rip)
	cvtsi2sdl	L(%rip), %xmm4
	movsd	(%rsp), %xmm2                   # 8-byte Reload
                                        # xmm2 = mem[0],zero
	movapd	%xmm2, %xmm3
	divsd	%xmm4, %xmm3
	movsd	24(%rsp), %xmm4                 # 8-byte Reload
                                        # xmm4 = mem[0],zero
	mulsd	.LCPI5_0(%rip), %xmm4
	movsd	%xmm3, dz(%rip)
	divsd	.LCPI5_1(%rip), %xmm4
	movsd	%xmm4, rhob(%rip)
	movl	$.L.str.6, %edi
	movb	$3, %al
	callq	printf
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movl	$.L.str.7, %edi
	movb	$3, %al
	callq	printf
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	callq	_Z13choose_devicev
	callq	_Z17define_cufftPlansv
	cmpb	$0, precision(%rip)
	jne	.LBB5_2
# %bb.1:
	callq	_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv
	callq	clock
	movq	%rax, %rbx
	callq	_Z7iterateIf15HIP_vector_typeIfLj2EEEvv
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_2(%rip), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	rho(%rip), %rdi
	movq	rho_dev(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rdx
	imulq	%rcx, %rdx
	shlq	$2, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	wD(%rip), %rdi
	movq	wD_dev(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rax
	imulq	%rcx, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,4), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%edi, %edi
	callq	_Z9writeDataIfEvb
	jmp	.LBB5_3
.LBB5_2:
	callq	_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv
	callq	clock
	movq	%rax, %rbx
	callq	_Z7iterateId15HIP_vector_typeIdLj2EEEvv
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_2(%rip), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	rho(%rip), %rdi
	movq	rho_dev(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rdx
	imulq	%rcx, %rdx
	shlq	$3, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	wD(%rip), %rdi
	movq	wD_dev(%rip), %rsi
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rax
	imulq	%rcx, %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,4), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%edi, %edi
	callq	_Z9writeDataIdEvb
.LBB5_3:
	callq	hipDeviceSynchronize
	callq	_Z10freeDevicev
	xorl	%edi, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv,"axG",@progbits,_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv,comdat
	.weak	_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv # -- Begin function _Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv
	.type	_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv,@function
_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv: # @_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rbx
	imulq	%rcx, %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, rho(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, c1(%rip)
	leaq	(%rbx,%rbx,4), %rdi
	callq	malloc
	movq	%rax, wD(%rip)
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, blockSum(%rip)
	movl	$blockSum_dev, %edi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rsi
	imulq	%rcx, %rsi
	shlq	$2, %rsi
	movl	$rho_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rsi
	imulq	%rcx, %rsi
	shlq	$2, %rsi
	movl	$rho_old_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rsi
	imulq	%rcx, %rsi
	shlq	$2, %rsi
	movl	$c1_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rax
	imulq	%rcx, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,4), %rsi
	movl	$wD_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rax
	imulq	%rcx, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,4), %rsi
	movl	$fwF_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rsi
	imulq	%rcx, %rsi
	shlq	$3, %rsi
	movl	$frho_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rsi
	imulq	%rcx, %rsi
	shlq	$3, %rsi
	movl	$fc1_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rax
	imulq	%rcx, %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,4), %rsi
	movl	$fwD_dev, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipMalloc                       # TAILCALL
.Lfunc_end6:
	.size	_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv, .Lfunc_end6-_Z14allocateMemoryIf15HIP_vector_typeIfLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7iterateIf15HIP_vector_typeIfLj2EEEvv
.LCPI7_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI7_1:
	.quad	0x4008000000000000              # double 3
.LCPI7_2:
	.quad	0x401e000000000000              # double 7.5
.LCPI7_3:
	.quad	0x401c000000000000              # double 7
	.section	.text._Z7iterateIf15HIP_vector_typeIfLj2EEEvv,"axG",@progbits,_Z7iterateIf15HIP_vector_typeIfLj2EEEvv,comdat
	.weak	_Z7iterateIf15HIP_vector_typeIfLj2EEEvv
	.type	_Z7iterateIf15HIP_vector_typeIfLj2EEEvv,@function
_Z7iterateIf15HIP_vector_typeIfLj2EEEvv: # @_Z7iterateIf15HIP_vector_typeIfLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967424, %rbx               # imm = 0x100000080
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$0, iterCount(%rip)
	movb	$1, running(%rip)
	leaq	896(%rbx), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	rho_dev(%rip), %rdi
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movsd	rhob(%rip), %xmm3               # xmm3 = mem[0],zero
	callq	_Z26__device_stub__initDensityIfEvPT_iiidddd
.LBB7_2:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:
	movq	fwF_dev(%rip), %rdi
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	callq	_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd
.LBB7_4:
	movsd	eta(%rip), %xmm1                # xmm1 = mem[0],zero
	movsd	.LCPI7_0(%rip), %xmm0           # xmm0 = mem[0],zero
	subsd	%xmm1, %xmm0
	divsd	%xmm0, %xmm1
	movsd	.LCPI7_1(%rip), %xmm2           # xmm2 = mem[0],zero
	mulsd	%xmm1, %xmm2
	addsd	.LCPI7_2(%rip), %xmm2
	mulsd	%xmm1, %xmm2
	addsd	.LCPI7_3(%rip), %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, 8(%rsp)                  # 8-byte Spill
	callq	log
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	subsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	$429496728, %ebp                # imm = 0x19999998
.LBB7_5:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_7
# %bb.6:                                #   in Loop: Header=BB7_5 Depth=1
	movq	rho_dev(%rip), %rdi
	movl	N(%rip), %edx
	movl	M(%rip), %ecx
	movl	L(%rip), %r8d
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movl	$1, %esi
	callq	_Z29__device_stub__prepareDensityIfEvPT_biiiddd
.LBB7_7:                                #   in Loop: Header=BB7_5 Depth=1
	callq	_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv
	callq	_Z9variationIf15HIP_vector_typeIfLj2EEEvv
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_9
# %bb.8:                                #   in Loop: Header=BB7_5 Depth=1
	movq	rho_dev(%rip), %rdi
	movl	N(%rip), %edx
	movl	M(%rip), %ecx
	movl	L(%rip), %r8d
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	xorl	%esi, %esi
	callq	_Z29__device_stub__prepareDensityIfEvPT_biiiddd
.LBB7_9:                                #   in Loop: Header=BB7_5 Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_11
# %bb.10:                               #   in Loop: Header=BB7_5 Depth=1
	movq	rho_dev(%rip), %rdi
	movq	c1_dev(%rip), %rsi
	movq	rho_old_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	movsd	rhob(%rip), %xmm1               # xmm1 = mem[0],zero
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid
.LBB7_11:                               #   in Loop: Header=BB7_5 Depth=1
	callq	_Z9convergedIfEvv
	movl	iterCount(%rip), %esi
	imull	$-858993459, %esi, %eax         # imm = 0xCCCCCCCD
	addl	%ebp, %eax
	rorl	%eax
	cmpl	%ebp, %eax
	ja	.LBB7_13
# %bb.12:                               #   in Loop: Header=BB7_5 Depth=1
	movsd	diff(%rip), %xmm0               # xmm0 = mem[0],zero
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	movl	iterCount(%rip), %esi
.LBB7_13:                               #   in Loop: Header=BB7_5 Depth=1
	incl	%esi
	movl	%esi, iterCount(%rip)
	cmpb	$0, running(%rip)
	jne	.LBB7_5
# %bb.14:
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv # TAILCALL
.Lfunc_end7:
	.size	_Z7iterateIf15HIP_vector_typeIfLj2EEEvv, .Lfunc_end7-_Z7iterateIf15HIP_vector_typeIfLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9writeDataIfEvb
.LCPI8_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI8_1:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI8_2:
	.quad	0x4008000000000000              # double 3
.LCPI8_3:
	.quad	0x3fe0000000000000              # double 0.5
	.section	.text._Z9writeDataIfEvb,"axG",@progbits,_Z9writeDataIfEvb,comdat
	.weak	_Z9writeDataIfEvb
	.type	_Z9writeDataIfEvb,@function
_Z9writeDataIfEvb:                      # @_Z9writeDataIfEvb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 384
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, 4(%rsp)                   # 4-byte Spill
	movsd	Lx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	Ly(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	Lz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movsd	eta(%rip), %xmm3                # xmm3 = mem[0],zero
	leaq	16(%rsp), %r14
	movl	$.L.str.14, %esi
	movq	%r14, %rdi
	movb	$4, %al
	callq	sprintf
	movl	$.L.str.15, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str.16, %edi
	movl	$114, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fwrite
	movl	N(%rip), %ecx
	movl	M(%rip), %esi
	movl	L(%rip), %edi
	movl	%edi, %eax
	imull	%esi, %eax
	imull	%ecx, %eax
	testl	%eax, %eax
	je	.LBB8_10
# %bb.1:                                # %.lr.ph
	movsd	.LCPI8_0(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	dz(%rip), %xmm0
	cvttsd2si	%xmm0, %ebx
	addl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB8_2:                                # =>This Inner Loop Header: Depth=1
	movl	%edi, %r8d
	imull	%esi, %r8d
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %r13d
	movl	%edx, %eax
	xorl	%edx, %edx
	divl	%edi
	movl	%eax, %r12d
	movl	%edx, %ebp
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	%eax, %r13d
	jne	.LBB8_5
# %bb.3:                                #   in Loop: Header=BB8_2 Depth=1
	movl	%esi, %edx
	shrl	$31, %edx
	addl	%esi, %edx
	sarl	%edx
	cmpl	%edx, %r12d
	jne	.LBB8_5
# %bb.4:                                #   in Loop: Header=BB8_2 Depth=1
	movl	%ebp, %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%edi, %xmm0
	mulsd	.LCPI8_1(%rip), %xmm0
	addsd	%xmm1, %xmm0
	mulsd	dx(%rip), %xmm0
	movq	rho(%rip), %rax
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rax,%r15,4), %xmm1
	movq	wD(%rip), %rax
	xorps	%xmm2, %xmm2
	cvtss2sd	(%rax,%r15,4), %xmm2
	movl	$.L.str.17, %esi
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
	movl	N(%rip), %ecx
	movl	M(%rip), %esi
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
.LBB8_5:                                #   in Loop: Header=BB8_2 Depth=1
	decl	%eax
	cmpl	%eax, %r13d
	jne	.LBB8_9
# %bb.6:                                #   in Loop: Header=BB8_2 Depth=1
	movl	%esi, %eax
	shrl	$31, %eax
	addl	%esi, %eax
	sarl	%eax
	decl	%eax
	cmpl	%eax, %r12d
	jne	.LBB8_9
# %bb.7:                                #   in Loop: Header=BB8_2 Depth=1
	cmpl	%ebx, %ebp
	jne	.LBB8_9
# %bb.8:                                #   in Loop: Header=BB8_2 Depth=1
	movq	rho(%rip), %rax
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rax,%r15,4), %xmm0
	movl	$.L.str.18, %edi
	movb	$1, %al
	callq	printf
	movl	N(%rip), %ecx
	movl	M(%rip), %esi
.LBB8_9:                                #   in Loop: Header=BB8_2 Depth=1
	incq	%r15
	movl	L(%rip), %edi
	movl	%esi, %eax
	imull	%ecx, %eax
	imull	%edi, %eax
	cmpq	%rax, %r15
	jb	.LBB8_2
.LBB8_10:                               # %._crit_edge
	movsd	eta(%rip), %xmm2                # xmm2 = mem[0],zero
	movsd	.LCPI8_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movapd	%xmm2, %xmm1
	addsd	%xmm0, %xmm1
	subsd	%xmm2, %xmm0
	mulsd	%xmm2, %xmm2
	addsd	%xmm1, %xmm2
	mulsd	rhob(%rip), %xmm2
	movsd	%xmm2, 8(%rsp)                  # 8-byte Spill
	movsd	.LCPI8_2(%rip), %xmm1           # xmm1 = mem[0],zero
	callq	pow
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movl	$.L.str.19, %edi
	movapd	%xmm1, %xmm0
	movb	$1, %al
	callq	printf
	movl	$.L.str.20, %edi
	movl	$2, %esi
	movl	$1, %edx
	movq	%r14, %rcx
	callq	fwrite
	movq	%r14, %rdi
	callq	fclose
	movsd	Lx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	Ly(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	Lz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movsd	eta(%rip), %xmm3                # xmm3 = mem[0],zero
	leaq	16(%rsp), %r14
	movl	$.L.str.21, %esi
	movq	%r14, %rdi
	movb	$4, %al
	callq	sprintf
	movl	$.L.str.15, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	movl	N(%rip), %edi
	movl	M(%rip), %ecx
	movl	L(%rip), %esi
	movl	%esi, %eax
	imull	%ecx, %eax
	imull	%edi, %eax
	testl	%eax, %eax
	je	.LBB8_15
# %bb.11:                               # %.lr.ph45.preheader
	xorl	%r15d, %r15d
.LBB8_12:                               # %.lr.ph45
                                        # =>This Inner Loop Header: Depth=1
	movl	%esi, %r8d
	imull	%ecx, %r8d
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%edi, %r8d
	shrl	$31, %r8d
	addl	%edi, %r8d
	sarl	%r8d
	cmpl	%r8d, %eax
	jne	.LBB8_14
# %bb.13:                               #   in Loop: Header=BB8_12 Depth=1
	movl	%edx, %eax
	xorl	%edx, %edx
	divl	%esi
                                        # kill: def $eax killed $eax def $rax
                                        # kill: def $edx killed $edx def $rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%esi, %xmm1
	movsd	.LCPI8_3(%rip), %xmm3           # xmm3 = mem[0],zero
	mulsd	%xmm3, %xmm1
	subsd	%xmm1, %xmm0
	mulsd	dz(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	xorps	%xmm2, %xmm2
	cvtsi2sd	%ecx, %xmm2
	mulsd	%xmm3, %xmm2
	subsd	%xmm2, %xmm1
	mulsd	dy(%rip), %xmm1
	movq	rho(%rip), %rax
	xorps	%xmm2, %xmm2
	cvtss2sd	(%rax,%r15,4), %xmm2
	movl	$.L.str.17, %esi
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
	movl	N(%rip), %edi
	movl	M(%rip), %ecx
	movl	L(%rip), %esi
.LBB8_14:                               #   in Loop: Header=BB8_12 Depth=1
	incq	%r15
	movl	%esi, %eax
	imull	%ecx, %eax
	imull	%edi, %eax
	cmpq	%rax, %r15
	jb	.LBB8_12
.LBB8_15:                               # %._crit_edge46
	movq	%r14, %rdi
	callq	fclose
	cmpb	$0, 4(%rsp)                     # 1-byte Folded Reload
	je	.LBB8_16
# %bb.17:
	movl	N(%rip), %edx
	movl	M(%rip), %ecx
	movl	L(%rip), %r8d
	movsd	eta(%rip), %xmm0                # xmm0 = mem[0],zero
	leaq	16(%rsp), %rbx
	movl	$.L.str.22, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	sprintf
	movl	$.L.str.23, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	movq	rho(%rip), %rdi
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rdx
	imulq	%rcx, %rdx
	movl	$8, %esi
	movq	%rbx, %rcx
	callq	fwrite
	movq	%rbx, %rdi
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.LBB8_16:
	.cfi_def_cfa_offset 384
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z9writeDataIfEvb, .Lfunc_end8-_Z9writeDataIfEvb
	.cfi_endproc
                                        # -- End function
	.section	.text._Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv,"axG",@progbits,_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv,comdat
	.weak	_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv # -- Begin function _Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv
	.type	_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv,@function
_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv: # @_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rbx
	imulq	%rcx, %rbx
	shlq	$3, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, rho(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, c1(%rip)
	leaq	(%rbx,%rbx,4), %rdi
	callq	malloc
	movq	%rax, wD(%rip)
	movl	$8192, %edi                     # imm = 0x2000
	callq	malloc
	movq	%rax, blockSum(%rip)
	movl	$blockSum_dev, %edi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rsi
	imulq	%rcx, %rsi
	shlq	$3, %rsi
	movl	$rho_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rsi
	imulq	%rcx, %rsi
	shlq	$3, %rsi
	movl	$rho_old_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rsi
	imulq	%rcx, %rsi
	shlq	$3, %rsi
	movl	$c1_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rax
	imulq	%rcx, %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,4), %rsi
	movl	$wD_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rax
	imulq	%rcx, %rax
	shlq	$3, %rax
	leaq	(%rax,%rax,4), %rsi
	movl	$fwF_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rsi
	imulq	%rcx, %rsi
	shlq	$4, %rsi
	movl	$frho_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rsi
	imulq	%rcx, %rsi
	shlq	$4, %rsi
	movl	$fc1_dev, %edi
	callq	hipMalloc
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movl	L(%rip), %eax
	movl	%eax, %edx
	shrl	$31, %edx
	addl	%eax, %edx
	sarl	%edx
	incl	%edx
	movslq	%edx, %rax
	imulq	%rcx, %rax
	shlq	$4, %rax
	leaq	(%rax,%rax,4), %rsi
	movl	$fwD_dev, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	hipMalloc                       # TAILCALL
.Lfunc_end9:
	.size	_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv, .Lfunc_end9-_Z14allocateMemoryId15HIP_vector_typeIdLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7iterateId15HIP_vector_typeIdLj2EEEvv
.LCPI10_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI10_1:
	.quad	0x4008000000000000              # double 3
.LCPI10_2:
	.quad	0x401e000000000000              # double 7.5
.LCPI10_3:
	.quad	0x401c000000000000              # double 7
	.section	.text._Z7iterateId15HIP_vector_typeIdLj2EEEvv,"axG",@progbits,_Z7iterateId15HIP_vector_typeIdLj2EEEvv,comdat
	.weak	_Z7iterateId15HIP_vector_typeIdLj2EEEvv
	.type	_Z7iterateId15HIP_vector_typeIdLj2EEEvv,@function
_Z7iterateId15HIP_vector_typeIdLj2EEEvv: # @_Z7iterateId15HIP_vector_typeIdLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967424, %rbx               # imm = 0x100000080
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movl	$0, iterCount(%rip)
	movb	$1, running(%rip)
	leaq	896(%rbx), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:
	movq	rho_dev(%rip), %rdi
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movsd	rhob(%rip), %xmm3               # xmm3 = mem[0],zero
	callq	_Z26__device_stub__initDensityIdEvPT_iiidddd
.LBB10_2:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_4
# %bb.3:
	movq	fwF_dev(%rip), %rdi
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	callq	_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd
.LBB10_4:
	movsd	eta(%rip), %xmm1                # xmm1 = mem[0],zero
	movsd	.LCPI10_0(%rip), %xmm0          # xmm0 = mem[0],zero
	subsd	%xmm1, %xmm0
	divsd	%xmm0, %xmm1
	movsd	.LCPI10_1(%rip), %xmm2          # xmm2 = mem[0],zero
	mulsd	%xmm1, %xmm2
	addsd	.LCPI10_2(%rip), %xmm2
	mulsd	%xmm1, %xmm2
	addsd	.LCPI10_3(%rip), %xmm2
	mulsd	%xmm1, %xmm2
	movsd	%xmm2, 8(%rsp)                  # 8-byte Spill
	callq	log
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	subsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movl	$429496728, %ebp                # imm = 0x19999998
.LBB10_5:                               # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_7
# %bb.6:                                #   in Loop: Header=BB10_5 Depth=1
	movq	rho_dev(%rip), %rdi
	movl	N(%rip), %edx
	movl	M(%rip), %ecx
	movl	L(%rip), %r8d
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movl	$1, %esi
	callq	_Z29__device_stub__prepareDensityIdEvPT_biiiddd
.LBB10_7:                               #   in Loop: Header=BB10_5 Depth=1
	callq	_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv
	callq	_Z9variationId15HIP_vector_typeIdLj2EEEvv
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_9
# %bb.8:                                #   in Loop: Header=BB10_5 Depth=1
	movq	rho_dev(%rip), %rdi
	movl	N(%rip), %edx
	movl	M(%rip), %ecx
	movl	L(%rip), %r8d
	movsd	dx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	dy(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	dz(%rip), %xmm2                 # xmm2 = mem[0],zero
	xorl	%esi, %esi
	callq	_Z29__device_stub__prepareDensityIdEvPT_biiiddd
.LBB10_9:                               #   in Loop: Header=BB10_5 Depth=1
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_11
# %bb.10:                               #   in Loop: Header=BB10_5 Depth=1
	movq	rho_dev(%rip), %rdi
	movq	c1_dev(%rip), %rsi
	movq	rho_old_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	movsd	rhob(%rip), %xmm1               # xmm1 = mem[0],zero
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid
.LBB10_11:                              #   in Loop: Header=BB10_5 Depth=1
	callq	_Z9convergedIdEvv
	movl	iterCount(%rip), %esi
	imull	$-858993459, %esi, %eax         # imm = 0xCCCCCCCD
	addl	%ebp, %eax
	rorl	%eax
	cmpl	%ebp, %eax
	ja	.LBB10_13
# %bb.12:                               #   in Loop: Header=BB10_5 Depth=1
	movsd	diff(%rip), %xmm0               # xmm0 = mem[0],zero
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	movl	iterCount(%rip), %esi
.LBB10_13:                              #   in Loop: Header=BB10_5 Depth=1
	incl	%esi
	movl	%esi, iterCount(%rip)
	cmpb	$0, running(%rip)
	jne	.LBB10_5
# %bb.14:
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv # TAILCALL
.Lfunc_end10:
	.size	_Z7iterateId15HIP_vector_typeIdLj2EEEvv, .Lfunc_end10-_Z7iterateId15HIP_vector_typeIdLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9writeDataIdEvb
.LCPI11_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI11_1:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI11_2:
	.quad	0x4008000000000000              # double 3
.LCPI11_3:
	.quad	0x3fe0000000000000              # double 0.5
	.section	.text._Z9writeDataIdEvb,"axG",@progbits,_Z9writeDataIdEvb,comdat
	.weak	_Z9writeDataIdEvb
	.type	_Z9writeDataIdEvb,@function
_Z9writeDataIdEvb:                      # @_Z9writeDataIdEvb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 384
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, 4(%rsp)                   # 4-byte Spill
	movsd	Lx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	Ly(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	Lz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movsd	eta(%rip), %xmm3                # xmm3 = mem[0],zero
	leaq	16(%rsp), %r14
	movl	$.L.str.14, %esi
	movq	%r14, %rdi
	movb	$4, %al
	callq	sprintf
	movl	$.L.str.15, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str.16, %edi
	movl	$114, %esi
	movl	$1, %edx
	movq	%rax, %rcx
	callq	fwrite
	movl	N(%rip), %ecx
	movl	M(%rip), %esi
	movl	L(%rip), %edi
	movl	%edi, %eax
	imull	%esi, %eax
	imull	%ecx, %eax
	testl	%eax, %eax
	je	.LBB11_10
# %bb.1:                                # %.lr.ph
	movsd	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	dz(%rip), %xmm0
	cvttsd2si	%xmm0, %ebx
	addl	%ebx, %ebx
	xorl	%r15d, %r15d
.LBB11_2:                               # =>This Inner Loop Header: Depth=1
	movl	%edi, %r8d
	imull	%esi, %r8d
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%eax, %r13d
	movl	%edx, %eax
	xorl	%edx, %edx
	divl	%edi
	movl	%eax, %r12d
	movl	%edx, %ebp
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	cmpl	%eax, %r13d
	jne	.LBB11_5
# %bb.3:                                #   in Loop: Header=BB11_2 Depth=1
	movl	%esi, %edx
	shrl	$31, %edx
	addl	%esi, %edx
	sarl	%edx
	cmpl	%edx, %r12d
	jne	.LBB11_5
# %bb.4:                                #   in Loop: Header=BB11_2 Depth=1
	movl	%ebp, %eax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sd	%edi, %xmm0
	mulsd	.LCPI11_1(%rip), %xmm0
	addsd	%xmm1, %xmm0
	mulsd	dx(%rip), %xmm0
	movq	rho(%rip), %rax
	movsd	(%rax,%r15,8), %xmm1            # xmm1 = mem[0],zero
	movq	wD(%rip), %rax
	movsd	(%rax,%r15,8), %xmm2            # xmm2 = mem[0],zero
	movl	$.L.str.17, %esi
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
	movl	N(%rip), %ecx
	movl	M(%rip), %esi
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
.LBB11_5:                               #   in Loop: Header=BB11_2 Depth=1
	decl	%eax
	cmpl	%eax, %r13d
	jne	.LBB11_9
# %bb.6:                                #   in Loop: Header=BB11_2 Depth=1
	movl	%esi, %eax
	shrl	$31, %eax
	addl	%esi, %eax
	sarl	%eax
	decl	%eax
	cmpl	%eax, %r12d
	jne	.LBB11_9
# %bb.7:                                #   in Loop: Header=BB11_2 Depth=1
	cmpl	%ebx, %ebp
	jne	.LBB11_9
# %bb.8:                                #   in Loop: Header=BB11_2 Depth=1
	movq	rho(%rip), %rax
	movsd	(%rax,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.18, %edi
	movb	$1, %al
	callq	printf
	movl	N(%rip), %ecx
	movl	M(%rip), %esi
.LBB11_9:                               #   in Loop: Header=BB11_2 Depth=1
	incq	%r15
	movl	L(%rip), %edi
	movl	%esi, %eax
	imull	%ecx, %eax
	imull	%edi, %eax
	cmpq	%rax, %r15
	jb	.LBB11_2
.LBB11_10:                              # %._crit_edge
	movsd	eta(%rip), %xmm2                # xmm2 = mem[0],zero
	movsd	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movapd	%xmm2, %xmm1
	addsd	%xmm0, %xmm1
	subsd	%xmm2, %xmm0
	mulsd	%xmm2, %xmm2
	addsd	%xmm1, %xmm2
	mulsd	rhob(%rip), %xmm2
	movsd	%xmm2, 8(%rsp)                  # 8-byte Spill
	movsd	.LCPI11_2(%rip), %xmm1          # xmm1 = mem[0],zero
	callq	pow
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	movl	$.L.str.19, %edi
	movapd	%xmm1, %xmm0
	movb	$1, %al
	callq	printf
	movl	$.L.str.20, %edi
	movl	$2, %esi
	movl	$1, %edx
	movq	%r14, %rcx
	callq	fwrite
	movq	%r14, %rdi
	callq	fclose
	movsd	Lx(%rip), %xmm0                 # xmm0 = mem[0],zero
	movsd	Ly(%rip), %xmm1                 # xmm1 = mem[0],zero
	movsd	Lz(%rip), %xmm2                 # xmm2 = mem[0],zero
	movsd	eta(%rip), %xmm3                # xmm3 = mem[0],zero
	leaq	16(%rsp), %r14
	movl	$.L.str.21, %esi
	movq	%r14, %rdi
	movb	$4, %al
	callq	sprintf
	movl	$.L.str.15, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	movl	N(%rip), %edi
	movl	M(%rip), %ecx
	movl	L(%rip), %esi
	movl	%esi, %eax
	imull	%ecx, %eax
	imull	%edi, %eax
	testl	%eax, %eax
	je	.LBB11_15
# %bb.11:                               # %.lr.ph45.preheader
	xorl	%r15d, %r15d
.LBB11_12:                              # %.lr.ph45
                                        # =>This Inner Loop Header: Depth=1
	movl	%esi, %r8d
	imull	%ecx, %r8d
	movl	%r15d, %eax
	xorl	%edx, %edx
	divl	%r8d
	movl	%edi, %r8d
	shrl	$31, %r8d
	addl	%edi, %r8d
	sarl	%r8d
	cmpl	%r8d, %eax
	jne	.LBB11_14
# %bb.13:                               #   in Loop: Header=BB11_12 Depth=1
	movl	%edx, %eax
	xorl	%edx, %edx
	divl	%esi
                                        # kill: def $eax killed $eax def $rax
                                        # kill: def $edx killed $edx def $rdx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rdx, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%esi, %xmm1
	movsd	.LCPI11_3(%rip), %xmm3          # xmm3 = mem[0],zero
	mulsd	%xmm3, %xmm1
	subsd	%xmm1, %xmm0
	mulsd	dz(%rip), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	xorps	%xmm2, %xmm2
	cvtsi2sd	%ecx, %xmm2
	mulsd	%xmm3, %xmm2
	subsd	%xmm2, %xmm1
	mulsd	dy(%rip), %xmm1
	movq	rho(%rip), %rax
	movsd	(%rax,%r15,8), %xmm2            # xmm2 = mem[0],zero
	movl	$.L.str.17, %esi
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
	movl	N(%rip), %edi
	movl	M(%rip), %ecx
	movl	L(%rip), %esi
.LBB11_14:                              #   in Loop: Header=BB11_12 Depth=1
	incq	%r15
	movl	%esi, %eax
	imull	%ecx, %eax
	imull	%edi, %eax
	cmpq	%rax, %r15
	jb	.LBB11_12
.LBB11_15:                              # %._crit_edge46
	movq	%r14, %rdi
	callq	fclose
	cmpb	$0, 4(%rsp)                     # 1-byte Folded Reload
	je	.LBB11_16
# %bb.17:
	movl	N(%rip), %edx
	movl	M(%rip), %ecx
	movl	L(%rip), %r8d
	movsd	eta(%rip), %xmm0                # xmm0 = mem[0],zero
	leaq	16(%rsp), %rbx
	movl	$.L.str.22, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	sprintf
	movl	$.L.str.23, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	movq	rho(%rip), %rdi
	movslq	N(%rip), %rax
	movslq	M(%rip), %rcx
	imulq	%rax, %rcx
	movslq	L(%rip), %rdx
	imulq	%rcx, %rdx
	movl	$8, %esi
	movq	%rbx, %rcx
	callq	fwrite
	movq	%rbx, %rdi
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.LBB11_16:
	.cfi_def_cfa_offset 384
	addq	$328, %rsp                      # imm = 0x148
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z9writeDataIdEvb, .Lfunc_end11-_Z9writeDataIdEvb
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__initDensityIfEvPT_iiidddd,"axG",@progbits,_Z26__device_stub__initDensityIfEvPT_iiidddd,comdat
	.weak	_Z26__device_stub__initDensityIfEvPT_iiidddd # -- Begin function _Z26__device_stub__initDensityIfEvPT_iiidddd
	.type	_Z26__device_stub__initDensityIfEvPT_iiidddd,@function
_Z26__device_stub__initDensityIfEvPT_iiidddd: # @_Z26__device_stub__initDensityIfEvPT_iiidddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	56(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	48(%rsp), %r9
	movsd	%xmm2, (%r9)
	leaq	40(%rsp), %r10
	movsd	%xmm3, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11initDensityIfEvPT_iiidddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z26__device_stub__initDensityIfEvPT_iiidddd, .Lfunc_end12-_Z26__device_stub__initDensityIfEvPT_iiidddd
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd,"axG",@progbits,_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd,comdat
	.weak	_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd # -- Begin function _Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd
	.type	_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd,@function
_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd: # @_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	40(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	32(%rsp), %r9
	movsd	%xmm2, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19initWeightFunctionsIfEvPT_iiiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd, .Lfunc_end13-_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__prepareDensityIfEvPT_biiiddd,"axG",@progbits,_Z29__device_stub__prepareDensityIfEvPT_biiiddd,comdat
	.weak	_Z29__device_stub__prepareDensityIfEvPT_biiiddd # -- Begin function _Z29__device_stub__prepareDensityIfEvPT_biiiddd
	.type	_Z29__device_stub__prepareDensityIfEvPT_biiiddd,@function
_Z29__device_stub__prepareDensityIfEvPT_biiiddd: # @_Z29__device_stub__prepareDensityIfEvPT_biiiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	3(%rsp), %rdi
	movb	%sil, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	48(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	32(%rsp), %r10
	movsd	%xmm2, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14prepareDensityIfEvPT_biiiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z29__device_stub__prepareDensityIfEvPT_biiiddd, .Lfunc_end14-_Z29__device_stub__prepareDensityIfEvPT_biiiddd
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv,"axG",@progbits,_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv,comdat
	.weak	_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv # -- Begin function _Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv
	.type	_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv,@function
_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv: # @_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	cmpb	$0, precision(%rip)
	movq	plan_3d_forward(%rip), %rdi
	movq	rho_dev(%rip), %rsi
	movq	frho_dev(%rip), %rdx
	je	.LBB15_2
# %bb.1:
	callq	hipfftExecD2Z
	jmp	.LBB15_3
.LBB15_2:
	callq	hipfftExecR2C
.LBB15_3:
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	leaq	896(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB15_5
# %bb.4:
	movq	frho_dev(%rip), %rdi
	movq	fwF_dev(%rip), %rsi
	movq	fwD_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	callq	_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
.LBB15_5:
	cmpb	$0, precision(%rip)
	movq	plan_3d_many_5_inverse(%rip), %rdi
	movq	fwD_dev(%rip), %rsi
	movq	wD_dev(%rip), %rdx
	je	.LBB15_7
# %bb.6:
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipfftExecZ2D                   # TAILCALL
.LBB15_7:
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipfftExecC2R                   # TAILCALL
.Lfunc_end15:
	.size	_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv, .Lfunc_end15-_Z17weightedDensitiesIf15HIP_vector_typeIfLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._Z9variationIf15HIP_vector_typeIfLj2EEEvv,"axG",@progbits,_Z9variationIf15HIP_vector_typeIfLj2EEEvv,comdat
	.weak	_Z9variationIf15HIP_vector_typeIfLj2EEEvv # -- Begin function _Z9variationIf15HIP_vector_typeIfLj2EEEvv
	.type	_Z9variationIf15HIP_vector_typeIfLj2EEEvv,@function
_Z9variationIf15HIP_vector_typeIfLj2EEEvv: # @_Z9variationIf15HIP_vector_typeIfLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movabsq	$4294967424, %rbx               # imm = 0x100000080
	leaq	896(%rbx), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_2
# %bb.1:
	movq	wD_dev(%rip), %rdi
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	callq	_Z29__device_stub__calcDerivativeIfEvPT_iii
.LBB16_2:
	cmpb	$0, precision(%rip)
	movq	plan_3d_many_5_forward(%rip), %rdi
	movq	wD_dev(%rip), %rsi
	movq	fwD_dev(%rip), %rdx
	je	.LBB16_4
# %bb.3:
	callq	hipfftExecD2Z
	jmp	.LBB16_5
.LBB16_4:
	callq	hipfftExecR2C
.LBB16_5:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB16_7
# %bb.6:
	movq	fwD_dev(%rip), %rdi
	movq	fwF_dev(%rip), %rsi
	movq	fc1_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	callq	_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
.LBB16_7:
	cmpb	$0, precision(%rip)
	movq	plan_3d_inverse(%rip), %rdi
	movq	fc1_dev(%rip), %rsi
	movq	c1_dev(%rip), %rdx
	je	.LBB16_9
# %bb.8:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipfftExecZ2D                   # TAILCALL
.LBB16_9:
	.cfi_def_cfa_offset 32
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipfftExecC2R                   # TAILCALL
.Lfunc_end16:
	.size	_Z9variationIf15HIP_vector_typeIfLj2EEEvv, .Lfunc_end16-_Z9variationIf15HIP_vector_typeIfLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid,comdat
	.weak	_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid # -- Begin function _Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid
	.type	_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid,@function
_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid: # @_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	12(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	8(%rsp), %r10
	movl	%ecx, (%r10)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	32(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	movq	%r9, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mixing_stepIfEvPT_S1_S1_S0_iiid, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid, .Lfunc_end17-_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9convergedIfEvv
.LCPI18_0:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
	.section	.text._Z9convergedIfEvv,"axG",@progbits,_Z9convergedIfEvv,comdat
	.weak	_Z9convergedIfEvv
	.type	_Z9convergedIfEvv,@function
_Z9convergedIfEvv:                      # @_Z9convergedIfEvv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	$0, diff(%rip)
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	leaq	896(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB18_2
# %bb.1:
	movq	rho_dev(%rip), %rdi
	movq	rho_old_dev(%rip), %rsi
	movq	blockSum_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	callq	_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii
.LBB18_2:
	movq	blockSum(%rip), %rdi
	movq	blockSum_dev(%rip), %rsi
	movl	$4096, %edx                     # imm = 0x1000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	blockSum(%rip), %rax
	xorl	%ecx, %ecx
	movsd	diff(%rip), %xmm0               # xmm0 = mem[0],zero
.LBB18_3:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rax,%rcx,4), %xmm1
	addsd	%xmm1, %xmm0
	incq	%rcx
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB18_3
# %bb.4:
	movsd	dx(%rip), %xmm1                 # xmm1 = mem[0],zero
	mulsd	dy(%rip), %xmm1
	mulsd	dz(%rip), %xmm1
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, diff(%rip)
	ucomisd	%xmm0, %xmm0
	jp	.LBB18_7
# %bb.5:
	movsd	.LCPI18_0(%rip), %xmm1          # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	ja	.LBB18_7
# %bb.6:
	cmpl	$2500, iterCount(%rip)          # imm = 0x9C4
	jle	.LBB18_8
.LBB18_7:
	movb	$0, running(%rip)
.LBB18_8:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z9convergedIfEvv, .Lfunc_end18-_Z9convergedIfEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii # -- Begin function _Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.type	_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,@function
_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii: # @_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, .Lfunc_end19-_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__calcDerivativeIfEvPT_iii,"axG",@progbits,_Z29__device_stub__calcDerivativeIfEvPT_iii,comdat
	.weak	_Z29__device_stub__calcDerivativeIfEvPT_iii # -- Begin function _Z29__device_stub__calcDerivativeIfEvPT_iii
	.type	_Z29__device_stub__calcDerivativeIfEvPT_iii,@function
_Z29__device_stub__calcDerivativeIfEvPT_iii: # @_Z29__device_stub__calcDerivativeIfEvPT_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14calcDerivativeIfEvPT_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z29__device_stub__calcDerivativeIfEvPT_iii, .Lfunc_end20-_Z29__device_stub__calcDerivativeIfEvPT_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii # -- Begin function _Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.type	_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,@function
_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii: # @_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, .Lfunc_end21-_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii,"axG",@progbits,_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii,comdat
	.weak	_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii # -- Begin function _Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii
	.type	_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii,@function
_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii: # @_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16checkConvergenceIfEvPT_S1_S1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii, .Lfunc_end22-_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__initDensityIdEvPT_iiidddd,"axG",@progbits,_Z26__device_stub__initDensityIdEvPT_iiidddd,comdat
	.weak	_Z26__device_stub__initDensityIdEvPT_iiidddd # -- Begin function _Z26__device_stub__initDensityIdEvPT_iiidddd
	.type	_Z26__device_stub__initDensityIdEvPT_iiidddd,@function
_Z26__device_stub__initDensityIdEvPT_iiidddd: # @_Z26__device_stub__initDensityIdEvPT_iiidddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	56(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	48(%rsp), %r9
	movsd	%xmm2, (%r9)
	leaq	40(%rsp), %r10
	movsd	%xmm3, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11initDensityIdEvPT_iiidddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z26__device_stub__initDensityIdEvPT_iiidddd, .Lfunc_end23-_Z26__device_stub__initDensityIdEvPT_iiidddd
	.cfi_endproc
                                        # -- End function
	.section	.text._Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd,"axG",@progbits,_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd,comdat
	.weak	_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd # -- Begin function _Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd
	.type	_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd,@function
_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd: # @_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	40(%rsp), %r8
	movsd	%xmm1, (%r8)
	leaq	32(%rsp), %r9
	movsd	%xmm2, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19initWeightFunctionsIdEvPT_iiiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd, .Lfunc_end24-_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__prepareDensityIdEvPT_biiiddd,"axG",@progbits,_Z29__device_stub__prepareDensityIdEvPT_biiiddd,comdat
	.weak	_Z29__device_stub__prepareDensityIdEvPT_biiiddd # -- Begin function _Z29__device_stub__prepareDensityIdEvPT_biiiddd
	.type	_Z29__device_stub__prepareDensityIdEvPT_biiiddd,@function
_Z29__device_stub__prepareDensityIdEvPT_biiiddd: # @_Z29__device_stub__prepareDensityIdEvPT_biiiddd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	3(%rsp), %rdi
	movb	%sil, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	48(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	32(%rsp), %r10
	movsd	%xmm2, (%r10)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	movq	%r9, 48(%rbx)
	movq	%r10, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14prepareDensityIdEvPT_biiiddd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_Z29__device_stub__prepareDensityIdEvPT_biiiddd, .Lfunc_end25-_Z29__device_stub__prepareDensityIdEvPT_biiiddd
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv,"axG",@progbits,_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv,comdat
	.weak	_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv # -- Begin function _Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv
	.type	_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv,@function
_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv: # @_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	cmpb	$0, precision(%rip)
	movq	plan_3d_forward(%rip), %rdi
	movq	rho_dev(%rip), %rsi
	movq	frho_dev(%rip), %rdx
	je	.LBB26_2
# %bb.1:
	callq	hipfftExecD2Z
	jmp	.LBB26_3
.LBB26_2:
	callq	hipfftExecR2C
.LBB26_3:
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	leaq	896(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB26_5
# %bb.4:
	movq	frho_dev(%rip), %rdi
	movq	fwF_dev(%rip), %rsi
	movq	fwD_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	callq	_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
.LBB26_5:
	cmpb	$0, precision(%rip)
	movq	plan_3d_many_5_inverse(%rip), %rdi
	movq	fwD_dev(%rip), %rsi
	movq	wD_dev(%rip), %rdx
	je	.LBB26_7
# %bb.6:
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipfftExecZ2D                   # TAILCALL
.LBB26_7:
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipfftExecC2R                   # TAILCALL
.Lfunc_end26:
	.size	_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv, .Lfunc_end26-_Z17weightedDensitiesId15HIP_vector_typeIdLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._Z9variationId15HIP_vector_typeIdLj2EEEvv,"axG",@progbits,_Z9variationId15HIP_vector_typeIdLj2EEEvv,comdat
	.weak	_Z9variationId15HIP_vector_typeIdLj2EEEvv # -- Begin function _Z9variationId15HIP_vector_typeIdLj2EEEvv
	.type	_Z9variationId15HIP_vector_typeIdLj2EEEvv,@function
_Z9variationId15HIP_vector_typeIdLj2EEEvv: # @_Z9variationId15HIP_vector_typeIdLj2EEEvv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movabsq	$4294967424, %rbx               # imm = 0x100000080
	leaq	896(%rbx), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB27_2
# %bb.1:
	movq	wD_dev(%rip), %rdi
	movl	N(%rip), %esi
	movl	M(%rip), %edx
	movl	L(%rip), %ecx
	callq	_Z29__device_stub__calcDerivativeIdEvPT_iii
.LBB27_2:
	cmpb	$0, precision(%rip)
	movq	plan_3d_many_5_forward(%rip), %rdi
	movq	wD_dev(%rip), %rsi
	movq	fwD_dev(%rip), %rdx
	je	.LBB27_4
# %bb.3:
	callq	hipfftExecD2Z
	jmp	.LBB27_5
.LBB27_4:
	callq	hipfftExecR2C
.LBB27_5:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB27_7
# %bb.6:
	movq	fwD_dev(%rip), %rdi
	movq	fwF_dev(%rip), %rsi
	movq	fc1_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	callq	_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
.LBB27_7:
	cmpb	$0, precision(%rip)
	movq	plan_3d_inverse(%rip), %rdi
	movq	fc1_dev(%rip), %rsi
	movq	c1_dev(%rip), %rdx
	je	.LBB27_9
# %bb.8:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipfftExecZ2D                   # TAILCALL
.LBB27_9:
	.cfi_def_cfa_offset 32
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipfftExecC2R                   # TAILCALL
.Lfunc_end27:
	.size	_Z9variationId15HIP_vector_typeIdLj2EEEvv, .Lfunc_end27-_Z9variationId15HIP_vector_typeIdLj2EEEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid,comdat
	.weak	_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid # -- Begin function _Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid
	.type	_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid,@function
_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid: # @_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	20(%rsp), %r10
	movl	%ecx, (%r10)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	40(%rsp), %r9
	movsd	%xmm1, (%r9)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%r10, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	movq	%r9, 56(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mixing_stepIdEvPT_S1_S1_S0_iiid, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid, .Lfunc_end28-_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9convergedIdEvv
.LCPI29_0:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
	.section	.text._Z9convergedIdEvv,"axG",@progbits,_Z9convergedIdEvv,comdat
	.weak	_Z9convergedIdEvv
	.type	_Z9convergedIdEvv,@function
_Z9convergedIdEvv:                      # @_Z9convergedIdEvv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	$0, diff(%rip)
	movabsq	$4294967424, %rdx               # imm = 0x100000080
	leaq	896(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB29_2
# %bb.1:
	movq	rho_dev(%rip), %rdi
	movq	rho_old_dev(%rip), %rsi
	movq	blockSum_dev(%rip), %rdx
	movl	N(%rip), %ecx
	movl	M(%rip), %r8d
	movl	L(%rip), %r9d
	callq	_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii
.LBB29_2:
	movq	blockSum(%rip), %rdi
	movq	blockSum_dev(%rip), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$2, %ecx
	callq	hipMemcpy
	movq	blockSum(%rip), %rax
	xorl	%ecx, %ecx
	movsd	diff(%rip), %xmm0               # xmm0 = mem[0],zero
.LBB29_3:                               # =>This Inner Loop Header: Depth=1
	addsd	(%rax,%rcx,8), %xmm0
	movsd	%xmm0, diff(%rip)
	incq	%rcx
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB29_3
# %bb.4:
	movsd	dx(%rip), %xmm1                 # xmm1 = mem[0],zero
	mulsd	dy(%rip), %xmm1
	mulsd	dz(%rip), %xmm1
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, diff(%rip)
	ucomisd	%xmm0, %xmm0
	jp	.LBB29_7
# %bb.5:
	movsd	.LCPI29_0(%rip), %xmm1          # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	ja	.LBB29_7
# %bb.6:
	cmpl	$2500, iterCount(%rip)          # imm = 0x9C4
	jle	.LBB29_8
.LBB29_7:
	movb	$0, running(%rip)
.LBB29_8:
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end29:
	.size	_Z9convergedIdEvv, .Lfunc_end29-_Z9convergedIdEvv
	.cfi_endproc
                                        # -- End function
	.section	.text._Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii # -- Begin function _Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.type	_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,@function
_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii: # @_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end30:
	.size	_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, .Lfunc_end30-_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z29__device_stub__calcDerivativeIdEvPT_iii,"axG",@progbits,_Z29__device_stub__calcDerivativeIdEvPT_iii,comdat
	.weak	_Z29__device_stub__calcDerivativeIdEvPT_iii # -- Begin function _Z29__device_stub__calcDerivativeIdEvPT_iii
	.type	_Z29__device_stub__calcDerivativeIdEvPT_iii,@function
_Z29__device_stub__calcDerivativeIdEvPT_iii: # @_Z29__device_stub__calcDerivativeIdEvPT_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14calcDerivativeIdEvPT_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end31:
	.size	_Z29__device_stub__calcDerivativeIdEvPT_iii, .Lfunc_end31-_Z29__device_stub__calcDerivativeIdEvPT_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii # -- Begin function _Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.type	_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,@function
_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii: # @_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end32:
	.size	_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, .Lfunc_end32-_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii,"axG",@progbits,_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii,comdat
	.weak	_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii # -- Begin function _Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii
	.type	_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii,@function
_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii: # @_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16checkConvergenceIdEvPT_S1_S1_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end33:
	.size	_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii, .Lfunc_end33-_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB34_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB34_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11initDensityIfEvPT_iiidddd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19initWeightFunctionsIfEvPT_iiiddd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14prepareDensityIfEvPT_biiiddd, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14calcDerivativeIfEvPT_iii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mixing_stepIfEvPT_S1_S1_S0_iiid, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16checkConvergenceIfEvPT_S1_S1_iii, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11initDensityIdEvPT_iiidddd, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19initWeightFunctionsIdEvPT_iiiddd, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14prepareDensityIdEvPT_biiiddd, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14calcDerivativeIdEvPT_iii, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mixing_stepIdEvPT_S1_S1_S0_iiid, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16checkConvergenceIdEvPT_S1_S1_iii, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end34:
	.size	__hip_module_ctor, .Lfunc_end34-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB35_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB35_2:
	retq
.Lfunc_end35:
	.size	__hip_module_dtor, .Lfunc_end35-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	N,@object                       # @N
	.data
	.globl	N
	.p2align	2, 0x0
N:
	.long	128                             # 0x80
	.size	N, 4

	.type	M,@object                       # @M
	.globl	M
	.p2align	2, 0x0
M:
	.long	128                             # 0x80
	.size	M, 4

	.type	L,@object                       # @L
	.globl	L
	.p2align	2, 0x0
L:
	.long	128                             # 0x80
	.size	L, 4

	.type	Lx,@object                      # @Lx
	.bss
	.globl	Lx
	.p2align	3, 0x0
Lx:
	.quad	0x0000000000000000              # double 0
	.size	Lx, 8

	.type	Ly,@object                      # @Ly
	.globl	Ly
	.p2align	3, 0x0
Ly:
	.quad	0x0000000000000000              # double 0
	.size	Ly, 8

	.type	Lz,@object                      # @Lz
	.globl	Lz
	.p2align	3, 0x0
Lz:
	.quad	0x0000000000000000              # double 0
	.size	Lz, 8

	.type	dx,@object                      # @dx
	.globl	dx
	.p2align	3, 0x0
dx:
	.quad	0x0000000000000000              # double 0
	.size	dx, 8

	.type	dy,@object                      # @dy
	.globl	dy
	.p2align	3, 0x0
dy:
	.quad	0x0000000000000000              # double 0
	.size	dy, 8

	.type	dz,@object                      # @dz
	.globl	dz
	.p2align	3, 0x0
dz:
	.quad	0x0000000000000000              # double 0
	.size	dz, 8

	.type	running,@object                 # @running
	.data
	.globl	running
running:
	.byte	1                               # 0x1
	.size	running, 1

	.type	precision,@object               # @precision
	.bss
	.globl	precision
precision:
	.byte	0                               # 0x0
	.size	precision, 1

	.type	fullProfile,@object             # @fullProfile
	.globl	fullProfile
fullProfile:
	.byte	0                               # 0x0
	.size	fullProfile, 1

	.type	iterCount,@object               # @iterCount
	.globl	iterCount
	.p2align	2, 0x0
iterCount:
	.long	0                               # 0x0
	.size	iterCount, 4

	.type	diff,@object                    # @diff
	.globl	diff
	.p2align	3, 0x0
diff:
	.quad	0x0000000000000000              # double 0
	.size	diff, 8

	.type	eta,@object                     # @eta
	.globl	eta
	.p2align	3, 0x0
eta:
	.quad	0x0000000000000000              # double 0
	.size	eta, 8

	.type	rhob,@object                    # @rhob
	.globl	rhob
	.p2align	3, 0x0
rhob:
	.quad	0x0000000000000000              # double 0
	.size	rhob, 8

	.type	rho,@object                     # @rho
	.globl	rho
	.p2align	3, 0x0
rho:
	.quad	0
	.size	rho, 8

	.type	wD,@object                      # @wD
	.globl	wD
	.p2align	3, 0x0
wD:
	.quad	0
	.size	wD, 8

	.type	c1,@object                      # @c1
	.globl	c1
	.p2align	3, 0x0
c1:
	.quad	0
	.size	c1, 8

	.type	blockSum,@object                # @blockSum
	.globl	blockSum
	.p2align	3, 0x0
blockSum:
	.quad	0
	.size	blockSum, 8

	.type	rho_dev,@object                 # @rho_dev
	.globl	rho_dev
	.p2align	3, 0x0
rho_dev:
	.quad	0
	.size	rho_dev, 8

	.type	rho_old_dev,@object             # @rho_old_dev
	.globl	rho_old_dev
	.p2align	3, 0x0
rho_old_dev:
	.quad	0
	.size	rho_old_dev, 8

	.type	wD_dev,@object                  # @wD_dev
	.globl	wD_dev
	.p2align	3, 0x0
wD_dev:
	.quad	0
	.size	wD_dev, 8

	.type	fwF_dev,@object                 # @fwF_dev
	.globl	fwF_dev
	.p2align	3, 0x0
fwF_dev:
	.quad	0
	.size	fwF_dev, 8

	.type	c1_dev,@object                  # @c1_dev
	.globl	c1_dev
	.p2align	3, 0x0
c1_dev:
	.quad	0
	.size	c1_dev, 8

	.type	blockSum_dev,@object            # @blockSum_dev
	.globl	blockSum_dev
	.p2align	3, 0x0
blockSum_dev:
	.quad	0
	.size	blockSum_dev, 8

	.type	frho_dev,@object                # @frho_dev
	.globl	frho_dev
	.p2align	3, 0x0
frho_dev:
	.quad	0
	.size	frho_dev, 8

	.type	fc1_dev,@object                 # @fc1_dev
	.globl	fc1_dev
	.p2align	3, 0x0
fc1_dev:
	.quad	0
	.size	fc1_dev, 8

	.type	fgrad_rho_dev,@object           # @fgrad_rho_dev
	.globl	fgrad_rho_dev
	.p2align	3, 0x0
fgrad_rho_dev:
	.quad	0
	.size	fgrad_rho_dev, 8

	.type	fgrad_c1_dev,@object            # @fgrad_c1_dev
	.globl	fgrad_c1_dev
	.p2align	3, 0x0
fgrad_c1_dev:
	.quad	0
	.size	fgrad_c1_dev, 8

	.type	fwD_dev,@object                 # @fwD_dev
	.globl	fwD_dev
	.p2align	3, 0x0
fwD_dev:
	.quad	0
	.size	fwD_dev, 8

	.type	plan_3d_forward,@object         # @plan_3d_forward
	.globl	plan_3d_forward
	.p2align	3, 0x0
plan_3d_forward:
	.quad	0
	.size	plan_3d_forward, 8

	.type	plan_3d_inverse,@object         # @plan_3d_inverse
	.globl	plan_3d_inverse
	.p2align	3, 0x0
plan_3d_inverse:
	.quad	0
	.size	plan_3d_inverse, 8

	.type	plan_3d_many_5_forward,@object  # @plan_3d_many_5_forward
	.globl	plan_3d_many_5_forward
	.p2align	3, 0x0
plan_3d_many_5_forward:
	.quad	0
	.size	plan_3d_many_5_forward, 8

	.type	plan_3d_many_5_inverse,@object  # @plan_3d_many_5_inverse
	.globl	plan_3d_many_5_inverse
	.p2align	3, 0x0
plan_3d_many_5_inverse:
	.quad	0
	.size	plan_3d_many_5_inverse, 8

	.type	plan_3d_many_3_forward,@object  # @plan_3d_many_3_forward
	.globl	plan_3d_many_3_forward
	.p2align	3, 0x0
plan_3d_many_3_forward:
	.quad	0
	.size	plan_3d_many_3_forward, 8

	.type	plan_3d_many_3_inverse,@object  # @plan_3d_many_3_inverse
	.globl	plan_3d_many_3_inverse
	.p2align	3, 0x0
plan_3d_many_3_inverse:
	.quad	0
	.size	plan_3d_many_3_inverse, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"# Device: %i; Curr. used mem.: %1.2f MB; Global mem.: %1.2f MB \n"
	.size	.L.str.3, 65

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Chosen CUDA device: %i \n"
	.size	.L.str.4, 25

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"System size: Lx = %1.3f R; Ly = %1.3f R; Lz = %1.3f R \n"
	.size	.L.str.6, 56

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Spatial resolution: dx = %1.5f R; dy = %1.5f R; dz = %1.5f R \n"
	.size	.L.str.7, 63

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Number of grid points: N_x = %i; N_y = %i; N_z = %i \n"
	.size	.L.str.8, 54

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Done after %2.6f seconds \n"
	.size	.L.str.9, 27

	.type	_Z11initDensityIfEvPT_iiidddd,@object # @_Z11initDensityIfEvPT_iiidddd
	.section	.rodata._Z11initDensityIfEvPT_iiidddd,"aG",@progbits,_Z11initDensityIfEvPT_iiidddd,comdat
	.weak	_Z11initDensityIfEvPT_iiidddd
	.p2align	3, 0x0
_Z11initDensityIfEvPT_iiidddd:
	.quad	_Z26__device_stub__initDensityIfEvPT_iiidddd
	.size	_Z11initDensityIfEvPT_iiidddd, 8

	.type	_Z19initWeightFunctionsIfEvPT_iiiddd,@object # @_Z19initWeightFunctionsIfEvPT_iiiddd
	.section	.rodata._Z19initWeightFunctionsIfEvPT_iiiddd,"aG",@progbits,_Z19initWeightFunctionsIfEvPT_iiiddd,comdat
	.weak	_Z19initWeightFunctionsIfEvPT_iiiddd
	.p2align	3, 0x0
_Z19initWeightFunctionsIfEvPT_iiiddd:
	.quad	_Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd
	.size	_Z19initWeightFunctionsIfEvPT_iiiddd, 8

	.type	_Z14prepareDensityIfEvPT_biiiddd,@object # @_Z14prepareDensityIfEvPT_biiiddd
	.section	.rodata._Z14prepareDensityIfEvPT_biiiddd,"aG",@progbits,_Z14prepareDensityIfEvPT_biiiddd,comdat
	.weak	_Z14prepareDensityIfEvPT_biiiddd
	.p2align	3, 0x0
_Z14prepareDensityIfEvPT_biiiddd:
	.quad	_Z29__device_stub__prepareDensityIfEvPT_biiiddd
	.size	_Z14prepareDensityIfEvPT_biiiddd, 8

	.type	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid,@object # @_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.section	.rodata._Z11mixing_stepIfEvPT_S1_S1_S0_iiid,"aG",@progbits,_Z11mixing_stepIfEvPT_S1_S1_S0_iiid,comdat
	.weak	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.p2align	3, 0x0
_Z11mixing_stepIfEvPT_S1_S1_S0_iiid:
	.quad	_Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid
	.size	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid, 8

	.type	.L.str.12,@object               # @.str.12
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.12:
	.asciz	"# iteration: %i; diff: %1.10e \n"
	.size	.L.str.12, 32

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Converged after %i iterations! \n"
	.size	.L.str.13, 33

	.type	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,@object # @_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.section	.rodata._Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"aG",@progbits,_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.p2align	3, 0x0
_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii:
	.quad	_Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.size	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, 8

	.type	_Z14calcDerivativeIfEvPT_iii,@object # @_Z14calcDerivativeIfEvPT_iii
	.section	.rodata._Z14calcDerivativeIfEvPT_iii,"aG",@progbits,_Z14calcDerivativeIfEvPT_iii,comdat
	.weak	_Z14calcDerivativeIfEvPT_iii
	.p2align	3, 0x0
_Z14calcDerivativeIfEvPT_iii:
	.quad	_Z29__device_stub__calcDerivativeIfEvPT_iii
	.size	_Z14calcDerivativeIfEvPT_iii, 8

	.type	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,@object # @_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.section	.rodata._Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"aG",@progbits,_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.p2align	3, 0x0
_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii:
	.quad	_Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.size	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, 8

	.type	_Z16checkConvergenceIfEvPT_S1_S1_iii,@object # @_Z16checkConvergenceIfEvPT_S1_S1_iii
	.section	.rodata._Z16checkConvergenceIfEvPT_S1_S1_iii,"aG",@progbits,_Z16checkConvergenceIfEvPT_S1_S1_iii,comdat
	.weak	_Z16checkConvergenceIfEvPT_S1_S1_iii
	.p2align	3, 0x0
_Z16checkConvergenceIfEvPT_S1_S1_iii:
	.quad	_Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii
	.size	_Z16checkConvergenceIfEvPT_S1_S1_iii, 8

	.type	.L.str.14,@object               # @.str.14
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.14:
	.asciz	"rho_1d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat"
	.size	.L.str.14, 39

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"w"
	.size	.L.str.15, 2

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"#Density profile in a box with dimension L^3 along the z-axis (L) where x and y are fixed at x = N/2 and y = M/2 \n"
	.size	.L.str.16, 115

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"%1.9e %1.9e %1.9e  \n"
	.size	.L.str.17, 21

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"contact: %f \n"
	.size	.L.str.18, 14

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"bulk pressure: %f \n"
	.size	.L.str.19, 20

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"\n\n"
	.size	.L.str.20, 3

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"rho_2d_box_%1.2f_%1.2f_%1.2f_%1.3f.dat"
	.size	.L.str.21, 39

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"rho_3D_%i_%i_%i_%1.3f"
	.size	.L.str.22, 22

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"wb"
	.size	.L.str.23, 3

	.type	_Z11initDensityIdEvPT_iiidddd,@object # @_Z11initDensityIdEvPT_iiidddd
	.section	.rodata._Z11initDensityIdEvPT_iiidddd,"aG",@progbits,_Z11initDensityIdEvPT_iiidddd,comdat
	.weak	_Z11initDensityIdEvPT_iiidddd
	.p2align	3, 0x0
_Z11initDensityIdEvPT_iiidddd:
	.quad	_Z26__device_stub__initDensityIdEvPT_iiidddd
	.size	_Z11initDensityIdEvPT_iiidddd, 8

	.type	_Z19initWeightFunctionsIdEvPT_iiiddd,@object # @_Z19initWeightFunctionsIdEvPT_iiiddd
	.section	.rodata._Z19initWeightFunctionsIdEvPT_iiiddd,"aG",@progbits,_Z19initWeightFunctionsIdEvPT_iiiddd,comdat
	.weak	_Z19initWeightFunctionsIdEvPT_iiiddd
	.p2align	3, 0x0
_Z19initWeightFunctionsIdEvPT_iiiddd:
	.quad	_Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd
	.size	_Z19initWeightFunctionsIdEvPT_iiiddd, 8

	.type	_Z14prepareDensityIdEvPT_biiiddd,@object # @_Z14prepareDensityIdEvPT_biiiddd
	.section	.rodata._Z14prepareDensityIdEvPT_biiiddd,"aG",@progbits,_Z14prepareDensityIdEvPT_biiiddd,comdat
	.weak	_Z14prepareDensityIdEvPT_biiiddd
	.p2align	3, 0x0
_Z14prepareDensityIdEvPT_biiiddd:
	.quad	_Z29__device_stub__prepareDensityIdEvPT_biiiddd
	.size	_Z14prepareDensityIdEvPT_biiiddd, 8

	.type	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid,@object # @_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.section	.rodata._Z11mixing_stepIdEvPT_S1_S1_S0_iiid,"aG",@progbits,_Z11mixing_stepIdEvPT_S1_S1_S0_iiid,comdat
	.weak	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.p2align	3, 0x0
_Z11mixing_stepIdEvPT_S1_S1_S0_iiid:
	.quad	_Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid
	.size	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid, 8

	.type	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,@object # @_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.section	.rodata._Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"aG",@progbits,_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.p2align	3, 0x0
_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii:
	.quad	_Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.size	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, 8

	.type	_Z14calcDerivativeIdEvPT_iii,@object # @_Z14calcDerivativeIdEvPT_iii
	.section	.rodata._Z14calcDerivativeIdEvPT_iii,"aG",@progbits,_Z14calcDerivativeIdEvPT_iii,comdat
	.weak	_Z14calcDerivativeIdEvPT_iii
	.p2align	3, 0x0
_Z14calcDerivativeIdEvPT_iii:
	.quad	_Z29__device_stub__calcDerivativeIdEvPT_iii
	.size	_Z14calcDerivativeIdEvPT_iii, 8

	.type	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,@object # @_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.section	.rodata._Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"aG",@progbits,_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
	.weak	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.p2align	3, 0x0
_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii:
	.quad	_Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.size	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, 8

	.type	_Z16checkConvergenceIdEvPT_S1_S1_iii,@object # @_Z16checkConvergenceIdEvPT_S1_S1_iii
	.section	.rodata._Z16checkConvergenceIdEvPT_S1_S1_iii,"aG",@progbits,_Z16checkConvergenceIdEvPT_S1_S1_iii,comdat
	.weak	_Z16checkConvergenceIdEvPT_S1_S1_iii
	.p2align	3, 0x0
_Z16checkConvergenceIdEvPT_S1_S1_iii:
	.quad	_Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii
	.size	_Z16checkConvergenceIdEvPT_S1_S1_iii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z11initDensityIfEvPT_iiidddd"
	.size	.L__unnamed_1, 30

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z19initWeightFunctionsIfEvPT_iiiddd"
	.size	.L__unnamed_2, 37

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14prepareDensityIfEvPT_biiiddd"
	.size	.L__unnamed_3, 33

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii"
	.size	.L__unnamed_4, 70

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z14calcDerivativeIfEvPT_iii"
	.size	.L__unnamed_5, 29

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii"
	.size	.L__unnamed_6, 62

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z11mixing_stepIfEvPT_S1_S1_S0_iiid"
	.size	.L__unnamed_7, 36

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z16checkConvergenceIfEvPT_S1_S1_iii"
	.size	.L__unnamed_8, 37

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z11initDensityIdEvPT_iiidddd"
	.size	.L__unnamed_9, 30

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z19initWeightFunctionsIdEvPT_iiiddd"
	.size	.L__unnamed_10, 37

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z14prepareDensityIdEvPT_biiiddd"
	.size	.L__unnamed_11, 33

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii"
	.size	.L__unnamed_12, 70

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z14calcDerivativeIdEvPT_iii"
	.size	.L__unnamed_13, 29

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii"
	.size	.L__unnamed_14, 62

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z11mixing_stepIdEvPT_S1_S1_S0_iiid"
	.size	.L__unnamed_15, 36

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z16checkConvergenceIdEvPT_S1_S1_iii"
	.size	.L__unnamed_16, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n ///////////////////////////////////////////////  "
	.size	.Lstr, 52

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"CUDA device properties "
	.size	.Lstr.1, 24

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"ERROR: NO CUDA DEVICE FOUND! "
	.size	.Lstr.3, 30

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"/////////////////////////////////////////////// "
	.size	.Lstr.7, 49

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"Picard iteration ... "
	.size	.Lstr.8, 22

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"/////////////////////////////////////////////// \n"
	.size	.Lstr.9, 50

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__initDensityIfEvPT_iiidddd
	.addrsig_sym _Z34__device_stub__initWeightFunctionsIfEvPT_iiiddd
	.addrsig_sym _Z29__device_stub__prepareDensityIfEvPT_biiiddd
	.addrsig_sym _Z26__device_stub__mixing_stepIfEvPT_S1_S1_S0_iiid
	.addrsig_sym _Z39__device_stub__weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z29__device_stub__calcDerivativeIfEvPT_iii
	.addrsig_sym _Z31__device_stub__variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z31__device_stub__checkConvergenceIfEvPT_S1_S1_iii
	.addrsig_sym _Z26__device_stub__initDensityIdEvPT_iiidddd
	.addrsig_sym _Z34__device_stub__initWeightFunctionsIdEvPT_iiiddd
	.addrsig_sym _Z29__device_stub__prepareDensityIdEvPT_biiiddd
	.addrsig_sym _Z26__device_stub__mixing_stepIdEvPT_S1_S1_S0_iiid
	.addrsig_sym _Z39__device_stub__weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z29__device_stub__calcDerivativeIdEvPT_iii
	.addrsig_sym _Z31__device_stub__variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z31__device_stub__checkConvergenceIdEvPT_S1_S1_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym rho_dev
	.addrsig_sym rho_old_dev
	.addrsig_sym wD_dev
	.addrsig_sym fwF_dev
	.addrsig_sym c1_dev
	.addrsig_sym blockSum_dev
	.addrsig_sym frho_dev
	.addrsig_sym fc1_dev
	.addrsig_sym fwD_dev
	.addrsig_sym plan_3d_forward
	.addrsig_sym plan_3d_inverse
	.addrsig_sym plan_3d_many_5_forward
	.addrsig_sym plan_3d_many_5_inverse
	.addrsig_sym _Z11initDensityIfEvPT_iiidddd
	.addrsig_sym _Z19initWeightFunctionsIfEvPT_iiiddd
	.addrsig_sym _Z14prepareDensityIfEvPT_biiiddd
	.addrsig_sym _Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.addrsig_sym _Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z14calcDerivativeIfEvPT_iii
	.addrsig_sym _Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z16checkConvergenceIfEvPT_S1_S1_iii
	.addrsig_sym _Z11initDensityIdEvPT_iiidddd
	.addrsig_sym _Z19initWeightFunctionsIdEvPT_iiiddd
	.addrsig_sym _Z14prepareDensityIdEvPT_biiiddd
	.addrsig_sym _Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.addrsig_sym _Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z14calcDerivativeIdEvPT_iii
	.addrsig_sym _Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.addrsig_sym _Z16checkConvergenceIdEvPT_S1_S1_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z11initDensityIfEvPT_iiidddd,"axG",@progbits,_Z11initDensityIfEvPT_iiidddd,comdat
	.protected	_Z11initDensityIfEvPT_iiidddd ; -- Begin function _Z11initDensityIfEvPT_iiidddd
	.globl	_Z11initDensityIfEvPT_iiidddd
	.p2align	8
	.type	_Z11initDensityIfEvPT_iiidddd,@function
_Z11initDensityIfEvPT_iiidddd:          ; @_Z11initDensityIfEvPT_iiidddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[16:19], s[0:1], 0x8
	s_add_u32 s12, s0, 56
	s_addc_u32 s13, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s19, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s19, v[0:1]
	s_mul_i32 s15, s18, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s14, s15, s16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[2:3], null, s[8:9], s[8:9], 1.0
	v_div_scale_f64 v[4:5], null, s[6:7], s[6:7], 1.0
	v_div_scale_f64 v[6:7], null, s[4:5], s[4:5], 1.0
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, s[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[8:9], v[2:3]
	v_rcp_f64_e32 v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[12:13], v[6:7]
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_div_scale_f64 v[14:15], s2, 1.0, s[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s3, 1.0, s[4:5], 1.0
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_mul_f64 v[18:19], v[20:21], v[8:9]
	v_mul_f64 v[22:23], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[24:25], v[16:17], v[12:13]
	v_fma_f64 v[2:3], -v[2:3], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], -v[4:5], v[22:23], v[14:15]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[18:19]
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[22:23]
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	v_div_fixup_f64 v[2:3], v[2:3], s[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[4:5], v[4:5], s[6:7], 1.0
	s_ashr_i32 s6, s15, 31
	s_ashr_i32 s7, s18, 31
	v_div_fixup_f64 v[6:7], v[6:7], s[4:5], 1.0
	s_add_i32 s2, s15, s6
	s_add_i32 s3, s18, s7
	s_xor_b32 s8, s2, s6
	s_xor_b32 s9, s3, s7
	v_cvt_f32_u32_e32 v0, s8
	v_cvt_f32_u32_e32 v8, s9
	s_load_b32 s2, s[12:13], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_sub_i32 s3, 0, s8
	s_sub_i32 s4, 0, s9
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s19
	v_cvt_i32_f64_e32 v9, v[2:3]
	v_rcp_iflag_f32_e32 v2, v0
	v_rcp_iflag_f32_e32 v3, v8
	v_cvt_i32_f64_e32 v4, v[4:5]
	v_cvt_f32_f64_e32 v0, s[10:11]
	v_cvt_i32_f64_e32 v5, v[6:7]
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v2, 0x4f7ffffe, v2 :: v_dual_mul_f32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v10, v2
	v_cvt_u32_f32_e32 v11, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v6, s3, v10
	v_mul_lo_u32 v7, s4, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[4:5], s[2:3], 2
	s_sub_i32 s3, 0, s15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v12, v10, v6
	v_mul_hi_u32 v13, v11, v7
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s1, 0
	v_lshlrev_b32_e32 v6, 1, v9
	v_add_nc_u32_e32 v9, v10, v12
	v_add_nc_u32_e32 v10, v11, v13
	v_lshlrev_b32_e32 v7, 1, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v11, s18, v6
	v_lshlrev_b32_e32 v8, 1, v5
	v_sub_nc_u32_e32 v12, s17, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v13, s16, v8
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v4
	v_xor_b32_e32 v5, v5, v4
	v_xor_b32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v14, v5, v9
	v_mul_lo_u32 v15, v14, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v5, v15
	v_add_nc_u32_e32 v15, 1, v14
	v_subrev_nc_u32_e32 v16, s8, v5
	v_cmp_le_u32_e32 vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v14, v14, v15 :: v_dual_cndmask_b32 v5, v5, v16
	v_add_nc_u32_e32 v15, 1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s8, v5
	v_cndmask_b32_e32 v5, v14, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v4
	v_sub_nc_u32_e32 v14, v5, v4
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v14, v8
	v_cmp_lt_i32_e64 s0, v14, v13
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, s0, -1
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[4:5], null, s3, v14, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v14, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v14, v14, v5
	v_xor_b32_e32 v5, s7, v5
	v_mul_hi_u32 v15, v14, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v16, v15, s9
	v_sub_nc_u32_e32 v14, v14, v16
	v_add_nc_u32_e32 v16, 1, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v17, s9, v14
	v_cmp_le_u32_e32 vcc_lo, s9, v14
	v_dual_cndmask_b32 v15, v15, v16 :: v_dual_cndmask_b32 v14, v14, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v16, 1, v15
	v_cmp_le_u32_e32 vcc_lo, s9, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v15, v16, vcc_lo
	v_xor_b32_e32 v14, v14, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v14, v5
	v_cmp_ge_i32_e32 vcc_lo, v5, v7
	v_cmp_lt_i32_e64 s0, v5, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_xor_b32 s12, s0, -1
	s_and_saveexec_b32 s13, s0
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_lo_u32 v5, v5, s18
	s_and_not1_b32 s12, s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v5
	v_cmp_lt_i32_e32 vcc_lo, v4, v6
	v_cmp_ge_i32_e64 s0, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s0
; %bb.5:                                ; %Flow82
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v4, v0
	s_and_not1_b32 s0, s10, exec_lo
	s_and_b32 s10, s12, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s10, s0, s10
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_and_saveexec_b32 s0, s10
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v4, 0
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, s2, v1
	global_store_b32 v[2:3], v4, off
	v_add_co_u32 v2, s0, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s14, v1
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_9:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11initDensityIfEvPT_iiidddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11initDensityIfEvPT_iiidddd,"axG",@progbits,_Z11initDensityIfEvPT_iiidddd,comdat
.Lfunc_end0:
	.size	_Z11initDensityIfEvPT_iiidddd, .Lfunc_end0-_Z11initDensityIfEvPT_iiidddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1068
; NumSgprs: 22
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z19initWeightFunctionsIfEvPT_iiiddd,"axG",@progbits,_Z19initWeightFunctionsIfEvPT_iiiddd,comdat
	.protected	_Z19initWeightFunctionsIfEvPT_iiiddd ; -- Begin function _Z19initWeightFunctionsIfEvPT_iiiddd
	.globl	_Z19initWeightFunctionsIfEvPT_iiiddd
	.p2align	8
	.type	_Z19initWeightFunctionsIfEvPT_iiiddd,@function
_Z19initWeightFunctionsIfEvPT_iiiddd:   ; @_Z19initWeightFunctionsIfEvPT_iiiddd
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s2, s[0:1], 0x3c
	s_add_u32 s16, s0, 48
	s_addc_u32 s17, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s6, 31
	s_and_b32 s18, s2, 0xffff
	s_add_i32 s2, s6, s3
	v_mad_u64_u32 v[1:2], null, s15, s18, v[0:1]
	s_ashr_i32 s33, s2, 1
	s_mov_b32 s3, exec_lo
	s_add_i32 s33, s33, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s14, s33, s5
	s_mul_i32 s2, s14, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB1_19
; %bb.1:                                ; %.lr.ph
	v_cvt_f64_i32_e32 v[7:8], s4
	v_cvt_f64_i32_e32 v[9:10], s5
	v_cvt_f64_i32_e32 v[11:12], s6
	s_mov_b32 s7, 0x402921fb
	s_mov_b32 s6, 0x54442d18
	s_clause 0x2
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x28
	s_ashr_i32 s56, s14, 31
	s_ashr_i32 s57, s33, 31
	s_add_i32 s3, s14, s56
	s_lshr_b32 s15, s4, 31
	s_xor_b32 s58, s3, s56
	s_ashr_i32 s3, s2, 31
	s_add_i32 s19, s4, s15
	s_sub_i32 s62, 0, s14
	s_lshl_b64 s[14:15], s[2:3], 2
	s_ashr_i32 s3, s19, 1
	v_mov_b32_e32 v36, 0xc01921fb
	s_mov_b32 s20, 0x6dc9c883
	s_mov_b32 s22, 0x33145c00
	s_mov_b32 s24, 0x252049c0
	s_mov_b32 s26, 0x9037ab78
	s_mov_b32 s28, 0x46cc5e42
	s_mov_b32 s30, 0xa17f65f6
	s_mov_b32 s34, 0x19f4ec90
	s_mov_b32 s36, 0x16c16967
	s_mov_b32 s38, 0x55555555
	s_mov_b32 s40, 0xb42fdfa7
	s_mov_b32 s42, 0xf9a43bb8
	s_mov_b32 s44, 0x796cde01
	s_mov_b32 s46, 0x19e83e5c
	s_mov_b32 s48, 0x11110bb3
	s_lshl_b32 s60, s2, 2
	s_mov_b32 s61, 0
	s_mov_b32 s21, 0x3fe45f30
	s_mov_b32 s23, 0xbc91a626
	s_mov_b32 s25, 0xb97b839a
	s_mov_b32 s27, 0x3e21eeb6
	s_mov_b32 s29, 0xbda907db
	s_mov_b32 s31, 0xbe927e4f
	v_mul_f64 v[2:3], v[7:8], v[9:10]
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[7:8], v[7:8], s[8:9]
	v_mul_f64 v[9:10], v[9:10], s[10:11]
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s35, 0x3efa01a0
	s_mov_b32 s37, 0xbf56c16c
	s_mov_b32 s39, 0x3fa55555
	s_mov_b32 s41, 0xbe5ae600
	s_mov_b32 s43, 0x3de5e0b2
	s_mov_b32 s45, 0x3ec71de3
	s_mov_b32 s47, 0xbf2a01a0
	s_mov_b32 s49, 0x3f811111
	s_mov_b32 s50, 0x33145c07
	s_mov_b32 s53, 0xbff921fb
	s_mov_b32 s55, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[2:3], v[11:12]
	v_mul_f64 v[11:12], v[11:12], s[0:1]
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 1.0
	v_div_scale_f64 v[17:18], vcc_lo, 1.0, v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[4:5], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[4:5], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	v_fma_f64 v[4:5], -v[4:5], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[13:14], v[15:16]
	v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[2:3]
	v_cvt_f64_f32_e32 v[2:3], v0
	v_cvt_f32_u32_e32 v0, s58
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_iflag_f32_e32 v0, v0
	v_mul_f64 v[3:4], v[2:3], s[6:7]
	s_add_i32 s7, s33, s57
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s59, s7, s57
	s_load_b32 s7, s[16:17], 0x0
	v_cvt_f32_u32_e32 v2, s59
	s_mul_i32 s17, s5, s4
	s_sub_i32 s19, 0, s59
	s_mul_i32 s65, s17, s33
	s_sub_i32 s17, 0, s58
	s_lshr_b32 s16, s5, 31
	s_lshl_b32 s64, s65, 1
	s_add_i32 s16, s5, s16
	s_mul_i32 s65, s65, 3
	s_ashr_i32 s63, s16, 1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s16, s7, s18
	s_mov_b32 s7, 0x401921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[5:6], null, 0x40080000, 0x40080000, v[3:4]
	v_div_scale_f64 v[17:18], vcc_lo, v[3:4], 0x40080000, v[3:4]
	v_cvt_f32_f64_e32 v34, v[3:4]
	v_rcp_f64_e32 v[13:14], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[5:6], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	v_fma_f64 v[15:16], -v[5:6], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], -v[5:6], v[15:16], v[17:18]
	v_div_fmas_f64 v[5:6], v[5:6], v[13:14], v[15:16]
	v_rcp_iflag_f32_e32 v15, v2
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[13:14], v[5:6], 0x40080000, v[3:4]
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v15
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v15, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v16, s17, v0
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_ashr_i32 s17, s16, 31
	v_mul_lo_u32 v17, s19, v15
	s_lshl_b64 s[18:19], s[16:17], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_mul_hi_u32 v2, v0, v16
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v16, v15, v17
	v_add_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v15, 0x54442d18 :: v_dual_add_nc_u32 v2, v15, v16
	v_cvt_f32_f64_e32 v35, v[13:14]
	v_mov_b32_e32 v13, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v14, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v16, v1, v14
	v_xor_b32_e32 v16, v16, v14
	v_xor_b32_e32 v14, s56, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v17, v16, v0
	v_mul_lo_u32 v18, v17, s58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v16, v16, v18
	v_add_nc_u32_e32 v18, 1, v17
	v_subrev_nc_u32_e32 v19, s58, v16
	v_cmp_le_u32_e32 vcc_lo, s58, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, v17, v18 :: v_dual_cndmask_b32 v16, v16, v19
	v_add_nc_u32_e32 v18, 1, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s58, v16
	v_cndmask_b32_e32 v16, v17, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v16, v16, v14
	v_sub_nc_u32_e32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[16:17], null, s62, v14, v[1:2]
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v18, v16, v17
	v_xor_b32_e32 v18, v18, v17
	v_xor_b32_e32 v17, s57, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v19, v18, v2
	v_mul_lo_u32 v20, v19, s59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, v18, v20
	v_add_nc_u32_e32 v20, 1, v19
	v_subrev_nc_u32_e32 v21, s59, v18
	v_cmp_le_u32_e32 vcc_lo, s59, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v19, v20 :: v_dual_cndmask_b32 v18, v18, v21
	v_add_nc_u32_e32 v20, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s59, v18
	v_cndmask_b32_e32 v18, v19, v20, vcc_lo
	v_sub_nc_u32_e32 v19, s4, v14
	v_cmp_lt_i32_e32 vcc_lo, s3, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v18, v18, v17
	v_cndmask_b32_e32 v14, v14, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v20, v18, v17
	v_cvt_f64_i32_e32 v[17:18], v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v19, s5, v20
	v_cmp_lt_i32_e64 s0, s63, v20
	v_mul_lo_u32 v21, v20, s33
	v_cndmask_b32_e64 v14, v20, v19, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[19:20], v14
	v_sub_nc_u32_e32 v14, v16, v21
	v_cndmask_b32_e32 v16, 0x401921fb, v36, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[21:22], v14
	v_mul_f64 v[17:18], v[15:16], v[17:18]
	v_cndmask_b32_e64 v16, 0x401921fb, v36, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[19:20], v[15:16], v[19:20]
	v_mul_f64 v[21:22], v[21:22], s[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[23:24], null, v[7:8], v[7:8], v[17:18]
	v_div_scale_f64 v[45:46], vcc_lo, v[17:18], v[7:8], v[17:18]
	v_div_scale_f64 v[25:26], null, v[9:10], v[9:10], v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[27:28], null, v[11:12], v[11:12], v[21:22]
	v_rcp_f64_e32 v[29:30], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[31:32], v[25:26]
	v_rcp_f64_e32 v[37:38], v[27:28]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], -v[23:24], v[29:30], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[41:42], -v[25:26], v[31:32], 1.0
	v_fma_f64 v[43:44], -v[27:28], v[37:38], 1.0
	v_fma_f64 v[29:30], v[29:30], v[39:40], v[29:30]
	v_fma_f64 v[31:32], v[31:32], v[41:42], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[37:38], v[43:44], v[37:38]
	v_fma_f64 v[39:40], -v[23:24], v[29:30], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], -v[25:26], v[31:32], 1.0
	v_fma_f64 v[43:44], -v[27:28], v[37:38], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[29:30], v[29:30], v[39:40], v[29:30]
	v_div_scale_f64 v[39:40], s0, v[19:20], v[9:10], v[19:20]
	v_fma_f64 v[31:32], v[31:32], v[41:42], v[31:32]
	v_div_scale_f64 v[41:42], s1, v[21:22], v[11:12], v[21:22]
	v_fma_f64 v[37:38], v[37:38], v[43:44], v[37:38]
	v_mul_f64 v[43:44], v[45:46], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[47:48], v[39:40], v[31:32]
	v_mul_f64 v[49:50], v[41:42], v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], -v[23:24], v[43:44], v[45:46]
	v_fma_f64 v[25:26], -v[25:26], v[47:48], v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], -v[27:28], v[49:50], v[41:42]
	v_div_fmas_f64 v[23:24], v[23:24], v[29:30], v[43:44]
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[25:26], v[25:26], v[31:32], v[47:48]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[27:28], v[27:28], v[37:38], v[49:50]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[16:17], v[23:24], v[7:8], v[17:18]
	v_div_fixup_f64 v[19:20], v[25:26], v[9:10], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[21:22], v[27:28], v[11:12], v[21:22]
	v_cvt_f32_f64_e32 v39, v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f32_f64_e32 v38, v[19:20]
	v_cvt_f32_f64_e32 v37, v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v14, v38, v38
	v_fmac_f32_e32 v14, v39, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v14, v37, v37
	v_mul_f32_e32 v16, 0x4f800000, v14
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v14, v14, v16, vcc_lo
	v_sqrt_f32_e32 v16, v14
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v17, -1, v16
	v_add_nc_u32_e32 v18, 1, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v19, -v17, v16, v14
	v_fma_f32 v20, -v18, v16, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v19
	v_cndmask_b32_e64 v16, v16, v17, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v20
	v_cndmask_b32_e64 v16, v16, v18, s0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v17, 0x37800000, v16
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v14, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v41, v16, v14, vcc_lo
                                        ; implicit-def: $vgpr14
	v_cmpx_neq_f32_e32 0, v41
	s_xor_b32 s17, exec_lo, s0
	s_cbranch_execz .LBB1_16
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cvt_f64_f32_e32 v[16:17], v41
                                        ; implicit-def: $vgpr42
                                        ; implicit-def: $vgpr26_vgpr27
                                        ; implicit-def: $vgpr28_vgpr29
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s66, 0x41d00000, |v[16:17]|
	v_trig_preop_f64 v[22:23], |v[16:17]|, 0
	v_trig_preop_f64 v[20:21], |v[16:17]|, 1
	v_ldexp_f64 v[24:25], |v[16:17]|, 0xffffff80
	v_trig_preop_f64 v[18:19], |v[16:17]|, 2
	v_and_b32_e32 v40, 0x7fffffff, v17
	s_and_saveexec_b32 s0, s66
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[16:17]|
	s_mov_b32 s8, s6
	s_mov_b32 s51, s11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v27, v40, v25, vcc_lo
	v_cndmask_b32_e32 v26, v16, v24, vcc_lo
	v_mul_f64 v[28:29], v[22:23], v[26:27]
	v_mul_f64 v[30:31], v[20:21], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[22:23], v[26:27], -v[28:29]
	v_fma_f64 v[52:53], v[20:21], v[26:27], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[30:31], v[32:33]
	v_add_f64 v[44:45], v[42:43], -v[30:31]
	v_add_f64 v[48:49], v[28:29], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[46:47], v[42:43], -v[44:45]
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_ldexp_f64 v[44:45], v[48:49], -2
	v_add_f64 v[28:29], v[48:49], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], -v[46:47]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[44:45]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[42:43], -v[28:29]
	v_add_f64 v[30:31], v[32:33], v[30:31]
	v_fract_f64_e32 v[32:33], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v33, 0, v33 :: v_dual_cndmask_b32 v32, 0, v32
	v_mul_f64 v[50:51], v[18:19], v[26:27]
	v_ldexp_f64 v[32:33], v[32:33], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[50:51], v[52:53]
	v_fma_f64 v[26:27], v[18:19], v[26:27], -v[50:51]
	v_add_f64 v[42:43], v[46:47], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[28:29], v[42:43]
	v_add_f64 v[54:55], v[42:43], -v[46:47]
	v_add_f64 v[48:49], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[60:61], v[42:43], -v[54:55]
	v_add_f64 v[30:31], v[30:31], -v[54:55]
	v_add_f64 v[28:29], v[44:45], -v[28:29]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[48:49]
	v_add_f64 v[48:49], v[46:47], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[42:43], -v[28:29]
	v_cndmask_b32_e64 v14, 0, 0x40100000, vcc_lo
	v_add_f64 v[58:59], v[46:47], -v[48:49]
	v_add_f64 v[48:49], v[52:53], -v[48:49]
	v_add_f64 v[46:47], v[46:47], -v[60:61]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[32:33], v[32:33], v[13:14]
	v_add_f64 v[52:53], v[50:51], -v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], v[46:47]
	v_add_f64 v[56:57], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[48:49], v[52:53]
	v_cvt_i32_f64_e32 v14, v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[48:49], v[30:31]
	v_cvt_f64_i32_e32 v[54:55], v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], v[30:31]
	v_add_f64 v[32:33], v[32:33], -v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[28:29], v[26:27]
	v_add_f64 v[46:47], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[46:47], -v[32:33]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[46:47]
	v_add_f64 v[28:29], v[44:45], -v[30:31]
	v_add_co_ci_u32_e64 v42, s0, 0, v14, vcc_lo
	v_cndmask_b32_e64 v14, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], v[28:29]
	v_add_f64 v[28:29], v[46:47], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[28:29], v[26:27]
	v_mul_f64 v[32:33], v[30:31], s[8:9]
	v_add_f64 v[28:29], v[30:31], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[43:44], v[30:31], s[8:9], -v[32:33]
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[30:31], s[50:51], v[43:44]
	v_fma_f64 v[28:29], v[26:27], s[8:9], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[32:33], v[28:29]
	v_add_f64 v[30:31], v[26:27], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[28:29], v[28:29], -v[30:31]
.LBB1_5:                                ; %Flow150
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mul_f64 v[26:27], |v[16:17]|, s[20:21]
	s_mov_b32 s52, s6
	s_mov_b32 s10, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[30:31], v[26:27]
	v_fma_f64 v[26:27], v[30:31], s[52:53], |v[16:17]|
	v_mul_f64 v[28:29], v[30:31], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[42:43], v[30:31], s[22:23], v[26:27]
	v_add_f64 v[32:33], v[26:27], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	v_add_f64 v[32:33], v[32:33], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[10:11], v[28:29]
	v_add_f64 v[26:27], v[32:33], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[24:25], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[42:43], v[28:29]
	v_add_f64 v[32:33], v[26:27], -v[42:43]
	v_cvt_i32_f64_e32 v42, v[30:31]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[32:33]
.LBB1_7:                                ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $vgpr30_vgpr31
                                        ; implicit-def: $vgpr32_vgpr33
	s_and_saveexec_b32 s0, s66
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[16:17]|
	s_mov_b32 s8, s6
	s_mov_b32 s51, s11
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v31, v40, v25, vcc_lo
	v_cndmask_b32_e32 v30, v16, v24, vcc_lo
	v_mul_f64 v[32:33], v[22:23], v[30:31]
	v_mul_f64 v[43:44], v[20:21], v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[45:46], v[22:23], v[30:31], -v[32:33]
	v_fma_f64 v[57:58], v[20:21], v[30:31], -v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[43:44], v[45:46]
	v_add_f64 v[49:50], v[47:48], -v[43:44]
	v_add_f64 v[53:54], v[32:33], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[51:52], v[47:48], -v[49:50]
	v_add_f64 v[45:46], v[45:46], -v[49:50]
	v_ldexp_f64 v[49:50], v[53:54], -2
	v_add_f64 v[32:33], v[53:54], -v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], -v[51:52]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[49:50]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[47:48], -v[32:33]
	v_add_f64 v[43:44], v[45:46], v[43:44]
	v_fract_f64_e32 v[45:46], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v45, 0, v45 :: v_dual_cndmask_b32 v46, 0, v46
	v_mul_f64 v[55:56], v[18:19], v[30:31]
	v_ldexp_f64 v[45:46], v[45:46], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[55:56], v[57:58]
	v_fma_f64 v[30:31], v[18:19], v[30:31], -v[55:56]
	v_add_f64 v[47:48], v[51:52], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[49:50], v[32:33], v[47:48]
	v_add_f64 v[59:60], v[47:48], -v[51:52]
	v_add_f64 v[53:54], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[65:66], v[47:48], -v[59:60]
	v_add_f64 v[43:44], v[43:44], -v[59:60]
	v_add_f64 v[32:33], v[49:50], -v[32:33]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[53:54]
	v_add_f64 v[53:54], v[51:52], -v[55:56]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[47:48], -v[32:33]
	v_cndmask_b32_e64 v14, 0, 0x40100000, vcc_lo
	v_add_f64 v[63:64], v[51:52], -v[53:54]
	v_add_f64 v[53:54], v[57:58], -v[53:54]
	v_add_f64 v[51:52], v[51:52], -v[65:66]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[45:46], v[45:46], v[13:14]
	v_add_f64 v[57:58], v[55:56], -v[63:64]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[43:44], v[43:44], v[51:52]
	v_add_f64 v[61:62], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[53:54], v[53:54], v[57:58]
	v_cvt_i32_f64_e32 v14, v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[53:54], v[43:44]
	v_cvt_f64_i32_e32 v[59:60], v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[43:44]
	v_add_f64 v[45:46], v[45:46], -v[59:60]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[32:33], v[30:31]
	v_add_f64 v[51:52], v[49:50], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[43:44], v[51:52], -v[45:46]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[51:52]
	v_add_f64 v[32:33], v[49:50], -v[43:44]
	v_add_co_ci_u32_e64 v43, s0, 0, v14, vcc_lo
	v_cndmask_b32_e64 v14, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[32:33]
	v_add_f64 v[32:33], v[51:52], -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[32:33], v[30:31]
	v_mul_f64 v[46:47], v[44:45], s[8:9]
	v_add_f64 v[32:33], v[44:45], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[48:49], v[44:45], s[8:9], -v[46:47]
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[44:45], s[50:51], v[48:49]
	v_fma_f64 v[32:33], v[30:31], s[8:9], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[46:47], v[32:33]
	v_add_f64 v[44:45], v[30:31], -v[46:47]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
.LBB1_9:                                ; %Flow149
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mul_f64 v[30:31], |v[16:17]|, s[20:21]
	s_mov_b32 s52, s6
	s_mov_b32 s10, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[43:44], v[30:31]
	v_fma_f64 v[30:31], v[43:44], s[52:53], |v[16:17]|
	v_mul_f64 v[32:33], v[43:44], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[47:48], v[43:44], s[22:23], v[30:31]
	v_add_f64 v[45:46], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], -v[45:46]
	v_add_f64 v[45:46], v[45:46], -v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[32:33]
	v_fma_f64 v[32:33], v[43:44], s[10:11], v[32:33]
	v_add_f64 v[30:31], v[45:46], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	v_fma_f64 v[32:33], v[43:44], s[24:25], v[30:31]
	v_cvt_i32_f64_e32 v43, v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[47:48], v[32:33]
	v_add_f64 v[45:46], v[30:31], -v[47:48]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], -v[45:46]
.LBB1_11:                               ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[44:45], v[26:27], v[26:27]
	v_mul_f64 v[46:47], v[30:31], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[64:65], v[28:29], 0.5
	v_mul_f64 v[70:71], v[32:33], 0.5
	s_mov_b32 s54, s38
	v_cmp_class_f64_e64 s0, v[16:17], 0x1f8
	v_fma_f64 v[48:49], v[44:45], s[42:43], s[40:41]
	v_fma_f64 v[50:51], v[46:47], s[42:43], s[40:41]
	v_fma_f64 v[52:53], v[44:45], s[28:29], s[26:27]
	v_mul_f64 v[54:55], v[44:45], 0.5
	v_fma_f64 v[56:57], v[46:47], s[28:29], s[26:27]
	v_mul_f64 v[58:59], v[46:47], 0.5
	v_mul_f64 v[66:67], v[26:27], -v[44:45]
	v_mul_f64 v[72:73], v[30:31], -v[46:47]
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[44:45]
	v_fma_f64 v[50:51], v[46:47], v[50:51], s[44:45]
	v_fma_f64 v[52:53], v[44:45], v[52:53], s[30:31]
	v_add_f64 v[60:61], -v[54:55], 1.0
	v_fma_f64 v[56:57], v[46:47], v[56:57], s[30:31]
	v_add_f64 v[62:63], -v[58:59], 1.0
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[46:47]
	v_fma_f64 v[50:51], v[46:47], v[50:51], s[46:47]
	v_fma_f64 v[52:53], v[44:45], v[52:53], s[34:35]
	v_add_f64 v[68:69], -v[60:61], 1.0
	v_fma_f64 v[56:57], v[46:47], v[56:57], s[34:35]
	v_add_f64 v[74:75], -v[62:63], 1.0
	v_fma_f64 v[48:49], v[44:45], v[48:49], s[48:49]
	v_fma_f64 v[50:51], v[46:47], v[50:51], s[48:49]
	v_fma_f64 v[52:53], v[44:45], v[52:53], s[36:37]
	v_add_f64 v[54:55], v[68:69], -v[54:55]
	v_fma_f64 v[56:57], v[46:47], v[56:57], s[36:37]
	v_add_f64 v[58:59], v[74:75], -v[58:59]
	v_fma_f64 v[48:49], v[66:67], v[48:49], v[64:65]
	v_fma_f64 v[50:51], v[72:73], v[50:51], v[70:71]
	v_mul_f64 v[64:65], v[44:45], v[44:45]
	v_fma_f64 v[52:53], v[44:45], v[52:53], s[38:39]
	v_fma_f64 v[54:55], v[26:27], -v[28:29], v[54:55]
	v_fma_f64 v[28:29], v[44:45], v[48:49], -v[28:29]
	v_fma_f64 v[44:45], v[46:47], v[50:51], -v[32:33]
	v_mul_f64 v[48:49], v[46:47], v[46:47]
	v_fma_f64 v[46:47], v[46:47], v[56:57], s[38:39]
	v_fma_f64 v[32:33], v[30:31], -v[32:33], v[58:59]
	v_fma_f64 v[50:51], v[64:65], v[52:53], v[54:55]
	v_fma_f64 v[28:29], v[66:67], s[54:55], v[28:29]
	v_fma_f64 v[44:45], v[72:73], s[54:55], v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[32:33], v[48:49], v[46:47], v[32:33]
	v_add_f64 v[46:47], v[60:61], v[50:51]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	v_add_f64 v[28:29], v[30:31], -v[44:45]
	v_and_b32_e32 v14, 1, v42
	v_add_f64 v[30:31], v[62:63], v[32:33]
	v_and_b32_e32 v32, 1, v43
	v_lshlrev_b32_e32 v33, 30, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v14
	v_cmp_eq_u32_e64 s1, 0, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v27, v47, v27 :: v_dual_and_b32 v32, 0x80000000, v33
	v_cndmask_b32_e32 v14, v46, v26, vcc_lo
	v_lshlrev_b32_e32 v26, 30, v42
	v_xor_b32_e32 v29, 0x80000000, v29
	v_cndmask_b32_e64 v28, v28, v30, s1
	v_xor_b32_e32 v26, v26, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v29, v29, v31, s1
	v_cndmask_b32_e64 v28, 0, v28, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v26, 0x80000000, v26
	v_xor_b32_e32 v29, v29, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v27, v27, v26
	v_cndmask_b32_e64 v26, 0, v14, s0
	v_cndmask_b32_e64 v29, 0x7ff80000, v29, s0
	v_mul_f32_e32 v14, v41, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, 0x7ff80000, v27, s0
	v_mul_f32_e32 v14, v41, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], -v[16:17], v[28:29], v[26:27]
	v_cvt_f64_f32_e32 v[28:29], v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[3:4], v[26:27]
	v_div_scale_f64 v[30:31], null, v[28:29], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[32:33], v[30:31]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[41:42], -v[30:31], v[32:33], 1.0
	v_fma_f64 v[32:33], v[32:33], v[41:42], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], -v[30:31], v[32:33], 1.0
	v_fma_f64 v[32:33], v[32:33], v[41:42], v[32:33]
	v_div_scale_f64 v[41:42], vcc_lo, v[26:27], v[28:29], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[43:44], v[41:42], v[32:33]
	v_fma_f64 v[30:31], -v[30:31], v[43:44], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[30:31], v[30:31], v[32:33], v[43:44]
	v_div_fixup_f64 v[26:27], v[30:31], v[28:29], v[26:27]
                                        ; implicit-def: $vgpr30
                                        ; implicit-def: $vgpr28_vgpr29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cvt_f32_f64_e32 v14, v[26:27]
                                        ; implicit-def: $vgpr26_vgpr27
	global_store_b32 v[5:6], v14, off
	s_and_saveexec_b32 s1, s66
	s_xor_b32 s10, exec_lo, s1
	s_cbranch_execz .LBB1_13
; %bb.12:                               ;   in Loop: Header=BB1_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[16:17]|
	s_mov_b32 s8, s6
	s_mov_b32 s51, s11
	v_cndmask_b32_e32 v25, v40, v25, vcc_lo
	v_cndmask_b32_e32 v24, v16, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[26:27], v[22:23], v[24:25]
	v_mul_f64 v[28:29], v[20:21], v[24:25]
	v_fma_f64 v[22:23], v[22:23], v[24:25], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], v[20:21], v[24:25], -v[28:29]
	v_add_f64 v[30:31], v[28:29], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[30:31], -v[28:29]
	v_add_f64 v[42:43], v[26:27], v[30:31]
	v_add_f64 v[40:41], v[30:31], -v[32:33]
	v_add_f64 v[22:23], v[22:23], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[32:33], v[42:43], -2
	v_add_f64 v[26:27], v[42:43], -v[26:27]
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[32:33]|
	v_add_f64 v[26:27], v[30:31], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], v[28:29]
	v_fract_f64_e32 v[28:29], v[32:33]
	v_dual_cndmask_b32 v29, 0, v29 :: v_dual_cndmask_b32 v28, 0, v28
	v_mul_f64 v[44:45], v[18:19], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[28:29], v[28:29], 2
	v_add_f64 v[40:41], v[44:45], v[20:21]
	v_fma_f64 v[18:19], v[18:19], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[40:41], v[22:23]
	v_add_f64 v[32:33], v[26:27], v[30:31]
	v_add_f64 v[46:47], v[30:31], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[32:33], v[28:29]
	v_add_f64 v[52:53], v[30:31], -v[46:47]
	v_add_f64 v[22:23], v[22:23], -v[46:47]
	v_add_f64 v[24:25], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[42:43]
	v_add_f64 v[42:43], v[40:41], -v[44:45]
	v_add_f64 v[24:25], v[30:31], -v[24:25]
	v_cndmask_b32_e64 v14, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[50:51], v[40:41], -v[42:43]
	v_add_f64 v[20:21], v[20:21], -v[42:43]
	v_add_f64 v[40:41], v[40:41], -v[52:53]
	v_add_f64 v[28:29], v[28:29], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[44:45], -v[50:51]
	v_add_f64 v[22:23], v[22:23], v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[32:33], v[28:29]
	v_add_f64 v[20:21], v[20:21], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v14, v[48:49]
	v_add_f64 v[20:21], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[46:47], v14
	v_add_f64 v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[46:47]
	v_add_f64 v[18:19], v[24:25], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[32:33], v[28:29]
	v_add_f64 v[20:21], v[22:23], -v[28:29]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[32:33], -v[20:21]
	v_add_co_ci_u32_e64 v30, s1, 0, v14, vcc_lo
	v_cndmask_b32_e64 v14, 0, 0x3ff00000, vcc_lo
	v_add_f64 v[18:19], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[22:23], -v[13:14]
	v_add_f64 v[22:23], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[22:23], s[8:9]
	v_add_f64 v[20:21], v[22:23], -v[20:21]
	v_fma_f64 v[26:27], v[22:23], s[8:9], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], -v[20:21]
	v_fma_f64 v[20:21], v[22:23], s[50:51], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], v[18:19], s[8:9], v[20:21]
	v_add_f64 v[26:27], v[24:25], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[26:27], -v[24:25]
	v_add_f64 v[28:29], v[18:19], -v[20:21]
.LBB1_13:                               ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB1_15
; %bb.14:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mul_f64 v[18:19], |v[16:17]|, s[20:21]
	s_mov_b32 s52, s6
	s_mov_b32 s10, s22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[18:19], v[18:19]
	v_fma_f64 v[20:21], v[18:19], s[52:53], |v[16:17]|
	v_mul_f64 v[22:23], v[18:19], s[22:23]
	v_cvt_i32_f64_e32 v30, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[28:29], v[18:19], s[22:23], v[20:21]
	v_add_f64 v[24:25], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	v_add_f64 v[24:25], v[24:25], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[22:23]
	v_fma_f64 v[22:23], v[18:19], s[10:11], v[22:23]
	v_add_f64 v[20:21], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	v_fma_f64 v[20:21], v[18:19], s[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[28:29], v[20:21]
	v_add_f64 v[22:23], v[26:27], -v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[28:29], v[20:21], -v[22:23]
.LBB1_15:                               ; %_ZL3sind.exit116
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_f64 v[18:19], v[26:27], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[28:29], 0.5
	s_mov_b32 s54, s38
	v_fma_f64 v[20:21], v[18:19], s[42:43], s[40:41]
	v_fma_f64 v[22:23], v[18:19], s[28:29], s[26:27]
	v_mul_f64 v[24:25], v[18:19], 0.5
	v_mul_f64 v[42:43], v[26:27], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[44:45]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], -v[24:25], 1.0
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[34:35]
	v_add_f64 v[44:45], -v[31:32], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[18:19], v[20:21], s[48:49]
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[44:45], -v[24:25]
	v_fma_f64 v[20:21], v[42:43], v[20:21], v[40:41]
	v_mul_f64 v[40:41], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[22:23], v[18:19], v[22:23], s[38:39]
	v_fma_f64 v[24:25], v[26:27], -v[28:29], v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[18:19], v[20:21], -v[28:29]
	v_fma_f64 v[20:21], v[40:41], v[22:23], v[24:25]
	v_and_b32_e32 v22, 1, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 0, v22
	v_fma_f64 v[18:19], v[42:43], s[54:55], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[31:32], v[20:21]
	v_add_f64 v[18:19], v[26:27], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v21, v19 :: v_dual_lshlrev_b32 v14, 30, v30
	v_xor_b32_e32 v14, v14, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v18, v20, v18, vcc_lo
	v_and_b32_e32 v14, 0x80000000, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v18, 0, v18, s0
	v_xor_b32_e32 v14, v19, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v19, 0x7ff80000, v14, s0
	v_mul_f64 v[18:19], v[3:4], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[20:21], null, v[16:17], v[16:17], v[18:19]
	v_div_scale_f64 v[26:27], vcc_lo, v[18:19], v[16:17], v[18:19]
	v_rcp_f64_e32 v[22:23], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_fma_f64 v[24:25], -v[20:21], v[22:23], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[22:23], v[24:25], v[22:23]
	v_mul_f64 v[24:25], v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[20:21], -v[20:21], v[24:25], v[26:27]
	v_div_fmas_f64 v[20:21], v[20:21], v[22:23], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[16:17], v[20:21], v[16:17], v[18:19]
	v_cvt_f32_f64_e32 v14, v[16:17]
	v_add_co_u32 v16, vcc_lo, v5, s14
	v_add_co_ci_u32_e32 v17, vcc_lo, s15, v6, vcc_lo
	global_store_b32 v[16:17], v14, off
	global_load_b32 v14, v[5:6], off
	v_add_nc_u32_e32 v16, s64, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s12, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v17, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v14, v14, -v39
	global_store_b32 v[16:17], v14, off
	global_load_b32 v14, v[5:6], off
	v_add_nc_u32_e32 v16, s65, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v16, vcc_lo, s12, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v17, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v14, v14, -v38
	global_store_b32 v[16:17], v14, off
	global_load_b32 v14, v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v14, v14, -v37
.LBB1_16:                               ; %Flow151
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s17
	s_cbranch_execz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v16, s64, v1
	v_add_nc_u32_e32 v18, s65, v1
	v_add_co_u32 v20, vcc_lo, v5, s14
	v_add_co_ci_u32_e32 v21, vcc_lo, s15, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v17, 31, v16
	v_ashrrev_i32_e32 v19, 31, v18
	v_mov_b32_e32 v14, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v16, vcc_lo, s12, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v18, vcc_lo, s12, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s13, v19, vcc_lo
	s_clause 0x1
	global_store_b32 v[5:6], v35, off
	global_store_b32 v[20:21], v34, off
	s_clause 0x1
	global_store_b32 v[16:17], v13, off
	global_store_b32 v[18:19], v13, off
.LBB1_18:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v16, s60, v1
	v_add_nc_u32_e32 v1, s16, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v17, 31, v16
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	s_or_b32 s61, vcc_lo, s61
	v_add_co_u32 v16, s0, s12, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s0, s13, v17, s0
	v_add_co_u32 v5, s0, v5, s18
	v_add_co_ci_u32_e64 v6, s0, s19, v6, s0
	global_store_b32 v[16:17], v14, off
	s_and_not1_b32 exec_lo, exec_lo, s61
	s_cbranch_execnz .LBB1_2
.LBB1_19:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19initWeightFunctionsIfEvPT_iiiddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 76
		.amdhsa_next_free_sgpr 67
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z19initWeightFunctionsIfEvPT_iiiddd,"axG",@progbits,_Z19initWeightFunctionsIfEvPT_iiiddd,comdat
.Lfunc_end1:
	.size	_Z19initWeightFunctionsIfEvPT_iiiddd, .Lfunc_end1-_Z19initWeightFunctionsIfEvPT_iiiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5900
; NumSgprs: 69
; NumVgprs: 76
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 9
; NumSGPRsForWavesPerEU: 69
; NumVGPRsForWavesPerEU: 76
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14prepareDensityIfEvPT_biiiddd,"axG",@progbits,_Z14prepareDensityIfEvPT_biiiddd,comdat
	.protected	_Z14prepareDensityIfEvPT_biiiddd ; -- Begin function _Z14prepareDensityIfEvPT_biiiddd
	.globl	_Z14prepareDensityIfEvPT_biiiddd
	.p2align	8
	.type	_Z14prepareDensityIfEvPT_biiiddd,@function
_Z14prepareDensityIfEvPT_biiiddd:       ; @_Z14prepareDensityIfEvPT_biiiddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_add_u32 s12, s0, 48
	s_addc_u32 s13, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s17, s2, 0xffff
	s_mul_i32 s16, s7, s6
	v_mad_u64_u32 v[1:2], null, s15, s17, v[0:1]
	s_mul_i32 s14, s16, s5
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB2_13
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[18:19], s[0:1], 0x28
	s_load_b128 s[8:11], s[0:1], 0x18
	s_bitcmp1_b32 s4, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[2:3], null, s[18:19], s[18:19], 1.0
	v_div_scale_f64 v[4:5], null, s[10:11], s[10:11], 1.0
	v_div_scale_f64 v[6:7], null, s[8:9], s[8:9], 1.0
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, s[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[8:9], v[2:3]
	v_rcp_f64_e32 v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[12:13], v[6:7]
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_div_scale_f64 v[14:15], s2, 1.0, s[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s3, 1.0, s[8:9], 1.0
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_mul_f64 v[18:19], v[20:21], v[8:9]
	v_mul_f64 v[22:23], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[24:25], v[16:17], v[12:13]
	v_fma_f64 v[2:3], -v[2:3], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], -v[4:5], v[22:23], v[14:15]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[18:19]
	s_mov_b32 vcc_lo, s2
	s_cselect_b32 s2, -1, 0
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[22:23]
	s_mov_b32 vcc_lo, s3
	s_ashr_i32 s3, s16, 31
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	s_add_i32 s4, s16, s3
	v_div_fixup_f64 v[2:3], v[2:3], s[18:19], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[4:5], v[4:5], s[10:11], 1.0
	s_ashr_i32 s10, s7, 31
	s_xor_b32 s11, s4, s3
	v_div_fixup_f64 v[6:7], v[6:7], s[8:9], 1.0
	s_add_i32 s8, s7, s10
	s_load_b32 s4, s[12:13], 0x0
	s_xor_b32 s15, s8, s10
	s_sub_i32 s8, 0, s11
	s_sub_i32 s9, 0, s15
	s_xor_b32 s12, s2, -1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v0, v[2:3]
	v_cvt_f32_u32_e32 v2, s11
	v_cvt_f32_u32_e32 v3, s15
	v_cvt_i32_f64_e32 v4, v[4:5]
	v_cvt_i32_f64_e32 v5, v[6:7]
	v_rcp_iflag_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v2, 0x4f7ffffe, v2 :: v_dual_mul_f32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_u32_f32_e32 v7, v3
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_lo_u32 v8, s8, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v9, s9, v7
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_mul_hi_u32 v8, v6, v8
	v_lshlrev_b32_e32 v0, 1, v0
	v_mul_hi_u32 v9, v7, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b32_e32 v4, 1, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_not_b32_e32 v10, v0
	v_lshlrev_b32_e32 v5, 1, v5
	v_add_nc_u32_e32 v6, v6, v8
	v_not_b32_e32 v11, v4
	v_add_nc_u32_e32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_not_b32_e32 v12, v5
	v_add_nc_u32_e32 v8, s7, v10
	v_add_nc_u32_e32 v9, s6, v11
	s_mov_b32 s6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v10, s5, v12
	s_ashr_i32 s5, s4, 31
	s_lshl_b64 s[8:9], s[4:5], 2
	s_sub_i32 s5, 0, s16
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v11, 31, v1
	s_and_b32 s2, exec_lo, s12
	s_mov_b32 s17, 0
                                        ; implicit-def: $sgpr16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v1, v11
	v_xor_b32_e32 v12, v12, v11
	v_xor_b32_e32 v11, s3, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v13, v12, v6
	v_mul_lo_u32 v14, v13, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v12, v12, v14
	v_add_nc_u32_e32 v14, 1, v13
	v_subrev_nc_u32_e32 v15, s11, v12
	v_cmp_le_u32_e32 vcc_lo, s11, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v14 :: v_dual_cndmask_b32 v12, v12, v15
	v_add_nc_u32_e32 v14, 1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s11, v12
	v_cndmask_b32_e32 v12, v13, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v12, v12, v11
	v_sub_nc_u32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, s5, v11, v[1:2]
	v_ashrrev_i32_e32 v12, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v14, v13, v12
	v_xor_b32_e32 v14, v14, v12
	v_xor_b32_e32 v12, s10, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v14, v7
	v_mul_lo_u32 v16, v15, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v14, v14, v16
	v_add_nc_u32_e32 v16, 1, v15
	v_subrev_nc_u32_e32 v17, s15, v14
	v_cmp_le_u32_e32 vcc_lo, s15, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v15, v15, v16 :: v_dual_cndmask_b32 v14, v14, v17
	v_add_nc_u32_e32 v16, 1, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s15, v14
	v_cndmask_b32_e32 v14, v15, v16, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v14, v14, v12
	v_sub_nc_u32_e32 v12, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, v12, s7
	v_cmp_eq_u32_e64 s0, v12, v4
	s_or_b32 s13, vcc_lo, s0
	s_mov_b32 s0, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v13, v13, v14
	s_mov_b32 vcc_lo, s2
	v_cmp_eq_u32_e64 s1, v13, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s13, s13, s1
	s_cbranch_vccz .LBB2_6
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	global_load_b32 v14, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v14, v14, v14
	global_store_b32 v[2:3], v14, off
.LBB2_5:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_u32_e32 vcc_lo, v11, v10
	v_cmp_eq_u32_e64 s0, v12, v9
	v_cmp_eq_u32_e64 s1, v13, v8
	s_mov_b32 s16, 2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 s2, vcc_lo, s0
	s_mov_b32 s0, 0
	s_or_b32 s17, s2, s1
.LBB2_6:                                ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB2_10
; %bb.7:                                ;   in Loop: Header=BB2_2 Depth=1
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB2_9
; %bb.8:                                ;   in Loop: Header=BB2_2 Depth=1
	global_load_b32 v14, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v14, 0.5, v14
	global_store_b32 v[2:3], v14, off
.LBB2_9:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_u32_e32 vcc_lo, v11, v10
	v_cmp_eq_u32_e64 s0, v12, v9
	v_cmp_eq_u32_e64 s1, v13, v8
	s_mov_b32 s16, 0.5
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s17, s0, s1
.LBB2_10:                               ; %Flow98
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s17
	s_cbranch_execz .LBB2_12
; %bb.11:                               ; %.sink.split
                                        ;   in Loop: Header=BB2_2 Depth=1
	global_load_b32 v11, v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v11, s16, v11
	global_store_b32 v[2:3], v11, off
.LBB2_12:                               ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, s4, v1
	v_add_co_u32 v2, s0, v2, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s14, v1
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB2_2
.LBB2_13:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14prepareDensityIfEvPT_biiiddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14prepareDensityIfEvPT_biiiddd,"axG",@progbits,_Z14prepareDensityIfEvPT_biiiddd,comdat
.Lfunc_end2:
	.size	_Z14prepareDensityIfEvPT_biiiddd, .Lfunc_end2-_Z14prepareDensityIfEvPT_biiiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1216
; NumSgprs: 22
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
	.protected	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii ; -- Begin function _Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.globl	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.p2align	8
	.type	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,@function
_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii: ; @_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_add_u32 s2, s0, 40
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s8, 0xffff
	s_lshr_b32 s7, s6, 31
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_add_i32 s6, s6, s7
	s_mul_i32 s4, s5, s4
	s_ashr_i32 s6, s6, 1
	s_mov_b32 s5, exec_lo
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s4, s4, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB3_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s11, s[2:3], 0x0
	s_clause 0x1
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s5, s4, 31
	s_lshl_b32 s18, s4, 1
	s_mul_i32 s19, s4, 3
	s_lshl_b32 s20, s4, 2
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	s_lshl_b64 s[8:9], s[4:5], 2
	s_lshl_b64 s[16:17], s[4:5], 3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	v_add_co_u32 v2, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, v4, s0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v0, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	s_lshl_b64 s[12:13], s[10:11], 3
	s_lshl_b64 s[14:15], s[10:11], 2
	s_mov_b32 s1, 0
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[8:9], v[4:5], off offset:-4
	global_load_b32 v0, v[6:7], off
	v_add_co_u32 v10, vcc_lo, v6, s8
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v7, vcc_lo
	v_add_co_u32 v12, vcc_lo, v2, s16
	v_add_co_ci_u32_e32 v13, vcc_lo, s17, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v8, v0
	global_store_b32 v[2:3], v0, off
	global_load_b32 v0, v[6:7], off
	v_add_co_u32 v6, s0, v6, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s15, v7, s0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v9, v0
	global_store_b32 v[2:3], v0, off offset:4
	global_load_b32 v0, v[10:11], off
	v_add_co_u32 v2, s0, v2, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s13, v3, s0
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v8, v0
	global_store_b32 v[12:13], v0, off
	global_load_b32 v0, v[10:11], off
	v_add_nc_u32_e32 v10, s18, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[14:15], 2, v[10:11]
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v9, v0
	global_store_b32 v[12:13], v0, off offset:4
	global_load_b32 v0, v[14:15], off
	v_add_nc_u32_e32 v12, s19, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v0, v0, -v9
	global_store_b32 v[10:11], v0, off
	global_load_b32 v0, v[14:15], off
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v8, v0
	global_store_b32 v[10:11], v0, off offset:4
	global_load_b32 v0, v[14:15], off
	v_lshlrev_b64 v[10:11], 3, v[12:13]
	v_add_nc_u32_e32 v12, s20, v1
	v_add_nc_u32_e32 v1, s10, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_u32 v10, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v0, v0, -v9
	global_store_b32 v[10:11], v0, off
	global_load_b32 v0, v[14:15], off
	v_lshlrev_b64 v[14:15], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v8, v0
	global_store_b32 v[10:11], v0, off offset:4
	global_load_b32 v0, v[14:15], off
	v_lshlrev_b64 v[10:11], 3, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, s12
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s4, v1
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_mul_f32_e64 v0, v0, -v9
	global_store_b32 v[10:11], v0, off
	global_load_b32 v0, v[14:15], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v0, v8, v0
	global_store_b32 v[10:11], v0, off offset:4
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB3_2
.LBB3_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
.Lfunc_end3:
	.size	_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, .Lfunc_end3-_Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 788
; NumSgprs: 23
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14calcDerivativeIfEvPT_iii,"axG",@progbits,_Z14calcDerivativeIfEvPT_iii,comdat
	.protected	_Z14calcDerivativeIfEvPT_iii ; -- Begin function _Z14calcDerivativeIfEvPT_iii
	.globl	_Z14calcDerivativeIfEvPT_iii
	.p2align	8
	.type	_Z14calcDerivativeIfEvPT_iii,@function
_Z14calcDerivativeIfEvPT_iii:           ; @_Z14calcDerivativeIfEvPT_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x8
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_mov_b32 s9, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s8, 0xffff
	s_mul_i32 s8, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
	s_mul_i32 s8, s8, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB4_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[2:3], 0x0
	s_load_b64 s[10:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mul_i32 s0, s6, s5
	s_ashr_i32 s9, s8, 31
	s_mul_i32 s0, s0, s4
	s_mov_b32 s12, 0xd916872b
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_mov_b32 s14, 0x54442d18
	s_mov_b32 s16, 0x7f3321d2
	s_mov_b32 s26, 0
	s_mov_b32 s13, 0x3feff7ce
	s_mov_b32 s15, 0x402921fb
	s_mov_b32 s17, 0x4042d97c
	s_lshl_b64 s[18:19], s[8:9], 2
	s_lshl_b32 s9, s0, 1
	s_mul_i32 s27, s0, 3
	s_lshl_b32 s28, s0, 2
	s_mov_b32 s25, 0x403921fb
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s20, s2, s7
	v_add_co_u32 v2, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_ashr_i32 s21, s20, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[22:23], s[20:21], 2
.LBB4_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, s18
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v3, vcc_lo
	global_load_b32 v17, v[2:3], off
	v_add_nc_u32_e32 v10, s28, v1
	s_mov_b32 s24, s14
	global_load_b32 v0, v[4:5], off
	v_add_nc_u32_e32 v6, s9, v1
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[15:16], v17
	v_sub_f32_e32 v35, 1.0, v17
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v19, v0, v0 :: v_dual_add_nc_u32 v8, s27, v1
	v_ashrrev_i32_e32 v7, 31, v6
	v_cvt_f64_f32_e32 v[17:18], v0
	v_add_nc_u32_e32 v1, s20, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v19, v0, v19
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_cvt_f64_f32_e32 v[19:20], v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s10, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
	v_add_co_u32 v10, vcc_lo, s10, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
	s_clause 0x2
	global_load_b32 v13, v[6:7], off
	global_load_b32 v14, v[8:9], off
	global_load_b32 v12, v[10:11], off
	v_cmp_nlt_f64_e32 vcc_lo, s[12:13], v[15:16]
	v_div_scale_f64 v[37:38], null, s[14:15], s[14:15], v[17:18]
	v_mul_f64 v[41:42], 0xc0080000, v[17:18]
	v_div_scale_f64 v[39:40], s0, v[17:18], s[14:15], v[17:18]
	v_cndmask_b32_e32 v87, 0x3a831200, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v61, null, v87, v87, v0
	v_div_scale_f32 v62, s2, v0, v87, v0
	v_rcp_f32_e32 v85, v61
	s_waitcnt_depctr 0xfff
	v_fma_f32 v58, -v61, v85, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v85, v58, v85
	v_mul_f32_e32 v86, v62, v85
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v68, -v61, v86, v62
	v_fmac_f32_e32 v86, v68, v85
	v_div_scale_f32 v59, null, v87, v87, 1.0
	v_div_scale_f32 v60, vcc_lo, 1.0, v87, 1.0
	v_cmp_gt_f32_e64 s1, 0x800000, v87
	v_mul_f32_e32 v88, v87, v87
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v63, v59
	v_fma_f32 v89, -v61, v86, v62
	v_cndmask_b32_e64 v43, 1.0, 0x4f800000, s1
	v_cndmask_b32_e64 v64, 0, 0x41b17218, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v45, v87, v43
	v_cvt_f64_f32_e32 v[43:44], v88
	s_waitcnt_depctr 0xfff
	v_fma_f32 v57, -v59, v63, 1.0
	v_log_f32_e32 v65, v45
	v_fmac_f32_e32 v63, v57, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v66, v60, v63
	s_waitcnt_depctr 0xfff
	v_cmp_gt_f32_e64 s5, 0x7f800000, |v65|
	v_fma_f32 v67, -v59, v66, v60
	v_fmac_f32_e32 v66, v67, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v59, -v59, v66, v60
	v_div_fmas_f32 v59, v59, v63, v66
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v90, v59, v87, 1.0
	v_mul_f32_e32 v57, 0x3f317217, v65
	v_fma_f32 v58, 0x3f317217, v65, -v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v58, 0x3377d1cf, v65
	v_add_f32_e32 v67, v57, v58
	v_rcp_f64_e32 v[57:58], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v60, v65, v67, s5
	v_sub_f32_e32 v60, v60, v64
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[59:60], v60
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v27, v0, v13
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v29, v0, v14
	v_mul_f32_e32 v33, v14, v14
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v31, v0, v12
	v_cvt_f64_f32_e32 v[21:22], v13
	v_cvt_f64_f32_e32 v[23:24], v14
	v_cvt_f64_f32_e32 v[25:26], v12
	v_fmac_f32_e32 v33, v13, v13
	v_cvt_f64_f32_e32 v[27:28], v27
	v_cvt_f64_f32_e32 v[29:30], v29
	v_cvt_f64_f32_e32 v[31:32], v31
	v_mul_f32_e32 v67, v13, v90
	v_fmac_f32_e32 v33, v12, v12
	v_mul_f32_e32 v69, v14, v90
	v_mul_f32_e32 v71, v12, v90
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[67:68], v67
	v_fma_f32 v36, v0, v0, -v33
	v_cvt_f64_f32_e32 v[33:34], v33
	v_cvt_f64_f32_e32 v[69:70], v69
	v_cvt_f64_f32_e32 v[71:72], v71
	s_delay_alu instid0(VALU_DEP_4)
	v_cvt_f64_f32_e32 v[15:16], v36
	v_cvt_f64_f32_e32 v[35:36], v87
	v_div_scale_f64 v[45:46], null, s[14:15], s[14:15], v[21:22]
	v_div_scale_f64 v[47:48], s1, v[21:22], s[14:15], v[21:22]
	v_div_scale_f64 v[49:50], null, s[14:15], s[14:15], v[23:24]
	v_div_scale_f64 v[53:54], null, s[14:15], s[14:15], v[25:26]
	v_div_scale_f64 v[51:52], s3, v[23:24], s[14:15], v[23:24]
	v_div_scale_f64 v[55:56], s4, v[25:26], s[14:15], v[25:26]
	v_fma_f64 v[19:20], v[41:42], v[33:34], v[19:20]
	v_mul_f64 v[33:34], v[43:44], s[24:25]
	v_mul_f64 v[41:42], v[43:44], s[14:15]
	v_mul_f64 v[35:36], v[35:36], s[16:17]
	v_rcp_f64_e32 v[61:62], v[45:46]
	v_rcp_f64_e32 v[63:64], v[49:50]
	v_rcp_f64_e32 v[65:66], v[53:54]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_div_scale_f64 v[73:74], null, v[33:34], v[33:34], v[15:16]
	v_div_scale_f64 v[75:76], s5, v[15:16], v[33:34], v[15:16]
	v_div_scale_f64 v[77:78], null, v[41:42], v[41:42], v[27:28]
	v_div_scale_f64 v[79:80], s6, v[27:28], v[41:42], v[27:28]
	v_div_scale_f64 v[81:82], null, v[41:42], v[41:42], v[29:30]
	v_div_scale_f64 v[83:84], s7, v[29:30], v[41:42], v[29:30]
	v_mul_f64 v[35:36], v[35:36], v[43:44]
	v_fma_f64 v[43:44], -v[37:38], v[57:58], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[57:58], v[43:44], v[57:58]
	v_fma_f64 v[57:58], -v[37:38], v[43:44], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[43:44], v[57:58], v[43:44]
	v_mul_f64 v[57:58], v[39:40], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[37:38], -v[37:38], v[57:58], v[39:40]
	v_div_scale_f64 v[39:40], null, v[41:42], v[41:42], v[31:32]
	v_div_fmas_f64 v[37:38], v[37:38], v[43:44], v[57:58]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[57:58], -v[45:46], v[61:62], 1.0
	s_mov_b32 vcc_lo, s1
	v_div_scale_f64 v[43:44], s0, v[31:32], v[41:42], v[31:32]
	v_div_fixup_f64 v[17:18], v[37:38], s[14:15], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[57:58], v[61:62], v[57:58], v[61:62]
	v_cvt_f32_f64_e32 v91, v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], -v[45:46], v[57:58], 1.0
	v_div_scale_f32 v17, null, v87, v87, v91
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[57:58], v[57:58], v[61:62], v[57:58]
	v_mul_f64 v[61:62], v[47:48], v[57:58]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[45:46], -v[45:46], v[61:62], v[47:48]
	v_div_scale_f64 v[47:48], null, s[14:15], s[14:15], v[59:60]
	v_div_fmas_f64 v[45:46], v[45:46], v[57:58], v[61:62]
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[61:62], -v[49:50], v[63:64], 1.0
	s_mov_b32 vcc_lo, s3
	v_div_scale_f64 v[57:58], s1, v[59:60], s[14:15], v[59:60]
	v_div_fixup_f64 v[21:22], v[45:46], s[14:15], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[63:64], v[61:62], v[63:64]
	v_fma_f64 v[63:64], -v[49:50], v[61:62], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[61:62], v[61:62], v[63:64], v[61:62]
	v_mul_f64 v[63:64], v[51:52], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_fma_f64 v[49:50], -v[49:50], v[63:64], v[51:52]
	v_fma_f64 v[51:52], -v[53:54], v[65:66], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[49:50], v[49:50], v[61:62], v[63:64]
	v_fma_f64 v[51:52], v[65:66], v[51:52], v[65:66]
	s_mov_b32 vcc_lo, s4
	v_div_scale_f64 v[61:62], null, s[14:15], s[14:15], v[67:68]
	v_div_scale_f64 v[63:64], s3, v[67:68], s[14:15], v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_fixup_f64 v[23:24], v[49:50], s[14:15], v[23:24]
	v_fma_f64 v[65:66], -v[53:54], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[65:66], v[51:52]
	v_mul_f64 v[65:66], v[55:56], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[53:54], -v[53:54], v[65:66], v[55:56]
	v_div_scale_f64 v[55:56], null, s[14:15], s[14:15], v[69:70]
	v_div_fmas_f64 v[51:52], v[53:54], v[51:52], v[65:66]
	v_rcp_f64_e32 v[53:54], v[73:74]
	s_mov_b32 vcc_lo, s2
	v_div_scale_f64 v[45:46], s2, v[71:72], s[14:15], v[71:72]
	v_div_fmas_f32 v89, v89, v85, v86
	v_div_scale_f32 v18, vcc_lo, v91, v87, v91
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[25:26], v[51:52], s[14:15], v[25:26]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[65:66], -v[73:74], v[53:54], 1.0
	v_fma_f64 v[53:54], v[53:54], v[65:66], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[65:66], -v[73:74], v[53:54], 1.0
	v_fma_f64 v[53:54], v[53:54], v[65:66], v[53:54]
	v_div_scale_f64 v[65:66], null, s[14:15], s[14:15], v[71:72]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[85:86], v[75:76], v[53:54]
	v_fma_f64 v[37:38], -v[73:74], v[85:86], v[75:76]
	v_rcp_f32_e32 v73, v17
	s_waitcnt_depctr 0xfff
	v_fma_f32 v74, -v17, v73, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v73, v74, v73
	v_mul_f32_e32 v74, v18, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v75, -v17, v74, v18
	v_fmac_f32_e32 v74, v75, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v75, -v17, v74, v18
	v_div_scale_f64 v[17:18], null, v[35:36], v[35:36], v[19:20]
	v_div_fmas_f32 v92, v75, v73, v74
	v_rcp_f64_e32 v[73:74], v[77:78]
	s_mov_b32 vcc_lo, s5
	v_div_fmas_f64 v[37:38], v[37:38], v[53:54], v[85:86]
	v_rcp_f64_e32 v[53:54], v[81:82]
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v85, v89, v87, v0
	v_cvt_f32_f64_e32 v89, v[25:26]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[75:76], -v[77:78], v[73:74], 1.0
	v_div_fixup_f64 v[15:16], v[37:38], v[33:34], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[73:74], v[73:74], v[75:76], v[73:74]
	v_fma_f64 v[75:76], -v[77:78], v[73:74], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[73:74], v[73:74], v[75:76], v[73:74]
	v_mul_f64 v[75:76], v[79:80], v[73:74]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[77:78], -v[77:78], v[75:76], v[79:80]
	v_rcp_f64_e32 v[79:80], v[39:40]
	v_div_fmas_f64 v[73:74], v[77:78], v[73:74], v[75:76]
	v_fma_f64 v[77:78], -v[81:82], v[53:54], 1.0
	s_mov_b32 vcc_lo, s7
	v_rcp_f64_e32 v[75:76], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[27:28], v[73:74], v[41:42], v[27:28]
	v_fma_f64 v[53:54], v[53:54], v[77:78], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[77:78], -v[81:82], v[53:54], 1.0
	v_fma_f64 v[53:54], v[53:54], v[77:78], v[53:54]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[77:78], v[83:84], v[53:54]
	v_fma_f64 v[81:82], -v[81:82], v[77:78], v[83:84]
	v_rcp_f64_e32 v[83:84], v[61:62]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_div_fmas_f64 v[53:54], v[81:82], v[53:54], v[77:78]
	v_fma_f64 v[81:82], -v[39:40], v[79:80], 1.0
	s_mov_b32 vcc_lo, s0
	v_rcp_f64_e32 v[77:78], v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[29:30], v[53:54], v[41:42], v[29:30]
	v_fma_f64 v[79:80], v[79:80], v[81:82], v[79:80]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[81:82], -v[39:40], v[79:80], 1.0
	v_fma_f64 v[79:80], v[79:80], v[81:82], v[79:80]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[81:82], v[43:44], v[79:80]
	v_fma_f64 v[39:40], -v[39:40], v[81:82], v[43:44]
	v_rcp_f64_e32 v[43:44], v[65:66]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[39:40], v[39:40], v[79:80], v[81:82]
	v_fma_f64 v[81:82], -v[47:48], v[75:76], 1.0
	v_rcp_f64_e32 v[79:80], v[17:18]
	v_div_fixup_f64 v[31:32], v[39:40], v[41:42], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[75:76], v[75:76], v[81:82], v[75:76]
	v_fma_f64 v[81:82], -v[61:62], v[83:84], 1.0
	v_fma_f64 v[81:82], v[83:84], v[81:82], v[83:84]
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[83:84], -v[55:56], v[77:78], 1.0
	v_fma_f64 v[77:78], v[77:78], v[83:84], v[77:78]
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[83:84], -v[65:66], v[43:44], 1.0
	v_fma_f64 v[43:44], v[43:44], v[83:84], v[43:44]
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[83:84], -v[17:18], v[79:80], 1.0
	v_fma_f64 v[79:80], v[79:80], v[83:84], v[79:80]
	v_fma_f64 v[83:84], -v[47:48], v[75:76], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[75:76], v[75:76], v[83:84], v[75:76]
	v_fma_f64 v[83:84], -v[61:62], v[81:82], 1.0
	v_fma_f64 v[81:82], v[81:82], v[83:84], v[81:82]
	v_fma_f64 v[83:84], -v[55:56], v[77:78], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[49:50], v[63:64], v[81:82]
	v_fma_f64 v[77:78], v[77:78], v[83:84], v[77:78]
	v_fma_f64 v[83:84], -v[65:66], v[43:44], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[61:62], -v[61:62], v[49:50], v[63:64]
	v_fma_f64 v[43:44], v[43:44], v[83:84], v[43:44]
	v_fma_f64 v[83:84], -v[17:18], v[79:80], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[63:64], v[45:46], v[43:44]
	v_fma_f64 v[79:80], v[79:80], v[83:84], v[79:80]
	v_mul_f64 v[83:84], v[57:58], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[45:46], -v[65:66], v[63:64], v[45:46]
	v_fma_f64 v[47:48], -v[47:48], v[83:84], v[57:58]
	v_div_scale_f64 v[57:58], s0, v[69:70], s[14:15], v[69:70]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[51:52], v[57:58], v[77:78]
	v_fma_f64 v[55:56], -v[55:56], v[51:52], v[57:58]
	v_cvt_f64_f32_e32 v[57:58], v85
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[65:66], null, s[14:15], s[14:15], v[57:58]
	v_rcp_f64_e32 v[33:34], v[65:66]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[37:38], -v[65:66], v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[33:34], v[37:38], v[33:34]
	v_div_scale_f64 v[37:38], s4, v[19:20], v[35:36], v[19:20]
	v_mul_f64 v[85:86], v[37:38], v[79:80]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], -v[17:18], v[85:86], v[37:38]
	v_cvt_f32_f64_e32 v37, v[21:22]
	v_fma_f64 v[21:22], -v[65:66], v[33:34], 1.0
	v_cvt_f32_f64_e32 v38, v[23:24]
	v_div_scale_f64 v[23:24], s5, v[57:58], s[14:15], v[57:58]
	v_mul_f32_e64 v25, v90, -v37
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[21:22], v[33:34], v[21:22], v[33:34]
	v_mul_f32_e32 v93, v14, v38
	v_mul_f32_e64 v26, v90, -v38
	v_mul_f32_e64 v33, v90, -v89
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v93, v13, v37
	v_div_fixup_f32 v37, v92, v87, v91
	v_cvt_f64_f32_e32 v[13:14], v25
	v_cvt_f64_f32_e32 v[25:26], v26
	v_cvt_f64_f32_e32 v[33:34], v33
	v_fmac_f32_e32 v93, v12, v89
	v_cvt_f64_f32_e32 v[37:38], v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v0, v0, v91, -v93
	v_div_scale_f32 v12, null, v88, v88, v0
	v_div_scale_f32 v89, vcc_lo, v0, v88, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v73, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v74, -v12, v73, 1.0
	v_mul_f64 v[53:54], v[23:24], v[21:22]
	v_fmac_f32_e32 v73, v74, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v74, v89, v73
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	v_add_f64 v[15:16], v[15:16], v[37:38]
	v_fma_f32 v37, -v12, v74, v89
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v74, v37, v73
	v_fma_f32 v12, -v12, v74, v89
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fmas_f32 v37, v12, v73, v74
	s_mov_b32 vcc_lo, s4
	v_add_f64 v[12:13], v[13:14], -v[27:28]
	v_div_fmas_f64 v[17:18], v[17:18], v[79:80], v[85:86]
	s_mov_b32 vcc_lo, s5
	v_add_f64 v[27:28], v[33:34], -v[31:32]
	v_div_fixup_f32 v0, v37, v88, v0
	v_fma_f64 v[23:24], -v[65:66], v[53:54], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v90, v91
	v_cvt_f64_f32_e32 v[29:30], v0
	v_cvt_f32_f64_e32 v32, v[25:26]
	v_cvt_f32_f64_e32 v16, v[15:16]
	v_cvt_f32_f64_e32 v31, v[12:13]
	v_cvt_f32_f64_e32 v33, v[27:28]
	v_div_fmas_f64 v[14:15], v[23:24], v[21:22], v[53:54]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[21:22], v[47:48], v[75:76], v[83:84]
	s_mov_b32 vcc_lo, s3
	v_div_fmas_f64 v[23:24], v[61:62], v[81:82], v[49:50]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[25:26], v[55:56], v[77:78], v[51:52]
	s_mov_b32 vcc_lo, s2
	v_cvt_f64_f32_e32 v[12:13], v16
	v_div_fmas_f64 v[27:28], v[45:46], v[43:44], v[63:64]
	v_div_fixup_f64 v[16:17], v[17:18], v[35:36], v[19:20]
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_or_b32 s26, vcc_lo, s26
	v_cvt_f64_f32_e32 v[18:19], v31
	v_cvt_f64_f32_e32 v[31:32], v32
	v_cvt_f64_f32_e32 v[33:34], v33
	v_div_fixup_f64 v[14:15], v[14:15], s[14:15], v[57:58]
	v_div_fixup_f64 v[20:21], v[21:22], s[14:15], v[59:60]
	v_div_fixup_f64 v[22:23], v[23:24], s[14:15], v[67:68]
	v_div_fixup_f64 v[24:25], v[25:26], s[14:15], v[69:70]
	v_div_fixup_f64 v[26:27], v[27:28], s[14:15], v[71:72]
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_add_f64 v[14:15], v[16:17], v[29:30]
	v_add_f64 v[16:17], v[18:19], -v[22:23]
	v_add_f64 v[18:19], v[31:32], -v[24:25]
	v_add_f64 v[22:23], v[33:34], -v[26:27]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_cvt_f32_f64_e32 v0, v[14:15]
	v_cvt_f32_f64_e32 v14, v[16:17]
	v_cvt_f32_f64_e32 v15, v[18:19]
	v_cvt_f32_f64_e32 v16, v[22:23]
	v_cvt_f32_f64_e32 v12, v[12:13]
	global_store_b32 v[2:3], v0, off
	v_add_co_u32 v2, vcc_lo, v2, s22
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_store_b32 v[4:5], v12, off
	s_clause 0x2
	global_store_b32 v[6:7], v14, off
	global_store_b32 v[8:9], v15, off
	global_store_b32 v[10:11], v16, off
	s_and_not1_b32 exec_lo, exec_lo, s26
	s_cbranch_execnz .LBB4_2
.LBB4_3:                                ; %Flow122
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14calcDerivativeIfEvPT_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 94
		.amdhsa_next_free_sgpr 29
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14calcDerivativeIfEvPT_iii,"axG",@progbits,_Z14calcDerivativeIfEvPT_iii,comdat
.Lfunc_end4:
	.size	_Z14calcDerivativeIfEvPT_iii, .Lfunc_end4-_Z14calcDerivativeIfEvPT_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2840
; NumSgprs: 31
; NumVgprs: 94
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 31
; NumVGPRsForWavesPerEU: 94
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
	.protected	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii ; -- Begin function _Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.globl	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
	.p2align	8
	.type	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,@function
_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii: ; @_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[16:19], s[0:1], 0x18
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s2, 0xffff
	s_lshr_b32 s2, s18, 31
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_add_i32 s2, s18, s2
	s_mul_i32 s3, s17, s16
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, 1
	s_mul_i32 s2, s3, s2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB5_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s9, s[4:5], 0x0
	s_clause 0x1
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s3, s2, 31
	s_lshl_b32 s1, s2, 1
	s_lshl_b32 s17, s2, 2
	s_mul_i32 s16, s2, 3
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_add_u32 s18, s10, 4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_addc_u32 s19, s11, 0
	s_ashr_i32 s9, s8, 31
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_lshl_b64 s[12:13], s[2:3], 3
	s_lshl_b64 s[10:11], s[8:9], 3
	s_add_u32 s20, s4, s12
	s_addc_u32 s21, s5, s13
	s_lshl_b64 s[12:13], s[8:9], 2
	s_lshl_b64 s[14:15], s[2:3], 2
	s_mov_b32 s3, 0
.LBB5_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v6, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s20, v2
	v_add_nc_u32_e32 v10, s1, v1
	v_add_co_ci_u32_e32 v9, vcc_lo, s21, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, v4, s14
	v_add_co_ci_u32_e32 v13, vcc_lo, s15, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_nc_u32_e32 v14, s16, v1
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	global_load_b32 v0, v[12:13], off
	v_add_nc_u32_e32 v16, s17, v1
	v_lshlrev_b64 v[12:13], 3, v[10:11]
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[18:19], 3, v[14:15]
	v_add_co_u32 v12, vcc_lo, s4, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_u32 v10, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v11, vcc_lo
	v_add_co_u32 v18, vcc_lo, s4, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v19, vcc_lo
	v_add_co_u32 v14, vcc_lo, s6, v14
	v_lshlrev_b64 v[20:21], 3, v[16:17]
	v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	global_load_b64 v[18:19], v[18:19], off
	global_load_b32 v22, v[14:15], off
	v_add_co_u32 v20, vcc_lo, s4, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v21, vcc_lo
	v_add_co_u32 v16, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, s7, v17, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	global_load_b32 v23, v[10:11], off
	global_load_b32 v24, v[4:5], off
	global_load_b64 v[10:11], v[20:21], off
	global_load_b32 v16, v[16:17], off
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v14, vcc_lo, s18, v2
	v_add_co_ci_u32_e32 v15, vcc_lo, s19, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, s12
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	s_waitcnt vmcnt(7)
	v_mul_f32_e32 v8, v8, v0
	s_waitcnt vmcnt(5)
	v_dual_mul_f32 v0, v0, v9 :: v_dual_mul_f32 v17, v22, v18
	v_mul_f32_e32 v18, v22, v19
	v_cmp_le_i32_e64 s0, s2, v1
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v17, v23, v12
	v_fma_f32 v9, v23, -v13, -v18
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v8, v6, v24
	v_fmac_f32_e32 v0, v24, v7
	s_or_b32 s3, s0, s3
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v17, v16, v10
	v_fma_f32 v6, -v16, v11, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v7, v0, v17
	v_sub_f32_e32 v6, v8, v6
	global_store_b64 v[14:15], v[6:7], off offset:-4
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB5_2
.LBB5_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii,comdat
.Lfunc_end5:
	.size	_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii, .Lfunc_end5-_Z16variationFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 660
; NumSgprs: 24
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11mixing_stepIfEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z11mixing_stepIfEvPT_S1_S1_S0_iiid,comdat
	.protected	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid ; -- Begin function _Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.globl	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
	.p2align	8
	.type	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid,@function
_Z11mixing_stepIfEvPT_S1_S1_S0_iiid:    ; @_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x18
	s_add_u32 s2, s0, 48
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s16, s8, 0xffff
	s_mul_i32 s5, s6, s5
	v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
	s_mul_i32 s5, s5, s7
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB6_5
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s17, s[2:3], 0x0
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b64 s[6:7], s[0:1], 0x28
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s12, 0x9999999a
	s_mov_b32 s14, 0x66666666
	s_mov_b32 s13, 0x3fa99999
	s_mov_b32 s15, 0x3fee6666
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s16, s17, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s17, s16, 31
	s_lshl_b64 s[18:19], s[16:17], 2
.LBB6_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[6:7], v0, off
	v_cmpx_lt_f32_e32 0, v0
	s_cbranch_execz .LBB6_4
; %bb.3:                                ;   in Loop: Header=BB6_2 Depth=1
	v_add_co_u32 v6, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v3, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v6, s4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, 0x3fb8aa3b, v6
	v_fma_f32 v8, 0x3fb8aa3b, v6, -v7
	v_rndne_f32_e32 v9, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_sub_f32_e32 v7, v7, v9
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v6
	v_fmac_f32_e32 v8, 0x32a5705f, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v7, v7, v8
	v_cvt_i32_f32_e32 v8, v9
	v_exp_f32_e32 v7, v7
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v7, v7, v8
	v_cvt_f64_f32_e32 v[8:9], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, 0, v7, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v6
	v_cndmask_b32_e32 v6, 0x7f800000, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[6:7], v6
	v_mul_f64 v[6:7], v[6:7], s[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v6, v[6:7]
	v_cvt_f64_f32_e32 v[6:7], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], s[12:13]
	v_fma_f64 v[6:7], v[8:9], s[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[6:7]
	global_store_b32 v[4:5], v0, off
.LBB6_4:                                ;   in Loop: Header=BB6_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, s16, v1
	v_add_co_u32 v2, s0, v2, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, s19, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s5, v1
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB6_2
.LBB6_5:                                ; %Flow50
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mixing_stepIfEvPT_S1_S1_S0_iiid
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11mixing_stepIfEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z11mixing_stepIfEvPT_S1_S1_S0_iiid,comdat
.Lfunc_end6:
	.size	_Z11mixing_stepIfEvPT_S1_S1_S0_iiid, .Lfunc_end6-_Z11mixing_stepIfEvPT_S1_S1_S0_iiid
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16checkConvergenceIfEvPT_S1_S1_iii,"axG",@progbits,_Z16checkConvergenceIfEvPT_S1_S1_iii,comdat
	.protected	_Z16checkConvergenceIfEvPT_S1_S1_iii ; -- Begin function _Z16checkConvergenceIfEvPT_S1_S1_iii
	.globl	_Z16checkConvergenceIfEvPT_S1_S1_iii
	.p2align	8
	.type	_Z16checkConvergenceIfEvPT_S1_S1_iii,@function
_Z16checkConvergenceIfEvPT_S1_S1_iii:   ; @_Z16checkConvergenceIfEvPT_S1_S1_iii
; %bb.0:
	s_mov_b32 s2, s15
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x34
	s_load_b128 s[12:15], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_add_u32 s0, s0, 40
	s_addc_u32 s1, s1, 0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_mul_i32 s15, s13, s12
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_mul_i32 s15, s15, s14
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s15, v1
	s_cbranch_execz .LBB7_4
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s0, s3
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 2
.LBB7_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v5, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v3, vcc_lo
	v_add_nc_u32_e32 v1, s10, v1
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_cmp_le_i32_e64 s0, s15, v1
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 s1, s0, s1
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v5, v5, v6
	v_fmac_f32_e32 v4, v5, v5
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB7_2
; %bb.3:                                ; %Flow60
	s_or_b32 exec_lo, exec_lo, s1
.LBB7_4:                                ; %Flow61
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	v_lshlrev_b32_e32 v1, 2, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b32 v1, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB7_8
.LBB7_5:                                ; %.lr.ph39
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB7_7
; %bb.6:                                ;   in Loop: Header=BB7_5 Depth=1
	v_lshl_add_u32 v2, s0, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v2, v2, v3
	ds_store_b32 v1, v2
.LBB7_7:                                ;   in Loop: Header=BB7_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB7_5
.LBB7_8:                                ; %._crit_edge40
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB7_10
; %bb.9:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[2:3]
.LBB7_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16checkConvergenceIfEvPT_S1_S1_iii
		.amdhsa_group_segment_fixed_size 512
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16checkConvergenceIfEvPT_S1_S1_iii,"axG",@progbits,_Z16checkConvergenceIfEvPT_S1_S1_iii,comdat
.Lfunc_end7:
	.size	_Z16checkConvergenceIfEvPT_S1_S1_iii, .Lfunc_end7-_Z16checkConvergenceIfEvPT_S1_S1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 468
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 512 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11initDensityIdEvPT_iiidddd,"axG",@progbits,_Z11initDensityIdEvPT_iiidddd,comdat
	.protected	_Z11initDensityIdEvPT_iiidddd ; -- Begin function _Z11initDensityIdEvPT_iiidddd
	.globl	_Z11initDensityIdEvPT_iiidddd
	.p2align	8
	.type	_Z11initDensityIdEvPT_iiidddd,@function
_Z11initDensityIdEvPT_iiidddd:          ; @_Z11initDensityIdEvPT_iiidddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[16:19], s[0:1], 0x8
	s_add_u32 s12, s0, 56
	s_addc_u32 s13, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s19, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s19, v[0:1]
	s_mul_i32 s15, s18, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s14, s15, s16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB8_9
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[4:11], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[2:3], null, s[8:9], s[8:9], 1.0
	v_div_scale_f64 v[4:5], null, s[6:7], s[6:7], 1.0
	v_div_scale_f64 v[6:7], null, s[4:5], s[4:5], 1.0
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, s[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[8:9], v[2:3]
	v_rcp_f64_e32 v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[12:13], v[6:7]
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_div_scale_f64 v[14:15], s2, 1.0, s[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s3, 1.0, s[4:5], 1.0
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_mul_f64 v[18:19], v[20:21], v[8:9]
	v_mul_f64 v[22:23], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[24:25], v[16:17], v[12:13]
	v_fma_f64 v[2:3], -v[2:3], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], -v[4:5], v[22:23], v[14:15]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[18:19]
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[22:23]
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	v_div_fixup_f64 v[2:3], v[2:3], s[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[4:5], v[4:5], s[6:7], 1.0
	s_ashr_i32 s6, s15, 31
	s_ashr_i32 s7, s18, 31
	v_div_fixup_f64 v[6:7], v[6:7], s[4:5], 1.0
	s_add_i32 s2, s15, s6
	s_add_i32 s3, s18, s7
	s_xor_b32 s8, s2, s6
	s_xor_b32 s9, s3, s7
	v_cvt_f32_u32_e32 v0, s8
	v_cvt_f32_u32_e32 v8, s9
	s_load_b32 s2, s[12:13], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_sub_i32 s3, 0, s8
	s_sub_i32 s4, 0, s9
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s19
	v_cvt_i32_f64_e32 v9, v[2:3]
	v_rcp_iflag_f32_e32 v2, v8
	v_cvt_i32_f64_e32 v4, v[4:5]
	v_cvt_i32_f64_e32 v5, v[6:7]
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v10, v2
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_lo_u32 v6, s4, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v12, v10, v6
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_mov_b32 s1, 0
	v_lshlrev_b32_e32 v6, 1, v4
	v_lshlrev_b32_e32 v7, 1, v5
	v_cvt_u32_f32_e32 v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s3, v8
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[4:5], s[2:3], 3
	s_sub_i32 s3, 0, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v11, v8, v0
	v_lshlrev_b32_e32 v0, 1, v9
	v_add_nc_u32_e32 v9, v10, v12
	v_sub_nc_u32_e32 v12, s16, v7
	v_sub_nc_u32_e32 v10, s18, v0
	v_add_nc_u32_e32 v8, v8, v11
	v_sub_nc_u32_e32 v11, s17, v6
.LBB8_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v1, v4
	v_xor_b32_e32 v5, v5, v4
	v_xor_b32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v13, v5, v8
	v_mul_lo_u32 v14, v13, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v5, v14
	v_subrev_nc_u32_e32 v15, s8, v5
	v_cmp_le_u32_e32 vcc_lo, s8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v15 :: v_dual_add_nc_u32 v14, 1, v13
	v_cndmask_b32_e32 v13, v13, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s8, v5
	v_add_nc_u32_e32 v14, 1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v13, v14, vcc_lo
	v_xor_b32_e32 v5, v5, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v13, v5, v4
	v_cmp_ge_i32_e32 vcc_lo, v13, v7
	v_cmp_lt_i32_e64 s0, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_xor_b32 s12, s0, -1
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB8_6
; %bb.3:                                ;   in Loop: Header=BB8_2 Depth=1
	v_mad_u64_u32 v[4:5], null, s3, v13, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v13, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v13, v13, v5
	v_xor_b32_e32 v5, s7, v5
	v_mul_hi_u32 v14, v13, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v15, v14, s9
	v_sub_nc_u32_e32 v13, v13, v15
	v_add_nc_u32_e32 v15, 1, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v16, s9, v13
	v_cmp_le_u32_e32 vcc_lo, s9, v13
	v_dual_cndmask_b32 v14, v14, v15 :: v_dual_cndmask_b32 v13, v13, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v15, 1, v14
	v_cmp_le_u32_e32 vcc_lo, s9, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v13, v14, v15, vcc_lo
	v_xor_b32_e32 v13, v13, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v13, v5
	v_cmp_ge_i32_e32 vcc_lo, v5, v6
	v_cmp_lt_i32_e64 s0, v5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_xor_b32 s15, s0, -1
	s_and_saveexec_b32 s16, s0
; %bb.4:                                ;   in Loop: Header=BB8_2 Depth=1
	v_mul_lo_u32 v5, v5, s18
	s_and_not1_b32 s15, s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v4, v5
	v_cmp_lt_i32_e32 vcc_lo, v4, v0
	v_cmp_ge_i32_e64 s0, v4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s15, s0
; %bb.5:                                ; %Flow82
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s12, exec_lo
	s_and_b32 s12, s15, exec_lo
	s_or_b32 s12, s0, s12
.LBB8_6:                                ; %Flow
                                        ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_dual_mov_b32 v4, s10 :: v_dual_mov_b32 v5, s11
	s_and_saveexec_b32 s0, s12
; %bb.7:                                ;   in Loop: Header=BB8_2 Depth=1
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
; %bb.8:                                ;   in Loop: Header=BB8_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, s2, v1
	global_store_b64 v[2:3], v[4:5], off
	v_add_co_u32 v2, s0, v2, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s14, v1
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB8_2
.LBB8_9:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11initDensityIdEvPT_iiidddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11initDensityIdEvPT_iiidddd,"axG",@progbits,_Z11initDensityIdEvPT_iiidddd,comdat
.Lfunc_end8:
	.size	_Z11initDensityIdEvPT_iiidddd, .Lfunc_end8-_Z11initDensityIdEvPT_iiidddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1072
; NumSgprs: 22
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z19initWeightFunctionsIdEvPT_iiiddd,"axG",@progbits,_Z19initWeightFunctionsIdEvPT_iiiddd,comdat
	.protected	_Z19initWeightFunctionsIdEvPT_iiiddd ; -- Begin function _Z19initWeightFunctionsIdEvPT_iiiddd
	.globl	_Z19initWeightFunctionsIdEvPT_iiiddd
	.p2align	8
	.type	_Z19initWeightFunctionsIdEvPT_iiiddd,@function
_Z19initWeightFunctionsIdEvPT_iiiddd:   ; @_Z19initWeightFunctionsIdEvPT_iiiddd
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s2, s[0:1], 0x3c
	s_add_u32 s16, s0, 48
	s_addc_u32 s17, s1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s6, 31
	s_and_b32 s18, s2, 0xffff
	s_add_i32 s2, s6, s3
	v_mad_u64_u32 v[1:2], null, s15, s18, v[0:1]
	s_ashr_i32 s33, s2, 1
	s_mov_b32 s3, exec_lo
	s_add_i32 s33, s33, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s33, s5
	s_mul_i32 s2, s15, s4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB9_19
; %bb.1:                                ; %.lr.ph
	v_cvt_f64_i32_e32 v[7:8], s4
	v_cvt_f64_i32_e32 v[9:10], s5
	v_cvt_f64_i32_e32 v[11:12], s6
	s_mov_b32 s7, 0x402921fb
	s_mov_b32 s6, 0x54442d18
	s_ashr_i32 s58, s15, 31
	s_ashr_i32 s59, s33, 31
	s_add_i32 s3, s15, s58
	s_add_i32 s14, s33, s59
	s_xor_b32 s60, s3, s58
	s_xor_b32 s61, s14, s59
	v_cvt_f32_u32_e32 v0, s60
	s_ashr_i32 s3, s2, 31
	s_mul_i32 s19, s5, s4
	s_sub_i32 s63, 0, s15
	s_mul_i32 s66, s19, s33
	v_rcp_iflag_f32_e32 v0, v0
	s_sub_i32 s19, 0, s61
	s_mov_b32 s24, 0x6dc9c883
	s_mov_b32 s26, 0x33145c00
	s_mov_b32 s28, 0x252049c0
	s_mov_b32 s30, 0x9037ab78
	s_mov_b32 s34, 0x46cc5e42
	s_mov_b32 s36, 0xa17f65f6
	s_mov_b32 s38, 0x19f4ec90
	s_mov_b32 s40, 0x16c16967
	s_mov_b32 s42, 0x55555555
	s_mov_b32 s44, 0xb42fdfa7
	s_mov_b32 s46, 0xf9a43bb8
	s_mov_b32 s48, 0x796cde01
	s_mov_b32 s50, 0x19e83e5c
	s_mov_b32 s52, 0x11110bb3
	s_lshl_b32 s62, s2, 2
	s_mov_b32 s14, 0
	s_lshl_b32 s65, s66, 1
	s_mul_i32 s66, s66, 3
	s_mov_b32 s22, 0x33145c07
	s_mov_b32 s25, 0x3fe45f30
	s_mov_b32 s27, 0xbc91a626
	v_mul_f64 v[2:3], v[7:8], v[9:10]
	s_mov_b32 s29, 0xb97b839a
	s_mov_b32 s31, 0x3e21eeb6
	s_mov_b32 s35, 0xbda907db
	s_mov_b32 s37, 0xbe927e4f
	s_mov_b32 s39, 0x3efa01a0
	s_mov_b32 s41, 0xbf56c16c
	s_mov_b32 s43, 0x3fa55555
	s_mov_b32 s45, 0xbe5ae600
	s_mov_b32 s47, 0x3de5e0b2
	s_mov_b32 s49, 0x3ec71de3
	s_mov_b32 s51, 0xbf2a01a0
	s_mov_b32 s53, 0x3f811111
	s_mov_b32 s55, 0xbff921fb
	s_mov_b32 s57, 0xbfc55555
	v_mov_b32_e32 v43, 0xc01921fb
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[11:12]
	v_div_scale_f64 v[4:5], null, v[2:3], v[2:3], 1.0
	v_div_scale_f64 v[17:18], vcc_lo, 1.0, v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[4:5], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[4:5], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	v_fma_f64 v[4:5], -v[4:5], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[13:14], v[15:16]
	v_div_fixup_f64 v[2:3], v[4:5], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[3:4], v[2:3], s[6:7]
	s_clause 0x2
	s_load_b64 s[12:13], s[0:1], 0x0
	s_load_b128 s[8:11], s[0:1], 0x18
	s_load_b64 s[0:1], s[0:1], 0x28
	s_load_b32 s7, s[16:17], 0x0
	v_cvt_f32_u32_e32 v2, s61
	s_lshr_b32 s16, s4, 31
	s_lshr_b32 s17, s5, 31
	s_add_i32 s15, s4, s16
	s_add_i32 s20, s5, s17
	s_lshl_b64 s[16:17], s[2:3], 3
	s_ashr_i32 s3, s15, 1
	s_sub_i32 s15, 0, s60
	s_ashr_i32 s64, s20, 1
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[7:8], v[7:8], s[8:9]
	v_mul_f64 v[9:10], v[9:10], s[10:11]
	v_mul_f64 v[11:12], v[11:12], s[0:1]
	s_mul_i32 s18, s7, s18
	s_mov_b32 s7, 0x401921fb
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	v_div_scale_f64 v[5:6], null, 0x40080000, 0x40080000, v[3:4]
	v_div_scale_f64 v[17:18], vcc_lo, v[3:4], 0x40080000, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[13:14], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[15:16], -v[5:6], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[5:6], v[13:14], 1.0
	v_fma_f64 v[13:14], v[13:14], v[15:16], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[15:16], v[17:18], v[13:14]
	v_fma_f64 v[5:6], -v[5:6], v[15:16], v[17:18]
	v_rcp_iflag_f32_e32 v17, v2
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[13:14], v[5:6], v[13:14], v[15:16]
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v17
	v_cvt_u32_f32_e32 v0, v0
	v_cvt_u32_f32_e32 v15, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v16, s15, v0
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	v_mul_lo_u32 v17, s19, v15
	s_ashr_i32 s19, s18, 31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s12, v5
	v_mul_hi_u32 v2, v0, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s13, v6, vcc_lo
	v_mul_hi_u32 v16, v15, v17
	v_mov_b32_e32 v17, 0
	s_lshl_b64 s[20:21], s[18:19], 3
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v0, v0, v2
	v_dual_mov_b32 v15, 0x54442d18 :: v_dual_add_nc_u32 v2, v15, v16
	v_div_fixup_f64 v[13:14], v[13:14], 0x40080000, v[3:4]
.LBB9_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v16, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v18, v1, v16
	v_xor_b32_e32 v18, v18, v16
	v_xor_b32_e32 v16, s58, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v19, v18, v0
	v_mul_lo_u32 v20, v19, s60
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, v18, v20
	v_add_nc_u32_e32 v20, 1, v19
	v_subrev_nc_u32_e32 v21, s60, v18
	v_cmp_le_u32_e32 vcc_lo, s60, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v19, v19, v20 :: v_dual_cndmask_b32 v18, v18, v21
	v_add_nc_u32_e32 v20, 1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s60, v18
	v_cndmask_b32_e32 v18, v19, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v18, v18, v16
	v_sub_nc_u32_e32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[18:19], null, s63, v16, v[1:2]
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v20, v18, v19
	v_xor_b32_e32 v20, v20, v19
	v_xor_b32_e32 v19, s59, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v21, v20, v2
	v_mul_lo_u32 v22, v21, s61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v20, v20, v22
	v_add_nc_u32_e32 v22, 1, v21
	v_subrev_nc_u32_e32 v23, s61, v20
	v_cmp_le_u32_e32 vcc_lo, s61, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v21, v21, v22 :: v_dual_cndmask_b32 v20, v20, v23
	v_add_nc_u32_e32 v22, 1, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s61, v20
	v_cndmask_b32_e32 v20, v21, v22, vcc_lo
	v_sub_nc_u32_e32 v21, s4, v16
	v_cmp_lt_i32_e32 vcc_lo, s3, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v20, v20, v19
	v_cndmask_b32_e32 v16, v16, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v23, v20, v19
	v_cvt_f64_i32_e32 v[19:20], v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v21, s5, v23
	v_cmp_lt_i32_e64 s0, s64, v23
	v_cndmask_b32_e64 v16, v23, v21, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[21:22], v16
	v_cndmask_b32_e32 v16, 0x401921fb, v43, vcc_lo
	v_mul_f64 v[19:20], v[15:16], v[19:20]
	v_cndmask_b32_e64 v16, 0x401921fb, v43, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[21:22], v[15:16], v[21:22]
	v_mul_lo_u32 v16, v23, s33
	v_sub_nc_u32_e32 v16, v18, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[23:24], v16
	v_div_scale_f64 v[25:26], null, v[7:8], v[7:8], v[19:20]
	v_div_scale_f64 v[27:28], null, v[9:10], v[9:10], v[21:22]
	v_mul_f64 v[29:30], v[23:24], s[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[23:24], v[25:26]
	v_rcp_f64_e32 v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_scale_f64 v[33:34], null, v[11:12], v[11:12], v[29:30]
	v_div_scale_f64 v[48:49], s1, v[29:30], v[11:12], v[29:30]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[25:26], v[23:24], 1.0
	v_fma_f64 v[37:38], -v[27:28], v[31:32], 1.0
	v_rcp_f64_e32 v[39:40], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[23:24], v[35:36], v[23:24]
	v_fma_f64 v[31:32], v[31:32], v[37:38], v[31:32]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[35:36], -v[33:34], v[39:40], 1.0
	v_fma_f64 v[37:38], -v[25:26], v[23:24], 1.0
	v_fma_f64 v[41:42], -v[27:28], v[31:32], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[35:36], v[39:40], v[35:36], v[39:40]
	v_div_scale_f64 v[39:40], vcc_lo, v[19:20], v[7:8], v[19:20]
	v_fma_f64 v[23:24], v[23:24], v[37:38], v[23:24]
	v_div_scale_f64 v[37:38], s0, v[21:22], v[9:10], v[21:22]
	v_fma_f64 v[31:32], v[31:32], v[41:42], v[31:32]
	v_fma_f64 v[41:42], -v[33:34], v[35:36], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[44:45], v[39:40], v[23:24]
	v_mul_f64 v[46:47], v[37:38], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[35:36], v[35:36], v[41:42], v[35:36]
	v_fma_f64 v[25:26], -v[25:26], v[44:45], v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], -v[27:28], v[46:47], v[37:38]
	v_mul_f64 v[37:38], v[48:49], v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[23:24], v[25:26], v[23:24], v[44:45]
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, exec_lo
	v_div_fmas_f64 v[25:26], v[27:28], v[31:32], v[46:47]
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[27:28], -v[33:34], v[37:38], v[48:49]
	v_div_fixup_f64 v[23:24], v[23:24], v[7:8], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[21:22], v[25:26], v[9:10], v[21:22]
	v_div_fmas_f64 v[18:19], v[27:28], v[35:36], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[25:26], v[21:22], v[21:22]
	v_div_fixup_f64 v[19:20], v[18:19], v[11:12], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[23:24], v[23:24], v[25:26]
	v_fma_f64 v[25:26], v[19:20], v[19:20], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[25:26]
	v_cndmask_b32_e64 v16, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v16, 8, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[25:26], v[25:26], v16
	v_cndmask_b32_e64 v16, 0, 0xffffff80, vcc_lo
	v_rsq_f64_e32 v[27:28], v[25:26]
	v_cmp_class_f64_e64 vcc_lo, v[25:26], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[29:30], v[25:26], v[27:28]
	v_mul_f64 v[27:28], v[27:28], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[27:28], v[29:30], 0.5
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_fma_f64 v[27:28], v[27:28], v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[29:30], v[29:30], v[25:26]
	v_fma_f64 v[29:30], v[31:32], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[29:30], v[29:30], v[25:26]
	v_fma_f64 v[27:28], v[31:32], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[27:28], v[27:28], v16
	v_dual_cndmask_b32 v26, v28, v26 :: v_dual_cndmask_b32 v25, v27, v25
                                        ; implicit-def: $vgpr27_vgpr28
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[25:26]
	s_xor_b32 s15, exec_lo, s0
	s_cbranch_execz .LBB9_16
; %bb.3:                                ;   in Loop: Header=BB9_2 Depth=1
	v_cmp_ngt_f64_e64 s67, 0x41d00000, |v[25:26]|
	v_trig_preop_f64 v[31:32], |v[25:26]|, 0
	v_trig_preop_f64 v[29:30], |v[25:26]|, 1
	v_ldexp_f64 v[33:34], |v[25:26]|, 0xffffff80
	v_trig_preop_f64 v[27:28], |v[25:26]|, 2
	v_and_b32_e32 v16, 0x7fffffff, v26
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr35_vgpr36
                                        ; implicit-def: $vgpr37_vgpr38
	s_and_saveexec_b32 s0, s67
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB9_5
; %bb.4:                                ;   in Loop: Header=BB9_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[25:26]|
	s_mov_b32 s8, s6
	s_mov_b32 s23, s11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v36, v16, v34 :: v_dual_cndmask_b32 v35, v25, v33
	v_mul_f64 v[37:38], v[31:32], v[35:36]
	v_mul_f64 v[39:40], v[29:30], v[35:36]
	v_mul_f64 v[52:53], v[27:28], v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[41:42], v[31:32], v[35:36], -v[37:38]
	v_fma_f64 v[54:55], v[29:30], v[35:36], -v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[35:36], v[27:28], v[35:36], -v[52:53]
	v_add_f64 v[44:45], v[39:40], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[44:45], -v[39:40]
	v_add_f64 v[50:51], v[37:38], v[44:45]
	v_add_f64 v[48:49], v[44:45], -v[46:47]
	v_add_f64 v[41:42], v[41:42], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[46:47], v[50:51], -2
	v_add_f64 v[37:38], v[50:51], -v[37:38]
	v_add_f64 v[39:40], v[39:40], -v[48:49]
	v_add_f64 v[48:49], v[52:53], v[54:55]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[46:47]|
	v_add_f64 v[37:38], v[44:45], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[41:42], v[39:40]
	v_fract_f64_e32 v[41:42], v[46:47]
	v_add_f64 v[44:45], v[48:49], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v42, 0, v42 :: v_dual_cndmask_b32 v41, 0, v41
	v_ldexp_f64 v[41:42], v[41:42], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[37:38], v[44:45]
	v_add_f64 v[56:57], v[44:45], -v[48:49]
	v_add_f64 v[50:51], v[46:47], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[62:63], v[44:45], -v[56:57]
	v_add_f64 v[39:40], v[39:40], -v[56:57]
	v_add_f64 v[37:38], v[46:47], -v[37:38]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[50:51]
	v_add_f64 v[50:51], v[48:49], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[37:38], v[44:45], -v[37:38]
	v_cndmask_b32_e64 v18, 0, 0x40100000, vcc_lo
	v_add_f64 v[60:61], v[48:49], -v[50:51]
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	v_add_f64 v[48:49], v[48:49], -v[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[41:42], v[41:42], v[17:18]
	v_add_f64 v[54:55], v[52:53], -v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], v[48:49]
	v_add_f64 v[58:59], v[46:47], v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[54:55]
	v_cvt_i32_f64_e32 v18, v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[50:51], v[39:40]
	v_cvt_f64_i32_e32 v[56:57], v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], v[39:40]
	v_add_f64 v[41:42], v[41:42], -v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[37:38], v[35:36]
	v_add_f64 v[48:49], v[46:47], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[48:49], -v[41:42]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[48:49]
	v_add_f64 v[37:38], v[46:47], -v[39:40]
	v_add_co_ci_u32_e64 v44, s0, 0, v18, vcc_lo
	v_cndmask_b32_e64 v18, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_add_f64 v[37:38], v[48:49], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[37:38], v[35:36]
	v_mul_f64 v[41:42], v[39:40], s[8:9]
	v_add_f64 v[37:38], v[39:40], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[45:46], v[39:40], s[8:9], -v[41:42]
	v_add_f64 v[35:36], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[37:38], v[39:40], s[22:23], v[45:46]
	v_fma_f64 v[37:38], v[35:36], s[8:9], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[41:42], v[37:38]
	v_add_f64 v[39:40], v[35:36], -v[41:42]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[37:38], -v[39:40]
.LBB9_5:                                ; %Flow150
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB9_7
; %bb.6:                                ;   in Loop: Header=BB9_2 Depth=1
	v_mul_f64 v[35:36], |v[25:26]|, s[24:25]
	s_mov_b32 s54, s6
	s_mov_b32 s10, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[39:40], v[35:36]
	v_fma_f64 v[35:36], v[39:40], s[54:55], |v[25:26]|
	v_mul_f64 v[37:38], v[39:40], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[39:40], s[26:27], v[35:36]
	v_add_f64 v[41:42], v[35:36], v[37:38]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[35:36], -v[41:42]
	v_add_f64 v[41:42], v[41:42], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], v[37:38]
	v_fma_f64 v[37:38], v[39:40], s[10:11], v[37:38]
	v_add_f64 v[35:36], v[41:42], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[35:36], -v[37:38]
	v_fma_f64 v[37:38], v[39:40], s[28:29], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[44:45], v[37:38]
	v_add_f64 v[41:42], v[35:36], -v[44:45]
	v_cvt_i32_f64_e32 v44, v[39:40]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[41:42]
.LBB9_7:                                ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr41_vgpr42
	s_and_saveexec_b32 s0, s67
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB9_9
; %bb.8:                                ;   in Loop: Header=BB9_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[25:26]|
	s_mov_b32 s8, s6
	s_mov_b32 s23, s11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v40, v16, v34 :: v_dual_cndmask_b32 v39, v25, v33
	v_mul_f64 v[41:42], v[31:32], v[39:40]
	v_mul_f64 v[45:46], v[29:30], v[39:40]
	v_mul_f64 v[57:58], v[27:28], v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[47:48], v[31:32], v[39:40], -v[41:42]
	v_fma_f64 v[59:60], v[29:30], v[39:40], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[39:40], v[27:28], v[39:40], -v[57:58]
	v_add_f64 v[49:50], v[45:46], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[49:50], -v[45:46]
	v_add_f64 v[55:56], v[41:42], v[49:50]
	v_add_f64 v[53:54], v[49:50], -v[51:52]
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[51:52], v[55:56], -2
	v_add_f64 v[41:42], v[55:56], -v[41:42]
	v_add_f64 v[45:46], v[45:46], -v[53:54]
	v_add_f64 v[53:54], v[57:58], v[59:60]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[51:52]|
	v_add_f64 v[41:42], v[49:50], -v[41:42]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[47:48], v[45:46]
	v_fract_f64_e32 v[47:48], v[51:52]
	v_add_f64 v[49:50], v[53:54], v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v48, 0, v48 :: v_dual_cndmask_b32 v47, 0, v47
	v_ldexp_f64 v[47:48], v[47:48], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[41:42], v[49:50]
	v_add_f64 v[61:62], v[49:50], -v[53:54]
	v_add_f64 v[55:56], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[67:68], v[49:50], -v[61:62]
	v_add_f64 v[45:46], v[45:46], -v[61:62]
	v_add_f64 v[41:42], v[51:52], -v[41:42]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[55:56]
	v_add_f64 v[55:56], v[53:54], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[41:42], v[49:50], -v[41:42]
	v_cndmask_b32_e64 v18, 0, 0x40100000, vcc_lo
	v_add_f64 v[65:66], v[53:54], -v[55:56]
	v_add_f64 v[55:56], v[59:60], -v[55:56]
	v_add_f64 v[53:54], v[53:54], -v[67:68]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[47:48], v[47:48], v[17:18]
	v_add_f64 v[59:60], v[57:58], -v[65:66]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[45:46], v[45:46], v[53:54]
	v_add_f64 v[63:64], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[55:56], v[59:60]
	v_cvt_i32_f64_e32 v18, v[63:64]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[55:56], v[45:46]
	v_cvt_f64_i32_e32 v[61:62], v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[45:46]
	v_add_f64 v[47:48], v[47:48], -v[61:62]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[41:42], v[39:40]
	v_add_f64 v[53:54], v[51:52], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[45:46], v[53:54], -v[47:48]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[53:54]
	v_add_f64 v[41:42], v[51:52], -v[45:46]
	v_add_co_ci_u32_e64 v45, s0, 0, v18, vcc_lo
	v_cndmask_b32_e64 v18, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_add_f64 v[41:42], v[53:54], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[41:42], v[39:40]
	v_mul_f64 v[48:49], v[46:47], s[8:9]
	v_add_f64 v[41:42], v[46:47], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[50:51], v[46:47], s[8:9], -v[48:49]
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[46:47], s[22:23], v[50:51]
	v_fma_f64 v[41:42], v[39:40], s[8:9], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[48:49], v[41:42]
	v_add_f64 v[46:47], v[39:40], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[46:47]
.LBB9_9:                                ; %Flow149
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB9_11
; %bb.10:                               ;   in Loop: Header=BB9_2 Depth=1
	v_mul_f64 v[39:40], |v[25:26]|, s[24:25]
	s_mov_b32 s54, s6
	s_mov_b32 s10, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[45:46], v[39:40]
	v_fma_f64 v[39:40], v[45:46], s[54:55], |v[25:26]|
	v_mul_f64 v[41:42], v[45:46], s[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[49:50], v[45:46], s[26:27], v[39:40]
	v_add_f64 v[47:48], v[39:40], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[39:40], -v[47:48]
	v_add_f64 v[47:48], v[47:48], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], v[41:42]
	v_fma_f64 v[41:42], v[45:46], s[10:11], v[41:42]
	v_add_f64 v[39:40], v[47:48], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[41:42]
	v_fma_f64 v[41:42], v[45:46], s[28:29], v[39:40]
	v_cvt_i32_f64_e32 v45, v[45:46]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[49:50], v[41:42]
	v_add_f64 v[47:48], v[39:40], -v[49:50]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[41:42], v[41:42], -v[47:48]
.LBB9_11:                               ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[46:47], v[35:36], v[35:36]
	v_mul_f64 v[48:49], v[39:40], v[39:40]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[66:67], v[37:38], 0.5
	v_mul_f64 v[72:73], v[41:42], 0.5
	s_mov_b32 s56, s42
	v_cmp_class_f64_e64 s0, v[25:26], 0x1f8
	v_and_b32_e32 v18, 1, v44
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v18
	v_fma_f64 v[50:51], v[46:47], s[46:47], s[44:45]
	v_fma_f64 v[52:53], v[48:49], s[46:47], s[44:45]
	v_fma_f64 v[54:55], v[46:47], s[34:35], s[30:31]
	v_mul_f64 v[56:57], v[46:47], 0.5
	v_fma_f64 v[58:59], v[48:49], s[34:35], s[30:31]
	v_mul_f64 v[60:61], v[48:49], 0.5
	v_mul_f64 v[68:69], v[35:36], -v[46:47]
	v_mul_f64 v[74:75], v[39:40], -v[48:49]
	v_fma_f64 v[50:51], v[46:47], v[50:51], s[48:49]
	v_fma_f64 v[52:53], v[48:49], v[52:53], s[48:49]
	v_fma_f64 v[54:55], v[46:47], v[54:55], s[36:37]
	v_add_f64 v[62:63], -v[56:57], 1.0
	v_fma_f64 v[58:59], v[48:49], v[58:59], s[36:37]
	v_add_f64 v[64:65], -v[60:61], 1.0
	v_fma_f64 v[50:51], v[46:47], v[50:51], s[50:51]
	v_fma_f64 v[52:53], v[48:49], v[52:53], s[50:51]
	v_fma_f64 v[54:55], v[46:47], v[54:55], s[38:39]
	v_add_f64 v[70:71], -v[62:63], 1.0
	v_fma_f64 v[58:59], v[48:49], v[58:59], s[38:39]
	v_add_f64 v[76:77], -v[64:65], 1.0
	v_fma_f64 v[50:51], v[46:47], v[50:51], s[52:53]
	v_fma_f64 v[52:53], v[48:49], v[52:53], s[52:53]
	v_fma_f64 v[54:55], v[46:47], v[54:55], s[40:41]
	v_add_f64 v[56:57], v[70:71], -v[56:57]
	v_fma_f64 v[58:59], v[48:49], v[58:59], s[40:41]
	v_add_f64 v[60:61], v[76:77], -v[60:61]
	v_fma_f64 v[50:51], v[68:69], v[50:51], v[66:67]
	v_fma_f64 v[52:53], v[74:75], v[52:53], v[72:73]
	v_mul_f64 v[66:67], v[46:47], v[46:47]
	v_fma_f64 v[54:55], v[46:47], v[54:55], s[42:43]
	v_fma_f64 v[56:57], v[35:36], -v[37:38], v[56:57]
	v_fma_f64 v[37:38], v[46:47], v[50:51], -v[37:38]
	v_fma_f64 v[46:47], v[48:49], v[52:53], -v[41:42]
	v_mul_f64 v[50:51], v[48:49], v[48:49]
	v_fma_f64 v[48:49], v[48:49], v[58:59], s[42:43]
	v_fma_f64 v[41:42], v[39:40], -v[41:42], v[60:61]
	v_fma_f64 v[52:53], v[66:67], v[54:55], v[56:57]
	v_fma_f64 v[37:38], v[68:69], s[56:57], v[37:38]
	v_fma_f64 v[46:47], v[74:75], s[56:57], v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[41:42], v[50:51], v[48:49], v[41:42]
	v_add_f64 v[48:49], v[62:63], v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[35:36], -v[37:38]
	v_add_f64 v[37:38], v[39:40], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[39:40], v[64:65], v[41:42]
	v_and_b32_e32 v41, 1, v45
	v_lshlrev_b32_e32 v42, 30, v45
	v_cndmask_b32_e32 v36, v49, v36, vcc_lo
	v_dual_cndmask_b32 v18, v48, v35 :: v_dual_lshlrev_b32 v35, 30, v44
	v_xor_b32_e32 v38, 0x80000000, v38
	v_cmp_eq_u32_e64 s1, 0, v41
	v_and_b32_e32 v41, 0x80000000, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v35, v35, v26
	v_cndmask_b32_e64 v38, v38, v40, s1
	v_cndmask_b32_e64 v37, v37, v39, s1
	v_mul_f64 v[39:40], v[25:26], v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_and_b32_e32 v35, 0x80000000, v35
	v_xor_b32_e32 v38, v38, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v37, 0, v37, s0
	v_xor_b32_e32 v36, v36, v35
	v_cndmask_b32_e64 v35, 0, v18, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v38, 0x7ff80000, v38, s0
	v_cndmask_b32_e64 v36, 0x7ff80000, v36, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[35:36], -v[25:26], v[37:38], v[35:36]
	v_mul_f64 v[37:38], v[25:26], v[39:40]
	v_mul_f64 v[35:36], v[3:4], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[39:40], null, v[37:38], v[37:38], v[35:36]
	v_rcp_f64_e32 v[41:42], v[39:40]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[44:45], -v[39:40], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[41:42], v[44:45], v[41:42]
	v_fma_f64 v[44:45], -v[39:40], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[41:42], v[44:45], v[41:42]
	v_div_scale_f64 v[44:45], vcc_lo, v[35:36], v[37:38], v[35:36]
	v_mul_f64 v[46:47], v[44:45], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], -v[39:40], v[46:47], v[44:45]
	v_div_fmas_f64 v[39:40], v[39:40], v[41:42], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_div_fixup_f64 v[35:36], v[39:40], v[37:38], v[35:36]
                                        ; implicit-def: $vgpr39
                                        ; implicit-def: $vgpr37_vgpr38
	global_store_b64 v[5:6], v[35:36], off
                                        ; implicit-def: $vgpr35_vgpr36
	s_and_saveexec_b32 s1, s67
	s_xor_b32 s10, exec_lo, s1
	s_cbranch_execz .LBB9_13
; %bb.12:                               ;   in Loop: Header=BB9_2 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[25:26]|
	s_mov_b32 s8, s6
	s_mov_b32 s23, s11
	v_dual_cndmask_b32 v34, v16, v34 :: v_dual_cndmask_b32 v33, v25, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[35:36], v[31:32], v[33:34]
	v_mul_f64 v[37:38], v[29:30], v[33:34]
	v_mul_f64 v[48:49], v[27:28], v[33:34]
	v_fma_f64 v[31:32], v[31:32], v[33:34], -v[35:36]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[29:30], v[29:30], v[33:34], -v[37:38]
	v_fma_f64 v[27:28], v[27:28], v[33:34], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[37:38], v[31:32]
	v_add_f64 v[41:42], v[39:40], -v[37:38]
	v_add_f64 v[46:47], v[35:36], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[39:40], -v[41:42]
	v_add_f64 v[31:32], v[31:32], -v[41:42]
	v_ldexp_f64 v[41:42], v[46:47], -2
	v_add_f64 v[35:36], v[46:47], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[37:38], -v[44:45]
	v_add_f64 v[44:45], v[48:49], v[29:30]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[41:42]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[35:36], v[39:40], -v[35:36]
	v_add_f64 v[31:32], v[31:32], v[37:38]
	v_fract_f64_e32 v[37:38], v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[44:45], v[31:32]
	v_dual_cndmask_b32 v38, 0, v38 :: v_dual_cndmask_b32 v37, 0, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[37:38], v[37:38], 2
	v_add_f64 v[41:42], v[35:36], v[39:40]
	v_add_f64 v[50:51], v[39:40], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[46:47], v[41:42], v[37:38]
	v_add_f64 v[56:57], v[39:40], -v[50:51]
	v_add_f64 v[31:32], v[31:32], -v[50:51]
	v_add_f64 v[33:34], v[41:42], -v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[46:47]
	v_add_f64 v[46:47], v[44:45], -v[48:49]
	v_add_f64 v[33:34], v[39:40], -v[33:34]
	v_cndmask_b32_e64 v18, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[54:55], v[44:45], -v[46:47]
	v_add_f64 v[29:30], v[29:30], -v[46:47]
	v_add_f64 v[44:45], v[44:45], -v[56:57]
	v_add_f64 v[37:38], v[37:38], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[46:47], v[48:49], -v[54:55]
	v_add_f64 v[31:32], v[31:32], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[52:53], v[41:42], v[37:38]
	v_add_f64 v[29:30], v[29:30], v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v16, v[52:53]
	v_add_f64 v[29:30], v[29:30], v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[50:51], v16
	v_add_f64 v[27:28], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[37:38], v[37:38], -v[50:51]
	v_add_f64 v[27:28], v[33:34], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[41:42], v[37:38]
	v_add_f64 v[29:30], v[31:32], -v[37:38]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[41:42], -v[29:30]
	v_cndmask_b32_e64 v18, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v39, s1, 0, v16, vcc_lo
	v_add_f64 v[27:28], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[31:32], -v[17:18]
	v_add_f64 v[31:32], v[29:30], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[33:34], v[31:32], s[8:9]
	v_add_f64 v[29:30], v[31:32], -v[29:30]
	v_fma_f64 v[35:36], v[31:32], s[8:9], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[27:28], -v[29:30]
	v_fma_f64 v[29:30], v[31:32], s[22:23], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], v[27:28], s[8:9], v[29:30]
	v_add_f64 v[35:36], v[33:34], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[35:36], -v[33:34]
	v_add_f64 v[37:38], v[27:28], -v[29:30]
.LBB9_13:                               ; %Flow
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB9_15
; %bb.14:                               ;   in Loop: Header=BB9_2 Depth=1
	v_mul_f64 v[27:28], |v[25:26]|, s[24:25]
	s_mov_b32 s54, s6
	s_mov_b32 s10, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[27:28], v[27:28]
	v_fma_f64 v[29:30], v[27:28], s[54:55], |v[25:26]|
	v_mul_f64 v[31:32], v[27:28], s[26:27]
	v_cvt_i32_f64_e32 v39, v[27:28]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[37:38], v[27:28], s[26:27], v[29:30]
	v_add_f64 v[33:34], v[29:30], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[29:30], -v[33:34]
	v_add_f64 v[33:34], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[29:30], v[31:32]
	v_fma_f64 v[31:32], v[27:28], s[10:11], v[31:32]
	v_add_f64 v[29:30], v[33:34], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], -v[31:32]
	v_fma_f64 v[29:30], v[27:28], s[28:29], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[35:36], v[37:38], v[29:30]
	v_add_f64 v[31:32], v[35:36], -v[37:38]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[37:38], v[29:30], -v[31:32]
.LBB9_15:                               ; %_ZL3sind.exit116
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_f64 v[27:28], v[35:36], v[35:36]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[44:45], v[37:38], 0.5
	s_mov_b32 s56, s42
	v_and_b32_e32 v18, 1, v39
	v_cmp_eq_u32_e32 vcc_lo, 0, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[29:30], v[27:28], s[46:47], s[44:45]
	v_fma_f64 v[31:32], v[27:28], s[34:35], s[30:31]
	v_mul_f64 v[33:34], v[27:28], 0.5
	v_mul_f64 v[46:47], v[35:36], -v[27:28]
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[36:37]
	v_add_f64 v[40:41], -v[33:34], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[50:51]
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], -v[40:41], 1.0
	v_fma_f64 v[29:30], v[27:28], v[29:30], s[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[40:41]
	v_add_f64 v[33:34], v[48:49], -v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[29:30], v[46:47], v[29:30], v[44:45]
	v_mul_f64 v[44:45], v[27:28], v[27:28]
	v_fma_f64 v[31:32], v[27:28], v[31:32], s[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[33:34], v[35:36], -v[37:38], v[33:34]
	v_fma_f64 v[27:28], v[27:28], v[29:30], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[44:45], v[31:32], v[33:34]
	v_fma_f64 v[27:28], v[46:47], s[56:57], v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[29:30], v[40:41], v[29:30]
	v_add_f64 v[27:28], v[35:36], -v[27:28]
	v_lshlrev_b32_e32 v16, 30, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v18, v29, v27 :: v_dual_cndmask_b32 v27, v30, v28
	v_xor_b32_e32 v16, v16, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v16, 0x80000000, v16
	v_xor_b32_e32 v16, v27, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, 0, v18, s0
	v_cndmask_b32_e64 v28, 0x7ff80000, v16, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[27:28], v[3:4], v[27:28]
	v_div_scale_f64 v[29:30], null, v[25:26], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[31:32], v[29:30]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[33:34], -v[29:30], v[31:32], 1.0
	v_fma_f64 v[31:32], v[31:32], v[33:34], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], -v[29:30], v[31:32], 1.0
	v_fma_f64 v[31:32], v[31:32], v[33:34], v[31:32]
	v_div_scale_f64 v[33:34], vcc_lo, v[27:28], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[33:34], v[31:32]
	v_fma_f64 v[29:30], -v[29:30], v[35:36], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[29:30], v[29:30], v[31:32], v[35:36]
	v_div_fixup_f64 v[25:26], v[29:30], v[25:26], v[27:28]
	v_add_co_u32 v27, vcc_lo, v5, s16
	v_add_co_ci_u32_e32 v28, vcc_lo, s17, v6, vcc_lo
	global_store_b64 v[27:28], v[25:26], off
	global_load_b64 v[25:26], v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[23:24], v[25:26], -v[23:24]
	v_add_nc_u32_e32 v25, s65, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v26, 31, v25
	v_lshlrev_b64 v[25:26], 3, v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v25, vcc_lo, s12, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, s13, v26, vcc_lo
	global_store_b64 v[25:26], v[23:24], off
	global_load_b64 v[23:24], v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[21:22], v[23:24], -v[21:22]
	v_add_nc_u32_e32 v23, s66, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v24, 31, v23
	v_lshlrev_b64 v[23:24], 3, v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v23, vcc_lo, s12, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s13, v24, vcc_lo
	global_store_b64 v[23:24], v[21:22], off
	global_load_b64 v[21:22], v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[27:28], v[21:22], -v[19:20]
.LBB9_16:                               ; %Flow151
                                        ;   in Loop: Header=BB9_2 Depth=1
	s_and_not1_saveexec_b32 s0, s15
	s_cbranch_execz .LBB9_18
; %bb.17:                               ;   in Loop: Header=BB9_2 Depth=1
	s_mov_b32 s15, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v25, s15 :: v_dual_add_nc_u32 v18, s65, v1
	v_dual_mov_b32 v27, 0 :: v_dual_add_nc_u32 v20, s66, v1
	v_add_co_u32 v22, vcc_lo, v5, s16
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v21, 31, v20
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v6, vcc_lo
	v_mov_b32_e32 v28, 0
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[20:21], 3, v[20:21]
	v_mov_b32_e32 v24, s14
	v_add_co_u32 v18, vcc_lo, s12, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v19, vcc_lo, s13, v19, vcc_lo
	v_add_co_u32 v20, vcc_lo, s12, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s13, v21, vcc_lo
	s_clause 0x1
	global_store_b64 v[5:6], v[13:14], off
	global_store_b64 v[22:23], v[3:4], off
	s_clause 0x1
	global_store_b64 v[18:19], v[24:25], off
	global_store_b64 v[20:21], v[24:25], off
.LBB9_18:                               ;   in Loop: Header=BB9_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v18, s62, v1
	v_add_nc_u32_e32 v1, s18, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v19, 31, v18
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], 3, v[18:19]
	s_or_b32 s19, vcc_lo, s19
	v_add_co_u32 v18, s0, s12, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s0, s13, v19, s0
	v_add_co_u32 v5, s0, v5, s20
	v_add_co_ci_u32_e64 v6, s0, s21, v6, s0
	global_store_b64 v[18:19], v[27:28], off
	s_and_not1_b32 exec_lo, exec_lo, s19
	s_cbranch_execnz .LBB9_2
.LBB9_19:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19initWeightFunctionsIdEvPT_iiiddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 78
		.amdhsa_next_free_sgpr 68
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z19initWeightFunctionsIdEvPT_iiiddd,"axG",@progbits,_Z19initWeightFunctionsIdEvPT_iiiddd,comdat
.Lfunc_end9:
	.size	_Z19initWeightFunctionsIdEvPT_iiiddd, .Lfunc_end9-_Z19initWeightFunctionsIdEvPT_iiiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5896
; NumSgprs: 70
; NumVgprs: 78
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 8
; VGPRBlocks: 9
; NumSGPRsForWavesPerEU: 70
; NumVGPRsForWavesPerEU: 78
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14prepareDensityIdEvPT_biiiddd,"axG",@progbits,_Z14prepareDensityIdEvPT_biiiddd,comdat
	.protected	_Z14prepareDensityIdEvPT_biiiddd ; -- Begin function _Z14prepareDensityIdEvPT_biiiddd
	.globl	_Z14prepareDensityIdEvPT_biiiddd
	.p2align	8
	.type	_Z14prepareDensityIdEvPT_biiiddd,@function
_Z14prepareDensityIdEvPT_biiiddd:       ; @_Z14prepareDensityIdEvPT_biiiddd
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_add_u32 s12, s0, 48
	s_addc_u32 s13, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s19, s2, 0xffff
	s_mul_i32 s18, s7, s6
	v_mad_u64_u32 v[1:2], null, s15, s19, v[0:1]
	s_mul_i32 s14, s18, s5
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s14, v1
	s_cbranch_execz .LBB10_13
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b64 s[16:17], s[0:1], 0x28
	s_load_b128 s[8:11], s[0:1], 0x18
	s_bitcmp1_b32 s4, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_div_scale_f64 v[2:3], null, s[16:17], s[16:17], 1.0
	v_div_scale_f64 v[4:5], null, s[10:11], s[10:11], 1.0
	v_div_scale_f64 v[6:7], null, s[8:9], s[8:9], 1.0
	v_div_scale_f64 v[20:21], vcc_lo, 1.0, s[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[8:9], v[2:3]
	v_rcp_f64_e32 v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_rcp_f64_e32 v[12:13], v[6:7]
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], -v[2:3], v[8:9], 1.0
	v_fma_f64 v[16:17], -v[4:5], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], -v[6:7], v[12:13], 1.0
	v_fma_f64 v[8:9], v[8:9], v[14:15], v[8:9]
	v_div_scale_f64 v[14:15], s2, 1.0, s[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], v[16:17], v[10:11]
	v_div_scale_f64 v[16:17], s3, 1.0, s[8:9], 1.0
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_mul_f64 v[18:19], v[20:21], v[8:9]
	v_mul_f64 v[22:23], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[24:25], v[16:17], v[12:13]
	v_fma_f64 v[2:3], -v[2:3], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], -v[4:5], v[22:23], v[14:15]
	v_fma_f64 v[6:7], -v[6:7], v[24:25], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[2:3], v[8:9], v[18:19]
	s_mov_b32 vcc_lo, s2
	s_cselect_b32 s2, -1, 0
	v_div_fmas_f64 v[4:5], v[4:5], v[10:11], v[22:23]
	s_mov_b32 vcc_lo, s3
	s_ashr_i32 s3, s18, 31
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[6:7], v[6:7], v[12:13], v[24:25]
	s_ashr_i32 s15, s7, 31
	s_add_i32 s4, s18, s3
	v_div_fixup_f64 v[2:3], v[2:3], s[16:17], 1.0
	s_xor_b32 s16, s4, s3
	s_load_b32 s4, s[12:13], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[4:5], v[4:5], s[10:11], 1.0
	s_xor_b32 s12, s2, -1
	v_div_fixup_f64 v[6:7], v[6:7], s[8:9], 1.0
	s_add_i32 s8, s7, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_xor_b32 s17, s8, s15
	s_sub_i32 s8, 0, s16
	s_sub_i32 s9, 0, s17
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s19
	v_cvt_i32_f64_e32 v0, v[2:3]
	v_cvt_f32_u32_e32 v2, s16
	v_cvt_f32_u32_e32 v3, s17
	v_cvt_i32_f64_e32 v4, v[4:5]
	v_cvt_i32_f64_e32 v5, v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_rcp_iflag_f32_e32 v2, v2
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v2, 0x4f7ffffe, v2 :: v_dual_mul_f32 v3, 0x4f7ffffe, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v6, v2
	v_cvt_u32_f32_e32 v7, v3
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v8, s8, v6
	v_mul_lo_u32 v9, s9, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_mul_hi_u32 v8, v6, v8
	v_lshlrev_b32_e32 v0, 1, v0
	v_mul_hi_u32 v9, v7, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b32_e32 v4, 1, v4
	v_not_b32_e32 v10, v0
	v_lshlrev_b32_e32 v5, 1, v5
	v_add_nc_u32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_not_b32_e32 v11, v4
	v_add_nc_u32_e32 v7, v7, v9
	v_not_b32_e32 v12, v5
	v_add_nc_u32_e32 v8, s7, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, s6, v11
	s_mov_b32 s6, 0
	v_add_nc_u32_e32 v10, s5, v12
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[4:5], 3
	s_sub_i32 s5, 0, s18
.LBB10_2:                               ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v11, 31, v1
	s_and_b32 s2, exec_lo, s12
	s_mov_b32 s18, 0
                                        ; implicit-def: $sgpr10_sgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, v1, v11
	v_xor_b32_e32 v12, v12, v11
	v_xor_b32_e32 v11, s3, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v13, v12, v6
	v_mul_lo_u32 v14, v13, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v12, v12, v14
	v_add_nc_u32_e32 v14, 1, v13
	v_subrev_nc_u32_e32 v15, s16, v12
	v_cmp_le_u32_e32 vcc_lo, s16, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v13, v14 :: v_dual_cndmask_b32 v12, v12, v15
	v_add_nc_u32_e32 v14, 1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s16, v12
	v_cndmask_b32_e32 v12, v13, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v12, v12, v11
	v_sub_nc_u32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[13:14], null, s5, v11, v[1:2]
	v_ashrrev_i32_e32 v12, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v14, v13, v12
	v_xor_b32_e32 v14, v14, v12
	v_xor_b32_e32 v12, s15, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v15, v14, v7
	v_mul_lo_u32 v16, v15, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v14, v14, v16
	v_add_nc_u32_e32 v16, 1, v15
	v_subrev_nc_u32_e32 v17, s17, v14
	v_cmp_le_u32_e32 vcc_lo, s17, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v15, v15, v16 :: v_dual_cndmask_b32 v14, v14, v17
	v_add_nc_u32_e32 v16, 1, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s17, v14
	v_cndmask_b32_e32 v14, v15, v16, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v11, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v14, v14, v12
	v_sub_nc_u32_e32 v12, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v14, v12, s7
	v_cmp_eq_u32_e64 s0, v12, v4
	s_or_b32 s13, vcc_lo, s0
	s_mov_b32 s0, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v13, v13, v14
	s_mov_b32 vcc_lo, s2
	v_cmp_eq_u32_e64 s1, v13, v0
	s_delay_alu instid0(VALU_DEP_1)
	s_or_b32 s13, s13, s1
	s_cbranch_vccz .LBB10_6
; %bb.3:                                ;   in Loop: Header=BB10_2 Depth=1
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB10_5
; %bb.4:                                ;   in Loop: Header=BB10_2 Depth=1
	global_load_b64 v[14:15], v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], v[14:15]
	global_store_b64 v[2:3], v[14:15], off
.LBB10_5:                               ;   in Loop: Header=BB10_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_u32_e32 vcc_lo, v11, v10
	v_cmp_eq_u32_e64 s0, v12, v9
	v_cmp_eq_u32_e64 s1, v13, v8
	s_mov_b64 s[10:11], 2.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 s2, vcc_lo, s0
	s_mov_b32 s0, 0
	s_or_b32 s18, s2, s1
.LBB10_6:                               ; %Flow
                                        ;   in Loop: Header=BB10_2 Depth=1
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB10_10
; %bb.7:                                ;   in Loop: Header=BB10_2 Depth=1
	s_and_saveexec_b32 s0, s13
	s_cbranch_execz .LBB10_9
; %bb.8:                                ;   in Loop: Header=BB10_2 Depth=1
	global_load_b64 v[14:15], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], 0.5
	global_store_b64 v[2:3], v[14:15], off
.LBB10_9:                               ;   in Loop: Header=BB10_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_eq_u32_e32 vcc_lo, v11, v10
	v_cmp_eq_u32_e64 s0, v12, v9
	v_cmp_eq_u32_e64 s1, v13, v8
	s_mov_b64 s[10:11], 0.5
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_or_b32 s18, s0, s1
.LBB10_10:                              ; %Flow98
                                        ;   in Loop: Header=BB10_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s18
	s_cbranch_execz .LBB10_12
; %bb.11:                               ; %.sink.split
                                        ;   in Loop: Header=BB10_2 Depth=1
	global_load_b64 v[11:12], v[2:3], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[11:12], v[11:12], s[10:11]
	global_store_b64 v[2:3], v[11:12], off
.LBB10_12:                              ;   in Loop: Header=BB10_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v1, s4, v1
	v_add_co_u32 v2, s0, v2, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, s9, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s14, v1
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB10_2
.LBB10_13:                              ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14prepareDensityIdEvPT_biiiddd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14prepareDensityIdEvPT_biiiddd,"axG",@progbits,_Z14prepareDensityIdEvPT_biiiddd,comdat
.Lfunc_end10:
	.size	_Z14prepareDensityIdEvPT_biiiddd, .Lfunc_end10-_Z14prepareDensityIdEvPT_biiiddd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1232
; NumSgprs: 22
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
	.protected	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii ; -- Begin function _Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.globl	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.p2align	8
	.type	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,@function
_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii: ; @_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x18
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s2, 0xffff
	s_lshr_b32 s2, s10, 31
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_add_i32 s2, s10, s2
	s_mul_i32 s3, s9, s8
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, 1
	s_mul_i32 s2, s3, s2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB11_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s13, s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s3, s2, 31
	s_lshl_b32 s1, s2, 1
	s_mul_i32 s18, s2, 3
	s_lshl_b32 s19, s2, 2
	v_lshlrev_b64 v[3:4], 4, v[1:2]
	v_lshlrev_b64 v[6:7], 3, v[1:2]
	s_lshl_b64 s[10:11], s[2:3], 3
	s_lshl_b64 s[16:17], s[2:3], 4
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	v_add_co_u32 v0, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v2, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, v0, 8
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[12:13], 4
	s_lshl_b64 s[14:15], s[12:13], 3
.LBB11_2:                               ; =>This Inner Loop Header: Depth=1
	global_load_b128 v[8:11], v[4:5], off offset:-8
	global_load_b64 v[12:13], v[6:7], off
	v_add_co_u32 v14, vcc_lo, v6, s10
	v_add_co_ci_u32_e32 v15, vcc_lo, s11, v7, vcc_lo
	v_add_co_u32 v16, vcc_lo, v2, s16
	v_add_co_ci_u32_e32 v17, vcc_lo, s17, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[8:9], v[12:13]
	global_store_b64 v[2:3], v[12:13], off
	global_load_b64 v[12:13], v[6:7], off
	v_add_co_u32 v6, s0, v6, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, s15, v7, s0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[10:11], v[12:13]
	global_store_b64 v[2:3], v[12:13], off offset:8
	global_load_b64 v[12:13], v[14:15], off
	v_add_co_u32 v2, s0, v2, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[8:9], v[12:13]
	global_store_b64 v[16:17], v[12:13], off
	global_load_b64 v[12:13], v[14:15], off
	v_add_nc_u32_e32 v14, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v15, 31, v14
	v_lshlrev_b64 v[18:19], 3, v[14:15]
	v_lshlrev_b64 v[14:15], 4, v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v18, vcc_lo, s6, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[10:11], v[12:13]
	global_store_b64 v[16:17], v[12:13], off offset:8
	global_load_b64 v[12:13], v[18:19], off
	v_add_nc_u32_e32 v16, s18, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v17, 31, v16
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[12:13], -v[10:11]
	global_store_b64 v[14:15], v[12:13], off
	global_load_b64 v[12:13], v[18:19], off
	v_lshlrev_b64 v[18:19], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s6, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[8:9], v[12:13]
	global_store_b64 v[14:15], v[12:13], off offset:8
	global_load_b64 v[12:13], v[18:19], off
	v_lshlrev_b64 v[14:15], 4, v[16:17]
	v_add_nc_u32_e32 v16, s19, v1
	v_add_nc_u32_e32 v1, s12, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v17, 31, v16
	v_add_co_u32 v14, vcc_lo, s8, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s9, v15, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[12:13], -v[10:11]
	global_store_b64 v[14:15], v[12:13], off
	global_load_b64 v[12:13], v[18:19], off
	v_lshlrev_b64 v[18:19], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v18, vcc_lo, s6, v18
	v_add_co_ci_u32_e32 v19, vcc_lo, s7, v19, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[8:9], v[12:13]
	global_store_b64 v[14:15], v[12:13], off offset:8
	global_load_b64 v[12:13], v[18:19], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[10:11], v[12:13], -v[10:11]
	v_lshlrev_b64 v[12:13], 4, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s8, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s9, v13, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, s4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s3, vcc_lo, s3
	global_store_b64 v[12:13], v[10:11], off
	global_load_b64 v[10:11], v[18:19], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[8:9], v[10:11]
	global_store_b64 v[12:13], v[8:9], off offset:8
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB11_2
.LBB11_3:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
.Lfunc_end11:
	.size	_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, .Lfunc_end11-_Z24weightedDensitiesFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 820
; NumSgprs: 22
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z14calcDerivativeIdEvPT_iii,"axG",@progbits,_Z14calcDerivativeIdEvPT_iii,comdat
	.protected	_Z14calcDerivativeIdEvPT_iii ; -- Begin function _Z14calcDerivativeIdEvPT_iii
	.globl	_Z14calcDerivativeIdEvPT_iii
	.p2align	8
	.type	_Z14calcDerivativeIdEvPT_iii,@function
_Z14calcDerivativeIdEvPT_iii:           ; @_Z14calcDerivativeIdEvPT_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x8
	s_add_u32 s8, s0, 24
	s_addc_u32 s9, s1, 0
	s_mov_b32 s3, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s12, s2, 0xffff
	s_mul_i32 s2, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s12, v[0:1]
	s_mul_i32 s2, s2, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB12_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s13, s[8:9], 0x0
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_mul_i32 s5, s6, s5
	s_ashr_i32 s3, s2, 31
	s_mul_i32 s14, s5, s4
	s_mov_b32 s6, 0xd916872b
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s10, 0x55555555
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s18, 0xbf559e2b
	s_mov_b32 s20, 0xd7f4df2e
	s_mov_b32 s22, 0x16291751
	s_mov_b32 s24, 0x9b27acf1
	s_mov_b32 s26, 0x998ef7b6
	s_mov_b32 s28, 0xfefa39ef
	s_mov_b32 s30, 0x3b39803f
	s_mov_b32 s34, 0x7f3321d2
	s_mov_b32 s7, 0x3feff7ce
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s12, s13, s12
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_ashr_i32 s13, s12, 31
	s_mov_b32 s9, 0x402921fb
	s_mov_b32 s11, 0x3fe55555
	s_lshl_b64 s[4:5], s[2:3], 3
	s_lshl_b32 s3, s14, 1
	s_mul_i32 s33, s14, 3
	s_lshl_b32 s42, s14, 2
	s_lshl_b64 s[14:15], s[12:13], 3
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s19, 0x3fc3ab76
	s_mov_b32 s21, 0x3fc7474d
	s_mov_b32 s23, 0x3fcc71c0
	s_mov_b32 s25, 0x3fd24924
	s_mov_b32 s27, 0x3fd99999
	s_mov_b32 s29, 0x3fe62e42
	s_mov_b32 s31, 0x3c7abc9e
	s_mov_b32 s35, 0x4042d97c
	s_mov_b32 s13, 0
	s_mov_b32 s36, 0x55555780
	s_mov_b32 s39, 0xc02921fb
	s_mov_b32 s41, 0x403921fb
.LBB12_2:                               ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[14:15], v[2:3], off
	v_add_nc_u32_e32 v4, s3, v1
	v_add_co_u32 v18, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	s_mov_b32 s37, s11
	s_mov_b32 s38, s8
	global_load_b64 v[25:26], v[18:19], off
	s_mov_b32 s40, s8
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v10, vcc_lo, s0, v4
	v_add_nc_u32_e32 v4, s33, v1
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	global_load_b64 v[16:17], v[10:11], off
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	v_add_co_u32 v6, vcc_lo, s0, v4
	v_add_nc_u32_e32 v4, s42, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v5, vcc_lo
	v_add_nc_u32_e32 v1, s12, v1
	v_ashrrev_i32_e32 v5, 31, v4
	global_load_b64 v[12:13], v[6:7], off
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b64 v[8:9], v[4:5], off
	s_waitcnt vmcnt(4)
	v_cmp_nlt_f64_e32 vcc_lo, s[6:7], v[14:15]
	v_cndmask_b32_e32 v15, 0x3feff7ce, v15, vcc_lo
	v_cndmask_b32_e32 v14, 0xd916872b, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], -v[14:15], 1.0
	v_div_scale_f64 v[14:15], null, v[20:21], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[22:23], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[27:28], -v[14:15], v[22:23], 1.0
	v_fma_f64 v[22:23], v[22:23], v[27:28], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[27:28], -v[14:15], v[22:23], 1.0
	v_fma_f64 v[22:23], v[22:23], v[27:28], v[22:23]
	v_div_scale_f64 v[27:28], vcc_lo, 1.0, v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[29:30], v[27:28], v[22:23]
	v_fma_f64 v[14:15], -v[14:15], v[29:30], v[27:28]
	v_mul_f64 v[27:28], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[14:15], v[14:15], v[22:23], v[29:30]
	s_waitcnt vmcnt(3)
	v_div_scale_f64 v[22:23], null, s[8:9], s[8:9], v[25:26]
	v_div_fixup_f64 v[14:15], v[14:15], v[20:21], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[29:30], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_div_scale_f64 v[31:32], vcc_lo, v[25:26], s[8:9], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[33:34], v[31:32], v[29:30]
	v_fma_f64 v[22:23], -v[22:23], v[33:34], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[22:23], v[22:23], v[29:30], v[33:34]
	v_div_fixup_f64 v[33:34], v[22:23], s[8:9], v[25:26]
	s_waitcnt vmcnt(2)
	v_div_scale_f64 v[22:23], null, s[8:9], s[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[29:30], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_div_scale_f64 v[31:32], vcc_lo, v[16:17], s[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[31:32], v[29:30]
	v_fma_f64 v[22:23], -v[22:23], v[35:36], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[22:23], v[22:23], v[29:30], v[35:36]
	v_div_fixup_f64 v[37:38], v[22:23], s[8:9], v[16:17]
	s_waitcnt vmcnt(1)
	v_div_scale_f64 v[22:23], null, s[8:9], s[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[29:30], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_div_scale_f64 v[31:32], vcc_lo, v[12:13], s[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[35:36], v[31:32], v[29:30]
	v_fma_f64 v[22:23], -v[22:23], v[35:36], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[22:23], v[22:23], v[29:30], v[35:36]
	v_div_fixup_f64 v[35:36], v[22:23], s[8:9], v[12:13]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[22:23], null, s[8:9], s[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[29:30], v[22:23]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[22:23], v[29:30], 1.0
	v_fma_f64 v[29:30], v[29:30], v[31:32], v[29:30]
	v_div_scale_f64 v[31:32], vcc_lo, v[8:9], s[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[39:40], v[31:32], v[29:30]
	v_fma_f64 v[22:23], -v[22:23], v[39:40], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[22:23], v[22:23], v[29:30], v[39:40]
	v_div_fixup_f64 v[29:30], v[22:23], s[8:9], v[8:9]
	v_mul_f64 v[22:23], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[16:17], v[16:17], v[22:23]
	v_fma_f64 v[31:32], v[8:9], v[8:9], v[22:23]
	v_mul_f64 v[22:23], v[12:13], v[35:36]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[16:17], v[37:38], v[22:23]
	v_fma_f64 v[41:42], v[8:9], v[29:30], v[22:23]
	v_frexp_mant_f64_e32 v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[25:26], v[33:34], -v[41:42]
	v_cmp_gt_f64_e32 vcc_lo, s[10:11], v[22:23]
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[22:23], v[22:23], v0
	v_frexp_exp_i32_f64_e32 v0, v[20:21]
	v_add_f64 v[43:44], v[22:23], 1.0
	v_add_f64 v[39:40], v[22:23], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[20:21], 0x204
	v_add_f64 v[45:46], v[43:44], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], -v[45:46]
	v_rcp_f64_e32 v[45:46], v[43:44]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[47:48], -v[43:44], v[45:46], 1.0
	v_fma_f64 v[45:46], v[47:48], v[45:46], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[47:48], -v[43:44], v[45:46], 1.0
	v_fma_f64 v[45:46], v[47:48], v[45:46], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[47:48], v[39:40], v[45:46]
	v_mul_f64 v[49:50], v[43:44], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[47:48], v[43:44], -v[49:50]
	v_fma_f64 v[22:23], v[47:48], v[22:23], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[49:50], v[22:23]
	v_add_f64 v[51:52], v[39:40], -v[43:44]
	v_add_f64 v[49:50], v[43:44], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[39:40], v[39:40], -v[51:52]
	v_add_f64 v[22:23], v[49:50], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[43:44]
	v_add_f64 v[22:23], v[22:23], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[51:52], v[22:23]
	v_mul_f64 v[22:23], v[45:46], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[47:48], v[22:23]
	v_add_f64 v[43:44], v[39:40], -v[47:48]
	v_ldexp_f64 v[47:48], v[39:40], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[43:44]
	v_mul_f64 v[43:44], v[39:40], v[39:40]
	v_ldexp_f64 v[22:23], v[22:23], 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[45:46], v[43:44], s[18:19], s[16:17]
	v_mul_f64 v[39:40], v[39:40], v[43:44]
	v_fma_f64 v[45:46], v[43:44], v[45:46], s[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[43:44], v[45:46], s[22:23]
	v_fma_f64 v[45:46], v[43:44], v[45:46], s[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], v[43:44], v[45:46], s[26:27]
	v_fma_f64 v[45:46], v[43:44], v[45:46], s[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[39:40], v[39:40], v[45:46]
	v_add_f64 v[43:44], v[47:48], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[43:44], -v[47:48]
	v_add_f64 v[39:40], v[39:40], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], v[39:40]
	v_add_f64 v[39:40], v[43:44], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[43:44], v[39:40], -v[43:44]
	v_add_f64 v[22:23], v[22:23], -v[43:44]
	v_cvt_f64_i32_e32 v[43:44], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[45:46], v[43:44], s[28:29]
	v_fma_f64 v[47:48], v[43:44], s[28:29], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[43:44], s[30:31], v[47:48]
	v_add_f64 v[47:48], v[45:46], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[45:46], v[47:48], -v[45:46]
	v_add_f64 v[43:44], v[43:44], -v[45:46]
	v_add_f64 v[45:46], v[47:48], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[45:46], -v[47:48]
	v_add_f64 v[51:52], v[45:46], -v[49:50]
	v_add_f64 v[39:40], v[39:40], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[47:48], v[47:48], -v[51:52]
	v_add_f64 v[39:40], v[39:40], v[47:48]
	v_add_f64 v[47:48], v[43:44], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[47:48], -v[43:44]
	v_add_f64 v[39:40], v[47:48], v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[51:52], v[47:48], -v[49:50]
	v_add_f64 v[22:23], v[22:23], -v[49:50]
	v_add_f64 v[43:44], v[43:44], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], v[43:44]
	v_add_f64 v[43:44], v[45:46], v[39:40]
	v_add_f64 v[45:46], v[43:44], -v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[39:40], v[39:40], -v[45:46]
	v_add_f64 v[22:23], v[22:23], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[43:44], v[22:23]
	v_dual_cndmask_b32 v23, v23, v21 :: v_dual_cndmask_b32 v22, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[39:40], null, s[38:39], s[38:39], v[22:23]
	v_rcp_f64_e32 v[43:44], v[39:40]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[45:46], -v[39:40], v[43:44], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[43:44], v[45:46], v[43:44]
	v_fma_f64 v[45:46], -v[39:40], v[43:44], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], v[43:44], v[45:46], v[43:44]
	v_div_scale_f64 v[45:46], vcc_lo, v[22:23], s[38:39], v[22:23]
	v_mul_f64 v[47:48], v[45:46], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[39:40], -v[39:40], v[47:48], v[45:46]
	v_div_fmas_f64 v[39:40], v[39:40], v[43:44], v[47:48]
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[22:23], v[39:40], s[38:39], v[22:23]
	v_cndmask_b32_e32 v0, 0x7ff80000, v23, vcc_lo
	v_div_scale_f64 v[23:24], null, v[20:21], v[20:21], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[39:40], v[23:24]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[43:44], -v[23:24], v[39:40], 1.0
	v_fma_f64 v[39:40], v[39:40], v[43:44], v[39:40]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[43:44], -v[23:24], v[39:40], 1.0
	v_fma_f64 v[39:40], v[39:40], v[43:44], v[39:40]
	v_div_scale_f64 v[43:44], vcc_lo, v[25:26], v[20:21], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[45:46], v[43:44], v[39:40]
	v_fma_f64 v[23:24], -v[23:24], v[45:46], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[23:24], v[23:24], v[39:40], v[45:46]
	v_div_scale_f64 v[39:40], null, v[20:21], v[20:21], v[33:34]
	v_div_fixup_f64 v[23:24], v[23:24], v[20:21], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[43:44], v[39:40]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[45:46], -v[39:40], v[43:44], 1.0
	v_fma_f64 v[43:44], v[43:44], v[45:46], v[43:44]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[45:46], -v[39:40], v[43:44], 1.0
	v_fma_f64 v[43:44], v[43:44], v[45:46], v[43:44]
	v_div_scale_f64 v[45:46], vcc_lo, v[33:34], v[20:21], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[47:48], v[45:46], v[43:44]
	v_fma_f64 v[39:40], -v[39:40], v[47:48], v[45:46]
	v_fma_f64 v[45:46], v[25:26], v[25:26], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[39:40], v[39:40], v[43:44], v[47:48]
	v_mul_f64 v[47:48], v[27:28], s[40:41]
	v_mul_f64 v[43:44], v[25:26], v[25:26]
	v_div_fixup_f64 v[39:40], v[39:40], v[20:21], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[49:50], null, v[47:48], v[47:48], v[45:46]
	v_rcp_f64_e32 v[51:52], v[49:50]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_div_scale_f64 v[53:54], vcc_lo, v[45:46], v[47:48], v[45:46]
	v_mul_f64 v[55:56], v[53:54], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], -v[49:50], v[55:56], v[53:54]
	v_div_fmas_f64 v[49:50], v[49:50], v[51:52], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[45:46], v[49:50], v[47:48], v[45:46]
	v_mul_f64 v[47:48], v[27:28], s[8:9]
	v_add_f64 v[39:40], v[39:40], v[45:46]
	v_mul_f64 v[45:46], v[25:26], v[16:17]
	v_mul_f64 v[16:17], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[49:50], null, v[47:48], v[47:48], v[45:46]
	v_rcp_f64_e32 v[51:52], v[49:50]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_div_scale_f64 v[53:54], vcc_lo, v[45:46], v[47:48], v[45:46]
	v_mul_f64 v[55:56], v[53:54], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], -v[49:50], v[55:56], v[53:54]
	v_div_fmas_f64 v[49:50], v[49:50], v[51:52], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[45:46], v[49:50], v[47:48], v[45:46]
	v_fma_f64 v[37:38], v[14:15], -v[37:38], -v[45:46]
	v_mul_f64 v[45:46], v[25:26], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[49:50], null, v[47:48], v[47:48], v[45:46]
	v_rcp_f64_e32 v[51:52], v[49:50]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_div_scale_f64 v[53:54], vcc_lo, v[45:46], v[47:48], v[45:46]
	v_mul_f64 v[55:56], v[53:54], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], -v[49:50], v[55:56], v[53:54]
	v_div_fmas_f64 v[49:50], v[49:50], v[51:52], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[45:46], v[49:50], v[47:48], v[45:46]
	v_fma_f64 v[35:36], v[14:15], -v[35:36], -v[45:46]
	v_mul_f64 v[45:46], v[25:26], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[49:50], null, v[47:48], v[47:48], v[45:46]
	v_rcp_f64_e32 v[51:52], v[49:50]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_fma_f64 v[53:54], -v[49:50], v[51:52], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[51:52], v[51:52], v[53:54], v[51:52]
	v_div_scale_f64 v[53:54], vcc_lo, v[45:46], v[47:48], v[45:46]
	v_mul_f64 v[55:56], v[53:54], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], -v[49:50], v[55:56], v[53:54]
	v_div_fmas_f64 v[49:50], v[49:50], v[51:52], v[55:56]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[45:46], v[49:50], v[47:48], v[45:46]
	v_fma_f64 v[29:30], v[14:15], -v[29:30], -v[45:46]
	v_div_scale_f64 v[45:46], null, v[27:28], v[27:28], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[47:48], v[45:46]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[49:50], -v[45:46], v[47:48], 1.0
	v_fma_f64 v[47:48], v[47:48], v[49:50], v[47:48]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[49:50], -v[45:46], v[47:48], 1.0
	v_fma_f64 v[47:48], v[47:48], v[49:50], v[47:48]
	v_div_scale_f64 v[49:50], vcc_lo, v[41:42], v[27:28], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[51:52], v[49:50], v[47:48]
	v_fma_f64 v[45:46], -v[45:46], v[51:52], v[49:50]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[45:46], v[45:46], v[47:48], v[51:52]
	v_div_fixup_f64 v[41:42], v[45:46], v[27:28], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[33:34], v[14:15], v[41:42]
	v_mul_f64 v[41:42], 0xc0080000, v[25:26]
	v_mul_f64 v[31:32], v[41:42], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[25:26], v[43:44], v[31:32]
	v_mul_f64 v[31:32], v[20:21], s[34:35]
	v_mul_f64 v[27:28], v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[31:32], null, v[27:28], v[27:28], v[25:26]
	v_rcp_f64_e32 v[41:42], v[31:32]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[43:44], -v[31:32], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[41:42], v[43:44], v[41:42]
	v_fma_f64 v[43:44], -v[31:32], v[41:42], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[41:42], v[41:42], v[43:44], v[41:42]
	v_div_scale_f64 v[43:44], vcc_lo, v[25:26], v[27:28], v[25:26]
	v_mul_f64 v[45:46], v[43:44], v[41:42]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[31:32], v[45:46], v[43:44]
	v_div_fmas_f64 v[31:32], v[31:32], v[41:42], v[45:46]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[25:26], v[31:32], v[27:28], v[25:26]
	v_add_f64 v[25:26], v[25:26], v[33:34]
	global_store_b64 v[2:3], v[25:26], off
	v_div_scale_f64 v[25:26], null, s[8:9], s[8:9], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[27:28], v[25:26]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[31:32], -v[25:26], v[27:28], 1.0
	v_fma_f64 v[27:28], v[27:28], v[31:32], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], -v[25:26], v[27:28], 1.0
	v_fma_f64 v[27:28], v[27:28], v[31:32], v[27:28]
	v_div_scale_f64 v[31:32], vcc_lo, v[23:24], s[8:9], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[33:34], v[31:32], v[27:28]
	v_fma_f64 v[25:26], -v[25:26], v[33:34], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[25:26], v[25:26], v[27:28], v[33:34]
	v_cmp_nge_f64_e32 vcc_lo, 0, v[20:21]
	v_div_fixup_f64 v[23:24], v[25:26], s[8:9], v[23:24]
	v_cndmask_b32_e32 v25, 0, v22, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], v[39:40]
	v_cndmask_b32_e32 v26, 0x7ff00000, v0, vcc_lo
	v_add_f64 v[20:21], v[23:24], v[25:26]
	global_store_b64 v[18:19], v[20:21], off
	v_div_scale_f64 v[18:19], null, s[38:39], s[38:39], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], -v[18:19], v[20:21], 1.0
	v_fma_f64 v[20:21], v[20:21], v[22:23], v[20:21]
	v_div_scale_f64 v[22:23], vcc_lo, v[16:17], s[38:39], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[22:23], v[20:21]
	v_fma_f64 v[18:19], -v[18:19], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[18:19], v[18:19], v[20:21], v[24:25]
	v_div_fixup_f64 v[16:17], v[18:19], s[38:39], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[37:38], v[16:17]
	global_store_b64 v[10:11], v[16:17], off
	v_mul_f64 v[10:11], v[12:13], v[14:15]
	v_div_scale_f64 v[12:13], null, s[38:39], s[38:39], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[16:17], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[12:13], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], -v[12:13], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	v_div_scale_f64 v[18:19], vcc_lo, v[10:11], s[38:39], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[20:21], v[18:19], v[16:17]
	v_fma_f64 v[12:13], -v[12:13], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[12:13], v[12:13], v[16:17], v[20:21]
	v_div_fixup_f64 v[10:11], v[12:13], s[38:39], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[35:36], v[10:11]
	global_store_b64 v[6:7], v[10:11], off
	v_mul_f64 v[6:7], v[8:9], v[14:15]
	v_div_scale_f64 v[8:9], null, s[38:39], s[38:39], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	v_div_scale_f64 v[12:13], vcc_lo, v[6:7], s[38:39], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[12:13], v[10:11]
	v_fma_f64 v[8:9], -v[8:9], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[14:15]
	v_add_co_u32 v2, vcc_lo, v2, s14
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s13, vcc_lo, s13
	v_div_fixup_f64 v[6:7], v[8:9], s[38:39], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[29:30], v[6:7]
	global_store_b64 v[4:5], v[6:7], off
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB12_2
.LBB12_3:                               ; %Flow123
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14calcDerivativeIdEvPT_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 57
		.amdhsa_next_free_sgpr 43
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z14calcDerivativeIdEvPT_iii,"axG",@progbits,_Z14calcDerivativeIdEvPT_iii,comdat
.Lfunc_end12:
	.size	_Z14calcDerivativeIdEvPT_iii, .Lfunc_end12-_Z14calcDerivativeIdEvPT_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3632
; NumSgprs: 45
; NumVgprs: 57
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 45
; NumVGPRsForWavesPerEU: 57
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
	.protected	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii ; -- Begin function _Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.globl	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
	.p2align	8
	.type	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,@function
_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii: ; @_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[16:19], s[0:1], 0x18
	s_add_u32 s4, s0, 40
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s2, 0xffff
	s_lshr_b32 s2, s18, 31
	v_mad_u64_u32 v[1:2], null, s15, s10, v[0:1]
	s_add_i32 s2, s18, s2
	s_mul_i32 s3, s17, s16
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, 1
	s_mul_i32 s2, s3, s2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB13_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s11, s[4:5], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_ashr_i32 s3, s2, 31
	s_lshl_b32 s1, s2, 1
	s_lshl_b64 s[14:15], s[2:3], 4
	s_lshl_b32 s19, s2, 2
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	v_lshlrev_b64 v[2:3], 4, v[1:2]
	s_mul_i32 s18, s2, 3
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s11, s10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_ashr_i32 s11, s10, 31
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	s_lshl_b64 s[12:13], s[10:11], 4
	s_add_u32 s20, s4, s14
	s_addc_u32 s21, s5, s15
	s_lshl_b64 s[14:15], s[10:11], 3
	s_lshl_b64 s[16:17], s[2:3], 3
	s_mov_b32 s3, 0
.LBB13_2:                               ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v6, s18, v1
	v_add_nc_u32_e32 v16, s1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_ashrrev_i32_e32 v17, 31, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 4, v[6:7]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_lshlrev_b64 v[20:21], 4, v[16:17]
	v_lshlrev_b64 v[16:17], 3, v[16:17]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v10, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v7, vcc_lo
	global_load_b128 v[6:9], v[8:9], off
	global_load_b64 v[26:27], v[10:11], off
	v_add_co_u32 v10, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v14, vcc_lo, s20, v2
	v_add_co_ci_u32_e32 v15, vcc_lo, s21, v3, vcc_lo
	v_add_co_u32 v18, vcc_lo, v4, s16
	v_add_co_ci_u32_e32 v19, vcc_lo, s17, v5, vcc_lo
	v_add_co_u32 v20, vcc_lo, s4, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v21, vcc_lo
	v_add_co_u32 v22, vcc_lo, s6, v16
	v_add_co_ci_u32_e32 v23, vcc_lo, s7, v17, vcc_lo
	s_clause 0x1
	global_load_b128 v[10:13], v[10:11], off
	global_load_b128 v[14:17], v[14:15], off
	global_load_b64 v[28:29], v[18:19], off
	global_load_b128 v[18:21], v[20:21], off
	global_load_b64 v[30:31], v[22:23], off
	v_add_nc_u32_e32 v22, s19, v1
	v_add_nc_u32_e32 v1, s10, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v23, 31, v22
	v_lshlrev_b64 v[24:25], 4, v[22:23]
	v_lshlrev_b64 v[22:23], 3, v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v24, vcc_lo, s4, v24
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v32, vcc_lo, s6, v22
	v_add_co_ci_u32_e32 v33, vcc_lo, s7, v23, vcc_lo
	global_load_b64 v[34:35], v[4:5], off
	global_load_b128 v[22:25], v[24:25], off
	global_load_b64 v[32:33], v[32:33], off
	v_add_co_u32 v4, s0, v4, s14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s15, v5, s0
	s_waitcnt vmcnt(8)
	v_mul_f64 v[6:7], v[26:27], v[6:7]
	v_mul_f64 v[8:9], v[26:27], -v[8:9]
	s_waitcnt vmcnt(5)
	v_mul_f64 v[14:15], v[14:15], v[28:29]
	v_mul_f64 v[16:17], v[28:29], v[16:17]
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[30:31], v[18:19], v[6:7]
	v_fma_f64 v[8:9], v[30:31], -v[20:21], v[8:9]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[10:11], v[34:35], v[14:15]
	v_fma_f64 v[12:13], v[34:35], v[12:13], v[16:17]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[32:33], v[22:23], v[6:7]
	v_fma_f64 v[14:15], v[32:33], -v[24:25], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[12:13], -v[6:7]
	v_add_f64 v[6:7], v[10:11], -v[14:15]
	v_add_co_u32 v10, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s12
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s2, v1
	s_or_b32 s3, vcc_lo, s3
	global_store_b128 v[10:11], v[6:9], off
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB13_2
.LBB13_3:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 36
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,"axG",@progbits,_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii,comdat
.Lfunc_end13:
	.size	_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii, .Lfunc_end13-_Z16variationFourierId15HIP_vector_typeIdLj2EEEvPT0_PT_S3_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 720
; NumSgprs: 24
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 36
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z11mixing_stepIdEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z11mixing_stepIdEvPT_S1_S1_S0_iiid,comdat
	.protected	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid ; -- Begin function _Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.globl	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
	.p2align	8
	.type	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid,@function
_Z11mixing_stepIdEvPT_S1_S1_S0_iiid:    ; @_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x44
	s_load_b128 s[4:7], s[0:1], 0x20
	s_add_u32 s2, s0, 56
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s26, s8, 0xffff
	s_mul_i32 s33, s5, s4
	v_mad_u64_u32 v[1:2], null, s15, s26, v[0:1]
	s_mul_i32 s33, s33, s6
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s33, v1
	s_cbranch_execz .LBB14_5
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s27, s[2:3], 0x0
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x30
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s12, 0x652b82fe
	s_mov_b32 s14, 0xfefa39ef
	s_mov_b32 s16, 0x3b39803f
	s_mov_b32 s18, 0xfca7ab0c
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_mov_b32 s20, 0x6a5dcb37
	s_mov_b32 s22, 0x623fde64
	s_mov_b32 s24, 0x7c89e6b0
	s_mov_b32 s28, 0x14761f6e
	s_mov_b32 s30, 0x1852b7b0
	s_mov_b32 s34, 0x11122322
	s_mov_b32 s36, 0x555502a1
	s_mov_b32 s38, 0x55555511
	s_mov_b32 s40, 11
	s_mov_b32 s42, 0x9999999a
	s_mov_b32 s44, 0x66666666
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s26, s27, s26
	s_mov_b32 s13, 0x3ff71547
	s_ashr_i32 s27, s26, 31
	s_mov_b32 s15, 0xbfe62e42
	s_mov_b32 s17, 0xbc7abc9e
	s_mov_b32 s19, 0x3e928af3
	s_mov_b32 s21, 0x3e5ade15
	s_mov_b32 s23, 0x3ec71dee
	s_mov_b32 s25, 0x3efa0199
	s_mov_b32 s29, 0x3f2a01a0
	s_mov_b32 s31, 0x3f56c16c
	s_mov_b32 s35, 0x3f811111
	s_mov_b32 s37, 0x3fa55555
	s_mov_b32 s39, 0x3fc55555
	s_mov_b32 s41, 0x3fe00000
	s_mov_b32 s43, 0x3fa99999
	s_mov_b32 s45, 0x3fee6666
	s_lshl_b64 s[46:47], s[26:27], 3
	s_mov_b32 s1, 0
.LBB14_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v8, s0, s8, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s9, v3, s0
	global_load_b64 v[6:7], v[4:5], off
	s_mov_b32 s27, exec_lo
	s_waitcnt vmcnt(0)
	global_store_b64 v[8:9], v[6:7], off
	v_cmpx_lt_f64_e32 0, v[6:7]
	s_cbranch_execz .LBB14_4
; %bb.3:                                ;   in Loop: Header=BB14_2 Depth=1
	v_add_co_u32 v8, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v3, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], s[10:11], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[8:9], s[12:13]
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[8:9]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[8:9]
	v_rndne_f64_e32 v[10:11], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[10:11], s[14:15], v[8:9]
	v_cvt_i32_f64_e32 v0, v[10:11]
	v_fma_f64 v[12:13], v[10:11], s[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], s[20:21], s[18:19]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[24:25]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[30:31]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[36:37]
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[12:13], v[14:15], s[40:41]
	v_fma_f64 v[14:15], v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[12:13], v[14:15], 1.0
	v_ldexp_f64 v[10:11], v[10:11], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, 0x7ff00000, v11, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	v_cndmask_b32_e32 v8, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 0, v0, s0
	v_mul_f64 v[8:9], v[8:9], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[8:9], s[42:43]
	v_fma_f64 v[6:7], v[6:7], s[44:45], v[8:9]
	global_store_b64 v[4:5], v[6:7], off
.LBB14_4:                               ;   in Loop: Header=BB14_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s27
	v_add_nc_u32_e32 v1, s26, v1
	v_add_co_u32 v2, s0, v2, s46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s0, s47, v3, s0
	v_cmp_le_i32_e32 vcc_lo, s33, v1
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB14_2
.LBB14_5:                               ; %Flow50
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mixing_stepIdEvPT_S1_S1_S0_iiid
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 48
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z11mixing_stepIdEvPT_S1_S1_S0_iiid,"axG",@progbits,_Z11mixing_stepIdEvPT_S1_S1_S0_iiid,comdat
.Lfunc_end14:
	.size	_Z11mixing_stepIdEvPT_S1_S1_S0_iiid, .Lfunc_end14-_Z11mixing_stepIdEvPT_S1_S1_S0_iiid
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 776
; NumSgprs: 50
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 50
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.section	.text._Z16checkConvergenceIdEvPT_S1_S1_iii,"axG",@progbits,_Z16checkConvergenceIdEvPT_S1_S1_iii,comdat
	.protected	_Z16checkConvergenceIdEvPT_S1_S1_iii ; -- Begin function _Z16checkConvergenceIdEvPT_S1_S1_iii
	.globl	_Z16checkConvergenceIdEvPT_S1_S1_iii
	.p2align	8
	.type	_Z16checkConvergenceIdEvPT_S1_S1_iii,@function
_Z16checkConvergenceIdEvPT_S1_S1_iii:   ; @_Z16checkConvergenceIdEvPT_S1_S1_iii
; %bb.0:
	s_mov_b32 s2, s15
	s_clause 0x3
	s_load_b32 s3, s[0:1], 0x34
	s_load_b128 s[12:15], s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	s_add_u32 s0, s0, 40
	s_addc_u32 s1, s1, 0
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_mul_i32 s15, s13, s12
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_mul_i32 s15, s15, s14
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s15, v1
	s_cbranch_execz .LBB15_4
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s0, s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v4, 0
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s10, s0, s3
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[12:13], s[10:11], 3
.LBB15_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v7, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v6, vcc_lo
	v_add_nc_u32_e32 v1, s10, v1
	global_load_b64 v[7:8], v[7:8], off
	global_load_b64 v[9:10], v[9:10], off
	v_add_co_u32 v5, s0, v5, s12
	v_cmp_le_i32_e32 vcc_lo, s15, v1
	v_add_co_ci_u32_e64 v6, s0, s13, v6, s0
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[3:4], v[7:8], v[7:8], v[3:4]
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB15_2
; %bb.3:                                ; %Flow60
	s_or_b32 exec_lo, exec_lo, s1
.LBB15_4:                               ; %Flow61
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
	v_lshlrev_b32_e32 v1, 3, v0
	s_cmp_lt_u32 s3, 2
	ds_store_b64 v1, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB15_8
.LBB15_5:                               ; %.lr.ph39
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s0, s3, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB15_7
; %bb.6:                                ;   in Loop: Header=BB15_5 Depth=1
	v_lshl_add_u32 v2, s0, 3, v1
	ds_load_b64 v[2:3], v2
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
.LBB15_7:                               ;   in Loop: Header=BB15_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB15_5
.LBB15_8:                               ; %._crit_edge40
	s_mov_b32 s3, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB15_10
; %bb.9:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[2:3], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[2:3]
.LBB15_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16checkConvergenceIdEvPT_S1_S1_iii
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16checkConvergenceIdEvPT_S1_S1_iii,"axG",@progbits,_Z16checkConvergenceIdEvPT_S1_S1_iii,comdat
.Lfunc_end15:
	.size	_Z16checkConvergenceIdEvPT_S1_S1_iii, .Lfunc_end15-_Z16checkConvergenceIdEvPT_S1_S1_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 488
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           8
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11initDensityIfEvPT_iiidddd
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z11initDensityIfEvPT_iiidddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19initWeightFunctionsIfEvPT_iiiddd
    .private_segment_fixed_size: 0
    .sgpr_count:     69
    .sgpr_spill_count: 0
    .symbol:         _Z19initWeightFunctionsIfEvPT_iiiddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     76
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           1
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           8
        .value_kind:     by_value
      - .offset:         40
        .size:           8
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14prepareDensityIfEvPT_biiiddd
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z14prepareDensityIfEvPT_biiiddd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     23
    .sgpr_spill_count: 0
    .symbol:         _Z24weightedDensitiesFourierIf15HIP_vector_typeIfLj2EEEvPT0_PT_S3_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
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  - 2
...

	.end_amdgpu_metadata
