
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdint.h> 
#include<stdio.h>


__global__ void convolution_kernel(const uint8_t *d_source, uint8_t *d_target, 
                        const int width, const int height, 
                        const float *d_stancil,
                        const int st_width,
                        const int st_height)

{

    //boundaries checking for width
    if ((blockDim.x * blockIdx.x)+ threadIdx.x > (width-1))
    {
        return;
    }
    //
    if ((blockDim.y * blockIdx.y)+ threadIdx.y > (height-1))
    {
        return;
    }

    int x,y,localX,localY,final_idx,pixX,pixY, st_idx;
    //lets compute the coordinate of the pixel we are computing
    pixX = (blockIdx.x*blockDim.x) + threadIdx.x;
    pixY = (blockIdx.y*blockDim.y) + threadIdx.y;

    int idx = ((pixY *width) + (pixX)) *3;


    //computing the center of the filter
    int center_x = (int)(st_width/2.0);
    int center_y = (int)(st_height/2.0);
    
    //allocating/initializing  color variables
    float colorR = 0,colorG = 0,colorB = 0;

    //looping the height of the filter
    for (y=0; y<st_height; ++y)
    {

        localY = y - center_y;
        //looping the weidth of the filter
        for (x=0;x<st_width; ++x)
        {
            //lets compute where in the filter we are, computiing local
            //coordinate from the center
            localX = x - center_x;

            //boundary check 
            if (( (localX + pixX) >= 0 && ((localX+pixX) < width)) &&
                (localY+pixY >= 0 && ((localY+pixY) < height)))

            {

                //compute the final pixel to sample taking in to account 
                //the offset of the filter
                final_idx = idx + ((localX*3) + (localY*width*3));

                //compute the filter index buffer
                st_idx = x+ (y*st_width);

                colorR += float(d_source[final_idx])*d_stancil[st_idx];
                colorG += float(d_source[final_idx+1])*d_stancil[st_idx];
                colorB += float(d_source[final_idx+2])*d_stancil[st_idx];

            }//end of stencil boundary checking

        }//end of looping filter width

    }//end of looping filter height

    //setting the color to final buffer
    d_target[idx] = (uint8_t)min(255.0f,max(0.0f,colorR));
    d_target[idx+1] = (uint8_t)min(255.0f,max(0.0f,colorG));
    d_target[idx+2] = (uint8_t)min(255.0f,max(0.0f,colorB));

}



void run_convolution_kernel( uint8_t *d_source,  uint8_t *d_target, 
                        const size_t width, const size_t height, 
                        const  float *d_stancil,
                        const size_t st_width,
                        const size_t st_height)
{
    
	const int grainSize=16;
    int width_blocks,width_height;
    //computing the block size
    width_blocks = ((width%grainSize) != 0)?(width/grainSize) +1: (width/grainSize);
    width_height = ((height%grainSize) != 0)?(height/grainSize) +1: (height/grainSize);
    
    //setupping the block and grids
    const dim3 blockSize( grainSize, grainSize , 1); 
    const dim3 gridSize( width_blocks, width_height, 1); 

    //calling the actual kernel
    convolution_kernel<<<gridSize, blockSize>>>(d_source, 
                                                d_target, 
                                                width,
                                                height,
                                                d_stancil,
                                                st_width,
                                                st_height);
    
    //sincronizing device
    cudaDeviceSynchronize();

    //checking for error
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) 
        printf("Error: %s\n", cudaGetErrorString(err));

	
}
	.file	"tmpxft_003851c9_00000000-6_convolution_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii
	.type	_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii, @function
_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18convolution_kernelPKhPhiiPKfii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii, .-_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii
	.globl	_Z18convolution_kernelPKhPhiiPKfii
	.type	_Z18convolution_kernelPKhPhiiPKfii, @function
_Z18convolution_kernelPKhPhiiPKfii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii
	.cfi_endproc
.LFE2053:
	.size	_Z18convolution_kernelPKhPhiiPKfii, .-_Z18convolution_kernelPKhPhiiPKfii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error: %s\n"
	.text
	.globl	_Z22run_convolution_kernelPhS_mmPKfmm
	.type	_Z22run_convolution_kernelPhS_mmPKfmm, @function
_Z22run_convolution_kernelPhS_mmPKfmm:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	movl	$1, %esi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	shrq	$4, %rdx
	movq	%rbx, %rax
	andl	$15, %eax
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	cmpq	$1, %rax
	movq	%rcx, %rax
	sbbl	$-1, %edx
	andl	$15, %ecx
	shrq	$4, %rax
	movq	%rdi, 8(%rsp)
	cmpq	$1, %rcx
	movl	%edx, 36(%rsp)
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	sbbl	$-1, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	112(%rsp), %r12
	movl	%eax, 40(%rsp)
	movq	36(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	%ebp, %ecx
	movl	%ebx, %edx
	movl	%r15d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 128
	movq	24(%rsp), %rdi
	movq	%r14, %r8
	movq	%r13, %rsi
	call	_Z48__device_stub__Z18convolution_kernelPKhPhiiPKfiiPKhPhiiPKfii
	popq	%rdx
	.cfi_def_cfa_offset 120
	popq	%rcx
	.cfi_def_cfa_offset 112
.L13:
	call	cudaDeviceSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L8
	call	cudaGetErrorString@PLT
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movq	%rax, %rdx
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L8:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z22run_convolution_kernelPhS_mmPKfmm, .-_Z22run_convolution_kernelPhS_mmPKfmm
	.section	.rodata.str1.1
.LC1:
	.string	"_Z18convolution_kernelPKhPhiiPKfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18convolution_kernelPKhPhiiPKfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdint.h> 
#include<stdio.h>


__global__ void convolution_kernel(const uint8_t *d_source, uint8_t *d_target, 
                        const int width, const int height, 
                        const float *d_stancil,
                        const int st_width,
                        const int st_height)

{

    //boundaries checking for width
    if ((blockDim.x * blockIdx.x)+ threadIdx.x > (width-1))
    {
        return;
    }
    //
    if ((blockDim.y * blockIdx.y)+ threadIdx.y > (height-1))
    {
        return;
    }

    int x,y,localX,localY,final_idx,pixX,pixY, st_idx;
    //lets compute the coordinate of the pixel we are computing
    pixX = (blockIdx.x*blockDim.x) + threadIdx.x;
    pixY = (blockIdx.y*blockDim.y) + threadIdx.y;

    int idx = ((pixY *width) + (pixX)) *3;


    //computing the center of the filter
    int center_x = (int)(st_width/2.0);
    int center_y = (int)(st_height/2.0);
    
    //allocating/initializing  color variables
    float colorR = 0,colorG = 0,colorB = 0;

    //looping the height of the filter
    for (y=0; y<st_height; ++y)
    {

        localY = y - center_y;
        //looping the weidth of the filter
        for (x=0;x<st_width; ++x)
        {
            //lets compute where in the filter we are, computiing local
            //coordinate from the center
            localX = x - center_x;

            //boundary check 
            if (( (localX + pixX) >= 0 && ((localX+pixX) < width)) &&
                (localY+pixY >= 0 && ((localY+pixY) < height)))

            {

                //compute the final pixel to sample taking in to account 
                //the offset of the filter
                final_idx = idx + ((localX*3) + (localY*width*3));

                //compute the filter index buffer
                st_idx = x+ (y*st_width);

                colorR += float(d_source[final_idx])*d_stancil[st_idx];
                colorG += float(d_source[final_idx+1])*d_stancil[st_idx];
                colorB += float(d_source[final_idx+2])*d_stancil[st_idx];

            }//end of stencil boundary checking

        }//end of looping filter width

    }//end of looping filter height

    //setting the color to final buffer
    d_target[idx] = (uint8_t)min(255.0f,max(0.0f,colorR));
    d_target[idx+1] = (uint8_t)min(255.0f,max(0.0f,colorG));
    d_target[idx+2] = (uint8_t)min(255.0f,max(0.0f,colorB));

}



void run_convolution_kernel( uint8_t *d_source,  uint8_t *d_target, 
                        const size_t width, const size_t height, 
                        const  float *d_stancil,
                        const size_t st_width,
                        const size_t st_height)
{
    
	const int grainSize=16;
    int width_blocks,width_height;
    //computing the block size
    width_blocks = ((width%grainSize) != 0)?(width/grainSize) +1: (width/grainSize);
    width_height = ((height%grainSize) != 0)?(height/grainSize) +1: (height/grainSize);
    
    //setupping the block and grids
    const dim3 blockSize( grainSize, grainSize , 1); 
    const dim3 gridSize( width_blocks, width_height, 1); 

    //calling the actual kernel
    convolution_kernel<<<gridSize, blockSize>>>(d_source, 
                                                d_target, 
                                                width,
                                                height,
                                                d_stancil,
                                                st_width,
                                                st_height);
    
    //sincronizing device
    hipDeviceSynchronize();

    //checking for error
    hipError_t err = hipGetLastError();
    if (err != hipSuccess) 
        printf("Error: %s\n", hipGetErrorString(err));

	
}
	.text
	.file	"convolution_kernel.hip"
	.globl	_Z33__device_stub__convolution_kernelPKhPhiiPKfii # -- Begin function _Z33__device_stub__convolution_kernelPKhPhiiPKfii
	.type	_Z33__device_stub__convolution_kernelPKhPhiiPKfii,@function
_Z33__device_stub__convolution_kernelPKhPhiiPKfii: # @_Z33__device_stub__convolution_kernelPKhPhiiPKfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18convolution_kernelPKhPhiiPKfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__convolution_kernelPKhPhiiPKfii, .Lfunc_end0-_Z33__device_stub__convolution_kernelPKhPhiiPKfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22run_convolution_kernelPhS_mmPKfmm # -- Begin function _Z22run_convolution_kernelPhS_mmPKfmm
	.type	_Z22run_convolution_kernelPhS_mmPKfmm,@function
_Z22run_convolution_kernelPhS_mmPKfmm:  # @_Z22run_convolution_kernelPhS_mmPKfmm
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 16(%rsp)                   # 8-byte Spill
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	movq	%rdi, %rbp
	movq	80(%rsp), %rbx
	movl	%r12d, %eax
	andl	$15, %eax
	movq	%rdx, %rcx
	shrq	$4, %rcx
	cmpq	$1, %rax
	sbbl	$-1, %ecx
	movl	%r15d, %eax
	andl	$15, %eax
	movq	%r15, %rdi
	shrq	$4, %rdi
	cmpq	$1, %rax
	sbbl	$-1, %edi
	shlq	$32, %rdi
	orq	%rcx, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movl	%ebx, (%rsp)
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movl	%r12d, %edx
	movl	%r15d, %ecx
	movq	%r14, %r8
	movq	16(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	callq	_Z33__device_stub__convolution_kernelPKhPhiiPKfii
.LBB1_2:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB1_3
# %bb.4:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB1_3:
	.cfi_def_cfa_offset 80
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22run_convolution_kernelPhS_mmPKfmm, .Lfunc_end1-_Z22run_convolution_kernelPhS_mmPKfmm
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18convolution_kernelPKhPhiiPKfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18convolution_kernelPKhPhiiPKfii,@object # @_Z18convolution_kernelPKhPhiiPKfii
	.section	.rodata,"a",@progbits
	.globl	_Z18convolution_kernelPKhPhiiPKfii
	.p2align	3, 0x0
_Z18convolution_kernelPKhPhiiPKfii:
	.quad	_Z33__device_stub__convolution_kernelPKhPhiiPKfii
	.size	_Z18convolution_kernelPKhPhiiPKfii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error: %s\n"
	.size	.L.str, 11

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18convolution_kernelPKhPhiiPKfii"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__convolution_kernelPKhPhiiPKfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18convolution_kernelPKhPhiiPKfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18convolution_kernelPKhPhiiPKfii ; -- Begin function _Z18convolution_kernelPKhPhiiPKfii
	.globl	_Z18convolution_kernelPKhPhiiPKfii
	.p2align	8
	.type	_Z18convolution_kernelPKhPhiiPKfii,@function
_Z18convolution_kernelPKhPhiiPKfii:     ; @_Z18convolution_kernelPKhPhiiPKfii
; %bb.0:
	s_clause 0x1
	s_load_b32 s6, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x10
	s_add_u32 s4, s0, 40
	v_and_b32_e32 v6, 0x3ff, v0
	s_addc_u32 s5, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s14, s14, s6
	s_add_i32 s6, s2, -1
	v_add_nc_u32_e32 v1, s14, v6
	v_cmp_ge_u32_e32 vcc_lo, s6, v1
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.1:
	s_load_b32 s4, s[4:5], 0xc
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s4, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s4, v[0:1]
	s_add_i32 s4, s3, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_u32_e32 vcc_lo, s4, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.2:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v3, 0
	v_mov_b32_e32 v5, 0
	s_mov_b32 s11, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s9, 1
	s_cbranch_scc1 .LBB0_10
; %bb.3:                                ; %.lr.ph87
	v_cvt_f64_i32_e32 v[3:4], s9
	v_cvt_f64_i32_e32 v[7:8], s8
	s_load_b64 s[12:13], s[0:1], 0x18
	s_cmp_gt_i32 s8, 0
	s_mov_b32 s15, 0
	s_cselect_b32 s1, -1, 0
	s_mov_b32 s16, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[3:4], v[3:4], 0.5
	v_mul_f64 v[7:8], v[7:8], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v4, v[3:4]
	v_cvt_i32_f64_e32 v5, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v2, v4
	v_mul_lo_u32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add3_u32 v3, v6, v0, s14
	v_mov_b32_e32 v0, 0
	v_sub_nc_u32_e32 v6, v1, v5
	s_mul_i32 s14, s2, 3
	v_sub_nc_u32_e32 v7, v3, v5
	v_mov_b32_e32 v3, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3)
	v_lshl_add_u32 v7, v7, 1, v7
.LBB0_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_9
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_sub_nc_u32_e32 v8, s16, v4
	s_mov_b32 s10, s15
	s_mov_b32 s18, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v9, v7 :: v_dual_add_nc_u32 v8, v8, v2
	v_cmp_gt_i32_e32 vcc_lo, 0, v8
	v_cmp_le_i32_e64 s0, s3, v8
	v_mov_b32_e32 v8, v6
	s_delay_alu instid0(VALU_DEP_2)
	s_or_b32 s17, vcc_lo, s0
.LBB0_6:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, 0, v8
	v_cmp_le_i32_e64 s0, s2, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, s17
	s_xor_b32 s19, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s19
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_6 Depth=2
	v_ashrrev_i32_e32 v11, 31, v9
	v_add_co_u32 v10, vcc_lo, s4, v9
	s_lshl_b64 s[20:21], s[10:11], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s12, s20
	v_add_co_ci_u32_e32 v11, vcc_lo, s5, v11, vcc_lo
	s_addc_u32 s21, s13, s21
	s_clause 0x1
	global_load_u16 v12, v[10:11], off
	global_load_u8 v10, v[10:11], off offset:2
	s_load_b32 s19, s[20:21], 0x0
	s_waitcnt vmcnt(1)
	v_cvt_f32_ubyte0_e32 v11, v12
	v_cvt_f32_ubyte1_e32 v12, v12
	s_waitcnt vmcnt(0)
	v_cvt_f32_ubyte0_e32 v10, v10
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, s19, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_fmac_f32 v3, s19, v12 :: v_dual_fmac_f32 v0, s19, v10
.LBB0_8:                                ;   in Loop: Header=BB0_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v9, 3, v9
	v_add_nc_u32_e32 v8, 1, v8
	s_add_i32 s18, s18, -1
	s_add_i32 s10, s10, 1
	s_cmp_lg_u32 s18, 0
	s_cbranch_scc1 .LBB0_6
.LBB0_9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v7, s14, v7
	s_add_i32 s16, s16, 1
	s_add_i32 s15, s15, s8
	s_cmp_lg_u32 s16, s9
	s_cbranch_scc1 .LBB0_4
.LBB0_10:                               ; %._crit_edge88
	v_max_f32_e32 v6, v3, v3
	v_mad_u64_u32 v[3:4], null, v2, s2, v[1:2]
	v_dual_max_f32 v1, v5, v5 :: v_dual_max_f32 v0, v0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_med3_f32 v2, v6, 0, 0x437f0000
	v_med3_f32 v1, v1, 0, 0x437f0000
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshl_add_u32 v3, v3, 1, v3
	v_cvt_i32_f32_e32 v2, v2
	v_med3_f32 v4, v0, 0, 0x437f0000
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f32_e32 v5, v1
	v_ashrrev_i32_e32 v1, 31, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b16 v2, 8, v2
	v_add_co_u32 v0, vcc_lo, s6, v3
	v_cvt_i32_f32_e32 v3, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_or_b32_e32 v2, v5, v2
	s_clause 0x1
	global_store_b8 v[0:1], v3, off offset:2
	global_store_b16 v[0:1], v2, off
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18convolution_kernelPKhPhiiPKfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18convolution_kernelPKhPhiiPKfii, .Lfunc_end0-_Z18convolution_kernelPKhPhiiPKfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 716
; NumSgprs: 24
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18convolution_kernelPKhPhiiPKfii
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z18convolution_kernelPKhPhiiPKfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
