#include <cuda.h>
#include <iostream>
#include <stdio.h>
#include <time.h>

using namespace std;

__global__ void convolution_1D_basic_kernel(float *N, float *M, float *P, int Mask_Width, int Width){
   
   int i = blockIdx.x * blockDim.x + threadIdx.x;
   float Pvalue = 0;
   int N_start_point = i - (Mask_Width/2);
   for (int j = 0; j < Mask_Width; j++) {
       if(N_start_point +j >= 0 && N_start_point + j < Width){
           Pvalue += N[N_start_point+j] * M[j];
       }
   }
   P[i] = Pvalue;
}

void convolution_1D_basic(float *N, float *M, float *P, int Mask_Width, int Width){
   for (int i = 0; i < Width; i++) {
       float Pvalue = 0;
       int N_start_point = i - (Mask_Width/2);
       for (int j = 0; j < Mask_Width; j++) {
           if(N_start_point +j >= 0 && N_start_point + j < Width){
               Pvalue += N[N_start_point+j] * M[j];
           }
       }
       P[i] = Pvalue;
   }
   
}

bool compareTo(float *P,float *P_result, int W){
  bool flag = true;
  for(int i = 0; i < W; i++){
    if(P[i] != P_result[i]){
    	flag = false;
      break;
    }
  }
  return flag;
}

int main(){
    clock_t start, end;
    double cpu_time_used, gpu_time_used;
    float *N, *M, *P, *P_result, *d_N, *d_M, *d_P;
    int Width = 7, Mask_Width = 5;
    //Asignar memoria en el host
    N = (float*)malloc(Width*sizeof(float));
    M = (float*)malloc(Mask_Width*sizeof(float));
    P = (float*)malloc(Width*sizeof(float));
    P_result = (float*)malloc(Width*sizeof(float));
    
    //Inicializar los valores
    for (int i = 0; i < Width; i++) {
        N[i] = i + 1;
        P[i] = 0;
        P_result[i] = 0;
    }
    
    M[0] = 3;
    M[1] = 4;
    M[2] = 5;
    M[3] = 4;
    M[4] = 3;
    
    start = clock();
    //Llamar funcion hace la convolucion de vectores en el host y retorne el resultado en P
    convolution_1D_basic(N, M, P, Mask_Width, Width);
    end = clock();
    cpu_time_used = ((double) (end - start)) / CLOCKS_PER_SEC;
    printf("Tiempo invertido CPU = %lf s\n", cpu_time_used);
    
    // //Asignacion de memoria en el device
    cudaMalloc(&d_N, Width*sizeof(float));
    cudaMalloc(&d_M, Mask_Width*sizeof(float));
    cudaMalloc(&d_P, Width*sizeof(float));
    
    //Copiar los datos del host al device
    cudaMemcpy(d_N, N, Width * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_M, M, Mask_Width * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(d_P, P, Width * sizeof(float), cudaMemcpyHostToDevice);
    
    dim3 dimBlock(4, 1, 1);
    dim3 dimGrid((Width / dimBlock.x) + 1, 1, 1);
    
    start = clock();
    //Llamar funcion hace la convolucion de vectores en el device y retorne el resultado en P_result
    convolution_1D_basic_kernel<<< dimGrid, dimBlock >>>(d_N, d_M, d_P, Mask_Width, Width);
    cudaMemcpy(P_result, d_P, Width*sizeof(float), cudaMemcpyDeviceToHost);
    end = clock();
    gpu_time_used = ((double) (end - start)) / CLOCKS_PER_SEC;
    printf("Tiempo invertido GPU = %lf s\n", gpu_time_used);
    
    if(compareTo(P, P_result, Width)){
        cout << "Vectores Iguales" << endl;
    }
    else{
        cout <<"Vectores Diferentes" << endl;
    }
    // for (int i = 0; i < Width; i++) {
    //     cout << P_result[i] <<endl;
    // }
    
    free(N);
    free(M);
    free(P);
    free(P_result);
    cudaFree(d_N);
    cudaFree(d_M);
    cudaFree(d_P);
    
    return 0;
}
	.file	"tmpxft_00258b2b_00000000-6_convolution1D.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3640:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3640:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z20convolution_1D_basicPfS_S_ii
	.type	_Z20convolution_1D_basicPfS_S_ii, @function
_Z20convolution_1D_basicPfS_S_ii:
.LFB3635:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	movq	%rsi, %r9
	movq	%rdx, %r10
	movl	$2, %esi
	cltd
	idivl	%esi
	xorl	%esi, %esi
	negl	%eax
	movslq	%eax, %rdx
	leaq	(%rdi,%rdx,4), %rdi
.L3:
	cmpl	%esi, %r8d
	jle	.L12
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L6:
	cmpl	%edx, %ecx
	jle	.L13
	movl	%eax, %r11d
	addl	%edx, %r11d
	js	.L4
	cmpl	%r11d, %r8d
	jle	.L4
	movss	(%rdi,%rdx,4), %xmm1
	mulss	(%r9,%rdx,4), %xmm1
	addss	%xmm1, %xmm0
.L4:
	incq	%rdx
	jmp	.L6
.L13:
	movss	%xmm0, (%r10,%rsi,4)
	addq	$4, %rdi
	incq	%rsi
	incl	%eax
	jmp	.L3
.L12:
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z20convolution_1D_basicPfS_S_ii, .-_Z20convolution_1D_basicPfS_S_ii
	.globl	_Z9compareToPfS_i
	.type	_Z9compareToPfS_i, @function
_Z9compareToPfS_i:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L15:
	cmpl	%eax, %edx
	jle	.L20
	movss	(%rdi,%rax,4), %xmm0
	incq	%rax
	ucomiss	-4(%rsi,%rax,4), %xmm0
	jp	.L19
	je	.L15
	jmp	.L19
.L20:
	movb	$1, %al
	ret
.L19:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z9compareToPfS_i, .-_Z9compareToPfS_i
	.globl	_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii
	.type	_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii, @function
_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z27convolution_1D_basic_kernelPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L21:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii, .-_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii
	.globl	_Z27convolution_1D_basic_kernelPfS_S_ii
	.type	_Z27convolution_1D_basic_kernelPfS_S_ii, @function
_Z27convolution_1D_basic_kernelPfS_S_ii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3663:
	.size	_Z27convolution_1D_basic_kernelPfS_S_ii, .-_Z27convolution_1D_basic_kernelPfS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC4:
	.string	"Tiempo invertido CPU = %lf s\n"
.LC5:
	.string	"Tiempo invertido GPU = %lf s\n"
.LC6:
	.string	"Vectores Iguales"
.LC7:
	.string	"Vectores Diferentes"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$28, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$20, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$28, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$28, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$7, %ecx
	movq	%rbp, %rdi
	movabsq	$4647714816524288000, %rdx
	movq	%rax, %r13
	movq	%rdx, 8(%rbx)
	movabsq	$4611686019492741120, %rax
	movq	%rax, (%rbx)
	movabsq	$4665729215040061440, %rax
	movq	%rax, 16(%rbx)
	xorl	%eax, %eax
	rep stosl
	movq	%r13, %rdi
	movl	$7, %ecx
	movq	%rdx, (%r12)
	rep stosl
	movl	$0x40e00000, 24(%rbx)
	movabsq	$4647714816530579456, %rax
	movq	%rax, 8(%r12)
	movl	$0x40400000, 16(%r12)
	call	clock@PLT
	movl	$5, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$7, %r8d
	movq	%rbx, %rdi
	movq	%rax, %r14
	call	_Z20convolution_1D_basicPfS_S_ii
	call	clock@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	subq	%r14, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC3(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movl	$28, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$20, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$28, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$28, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$20, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$28, %edx
	call	cudaMemcpy@PLT
	movl	$2147483649, %eax
	movl	$1, 52(%rsp)
	addq	%rax, %rax
	movq	%rax, 44(%rsp)
	call	clock@PLT
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	salq	$2, %rdx
	movq	%rax, %r14
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$5, %ecx
	movl	$7, %r8d
	movq	8(%rsp), %rdi
	call	_Z53__device_stub__Z27convolution_1D_basic_kernelPfS_S_iiPfS_S_ii
.L27:
	movq	24(%rsp), %rsi
	movl	$28, %edx
	movl	$2, %ecx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	subq	%r14, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC3(%rip), %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movq	%rbp, %rdi
	movl	$7, %edx
	call	_Z9compareToPfS_i
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	testb	%al, %al
	jne	.L32
	leaq	.LC7(%rip), %rsi
.L32:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z27convolution_1D_basic_kernelPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z27convolution_1D_basic_kernelPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <time.h>

using namespace std;

__global__ void convolution_1D_basic_kernel(float *N, float *M, float *P, int Mask_Width, int Width){
   
   int i = blockIdx.x * blockDim.x + threadIdx.x;
   float Pvalue = 0;
   int N_start_point = i - (Mask_Width/2);
   for (int j = 0; j < Mask_Width; j++) {
       if(N_start_point +j >= 0 && N_start_point + j < Width){
           Pvalue += N[N_start_point+j] * M[j];
       }
   }
   P[i] = Pvalue;
}

void convolution_1D_basic(float *N, float *M, float *P, int Mask_Width, int Width){
   for (int i = 0; i < Width; i++) {
       float Pvalue = 0;
       int N_start_point = i - (Mask_Width/2);
       for (int j = 0; j < Mask_Width; j++) {
           if(N_start_point +j >= 0 && N_start_point + j < Width){
               Pvalue += N[N_start_point+j] * M[j];
           }
       }
       P[i] = Pvalue;
   }
   
}

bool compareTo(float *P,float *P_result, int W){
  bool flag = true;
  for(int i = 0; i < W; i++){
    if(P[i] != P_result[i]){
    	flag = false;
      break;
    }
  }
  return flag;
}

int main(){
    clock_t start, end;
    double cpu_time_used, gpu_time_used;
    float *N, *M, *P, *P_result, *d_N, *d_M, *d_P;
    int Width = 7, Mask_Width = 5;
    //Asignar memoria en el host
    N = (float*)malloc(Width*sizeof(float));
    M = (float*)malloc(Mask_Width*sizeof(float));
    P = (float*)malloc(Width*sizeof(float));
    P_result = (float*)malloc(Width*sizeof(float));
    
    //Inicializar los valores
    for (int i = 0; i < Width; i++) {
        N[i] = i + 1;
        P[i] = 0;
        P_result[i] = 0;
    }
    
    M[0] = 3;
    M[1] = 4;
    M[2] = 5;
    M[3] = 4;
    M[4] = 3;
    
    start = clock();
    //Llamar funcion hace la convolucion de vectores en el host y retorne el resultado en P
    convolution_1D_basic(N, M, P, Mask_Width, Width);
    end = clock();
    cpu_time_used = ((double) (end - start)) / CLOCKS_PER_SEC;
    printf("Tiempo invertido CPU = %lf s\n", cpu_time_used);
    
    // //Asignacion de memoria en el device
    hipMalloc(&d_N, Width*sizeof(float));
    hipMalloc(&d_M, Mask_Width*sizeof(float));
    hipMalloc(&d_P, Width*sizeof(float));
    
    //Copiar los datos del host al device
    hipMemcpy(d_N, N, Width * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_M, M, Mask_Width * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(d_P, P, Width * sizeof(float), hipMemcpyHostToDevice);
    
    dim3 dimBlock(4, 1, 1);
    dim3 dimGrid((Width / dimBlock.x) + 1, 1, 1);
    
    start = clock();
    //Llamar funcion hace la convolucion de vectores en el device y retorne el resultado en P_result
    convolution_1D_basic_kernel<<< dimGrid, dimBlock >>>(d_N, d_M, d_P, Mask_Width, Width);
    hipMemcpy(P_result, d_P, Width*sizeof(float), hipMemcpyDeviceToHost);
    end = clock();
    gpu_time_used = ((double) (end - start)) / CLOCKS_PER_SEC;
    printf("Tiempo invertido GPU = %lf s\n", gpu_time_used);
    
    if(compareTo(P, P_result, Width)){
        cout << "Vectores Iguales" << endl;
    }
    else{
        cout <<"Vectores Diferentes" << endl;
    }
    // for (int i = 0; i < Width; i++) {
    //     cout << P_result[i] <<endl;
    // }
    
    free(N);
    free(M);
    free(P);
    free(P_result);
    hipFree(d_N);
    hipFree(d_M);
    hipFree(d_P);
    
    return 0;
}
	.text
	.file	"convolution1D.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii # -- Begin function _Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii
	.type	_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii,@function
_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii: # @_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27convolution_1D_basic_kernelPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii, .Lfunc_end0-_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20convolution_1D_basicPfS_S_ii # -- Begin function _Z20convolution_1D_basicPfS_S_ii
	.type	_Z20convolution_1D_basicPfS_S_ii,@function
_Z20convolution_1D_basicPfS_S_ii:       # @_Z20convolution_1D_basicPfS_S_ii
	.cfi_startproc
# %bb.0:
	testl	%r8d, %r8d
	jle	.LBB1_6
# %bb.1:                                # %.lr.ph29
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	negl	%eax
	movl	%r8d, %r9d
	movl	%ecx, %r10d
	xorl	%r11d, %r11d
.LBB1_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_3
# %bb.7:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	movslq	%eax, %rbx
	leaq	(%rdi,%rbx,4), %rbx
	xorps	%xmm0, %xmm0
	xorl	%r14d, %r14d
.LBB1_8:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%r14), %ebp
	cmpl	%r8d, %ebp
	jae	.LBB1_10
# %bb.9:                                #   in Loop: Header=BB1_8 Depth=2
	movss	(%rbx,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rsi,%r14,4), %xmm1
	addss	%xmm1, %xmm0
.LBB1_10:                               #   in Loop: Header=BB1_8 Depth=2
	incq	%r14
	cmpq	%r14, %r10
	jne	.LBB1_8
	jmp	.LBB1_4
.LBB1_3:                                #   in Loop: Header=BB1_2 Depth=1
	xorps	%xmm0, %xmm0
.LBB1_4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	movss	%xmm0, (%rdx,%r11,4)
	incq	%r11
	incq	%rax
	cmpq	%r9, %r11
	jne	.LBB1_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB1_6:                                # %._crit_edge30
	retq
.Lfunc_end1:
	.size	_Z20convolution_1D_basicPfS_S_ii, .Lfunc_end1-_Z20convolution_1D_basicPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9compareToPfS_i               # -- Begin function _Z9compareToPfS_i
	.type	_Z9compareToPfS_i,@function
_Z9compareToPfS_i:                      # @_Z9compareToPfS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph.preheader
	movss	(%rdi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rsi), %xmm0
	jne	.LBB2_2
	jnp	.LBB2_5
.LBB2_2:
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	retq
.LBB2_3:
	movb	$1, %al
                                        # kill: def $al killed $al killed $eax
	retq
.LBB2_5:                                # %.lr.ph12.preheader
	movl	%edx, %eax
	movl	$1, %edx
.LBB2_6:                                # %.lr.ph12
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	je	.LBB2_8
# %bb.7:                                # %.lr.ph
                                        #   in Loop: Header=BB2_6 Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	leaq	1(%rcx), %rdx
	ucomiss	(%rsi,%rcx,4), %xmm0
	jne	.LBB2_8
	jnp	.LBB2_6
.LBB2_8:                                # %._crit_edge.loopexit
	cmpq	%rax, %rcx
	setae	%al
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end2:
	.size	_Z9compareToPfS_i, .Lfunc_end2-_Z9compareToPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x40400000                      # float 3
	.long	0x40800000                      # float 4
	.long	0x40a00000                      # float 5
	.long	0x40800000                      # float 4
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$28, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$20, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$1, %edi
	movl	$28, %esi
	callq	calloc@PLT
	movq	%rax, %r15
	movl	$1, %edi
	movl	$28, %esi
	callq	calloc@PLT
	movq	%rax, %r12
	xorl	%eax, %eax
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%rax), %rcx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	movq	%rcx, %rax
	cmpq	$7, %rcx
	jne	.LBB3_1
# %bb.2:
	movaps	.LCPI3_0(%rip), %xmm0           # xmm0 = [3.0E+0,4.0E+0,5.0E+0,4.0E+0]
	movups	%xmm0, (%r14)
	movl	$1077936128, 16(%r14)           # imm = 0x40400000
	xorl	%ebp, %ebp
	callq	clock
	movq	%rax, %r13
	movq	%rbx, %rax
.LBB3_3:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	xorps	%xmm0, %xmm0
	movq	$-2, %rcx
.LBB3_4:                                # %.lr.ph.i
                                        #   Parent Loop BB3_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rcx,%rbp), %edx
	cmpl	$6, %edx
	ja	.LBB3_6
# %bb.5:                                #   in Loop: Header=BB3_4 Depth=2
	movss	(%rax,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	8(%r14,%rcx,4), %xmm1
	addss	%xmm1, %xmm0
.LBB3_6:                                #   in Loop: Header=BB3_4 Depth=2
	incq	%rcx
	cmpq	$3, %rcx
	jne	.LBB3_4
# %bb.7:                                # %._crit_edge.i
                                        #   in Loop: Header=BB3_3 Depth=1
	movss	%xmm0, (%r15,%rbp,4)
	incq	%rbp
	addq	$4, %rax
	cmpq	$7, %rbp
	jne	.LBB3_3
# %bb.8:                                # %_Z20convolution_1D_basicPfS_S_ii.exit
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_1(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	leaq	16(%rsp), %r13
	movl	$28, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$20, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$28, %esi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$28, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$20, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movl	$28, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r13
	movabsq	$4294967298, %rdi               # imm = 0x100000002
	leaq	2(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.9:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$5, %ecx
	movl	$7, %r8d
	callq	_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii
.LBB3_10:
	movq	(%rsp), %rsi
	movl	$28, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI3_1(%rip), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r12), %xmm0
	jne	.LBB3_16
	jnp	.LBB3_11
.LBB3_16:                               # %.critedge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$19, %edx
	jmp	.LBB3_17
.LBB3_11:                               # %.lr.ph.preheader
	movq	$-1, %rax
.LBB3_12:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$5, %rax
	je	.LBB3_15
# %bb.13:                               # %.lr.ph.i56
                                        #   in Loop: Header=BB3_12 Depth=1
	movss	8(%r15,%rax,4), %xmm0           # xmm0 = mem[0],zero,zero,zero
	leaq	1(%rax), %rcx
	ucomiss	8(%r12,%rax,4), %xmm0
	movq	%rcx, %rax
	jne	.LBB3_14
	jnp	.LBB3_12
.LBB3_14:                               # %_Z9compareToPfS_i.exit
	cmpq	$6, %rcx
	jb	.LBB3_16
.LBB3_15:                               # %_Z9compareToPfS_i.exit.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$16, %edx
.LBB3_17:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27convolution_1D_basic_kernelPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z27convolution_1D_basic_kernelPfS_S_ii,@object # @_Z27convolution_1D_basic_kernelPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z27convolution_1D_basic_kernelPfS_S_ii
	.p2align	3, 0x0
_Z27convolution_1D_basic_kernelPfS_S_ii:
	.quad	_Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii
	.size	_Z27convolution_1D_basic_kernelPfS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Tiempo invertido CPU = %lf s\n"
	.size	.L.str, 30

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Tiempo invertido GPU = %lf s\n"
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Vectores Iguales"
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Vectores Diferentes"
	.size	.L.str.3, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z27convolution_1D_basic_kernelPfS_S_ii"
	.size	.L__unnamed_1, 40

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z42__device_stub__convolution_1D_basic_kernelPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z27convolution_1D_basic_kernelPfS_S_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z27convolution_1D_basic_kernelPfS_S_ii ; -- Begin function _Z27convolution_1D_basic_kernelPfS_S_ii
	.globl	_Z27convolution_1D_basic_kernelPfS_S_ii
	.p2align	8
	.type	_Z27convolution_1D_basic_kernelPfS_S_ii,@function
_Z27convolution_1D_basic_kernelPfS_S_ii: ; @_Z27convolution_1D_basic_kernelPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_cmp_lt_i32 s10, 1
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_lshr_b32 s0, s10, 31
	v_mov_b32_e32 v3, 0
	s_add_i32 s0, s10, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s0, s0, 1
	v_mov_b32_e32 v0, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_subrev_nc_u32_e32 v2, s0, v1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s11, v2
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_load_b32 s1, s[6:7], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s1, v4
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s10, s10, -1
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s10, 0
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v0, 0
.LBB0_6:                                ; %Flow42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27convolution_1D_basic_kernelPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z27convolution_1D_basic_kernelPfS_S_ii, .Lfunc_end0-_Z27convolution_1D_basic_kernelPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27convolution_1D_basic_kernelPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z27convolution_1D_basic_kernelPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
