/*
	Barker Homework 8

	Finding the problem with GPU dot product

	To compile: nvcc dotProductRobustNot.cu -O3 -o dotProductRobustNot -lcudart
	To run: ./dotProductRobustNot lengthofvector sizeofblock
*/
#include <sys/time.h>
#include <stdio.h>

// max number of block 65535 
// max number of threads per block 1024
// max number of threads 67107840

//#define THREADSPERBLOCK 1024

int THREADSPERBLOCK;

int N; //Global that holds the length of the vectors. It will be loaded from the command line

double *A_CPU, *B_CPU, *C_CPU; //CPU pointers

double *A_GPU, *B_GPU, *C_GPU; //GPU pointers

dim3 dimBlock; //This variable will hold the Dimensions of your block
dim3 dimGrid; //This variable will hold the Dimensions of your grid

//Select the block and grid architecture for the threads on the GPU
void SetUpCudaDevices()
{	
	//Threads in a block
	dimBlock.x = THREADSPERBLOCK;
	dimBlock.y = 1;
	dimBlock.z = 1;
	
	//Blocks in a grid
	dimGrid.x = (N - 1)/dimBlock.x + 1; //Makes enough blocks to add the whole vector. If N is greater than dimBlock.x*65535 you are out of luck.
	dimGrid.y = 1;
	dimGrid.z = 1;
}

void AllocateMemory()
{					
	//Allocate Device (GPU) Memory, & allocates the value of the specific pointer/array
	cudaMalloc(&A_GPU,N*sizeof(double));
	cudaMalloc(&B_GPU,N*sizeof(double));
	cudaMalloc(&C_GPU,N*sizeof(double));

	//Allocate Host (CPU) Memory
	A_CPU = (double*)malloc(N*sizeof(double)); //(float*) to prevent from being a void
	B_CPU = (double*)malloc(N*sizeof(double));
	C_CPU = (double*)malloc(N*sizeof(double));
}

//Loads values into vectors that we will dot.
void Innitialize()
{
	int i;
	
	for(i = 0; i < N; i++)
	{		
		A_CPU[i] = (double)1;	
		B_CPU[i] = (double)1;
	}
}

//Cleaning up memory after we are finished.
void CleanUp(double *A_CPU,double *B_CPU,double *C_CPU,double *A_GPU,double *B_GPU,double *C_GPU)
{
	free(A_CPU); free(B_CPU); free(C_CPU);
	cudaFree(A_GPU); cudaFree(B_GPU); cudaFree(C_GPU);
}

//This is the kernel. It is the function that will run on the GPU.
__global__ void Addition(double *A, double *B, double *C, int n)
{	
	int id = blockDim.x*blockIdx.x + threadIdx.x;

	//Multiplying the vectors
	if(id < n)
	{
		C[id] = A[id] * B[id];
	}
	__syncthreads();

	int fold = blockDim.x;
	while(fold > 1)
	{  
		if(fold%2 != 0)  //Checking to see if the fold is even
		{
			if(threadIdx.x == 0 && id + (fold - 1) < n) //If fold is not even add the last element and now it is
			{
				fold = fold - 1;
				C[id] = C[id] + C[id + fold];
			}
		}
		
		fold = fold/2; //Fold the remaining parts in
		if(threadIdx.x < fold && id + fold < n)
		{
			C[id] = C[id] + C[id + fold];
		}
		__syncthreads();
	}
}

int main(int argc, char** argv)
{
	int i;
	
	N = atoi(argv[1]); //Reading the length of the vectors from the command line
	
	THREADSPERBLOCK = atoi(argv[2]); //Reading the size of the blocks
	
	timeval start, end;
	cudaError_t err;

	//Set the thread structure that you will be using on the GPU		
	SetUpCudaDevices();

	//Partitioning off the memory that you will be using.
	AllocateMemory();

	//Loading up values to be added.
	Innitialize();
	
	//Starting the timer
	gettimeofday(&start, NULL);

	//Copy Memory from CPU to GPU		
	cudaMemcpyAsync(A_GPU, A_CPU, N*sizeof(double), cudaMemcpyHostToDevice);
	cudaMemcpyAsync(B_GPU, B_CPU, N*sizeof(double), cudaMemcpyHostToDevice);
	
	//Calling the Kernel (GPU) function.	
	Addition<<<dimGrid, dimBlock>>>(A_GPU, B_GPU, C_GPU, N);

	//Checking to see if the Kernel had any problems.
	err = cudaGetLastError();
	if (err != 0) 
	{
		printf("\n CUDA error = %s\n", cudaGetErrorString(err));
		return(1);
	}
	
	//Copy Memory from GPU to CPU	
	cudaMemcpyAsync(C_CPU, C_GPU, N*sizeof(double), cudaMemcpyDeviceToHost);

	//Stopping the timer
	gettimeofday(&end, NULL);

	//Calculating the total time used in the addition and converting it to milliseconds.
	float time = (end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec);
	
	//Displaying the time
	printf("GPU Time in milliseconds= %.15f\n", (time/1000.0));

	//Add up the remaining info to get the final dot product
	double dot = 0.0;	
	for(i = 0; i < N; i = i + dimBlock.x)	
	{		
		dot = dot + C_CPU[i];
	}

	//Displaying the dot product.
	printf("\n *** N = %d DotProduct = %.15f ***\n",N, dot);

	//You're done so cleanup your mess.	
	CleanUp(A_CPU,B_CPU,C_CPU,A_GPU,B_GPU,C_GPU);	
	
	return(0);
}

	.file	"tmpxft_00363600_00000000-6_hw08.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z16SetUpCudaDevicesv
	.type	_Z16SetUpCudaDevicesv, @function
_Z16SetUpCudaDevicesv:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	N(%rip), %eax
	movl	THREADSPERBLOCK(%rip), %ecx
	xorl	%edx, %edx
	movabsq	$4294967297, %rsi
	movq	%rsi, 4+dimBlock(%rip)
	decl	%eax
	movl	%ecx, dimBlock(%rip)
	divl	%ecx
	movq	%rsi, 4+dimGrid(%rip)
	incl	%eax
	movl	%eax, dimGrid(%rip)
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z16SetUpCudaDevicesv, .-_Z16SetUpCudaDevicesv
	.globl	_Z14AllocateMemoryv
	.type	_Z14AllocateMemoryv, @function
_Z14AllocateMemoryv:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movslq	N(%rip), %rsi
	leaq	A_GPU(%rip), %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	N(%rip), %rsi
	leaq	B_GPU(%rip), %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	N(%rip), %rsi
	leaq	C_GPU(%rip), %rdi
	salq	$3, %rsi
	call	cudaMalloc@PLT
	movslq	N(%rip), %rbx
	salq	$3, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, A_CPU(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, B_CPU(%rip)
	call	malloc@PLT
	popq	%rbx
	.cfi_def_cfa_offset 8
	movq	%rax, C_CPU(%rip)
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14AllocateMemoryv, .-_Z14AllocateMemoryv
	.globl	_Z11Innitializev
	.type	_Z11Innitializev, @function
_Z11Innitializev:
.LFB2029:
	.cfi_startproc
	endbr64
	movl	N(%rip), %edx
	movq	A_CPU(%rip), %rcx
	xorl	%eax, %eax
	movq	B_CPU(%rip), %rsi
	movsd	.LC0(%rip), %xmm0
.L6:
	cmpl	%eax, %edx
	jle	.L9
	movsd	%xmm0, (%rcx,%rax,8)
	movsd	%xmm0, (%rsi,%rax,8)
	incq	%rax
	jmp	.L6
.L9:
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z11Innitializev, .-_Z11Innitializev
	.globl	_Z7CleanUpPdS_S_S_S_S_
	.type	_Z7CleanUpPdS_S_S_S_S_, @function
_Z7CleanUpPdS_S_S_S_S_:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r9, %rbx
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z7CleanUpPdS_S_S_S_S_, .-_Z7CleanUpPdS_S_S_S_S_
	.globl	_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i
	.type	_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i, @function
_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8AdditionPdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i, .-_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i
	.globl	_Z8AdditionPdS_S_i
	.type	_Z8AdditionPdS_S_i, @function
_Z8AdditionPdS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i
	.cfi_endproc
.LFE2057:
	.size	_Z8AdditionPdS_S_i, .-_Z8AdditionPdS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"\n CUDA error = %s\n"
.LC4:
	.string	"GPU Time in milliseconds= %.15f\n"
.LC5:
	.string	"\n *** N = %d DotProduct = %.15f ***\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, N(%rip)
	call	atoi@PLT
	movl	%eax, THREADSPERBLOCK(%rip)
	call	_Z16SetUpCudaDevicesv
	call	_Z14AllocateMemoryv
	leaq	8(%rsp), %rdi
	call	_Z11Innitializev
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movslq	N(%rip), %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movq	A_CPU(%rip), %rsi
	movq	A_GPU(%rip), %rdi
	salq	$3, %rdx
	call	cudaMemcpyAsync@PLT
	movslq	N(%rip), %rdx
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movq	B_CPU(%rip), %rsi
	movq	B_GPU(%rip), %rdi
	salq	$3, %rdx
	call	cudaMemcpyAsync@PLT
	movl	8+dimBlock(%rip), %ecx
	xorl	%r9d, %r9d
	movq	dimBlock(%rip), %rdx
	movq	dimGrid(%rip), %rdi
	movl	8+dimGrid(%rip), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movl	N(%rip), %ecx
	movq	C_GPU(%rip), %rdx
	movq	B_GPU(%rip), %rsi
	movq	A_GPU(%rip), %rdi
	call	_Z32__device_stub__Z8AdditionPdS_S_iPdS_S_i
.L18:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L17
.L19:
	movslq	N(%rip), %rdx
	movq	C_GPU(%rip), %rsi
	movl	$2, %ecx
	xorl	%r8d, %r8d
	movq	C_CPU(%rip), %rdi
	salq	$3, %rdx
	call	cudaMemcpyAsync@PLT
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	imulq	$1000000, 24(%rsp), %rax
	addq	32(%rsp), %rax
	imulq	$1000000, 8(%rsp), %rdx
	addq	16(%rsp), %rdx
	subq	%rdx, %rax
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	divsd	.LC3(%rip), %xmm0
	call	__printf_chk@PLT
	xorps	%xmm0, %xmm0
	movl	N(%rip), %edx
	movq	C_CPU(%rip), %rcx
	xorl	%eax, %eax
	movl	dimBlock(%rip), %esi
.L21:
	cmpl	%eax, %edx
	jle	.L25
	movslq	%eax, %rdi
	addl	%esi, %eax
	addsd	(%rcx,%rdi,8), %xmm0
	jmp	.L21
.L25:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	C_GPU(%rip), %r9
	movq	B_GPU(%rip), %r8
	movq	A_GPU(%rip), %rcx
	movq	C_CPU(%rip), %rdx
	movq	B_CPU(%rip), %rsi
	movq	A_CPU(%rip), %rdi
	call	_Z7CleanUpPdS_S_S_S_S_
	xorl	%eax, %eax
.L17:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z8AdditionPdS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8AdditionPdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	dimGrid
	.data
	.align 8
	.type	dimGrid, @object
	.size	dimGrid, 12
dimGrid:
	.long	1
	.long	1
	.long	1
	.globl	dimBlock
	.align 8
	.type	dimBlock, @object
	.size	dimBlock, 12
dimBlock:
	.long	1
	.long	1
	.long	1
	.globl	C_GPU
	.bss
	.align 8
	.type	C_GPU, @object
	.size	C_GPU, 8
C_GPU:
	.zero	8
	.globl	B_GPU
	.align 8
	.type	B_GPU, @object
	.size	B_GPU, 8
B_GPU:
	.zero	8
	.globl	A_GPU
	.align 8
	.type	A_GPU, @object
	.size	A_GPU, 8
A_GPU:
	.zero	8
	.globl	C_CPU
	.align 8
	.type	C_CPU, @object
	.size	C_CPU, 8
C_CPU:
	.zero	8
	.globl	B_CPU
	.align 8
	.type	B_CPU, @object
	.size	B_CPU, 8
B_CPU:
	.zero	8
	.globl	A_CPU
	.align 8
	.type	A_CPU, @object
	.size	A_CPU, 8
A_CPU:
	.zero	8
	.globl	N
	.align 4
	.type	N, @object
	.size	N, 4
N:
	.zero	4
	.globl	THREADSPERBLOCK
	.align 4
	.type	THREADSPERBLOCK, @object
	.size	THREADSPERBLOCK, 4
THREADSPERBLOCK:
	.zero	4
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.align 8
.LC3:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
	Barker Homework 8

	Finding the problem with GPU dot product

	To compile: nvcc dotProductRobustNot.cu -O3 -o dotProductRobustNot -lcudart
	To run: ./dotProductRobustNot lengthofvector sizeofblock
*/

#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <stdio.h>

// max number of block 65535 
// max number of threads per block 1024
// max number of threads 67107840

//#define THREADSPERBLOCK 1024

int THREADSPERBLOCK;

int N; //Global that holds the length of the vectors. It will be loaded from the command line

double *A_CPU, *B_CPU, *C_CPU; //CPU pointers

double *A_GPU, *B_GPU, *C_GPU; //GPU pointers

dim3 dimBlock; //This variable will hold the Dimensions of your block
dim3 dimGrid; //This variable will hold the Dimensions of your grid

//Select the block and grid architecture for the threads on the GPU
void SetUpCudaDevices()
{	
	//Threads in a block
	dimBlock.x = THREADSPERBLOCK;
	dimBlock.y = 1;
	dimBlock.z = 1;
	
	//Blocks in a grid
	dimGrid.x = (N - 1)/dimBlock.x + 1; //Makes enough blocks to add the whole vector. If N is greater than dimBlock.x*65535 you are out of luck.
	dimGrid.y = 1;
	dimGrid.z = 1;
}

void AllocateMemory()
{					
	//Allocate Device (GPU) Memory, & allocates the value of the specific pointer/array
	hipMalloc(&A_GPU,N*sizeof(double));
	hipMalloc(&B_GPU,N*sizeof(double));
	hipMalloc(&C_GPU,N*sizeof(double));

	//Allocate Host (CPU) Memory
	A_CPU = (double*)malloc(N*sizeof(double)); //(float*) to prevent from being a void
	B_CPU = (double*)malloc(N*sizeof(double));
	C_CPU = (double*)malloc(N*sizeof(double));
}

//Loads values into vectors that we will dot.
void Innitialize()
{
	int i;
	
	for(i = 0; i < N; i++)
	{		
		A_CPU[i] = (double)1;	
		B_CPU[i] = (double)1;
	}
}

//Cleaning up memory after we are finished.
void CleanUp(double *A_CPU,double *B_CPU,double *C_CPU,double *A_GPU,double *B_GPU,double *C_GPU)
{
	free(A_CPU); free(B_CPU); free(C_CPU);
	hipFree(A_GPU); hipFree(B_GPU); hipFree(C_GPU);
}

//This is the kernel. It is the function that will run on the GPU.
__global__ void Addition(double *A, double *B, double *C, int n)
{	
	int id = blockDim.x*blockIdx.x + threadIdx.x;

	//Multiplying the vectors
	if(id < n)
	{
		C[id] = A[id] * B[id];
	}
	__syncthreads();

	int fold = blockDim.x;
	while(fold > 1)
	{  
		if(fold%2 != 0)  //Checking to see if the fold is even
		{
			if(threadIdx.x == 0 && id + (fold - 1) < n) //If fold is not even add the last element and now it is
			{
				fold = fold - 1;
				C[id] = C[id] + C[id + fold];
			}
		}
		
		fold = fold/2; //Fold the remaining parts in
		if(threadIdx.x < fold && id + fold < n)
		{
			C[id] = C[id] + C[id + fold];
		}
		__syncthreads();
	}
}

int main(int argc, char** argv)
{
	int i;
	
	N = atoi(argv[1]); //Reading the length of the vectors from the command line
	
	THREADSPERBLOCK = atoi(argv[2]); //Reading the size of the blocks
	
	timeval start, end;
	hipError_t err;

	//Set the thread structure that you will be using on the GPU		
	SetUpCudaDevices();

	//Partitioning off the memory that you will be using.
	AllocateMemory();

	//Loading up values to be added.
	Innitialize();
	
	//Starting the timer
	gettimeofday(&start, NULL);

	//Copy Memory from CPU to GPU		
	hipMemcpyAsync(A_GPU, A_CPU, N*sizeof(double), hipMemcpyHostToDevice);
	hipMemcpyAsync(B_GPU, B_CPU, N*sizeof(double), hipMemcpyHostToDevice);
	
	//Calling the Kernel (GPU) function.	
	Addition<<<dimGrid, dimBlock>>>(A_GPU, B_GPU, C_GPU, N);

	//Checking to see if the Kernel had any problems.
	err = hipGetLastError();
	if (err != 0) 
	{
		printf("\n CUDA error = %s\n", hipGetErrorString(err));
		return(1);
	}
	
	//Copy Memory from GPU to CPU	
	hipMemcpyAsync(C_CPU, C_GPU, N*sizeof(double), hipMemcpyDeviceToHost);

	//Stopping the timer
	gettimeofday(&end, NULL);

	//Calculating the total time used in the addition and converting it to milliseconds.
	float time = (end.tv_sec * 1000000 + end.tv_usec) - (start.tv_sec * 1000000 + start.tv_usec);
	
	//Displaying the time
	printf("GPU Time in milliseconds= %.15f\n", (time/1000.0));

	//Add up the remaining info to get the final dot product
	double dot = 0.0;	
	for(i = 0; i < N; i = i + dimBlock.x)	
	{		
		dot = dot + C_CPU[i];
	}

	//Displaying the dot product.
	printf("\n *** N = %d DotProduct = %.15f ***\n",N, dot);

	//You're done so cleanup your mess.	
	CleanUp(A_CPU,B_CPU,C_CPU,A_GPU,B_GPU,C_GPU);	
	
	return(0);
}

	.text
	.file	"hw08.hip"
	.globl	_Z16SetUpCudaDevicesv           # -- Begin function _Z16SetUpCudaDevicesv
	.type	_Z16SetUpCudaDevicesv,@function
_Z16SetUpCudaDevicesv:                  # @_Z16SetUpCudaDevicesv
	.cfi_startproc
# %bb.0:
	movl	THREADSPERBLOCK(%rip), %ecx
	movl	%ecx, dimBlock(%rip)
	movabsq	$4294967297, %rsi               # imm = 0x100000001
	movq	%rsi, dimBlock+4(%rip)
	movl	N(%rip), %eax
	decl	%eax
	xorl	%edx, %edx
	divl	%ecx
	incl	%eax
	movl	%eax, dimGrid(%rip)
	movq	%rsi, dimGrid+4(%rip)
	retq
.Lfunc_end0:
	.size	_Z16SetUpCudaDevicesv, .Lfunc_end0-_Z16SetUpCudaDevicesv
	.cfi_endproc
                                        # -- End function
	.globl	_Z14AllocateMemoryv             # -- Begin function _Z14AllocateMemoryv
	.type	_Z14AllocateMemoryv,@function
_Z14AllocateMemoryv:                    # @_Z14AllocateMemoryv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	N(%rip), %rsi
	shlq	$3, %rsi
	movl	$A_GPU, %edi
	callq	hipMalloc
	movslq	N(%rip), %rsi
	shlq	$3, %rsi
	movl	$B_GPU, %edi
	callq	hipMalloc
	movslq	N(%rip), %rsi
	shlq	$3, %rsi
	movl	$C_GPU, %edi
	callq	hipMalloc
	movslq	N(%rip), %rbx
	shlq	$3, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, A_CPU(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, B_CPU(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, C_CPU(%rip)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14AllocateMemoryv, .Lfunc_end1-_Z14AllocateMemoryv
	.cfi_endproc
                                        # -- End function
	.globl	_Z11Innitializev                # -- Begin function _Z11Innitializev
	.type	_Z11Innitializev,@function
_Z11Innitializev:                       # @_Z11Innitializev
	.cfi_startproc
# %bb.0:
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB2_3
# %bb.1:                                # %.lr.ph
	movq	A_CPU(%rip), %rcx
	movq	B_CPU(%rip), %rdx
	xorl	%esi, %esi
	movabsq	$4607182418800017408, %rdi      # imm = 0x3FF0000000000000
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rdi, (%rcx,%rsi,8)
	movq	%rdi, (%rdx,%rsi,8)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB2_2
.LBB2_3:                                # %._crit_edge
	retq
.Lfunc_end2:
	.size	_Z11Innitializev, .Lfunc_end2-_Z11Innitializev
	.cfi_endproc
                                        # -- End function
	.globl	_Z7CleanUpPdS_S_S_S_S_          # -- Begin function _Z7CleanUpPdS_S_S_S_S_
	.type	_Z7CleanUpPdS_S_S_S_S_,@function
_Z7CleanUpPdS_S_S_S_S_:                 # @_Z7CleanUpPdS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movq	%rdx, %r12
	movq	%rsi, %r13
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r15, %rdi
	callq	hipFree
	movq	%r14, %rdi
	callq	hipFree
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end3:
	.size	_Z7CleanUpPdS_S_S_S_S_, .Lfunc_end3-_Z7CleanUpPdS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__AdditionPdS_S_i # -- Begin function _Z23__device_stub__AdditionPdS_S_i
	.type	_Z23__device_stub__AdditionPdS_S_i,@function
_Z23__device_stub__AdditionPdS_S_i:     # @_Z23__device_stub__AdditionPdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8AdditionPdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z23__device_stub__AdditionPdS_S_i, .Lfunc_end4-_Z23__device_stub__AdditionPdS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	%eax, N(%rip)
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ecx
	movl	%eax, THREADSPERBLOCK(%rip)
	movl	%eax, dimBlock(%rip)
	movabsq	$4294967297, %rsi               # imm = 0x100000001
	movq	%rsi, dimBlock+4(%rip)
	decl	%ebp
	movl	%ebp, %eax
	xorl	%edx, %edx
	divl	%ecx
	incl	%eax
	movl	%eax, dimGrid(%rip)
	movq	%rsi, dimGrid+4(%rip)
	callq	_Z14AllocateMemoryv
	movl	N(%rip), %eax
	testl	%eax, %eax
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph.i
	movq	A_CPU(%rip), %rcx
	movq	B_CPU(%rip), %rdx
	xorl	%esi, %esi
	movabsq	$4607182418800017408, %rdi      # imm = 0x3FF0000000000000
.LBB5_2:                                # =>This Inner Loop Header: Depth=1
	movq	%rdi, (%rcx,%rsi,8)
	movq	%rdi, (%rdx,%rsi,8)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB5_2
.LBB5_3:                                # %_Z11Innitializev.exit
	movq	%rsp, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	A_GPU(%rip), %rdi
	movq	A_CPU(%rip), %rsi
	movslq	N(%rip), %rdx
	shlq	$3, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movq	B_GPU(%rip), %rdi
	movq	B_CPU(%rip), %rsi
	movslq	N(%rip), %rdx
	shlq	$3, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movq	dimGrid(%rip), %rdi
	movl	dimGrid+8(%rip), %esi
	movq	dimBlock(%rip), %rdx
	movl	dimBlock+8(%rip), %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_5
# %bb.4:
	movq	A_GPU(%rip), %rdi
	movq	B_GPU(%rip), %rsi
	movq	C_GPU(%rip), %rdx
	movl	N(%rip), %ecx
	callq	_Z23__device_stub__AdditionPdS_S_i
.LBB5_5:
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_7
# %bb.6:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %ebx
	jmp	.LBB5_12
.LBB5_7:
	movq	C_CPU(%rip), %rdi
	movq	C_GPU(%rip), %rsi
	movslq	N(%rip), %rdx
	shlq	$3, %rdx
	xorl	%ebx, %ebx
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r14), %rax
	subq	(%rsp), %rax
	movq	8(%r14), %rcx
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	8(%rsp), %rcx
	addq	%rax, %rcx
	cvtsi2ss	%rcx, %xmm0
	cvtss2sd	%xmm0, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movl	N(%rip), %esi
	testl	%esi, %esi
	jle	.LBB5_8
# %bb.9:                                # %.lr.ph
	movq	C_CPU(%rip), %rax
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
	movl	dimBlock(%rip), %edx
.LBB5_10:                               # =>This Inner Loop Header: Depth=1
	movslq	%ecx, %rcx
	addsd	(%rax,%rcx,8), %xmm0
	addl	%edx, %ecx
	cmpl	%esi, %ecx
	jl	.LBB5_10
	jmp	.LBB5_11
.LBB5_8:
	xorpd	%xmm0, %xmm0
.LBB5_11:                               # %._crit_edge
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	A_CPU(%rip), %rdi
	movq	B_CPU(%rip), %rsi
	movq	C_CPU(%rip), %rdx
	movq	A_GPU(%rip), %rcx
	movq	B_GPU(%rip), %r8
	movq	C_GPU(%rip), %r9
	callq	_Z7CleanUpPdS_S_S_S_S_
.LBB5_12:
	movl	%ebx, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8AdditionPdS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	THREADSPERBLOCK,@object         # @THREADSPERBLOCK
	.bss
	.globl	THREADSPERBLOCK
	.p2align	2, 0x0
THREADSPERBLOCK:
	.long	0                               # 0x0
	.size	THREADSPERBLOCK, 4

	.type	N,@object                       # @N
	.globl	N
	.p2align	2, 0x0
N:
	.long	0                               # 0x0
	.size	N, 4

	.type	A_CPU,@object                   # @A_CPU
	.globl	A_CPU
	.p2align	3, 0x0
A_CPU:
	.quad	0
	.size	A_CPU, 8

	.type	B_CPU,@object                   # @B_CPU
	.globl	B_CPU
	.p2align	3, 0x0
B_CPU:
	.quad	0
	.size	B_CPU, 8

	.type	C_CPU,@object                   # @C_CPU
	.globl	C_CPU
	.p2align	3, 0x0
C_CPU:
	.quad	0
	.size	C_CPU, 8

	.type	A_GPU,@object                   # @A_GPU
	.globl	A_GPU
	.p2align	3, 0x0
A_GPU:
	.quad	0
	.size	A_GPU, 8

	.type	B_GPU,@object                   # @B_GPU
	.globl	B_GPU
	.p2align	3, 0x0
B_GPU:
	.quad	0
	.size	B_GPU, 8

	.type	C_GPU,@object                   # @C_GPU
	.globl	C_GPU
	.p2align	3, 0x0
C_GPU:
	.quad	0
	.size	C_GPU, 8

	.type	dimBlock,@object                # @dimBlock
	.data
	.globl	dimBlock
	.p2align	3, 0x0
dimBlock:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.size	dimBlock, 12

	.type	dimGrid,@object                 # @dimGrid
	.globl	dimGrid
	.p2align	3, 0x0
dimGrid:
	.long	1                               # 0x1
	.long	1                               # 0x1
	.long	1                               # 0x1
	.size	dimGrid, 12

	.type	_Z8AdditionPdS_S_i,@object      # @_Z8AdditionPdS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z8AdditionPdS_S_i
	.p2align	3, 0x0
_Z8AdditionPdS_S_i:
	.quad	_Z23__device_stub__AdditionPdS_S_i
	.size	_Z8AdditionPdS_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n CUDA error = %s\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPU Time in milliseconds= %.15f\n"
	.size	.L.str.1, 33

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n *** N = %d DotProduct = %.15f ***\n"
	.size	.L.str.2, 37

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8AdditionPdS_S_i"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__AdditionPdS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym A_GPU
	.addrsig_sym B_GPU
	.addrsig_sym C_GPU
	.addrsig_sym _Z8AdditionPdS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8AdditionPdS_S_i      ; -- Begin function _Z8AdditionPdS_S_i
	.globl	_Z8AdditionPdS_S_i
	.p2align	8
	.type	_Z8AdditionPdS_S_i,@function
_Z8AdditionPdS_S_i:                     ; @_Z8AdditionPdS_S_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x18
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s5, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[8:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s8, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s2, v3
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f64 v[5:6], v[5:6], v[7:8]
	global_store_b64 v[3:4], v[5:6], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s5, 2
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_11
; %bb.3:                                ; %.lr.ph
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_dual_mov_b32 v6, s5 :: v_dual_mov_b32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, s0, s2, v2
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, v2, -8
	v_add_co_ci_u32_e64 v9, s0, -1, v3, s0
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	v_and_b32_e32 v4, 1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, 1, v4
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v4, -1, v6
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v4, v1
	v_cmpx_gt_i32_e64 s4, v7
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	v_add_co_u32 v6, s0, v8, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s0, v9, v7, s0
	s_clause 0x1
	global_load_b64 v[10:11], v[2:3], off
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[10:11], v[6:7]
	v_mov_b32_e32 v6, v4
	global_store_b64 v[2:3], v[10:11], off
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_8:                                ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_lshrrev_b32_e32 v4, 1, v6
	v_add_nc_u32_e32 v7, v4, v1
	v_cmp_lt_u32_e64 s0, v0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s1, s4, v7
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	v_lshlrev_b64 v[10:11], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s0, v2, v10
	v_add_co_ci_u32_e64 v11, s0, v3, v11, s0
	s_clause 0x1
	global_load_b64 v[12:13], v[2:3], off
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[12:13], v[10:11]
	global_store_b64 v[2:3], v[10:11], off
.LBB0_10:                               ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_gt_u32_e64 s0, 4, v6
	v_mov_b32_e32 v6, v4
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_or_b32 s2, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_4
.LBB0_11:                               ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8AdditionPdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8AdditionPdS_S_i, .Lfunc_end0-_Z8AdditionPdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8AdditionPdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8AdditionPdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
