#include "Backpropogation.cuh"
#include "NeuralNetwork.cuh"

/**
  *	Gets the errors associated with each neuron's output
  *	Parameter nn: the neural network to get the error for
  *	Parameter errors: the matrix to put the errors in
  *	Parameter layer: the layer to get the error for
  *	Return: nothing
  */

__global__
void getErrorKernel(NeuralNet* nn, double** errors, double** outputs, double* expected, int layer){

	for(int neuron1 = threadIdx.x + (blockDim.x * blockIdx.x); neuron1 < nn ->neurons[layer]; neuron1 += blockDim.x*gridDim.x){

		// The last layer's error
		if(layer == nn->layers - 1){
			//printf("actual - expected = %f - %f = %f\n", outputs[nn->layers - 1][neuron1], expected[neuron1], outputs[nn->layers - 1][neuron1]-expected[neuron1]);

			errors[layer][neuron1] = outputs[nn->layers - 1][neuron1] - expected[neuron1];
		}
	
		// The remaining layers' errors
		else{

			// Zeros the error
			errors[layer][neuron1] = 0;
	
			// Uses the derivative of the outputs with respect to the inputs
			for(int neuron2 = 0; neuron2 < nn->neurons[layer+1]; neuron2++){
				switch(nn->activations[layer][neuron2]){
					case LINEAR:
						errors[layer][neuron1] += 
						       (errors[layer + 1][neuron2] * 
							nn -> weights[layer][neuron1][neuron2]);
						break;
	
					case BINARY_STEP:
						break;
	
					case LOGISTIC:
						errors[layer][neuron1] += 
							(errors[layer + 1][neuron2] * 
							 nn -> weights[layer][neuron1][neuron2] * 
							 outputs[layer + 1][neuron2] * 
							 (1 - outputs[layer + 1][neuron2]));
						break;
	
					case TANH:
						errors[layer][neuron1] += 
							(errors[layer + 1][neuron2] * 
							 nn -> weights[layer][neuron1][neuron2] * 
							 (1 - (outputs[layer + 1][neuron2] * 
							       outputs[layer + 1][neuron2])));
						break;
	
					case RELU:
						if(outputs[layer + 1][neuron2] > 0){
							errors[layer][neuron1] += 
								(errors[layer + 1][neuron2] * 
							 	nn -> weights[layer][neuron1][neuron2]);
						}
						break;
	
					case LEAKYRELU:
						if(outputs[layer + 1][neuron2] < 0){
							errors[layer][neuron1] += 
								(errors[layer + 1][neuron2] * 
								 nn -> weights[layer][neuron1][neuron2] * .01);
						}
	
						else{
							errors[layer][neuron1] += 
								(errors[layer + 1][neuron2] * 
								 nn -> weights[layer][neuron1][neuron2]);
						}
						break;
				}
			}
		}
	}
}

/**
  *	Backpropogates the weights in the neural net
  *	Parameter nn: the neural network to backpropogate
  *	Parameter layer: the layer that is being backpropogated
  *	Returns: nothing
  */

__global__
void backpropogationWeightsKernel(NeuralNet* nn, double** outputs, 
		double** error, double*** deltaWeights, int layer){

	for(int neuron1 = threadIdx.x + (blockDim.x* blockIdx.x); neuron1 < nn -> neurons[layer]; neuron1 += (blockDim.x * gridDim.x)){
		for(int neuron2 = threadIdx.y + (blockDim.y * blockIdx.y); neuron2 < nn->neurons[layer + 1]; neuron2 += (blockDim.y * gridDim.y)){

			switch(nn->activations[layer][neuron2]){
				case LINEAR:
					deltaWeights[layer][neuron1][neuron2] += 
						(LEARNING_RATE * 
						 error[layer + 1][neuron2] * 
						 outputs[layer][neuron1]);
					break;
		
				case BINARY_STEP:
					// This has a derivative of 0 everywhere so 
					// nothing needs to be added
					break;
		
				case LOGISTIC:
					deltaWeights[layer][neuron1][neuron2] +=
						(LEARNING_RATE * error[layer + 1][neuron2] *
						 outputs[layer][neuron1] * 
						 (outputs[layer][neuron2] * 
						  (1 - outputs[layer][neuron2])));
					break;
		
				case TANH:
					deltaWeights[layer][neuron1][neuron2] +=
						(LEARNING_RATE * error[layer + 1][neuron2] *
						 outputs[layer][neuron1] * 
						 (1 - (outputs[layer][neuron2] * 
						       outputs[layer][neuron2])));
					break;
		
				case RELU:
					if(outputs[layer][neuron2] > 0){
						deltaWeights[layer][neuron1][neuron2] +=
							(LEARNING_RATE * 
							 error[layer + 1][neuron2] * 
							 outputs[layer][neuron1]);
					}
					break;
		
				case LEAKYRELU:
					if(outputs[layer + 1][neuron2] < 0){
						deltaWeights[layer][neuron1][neuron2] +=
							(LEARNING_RATE * 
							 error[layer + 1][neuron2] * 
							 outputs[layer][neuron1] * .01);
					}
		
					else{
						deltaWeights[layer][neuron1][neuron2] += 
							(LEARNING_RATE * 
							 error[layer + 1][neuron2] * 
							 outputs[layer][neuron1]);
					}
					break;
			}

		}
	}
}

/**
  *	Backpropogates the biases in the neural net
  *	Parameter nn: the neural network to backpropogate
  *	Parameter layer: the layer that is being backpropogated
  *	Returns: nothing
  */

__global__
void backpropogationBiasesKernel(NeuralNet* nn, double** outputs, double** error, double** deltaBiases, int layer){

	for(int neuron = threadIdx.x + (blockDim.x * blockIdx.x); neuron < nn->neurons[layer]; neuron += (blockDim.x * gridDim.x)){

		switch(nn->activations[layer][neuron]){
			case LINEAR:
				deltaBiases[layer][neuron] += 
					(LEARNING_RATE * 
					 error[layer][neuron]);
				break;
	
			case BINARY_STEP:
				// This has a derivative of 0 everywhere
				// so nothing needs to be added
				break;
	
			case LOGISTIC:
				deltaBiases[layer][neuron] += 
					(LEARNING_RATE * 
					 error[layer][neuron] * 
					 outputs[layer][neuron] * 
					 (1 - outputs[layer][neuron]));
				break;
	
			case TANH:
				deltaBiases[layer][neuron] += 
					(LEARNING_RATE * 
					 error[layer][neuron] * 
					 (1 - (outputs[layer][neuron] * 
					  outputs[layer][neuron])));
				break;
	
			case RELU:
				if(outputs[layer][neuron] > 0){
					deltaBiases[layer][neuron] += 
						(LEARNING_RATE * 
						 error[layer][neuron]);
				}
				break;
	
			case LEAKYRELU:
				if(outputs[layer][neuron] < 0){
					deltaBiases[layer][neuron] += 
						(LEARNING_RATE * 
						 error[layer][neuron] * 
						 .01);
				}
	
				else{
					deltaBiases[layer][neuron] += 
						(LEARNING_RATE * 
						 error[layer][neuron]);
				}
				break;
		}
	}
}

/**
  *	Changes the weights in the neural net
  *	Parameter nn: the neural network to change the weights in
  *	Parameter deltaWeights: the matrix of total unaveraged weight changes
  *	Parameter numOutputs: the number of outputs to average
  *	Returns: nothing
  */

__global__
void changeWeights(NeuralNet* nn, double*** deltaWeights, int numOutputs){
	for(int layer = threadIdx.x + (blockDim.x * blockIdx.x); layer < nn->layers-1; layer += (blockDim.x * gridDim.x)){
		for(int neuron1 = threadIdx.y + (blockDim.y * blockIdx.y); neuron1 < nn->neurons[layer]; neuron1 += (blockDim.y * gridDim.y)){
			for(int neuron2 = threadIdx.z + (blockDim.z * blockIdx.z); neuron2 < nn->neurons[layer + 1]; neuron2 += (blockDim.z * gridDim.z)){
				double delta=deltaWeights[layer][neuron1][neuron2]/numOutputs;
				if(delta<GRADIENT_CEILING && delta>-GRADIENT_CEILING){
					nn->weights[layer][neuron1][neuron2] -= (deltaWeights[layer][neuron1][neuron2] / numOutputs);
				}
				else{
					if(delta<0){
						nn->weights[layer][neuron1][neuron2]-=(-GRADIENT_CEILING);
					}
					else{
						nn->weights[layer][neuron1][neuron2]-=(GRADIENT_CEILING);
					}
				}
			}
		}
	}
}

/**
  *	Changes the biases in the neural net
  *	Parameter nn: the neural network to change the biases in
  *	Parameter deltaBiases: the matrix of total unaveraged bias changes
  *	Parameter numOutputs: the total number of outputs to average
  *	Returns: nothing
  */

__global__
void changeBiases(NeuralNet* nn, double** deltaBiases, int numOutputs){
	for(int layer = threadIdx.x + (blockDim.x * blockIdx.x); layer < nn->layers - 1; layer += (blockDim.x * gridDim.x)){
		for(int neuron = threadIdx.y + (blockDim.y * blockIdx.y); neuron < nn->neurons[layer]; neuron += blockDim.y * gridDim.y){
			double delta=deltaBiases[layer][neuron]/numOutputs;
			if(delta<GRADIENT_CEILING && delta>-GRADIENT_CEILING){
				nn->biases[layer][neuron] -= (deltaBiases[layer][neuron] / numOutputs);
			}
			else{
				if(delta<0){
					nn->biases[layer][neuron] -= (-GRADIENT_CEILING);
				}
				else{
					nn->biases[layer][neuron] -= (GRADIENT_CEILING);
				}
			}
		}
	}
}

/**
  *	Backpropogates the neural network with the actual and expected outputs
  *	Parameter nn: the neural network to backpropogate
  *	Parameter actual: the actual outputs given by the neural network
  *	Parameter expected: the expected outputs given by the neural network
  *	Parameter numOutputs: the number of outputs
  *	Returns: nothing
  */

void backpropogate(NeuralNet* nn, double*** outputs, double** expected, int numOutputs){

	// Gets an matrix for the error
	double** error = getNeuralMatrix(nn);

	double** deltaBiasMatrix=getNeuralMatrix(nn);

	double*** deltaWeightMatrix=getNeuralWeightMatrix(nn);

	// Loops through the outputs
	for(int output = 0; output < numOutputs; output++){
		for(int layer=nn->layers - 1; layer >= 0; layer--){

			// Gets the error
			getErrorKernel<<<NUMBLOCKS, BLOCKSIZE>>>(nn, error, outputs[output], expected[output], layer);
			cudaDeviceSynchronize();

			// Backpropgate the weights/biases
			if(layer != nn->layers - 1){
				backpropogationWeightsKernel<<<dim3(NUMBLOCKS, NUMBLOCKS), dim3(BLOCKSIZE/4, BLOCKSIZE/4)>>>(nn, outputs[output], error, deltaWeightMatrix, layer);
				cudaDeviceSynchronize();

				backpropogationBiasesKernel<<<NUMBLOCKS, BLOCKSIZE>>>(nn, outputs[output], error, deltaBiasMatrix, layer);
				cudaDeviceSynchronize();
			}
		}
	}

	// Changes the weights in the neural net
	changeWeights<<<dim3(NUMBLOCKS, NUMBLOCKS, NUMBLOCKS), dim3(BLOCKSIZE/16, BLOCKSIZE/16, BLOCKSIZE/16)>>>(nn, deltaWeightMatrix, numOutputs);
	cudaDeviceSynchronize();

	// Changes the biases in the neural net
	changeBiases<<<dim3(NUMBLOCKS, NUMBLOCKS), dim3(BLOCKSIZE/4, BLOCKSIZE/4)>>>(nn, deltaBiasMatrix, numOutputs);
	cudaDeviceSynchronize();

	// Frees the error matrix
	freeNeuralMatrix(error, nn);

	// Frees the bias matrix
	freeNeuralMatrix(deltaBiasMatrix, nn);

	// Frees the weight matrix
	freeNeuralWeightMatrix(deltaWeightMatrix, nn);
}

/**
  *	Allocates memory for and zeros a matrix of the same size as the neural network's nodes
  *	Parameter nn: the neural network to get the dimensions from
  *	Returns: a matrix of the same size as the neural network's nodes
  */

double** getNeuralMatrix(NeuralNet* nn){
	
	double** matrix;
	cudaMallocManaged(&matrix, nn->layers*sizeof(double*));

	for(int layer = 0; layer < nn->layers; layer++){
		cudaMallocManaged(&matrix[layer], nn->neurons[layer]*sizeof(double));
		
		for(int neuron = 0; neuron < nn->neurons[layer]; neuron++){
			matrix[layer][neuron] = 0;
		}
	}

	return matrix;
}

/**
  *	Frees the neural matrix
  *	Parameter matrix: the matrix to feree
  *	Parameter nn: the neural network to get the dimensions from
  *	Returns: nothing
  */


void freeNeuralMatrix(double** matrix, NeuralNet* nn){
	
	for(int layer = 0; layer < nn->layers; layer++){
		cudaFree(matrix[layer]);
	}

	cudaFree(matrix);
}

/**
  *	Allocates memory and zeros a matrix of the same size as the neural network's weight matrix
  *	Parameter nn: the neural network to get the weight matrix from
  *	Returns: a matrix of the same size as the neural network's weight matrix
  */

double*** getNeuralWeightMatrix(NeuralNet* nn){

	double*** matrix;
	cudaMallocManaged(&matrix, nn->layers * sizeof(double**));

	for(int layer = 0; layer < nn->layers-1; layer++){

		cudaMallocManaged(&matrix[layer], nn->neurons[layer] * sizeof(double*));
		for(int neuron1 = 0; neuron1 < nn->neurons[layer]; neuron1++){

			cudaMallocManaged(&matrix[layer][neuron1], nn->neurons[layer+1] * sizeof(double));
			for(int neuron2 = 0; neuron2 < nn->neurons[layer + 1]; neuron2++){
				matrix[layer][neuron1][neuron2] = 0;
			}
		}
	}

	return matrix;
}

/**
  *	Frees the neural weight matrix
  *	Parameter matrix: the neural weight matrix
  *	Parameter nn: the neural network to get the dimensions from
  *	Returns: nothing
  */

void freeNeuralWeightMatrix(double*** matrix, NeuralNet* nn){

	for(int layer = 0; layer < nn->layers - 1; layer++){
		for(int neuron1 = 0; neuron1 < nn->neurons[layer]; neuron1++){
			cudaFree(matrix[layer][neuron1]);
		}

		cudaFree(matrix[layer]);
	}

	cudaFree(matrix);
}


	.file	"tmpxft_00363c4f_00000000-6_Backpropogation.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15getNeuralMatrixP2nn
	.type	_Z15getNeuralMatrixP2nn, @function
_Z15getNeuralMatrixP2nn:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$1, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movslq	(%rdi), %rsi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
.L3:
	movq	(%rsp), %rax
	cmpl	%ebx, 0(%rbp)
	jle	.L10
	movq	8(%rbp), %rdx
	leaq	0(,%rbx,8), %r12
	leaq	(%rax,%r12), %rdi
	movslq	(%rdx,%rbx,4), %rsi
	movl	$1, %edx
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rbp), %rax
	addq	(%rsp), %r12
	movl	(%rax,%rbx,4), %edx
	xorl	%eax, %eax
.L4:
	cmpl	%eax, %edx
	jle	.L11
	movq	(%r12), %rcx
	movq	$0x000000000, (%rcx,%rax,8)
	incq	%rax
	jmp	.L4
.L11:
	incq	%rbx
	jmp	.L3
.L10:
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z15getNeuralMatrixP2nn, .-_Z15getNeuralMatrixP2nn
	.globl	_Z16freeNeuralMatrixPPdP2nn
	.type	_Z16freeNeuralMatrixPPdP2nn, @function
_Z16freeNeuralMatrixPPdP2nn:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rdi, %rbx
.L13:
	cmpl	%ebp, (%r12)
	jle	.L16
	movq	(%rbx,%rbp,8), %rdi
	incq	%rbp
	call	cudaFree@PLT
	jmp	.L13
.L16:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z16freeNeuralMatrixPPdP2nn, .-_Z16freeNeuralMatrixPPdP2nn
	.globl	_Z21getNeuralWeightMatrixP2nn
	.type	_Z21getNeuralWeightMatrixP2nn, @function
_Z21getNeuralWeightMatrixP2nn:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$1, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movslq	(%rdi), %rsi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
.L18:
	movl	(%rbx), %ecx
	movq	16(%rsp), %rax
	leal	-1(%rcx), %edx
	cmpl	%ebp, %edx
	jle	.L26
	movq	8(%rbx), %rdx
	leaq	0(,%rbp,8), %r14
	leaq	0(,%rbp,4), %r13
	xorl	%r12d, %r12d
	leaq	(%rax,%r14), %rdi
	leaq	4(%r13), %r15
	movslq	(%rdx,%rbp,4), %rsi
	movl	$1, %edx
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
.L19:
	movq	8(%rbx), %rax
	movq	16(%rsp), %rdx
	cmpl	%r12d, (%rax,%r13)
	jle	.L27
	movslq	(%rax,%r15), %rsi
	leaq	0(,%r12,8), %rcx
	movq	%rcx, %rdi
	addq	(%rdx,%r14), %rdi
	movl	$1, %edx
	movq	%rcx, 8(%rsp)
	salq	$3, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rbx), %rax
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rcx
	movl	(%rax,%r15), %edx
	addq	%r14, %rsi
	xorl	%eax, %eax
.L20:
	cmpl	%eax, %edx
	jle	.L28
	movq	(%rsi), %rdi
	movq	(%rdi,%rcx), %rdi
	movq	$0x000000000, (%rdi,%rax,8)
	incq	%rax
	jmp	.L20
.L28:
	incq	%r12
	jmp	.L19
.L27:
	incq	%rbp
	jmp	.L18
.L26:
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z21getNeuralWeightMatrixP2nn, .-_Z21getNeuralWeightMatrixP2nn
	.globl	_Z22freeNeuralWeightMatrixPPPdP2nn
	.type	_Z22freeNeuralWeightMatrixPPPdP2nn, @function
_Z22freeNeuralWeightMatrixPPPdP2nn:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
.L30:
	movl	0(%r13), %eax
	decl	%eax
	cmpl	%ebx, %eax
	jle	.L32
	leaq	0(,%rbx,4), %r14
	xorl	%r12d, %r12d
.L33:
	movq	8(%r13), %rax
	movq	0(%rbp,%rbx,8), %rdi
	cmpl	%r12d, (%rax,%r14)
	jle	.L35
	movq	(%rdi,%r12,8), %rdi
	incq	%r12
	call	cudaFree@PLT
	jmp	.L33
.L35:
	call	cudaFree@PLT
	incq	%rbx
	jmp	.L30
.L32:
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	cudaFree@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z22freeNeuralWeightMatrixPPPdP2nn, .-_Z22freeNeuralWeightMatrixPPPdP2nn
	.globl	_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i
	.type	_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i, @function
_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z14getErrorKernelP2nnPPdS2_S1_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L36:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i, .-_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i
	.globl	_Z14getErrorKernelP2nnPPdS2_S1_i
	.type	_Z14getErrorKernelP2nnPPdS2_S1_i, @function
_Z14getErrorKernelP2nnPPdS2_S1_i:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i
	.cfi_endproc
.LFE2057:
	.size	_Z14getErrorKernelP2nnPPdS2_S1_i, .-_Z14getErrorKernelP2nnPPdS2_S1_i
	.globl	_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i
	.type	_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i, @function
_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L41:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i, .-_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i
	.globl	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.type	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i, @function
_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i
	.cfi_endproc
.LFE2059:
	.size	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i, .-_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.globl	_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i
	.type	_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i, @function
_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L46:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i, .-_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i
	.globl	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.type	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i, @function
_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i
	.cfi_endproc
.LFE2061:
	.size	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i, .-_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.globl	_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi
	.type	_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi, @function
_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13changeWeightsP2nnPPPdi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L51:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi, .-_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi
	.globl	_Z13changeWeightsP2nnPPPdi
	.type	_Z13changeWeightsP2nnPPPdi, @function
_Z13changeWeightsP2nnPPPdi:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi
	.cfi_endproc
.LFE2063:
	.size	_Z13changeWeightsP2nnPPPdi, .-_Z13changeWeightsP2nnPPPdi
	.globl	_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi
	.type	_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi, @function
_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12changeBiasesP2nnPPdi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L56:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi, .-_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi
	.globl	_Z12changeBiasesP2nnPPdi
	.type	_Z12changeBiasesP2nnPPdi, @function
_Z12changeBiasesP2nnPPdi:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi
	.cfi_endproc
.LFE2065:
	.size	_Z12changeBiasesP2nnPPdi, .-_Z12changeBiasesP2nnPPdi
	.globl	_Z13backpropogateP2nnPPPdS2_i
	.type	_Z13backpropogateP2nnPPPdS2_i, @function
_Z13backpropogateP2nnPPPdS2_i:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4294967360, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movl	%ecx, 28(%rsp)
	call	_Z15getNeuralMatrixP2nn
	movq	%rbx, %rdi
	movq	%rax, (%rsp)
	call	_Z15getNeuralMatrixP2nn
	movq	%rbx, %rdi
	movq	%rax, 8(%rsp)
	call	_Z21getNeuralWeightMatrixP2nn
	movq	%rax, 16(%rsp)
.L62:
	cmpl	%r12d, 28(%rsp)
	jle	.L73
	movl	(%rbx), %eax
	leal	-1(%rax), %ebp
.L63:
	testl	%ebp, %ebp
	js	.L74
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r14, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movq	(%r15,%r12,8), %rcx
	movq	0(%r13,%r12,8), %rdx
	movl	%ebp, %r8d
	movq	%rbx, %rdi
	movq	(%rsp), %rsi
	call	_Z46__device_stub__Z14getErrorKernelP2nnPPdS2_S1_iP2nnPPdS2_S1_i
.L64:
	call	cudaDeviceSynchronize@PLT
	movl	(%rbx), %eax
	decl	%eax
	cmpl	%ebp, %eax
	je	.L65
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 60(%rsp)
	movabsq	$17179869188, %rdi
	movq	%rdx, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	movq	0(%r13,%r12,8), %rsi
	movq	16(%rsp), %rcx
	movl	%ebp, %r8d
	movq	%rbx, %rdi
	movq	(%rsp), %rdx
	call	_Z61__device_stub__Z28backpropogationWeightsKernelP2nnPPdS2_PS2_iP2nnPPdS2_PS2_i
.L66:
	call	cudaDeviceSynchronize@PLT
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r14, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	movq	0(%r13,%r12,8), %rsi
	movq	8(%rsp), %rcx
	movl	%ebp, %r8d
	movq	%rbx, %rdi
	movq	(%rsp), %rdx
	call	_Z59__device_stub__Z27backpropogationBiasesKernelP2nnPPdS2_S2_iP2nnPPdS2_S2_i
.L67:
	call	cudaDeviceSynchronize@PLT
.L65:
	decl	%ebp
	jmp	.L63
.L74:
	incq	%r12
	jmp	.L62
.L73:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$4, %ecx
	movl	$4, %esi
	movabsq	$17179869188, %rdi
	movl	$4, 60(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$4, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	movl	28(%rsp), %edx
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	call	_Z40__device_stub__Z13changeWeightsP2nnPPPdiP2nnPPPdi
.L70:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$17179869188, %rdi
	movl	$1, 60(%rsp)
	movq	%rdx, 52(%rsp)
	movq	%rdi, 40(%rsp)
	movl	$1, 48(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	movl	28(%rsp), %edx
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	call	_Z38__device_stub__Z12changeBiasesP2nnPPdiP2nnPPdi
.L71:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z16freeNeuralMatrixPPdP2nn
	movq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z16freeNeuralMatrixPPdP2nn
	movq	16(%rsp), %rdi
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z22freeNeuralWeightMatrixPPPdP2nn
	.cfi_endproc
.LFE2027:
	.size	_Z13backpropogateP2nnPPPdS2_i, .-_Z13backpropogateP2nnPPPdS2_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"_Z12changeBiasesP2nnPPdi"
.LC2:
	.string	"_Z13changeWeightsP2nnPPPdi"
.LC3:
	.string	"_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i"
.LC4:
	.string	"_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i"
.LC5:
	.string	"_Z14getErrorKernelP2nnPPdS2_S1_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2067:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12changeBiasesP2nnPPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13changeWeightsP2nnPPPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14getErrorKernelP2nnPPdS2_S1_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2067:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "Backpropogation.cuh"
#include "NeuralNetwork.cuh"

/**
  *	Gets the errors associated with each neuron's output
  *	Parameter nn: the neural network to get the error for
  *	Parameter errors: the matrix to put the errors in
  *	Parameter layer: the layer to get the error for
  *	Return: nothing
  */

__global__
void getErrorKernel(NeuralNet* nn, double** errors, double** outputs, double* expected, int layer){

	for(int neuron1 = threadIdx.x + (blockDim.x * blockIdx.x); neuron1 < nn ->neurons[layer]; neuron1 += blockDim.x*gridDim.x){

		// The last layer's error
		if(layer == nn->layers - 1){
			//printf("actual - expected = %f - %f = %f\n", outputs[nn->layers - 1][neuron1], expected[neuron1], outputs[nn->layers - 1][neuron1]-expected[neuron1]);

			errors[layer][neuron1] = outputs[nn->layers - 1][neuron1] - expected[neuron1];
		}
	
		// The remaining layers' errors
		else{

			// Zeros the error
			errors[layer][neuron1] = 0;
	
			// Uses the derivative of the outputs with respect to the inputs
			for(int neuron2 = 0; neuron2 < nn->neurons[layer+1]; neuron2++){
				switch(nn->activations[layer][neuron2]){
					case LINEAR:
						errors[layer][neuron1] += 
						       (errors[layer + 1][neuron2] * 
							nn -> weights[layer][neuron1][neuron2]);
						break;
	
					case BINARY_STEP:
						break;
	
					case LOGISTIC:
						errors[layer][neuron1] += 
							(errors[layer + 1][neuron2] * 
							 nn -> weights[layer][neuron1][neuron2] * 
							 outputs[layer + 1][neuron2] * 
							 (1 - outputs[layer + 1][neuron2]));
						break;
	
					case TANH:
						errors[layer][neuron1] += 
							(errors[layer + 1][neuron2] * 
							 nn -> weights[layer][neuron1][neuron2] * 
							 (1 - (outputs[layer + 1][neuron2] * 
							       outputs[layer + 1][neuron2])));
						break;
	
					case RELU:
						if(outputs[layer + 1][neuron2] > 0){
							errors[layer][neuron1] += 
								(errors[layer + 1][neuron2] * 
							 	nn -> weights[layer][neuron1][neuron2]);
						}
						break;
	
					case LEAKYRELU:
						if(outputs[layer + 1][neuron2] < 0){
							errors[layer][neuron1] += 
								(errors[layer + 1][neuron2] * 
								 nn -> weights[layer][neuron1][neuron2] * .01);
						}
	
						else{
							errors[layer][neuron1] += 
								(errors[layer + 1][neuron2] * 
								 nn -> weights[layer][neuron1][neuron2]);
						}
						break;
				}
			}
		}
	}
}

/**
  *	Backpropogates the weights in the neural net
  *	Parameter nn: the neural network to backpropogate
  *	Parameter layer: the layer that is being backpropogated
  *	Returns: nothing
  */

__global__
void backpropogationWeightsKernel(NeuralNet* nn, double** outputs, 
		double** error, double*** deltaWeights, int layer){

	for(int neuron1 = threadIdx.x + (blockDim.x* blockIdx.x); neuron1 < nn -> neurons[layer]; neuron1 += (blockDim.x * gridDim.x)){
		for(int neuron2 = threadIdx.y + (blockDim.y * blockIdx.y); neuron2 < nn->neurons[layer + 1]; neuron2 += (blockDim.y * gridDim.y)){

			switch(nn->activations[layer][neuron2]){
				case LINEAR:
					deltaWeights[layer][neuron1][neuron2] += 
						(LEARNING_RATE * 
						 error[layer + 1][neuron2] * 
						 outputs[layer][neuron1]);
					break;
		
				case BINARY_STEP:
					// This has a derivative of 0 everywhere so 
					// nothing needs to be added
					break;
		
				case LOGISTIC:
					deltaWeights[layer][neuron1][neuron2] +=
						(LEARNING_RATE * error[layer + 1][neuron2] *
						 outputs[layer][neuron1] * 
						 (outputs[layer][neuron2] * 
						  (1 - outputs[layer][neuron2])));
					break;
		
				case TANH:
					deltaWeights[layer][neuron1][neuron2] +=
						(LEARNING_RATE * error[layer + 1][neuron2] *
						 outputs[layer][neuron1] * 
						 (1 - (outputs[layer][neuron2] * 
						       outputs[layer][neuron2])));
					break;
		
				case RELU:
					if(outputs[layer][neuron2] > 0){
						deltaWeights[layer][neuron1][neuron2] +=
							(LEARNING_RATE * 
							 error[layer + 1][neuron2] * 
							 outputs[layer][neuron1]);
					}
					break;
		
				case LEAKYRELU:
					if(outputs[layer + 1][neuron2] < 0){
						deltaWeights[layer][neuron1][neuron2] +=
							(LEARNING_RATE * 
							 error[layer + 1][neuron2] * 
							 outputs[layer][neuron1] * .01);
					}
		
					else{
						deltaWeights[layer][neuron1][neuron2] += 
							(LEARNING_RATE * 
							 error[layer + 1][neuron2] * 
							 outputs[layer][neuron1]);
					}
					break;
			}

		}
	}
}

/**
  *	Backpropogates the biases in the neural net
  *	Parameter nn: the neural network to backpropogate
  *	Parameter layer: the layer that is being backpropogated
  *	Returns: nothing
  */

__global__
void backpropogationBiasesKernel(NeuralNet* nn, double** outputs, double** error, double** deltaBiases, int layer){

	for(int neuron = threadIdx.x + (blockDim.x * blockIdx.x); neuron < nn->neurons[layer]; neuron += (blockDim.x * gridDim.x)){

		switch(nn->activations[layer][neuron]){
			case LINEAR:
				deltaBiases[layer][neuron] += 
					(LEARNING_RATE * 
					 error[layer][neuron]);
				break;
	
			case BINARY_STEP:
				// This has a derivative of 0 everywhere
				// so nothing needs to be added
				break;
	
			case LOGISTIC:
				deltaBiases[layer][neuron] += 
					(LEARNING_RATE * 
					 error[layer][neuron] * 
					 outputs[layer][neuron] * 
					 (1 - outputs[layer][neuron]));
				break;
	
			case TANH:
				deltaBiases[layer][neuron] += 
					(LEARNING_RATE * 
					 error[layer][neuron] * 
					 (1 - (outputs[layer][neuron] * 
					  outputs[layer][neuron])));
				break;
	
			case RELU:
				if(outputs[layer][neuron] > 0){
					deltaBiases[layer][neuron] += 
						(LEARNING_RATE * 
						 error[layer][neuron]);
				}
				break;
	
			case LEAKYRELU:
				if(outputs[layer][neuron] < 0){
					deltaBiases[layer][neuron] += 
						(LEARNING_RATE * 
						 error[layer][neuron] * 
						 .01);
				}
	
				else{
					deltaBiases[layer][neuron] += 
						(LEARNING_RATE * 
						 error[layer][neuron]);
				}
				break;
		}
	}
}

/**
  *	Changes the weights in the neural net
  *	Parameter nn: the neural network to change the weights in
  *	Parameter deltaWeights: the matrix of total unaveraged weight changes
  *	Parameter numOutputs: the number of outputs to average
  *	Returns: nothing
  */

__global__
void changeWeights(NeuralNet* nn, double*** deltaWeights, int numOutputs){
	for(int layer = threadIdx.x + (blockDim.x * blockIdx.x); layer < nn->layers-1; layer += (blockDim.x * gridDim.x)){
		for(int neuron1 = threadIdx.y + (blockDim.y * blockIdx.y); neuron1 < nn->neurons[layer]; neuron1 += (blockDim.y * gridDim.y)){
			for(int neuron2 = threadIdx.z + (blockDim.z * blockIdx.z); neuron2 < nn->neurons[layer + 1]; neuron2 += (blockDim.z * gridDim.z)){
				double delta=deltaWeights[layer][neuron1][neuron2]/numOutputs;
				if(delta<GRADIENT_CEILING && delta>-GRADIENT_CEILING){
					nn->weights[layer][neuron1][neuron2] -= (deltaWeights[layer][neuron1][neuron2] / numOutputs);
				}
				else{
					if(delta<0){
						nn->weights[layer][neuron1][neuron2]-=(-GRADIENT_CEILING);
					}
					else{
						nn->weights[layer][neuron1][neuron2]-=(GRADIENT_CEILING);
					}
				}
			}
		}
	}
}

/**
  *	Changes the biases in the neural net
  *	Parameter nn: the neural network to change the biases in
  *	Parameter deltaBiases: the matrix of total unaveraged bias changes
  *	Parameter numOutputs: the total number of outputs to average
  *	Returns: nothing
  */

__global__
void changeBiases(NeuralNet* nn, double** deltaBiases, int numOutputs){
	for(int layer = threadIdx.x + (blockDim.x * blockIdx.x); layer < nn->layers - 1; layer += (blockDim.x * gridDim.x)){
		for(int neuron = threadIdx.y + (blockDim.y * blockIdx.y); neuron < nn->neurons[layer]; neuron += blockDim.y * gridDim.y){
			double delta=deltaBiases[layer][neuron]/numOutputs;
			if(delta<GRADIENT_CEILING && delta>-GRADIENT_CEILING){
				nn->biases[layer][neuron] -= (deltaBiases[layer][neuron] / numOutputs);
			}
			else{
				if(delta<0){
					nn->biases[layer][neuron] -= (-GRADIENT_CEILING);
				}
				else{
					nn->biases[layer][neuron] -= (GRADIENT_CEILING);
				}
			}
		}
	}
}

/**
  *	Backpropogates the neural network with the actual and expected outputs
  *	Parameter nn: the neural network to backpropogate
  *	Parameter actual: the actual outputs given by the neural network
  *	Parameter expected: the expected outputs given by the neural network
  *	Parameter numOutputs: the number of outputs
  *	Returns: nothing
  */

void backpropogate(NeuralNet* nn, double*** outputs, double** expected, int numOutputs){

	// Gets an matrix for the error
	double** error = getNeuralMatrix(nn);

	double** deltaBiasMatrix=getNeuralMatrix(nn);

	double*** deltaWeightMatrix=getNeuralWeightMatrix(nn);

	// Loops through the outputs
	for(int output = 0; output < numOutputs; output++){
		for(int layer=nn->layers - 1; layer >= 0; layer--){

			// Gets the error
			getErrorKernel<<<NUMBLOCKS, BLOCKSIZE>>>(nn, error, outputs[output], expected[output], layer);
			hipDeviceSynchronize();

			// Backpropgate the weights/biases
			if(layer != nn->layers - 1){
				backpropogationWeightsKernel<<<dim3(NUMBLOCKS, NUMBLOCKS), dim3(BLOCKSIZE/4, BLOCKSIZE/4)>>>(nn, outputs[output], error, deltaWeightMatrix, layer);
				hipDeviceSynchronize();

				backpropogationBiasesKernel<<<NUMBLOCKS, BLOCKSIZE>>>(nn, outputs[output], error, deltaBiasMatrix, layer);
				hipDeviceSynchronize();
			}
		}
	}

	// Changes the weights in the neural net
	changeWeights<<<dim3(NUMBLOCKS, NUMBLOCKS, NUMBLOCKS), dim3(BLOCKSIZE/16, BLOCKSIZE/16, BLOCKSIZE/16)>>>(nn, deltaWeightMatrix, numOutputs);
	hipDeviceSynchronize();

	// Changes the biases in the neural net
	changeBiases<<<dim3(NUMBLOCKS, NUMBLOCKS), dim3(BLOCKSIZE/4, BLOCKSIZE/4)>>>(nn, deltaBiasMatrix, numOutputs);
	hipDeviceSynchronize();

	// Frees the error matrix
	freeNeuralMatrix(error, nn);

	// Frees the bias matrix
	freeNeuralMatrix(deltaBiasMatrix, nn);

	// Frees the weight matrix
	freeNeuralWeightMatrix(deltaWeightMatrix, nn);
}

/**
  *	Allocates memory for and zeros a matrix of the same size as the neural network's nodes
  *	Parameter nn: the neural network to get the dimensions from
  *	Returns: a matrix of the same size as the neural network's nodes
  */

double** getNeuralMatrix(NeuralNet* nn){
	
	double** matrix;
	hipMallocManaged(&matrix, nn->layers*sizeof(double*));

	for(int layer = 0; layer < nn->layers; layer++){
		hipMallocManaged(&matrix[layer], nn->neurons[layer]*sizeof(double));
		
		for(int neuron = 0; neuron < nn->neurons[layer]; neuron++){
			matrix[layer][neuron] = 0;
		}
	}

	return matrix;
}

/**
  *	Frees the neural matrix
  *	Parameter matrix: the matrix to feree
  *	Parameter nn: the neural network to get the dimensions from
  *	Returns: nothing
  */


void freeNeuralMatrix(double** matrix, NeuralNet* nn){
	
	for(int layer = 0; layer < nn->layers; layer++){
		hipFree(matrix[layer]);
	}

	hipFree(matrix);
}

/**
  *	Allocates memory and zeros a matrix of the same size as the neural network's weight matrix
  *	Parameter nn: the neural network to get the weight matrix from
  *	Returns: a matrix of the same size as the neural network's weight matrix
  */

double*** getNeuralWeightMatrix(NeuralNet* nn){

	double*** matrix;
	hipMallocManaged(&matrix, nn->layers * sizeof(double**));

	for(int layer = 0; layer < nn->layers-1; layer++){

		hipMallocManaged(&matrix[layer], nn->neurons[layer] * sizeof(double*));
		for(int neuron1 = 0; neuron1 < nn->neurons[layer]; neuron1++){

			hipMallocManaged(&matrix[layer][neuron1], nn->neurons[layer+1] * sizeof(double));
			for(int neuron2 = 0; neuron2 < nn->neurons[layer + 1]; neuron2++){
				matrix[layer][neuron1][neuron2] = 0;
			}
		}
	}

	return matrix;
}

/**
  *	Frees the neural weight matrix
  *	Parameter matrix: the neural weight matrix
  *	Parameter nn: the neural network to get the dimensions from
  *	Returns: nothing
  */

void freeNeuralWeightMatrix(double*** matrix, NeuralNet* nn){

	for(int layer = 0; layer < nn->layers - 1; layer++){
		for(int neuron1 = 0; neuron1 < nn->neurons[layer]; neuron1++){
			hipFree(matrix[layer][neuron1]);
		}

		hipFree(matrix[layer]);
	}

	hipFree(matrix);
}


	.text
	.file	"Backpropogation.hip"
	.globl	_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i # -- Begin function _Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i
	.type	_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i,@function
_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i: # @_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14getErrorKernelP2nnPPdS2_S1_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i, .Lfunc_end0-_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i # -- Begin function _Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.type	_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i,@function
_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i: # @_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i, .Lfunc_end1-_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i # -- Begin function _Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i
	.type	_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i,@function
_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i: # @_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i, .Lfunc_end2-_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__changeWeightsP2nnPPPdi # -- Begin function _Z28__device_stub__changeWeightsP2nnPPPdi
	.type	_Z28__device_stub__changeWeightsP2nnPPPdi,@function
_Z28__device_stub__changeWeightsP2nnPPPdi: # @_Z28__device_stub__changeWeightsP2nnPPPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13changeWeightsP2nnPPPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__changeWeightsP2nnPPPdi, .Lfunc_end3-_Z28__device_stub__changeWeightsP2nnPPPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__changeBiasesP2nnPPdi # -- Begin function _Z27__device_stub__changeBiasesP2nnPPdi
	.type	_Z27__device_stub__changeBiasesP2nnPPdi,@function
_Z27__device_stub__changeBiasesP2nnPPdi: # @_Z27__device_stub__changeBiasesP2nnPPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12changeBiasesP2nnPPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__changeBiasesP2nnPPdi, .Lfunc_end4-_Z27__device_stub__changeBiasesP2nnPPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z13backpropogateP2nnPPPdS2_i   # -- Begin function _Z13backpropogateP2nnPPPdS2_i
	.type	_Z13backpropogateP2nnPPPdS2_i,@function
_Z13backpropogateP2nnPPPdS2_i:          # @_Z13backpropogateP2nnPPPdS2_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	callq	_Z15getNeuralMatrixP2nn
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Z15getNeuralMatrixP2nn
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Z21getNeuralWeightMatrixP2nn
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
	testl	%ebp, %ebp
	jle	.LBB5_4
# %bb.1:                                # %.lr.ph98.preheader
	movabsq	$4294967300, %r13               # imm = 0x100000004
	movl	4(%rsp), %eax                   # 4-byte Reload
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	leaq	60(%r13), %rbp
.LBB5_2:                                # %.lr.ph98
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_9 Depth 2
	movl	(%rbx), %r15d
	testl	%r15d, %r15d
	jle	.LBB5_3
.LBB5_9:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	-1(%r15), %r12d
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_11
# %bb.10:                               #   in Loop: Header=BB5_9 Depth=2
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r14,8), %rdx
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r14,8), %rcx
	movq	%rbx, %rdi
	movq	8(%rsp), %rsi                   # 8-byte Reload
	movl	%r12d, %r8d
	callq	_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i
.LBB5_11:                               #   in Loop: Header=BB5_9 Depth=2
	callq	hipDeviceSynchronize
	cmpl	(%rbx), %r15d
	je	.LBB5_17
# %bb.12:                               #   in Loop: Header=BB5_9 Depth=2
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_14
# %bb.13:                               #   in Loop: Header=BB5_9 Depth=2
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r14,8), %rsi
	movq	%rbx, %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	callq	_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i
.LBB5_14:                               #   in Loop: Header=BB5_9 Depth=2
	callq	hipDeviceSynchronize
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_16
# %bb.15:                               #   in Loop: Header=BB5_9 Depth=2
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	(%rax,%r14,8), %rsi
	movq	%rbx, %rdi
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movq	24(%rsp), %rcx                  # 8-byte Reload
	movl	%r12d, %r8d
	callq	_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i
.LBB5_16:                               #   in Loop: Header=BB5_9 Depth=2
	callq	hipDeviceSynchronize
.LBB5_17:                               #   in Loop: Header=BB5_9 Depth=2
	leal	1(%r12), %eax
	movl	%r12d, %r15d
	cmpl	$1, %eax
	ja	.LBB5_9
.LBB5_3:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%r14
	cmpq	40(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB5_2
.LBB5_4:                                # %._crit_edge99
	movabsq	$17179869188, %r14              # imm = 0x400000004
	movq	%r14, %rdi
	movl	$4, %esi
	movq	%r14, %rdx
	movl	$4, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:
	movq	%rbx, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	4(%rsp), %edx                   # 4-byte Reload
	callq	_Z28__device_stub__changeWeightsP2nnPPPdi
.LBB5_6:
	callq	hipDeviceSynchronize
	movq	%r14, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:
	movq	%rbx, %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movl	4(%rsp), %edx                   # 4-byte Reload
	callq	_Z27__device_stub__changeBiasesP2nnPPdi
.LBB5_8:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	%rbx, %rsi
	callq	_Z16freeNeuralMatrixPPdP2nn
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	_Z16freeNeuralMatrixPPdP2nn
	movq	16(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rsi
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z22freeNeuralWeightMatrixPPPdP2nn # TAILCALL
.Lfunc_end5:
	.size	_Z13backpropogateP2nnPPPdS2_i, .Lfunc_end5-_Z13backpropogateP2nnPPPdS2_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z15getNeuralMatrixP2nn         # -- Begin function _Z15getNeuralMatrixP2nn
	.type	_Z15getNeuralMatrixP2nn,@function
_Z15getNeuralMatrixP2nn:                # @_Z15getNeuralMatrixP2nn
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movslq	(%rdi), %rsi
	shlq	$3, %rsi
	movq	%rsp, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	$0, (%rbx)
	jle	.LBB6_5
# %bb.1:                                # %.lr.ph16
	movq	8(%rbx), %r12
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB6_2:                                # =>This Inner Loop Header: Depth=1
	movq	(%rsp), %rdi
	addq	%r14, %rdi
	movslq	(%r12,%r15,4), %rsi
	shlq	$3, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	8(%rbx), %r12
	movl	(%r12,%r15,4), %edx
	testl	%edx, %edx
	jle	.LBB6_4
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB6_2 Depth=1
	movq	(%rsp), %rax
	movq	(%rax,%r14), %rdi
	shlq	$3, %rdx
	xorl	%esi, %esi
	callq	memset@PLT
.LBB6_4:                                # %._crit_edge
                                        #   in Loop: Header=BB6_2 Depth=1
	incq	%r15
	movslq	(%rbx), %rax
	addq	$8, %r14
	cmpq	%rax, %r15
	jl	.LBB6_2
.LBB6_5:                                # %._crit_edge17
	movq	(%rsp), %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z15getNeuralMatrixP2nn, .Lfunc_end6-_Z15getNeuralMatrixP2nn
	.cfi_endproc
                                        # -- End function
	.globl	_Z21getNeuralWeightMatrixP2nn   # -- Begin function _Z21getNeuralWeightMatrixP2nn
	.type	_Z21getNeuralWeightMatrixP2nn,@function
_Z21getNeuralWeightMatrixP2nn:          # @_Z21getNeuralWeightMatrixP2nn
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movslq	(%rdi), %rsi
	shlq	$3, %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	$2, (%rbx)
	jl	.LBB7_8
# %bb.1:                                # %.lr.ph30
	movq	8(%rbx), %r12
	xorl	%r14d, %r14d
	movq	%rbx, 16(%rsp)                  # 8-byte Spill
.LBB7_2:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB7_4 Depth 2
	leaq	(,%r14,8), %rdi
	addq	8(%rsp), %rdi
	movslq	(%r12,%r14,4), %rsi
	shlq	$3, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	8(%rbx), %r12
	leaq	1(%r14), %r15
	cmpl	$0, (%r12,%r14,4)
	jle	.LBB7_7
# %bb.3:                                # %.lr.ph26
                                        #   in Loop: Header=BB7_2 Depth=1
	movl	(%r12,%r15,4), %ebx
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB7_4:                                #   Parent Loop BB7_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	8(%rsp), %rax
	movq	(%rax,%r14,8), %rdi
	addq	%r13, %rdi
	movslq	%ebx, %rsi
	shlq	$3, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	16(%rsp), %rax                  # 8-byte Reload
	movq	8(%rax), %r12
	movl	(%r12,%r15,4), %ebx
	testl	%ebx, %ebx
	jle	.LBB7_6
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB7_4 Depth=2
	movq	8(%rsp), %rax
	movq	(%rax,%r14,8), %rax
	movq	(%rax,%r13), %rdi
	leaq	(,%rbx,8), %rdx
	xorl	%esi, %esi
	callq	memset@PLT
.LBB7_6:                                # %._crit_edge
                                        #   in Loop: Header=BB7_4 Depth=2
	incq	%rbp
	movslq	(%r12,%r14,4), %rax
	addq	$8, %r13
	cmpq	%rax, %rbp
	jl	.LBB7_4
.LBB7_7:                                # %._crit_edge27
                                        #   in Loop: Header=BB7_2 Depth=1
	movq	16(%rsp), %rbx                  # 8-byte Reload
	movslq	(%rbx), %rax
	decq	%rax
	movq	%r15, %r14
	cmpq	%rax, %r15
	jl	.LBB7_2
.LBB7_8:                                # %._crit_edge31
	movq	8(%rsp), %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z21getNeuralWeightMatrixP2nn, .Lfunc_end7-_Z21getNeuralWeightMatrixP2nn
	.cfi_endproc
                                        # -- End function
	.globl	_Z16freeNeuralMatrixPPdP2nn     # -- Begin function _Z16freeNeuralMatrixPPdP2nn
	.type	_Z16freeNeuralMatrixPPdP2nn,@function
_Z16freeNeuralMatrixPPdP2nn:            # @_Z16freeNeuralMatrixPPdP2nn
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	cmpl	$0, (%rsi)
	jle	.LBB8_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB8_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx,%r15,8), %rdi
	callq	hipFree
	incq	%r15
	movslq	(%r14), %rax
	cmpq	%rax, %r15
	jl	.LBB8_2
.LBB8_3:                                # %._crit_edge
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end8:
	.size	_Z16freeNeuralMatrixPPdP2nn, .Lfunc_end8-_Z16freeNeuralMatrixPPdP2nn
	.cfi_endproc
                                        # -- End function
	.globl	_Z22freeNeuralWeightMatrixPPPdP2nn # -- Begin function _Z22freeNeuralWeightMatrixPPPdP2nn
	.type	_Z22freeNeuralWeightMatrixPPPdP2nn,@function
_Z22freeNeuralWeightMatrixPPPdP2nn:     # @_Z22freeNeuralWeightMatrixPPPdP2nn
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	cmpl	$2, (%rsi)
	jl	.LBB9_6
# %bb.1:                                # %.preheader.lr.ph
	movq	%rsi, %r14
	xorl	%r15d, %r15d
.LBB9_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_4 Depth 2
	movq	8(%r14), %rax
	cmpl	$0, (%rax,%r15,4)
	jle	.LBB9_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB9_2 Depth=1
	xorl	%r12d, %r12d
.LBB9_4:                                #   Parent Loop BB9_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rbx,%r15,8), %rax
	movq	(%rax,%r12,8), %rdi
	callq	hipFree
	incq	%r12
	movq	8(%r14), %rax
	movslq	(%rax,%r15,4), %rax
	cmpq	%rax, %r12
	jl	.LBB9_4
.LBB9_5:                                # %._crit_edge
                                        #   in Loop: Header=BB9_2 Depth=1
	movq	(%rbx,%r15,8), %rdi
	callq	hipFree
	incq	%r15
	movslq	(%r14), %rax
	decq	%rax
	cmpq	%rax, %r15
	jl	.LBB9_2
.LBB9_6:                                # %._crit_edge15
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipFree                         # TAILCALL
.Lfunc_end9:
	.size	_Z22freeNeuralWeightMatrixPPPdP2nn, .Lfunc_end9-_Z22freeNeuralWeightMatrixPPPdP2nn
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14getErrorKernelP2nnPPdS2_S1_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13changeWeightsP2nnPPPdi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12changeBiasesP2nnPPdi, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14getErrorKernelP2nnPPdS2_S1_i,@object # @_Z14getErrorKernelP2nnPPdS2_S1_i
	.section	.rodata,"a",@progbits
	.globl	_Z14getErrorKernelP2nnPPdS2_S1_i
	.p2align	3, 0x0
_Z14getErrorKernelP2nnPPdS2_S1_i:
	.quad	_Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i
	.size	_Z14getErrorKernelP2nnPPdS2_S1_i, 8

	.type	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i,@object # @_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.globl	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.p2align	3, 0x0
_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i:
	.quad	_Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.size	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i, 8

	.type	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i,@object # @_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.globl	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.p2align	3, 0x0
_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i:
	.quad	_Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i
	.size	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i, 8

	.type	_Z13changeWeightsP2nnPPPdi,@object # @_Z13changeWeightsP2nnPPPdi
	.globl	_Z13changeWeightsP2nnPPPdi
	.p2align	3, 0x0
_Z13changeWeightsP2nnPPPdi:
	.quad	_Z28__device_stub__changeWeightsP2nnPPPdi
	.size	_Z13changeWeightsP2nnPPPdi, 8

	.type	_Z12changeBiasesP2nnPPdi,@object # @_Z12changeBiasesP2nnPPdi
	.globl	_Z12changeBiasesP2nnPPdi
	.p2align	3, 0x0
_Z12changeBiasesP2nnPPdi:
	.quad	_Z27__device_stub__changeBiasesP2nnPPdi
	.size	_Z12changeBiasesP2nnPPdi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z14getErrorKernelP2nnPPdS2_S1_i"
	.size	.L__unnamed_1, 33

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i"
	.size	.L__unnamed_2, 48

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i"
	.size	.L__unnamed_3, 46

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z13changeWeightsP2nnPPPdi"
	.size	.L__unnamed_4, 27

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z12changeBiasesP2nnPPdi"
	.size	.L__unnamed_5, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__getErrorKernelP2nnPPdS2_S1_i
	.addrsig_sym _Z43__device_stub__backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.addrsig_sym _Z42__device_stub__backpropogationBiasesKernelP2nnPPdS2_S2_i
	.addrsig_sym _Z28__device_stub__changeWeightsP2nnPPPdi
	.addrsig_sym _Z27__device_stub__changeBiasesP2nnPPdi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14getErrorKernelP2nnPPdS2_S1_i
	.addrsig_sym _Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.addrsig_sym _Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.addrsig_sym _Z13changeWeightsP2nnPPPdi
	.addrsig_sym _Z12changeBiasesP2nnPPdi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14getErrorKernelP2nnPPdS2_S1_i ; -- Begin function _Z14getErrorKernelP2nnPPdS2_S1_i
	.globl	_Z14getErrorKernelP2nnPPdS2_S1_i
	.p2align	8
	.type	_Z14getErrorKernelP2nnPPdS2_S1_i,@function
_Z14getErrorKernelP2nnPPdS2_S1_i:       ; @_Z14getErrorKernelP2nnPPdS2_S1_i
; %bb.0:
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x20
	s_load_b32 s14, s[0:1], 0x34
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[18:19], s[4:5], 0x8
	s_ashr_i32 s3, s2, 31
	s_add_u32 s12, s0, 40
	s_addc_u32 s13, s1, 0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_and_b32 s16, s14, 0xffff
	s_mov_b32 s14, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s16, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s18, s0
	s_addc_u32 s1, s19, s1
	s_load_b32 s18, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s18, v1
	s_cbranch_execz .LBB0_36
; %bb.1:                                ; %.lr.ph191
	s_load_b32 s20, s[4:5], 0x0
	s_load_b32 s17, s[12:13], 0x0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s12, s20, -1
	s_ashr_i32 s21, s20, 31
	s_cmp_lg_u32 s12, s2
	s_mov_b32 s12, 0x47ae147b
	s_cselect_b32 s19, -1, 0
	s_lshl_b64 s[2:3], s[2:3], 3
	s_mov_b32 s13, 0x3f847ae1
	s_add_u32 s6, s6, s2
	s_addc_u32 s7, s7, s3
	s_add_u32 s14, s8, s2
	s_addc_u32 s15, s9, s3
	s_lshl_b64 s[22:23], s[20:21], 3
	s_mul_i32 s20, s17, s16
	s_add_u32 s21, s8, s22
	s_addc_u32 s22, s9, s23
	s_mov_b32 s23, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_and_b32 vcc_lo, exec_lo, s19
	s_mov_b32 s8, -1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[1:2]
	s_cbranch_vccz .LBB0_33
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_load_b64 s[8:9], s[6:7], 0x0
	s_load_b32 s24, s[0:1], 0x4
	v_mov_b32_e32 v4, v3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v6, vcc_lo
	s_cmp_lt_i32 s24, 1
	global_store_b64 v[7:8], v[3:4], off
	s_cbranch_scc1 .LBB0_32
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_load_b64 s[8:9], s[4:5], 0x20
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	s_mov_b64 s[16:17], 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s8, s8, s2
	s_addc_u32 s9, s9, s3
	s_load_b64 s[8:9], s[8:9], 0x0
.LBB0_5:                                ; %NodeBlock244
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt lgkmcnt(0)
	s_load_b32 s25, s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s25, 3
	s_cbranch_scc1 .LBB0_12
; %bb.6:                                ; %NodeBlock242
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_cmp_gt_i32 s25, 3
	s_cbranch_scc0 .LBB0_13
; %bb.7:                                ; %NodeBlock240
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_cmp_gt_i32 s25, 4
	s_cbranch_scc0 .LBB0_14
; %bb.8:                                ; %LeafBlock238
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, 0
	s_cmp_eq_u32 s25, 5
	s_mov_b32 s26, 0
                                        ; implicit-def: $vgpr11_vgpr12
	s_cbranch_scc0 .LBB0_15
; %bb.9:                                ;   in Loop: Header=BB0_5 Depth=2
	s_load_b64 s[28:29], s[14:15], 0x8
	s_load_b64 s[30:31], s[6:7], 0x8
	s_load_b64 s[34:35], s[4:5], 0x18
	s_waitcnt lgkmcnt(0)
	s_add_u32 s28, s28, s16
	s_addc_u32 s29, s29, s17
	s_add_u32 s30, s30, s16
	s_addc_u32 s31, s31, s17
	s_add_u32 s34, s34, s2
	s_addc_u32 s35, s35, s3
	s_load_b64 s[34:35], s[34:35], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s34, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s35, v6, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v11, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	s_clause 0x1
	global_load_b64 v[13:14], v3, s[28:29]
	global_load_b64 v[15:16], v3, s[30:31]
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(2)
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[13:14]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[11:12], v[15:16], v[11:12]
	s_cbranch_vccnz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[11:12], v[11:12], s[12:13]
.LBB0_11:                               ; %Flow
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s26, -1
	s_branch .LBB0_15
.LBB0_12:                               ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, -1
	s_mov_b32 s26, 0
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB0_22
.LBB0_13:                               ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, -1
	s_mov_b32 s26, 0
                                        ; implicit-def: $vgpr11_vgpr12
	s_branch .LBB0_19
.LBB0_14:                               ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, -1
	s_mov_b32 s26, 0
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_15:                               ; %Flow248
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_and_b32 vcc_lo, exec_lo, s27
	s_cbranch_vccz .LBB0_18
; %bb.16:                               ;   in Loop: Header=BB0_5 Depth=2
	s_load_b64 s[28:29], s[14:15], 0x8
	s_waitcnt lgkmcnt(0)
	s_add_u32 s28, s28, s16
	s_addc_u32 s29, s29, s17
	global_load_b64 v[11:12], v3, s[28:29]
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, 0, v[11:12]
                                        ; implicit-def: $vgpr11_vgpr12
	s_cbranch_vccz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_5 Depth=2
	s_load_b64 s[26:27], s[6:7], 0x8
	s_load_b64 s[28:29], s[4:5], 0x18
	s_waitcnt lgkmcnt(0)
	s_add_u32 s26, s26, s16
	s_addc_u32 s27, s27, s17
	s_add_u32 s28, s28, s2
	s_addc_u32 s29, s29, s3
	s_load_b64 s[28:29], s[28:29], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s28, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v6, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v11, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	global_load_b64 v[13:14], v3, s[26:27]
	global_load_b64 v[11:12], v[11:12], off
	s_mov_b32 s26, -1
	s_waitcnt vmcnt(0)
	v_mul_f64 v[11:12], v[13:14], v[11:12]
.LBB0_18:                               ; %Flow250
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, 0
.LBB0_19:                               ; %Flow247
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s27
	s_cbranch_vccz .LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_5 Depth=2
	s_load_b64 s[26:27], s[6:7], 0x8
	s_load_b64 s[28:29], s[4:5], 0x18
	s_waitcnt lgkmcnt(0)
	s_add_u32 s26, s26, s16
	s_addc_u32 s27, s27, s17
	s_add_u32 s28, s28, s2
	s_addc_u32 s29, s29, s3
	s_load_b64 s[28:29], s[28:29], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s28, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v6, vcc_lo
	s_load_b64 s[28:29], s[14:15], 0x8
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt lgkmcnt(0)
	s_add_u32 s28, s28, s16
	s_addc_u32 s29, s29, s17
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v11, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_clause 0x1
	global_load_b64 v[13:14], v3, s[26:27]
	global_load_b64 v[15:16], v3, s[28:29]
	s_mov_b32 s26, -1
	s_waitcnt vmcnt(1)
	v_mul_f64 v[11:12], v[13:14], v[11:12]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[13:14], -v[15:16], v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[11:12], v[11:12], v[13:14]
.LBB0_21:                               ; %Flow252
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, 0
.LBB0_22:                               ; %Flow246
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s27
	s_cbranch_vccz .LBB0_29
; %bb.23:                               ; %NodeBlock
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_cmp_gt_i32 s25, 1
	s_cbranch_scc0 .LBB0_25
; %bb.24:                               ;   in Loop: Header=BB0_5 Depth=2
	s_load_b64 s[26:27], s[6:7], 0x8
	s_load_b64 s[28:29], s[4:5], 0x18
	s_waitcnt lgkmcnt(0)
	s_add_u32 s26, s26, s16
	s_addc_u32 s27, s27, s17
	s_add_u32 s28, s28, s2
	s_addc_u32 s29, s29, s3
	s_load_b64 s[28:29], s[28:29], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s28, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v6, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v11, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	global_load_b64 v[13:14], v3, s[26:27]
	s_load_b64 s[26:27], s[14:15], 0x8
	s_waitcnt lgkmcnt(0)
	s_add_u32 s26, s26, s16
	s_addc_u32 s27, s27, s17
	global_load_b64 v[15:16], v3, s[26:27]
	s_mov_b32 s27, 0
	s_mov_b32 s26, -1
	s_waitcnt vmcnt(1)
	v_mul_f64 v[11:12], v[13:14], v[11:12]
	s_waitcnt vmcnt(0)
	v_add_f64 v[13:14], -v[15:16], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[11:12], v[15:16]
	v_mul_f64 v[11:12], v[11:12], v[13:14]
	s_branch .LBB0_26
.LBB0_25:                               ;   in Loop: Header=BB0_5 Depth=2
	s_mov_b32 s27, -1
                                        ; implicit-def: $vgpr11_vgpr12
.LBB0_26:                               ; %Flow254
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s27
	s_cbranch_vccnz .LBB0_29
; %bb.27:                               ; %LeafBlock
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_cmp_eq_u32 s25, 0
                                        ; implicit-def: $vgpr11_vgpr12
	s_cbranch_scc0 .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_5 Depth=2
	s_load_b64 s[26:27], s[6:7], 0x8
	s_load_b64 s[28:29], s[4:5], 0x18
	s_waitcnt lgkmcnt(0)
	s_add_u32 s26, s26, s16
	s_addc_u32 s27, s27, s17
	s_add_u32 s28, s28, s2
	s_addc_u32 s29, s29, s3
	s_load_b64 s[28:29], s[28:29], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v11, vcc_lo, s28, v5
	v_add_co_ci_u32_e32 v12, vcc_lo, s29, v6, vcc_lo
	global_load_b64 v[11:12], v[11:12], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v11, s16
	v_add_co_ci_u32_e32 v12, vcc_lo, s17, v12, vcc_lo
	global_load_b64 v[13:14], v3, s[26:27]
	global_load_b64 v[11:12], v[11:12], off
	s_mov_b32 s26, -1
	s_waitcnt vmcnt(0)
	v_mul_f64 v[11:12], v[13:14], v[11:12]
.LBB0_29:                               ; %Flow253
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_and_b32 vcc_lo, exec_lo, s26
	s_cbranch_vccz .LBB0_31
; %bb.30:                               ; %.sink.split
                                        ;   in Loop: Header=BB0_5 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	global_store_b64 v[7:8], v[9:10], off
.LBB0_31:                               ;   in Loop: Header=BB0_5 Depth=2
	s_add_i32 s24, s24, -1
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_add_u32 s16, s16, 8
	s_addc_u32 s17, s17, 0
	s_cmp_lg_u32 s24, 0
	s_cbranch_scc1 .LBB0_5
.LBB0_32:                               ; %Flow258
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s8, 0
.LBB0_33:                               ; %Flow259
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_35
; %bb.34:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s8, s21, -8
	s_addc_u32 s9, s22, -1
	s_load_b64 s[8:9], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v6, vcc_lo
	global_load_b64 v[7:8], v[7:8], off
	global_load_b64 v[9:10], v[9:10], off
	s_load_b64 s[8:9], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v6, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	global_store_b64 v[4:5], v[7:8], off
.LBB0_35:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v1, s20, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s18, v1
	s_or_b32 s23, vcc_lo, s23
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB0_2
.LBB0_36:                               ; %Flow261
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14getErrorKernelP2nnPPdS2_S1_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14getErrorKernelP2nnPPdS2_S1_i, .Lfunc_end0-_Z14getErrorKernelP2nnPPdS2_S1_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1504
; NumSgprs: 38
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i ; -- Begin function _Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.globl	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
	.p2align	8
	.type	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i,@function
_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i: ; @_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
; %bb.0:
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x20
	s_load_b32 s16, s[0:1], 0x34
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[12:13], s[4:5], 0x8
	s_ashr_i32 s3, s2, 31
	s_add_u32 s0, s0, 40
	s_addc_u32 s1, s1, 0
	s_lshl_b64 s[18:19], s[2:3], 2
	s_and_b32 s16, s16, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s14, s16, v[3:4]
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s12, s18
	s_addc_u32 s13, s13, s19
	s_load_b32 s20, s[12:13], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s20, v1
	s_cbranch_execz .LBB1_34
; %bb.1:                                ; %.lr.ph157
	s_load_b32 s14, s[0:1], 0xc
	s_load_b32 s21, s[12:13], 0x4
	s_load_b64 s[0:1], s[0:1], 0x0
	v_bfe_u32 v0, v0, 10, 10
	s_lshl_b64 s[2:3], s[2:3], 3
	s_mov_b32 s12, 0xa0b5ed8d
	s_mov_b32 s13, 0x3eb0c6f7
	s_mov_b32 s23, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s17, s14, 16
	s_add_u32 s6, s6, s2
	v_mad_u64_u32 v[3:4], null, s15, s17, v[0:1]
	s_addc_u32 s7, s7, s3
	s_add_u32 s8, s8, s2
	s_addc_u32 s9, s9, s3
	s_mov_b32 s14, 0x47ae147b
	s_add_u32 s10, s10, s2
	s_mov_b32 s15, 0x3f847ae1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s21, v3
	s_addc_u32 s11, s11, s3
	s_mul_i32 s1, s1, s17
	s_mul_i32 s22, s0, s16
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	s_and_saveexec_b32 s24, vcc_lo
	s_cbranch_execz .LBB1_33
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_load_b64 s[16:17], s[4:5], 0x20
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, v3
	s_mov_b32 s25, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s16, s2
	s_addc_u32 s17, s17, s3
	s_load_b64 s[16:17], s[16:17], 0x0
.LBB1_4:                                ; %NodeBlock187
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v7, 31, v6
	s_mov_b32 s18, 0
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s16, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s17, v9, s0
	global_load_b32 v0, v[8:9], off
                                        ; implicit-def: $vgpr8_vgpr9
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 2, v0
	s_xor_b32 s26, exec_lo, s19
	s_cbranch_execz .LBB1_22
; %bb.5:                                ; %NodeBlock185
                                        ;   in Loop: Header=BB1_4 Depth=2
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	s_mov_b32 s19, exec_lo
	v_cmpx_lt_i32_e32 3, v0
	s_xor_b32 s27, exec_lo, s19
	s_cbranch_execz .LBB1_19
; %bb.6:                                ; %NodeBlock183
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s28, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	v_cmpx_lt_i32_e32 4, v0
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB1_14
; %bb.7:                                ; %LeafBlock181
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	v_cmpx_eq_u32_e32 5, v0
	s_cbranch_execz .LBB1_13
; %bb.8:                                ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[28:29], s[8:9], 0x8
	v_lshlrev_b64 v[14:15], 3, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s28, v14
	v_add_co_ci_u32_e64 v9, s0, s29, v15, s0
	s_load_b128 s[28:31], s[6:7], 0x0
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, s0, s30, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s0, s31, v15, s0
	v_add_co_u32 v12, s0, s28, v4
	v_add_co_ci_u32_e64 v13, s0, s29, v5, s0
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[8:9], v[8:9], s[12:13]
	s_waitcnt vmcnt(1)
	v_cmp_ngt_f64_e64 s0, 0, v[10:11]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[8:9], v[12:13]
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr12_vgpr13
	s_and_saveexec_b32 s28, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s28, exec_lo, s28
	s_cbranch_execz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[30:31], s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s30, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s31, v5, s0
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, s0, v8, v14
	v_add_co_ci_u32_e64 v9, s0, v9, v15, s0
                                        ; implicit-def: $vgpr14_vgpr15
	global_load_b64 v[12:13], v[8:9], off
.LBB1_10:                               ; %Flow
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_and_not1_saveexec_b32 s28, s28
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[30:31], s[10:11], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[10:11], s[14:15]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s30, v4
	v_add_co_ci_u32_e64 v9, s0, s31, v5, s0
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, s0, v8, v14
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, v9, v15, s0
	global_load_b64 v[12:13], v[8:9], off
.LBB1_12:                               ; %Flow189
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s28, exec_lo
.LBB1_13:                               ; %Flow193
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s28, s28, exec_lo
.LBB1_14:                               ; %Flow192
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_and_not1_saveexec_b32 s29, s18
	s_cbranch_execz .LBB1_18
; %bb.15:                               ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[18:19], s[6:7], 0x0
	v_lshlrev_b64 v[14:15], 3, v[6:7]
	s_mov_b32 s31, s28
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s18, v14
	v_add_co_ci_u32_e64 v9, s0, s19, v15, s0
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e64 s0, 0, v[8:9]
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s30, s0
	s_xor_b32 s30, exec_lo, s30
	s_cbranch_execz .LBB1_17
; %bb.16:                               ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[34:35], s[10:11], 0x0
	s_or_b32 s31, s28, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s34, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s35, v5, s0
	s_load_b64 s[34:35], s[8:9], 0x8
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, s0, s34, v14
	v_add_co_ci_u32_e64 v11, s0, s35, v15, s0
	v_add_co_u32 v12, s0, s18, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s19, v5, s0
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[16:17], v[12:13], off
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, s0, v8, v14
	v_add_co_ci_u32_e64 v9, s0, v9, v15, s0
	global_load_b64 v[12:13], v[8:9], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[10:11], v[10:11], s[12:13]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[10:11], v[10:11], v[16:17]
.LBB1_17:                               ; %Flow195
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s28, exec_lo
	s_and_b32 s18, s31, exec_lo
	s_or_b32 s28, s0, s18
.LBB1_18:                               ; %Flow194
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s18, s28, exec_lo
.LBB1_19:                               ; %Flow191
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_and_not1_saveexec_b32 s19, s27
	s_cbranch_execz .LBB1_21
; %bb.20:                               ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[28:29], s[10:11], 0x0
	v_lshlrev_b64 v[10:11], 3, v[6:7]
	s_or_b32 s18, s18, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s29, v5, s0
	s_load_b64 s[28:29], s[8:9], 0x8
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_add_co_u32 v12, s0, s28, v10
	v_add_co_ci_u32_e64 v13, s0, s29, v11, s0
	s_load_b64 s[28:29], s[6:7], 0x0
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v14, s0, s28, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v15, s0, s29, v5, s0
	v_add_co_u32 v16, s0, s28, v10
	v_add_co_ci_u32_e64 v17, s0, s29, v11, s0
	s_clause 0x1
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(3)
	v_add_co_u32 v8, s0, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, v9, v11, s0
	global_load_b64 v[10:11], v[8:9], off
	s_waitcnt vmcnt(3)
	v_mul_f64 v[12:13], v[12:13], s[12:13]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[12:13], v[12:13], v[14:15]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[14:15], -v[16:17], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[12:13], v[12:13], v[14:15]
.LBB1_21:                               ; %Flow196
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s18, s18, exec_lo
                                        ; implicit-def: $vgpr0
.LBB1_22:                               ; %Flow190
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_and_not1_saveexec_b32 s19, s26
	s_cbranch_execz .LBB1_30
; %bb.23:                               ; %NodeBlock
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s26, s18
	s_mov_b32 s27, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s27, exec_lo, s27
	s_cbranch_execz .LBB1_25
; %bb.24:                               ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[28:29], s[10:11], 0x0
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[10:11], 3, v[6:7]
	s_or_b32 s26, s18, exec_lo
                                        ; implicit-def: $vgpr0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s28, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s29, v5, s0
	global_load_b64 v[8:9], v[8:9], off
	s_load_b64 s[28:29], s[8:9], 0x8
	s_load_b64 s[30:31], s[6:7], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s0, s28, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s29, v11, s0
	v_add_co_u32 v14, s0, s30, v10
	v_add_co_ci_u32_e64 v15, s0, s31, v11, s0
	global_load_b64 v[12:13], v[12:13], off
	global_load_b64 v[14:15], v[14:15], off
	v_add_co_u32 v16, s0, s30, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v17, s0, s31, v5, s0
	global_load_b64 v[16:17], v[16:17], off
	s_waitcnt vmcnt(3)
	v_add_co_u32 v8, s0, v8, v10
	v_add_co_ci_u32_e64 v9, s0, v9, v11, s0
	global_load_b64 v[10:11], v[8:9], off
	s_waitcnt vmcnt(3)
	v_mul_f64 v[12:13], v[12:13], s[12:13]
	s_waitcnt vmcnt(2)
	v_add_f64 v[18:19], -v[14:15], 1.0
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[12:13], v[16:17]
	v_mul_f64 v[14:15], v[14:15], v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[12:13], v[12:13], v[14:15]
.LBB1_25:                               ; %Flow198
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_and_not1_saveexec_b32 s27, s27
	s_cbranch_execz .LBB1_29
; %bb.26:                               ; %LeafBlock
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_mov_b32 s29, s26
	s_mov_b32 s28, exec_lo
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr12_vgpr13
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_28
; %bb.27:                               ;   in Loop: Header=BB1_4 Depth=2
	s_load_b64 s[30:31], s[10:11], 0x0
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[10:11], 3, v[6:7]
	s_or_b32 s29, s26, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, s0, s30, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v9, s0, s31, v5, s0
	s_load_b64 s[30:31], s[8:9], 0x8
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s0, s30, v10
	v_add_co_ci_u32_e64 v13, s0, s31, v11, s0
	s_load_b64 s[30:31], s[6:7], 0x0
	global_load_b64 v[14:15], v[12:13], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v12, s0, s30, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s31, v5, s0
	global_load_b64 v[16:17], v[12:13], off
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, s0, v8, v10
	v_add_co_ci_u32_e64 v9, s0, v9, v11, s0
	global_load_b64 v[12:13], v[8:9], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[10:11], v[14:15], s[12:13]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[10:11], v[10:11], v[16:17]
.LBB1_28:                               ; %Flow200
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s26, exec_lo
	s_and_b32 s26, s29, exec_lo
	s_or_b32 s26, s0, s26
.LBB1_29:                               ; %Flow199
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s27
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s18, exec_lo
	s_and_b32 s18, s26, exec_lo
	s_or_b32 s18, s0, s18
.LBB1_30:                               ; %Flow197
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_and_saveexec_b32 s0, s18
	s_cbranch_execz .LBB1_32
; %bb.31:                               ; %.sink.split
                                        ;   in Loop: Header=BB1_4 Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[12:13]
	global_store_b64 v[8:9], v[10:11], off
.LBB1_32:                               ;   in Loop: Header=BB1_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v6, s1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s21, v6
	s_or_b32 s25, s0, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s25
	s_cbranch_execnz .LBB1_4
.LBB1_33:                               ; %Flow202
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	v_add_nc_u32_e32 v1, s22, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s0, s20, v1
	s_or_b32 s23, s0, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB1_2
.LBB1_34:                               ; %Flow204
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i, .Lfunc_end1-_Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1968
; NumSgprs: 38
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i ; -- Begin function _Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.globl	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
	.p2align	8
	.type	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i,@function
_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i: ; @_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
; %bb.0:
	s_clause 0x2
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x20
	s_load_b32 s12, s[0:1], 0x34
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[16:17], s[4:5], 0x8
	s_ashr_i32 s3, s2, 31
	s_add_u32 s0, s0, 40
	s_addc_u32 s1, s1, 0
	s_lshl_b64 s[18:19], s[2:3], 2
	s_and_b32 s13, s12, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s16, s16, s18
	s_addc_u32 s17, s17, s19
	s_load_b32 s12, s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB2_31
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[4:5], s[4:5], 0x20
	s_lshl_b64 s[14:15], s[2:3], 3
	s_load_b32 s16, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s4, s14
	s_addc_u32 s1, s5, s15
	s_add_u32 s2, s6, s14
	s_load_b64 s[0:1], s[0:1], 0x0
	s_addc_u32 s3, s7, s15
	s_add_u32 s4, s8, s14
	s_addc_u32 s5, s9, s15
	s_mov_b32 s6, 0xa0b5ed8d
	s_mov_b32 s8, 0x47ae147b
	s_add_u32 s10, s10, s14
	s_mov_b32 s7, 0x3eb0c6f7
	s_mov_b32 s9, 0x3f847ae1
	s_addc_u32 s11, s11, s15
	s_mul_i32 s13, s16, s13
	s_mov_b32 s14, 0
.LBB2_2:                                ; %NodeBlock124
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s16, 0
	s_mov_b32 s15, exec_lo
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	global_load_b32 v0, v[3:4], off
                                        ; implicit-def: $vgpr3_vgpr4
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 2, v0
	s_xor_b32 s15, exec_lo, s15
	s_cbranch_execz .LBB2_20
; %bb.3:                                ; %NodeBlock122
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s17, 0
	s_mov_b32 s16, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_lt_i32_e32 3, v0
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB2_17
; %bb.4:                                ; %NodeBlock120
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s18, 0
	s_mov_b32 s17, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_lt_i32_e32 4, v0
	s_xor_b32 s17, exec_lo, s17
	s_cbranch_execz .LBB2_12
; %bb.5:                                ; %LeafBlock118
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s19, 0
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_eq_u32_e32 5, v0
	s_cbranch_execz .LBB2_11
; %bb.6:                                ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[2:3], 0x0
	s_load_b64 s[22:23], s[4:5], 0x0
	v_lshlrev_b64 v[9:10], 3, v[1:2]
                                        ; implicit-def: $vgpr7_vgpr8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s20, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v10, vcc_lo
	v_add_co_u32 v5, vcc_lo, s22, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s23, v10, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt vmcnt(1)
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[3:4]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[5:6], v[5:6], s[6:7]
                                        ; implicit-def: $vgpr3_vgpr4
	s_and_saveexec_b32 s19, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s19, exec_lo, s19
	s_cbranch_execz .LBB2_8
; %bb.7:                                ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s20, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v10, vcc_lo
                                        ; implicit-def: $vgpr9_vgpr10
	global_load_b64 v[7:8], v[3:4], off
.LBB2_8:                                ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_not1_saveexec_b32 s19, s19
	s_cbranch_execz .LBB2_10
; %bb.9:                                ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[10:11], 0x0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[7:8], v[5:6], s[8:9]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s20, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v10, vcc_lo
	global_load_b64 v[5:6], v[3:4], off
.LBB2_10:                               ; %Flow126
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s19, exec_lo
.LBB2_11:                               ; %Flow130
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s18, s19, exec_lo
.LBB2_12:                               ; %Flow129
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_not1_saveexec_b32 s17, s17
	s_cbranch_execz .LBB2_16
; %bb.13:                               ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[2:3], 0x0
	v_lshlrev_b64 v[9:10], 3, v[1:2]
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s20, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v10, vcc_lo
	s_mov_b32 s20, s18
	global_load_b64 v[3:4], v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, 0, v[3:4]
                                        ; implicit-def: $vgpr3_vgpr4
	s_and_saveexec_b32 s19, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s19, exec_lo, s19
	s_cbranch_execz .LBB2_15
; %bb.14:                               ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s20, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v10, vcc_lo
	s_load_b64 s[20:21], s[10:11], 0x0
	global_load_b64 v[5:6], v[3:4], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s20, v9
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v10, vcc_lo
	s_or_b32 s20, s18, exec_lo
	global_load_b64 v[7:8], v[3:4], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[5:6], v[5:6], s[6:7]
.LBB2_15:                               ; %Flow132
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s18, s18, exec_lo
	s_and_b32 s19, s20, exec_lo
	s_or_b32 s18, s18, s19
.LBB2_16:                               ; %Flow131
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s17, s18, exec_lo
.LBB2_17:                               ; %Flow128
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB2_19
; %bb.18:                               ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[18:19], s[4:5], 0x0
	s_load_b64 s[20:21], s[2:3], 0x0
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_or_b32 s17, s17, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s18, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s19, v4, vcc_lo
	v_add_co_u32 v7, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s21, v4, vcc_lo
	global_load_b64 v[9:10], v[5:6], off
	global_load_b64 v[7:8], v[7:8], off
	s_load_b64 s[18:19], s[10:11], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s18, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s19, v4, vcc_lo
	global_load_b64 v[5:6], v[3:4], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[9:10], v[9:10], s[6:7]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[7:8], -v[7:8], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[7:8], v[9:10], v[7:8]
.LBB2_19:                               ; %Flow133
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s16, s17, exec_lo
                                        ; implicit-def: $vgpr0
.LBB2_20:                               ; %Flow127
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_not1_saveexec_b32 s15, s15
	s_cbranch_execz .LBB2_28
; %bb.21:                               ; %NodeBlock
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s17, s16
	s_mov_b32 s18, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_lt_i32_e32 1, v0
	s_xor_b32 s18, exec_lo, s18
	s_cbranch_execz .LBB2_23
; %bb.22:                               ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[4:5], 0x0
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_or_b32 s17, s16, exec_lo
                                        ; implicit-def: $vgpr0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s21, v4, vcc_lo
	s_load_b64 s[20:21], s[2:3], 0x0
	global_load_b64 v[7:8], v[5:6], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v5, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s21, v4, vcc_lo
	s_load_b64 s[20:21], s[10:11], 0x0
	global_load_b64 v[9:10], v[5:6], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v4, vcc_lo
	global_load_b64 v[5:6], v[3:4], off
	s_waitcnt vmcnt(2)
	v_mul_f64 v[7:8], v[7:8], s[6:7]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[7:8], v[7:8], v[9:10]
	v_add_f64 v[9:10], -v[9:10], 1.0
	v_mul_f64 v[7:8], v[7:8], v[9:10]
.LBB2_23:                               ; %Flow135
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_not1_saveexec_b32 s18, s18
	s_cbranch_execz .LBB2_27
; %bb.24:                               ; %LeafBlock
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s20, s17
	s_mov_b32 s19, exec_lo
                                        ; implicit-def: $vgpr3_vgpr4
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_26
; %bb.25:                               ;   in Loop: Header=BB2_2 Depth=1
	s_load_b64 s[20:21], s[4:5], 0x0
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v6, vcc_lo, s21, v4, vcc_lo
	s_load_b64 s[20:21], s[10:11], 0x0
	global_load_b64 v[5:6], v[5:6], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s20, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s21, v4, vcc_lo
	s_or_b32 s20, s17, exec_lo
	global_load_b64 v[7:8], v[3:4], off
	s_waitcnt vmcnt(1)
	v_mul_f64 v[5:6], v[5:6], s[6:7]
.LBB2_26:                               ; %Flow137
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s17, s17, exec_lo
	s_and_b32 s19, s20, exec_lo
	s_or_b32 s17, s17, s19
.LBB2_27:                               ; %Flow136
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s16, s16, exec_lo
	s_and_b32 s17, s17, exec_lo
	s_or_b32 s16, s16, s17
.LBB2_28:                               ; %Flow134
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	s_and_saveexec_b32 s15, s16
	s_cbranch_execz .LBB2_30
; %bb.29:                               ; %.sink.split
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	global_store_b64 v[3:4], v[5:6], off
.LBB2_30:                               ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_add_nc_u32_e32 v1, s13, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s12, v1
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB2_2
.LBB2_31:                               ; %Flow139
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i, .Lfunc_end2-_Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1340
; NumSgprs: 26
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13changeWeightsP2nnPPPdi ; -- Begin function _Z13changeWeightsP2nnPPPdi
	.globl	_Z13changeWeightsP2nnPPPdi
	.p2align	8
	.type	_Z13changeWeightsP2nnPPPdi,@function
_Z13changeWeightsP2nnPPPdi:             ; @_Z13changeWeightsP2nnPPPdi
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x24
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s16, s[4:5], 0x0
	s_and_b32 s12, s8, 0xffff
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s13, s12, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s16, s16, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s16, v1
	s_cbranch_execz .LBB3_17
; %bb.1:                                ; %.lr.ph81
	s_load_b32 s0, s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_bfe_u32 v0, v0, 20, 10
	s_mov_b32 s18, 0
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[3:4], s0
	s_clause 0x1
	s_load_b32 s10, s[2:3], 0xc
	s_load_b64 s[0:1], s[2:3], 0x0
	s_load_b64 s[8:9], s[4:5], 0x8
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s13, s10, 16
	s_mov_b32 s10, 0xd2f1a9fc
	s_mov_b32 s11, 0x3f50624d
	s_mul_i32 s17, s0, s12
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, s14, s13, v[2:3]
	s_mul_i32 s14, s1, s13
	s_mov_b32 s13, 0xbf50624d
.LBB3_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_4 Depth 2
                                        ;       Child Loop BB3_6 Depth 3
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s19, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v23, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v5, v23
	s_cbranch_execz .LBB3_16
; %bb.3:                                ; %.lr.ph77
                                        ;   in Loop: Header=BB3_2 Depth=1
	global_load_b32 v24, v[6:7], off offset:4
	s_clause 0x1
	s_load_b32 s0, s[2:3], 0x10
	s_load_b32 s20, s[2:3], 0x8
	v_lshlrev_b64 v[6:7], 3, v[1:2]
	v_mov_b32_e32 v11, v5
	s_mov_b32 s21, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, s15, s1, v[0:1]
	v_add_co_u32 v9, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v7, vcc_lo
	s_mul_i32 s20, s20, s1
	s_waitcnt vmcnt(0)
	v_cmp_lt_i32_e64 s0, v8, v24
.LBB3_4:                                ;   Parent Loop BB3_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB3_6 Depth 3
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s22, s0
	s_cbranch_execz .LBB3_15
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB3_4 Depth=2
	global_load_b64 v[14:15], v[9:10], off
	v_ashrrev_i32_e32 v12, 31, v11
	v_mov_b32_e32 v16, v8
	s_mov_b32 s23, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 3, v[11:12]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v14, vcc_lo, v14, v12
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v15, vcc_lo, v15, v13, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
.LBB3_6:                                ;   Parent Loop BB3_2 Depth=1
                                        ;     Parent Loop BB3_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_ashrrev_i32_e32 v17, 31, v16
	s_mov_b32 s12, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], 3, v[16:17]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v19, vcc_lo, v14, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v20, vcc_lo, v15, v18, vcc_lo
	global_load_b64 v[19:20], v[19:20], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[21:22], null, v[3:4], v[3:4], v[19:20]
	v_div_scale_f64 v[29:30], vcc_lo, v[19:20], v[3:4], v[19:20]
	v_rcp_f64_e32 v[25:26], v[21:22]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[27:28], -v[21:22], v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[25:26], v[27:28], v[25:26]
	v_fma_f64 v[27:28], -v[21:22], v[25:26], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[25:26], v[25:26], v[27:28], v[25:26]
	v_mul_f64 v[27:28], v[29:30], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[21:22], v[27:28], v[29:30]
	v_div_fmas_f64 v[21:22], v[21:22], v[25:26], v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[19:20], v[21:22], v[3:4], v[19:20]
	v_cmp_ngt_f64_e32 vcc_lo, s[10:11], v[19:20]
	v_cmp_nlt_f64_e64 s1, s[12:13], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, vcc_lo, s1
	s_and_saveexec_b32 s12, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s12
	s_cbranch_execz .LBB3_12
; %bb.7:                                ;   in Loop: Header=BB3_6 Depth=3
	s_load_b64 s[24:25], s[4:5], 0x18
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v21, vcc_lo, s24, v6
	v_add_co_ci_u32_e32 v22, vcc_lo, s25, v7, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v21, vcc_lo, v21, v12
	v_add_co_ci_u32_e32 v22, vcc_lo, v22, v13, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v17, vcc_lo, v21, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, v22, v18, vcc_lo
	global_load_b64 v[21:22], v[17:18], off
	v_cmpx_ngt_f64_e32 0, v[19:20]
	s_xor_b32 s24, exec_lo, s12
	s_cbranch_execz .LBB3_9
; %bb.8:                                ;   in Loop: Header=BB3_6 Depth=3
	s_mov_b32 s12, s10
	s_waitcnt vmcnt(0)
	v_add_f64 v[19:20], v[21:22], s[12:13]
                                        ; implicit-def: $vgpr21_vgpr22
	global_store_b64 v[17:18], v[19:20], off
                                        ; implicit-def: $vgpr17_vgpr18
.LBB3_9:                                ; %Flow
                                        ;   in Loop: Header=BB3_6 Depth=3
	s_and_not1_saveexec_b32 s12, s24
	s_cbranch_execz .LBB3_11
; %bb.10:                               ;   in Loop: Header=BB3_6 Depth=3
	s_waitcnt vmcnt(0)
	v_add_f64 v[19:20], v[21:22], s[10:11]
	global_store_b64 v[17:18], v[19:20], off
.LBB3_11:                               ; %Flow93
                                        ;   in Loop: Header=BB3_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $vgpr19_vgpr20
.LBB3_12:                               ; %Flow94
                                        ;   in Loop: Header=BB3_6 Depth=3
	s_and_not1_saveexec_b32 s1, s1
	s_cbranch_execz .LBB3_14
; %bb.13:                               ;   in Loop: Header=BB3_6 Depth=3
	s_load_b64 s[24:25], s[4:5], 0x18
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_co_u32 v21, vcc_lo, s24, v6
	v_add_co_ci_u32_e32 v22, vcc_lo, s25, v7, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v21, vcc_lo, v21, v12
	v_add_co_ci_u32_e32 v22, vcc_lo, v22, v13, vcc_lo
	global_load_b64 v[21:22], v[21:22], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v17, vcc_lo, v21, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, v22, v18, vcc_lo
	global_load_b64 v[21:22], v[17:18], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[19:20], v[21:22], -v[19:20]
	global_store_b64 v[17:18], v[19:20], off
.LBB3_14:                               ;   in Loop: Header=BB3_6 Depth=3
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v16, s20, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v16, v24
	s_or_b32 s23, vcc_lo, s23
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB3_6
.LBB3_15:                               ; %Flow96
                                        ;   in Loop: Header=BB3_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v11, s14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v11, v23
	s_or_b32 s21, vcc_lo, s21
	s_and_not1_b32 exec_lo, exec_lo, s21
	s_cbranch_execnz .LBB3_4
.LBB3_16:                               ; %Flow98
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s19
	v_add_nc_u32_e32 v1, s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s16, v1
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB3_2
.LBB3_17:                               ; %Flow100
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13changeWeightsP2nnPPPdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 31
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z13changeWeightsP2nnPPPdi, .Lfunc_end3-_Z13changeWeightsP2nnPPPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 984
; NumSgprs: 28
; NumVgprs: 31
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 31
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z12changeBiasesP2nnPPdi ; -- Begin function _Z12changeBiasesP2nnPPdi
	.globl	_Z12changeBiasesP2nnPPdi
	.p2align	8
	.type	_Z12changeBiasesP2nnPPdi,@function
_Z12changeBiasesP2nnPPdi:               ; @_Z12changeBiasesP2nnPPdi
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s8, s[0:1], 0x24
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s10, s[4:5], 0x0
	s_and_b32 s12, s8, 0xffff
	s_mov_b32 s8, exec_lo
	v_mad_u64_u32 v[1:2], null, s14, s12, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_add_i32 s10, s10, -1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s10, v1
	s_cbranch_execz .LBB4_14
; %bb.1:                                ; %.lr.ph53
	s_load_b32 s0, s[0:1], 0x10
	v_bfe_u32 v0, v0, 10, 10
	s_mov_b32 s13, 0
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[3:4], s0
	s_clause 0x1
	s_load_b32 s8, s[2:3], 0xc
	s_load_b64 s[0:1], s[2:3], 0x0
	s_load_b64 s[2:3], s[4:5], 0x8
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s11, s8, 16
	s_mov_b32 s8, 0xd2f1a9fc
	v_mad_u64_u32 v[5:6], null, s15, s11, v[0:1]
	s_mov_b32 s9, 0x3f50624d
	s_mul_i32 s11, s1, s11
	s_mul_i32 s12, s0, s12
	s_mov_b32 s1, 0xbf50624d
.LBB4_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_4 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[1:2]
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v0, v[6:7], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v5, v0
	s_cbranch_execz .LBB4_13
; %bb.3:                                ; %.lr.ph
                                        ;   in Loop: Header=BB4_2 Depth=1
	v_lshlrev_b64 v[6:7], 3, v[1:2]
	v_mov_b32_e32 v10, v5
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v7, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
.LBB4_4:                                ;   Parent Loop BB4_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_ashrrev_i32_e32 v11, 31, v10
	s_mov_b32 s0, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 3, v[10:11]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v8, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v14, vcc_lo, v9, v12, vcc_lo
	global_load_b64 v[13:14], v[13:14], off
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[15:16], null, v[3:4], v[3:4], v[13:14]
	v_div_scale_f64 v[21:22], vcc_lo, v[13:14], v[3:4], v[13:14]
	v_rcp_f64_e32 v[17:18], v[15:16]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[19:20], -v[15:16], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	v_fma_f64 v[19:20], -v[15:16], v[17:18], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	v_mul_f64 v[19:20], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[15:16], -v[15:16], v[19:20], v[21:22]
	v_div_fmas_f64 v[15:16], v[15:16], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[13:14], v[15:16], v[3:4], v[13:14]
	v_cmp_ngt_f64_e32 vcc_lo, s[8:9], v[13:14]
	v_cmp_nlt_f64_e64 s0, s[0:1], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s16, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB4_10
; %bb.5:                                ;   in Loop: Header=BB4_4 Depth=2
	s_load_b64 s[18:19], s[4:5], 0x10
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v15, vcc_lo, s18, v6
	v_add_co_ci_u32_e32 v16, vcc_lo, s19, v7, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v12, vcc_lo
	global_load_b64 v[15:16], v[11:12], off
	v_cmpx_ngt_f64_e32 0, v[13:14]
	s_xor_b32 s17, exec_lo, s0
	s_cbranch_execz .LBB4_7
; %bb.6:                                ;   in Loop: Header=BB4_4 Depth=2
	s_mov_b32 s0, s8
	s_waitcnt vmcnt(0)
	v_add_f64 v[13:14], v[15:16], s[0:1]
                                        ; implicit-def: $vgpr15_vgpr16
	global_store_b64 v[11:12], v[13:14], off
                                        ; implicit-def: $vgpr11_vgpr12
.LBB4_7:                                ; %Flow
                                        ;   in Loop: Header=BB4_4 Depth=2
	s_and_not1_saveexec_b32 s0, s17
	s_cbranch_execz .LBB4_9
; %bb.8:                                ;   in Loop: Header=BB4_4 Depth=2
	s_waitcnt vmcnt(0)
	v_add_f64 v[13:14], v[15:16], s[8:9]
	global_store_b64 v[11:12], v[13:14], off
.LBB4_9:                                ; %Flow63
                                        ;   in Loop: Header=BB4_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr11_vgpr12
                                        ; implicit-def: $vgpr13_vgpr14
.LBB4_10:                               ; %Flow64
                                        ;   in Loop: Header=BB4_4 Depth=2
	s_and_not1_saveexec_b32 s0, s16
	s_cbranch_execz .LBB4_12
; %bb.11:                               ;   in Loop: Header=BB4_4 Depth=2
	s_load_b64 s[16:17], s[4:5], 0x10
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_co_u32 v15, vcc_lo, s16, v6
	v_add_co_ci_u32_e32 v16, vcc_lo, s17, v7, vcc_lo
	global_load_b64 v[15:16], v[15:16], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v15, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, v16, v12, vcc_lo
	global_load_b64 v[15:16], v[11:12], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[13:14], v[15:16], -v[13:14]
	global_store_b64 v[11:12], v[13:14], off
.LBB4_12:                               ;   in Loop: Header=BB4_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v10, s11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i32_e32 vcc_lo, v10, v0
	s_or_b32 s15, vcc_lo, s15
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB4_4
.LBB4_13:                               ; %Flow66
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v1, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s10, v1
	s_or_b32 s13, vcc_lo, s13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB4_2
.LBB4_14:                               ; %Flow68
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12changeBiasesP2nnPPdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12changeBiasesP2nnPPdi, .Lfunc_end4-_Z12changeBiasesP2nnPPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 768
; NumSgprs: 22
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14getErrorKernelP2nnPPdS2_S1_i
    .private_segment_fixed_size: 0
    .sgpr_count:     38
    .sgpr_spill_count: 0
    .symbol:         _Z14getErrorKernelP2nnPPdS2_S1_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     17
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i
    .private_segment_fixed_size: 0
    .sgpr_count:     38
    .sgpr_spill_count: 0
    .symbol:         _Z28backpropogationWeightsKernelP2nnPPdS2_PS2_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27backpropogationBiasesKernelP2nnPPdS2_S2_i
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z27backpropogationBiasesKernelP2nnPPdS2_S2_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13changeWeightsP2nnPPPdi
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z13changeWeightsP2nnPPPdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     31
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12changeBiasesP2nnPPdi
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z12changeBiasesP2nnPPdi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
