#include <cstdlib>
#include <iostream>

using namespace std;

cudaEvent_t start, stop;

void startKernelTime (void) {
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	cudaEventRecord(start);
}

void stopKernelTime (void) {
	cudaEventRecord(stop);

	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);

	cout << milliseconds << " ms have elapsed for the CUDA execution" << endl;
}

void checkCUDAError (const char *msg) {
	cudaError_t err = cudaGetLastError();
	if( cudaSuccess != err) {
		cerr << "Cuda error: " << msg << ", " << cudaGetErrorString( err) << endl;
		exit(-1);
	}
}

void printMatrix(int N, char c, float *M) {
    cout << c << endl;
    for (int i = 0; i < N; i++) {
        cout << endl;
        for (int j = 0; j < N; j++) {
            cout << M[i * N + j] << "    ";
        }
    }
    cout << "\n\n";
}

void fillMatrices(float *A, float *B, int N) {
    for (int i = 0; i < N; ++i) {
        for (int j = 0; j < N; ++j) {
            A[i*N+j] = ((float)rand()) / ((float)RAND_MAX);
            B[i*N+j] = 1;
        }
    }

}

__global__ void matMultKernel_ijk(int N, float *A, float *B, float *C) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;

    if (i < N && j < N) {
        C[i * N + j] = 0;
        for (int k = 0; k < N; k++) {
            C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }
}

__global__ void matMultKernel_ikj(int N, float *A, float *B, float *C) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int k = blockIdx.y * blockDim.y + threadIdx.y;

    if (i < N && k < N/*  && k >= 1 */) {
        for (int j = 0; j < N; j++) {
            atomicAdd(&C[i*N+j],A[i * N + k] * B[k * N + j]);
            // C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }
}

void matMultGPU(int N, float *A, float *B, float *C) {
    int tam = 16;

    dim3 blocksPerGrid(tam, tam);   //Garantir que serão utilizados todos SMX
    dim3 threadsPerBlock((N+tam*tam-1)/(tam*tam), (N+tam*tam-1)/(tam*tam));
    
    // declare variable with size of the array in bytes
    int bytes = N * N * sizeof(float);

	// pointers to the device memory
    float *dA, *dB, *dC; 

	// allocate the memory on the device
	cudaMalloc((void**) &dA, bytes);
	cudaMalloc((void**) &dB, bytes);
	cudaMalloc((void**) &dC, bytes);
    
    startKernelTime();

    checkCUDAError("mem allocation");
	// copy inputs to the device
	cudaMemcpy(dA, A, bytes, cudaMemcpyHostToDevice);
    cudaMemcpy(dB, B, bytes, cudaMemcpyHostToDevice);


    cudaMemcpy(dC, C, bytes, cudaMemcpyHostToDevice); /** Temporário **/

	checkCUDAError("memcpy h->d");
    // launch the kernel
    matMultKernel_ikj <<< threadsPerBlock, blocksPerGrid >>> (N, dA, dB, dC);
    // matMultKernel_ijk <<< threadsPerBlock, blocksPerGrid >>> (N, dA, dB, dC);

	checkCUDAError("kernel invocation");
	// copy the output to the host
    cudaThreadSynchronize();

	cudaMemcpy(C, dC, bytes, cudaMemcpyDeviceToHost);
	checkCUDAError("memcpy d->h");
    
    stopKernelTime();

	// free the device memory
	cudaFree(dA); cudaFree(dB); cudaFree(dC);
	checkCUDAError("mem free");
}

int main(int argc, char const *argv[]) {
    if (argc == 1) {
        cout << "Insira o tamanho da matriz" << endl;
        exit(1);
    }

    int const N = atoi(argv[1]);

    float A[N * N];
    float B[N * N];
    float C[N * N];

    fillMatrices(A, B, N);


    for (int i = 0; i < N * N; i++) {
        C[i] = 0;
    }

    matMultGPU(N, A, B, C);

    // printMatrix(N, 'A', A);
    // printMatrix(N, 'B', B);
    // printMatrix(N, 'C', C);
}

	.file	"tmpxft_002abf7e_00000000-6_matMultGPU.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3644:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3644:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4302:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4302:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z15startKernelTimev
	.type	_Z15startKernelTimev, @function
_Z15startKernelTimev:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	start(%rip), %rdi
	call	cudaEventCreate@PLT
	leaq	stop(%rip), %rdi
	call	cudaEventCreate@PLT
	movq	start(%rip), %rdi
	xorl	%esi, %esi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z15startKernelTimev, .-_Z15startKernelTimev
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	" ms have elapsed for the CUDA execution"
	.text
	.globl	_Z14stopKernelTimev
	.type	_Z14stopKernelTimev, @function
_Z14stopKernelTimev:
.LFB3636:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	stop(%rip), %rdi
	xorl	%esi, %esi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	cudaEventRecord@PLT
	movq	stop(%rip), %rdi
	call	cudaEventSynchronize@PLT
	movq	stop(%rip), %rdx
	movq	start(%rip), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	4(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z14stopKernelTimev, .-_Z14stopKernelTimev
	.section	.rodata.str1.1
.LC2:
	.string	"Cuda error: "
.LC3:
	.string	", "
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L9
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %edi
	movq	%rax, %rbp
	call	cudaGetErrorString@PLT
	movq	%rbp, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	orl	$-1, %edi
	call	exit@PLT
.L9:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.section	.rodata.str1.1
.LC4:
	.string	"    "
.LC5:
	.string	"\n\n"
	.text
	.globl	_Z11printMatrixicPf
	.type	_Z11printMatrixicPf, @function
_Z11printMatrixicPf:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movsbl	%sil, %esi
	leaq	.LC4(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movslq	%edi, %r14
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r14, %r12
	salq	$2, %r14
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 64
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L13:
	cmpl	%r12d, %r13d
	jge	.L18
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	leaq	(%rbx,%r14), %rbp
	call	_ZNSolsEPFRSoS_E.isra.0
.L14:
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%rbx), %xmm0
	addq	$4, %rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	%rbp, %rbx
	jne	.L14
	incl	%r13d
	jmp	.L13
.L18:
	popq	%rax
	.cfi_def_cfa_offset 56
	leaq	.LC5(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	.cfi_endproc
.LFE3638:
	.size	_Z11printMatrixicPf, .-_Z11printMatrixicPf
	.globl	_Z12fillMatricesPfS_i
	.type	_Z12fillMatricesPfS_i, @function
_Z12fillMatricesPfS_i:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%edx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	0(,%r13,4), %rax
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rax, 8(%rsp)
.L20:
	cmpl	%ebp, %r12d
	jge	.L25
	movq	8(%rsp), %rax
	leaq	(%rbx,%rax), %r13
.L21:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC6(%rip), %xmm0
	movss	%xmm0, (%r14,%rbx)
	movl	$0x3f800000, (%r15,%rbx)
	addq	$4, %rbx
	cmpq	%r13, %rbx
	jne	.L21
	incl	%r12d
	jmp	.L20
.L25:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z12fillMatricesPfS_i, .-_Z12fillMatricesPfS_i
	.globl	_Z42__device_stub__Z17matMultKernel_ijkiPfS_S_iPfS_S_
	.type	_Z42__device_stub__Z17matMultKernel_ijkiPfS_S_iPfS_S_, @function
_Z42__device_stub__Z17matMultKernel_ijkiPfS_S_iPfS_S_:
.LFB3666:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17matMultKernel_ijkiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L26:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3666:
	.size	_Z42__device_stub__Z17matMultKernel_ijkiPfS_S_iPfS_S_, .-_Z42__device_stub__Z17matMultKernel_ijkiPfS_S_iPfS_S_
	.globl	_Z17matMultKernel_ijkiPfS_S_
	.type	_Z17matMultKernel_ijkiPfS_S_, @function
_Z17matMultKernel_ijkiPfS_S_:
.LFB3667:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17matMultKernel_ijkiPfS_S_iPfS_S_
	.cfi_endproc
.LFE3667:
	.size	_Z17matMultKernel_ijkiPfS_S_, .-_Z17matMultKernel_ijkiPfS_S_
	.globl	_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_
	.type	_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_, @function
_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17matMultKernel_ikjiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L31:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_, .-_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_
	.globl	_Z17matMultKernel_ikjiPfS_S_
	.type	_Z17matMultKernel_ikjiPfS_S_, @function
_Z17matMultKernel_ikjiPfS_S_:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_
	.cfi_endproc
.LFE3669:
	.size	_Z17matMultKernel_ikjiPfS_S_, .-_Z17matMultKernel_ikjiPfS_S_
	.section	.rodata.str1.1
.LC8:
	.string	"mem allocation"
.LC9:
	.string	"memcpy h->d"
.LC10:
	.string	"kernel invocation"
.LC11:
	.string	"memcpy d->h"
.LC12:
	.string	"mem free"
	.text
	.globl	_Z10matMultGPUiPfS_S_
	.type	_Z10matMultGPUiPfS_S_, @function
_Z10matMultGPUiPfS_S_:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rcx, %rbp
	movl	$256, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edi, %ebx
	imull	%edi, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	movabsq	$68719476752, %rax
	sall	$2, %ebx
	movl	$1, 40(%rsp)
	movslq	%ebx, %rbx
	movl	$1, 52(%rsp)
	movq	%rbx, %rsi
	movq	%rax, 32(%rsp)
	leal	255(%rdi), %eax
	leaq	8(%rsp), %rdi
	cltd
	idivl	%ecx
	movl	%eax, 44(%rsp)
	movl	%eax, 48(%rsp)
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	call	_Z15startKernelTimev
	leaq	.LC8(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	%r14d, %edi
	movq	8(%rsp), %rsi
	call	_Z42__device_stub__Z17matMultKernel_ikjiPfS_S_iPfS_S_
.L37:
	leaq	.LC10(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	call	cudaThreadSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	call	_Z14stopKernelTimev
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC12(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z10matMultGPUiPfS_S_, .-_Z10matMultGPUiPfS_S_
	.section	.rodata.str1.1
.LC13:
	.string	"Insira o tamanho da matriz"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$24, %rsp
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	decl	%edi
	jne	.L41
	leaq	.LC13(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$1, %edi
	call	exit@PLT
.L41:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	%rsp, %rcx
	movl	%eax, %r12d
	movl	%eax, %ebx
	imull	%eax, %r12d
	movslq	%r12d, %rax
	leaq	15(,%rax,4), %rax
	movq	%rax, %rsi
	movq	%rax, %rdx
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L42:
	cmpq	%rcx, %rsp
	je	.L43
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L42
.L43:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L44
	orq	$0, -8(%rsp,%rdx)
.L44:
	movq	%rax, %rsi
	movq	%rax, %rdx
	movq	%rsp, %rcx
	movq	%rsp, %r14
	andq	$-4096, %rsi
	andq	$-16, %rdx
	subq	%rsi, %rcx
.L45:
	cmpq	%rcx, %rsp
	je	.L46
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L45
.L46:
	andl	$4095, %edx
	subq	%rdx, %rsp
	testq	%rdx, %rdx
	je	.L47
	orq	$0, -8(%rsp,%rdx)
.L47:
	movq	%rax, %rdx
	movq	%rsp, %rcx
	andq	$-4096, %rax
	movq	%rsp, %r15
	andq	$-16, %rdx
	subq	%rax, %rcx
.L48:
	cmpq	%rcx, %rsp
	je	.L49
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L48
.L49:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L50
	orq	$0, -8(%rsp,%rax)
.L50:
	movl	%ebx, %edx
	movq	%r15, %rsi
	movq	%r14, %rdi
	movq	%rsp, %r13
	call	_Z12fillMatricesPfS_i
	xorl	%eax, %eax
.L51:
	cmpl	%eax, %r12d
	jle	.L64
	movl	$0x00000000, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L51
.L64:
	movq	%r13, %rcx
	movq	%r15, %rdx
	movq	%r14, %rsi
	movl	%ebx, %edi
	call	_Z10matMultGPUiPfS_S_
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3641:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z17matMultKernel_ikjiPfS_S_"
.LC15:
	.string	"_Z17matMultKernel_ijkiPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3671:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17matMultKernel_ikjiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17matMultKernel_ijkiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3671:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	stop
	.bss
	.align 8
	.type	stop, @object
	.size	stop, 8
stop:
	.zero	8
	.globl	start
	.align 8
	.type	start, @object
	.size	start, 8
start:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <iostream>

using namespace std;

hipEvent_t start, stop;

void startKernelTime (void) {
	hipEventCreate(&start);
	hipEventCreate(&stop);

	hipEventRecord(start);
}

void stopKernelTime (void) {
	hipEventRecord(stop);

	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);

	cout << milliseconds << " ms have elapsed for the CUDA execution" << endl;
}

void checkCUDAError (const char *msg) {
	hipError_t err = hipGetLastError();
	if( hipSuccess != err) {
		cerr << "Cuda error: " << msg << ", " << hipGetErrorString( err) << endl;
		exit(-1);
	}
}

void printMatrix(int N, char c, float *M) {
    cout << c << endl;
    for (int i = 0; i < N; i++) {
        cout << endl;
        for (int j = 0; j < N; j++) {
            cout << M[i * N + j] << "    ";
        }
    }
    cout << "\n\n";
}

void fillMatrices(float *A, float *B, int N) {
    for (int i = 0; i < N; ++i) {
        for (int j = 0; j < N; ++j) {
            A[i*N+j] = ((float)rand()) / ((float)RAND_MAX);
            B[i*N+j] = 1;
        }
    }

}

__global__ void matMultKernel_ijk(int N, float *A, float *B, float *C) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int j = blockIdx.y * blockDim.y + threadIdx.y;

    if (i < N && j < N) {
        C[i * N + j] = 0;
        for (int k = 0; k < N; k++) {
            C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }
}

__global__ void matMultKernel_ikj(int N, float *A, float *B, float *C) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    int k = blockIdx.y * blockDim.y + threadIdx.y;

    if (i < N && k < N/*  && k >= 1 */) {
        for (int j = 0; j < N; j++) {
            atomicAdd(&C[i*N+j],A[i * N + k] * B[k * N + j]);
            // C[i * N + j] += A[i * N + k] * B[k * N + j];
        }
    }
}

void matMultGPU(int N, float *A, float *B, float *C) {
    int tam = 16;

    dim3 blocksPerGrid(tam, tam);   //Garantir que serão utilizados todos SMX
    dim3 threadsPerBlock((N+tam*tam-1)/(tam*tam), (N+tam*tam-1)/(tam*tam));
    
    // declare variable with size of the array in bytes
    int bytes = N * N * sizeof(float);

	// pointers to the device memory
    float *dA, *dB, *dC; 

	// allocate the memory on the device
	hipMalloc((void**) &dA, bytes);
	hipMalloc((void**) &dB, bytes);
	hipMalloc((void**) &dC, bytes);
    
    startKernelTime();

    checkCUDAError("mem allocation");
	// copy inputs to the device
	hipMemcpy(dA, A, bytes, hipMemcpyHostToDevice);
    hipMemcpy(dB, B, bytes, hipMemcpyHostToDevice);


    hipMemcpy(dC, C, bytes, hipMemcpyHostToDevice); /** Temporário **/

	checkCUDAError("memcpy h->d");
    // launch the kernel
    matMultKernel_ikj <<< threadsPerBlock, blocksPerGrid >>> (N, dA, dB, dC);
    // matMultKernel_ijk <<< threadsPerBlock, blocksPerGrid >>> (N, dA, dB, dC);

	checkCUDAError("kernel invocation");
	// copy the output to the host
    hipDeviceSynchronize();

	hipMemcpy(C, dC, bytes, hipMemcpyDeviceToHost);
	checkCUDAError("memcpy d->h");
    
    stopKernelTime();

	// free the device memory
	hipFree(dA); hipFree(dB); hipFree(dC);
	checkCUDAError("mem free");
}

int main(int argc, char const *argv[]) {
    if (argc == 1) {
        cout << "Insira o tamanho da matriz" << endl;
        exit(1);
    }

    int const N = atoi(argv[1]);

    float A[N * N];
    float B[N * N];
    float C[N * N];

    fillMatrices(A, B, N);


    for (int i = 0; i < N * N; i++) {
        C[i] = 0;
    }

    matMultGPU(N, A, B, C);

    // printMatrix(N, 'A', A);
    // printMatrix(N, 'B', B);
    // printMatrix(N, 'C', C);
}

	.text
	.file	"matMultGPU.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z15startKernelTimev            # -- Begin function _Z15startKernelTimev
	.type	_Z15startKernelTimev,@function
_Z15startKernelTimev:                   # @_Z15startKernelTimev
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$start, %edi
	callq	hipEventCreate
	movl	$stop, %edi
	callq	hipEventCreate
	movq	start(%rip), %rdi
	xorl	%esi, %esi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipEventRecord                  # TAILCALL
.Lfunc_end0:
	.size	_Z15startKernelTimev, .Lfunc_end0-_Z15startKernelTimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14stopKernelTimev             # -- Begin function _Z14stopKernelTimev
	.type	_Z14stopKernelTimev,@function
_Z14stopKernelTimev:                    # @_Z14stopKernelTimev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	stop(%rip), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	stop(%rip), %rdi
	callq	hipEventSynchronize
	leaq	12(%rsp), %rbx
	movl	$0, (%rbx)
	movq	start(%rip), %rsi
	movq	stop(%rip), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$39, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14stopKernelTimev, .Lfunc_end1-_Z14stopKernelTimev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %r14
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 32
	movl	%eax, %ebx
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movq	%r14, %rdi
	movq	%rax, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$-1, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end2-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixicPf             # -- Begin function _Z11printMatrixicPf
	.type	_Z11printMatrixicPf,@function
_Z11printMatrixicPf:                    # @_Z11printMatrixicPf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movl	%edi, %ebp
	movb	%sil, 15(%rsp)
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	cmpq	$0, _ZSt4cout+16(%rax)
	je	.LBB3_2
# %bb.1:
	leaq	15(%rsp), %rsi
	movl	$_ZSt4cout, %edi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rax, %r14
	jmp	.LBB3_3
.LBB3_2:
	movsbl	%sil, %esi
	movl	$_ZSt4cout, %r14d
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.LBB3_3:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c.exit
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	testl	%ebp, %ebp
	jle	.LBB3_8
# %bb.4:                                # %.lr.ph14
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
	xorl	%r13d, %r13d
.LBB3_5:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	movl	%r15d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r12
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebx, %ebx
.LBB3_6:                                #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%rbx,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB3_6
# %bb.7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_5 Depth=1
	incq	%r13
	addl	%ebp, %r15d
	cmpq	%r14, %r13
	jne	.LBB3_5
.LBB3_8:                                # %._crit_edge15
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11printMatrixicPf, .Lfunc_end3-_Z11printMatrixicPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12fillMatricesPfS_i
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z12fillMatricesPfS_i
	.type	_Z12fillMatricesPfS_i,@function
_Z12fillMatricesPfS_i:                  # @_Z12fillMatricesPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	testl	%edx, %edx
	jle	.LBB4_5
# %bb.1:                                # %.preheader.lr.ph
	movl	4(%rsp), %r12d                  # 4-byte Reload
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB4_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	movl	%r13d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%ebx, %ebx
.LBB4_3:                                #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%rbx,4)
	movl	$1065353216, (%r14,%rbx,4)      # imm = 0x3F800000
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB4_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	incq	%rbp
	addl	4(%rsp), %r13d                  # 4-byte Folded Reload
	cmpq	%r12, %rbp
	jne	.LBB4_2
.LBB4_5:                                # %._crit_edge17
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z12fillMatricesPfS_i, .Lfunc_end4-_Z12fillMatricesPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__matMultKernel_ijkiPfS_S_ # -- Begin function _Z32__device_stub__matMultKernel_ijkiPfS_S_
	.type	_Z32__device_stub__matMultKernel_ijkiPfS_S_,@function
_Z32__device_stub__matMultKernel_ijkiPfS_S_: # @_Z32__device_stub__matMultKernel_ijkiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17matMultKernel_ijkiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__matMultKernel_ijkiPfS_S_, .Lfunc_end5-_Z32__device_stub__matMultKernel_ijkiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__matMultKernel_ikjiPfS_S_ # -- Begin function _Z32__device_stub__matMultKernel_ikjiPfS_S_
	.type	_Z32__device_stub__matMultKernel_ikjiPfS_S_,@function
_Z32__device_stub__matMultKernel_ikjiPfS_S_: # @_Z32__device_stub__matMultKernel_ikjiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17matMultKernel_ikjiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__matMultKernel_ikjiPfS_S_, .Lfunc_end6-_Z32__device_stub__matMultKernel_ikjiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z10matMultGPUiPfS_S_           # -- Begin function _Z10matMultGPUiPfS_S_
	.type	_Z10matMultGPUiPfS_S_,@function
_Z10matMultGPUiPfS_S_:                  # @_Z10matMultGPUiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movl	%edi, %r15d
	leal	255(%r15), %eax
	leal	510(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$8, %ecx
	movq	%rcx, %r12
	shlq	$32, %r12
	orq	%rcx, %r12
	movl	%edi, %eax
	imull	%edi, %eax
	shll	$2, %eax
	movslq	%eax, %r14
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	callq	_Z15startKernelTimev
	movl	$.L.str.5, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	(%rbx), %rdi
	movq	32(%rsp), %rbx                  # 8-byte Reload
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.6, %edi
	callq	_Z14checkCUDAErrorPKc
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r15d, %edi
	callq	_Z32__device_stub__matMultKernel_ikjiPfS_S_
.LBB7_2:
	movl	$.L.str.7, %edi
	callq	_Z14checkCUDAErrorPKc
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.8, %edi
	callq	_Z14checkCUDAErrorPKc
	callq	_Z14stopKernelTimev
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.L.str.9, %edi
	callq	_Z14checkCUDAErrorPKc
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z10matMultGPUiPfS_S_, .Lfunc_end7-_Z10matMultGPUiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	pushq	%rax
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	cmpl	$1, %edi
	je	.LBB8_4
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movl	%eax, %r14d
	imull	%r14d, %r14d
	movq	%rsp, %r15
	leaq	15(,%r14,4), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	movq	%rsp, %r12
	subq	%rax, %r12
	movq	%r12, %rsp
	movq	%rsp, %r13
	subq	%rax, %r13
	movq	%r13, %rsp
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%ebx, %edx
	callq	_Z12fillMatricesPfS_i
	testl	%ebx, %ebx
	je	.LBB8_3
# %bb.2:                                # %.lr.ph.preheader
	cmpq	$1, %r14
	adcq	$0, %r14
	shlq	$2, %r14
	movq	%r13, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	callq	memset@PLT
.LBB8_3:                                # %._crit_edge
	movl	%ebx, %edi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	_Z10matMultGPUiPfS_S_
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB8_4:
	.cfi_def_cfa %rbp, 16
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17matMultKernel_ijkiPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17matMultKernel_ikjiPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	start,@object                   # @start
	.bss
	.globl	start
	.p2align	3, 0x0
start:
	.quad	0
	.size	start, 8

	.type	stop,@object                    # @stop
	.globl	stop
	.p2align	3, 0x0
stop:
	.quad	0
	.size	stop, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" ms have elapsed for the CUDA execution"
	.size	.L.str, 40

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Cuda error: "
	.size	.L.str.1, 13

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	", "
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"    "
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n\n"
	.size	.L.str.4, 3

	.type	_Z17matMultKernel_ijkiPfS_S_,@object # @_Z17matMultKernel_ijkiPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z17matMultKernel_ijkiPfS_S_
	.p2align	3, 0x0
_Z17matMultKernel_ijkiPfS_S_:
	.quad	_Z32__device_stub__matMultKernel_ijkiPfS_S_
	.size	_Z17matMultKernel_ijkiPfS_S_, 8

	.type	_Z17matMultKernel_ikjiPfS_S_,@object # @_Z17matMultKernel_ikjiPfS_S_
	.globl	_Z17matMultKernel_ikjiPfS_S_
	.p2align	3, 0x0
_Z17matMultKernel_ikjiPfS_S_:
	.quad	_Z32__device_stub__matMultKernel_ikjiPfS_S_
	.size	_Z17matMultKernel_ikjiPfS_S_, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"mem allocation"
	.size	.L.str.5, 15

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"memcpy h->d"
	.size	.L.str.6, 12

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"kernel invocation"
	.size	.L.str.7, 18

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"memcpy d->h"
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"mem free"
	.size	.L.str.9, 9

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Insira o tamanho da matriz"
	.size	.L.str.10, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17matMultKernel_ijkiPfS_S_"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17matMultKernel_ikjiPfS_S_"
	.size	.L__unnamed_2, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__matMultKernel_ijkiPfS_S_
	.addrsig_sym _Z32__device_stub__matMultKernel_ikjiPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym start
	.addrsig_sym stop
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _Z17matMultKernel_ijkiPfS_S_
	.addrsig_sym _Z17matMultKernel_ikjiPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17matMultKernel_ijkiPfS_S_ ; -- Begin function _Z17matMultKernel_ijkiPfS_S_
	.globl	_Z17matMultKernel_ijkiPfS_S_
	.p2align	8
	.type	_Z17matMultKernel_ijkiPfS_S_,@function
_Z17matMultKernel_ijkiPfS_S_:           ; @_Z17matMultKernel_ijkiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s3, v[4:5]
	s_mov_b32 s2, exec_lo
	v_max_i32_e32 v1, v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	v_mul_lo_u32 v4, v2, s4
	s_load_b64 s[2:3], s[0:1], 0x18
	s_cmp_lt_i32 s4, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v1, v4, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x8
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_mov_b32 s0, s4
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v1, v[4:5], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v1, v7
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17matMultKernel_ijkiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17matMultKernel_ijkiPfS_S_, .Lfunc_end0-_Z17matMultKernel_ijkiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17matMultKernel_ikjiPfS_S_ ; -- Begin function _Z17matMultKernel_ikjiPfS_S_
	.globl	_Z17matMultKernel_ikjiPfS_S_
	.p2align	8
	.type	_Z17matMultKernel_ikjiPfS_S_,@function
_Z17matMultKernel_ikjiPfS_S_:           ; @_Z17matMultKernel_ikjiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x0
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s15, s4, v[4:5]
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
	v_max3_i32 v1, v2, v0, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB1_5
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v6, v2, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	v_mul_lo_u32 v7, v0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, v6, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v2, vcc_lo
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
	v_add_nc_u32_e32 v2, s3, v7
	v_add_nc_u32_e32 v4, s3, v6
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v4, v[0:1], off
	global_load_b32 v8, v[8:9], off
	global_load_b32 v5, v[2:3], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v8, v4, v8
.LBB1_3:                                ; %atomicrmw.start
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v4, v5, v8
	global_atomic_cmpswap_b32 v4, v[2:3], v[4:5], off glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v4, v5
	v_mov_b32_e32 v5, v4
	s_or_b32 s4, vcc_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB1_3
; %bb.4:                                ; %atomicrmw.end
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s3, s2
	s_cbranch_scc1 .LBB1_2
.LBB1_5:                                ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17matMultKernel_ikjiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17matMultKernel_ikjiPfS_S_, .Lfunc_end1-_Z17matMultKernel_ikjiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 364
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17matMultKernel_ijkiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17matMultKernel_ijkiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
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        .size:           2
        .value_kind:     hidden_remainder_z
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        .value_kind:     hidden_global_offset_x
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        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17matMultKernel_ikjiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17matMultKernel_ikjiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
